WO2021012453A1 - 模块化多电平换流器子模块拓扑电路及其控制方法 - Google Patents

模块化多电平换流器子模块拓扑电路及其控制方法 Download PDF

Info

Publication number
WO2021012453A1
WO2021012453A1 PCT/CN2019/115351 CN2019115351W WO2021012453A1 WO 2021012453 A1 WO2021012453 A1 WO 2021012453A1 CN 2019115351 W CN2019115351 W CN 2019115351W WO 2021012453 A1 WO2021012453 A1 WO 2021012453A1
Authority
WO
WIPO (PCT)
Prior art keywords
bridge
module
port
bridge sub
sub
Prior art date
Application number
PCT/CN2019/115351
Other languages
English (en)
French (fr)
Inventor
刘忠
许扬
詹昕
陈武
李培培
马大俊
眭仁杰
陈宇
Original Assignee
国网江苏省电力有限公司扬州供电分公司
东南大学
国网江苏省电力有限公司
国家电网有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 国网江苏省电力有限公司扬州供电分公司, 东南大学, 国网江苏省电力有限公司, 国家电网有限公司 filed Critical 国网江苏省电力有限公司扬州供电分公司
Priority to US17/051,441 priority Critical patent/US11632059B1/en
Publication of WO2021012453A1 publication Critical patent/WO2021012453A1/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/4835—Converters with outputs that each can have more than two voltages levels comprising two or more cells, each including a switchable capacitor, the capacitors having a nominal charge voltage which corresponds to a given fraction of the input voltage, and the capacitors being selectively connected in series to determine the instantaneous output voltage
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/145—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • H02M7/53871—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H02M1/325—Means for protecting converters other than automatic disconnection with means for allowing continuous operation despite a fault, i.e. fault tolerant converters
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/60—Arrangements for transfer of electric power between AC networks or generators via a high voltage DC link [HVCD]

Definitions

  • This application relates to the field of protection and control of power system DC transmission and distribution, such as a modular multi-level converter sub-module topology circuit and a control method thereof.
  • the modular multilevel converter has a simple modular structure, good scalability, low switching frequency, low loss, good harmonic characteristics and power quality adjustment capabilities. It is welcomed by foreign researchers and is widely used in DC transmission systems and DC distribution systems.
  • the MMC with the traditional half-bridge sub-module structure uses a lower number of components, lower cost and lower loss, it cannot quickly isolate and traverse the MMC DC side short-circuit fault, which will eventually lead to system failure and even destroy the MMC. Huge cost loss.
  • the patent application number CN201410400214.8 proposes a sub-module structure in which a half-bridge structure and a full-bridge structure are mixed, and the full-bridge sub-module is used to realize self-blocking when the converter DC circuit fails.
  • the number of switching devices in the full-bridge sub-module is relatively large, resulting in relatively high cost and loss.
  • the MMC submodule topology proposed by the patent application number CN201510416707.5 uses fewer devices, it has a weaker fault current blocking capability when the fault current is reversed.
  • the sub-module topology proposed by the patent application number CN201520350619.5 has a strong fault current blocking capability, and each sub-module has one less switching device than the full-bridge structure.
  • the sub-module topology proposed in these patent documents only considers the blocking capability of the fault current, and does not consider the damage caused by the large fault current flowing through the switching device, which leads to the low reliability of the converter.
  • a MMC sub-module with DC side fault blocking capability Publication number: CN105119511A.
  • the case is a patent application on the DC side.
  • the short-circuit current can be locked in time and completely, and the structure is simple, the required components are few, and the integration is high.
  • a modular implementation plan is proposed (the specific technical plan is omitted), although the proposed MMC sub-module topology is It has a certain DC side short-circuit fault ride-through capability; but the MMC sub-module topology has the following conditions:
  • the fault current will flow through the reverse parallel diode in the MMC power switch sub-module, which may easily damage the MMC power switch sub-module and reduce the reliability of the converter.
  • the withstand voltage of the switching device T 3 and the diode D 8 in the circuit is twice that of the switching device in the half-bridge module, that is, twice the capacitor voltage of the sub-module. Therefore, the topology circuit of the MMC sub-module needs to be selected more. High-voltage switching devices, or the use of multiple switching devices in series, increase the cost of configuration, increase the difficulty of configuration, and cannot truly realize the characteristics of modularization.
  • the present application provides an MMC sub-module topology circuit and a control method thereof with high modularity, higher reliability, and stronger and more balanced DC side short-circuit current suppression capability for forward and reverse faults.
  • the MMC sub-module topology circuit includes an incoming port, an outgoing port, at least two half-bridge sub-modules, a plurality of first switching devices, a plurality of thyristors, and a plurality of diodes. At least two half-bridge sub-modules connected in series are provided between the line port and the outlet port, and each half-bridge sub-module is provided with an input port, a first output port, and a second output port; two adjacent One of the plurality of first switching devices is provided between the second output port of the previous half-bridge submodule in the half-bridge submodule and the input port of the subsequent half-bridge submodule.
  • a first switching device where the first one of the at least two half-bridge submodules is provided with a head end of the plurality of first switching devices between the input port of the half-bridge submodule and the inlet port A first switching device; two adjacent half-bridge sub-modules are arranged between the second output port of the first half-bridge sub-module and the first output port of the subsequent half-bridge sub-module
  • One of the plurality of thyristors corresponds to a thyristor, and a head-end thyristor of the plurality of thyristors is arranged between the first output port of the first half-bridge submodule and the inlet port;
  • the at least two The second output terminal of the last half-bridge sub-module of the half-bridge sub-modules is connected to the tail-end thyristor of the plurality of thyristors and the tail-end first switching device of the plurality of first switching devices, Wherein the tail end thyristor and the tail end
  • the present application also provides a method for controlling the topology circuit of the MMC submodule, which is used to control the topology circuit of the MMC submodule described in the first aspect.
  • the method includes: setting an initial state when the MMC is running normally;
  • the control pole of the thyristor triggers a signal, and triggers a plurality of first switching devices to be in a conducting state, and two second switching devices in each of the at least two half-bridge sub-modules to be in a complementary conducting state; detecting Fault signal, in the case of detecting a short-circuit fault on the DC side of the MMC, block the trigger signals of the second switching devices in all half-bridge sub-modules, and block the trigger signals of the multiple first switching devices; detect the short-circuit fault on the DC side In the direction of current, when the fault current is positive, the multiple thyristors are triggered to be in the conducting state, and the DC side short-circuit fault current enters from the inlet port, and then flows through the multiple
  • Fig. 1 is a schematic circuit diagram provided by an embodiment of the present application.
  • Fig. 2 is a schematic diagram of a half-bridge sub-module provided by an embodiment of the present application
  • Figure 3 is a working principle diagram of a forward fault current provided by an embodiment of the present application.
  • Fig. 4 is a working principle diagram of a reverse fault current provided by an embodiment of the present application.
  • Fig. 5 is a control flowchart provided by an embodiment of the present application.
  • H 1 , H 2 ??H N are half-bridge sub-modules
  • C SM1 , C SM2 ?? C SMN is the capacitor in the half-bridge submodule
  • G 11 , G 12 , G 21 , G 22 ??G N1 , G N2 are the second switching devices in the half-bridge submodule
  • Q 1 , Q 2 ... Q N , Q N+1 are the first switching devices
  • VT 1 , VT 2 ??VT N , VT N+1 are thyristors
  • D 1 , D 2 , D 3 ??D N , D N+1 are diodes
  • X is the incoming port
  • Y is the outgoing port
  • the MMC sub-module topology circuit includes an incoming port X, an outgoing port Y, at least two half-bridge sub-modules, multiple first switching devices, multiple thyristors, and multiple diodes; Wherein, at least two half-bridge sub-modules connected in series are arranged between the incoming port X and the outgoing port Y, and each half-bridge sub-module is provided with an input port, a first output port, and a second output port.
  • the plurality of first switches are provided between the second output port of the first half-bridge sub-module and the input port of the subsequent half-bridge sub-module in the two adjacent half-bridge sub-modules
  • One of the devices corresponds to the first switching device, and the first one of the at least two half-bridge sub-modules is provided between the input port of the half-bridge sub-module and the incoming port X.
  • the head-end first switching device in the switching device.
  • the plurality of thyristors are arranged between the second output port of the preceding half-bridge sub-module and the first output port of the succeeding half-bridge sub-module in two adjacent half-bridge sub-modules
  • One of the thyristors corresponds to a thyristor
  • a head-end thyristor of the plurality of thyristors is arranged between the first output port of the first half-bridge submodule and the incoming port X.
  • the second output terminal of the last half-bridge sub-module of the at least two half-bridge sub-modules is connected to the tail-end thyristor of the plurality of thyristors and the tail-end first switching device of the plurality of first switching devices , Wherein the tail end thyristor and the tail end first switching device are connected in parallel.
  • At least two half-bridge sub-modules of two adjacent half-bridge sub-modules, the first output port of the preceding half-bridge sub-module and the second output port of the subsequent half-bridge sub-module One corresponding diode of the plurality of diodes is arranged in between.
  • a head-end diode of the plurality of diodes is provided between the incoming line port X and the second output port of the first one of the at least two half-bridge sub-modules, and the outgoing line
  • a tail diode of the plurality of diodes is arranged between the port Y and the first output port of the last half-bridge sub-module of the at least two half-bridge sub-modules.
  • each half-bridge sub-module is composed of two second switching devices and a capacitor; wherein the emitter of the first second switching device G J1 and the second The collector connections of the two switching devices G J2 constitute the input port of each half-bridge sub-module.
  • the collector of the first second switching device G J1 is connected to the positive electrode of the capacitor C SMJ to form the first output port of each half-bridge sub-module.
  • the emitter of the second second switching device G J2 is connected to the negative electrode of the capacitor C SMJ to form a second output port of each half-bridge submodule.
  • J is 1 ⁇ N, N ⁇ 2.
  • the number of the plurality of first switching devices is N+1, which are Q 1 , Q 2 ... Q N+1 in turn ; the head-end first switching device is Q 1 , and the tail-end first switch The device is Q n+1 .
  • the number of the plurality of thyristors is N+1, which are VT 1 , VT 2 ... VT N+1 in order ; the head-end thyristor is VT 1 , and the tail-end thyristor is VT N+1 .
  • N 2.
  • the emitter of the head-end first switching device Q 1 is connected to the inlet port X, and the collector of the head-end first switching device Q 1 is connected to the first half bridge.
  • H module 1 connected to the input port.
  • the collector of the switching devices emitting Q J J is J-1 and the first pole half-bridge submodule H J-1 is connected to a second output port, said switching devices Q J-J and J-th sub-half-bridge Input port connection of module H J.
  • the emitter of the first switching device Q N+1 at the tail end is connected to the second output port of the N-th half-bridge submodule H N
  • the collector of the first switching device Q N+1 at the tail end is connected to the second output port of the Nth half-bridge submodule H N. Describe the outlet port Y connection.
  • J is 2, 3...N, N ⁇ 2.
  • the plurality of anode tip thyristor VT thyristor 1 is connected to the inlet port of the line X, the head end of the cathode 1 and the thyristor VT one half of the first sub-module 1 H The first output port is connected.
  • the anode of the Jth thyristor VT J is connected to the second output port of the J- 1th half-bridge submodule H J-1 , and the cathode of the Jth thyristor VT J is connected to the Jth half-bridge submodule H J
  • the first output port is connected.
  • the anode of the tail end thyristor VT n+1 is connected to the second output port of the Nth half-bridge submodule H N , and the cathode of the tail end thyristor VT n+1 is connected to the outlet port Y.
  • J is 2, 3...N, N ⁇ 2.
  • the first terminal of the diode D 1 is connected to the anode inlet port line X, the head end of the positive electrode of the first diode D 1 is a half-bridge sub-module connected to the second output port H 1.
  • the cathode of the Jth diode D J is connected to the first output port of the J- 1th half-bridge submodule H J-1 , and the anode of the Jth diode D J is connected to the Jth half-bridge submodule H J The second output port is connected.
  • the cathode of the tail diode D N+1 is connected to the first output port of the N-th half-bridge submodule, and the anode of the tail diode D N+1 is connected to the outlet port Y.
  • J is 2, 3...N, N ⁇ 2.
  • the plurality of first switching devices may be insulated gate bipolar transistors (IGBT) or metal-oxide semiconductor field effect transistors (Metal-Oxide-Semiconductor Field-Effect Transistor, MOSFET).
  • IGBT insulated gate bipolar transistors
  • MOSFET Metal-oxide semiconductor field effect transistors
  • the second switching device may be an IGBT or a MOSFET.
  • This application also provides a method for controlling the topology circuit of the MMC sub-module, as shown in FIG. 5, including steps (1) to (4).
  • step (1) when the MMC is running normally, the initial state is set; the gate trigger signals of the multiple thyristors VT 1 , VT 2 ... VT N , VT N+1 are blocked, and the multiple first switching devices Q 1 , Q 2 ...Q N , Q N+1 are in a conducting state, and two second switching devices in each half-bridge sub-module of the at least two half-bridge sub-modules are in a complementary conducting state.
  • step (2) the fault signal is detected, and when the DC side short-circuit fault of the MMC is detected, the trigger signals of the second switching devices in all half-bridge submodules are blocked, and the multiple first switching devices Q are blocked 1 ,Q 2 ...Q N ,Q N+1 trigger signal; detect the direction of the short-circuit fault current on the DC side, if the fault current direction is positive, perform step (3); if the fault current direction is negative, Go to step (4).
  • step (3) trigger all the thyristors VT 1 , VT 2 ... VT N , VT N+1 are in the conducting state, and the DC side short-circuit fault current enters from the incoming port X, and then flows through all the thyristors and all the half bridges
  • the capacitor in the module effectively suppresses the short-circuit fault current on the DC side and prevents the large fault current from flowing through the switching device, as shown in Figure 3.
  • the value of the short-circuit fault current on the DC side is detected until the short-circuit fault current on the DC side is 0.
  • step (4) the trigger signals of all thyristors VT 1 , VT 2 ... VT N , VT N+1 are blocked.
  • all thyristors are in the blocking state, and the short-circuit fault current on the DC side enters from the outlet port Y and then flows through All diodes and capacitors in all half-bridge sub-modules effectively suppress the short-circuit fault current on the DC side and avoid the large fault current from flowing through the switching devices, as shown in Figure 4; detect the short-circuit fault current value on the DC side until the DC side The short-circuit fault current value is 0.
  • the application When the application is running, regardless of whether the fault current is in the forward or reverse direction, it can prevent the large fault current from flowing through the switching device and its anti-parallel diode during the fault, so as to prevent the fault current from damaging the switching device. Because all switching devices, thyristors and diodes have the same withstand voltage, they are the capacitor voltages of the sub-modules, so the sub-module topology has high modular characteristics, is easier to configure, and has a certain cascade logic relationship, which is more convenient Realize modularity. During a fault, regardless of whether the fault current is forward or reverse, the capacitors in all sub-modules will be put into the MMC bridge arm in series to suppress the fault current. Therefore, the described one MMC sub-module topology has a strong Fault current suppression capability.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Rectifiers (AREA)
  • Inverter Devices (AREA)

Abstract

一种模块化多电平换流器子模块拓扑电路及其控制方法。包括进线端口（X）、出线端口（Y），至少两个半桥子模块（H 1、H 2……H N）、多个第一开关器件（Q 1、Q 2……Q N、Q N+1）、多个晶闸管（VT 1、VT 2……VT N、VT N+1）及多个二极管（D 1、D 2、D 3……D N、D N+1），进线端口（X）和出线端口（Y）之间设置有串联连接的至少两个半桥子模块（H 1、H 2……H N），每个半桥子模块（H 1、H 2……H N）设置有输入端口、第一输出端口和第二输出端口。

Description

模块化多电平换流器子模块拓扑电路及其控制方法
本申请要求在2019年7月23日提交中国专利局、申请号为201910666334.5的中国专利申请的优先权，该申请的全部内容通过引用结合在本申请中。
技术领域
本申请涉及电力***直流输配电保护控制领域，例如一种模块化多电平换流器子模块拓扑电路及其控制方法。
背景技术
随着新能源发电和直流负荷的不断增加，直流输配电网以及交直流混合配电网的应用越来越得到重视。而模块化多电平换流器(modular multilevel converter,MMC)因为具有简单的模块化结构、良好的可扩展性、开关频率低、损耗低、良好的谐波特性以及电能质量调节能力，受到国内外学者的欢迎，并被广泛的应用于直流输电***和直流配电***。然而，传统半桥型子模块结构的MMC虽然使用器件数量较低、成本和损耗较低，但是却无法快速的隔离和穿越MMC直流侧短路故障，最终会导致***瘫痪，甚至会毁坏MMC，造成巨大的成本损失。
随后，一些具有故障穿越能力的MMC子模块拓扑被提出。
如申请号为CN201410400214.8的专利提出了一种半桥结构和全桥结构混用的子模块结构，全桥子模块用于实现换流器直流路故障时的自阻断。然而全桥子模块的开关器件数量较多，导致成本和损耗较高。
申请号为CN201510416707.5的专利提出的MMC子模块拓扑虽然使用的器件较少，但是当故障电流反向时具有较弱的故障电流阻断能力。
申请号为CN201520350619.5的专利提出的子模块拓扑结构具有较强的故障电流阻断能力，且每个子模块比全桥结构少一个开关器件。但是这些专利文献提出的子模块拓扑仅仅考虑了故障电流的阻断能力，没有考虑故障大电流流过开关器件给其带来的损坏，导致换流器可靠性不高。
本申请人在2015-8-28向国家知识产权局提出申请号为2015105433494，名称：一种具有直流侧故障阻断能力的MMC子模块，公开号：CN105119511A的专利申请，该案出于直流侧能够及时、完全地锁闭短路电流，且结构简单、所需 器件少、集成度高的目的，提出了具有一定模块化的实施方案(具体技术方案略)，所提出的MMC子模块拓扑结构虽然具有一定的直流侧短路故障穿越能力；但是该MMC子模块拓扑结构存在以下情况：
1、无论故障电流正向还是反向，故障电流都会流经MMC功率开关子模块中的反向并联二极管，容易造成MMC功率开关子模块的损坏，降低换流器的可靠性。
2、电路中的开关器件T 3和二极管D 8的耐压是半桥模块中开关器件耐压的二倍，即2倍的子模块的电容电压，因此，该MMC子模块拓扑电路需要选择更高电压等级的开关器件，或者使用多个开关器件串联，这增加了配置的成本，加大了配置难度，不能真正实现模块化的特点。
3、在直流侧短路故障电流反向的情况下，只有C 1和C 2两个子模块电容串联到MMC桥臂中，C 3和C 4被旁路了，因此，该MMC子模块拓扑电路直流侧短路故障电流的抑制能力较弱。
发明内容
本申请提供了一种模块化程度高，可靠性更高，并且正反向故障抑制直流侧短路电流能力更强、更均衡的MMC子模块拓扑电路及其控制方法。
第一方面，本申请提供的MMC子模块拓扑电路包括进线端口、出线端口、至少两个半桥子模块、多个第一开关器件、多个晶闸管及多个二极管，其中，在所述进线端口和所述出线端口之间设置有串联连接的至少两个半桥子模块，每个所述半桥子模块设置有输入端口、第一输出端口和第二输出端口；两个相邻的所述半桥子模块中在前的所述半桥子模块的第二输出端口和在后的所述半桥子模块的输入端口之间设置有所述多个第一开关器件中的一个对应第一开关器件，所述至少两个半桥子模块中的第一个所述半桥子模块的输入端口和所述进线端口之间设置有所述多个第一开关器件中的头端第一开关器件；两个相邻的所述半桥子模块中在前的所述半桥子模块的第二输出端口和在后的所述半桥子模块的第一输出端口之间设置有所述多个晶闸管中的一个对应晶闸管，第一个所述半桥子模块的第一输出端口和所述进线端口之间设置有所述多个晶闸管中的头端晶闸管；所述至少两个半桥子模块中的最后一个所述半桥子模块的第二输出端连接到所述多个晶闸管中的尾端晶闸管和所述多个第一开关器件中的尾端第一开关器件，其中所述尾端晶闸管和所述尾端第一开关器件并联；至少 两个半桥子模块的两个相邻的所述半桥子模块中在前的所述半桥子模块的第一输出端口与在后的所述半桥子模块的第二输出端口之间设置有所述多个二极管中的一个对应二极管；在所述进线端口和所述至少两个半桥子模块中的第一个半桥子模块的第二输出端口之间设置有所述多个二极管的中的头端二极管，所述出线端口和所述至少两个半桥子模块的最后一个所述半桥子模块的第一输出端口之间设置有所述多个二极管中的尾端二极管。
第二方面，本申请还提供一种MMC子模块拓扑电路的控制方法，用于控制第一方面所述的MMC子模块拓扑电路，该方法包括：MMC正常运行时，设置初始状态；闭锁多个晶闸管的控制极触发信号，且触发多个第一开关器件处于导通状态、至少两个半桥子模块中的每个半桥子模块中的两个第二开关器件处于互补导通状态；检测故障信号，在检测到MMC发生直流侧短路故障的情况下，闭锁所有半桥子模块中的第二开关器件的触发信号，闭锁所述多个第一开关器件的触发信号；检测直流侧短路故障电流方向，在故障电流为正向的情况下，触发所述多个晶闸管处于导通状态，直流侧短路故障电流由进线端口进入，再流经所述多个晶闸管和所述至少两个半桥子模块中每个半桥子模块中的电容；检测直流侧短路故障电流值，直到直流侧短路故障电流值为0；在直流侧短路故障电流为负向的情况下，闭锁所述多个晶闸管的触发信号，直流侧短路故障电流由出线端口进入，再流经多个二极管和所述至少两个半桥子模块中每个半桥子模块中的电容，检测故障电流值，直到直流侧短路故障电流值为0。
附图说明
图1是本申请一实施例提供的电路原理图，
图2是本申请一实施例提供的一个半桥子模块的原理图，
图3是本申请一实施例提供的正向故障电流时的工作原理图，
图4是本申请一实施例提供的反向故障电流时的工作原理图，
图5是本申请一实施例提供的控制流程图；
图中H 1、H 2……H N为半桥子模块，
C SM1、C SM2……C SMN为半桥子模块中电容器，
G 11、G 12、G 21、G 22……G N1、G N2为半桥子模块中的第二开关器件，
Q 1、Q 2……Q N、Q N+1为第一开关器件，
VT 1、VT 2……VT N、VT N+1为晶闸管，
D 1、D 2、D 3……D N、D N+1为二极管，
X为进线端口，Y为出线端口；
图3、4中的箭头方向表示直流侧短路故障电流方向。
具体实施方式
如图1所示，本申请实施例提供的MMC子模块拓扑电路包括进线端口X、出线端口Y、至少两个半桥子模块、多个第一开关器件、多个晶闸管及多个二极管；其中，在进线端口X和出线端口Y之间设置有串联连接的至少两个半桥子模块，每个所述半桥子模块设置有输入端口、第一输出端口和第二输出端口。
两个相邻的所述半桥子模块中在前的所述半桥子模块的第二输出端口和在后的所述半桥子模块的输入端口之间设置有所述多个第一开关器件中的一个对应第一开关器件，所述至少两个半桥子模块中的第一个所述半桥子模块的输入端口和所述进线端口X之间设置有所述多个第一开关器件中的头端第一开关器件。
两个相邻的所述半桥子模块中在前的所述半桥子模块的第二输出端口和在后的所述半桥子模块的第一输出端口之间设置有所述多个晶闸管中的一个对应晶闸管，第一个所述半桥子模块的第一输出端口和所述进线端口X之间设置有所述多个晶闸管中的头端晶闸管。
所述至少两个半桥子模块中的最后一个半桥子模块第二输出端连接到所述多个晶闸管中的尾端晶闸管和所述多个第一开关器件中的尾端第一开关器件，其中所述尾端晶闸管和所述尾端第一开关器件并联。
至少两个半桥子模块的两个相邻的所述半桥子模块中在前的所述半桥子模块的第一输出端口与在后的所述半桥子模块的第二输出端口之间设置有所述多个二极管中的一个对应二极管。
在所述进线端口X和所述至少两个半桥子模块中的第一个所述半桥子模块的第二输出端口之间设置有所述多个二极管的头端二极管，所述出线端口Y和至少两个半桥子模块的最后一个所述半桥子模块的第一输出端口之间设置有所述多个二极管中的尾端二极管。
在一实施例中，如图2所示，所述每个半桥子模块由两个第二开关器件和一个电容组成；其中第一个第二开关器件G J1的发射极与第二个第二开关器件G J2的集电极连接，构成所述每个半桥子模块的输入端口。
所述第一个第二开关器件G J1的集电极与所述电容C SMJ的正极连接，构成所述每个半桥子模块的第一输出端口。
所述第二个第二开关器件G J2的发射极与所述电容C SMJ的负极连接，构成所述每个半桥子模块的第二输出端口。
J为1～N，N≥2。
在一实施例中，所述至少两个半桥子模块为N个，依次为H 1、H 2……H N。
所述多个第一开关器件的个数为N+1个，依次为Q 1、Q 2……Q N+1；所述头端第一开关器件为Q 1，所述尾端第一开关器件为Q n+1。
所述多个晶闸管的个数为N+1个，依次为VT 1、VT 2……VT N+1；所述头端晶闸管为VT 1，所述尾端晶闸管为VT N+1。
所述多个二极管的个数为N+1个，依次为D1、D 2、D 3……D N+1；所述头端二极管为D 1，所述尾端二极管为D N+1。
其中，N≥2。
在一实施例中，所述头端第一开关器件Q 1的发射极与所述进线端口X连接，所述头端第一开关器件Q 1的集电极与所述第一个半桥子模块H 1的输入端口连接。
第J个开关器件Q J的发射极与第J-1个半桥子模块H J-1的第二输出端口连接，所述第J个开关器件Q J的集电极与第J个半桥子模块H J的输入端口连接。
所述尾端第一开关器件Q N+1的发射极与所第N个半桥子模块H N的第二输出端口连接，所述尾端第一开关器件Q N+1的集电极与所述出线端口Y连接。
J为2、3……N，N≥2。
在一实施例中，所述多个晶闸管的头端晶闸管VT 1的阳极与所述进线端口X连接，所述头端晶闸管VT 1的阴极与所述第一个半桥子模块H 1的第一输出端口连接。
第J个晶闸管VT J的阳极与第J-1个半桥子模块H J-1的第二输出端口连接，所述第J个晶闸管VT J的阴极与第J个半桥子模块H J的第一输出端口连接。
所述尾端晶闸管VT n+1的阳极与第N个所述半桥子模块H N的第二输出端口连接，所述尾端晶闸管VT n+1的阴极与所述出线端口Y连接。
J为2、3……N，N≥2。
在一实施例中，所述头端二极管D 1的负极与所述进线端口X连接，所述头端二极管D 1的正极与第一个半桥子模块H 1的第二输出端口连接。
第J个二极管D J的负极与第J-1个半桥子模块H J-1的第一输出端口连接，所述第J个二极管D J的正极与第J个半桥子模块H J的第二输出端口连接。
所述尾端二极管D N+1的负极与第N个半桥子模块的第一输出端口连接，所述尾端二极管D N+1的正极与所述出线端口Y连接。
J为2、3……N，N≥2。
在一实施例中，所述多个第一开关器件可以是绝缘栅双极型晶体管(Insulated Gate Bipolar Transistor,IGBT)或金属-氧化物半导体场效应晶体管(Metal-Oxide-Semiconductor Field-Effect Transistor,MOSFET)。
在一实施例中，所述第二开关器件可以是IGBT或MOSFET。
本申请还提供一种MMC子模块拓扑电路的的控制方法，如图5所示，包括步骤(1)至步骤(4)。
在步骤(1)中，MMC正常运行时，设置初始状态；闭锁多个晶闸管VT 1,VT 2…VT N,VT N+1的控制极触发信号，且触发多个第一开关器件Q 1,Q 2…Q N,Q N+1处于导通状态、至少两个半桥子模块中的每个半桥子模块中的两个第二开关器件处于互补导通状态。
在步骤(2)中，检测故障信号，在检测到MMC发生直流侧短路故障的情况下，闭锁所有半桥子模块中的第二开关器件的触发信号，闭锁所述多个第一开关器件Q 1,Q 2…Q N,Q N+1的触发信号；检测直流侧短路故障电流方向，在故障电流方向为正的情况下，执行步骤(3)；在故障电流方向为负的情况下，执行步骤(4)。
在步骤(3)中，触发所有晶闸管VT 1,VT 2…VT N,VT N+1处于导通状态，直流侧短路故障电流由进线端口X进入，再流经所有晶闸管和所有半桥子模块中的电容，有效的抑制了直流侧短路故障电流，且避免了故障大电流流过开关器件，如图3所示；检测直流侧短路故障电流值，直到直流侧短路故障电流值为0。
在步骤(4)中，闭锁所有晶闸管VT 1,VT 2…VT N,VT N+1的触发信号，此时，所有晶闸管处于闭锁状态，直流侧短路故障电流由出线端口Y进入，再流经所有二极管和所有半桥子模块中的电容，有效的抑制了直流侧短路故障电流，且避免了故障大电流流过开关器件，如图4所示；检测直流侧短路故障电流值，直到直流侧短路故障电流值为0。
本申请运行时，无论故障电流正向还是反向，都可以避免故障期间故障大电流流过开关器件及其反向并联二极管，避免故障电流给开关器件带来损坏。 因为所有开关器件、晶闸管和二极管的耐压一样，都是子模块的电容电压，所以所述子模块拓扑具有很高的模块化特性，更容易配置，且具有一定的级联逻辑关系，更便于实现模块化。故障期间，无论故障电流正向还是反向，所有子模块中的电容都会通过串联的方式投入到MMC桥臂中，来抑制故障电流，因此，所述的一种MMC子模块拓扑具有很强的故障电流抑制能力。

Claims (9)

  1. 一种模块化多电平换流器子模块拓扑电路，包括进线端口、出线端口、至少两个半桥子模块、多个第一开关器件、多个晶闸管及多个二极管；
    其中，所述进线端口和所述出线端口之间设置有串联连接的所述至少两个半桥子模块，每个所述半桥子模块设置有输入端口、第一输出端口和第二输出端口；
    两个相邻的所述半桥子模块中在前的所述半桥子模块的第二输出端口的和在后的所述半桥子模块输入端口之间设置有所述多个第一开关器件中的一个对应第一开关器件，所述至少两个半桥子模块中的第一个所述半桥子模块的输入端口和所述进线端口之间设置有所述多个第一开关器件中的头端第一开关器件；
    两个相邻的所述半桥子模块中在前的所述半桥子模块的第二输出端口的和在后的所述半桥子模块的第一输出端口之间设置有所述多个晶闸管中的一个对应晶闸管，第一个所述半桥子模块的第一输出端口和所述进线端口之间设置有所述多个晶闸管中的头端晶闸管；
    所述至少两个半桥子模块中的最后一个半桥子模块的第二输出端连接到所述多个晶闸管中的尾端晶闸管和所述多个第一开关器件中的尾端第一开关器件，其中所述尾端晶闸管和所述尾端第一开关器件并联；
    至少两个半桥子模块的两个相邻的所述半桥子模块中在前的所述半桥子模块的第一输出端口与在后的所述半桥子模块的第二输出端口之间设置有所述多个二极管中的一个对应二极管；
    在所述进线端口和所述至少两个半桥子模块中的第一个半桥子模块的第二输出端口之间设置有所述多个二极管中的头端二极管，所述出线端口和至少两个半桥子模块的最后一个所述半桥子模块的第一输出端口之间设置有所述多个二极管中的尾端二极管。
  2. 根据权利要求1所述的拓扑电路，其中，所述每个半桥子模块由两个第二开关器件和一个电容组成；第一个第二开关器件的发射极与第二个第二开关器件的集电极连接，构成所述每个半桥子模块的输入端口；
    所述第一个第二开关器件的集电极与所述电容的正极连接，构成所述每个半桥子模块的第一输出端口；
    所述第二个第二开关器件的发射极与所述电容的负极连接，构成所述每个半桥子模块的第二输出端口。
  3. 根据权利要求1所述的拓扑电路，其中，所述至少两个半桥子模块为N 个，依次为H 1、H 2……H N；
    所述多个第一开关器件的个数为N+1个，依次为Q 1、Q 2……Q N+1，所述头端第一开关器件为Q 1，所述尾端第一开关器件为Q N+1；
    所述多个晶闸管的个数为N+1个，依次为VT 1、VT 2……VT N+1，所述头端晶闸管为VT 1，所述尾端晶闸管为VT N+1；
    所述多个二极管的个数为N+1个，依次为D1、D 2、D 3……D N+1，所述头端二极管为D 1，所述尾端二极管为D N+1；
    其中，N≥2。
  4. 根据权利要求3所述的拓扑电路，其中，所述头端第一开关器件的发射极与所述进线端口连接，所述头端第一开关器件的集电极与所述至少两个半桥子模块的第一个半桥子模块的输入端口连接；
    第J个第一开关器件的发射极与第J-1个半桥子模块的第二输出端口连接，所述第J个第一开关器件的集电极与第J个半桥子模块的输入端口连接；
    所述尾端第一开关器件的发射极与第N个半桥子模块的第二输出端口连接，所述尾端第一开关器件的集电极与所述出线端口连接；
    J为2、3……N，N≥2。
  5. 根据权利要求3所述的拓扑电路，其中，所述多个晶闸管的头端晶闸管的阳极与所述进线端口连接，所述头端晶闸管的阴极与第一个半桥子模块的第一输出端口连接；
    第J个晶闸管的阳极与第J-1个半桥子模块的第二输出端口连接，所述第J个晶闸管的阴极与第J个半桥子模块的第一输出端口连接；
    所述尾端晶闸管的阳极与第N个半桥子模块的第二输出端口连接，所述尾端晶闸管的阴极与所述出线端口连接；
    J为2、3……N，N≥2。
  6. 根据权利要求3所述的拓扑电路，其中，所述头端二极管的负极与所述进线端口连接，所述头端二极管的正极与第一个半桥子模块的第二输出端口连接；
    第J个二极管的负极与第J-1个半桥子模块的第一输出端口连接，所述第J个二极管的正极与第J个半桥子模块的第二输出端口连接；
    所述尾端二极管的负极与第N个半桥子模块的第一输出端口连接，所述尾端二极管的正极与所述出线端口连接；
    J为2、3……N，N≥2。
  7. 根据权利要求1所述的拓扑电路，其中，所述多个第一开关器件为绝缘栅双极型晶体管或金属-氧化物半导体场效应晶体管。
  8. 根据权利要求2所述的拓扑电路，其中，所述第二开关器件为绝缘栅双极型晶体管或金属-氧化物半导体场效应晶体管。
  9. 一种模块化多电平换流器子模块拓扑电路的控制方法，用于控制权利要求1-8任一项所述的模块化多电平换流器子模块拓扑电路，所述方法包括：
    所述模块化多电平换流器正常运行时，设置初始状态：闭锁多个晶闸管的控制极触发信号，且触发多个第一开关器件处于导通状态、至少两个半桥子模块中的每个半桥子模块中的两个第二开关器件处于互补导通状态；
    检测故障信号，在检测到所述模块化多电平换流器发生直流侧短路故障的情况下，闭锁所述至少两个半桥子模块中每个半桥子模块中的第二开关器件的触发信号，闭锁所述多个第一开关器件的触发信号；
    检测直流侧短路故障电流方向，在直流侧短路故障电流为正向的情况下，触发所述多个晶闸管处于导通状态，直流侧短路故障电流由进线端口进入，流经所述多个晶闸管和所述至少两个半桥子模块中的电容，检测直流侧短路故障电流值，直到直流侧短路故障电流值为0；
    在直流侧短路故障电流为负向的情况下，闭锁所述多个晶闸管的触发信号，直流侧短路故障电流由出线端口进入，流经多个二极管和所述至少两个半桥子模块中每个半桥子模块中的电容；检测直流侧短路故障电流值，直到直流侧短路故障电流值为0。
PCT/CN2019/115351 2019-07-23 2019-11-04 模块化多电平换流器子模块拓扑电路及其控制方法 WO2021012453A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US17/051,441 US11632059B1 (en) 2019-07-23 2019-11-04 Submodule topology circuit for modular multilevel converter and method for controlling same

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201910666334.5A CN110417290B (zh) 2019-07-23 2019-07-23 一种新型模块化多电平换流器子模块拓扑电路及其控制方法
CN201910666334.5 2019-07-23

Publications (1)

Publication Number Publication Date
WO2021012453A1 true WO2021012453A1 (zh) 2021-01-28

Family

ID=68362688

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2019/115351 WO2021012453A1 (zh) 2019-07-23 2019-11-04 模块化多电平换流器子模块拓扑电路及其控制方法

Country Status (3)

Country Link
US (1) US11632059B1 (zh)
CN (1) CN110417290B (zh)
WO (1) WO2021012453A1 (zh)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110261709B (zh) * 2019-07-26 2024-02-27 国家电网有限公司 一种用于模块化多电平换流器子模块的检测装置及方法
CN110943615B (zh) * 2019-11-25 2020-11-24 上海交通大学 一种低损耗模块化多电平直流直流变换器的故障穿越方法
CN110995039B (zh) * 2019-11-25 2020-11-24 上海交通大学 一种低损耗模块化多电平换流器及其参数设计方法
CN110994560B (zh) * 2019-11-25 2020-11-20 上海交通大学 一种低损耗模块化多电平换流器故障穿越方法
CN113258802B (zh) * 2021-04-22 2024-02-02 昆明理工大学 一种具备直流故障清除和自均压能力的子模块拓扑结构

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104167912A (zh) * 2014-08-14 2014-11-26 华中科技大学 一种具备零直流电压故障穿越能力的mmc及其设计方法
CN104901570A (zh) * 2015-06-23 2015-09-09 南京南瑞继保电气有限公司 模块化多电平换流器
CN105471302A (zh) * 2016-01-25 2016-04-06 华北电力大学 基于等式约束的辅助电容集中式半桥mmc自均压拓扑
CN106998140A (zh) * 2016-01-25 2017-08-01 华北电力大学 无需均压控制的单向dc-dc变换器
JP2018093637A (ja) * 2016-12-05 2018-06-14 東芝三菱電機産業システム株式会社 電力変換装置
CN108964493A (zh) * 2018-08-20 2018-12-07 华北电力大学（保定） 一种具备直流故障清除能力的mmc拓扑结构

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102015106196B3 (de) * 2015-04-02 2016-06-23 Rainer Marquardt Verlustarmer modularer Multilevelkonverter
CN204633632U (zh) 2015-05-26 2015-09-09 安徽理工大学 一种具有直流故障穿越能力的mmc子模块拓扑
CN104993683B (zh) 2015-07-15 2018-06-19 南方电网科学研究院有限责任公司 模块化多电平换流器子模块电路
CN105119511B (zh) 2015-08-28 2018-01-09 国网江苏省电力公司扬州供电公司 一种具有直流侧故障阻断能力的mmc子模块电路
EP3211784B1 (de) * 2016-02-25 2021-03-31 GE Energy Power Conversion Technology Ltd Doppel-submodul für einen modularen mehrpunktstromrichter und modularer mehrpunktstromrichter mit diesem
DE102017219499A1 (de) * 2017-11-02 2019-05-02 Siemens Aktiengesellschaft Elektrische Anordnung mit Teilmodulen sowie Teilmodule als solche
US12027992B2 (en) * 2019-12-20 2024-07-02 Ecole De Technologie Superieure Multilevel electric power converter

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104167912A (zh) * 2014-08-14 2014-11-26 华中科技大学 一种具备零直流电压故障穿越能力的mmc及其设计方法
CN104901570A (zh) * 2015-06-23 2015-09-09 南京南瑞继保电气有限公司 模块化多电平换流器
CN105471302A (zh) * 2016-01-25 2016-04-06 华北电力大学 基于等式约束的辅助电容集中式半桥mmc自均压拓扑
CN106998140A (zh) * 2016-01-25 2017-08-01 华北电力大学 无需均压控制的单向dc-dc变换器
JP2018093637A (ja) * 2016-12-05 2018-06-14 東芝三菱電機産業システム株式会社 電力変換装置
CN108964493A (zh) * 2018-08-20 2018-12-07 华北电力大学（保定） 一种具备直流故障清除能力的mmc拓扑结构

Also Published As

Publication number Publication date
US11632059B1 (en) 2023-04-18
US20230112838A1 (en) 2023-04-13
CN110417290A (zh) 2019-11-05
CN110417290B (zh) 2020-09-04

Similar Documents

Publication Publication Date Title
WO2021012453A1 (zh) 模块化多电平换流器子模块拓扑电路及其控制方法
US9806599B2 (en) Converter submodule with short-circuit device and power converter having same
US10164428B2 (en) Voltage-source multi-level converter, DC power transmission system, and fault processing method and device
KR101453631B1 (ko) 고전압용 컨버터
US11108338B2 (en) Dual submodule for a modular multilevel converter and modular multilevel converter including the same
WO2015127716A1 (zh) 一种直流输电保护装置、换流器及保护方法
CN109586327B (zh) 一种能量消耗装置及其控制方法
US11451135B2 (en) Multilevel port under-voltage protection circuit with flying capacitor
US11139733B2 (en) Modular multilevel converter sub-module having DC fault current blocking function and method of controlling the same
US20190386483A1 (en) Igbt short-circuit detection and protection circuit and igbt-based controllable rectifier circuit
US10367423B1 (en) Power conversion device
CA2918912C (en) Direct current power system
WO2017215314A1 (zh) 一种混合式直流断路器
CN110890743B (zh) 具备故障阻断能力的低损耗的模块化多电平直流变压器
US10530243B2 (en) Power conversion device with malfunction detection
JP2015162999A (ja) 電力変換装置、及び電力変換装置の制御方法
CN108702083B (zh) 用于hvdc功率站的转换器模块
US20190028021A1 (en) Fault protection for voltage source converters
CN108616223B (zh) 一种基于igct的模块化多电平换流器及故障处理方法
US10530270B2 (en) Modular isolated half-bridge based capacitor-tapped multi-module converter with inherent DC fault segregation capability
US11652398B2 (en) Voltage source converters
CN110890742B (zh) 低损耗模块化多电平直流变压器的直流侧故障穿越方法
WO2022156488A1 (zh) 故障保护装置及光伏发电***
CN113904573A (zh) 一种半桥改进型mmc子模块拓扑结构及其控制方法
EP3981063A1 (en) Modified half-bridge submodule for multi-level voltage sourced converter with dc fault suppression capability and related method

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 19938715

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 19938715

Country of ref document: EP

Kind code of ref document: A1