WO2020113734A1 - 一种充电与降压转换集成芯片 - Google Patents
一种充电与降压转换集成芯片 Download PDFInfo
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- WO2020113734A1 WO2020113734A1 PCT/CN2018/125406 CN2018125406W WO2020113734A1 WO 2020113734 A1 WO2020113734 A1 WO 2020113734A1 CN 2018125406 W CN2018125406 W CN 2018125406W WO 2020113734 A1 WO2020113734 A1 WO 2020113734A1
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
Definitions
- the invention relates to the technical field of battery charging and buck conversion, in particular to an integrated chip for charging and buck conversion.
- the charging chip and the buck conversion chip are usually used in a rechargeable power detection circuit, so that charging and power detection are performed simultaneously.
- the charging chip generally uses an internal PMOSFET architecture, plus an anti-reverse charging circuit, so no external isolation diode is required, thermal feedback can automatically adjust the charging current, and also has anti-reverse protection function.
- the charging chip has functions of battery temperature detection, undervoltage lockout, automatic recharging, and indication of charging and end status.
- the buck conversion chip has the characteristics of strong loading capacity and high-frequency synchronous buck. It supports Li+/Li polymer batteries, multiple alkaline/nickel-metal hydride batteries, USB and other types of power supply applications.
- the buck conversion chip adopts constant frequency current PWM control mode to make it have better stability and transient characteristics, and the working quiescent current is extremely low.
- the present invention provides an integrated chip for charging and buck conversion in view of the deficiencies of the above-mentioned prior art, and solves the technology of forming an integrated chip with a charging function and a buck conversion function by improving the circuit connection structure of the charging module and the buck conversion module problem.
- the invention provides an integrated chip for charging and step-down conversion, which is provided with a voltage input terminal, a battery connection terminal, a constant current charging current setting and a charging current monitoring terminal, a charging state indication output terminal, an enabling terminal, a feedback terminal, a conversion terminal and Ground terminal;
- the integrated chip for charging and step-down conversion includes a charging module and a step-down conversion module;
- the charging module includes a voltage sampling circuit, a reference voltage circuit, a charging circuit and first and second operational amplifier circuits; the voltage sampling circuit is connected to the voltage input terminal, and is provided with a first sampling voltage output terminal related to battery voltage and charging The current-related second sampling voltage output terminal, the reference voltage circuit is provided with a constant voltage reference voltage output terminal, a constant current reference voltage output terminal and a conversion reference voltage output terminal, and the charging circuit is provided with a constant voltage charging current input terminal and a constant current charging current Input terminal and charging voltage output terminal; the first sampling voltage output terminal and the constant voltage reference voltage output terminal are connected to the input terminal of the first operational amplifier circuit, and the output terminal is connected to the constant voltage charging current input terminal; the second sampling voltage output terminal is The current reference voltage output terminal is connected to the input terminal of the second operational amplifier circuit, and its output terminal is connected to the constant current charging current input terminal; the charging voltage output terminal is connected to the sampling voltage input terminal of the voltage sampling circuit, and the second sampling voltage output terminal is connected to the The battery connection terminal; the second sampling voltage
- the buck conversion module includes a control circuit, a ramp compensation circuit, a driver and a third operational amplifier circuit; the control circuit is provided with an enable control terminal, a feedback control terminal and a conversion output terminal, and the enable control terminal is connected to the enable terminal; feedback The control terminal is connected to the output terminal of the third operational amplifier circuit, the first-stage input terminal of the third operational amplifier circuit is connected to the conversion reference voltage output terminal and the feedback terminal, and the second-stage input terminal is connected to the ramp of the ramp compensation circuit
- the wave compensation output terminal, the ramp wave compensation input terminal and the battery connection terminal are connected to the arithmetic unit; the conversion output terminal is connected to the drive input terminal of the driver, and the drive output terminal is connected to the conversion terminal.
- the voltage sampling circuit is further provided with a first electronic amplifier, a first MOS tube, a second MOS tube, and a third MOS tube; the drains of the first MOS tube and the second MOS tube are connected to the voltage input terminal, The gates of the first MOS tube and the second MOS tube are sampling voltage input terminals, which are connected to the charging voltage output terminal, the source of the first MOS tube is connected to the drain of the third MOS tube, and the source of the third MOS tube is connected The constant current charging current setting and charging current monitoring terminal; the gate of the third MOS tube is connected to the output terminal of the first electronic amplifier, and the positive phase input terminal and the reverse phase input terminal of the first electronic amplifier are respectively connected to the first MOS The source of the tube and the second MOS tube. The source of the second MOS tube is also connected to the battery connection terminal.
- the first operational amplifier circuit includes a first comparator, a second comparator, and a multiplexer, and the second operational amplifier circuit includes a third comparator;
- the constant voltage reference voltage output terminal of the reference voltage circuit includes a fully charged reference voltage output terminal and a resume charging reference voltage output terminal, and the fully charged reference voltage output terminal and the first sampling voltage output terminal are respectively connected to the inverting input of the first comparator And the non-inverting input terminal, the output terminal of the first comparator is connected to the first input terminal of the multiplexer, the second input terminal of the multiplexer is connected to the output terminal of the recovered charging reference voltage, and the multiplexer Is connected to the positive input terminal of the second comparator, the inverting input terminal of the second comparator is connected to the constant current charging current setting and charging current monitoring terminal, and the output terminal of the second comparator is connected to the constant voltage charging Current input
- the constant current reference voltage output terminal of the reference voltage circuit is connected to the non-inverting input terminal of the third comparator, the inverting input terminal of the third comparator is connected to the constant current charging current setting and charging current monitoring terminal, and the third comparator The output terminal is connected to the constant current charging current input terminal.
- the charge state operation output terminal of the first operation amplification circuit is the output terminal of the first comparator.
- the charging circuit is connected to a temperature controller.
- the third operational amplifier circuit includes a second electronic amplifier and a fourth comparator, and the non-inverting input terminal and the inverting input terminal of the second electronic amplifier are respectively connected to the feedback terminal and the converted reference voltage output terminal,
- the output terminal of the second electronic amplifier is connected to the non-inverting input terminal of the fourth comparator, the inverting input terminal of the fourth comparator is connected to the ramp compensation output terminal, and the output terminal of the fourth comparator is connected to the feedback control terminal.
- the battery connection end is connected to the current sensor and the ramp compensation input end to the arithmetic unit.
- the ramp compensation circuit is connected to the oscillator, and the oscillator is connected to the oscillation input terminal of the control circuit.
- the driving output terminal of the driver is connected to the gates of the fourth MOS tube and the fifth MOS tube respectively, the drain of the fourth MOS tube is connected to the battery connection terminal, the source of the fifth MOS tube is grounded, and the fourth MOS tube The source of the and the drain of the fifth MOS tube are both connected to the conversion end.
- a zero detector is connected between the zero detection control terminal and the conversion terminal of the control circuit.
- the integrated chip for charging and step-down conversion provided by the invention is provided with a voltage input terminal, a battery connection terminal, a constant current charging current setting and a charging current monitoring terminal, a charging state indication output terminal, an enabling terminal, a feedback terminal, a conversion terminal and a ground And connect the charging module with the buck conversion module to achieve the technical effect of forming an integrated chip with charging function and buck conversion function.
- the integrated chip can be applied to a circuit board with a small area to improve installation efficiency and reduce Chip cost.
- Figure 1 is a pin diagram of the existing charging chip
- 2 is a pin diagram of an existing integrated chip for buck conversion
- 3 is a pin diagram of the integrated chip for charging and step-down conversion of the present invention.
- FIG. 4 is a schematic diagram of the circuit structure of the integrated chip for charging and step-down conversion of the present invention.
- Figures 5-1 and 5-2 are constant voltage and constant current charging waveforms of the integrated chip for charging and buck conversion of the present invention
- FIG. 6 is a schematic diagram of the installation of the integrated chip for charging and step-down conversion of the present invention.
- the existing charging chip (type ME4054) has a voltage input terminal VCC, a battery connection terminal BAT, a constant current charging current setting and a charging current monitoring terminal PROG, a charging status indication output terminal CHRG, and a ground terminal GND. Pins.
- the existing buck conversion chip (type ME3104) has four pin terminals: a voltage input terminal VIN, an enable terminal EN, a feedback terminal FB, and a conversion terminal SW.
- this embodiment provides a charging and step-down conversion integrated chip U1, which is provided with a voltage input terminal Vin, a battery connection terminal BAT, a constant current charging current setting and a charging current monitoring terminal PROG, and a charging status indication output terminal Eight pins of CHRG, enable terminal EN, feedback terminal FB, conversion terminal SW and ground terminal GND; the integrated chip for charging and step-down conversion includes a charging module and a step-down conversion module;
- the charging module includes a voltage sampling circuit, a reference voltage circuit, a charging circuit, and first and second operational amplifier circuits; the voltage sampling circuit is connected to the voltage input terminal Vin, and is provided with a first battery-related voltage
- the reference voltage circuit is provided with a constant voltage reference voltage output terminal Vr1, a constant current reference voltage output terminal Vr2 and a conversion reference voltage output terminal Vsw
- the charging circuit is provided There are constant voltage charging current input terminal Iv, constant current charging current input terminal Ii and charging voltage output terminal Vo;
- the first sampling voltage output terminal Vs1 and the constant voltage reference voltage output terminal Vr1 are connected to the input terminal of the first operational amplifier circuit, the output The terminal is connected to the constant voltage charging current input terminal Iv;
- the second sampling voltage output terminal Vs2 and the constant current reference voltage output terminal Vr2 are connected to the input terminal of the second operational amplifier circuit, and the output terminal thereof is connected to the constant current charging current input
- the buck conversion module includes a control circuit, a ramp compensation circuit, a driver and a third operational amplifier circuit; the control circuit is provided with an enable control terminal Cen, a feedback control terminal Cfb and a conversion output terminal Csw to enable control
- the terminal Cen is connected to the enable terminal EN;
- the feedback control terminal Cfb is connected to the output terminal of the third operational amplifier circuit, and the first-stage input terminal of the third operational amplifier circuit is connected to the conversion reference voltage output terminal Vsw and the feedback terminal FB
- the second-stage input is connected to the ramp compensation output Vsco of the ramp compensation circuit, the ramp compensation input Vsci is connected to the battery connection terminal BAT to the operator;
- the conversion output SW is connected to the drive input of the driver, and the drive output Is connected to the conversion terminal SW.
- the voltage sampling circuit is further provided with a first electronic amplifier EA1, a first MOS transistor Q1, a second MOS transistor Q2, and a third MOS transistor Q3; the first MOS transistor Q1 and the second MOS transistor Q2 The drain is connected to the voltage input terminal Vin, the gates of the first MOS transistor Q1 and the second MOS transistor Q2 are sampling voltage input terminals, and are connected to the charging voltage output terminal Vo, and the source of the first MOS transistor Q1 is connected to the third The drain of the MOS tube Q3, the source of the third MOS tube Q3 is connected to the constant current charging current setting and the charging current monitoring terminal PROG; the gate of the third MOS tube Q3 is connected to the output terminal of the first electronic amplifier EA1, The non-inverting input terminal and the non-inverting input terminal of the first electronic amplifier EA1 are respectively connected to the sources of the first MOS transistor Q1 and the second MOS transistor Q2, and the source of the second MOS transistor Q2 is also connected to the battery connection terminal BAT.
- the first operational amplifier circuit includes a first comparator COMP1, a second comparator COMP2, and a multiplexer MUX, and the second operational amplifier circuit includes a third comparator COMP3;
- the constant voltage reference voltage output terminal Vr1 of the reference voltage circuit includes a fully charged reference voltage output terminal Vr11 and a resume charging reference voltage output terminal Vr12.
- the fully charged reference voltage output terminal Vr11 and the first sampling voltage output terminal Vs1 are respectively connected to the first comparison
- the inverting input terminal and the non-inverting input terminal of the comparator COMP1 the output terminal of the first comparator COMP1 is connected to the first input terminal of the multiplexer MUX, and the second input terminal of the multiplexer MUX is connected to the restored charging reference
- the voltage output terminal Vr12, the output terminal of the multiplexer MUX is connected to the non-inverting input terminal of the second comparator COMP2, and the inverting input terminal of the second comparator COMP2 is connected to the constant current charging current setting and charging current monitoring terminal PROG ,
- the output terminal of the second comparator COMP2 is connected to the constant voltage charging current input terminal Iv;
- the constant current reference voltage output terminal Vr2 of the reference voltage circuit is connected to the non-inverting input terminal of the third comparator COMP3, and the inverting input terminal of the third comparator COMP3 is connected to the constant current charging current setting and charging current monitoring terminal PROG, The output terminal of the third comparator COMP3 is connected to the constant current charging current input terminal Ii.
- the charge state calculation output terminal Vc of the first operational amplifier circuit is the output terminal of the first comparator COMP1.
- the charging circuit is connected to a temperature controller.
- the third operational amplifier circuit includes a second electronic amplifier EA2 and a fourth comparator COMP4.
- the non-inverting input terminal and the inverting input terminal of the second electronic amplifier EA2 are connected to the feedback terminal FB and all The conversion reference voltage output terminal Vsw, the output terminal of the second electronic amplifier EA2 is connected to the non-inverting input terminal of the fourth comparator COMP4, and the inverting input terminal of the fourth comparator COMP4 is connected to the ramp compensation output terminal Vsco, fourth The output of the comparator COMP4 is connected to the feedback control terminal Cfb.
- the battery connection terminal BAT is connected to the current sensor, and the ramp compensation input terminal Vsci is connected to the arithmetic unit.
- the ramp compensation circuit is connected to the oscillator, and the oscillator is connected to the oscillation input Cosc of the control circuit.
- the control circuit is also connected to a one-time programmable single chip microcomputer OTP.
- the drive output of the driver is connected to the gates of the fourth MOS transistor Q4 and the fifth MOS transistor Q5, the drain of the fourth MOS transistor Q4 is connected to the battery connection terminal BAT, and the fifth MOS transistor Q5 The source is grounded, and the source of the fourth MOS transistor Q4 and the drain of the fifth MOS transistor Q5 are both connected to the conversion terminal SW.
- the charging control circuit of the charging module includes a constant voltage control loop and a constant current control loop;
- the constant voltage control loop is adapted to amplify the first sampling voltage Vs1 and the first reference voltage (a full-charge reference voltage) Vr11 to generate a first charging current Iv, the first The sampling voltage Vs1 is related to the battery voltage, and the first charging current Iv is zero when the battery voltage is less than the first threshold voltage (recovery charging reference voltage) Vr121.
- the first sampling voltage Vs1 is a voltage obtained by sampling the battery voltage, that is, the first sampling voltage Vs1 follows the battery voltage.
- the first reference voltage Vr1 is a reference voltage set according to a constant voltage, and the constant voltage refers to a voltage held on the battery during constant voltage charging.
- the constant voltage can be set according to the battery capacity of the rechargeable battery. For example, the constant voltage of the rechargeable battery of the mobile phone is usually set to 4.2V.
- first sampling voltage Vs1 When the first sampling voltage Vs1 is less than the first reference voltage Vr11, it means that the battery voltage is less than the constant voltage; when the first sampling voltage Vs1 is equal to the first reference voltage Vr11, it means that the battery voltage and all The constant voltages are equal; when the first sampling voltage Vs1 is greater than the first reference voltage Vr11, it indicates that the battery voltage is greater than the constant voltage.
- the first threshold voltage Vr121 is smaller than the constant voltage.
- the first charging current Iv is zero when the battery voltage is less than the first threshold voltage Vr121, and the first charging current Iv is not zero when the battery voltage is greater than or equal to the first threshold voltage Vr121, that is, when entering Before the constant voltage charging mode, the constant voltage control loop participates in charging control.
- the first threshold voltage Vr121 may be set according to actual needs. For example, when the constant voltage is 4.2V, the first threshold voltage Vr121 may be set to 4.10 to 4.15V, by adjusting the constant voltage control loop The gain of can change the first threshold voltage Vr121.
- the constant current control loop is adapted to perform error amplification processing on the second sampling voltage Vs2 and the second reference voltage Vr2 to generate a second charging current Ii, the second sampling voltage Vs2 and charging
- the second charging current Ii is zero when the battery voltage is greater than a second threshold voltage (recovery charging reference voltage) Vr122, and the second threshold voltage Vr122 is greater than the first threshold voltage Vr121.
- the second sampling voltage Vs2 is a voltage obtained by sampling the charging current, that is, the second sampling voltage Vs2 follows the change of the charging current.
- the second reference voltage Vr2 is a reference voltage set according to a constant current, and the constant current refers to a charging current maintained during constant current charging.
- the second sampling voltage Vs2 When the second sampling voltage Vs2 is less than the second reference voltage Vr2, it means that the charging current is less than the constant current; when the second sampling voltage Vs2 is equal to the second reference voltage Vr2, it means that the charging current and all The constant currents are equal; when the second sampling voltage Vs2 is greater than the second reference voltage Vr2, it indicates that the charging current is greater than the constant current.
- the second threshold voltage Vr122 is the constant voltage, that is, the second threshold voltage Vr122 refers to the voltage held on the battery during constant voltage charging.
- the second charging current Ii is zero when the battery voltage is greater than the second threshold voltage Vr122, and the second charging current Ii is not zero when the battery voltage is less than or equal to the second threshold voltage Vr122, that is, when entering After the constant voltage charging mode, the constant current control loop does not participate in charging control.
- the first sampling voltage Vs1 of the battery connection terminal BAT is sensed by the current sensor, and then the current sensing signal and the ramp compensation signal are calculated to output the ramp compensation signal, and the conversion reference voltage signal and the feedback input signal are calculated by logic operation.
- the output signal is compared with the ramp compensation signal, and the feedback output signal is output to the feedback control terminal Cfb of the control circuit to complete the ramp compensation and signal feedback, and finally the step-down conversion driving signal is output; and the zero point detection is performed by a zero point detector.
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Abstract
一种充电与降压转换集成芯片,设有电压输入端、电池连接端、恒流充电电流设置和充电电流监测端、充电状态指示输出端、使能端、反馈端、转换端和接地端;所述充电与降压转换集成芯片包括充电模块和降压转换模块;充电模块包括电压采样电路、基准电压电路、充电电路与第一、第二运算放大电路;降压转换模块包括控制电路、斜波补偿电路、驱动器与第三运算放大电路;通过设置电压输入端、电池连接端、PROG端、充电状态指示输出端、使能端、反馈端、转换端和接地端,并将充电模块与降压转换模块相连接,实现了形成具有充电功能与降压转换功能的集成芯片的技术效果,集成芯片可适用于面积较小的电路板上,提高安装效率、降低芯片成本。
Description
本发明涉及电池充电与降压转换技术领域,尤其涉及一种充电与降压转换集成芯片。
充电芯片与降压转换芯片通常使用在可充电的电量检测电路中,使得充电与电量检测同时进行。
充电芯片一般采用内部PMOSFET架构,加上防倒充电路,所以不需要外部隔离二极管,热反馈可对充电电流进行自动调节,还带有防反接保护功能。充电芯片具有电池温度检测、欠压闭锁、自动再充电和指示充电与结束状态的功能。
降压转换芯片具有强带载能力、高频同步降压的特点,支持Li+/Li聚合物电池,多个碱性/镍氢电池,USB和其他类型电源应用。降压转换芯片采用恒频电流型PWM控制模式使其具有较好的稳定性和瞬态特性,工作静态电流极低。
将两个单独的充电芯片与降压转换芯片安装在可充电的电量检测电路板上,可能因安装面积过大而难以实现电池的电量检测电路板制作,尤其是七号电池的电量检测电路板更加难以制备完成。并且使用两个单独的充电芯片与降压转换芯片也将出现电路板制备工序复杂,生产成本提高的问题。
发明内容
本发明针对上述现有技术的不足而提供一种充电与降压转换集成芯片,解决了通过改进充电模块与降压转换模块的电路连接结构形成具有充电功能与降压转换功能的集成芯片的技术问题。
本发明为解决上述问题所采用的技术方案为:
本发明提供一种充电与降压转换集成芯片,设有电压输入端、电池连接端、恒流充电电流设置和充电电流监测端、充电状态指示输出端、使能端、反馈端、转换端和接地端;所述充电与降压转换集成芯片包括充电模块和降压转换模块;
充电模块包括电压采样电路、基准电压电路、充电电路与第一、第二运算放大电路;电压采样电路连接所述电压输入端,并设有与电池电压相关的第一采样电压输出端和与充电电流相关的第二采样电压输出端,基准电压电路设有恒压基准电压输出端、恒流基准电压输出端与转换基准电压输出端,充电电路设有恒压充电电流输入端、恒流充电电流输入端和充电电压输出端;第一采样电压输出端与恒压基准电压输出端连接第一运算放大电路的输入端,其输出端连接恒压充电电流输入端;第二采样电压输出端与恒流基准电压输出端连接第二运算放大电路的输入端,其输出端连接恒流充电电流输入端;充电电压输出端连接电压采样电路的采样电压输入端,所述第二采样电压输出端连接所述电池连接端;第二采样电压输出端还连接所述恒流充电电流设置和充电电流监测端,所述充电状态指示输出端连接第一运算放大电路的充电状态运算输出端;
降压转换模块包括控制电路、斜波补偿电路、驱动器与第三运算放大电路;控制电路设有使能控制端、反馈控制端和转换输出端,使能控制端连接所述使能端;反馈控制端连接第三运算放大电路的输出端,第三运算放大电路的第一级输入端连接所述转换基准电压输出端和所述反馈端,其第二级输入端连接斜波补偿电路的斜波补偿输出端,斜波补偿输入端与所述电池连接端连接运算器;转换输出端连接驱动器的驱动输入端,驱动输出端连接所述转换端。
进一步地,所述电压采样电路还设有第一电子放大器、第一MOS管、第二MOS管、第三MOS管;第一MOS管和第二MOS管的漏极连接所述电压输入端,第一MOS管和第二MOS管的栅极为采样电压输入端,与所述充电电压输出端连接,第一MOS管的源极连接第三MOS管的漏极,第三MOS管的源极连接所述恒流充电电流设置和充电电流监测端;第三MOS管的栅极连接所述第一电子放大器的输出端,第一电子放大器的正相输入端和反相输入端分别连接第一MOS管和第二MOS管的源极,第二MOS管的源极还连接所述电池连接端。
进一步地,第一运算放大电路包括第一比较器、第二比较器和多路复用器,第二运算放大电路包括第三比较器;
所述基准电压电路的恒压基准电压输出端包括电量充满基准电压输出端和恢复充电基准电压输出端,电量充满基准电压输出端和第一采样电压输出端分别连接第一比较器的反相输入端和正相输入端,第一比较器的输出端连接多路复用器的第一输入端,多路复用器的第二输入端连接所述恢复充电基准电压输 出端,多路复用器的输出端连接第二比较器的正相输入端,第二比较器的反相输入端连接所述恒流充电电流设置和充电电流监测端,第二比较器的输出端连接所述恒压充电电流输入端;
所述基准电压电路的恒流基准电压输出端连接第三比较器的正相输入端,第三比较器的反相输入端连接所述恒流充电电流设置和充电电流监测端,第三比较器的输出端连接所述恒流充电电流输入端。
更进一步地,所述第一运算放大电路的充电状态运算输出端为第一比较器的输出端。
进一步地,所述充电电路连接温度控制器。
进一步地,所述第三运算放大电路包括第二电子放大器和第四比较器,第二电子放大器的正相输入端和反相输入端分别连接所述反馈端和所述转换基准电压输出端,第二电子放大器的输出端连接第四比较器的正相输入端,第四比较器的反相输入端连接所述斜波补偿输出端,第四比较器的输出端连接所述反馈控制端。
进一步地,电池连接端连接电流传感器后与斜波补偿输入端连接运算器。
进一步地,斜波补偿电路连接振荡器,振荡器连接控制电路的振荡输入端。
进一步地,驱动器的驱动输出端分别连接第四MOS管和第五MOS管的栅极,第四MOS管的漏极连接所述电池连接端,第五MOS管的源极接地,第四MOS管的源极与第五MOS管的漏极均连接所述转换端。
进一步地,控制电路的零点检测控制端与转换端之间还连接零点检测器。
本发明所提供的充电与降压转换集成芯片通过设置电压输入端、电池连接端、恒流充电电流设置和充电电流监测端、充电状态指示输出端、使能端、反馈端、转换端和接地端,并且将充电模块与降压转换模块相连接,实现了形成具有充电功能与降压转换功能的集成芯片的技术效果,集成芯片可适用于面积较小的电路板上,提高安装效率、降低芯片成本。
图1是现有的充电芯片的引脚图;
图2是现有的降压转换集成芯片的引脚图;
图3是本发明充电与降压转换集成芯片的引脚图;
图4是本发明充电与降压转换集成芯片的电路结构示意图。
图5-1、5-2是本发明充电与降压转换集成芯片的恒压、恒流充电波形图;
图6是本发明充电与降压转换集成芯片的安装示意图。
下面结合附图具体阐明本发明的实施方式,附图仅供参考和说明使用,不构成对本发明专利保护范围的限制。
如图1所示,现有的充电芯片(型号为ME4054)具有电压输入端VCC、电池连接端BAT、恒流充电电流设置和充电电流监测端PROG、充电状态指示输出端CHRG、接地端GND五个引脚。
如图2所示,现有的降压转换芯片(型号为ME3104)具有电压输入端VIN、使能端EN、反馈端FB、转换端SW四个引脚端。
如图3所示,本实施例提供一种充电与降压转换集成芯片U1,设有电压输入端Vin、电池连接端BAT、恒流充电电流设置和充电电流监测端PROG、充电状态指示输出端CHRG、使能端EN、反馈端FB、转换端SW和接地端GND八个引脚;所述充电与降压转换集成芯片包括充电模块和降压转换模块;
如图4所示,充电模块包括电压采样电路、基准电压电路、充电电路与第一、第二运算放大电路;电压采样电路连接所述电压输入端Vin,并设有与电池电压相关的第一采样电压输出端Vs1和与充电电流相关的第二采样电压输出端Vs2,基准电压电路设有恒压基准电压输出端Vr1、恒流基准电压输出端Vr2与转换基准电压输出端Vsw,充电电路设有恒压充电电流输入端Iv、恒流充电电流输入端Ii和充电电压输出端Vo;第一采样电压输出端Vs1与恒压基准电压输出端Vr1连接第一运算放大电路的输入端,其输出端连接恒压充电电流输入端Iv;第二采样电压输出端Vs2与恒流基准电压输出端Vr2连接第二运算放大电路的输入端,其输出端连接恒流充电电流输入端Ii;充电电压输出端Vo连接电压采样电路的采样电压输入端,所述第二采样电压输出端Vs2连接所述电池连接端BAT;第二采样电压输出端Vs2还连接所述恒流充电电流设置和充电电流监测端PROG,所述充电状态指示输出端CHRG连接第一运算放大电路的充电状态运算输出端Vc;
如图4所示,降压转换模块包括控制电路、斜波补偿电路、驱动器与第三运算放大电路;控制电路设有使能控制端Cen、反馈控制端Cfb和转换输出端Csw,使能控制端Cen连接所述使能端EN;反馈控制端Cfb连接第三运算放大 电路的输出端,第三运算放大电路的第一级输入端连接所述转换基准电压输出端Vsw和所述反馈端FB,其第二级输入端连接斜波补偿电路的斜波补偿输出端Vsco,斜波补偿输入端Vsci与所述电池连接端BAT连接运算器;转换输出端SW连接驱动器的驱动输入端,驱动输出端连接所述转换端SW。
在本实施例中,所述电压采样电路还设有第一电子放大器EA1、第一MOS管Q1、第二MOS管Q2、第三MOS管Q3;第一MOS管Q1和第二MOS管Q2的漏极连接所述电压输入端Vin,第一MOS管Q1和第二MOS管Q2的栅极为采样电压输入端,与所述充电电压输出端Vo连接,第一MOS管Q1的源极连接第三MOS管Q3的漏极,第三MOS管Q3的源极连接所述恒流充电电流设置和充电电流监测端PROG;第三MOS管Q3的栅极连接所述第一电子放大器EA1的输出端,第一电子放大器EA1的正相输入端和反相输入端分别连接第一MOS管Q1和第二MOS管Q2的源极,第二MOS管Q2的源极还连接所述电池连接端BAT。
在本实施例中,第一运算放大电路包括第一比较器COMP1、第二比较器COMP2和多路复用器MUX,第二运算放大电路包括第三比较器COMP3;
所述基准电压电路的恒压基准电压输出端Vr1包括电量充满基准电压输出端Vr11和恢复充电基准电压输出端Vr12,电量充满基准电压输出端Vr11和第一采样电压输出端Vs1分别连接第一比较器COMP1的反相输入端和正相输入端,第一比较器COMP1的输出端连接多路复用器MUX的第一输入端,多路复用器MUX的第二输入端连接所述恢复充电基准电压输出端Vr12,多路复用器MUX的输出端连接第二比较器COMP2的正相输入端,第二比较器COMP2的反相输入端连接所述恒流充电电流设置和充电电流监测端PROG,第二比较器COMP2的输出端连接所述恒压充电电流输入端Iv;
所述基准电压电路的恒流基准电压输出端Vr2连接第三比较器COMP3的正相输入端,第三比较器COMP3的反相输入端连接所述恒流充电电流设置和充电电流监测端PROG,第三比较器COMP3的输出端连接所述恒流充电电流输入端Ii。
在本实施例中,所述第一运算放大电路的充电状态运算输出端Vc为第一比较器COMP1的输出端。
在本实施例中,所述充电电路连接温度控制器。
在本实施例中,所述第三运算放大电路包括第二电子放大器EA2和第四比 较器COMP4,第二电子放大器EA2的正相输入端和反相输入端分别连接所述反馈端FB和所述转换基准电压输出端Vsw,第二电子放大器EA2的输出端连接第四比较器COMP4的正相输入端,第四比较器COMP4的反相输入端连接所述斜波补偿输出端Vsco,第四比较器COMP4的输出端连接所述反馈控制端Cfb。
在本实施例中,电池连接端BAT连接电流传感器后与斜波补偿输入端Vsci连接运算器。
在本实施例中,斜波补偿电路连接振荡器,振荡器连接控制电路的振荡输入端Cosc。所述控制电路还连接一次性可编程单片机OTP。
在本实施例中,驱动器的驱动输出端分别连接第四MOS管Q4和第五MOS管Q5的栅极,第四MOS管Q4的漏极连接所述电池连接端BAT,第五MOS管Q5的源极接地,第四MOS管Q4的源极与第五MOS管Q5的漏极均连接所述转换端SW。
如图5-1、5-2所示,本发明充电与降压转换集成芯片的工作过程为:充电模块的充电控制电路包括恒压控制环路和恒流控制环路;
如图5-1所示,所述恒压控制环路适于对第一采样电压Vs1和第一基准电压(电量充满基准电压)Vr11进行放大处理以产生第一充电电流Iv,所述第一采样电压Vs1与电池电压相关,所述第一充电电流Iv在所述电池电压小于第一阈值电压(恢复充电基准电压)Vr121时为零。
所述第一采样电压Vs1是对所述电池电压进行采样获得的电压,即第一采样电压Vs1跟随电池电压变化。所述第一基准电压Vr1是根据恒定电压设置的参考电压,恒定电压是指恒压充电时电池上保持的电压。所述恒定电压可以根据充电电池的电池容量进行设置,例如,手机充电电池的恒定电压通常设置为4.2V。
当所述第一采样电压Vs1小于所述第一基准电压Vr11时,表示电池电压小于所述恒定电压;当所述第一采样电压Vs1等于所述第一基准电压Vr11时,表示电池电压与所述恒定电压相等;当所述第一采样电压Vs1大于所述第一基准电压Vr11时,表示电池电压大于所述恒定电压。
所述第一阈值电压Vr121小于所述恒定电压。在电池电压小于所述第一阈值电压Vr121时所述第一充电电流Iv为零,在电池电压大于或等于所述第一阈值电压Vr121时所述第一充电电流Iv不为零,即在进入恒压充电模式前,所述恒压控制环路就参与充电控制。所述第一阈值电压Vr121可以根据实际需求进 行设置,例如,当所述恒定电压为4.2V时,所述第一阈值电压Vr121可以设置为4.10~4.15V,通过调整所述恒压控制环路的增益可以改变所述第一阈值电压Vr121。
如图5-2所示,所述恒流控制环路适于对第二采样电压Vs2和第二基准电压Vr2进行误差放大处理以产生第二充电电流Ii,所述第二采样电压Vs2与充电电流相关,所述第二充电电流Ii在所述电池电压大于第二阈值电压(恢复充电基准电压)Vr122时为零,所述第二阈值电压Vr122大于所述第一阈值电压Vr121。
所述第二采样电压Vs2是对所述充电电流进行采样获得的电压,即所述第二采样电压Vs2跟随所述充电电流的变化。所述第二基准电压Vr2是根据恒定电流设置的参考电压,所述恒定电流是指恒流充电时保持的充电电流。
当所述第二采样电压Vs2小于所述第二基准电压Vr2时,表示充电电流小于所述恒定电流;当所述第二采样电压Vs2等于所述第二基准电压Vr2时,表示充电电流与所述恒定电流相等;当所述第二采样电压Vs2大于所述第二基准电压Vr2时,表示充电电流大于所述恒定电流。
所述第二阈值电压Vr122为所述恒定电压,即所述第二阈值电压Vr122是指恒压充电时电池上保持的电压。在电池电压大于所述第二阈值电压Vr122时所述第二充电电流Ii为零,在电池电压小于或等于所述第二阈值电压Vr122时所述第二充电电流Ii不为零,即在进入恒压充电模式后,所述恒流控制环路不参与充电控制。
在降压转换模块中,电池连接端BAT的第一采样电压Vs1经电流传感器感应后将电流感应信号与斜波补偿信号运算输出斜波补偿信号,转换基准电压信号与反馈输入信号经逻辑运算后输出的信号与斜波补偿信号进行比较运算,输出反馈输出信号到控制电路的反馈控制端Cfb,完成斜波补偿与信号反馈,最后输出降压转换驱动信号;并通过零点检测器进行零点检测。
上述实施例为本发明较佳的实施方式,但本发明的实施方式并不受上述实施例的限制,其他的任何未背离本发明的精神实质与原理下所作的改变、修饰、替代、组合、简化,均应为等效的置换方式,都包含在本发明的保护范围之内。
Claims (10)
- 一种充电与降压转换集成芯片,其特征在于:设有电压输入端、电池连接端、恒流充电电流设置和充电电流监测端、充电状态指示输出端、使能端、反馈端、转换端和接地端;所述充电与降压转换集成芯片包括充电模块和降压转换模块;充电模块包括电压采样电路、基准电压电路、充电电路与第一、第二运算放大电路;电压采样电路连接所述电压输入端,并设有与电池电压相关的第一采样电压输出端和与充电电流相关的第二采样电压输出端,基准电压电路设有恒压基准电压输出端、恒流基准电压输出端与转换基准电压输出端,充电电路设有恒压充电电流输入端、恒流充电电流输入端和充电电压输出端;第一采样电压输出端与恒压基准电压输出端连接第一运算放大电路的输入端,其输出端连接恒压充电电流输入端;第二采样电压输出端与恒流基准电压输出端连接第二运算放大电路的输入端,其输出端连接恒流充电电流输入端;充电电压输出端连接电压采样电路的采样电压输入端,所述第二采样电压输出端连接所述电池连接端;第二采样电压输出端还连接所述恒流充电电流设置和充电电流监测端,所述充电状态指示输出端连接第一运算放大电路的充电状态运算输出端;降压转换模块包括控制电路、斜波补偿电路、驱动器与第三运算放大电路;控制电路设有使能控制端、反馈控制端和转换输出端,使能控制端连接所述使能端;反馈控制端连接第三运算放大电路的输出端,第三运算放大电路的第一级输入端连接所述转换基准电压输出端和所述反馈端,其第二级输入端连接斜波补偿电路的斜波补偿输出端,斜波补偿输入端与所述电池连接端连接运算器;转换输出端连接驱动器的驱动输入端,驱动输出端连接所述转换端。
- 根据权利要求1所述的充电与降压转换集成芯片,其特征在于:所述电压采样电路还设有第一电子放大器、第一MOS管、第二MOS管、第三MOS管;第一MOS管和第二MOS管的漏极连接所述电压输入端,第一MOS管和第二MOS管的栅极为采样电压输入端,与所述充电电压输出端连接,第一MOS管的源极连接第三MOS管的漏极,第三MOS管的源极连接所述恒流充电电流设置和充电电流监测端;第三MOS管的栅极连接所述第一电子放大器的输出端,第一电子放大器的正相输入端和反相输入端分别连接第一MOS管和第二MOS管的源极,第二MOS管的源极还连接所述电池连接端。
- 根据权利要求1所述的充电与降压转换集成芯片,其特征在于:第一运算放大电路包括第一比较器、第二比较器和多路复用器,第二运算放大电路包括第三比较器;所述基准电压电路的恒压基准电压输出端包括电量充满基准电压输出端和恢复充电基准电压输出端,电量充满基准电压输出端和第一采样电压输出端分别连接第一比较器的反相输入端和正相输入端,第一比较器的输出端连接多路复用器的第一输入端,多路复用器的第二输入端连接所述恢复充电基准电压输出端,多路复用器的输出端连接第二比较器的正相输入端,第二比较器的反相输入端连接所述恒流充电电流设置和充电电流监测端,第二比较器的输出端连接所述恒压充电电流输入端;所述基准电压电路的恒流基准电压输出端连接第三比较器的正相输入端,第三比较器的反相输入端连接所述恒流充电电流设置和充电电流监测端,第三比较器的输出端连接所述恒流充电电流输入端。
- 根据权利要求3所述的充电与降压转换集成芯片,其特征在于:所述第一运算放大电路的充电状态运算输出端为第一比较器的输出端。
- 根据权利要求1所述的充电与降压转换集成芯片,其特征在于:所述充电电路连接温度控制器。
- 根据权利要求1所述的充电与降压转换集成芯片,其特征在于:所述第三运算放大电路包括第二电子放大器和第四比较器,第二电子放大器的正相输入端和反相输入端分别连接所述反馈端和所述转换基准电压输出端,第二电子放大器的输出端连接第四比较器的正相输入端,第四比较器的反相输入端连接所述斜波补偿输出端,第四比较器的输出端连接所述反馈控制端。
- 根据权利要求1所述的充电与降压转换集成芯片,其特征在于:电池连接端连接电流传感器后与斜波补偿输入端连接运算器。
- 根据权利要求1所述的充电与降压转换集成芯片,其特征在于:斜波补偿电路连接振荡器,振荡器连接控制电路的振荡输入端。
- 根据权利要求1所述的充电与降压转换集成芯片,其特征在于:驱动器的驱动输出端分别连接第四MOS管和第五MOS管的栅极,第四MOS管的漏极连接所述电池连接端,第五MOS管的源极接地,第四MOS管的源极与第五MOS管的漏极均连接所述转换端。
- 根据权利要求1所述的充电与降压转换集成芯片,其特征在于:控制电路的零点检测控制端与转换端之间还连接零点检测器。
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