WO2020107470A1 - 平衡电路及计算机 - Google Patents
平衡电路及计算机 Download PDFInfo
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- WO2020107470A1 WO2020107470A1 PCT/CN2018/118756 CN2018118756W WO2020107470A1 WO 2020107470 A1 WO2020107470 A1 WO 2020107470A1 CN 2018118756 W CN2018118756 W CN 2018118756W WO 2020107470 A1 WO2020107470 A1 WO 2020107470A1
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
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- the present disclosure relates to the field of circuits, for example, to a balanced circuit and a computer.
- multi-core architecture processor chips have become a technical trend in the field of high-performance computing. Setting multiple cores and hardware threads on each chip can improve the processing power of the computer. Compared with single-core processors, multi-core processors face huge challenges in terms of architecture, software, power consumption, and security design. , But also contains great potential. By using more cores, hardware threads, and higher memory, applications should perform better and exhibit better scalability, and be able to meet growing performance and efficiency requirements.
- the multiple cores When multiple cores are installed in a chip, the multiple cores are usually connected in series. In this connection mode, the voltage imbalance of each core is prone to occur, for example, the voltage across both cores is high and the voltage across both cores is low. In this case, the computing power of the core will be low, and it cannot meet the needs of users.
- An embodiment of the present disclosure provides a balanced circuit, including:
- a calculation module includes N series calculation units;
- N balancing modules one balancing module and one computing unit connected in parallel are used to balance the voltage between the computing units;
- N is an integer greater than or equal to 2.
- the balanced circuit provided in this embodiment further includes: a plurality of the calculation modules;
- One of the balance modules is connected in parallel with one of the calculation units in each of the calculation modules.
- the calculation module is a chip; the calculation unit is an inner core provided in the chip.
- the balance module is a diode.
- the conducting voltage of the diode is the same as the working voltage of the computing unit connected in parallel therewith.
- the diode when the voltage difference between the calculation units is greater than the turn-on voltage of the diode, the diode is turned on.
- the diode is a Schottky diode.
- N auxiliary balancing modules N auxiliary balancing modules
- One of the auxiliary balancing modules is connected in parallel with one of the balancing modules.
- N is equal to 4.
- An embodiment of the present disclosure also provides a computer, including any of the above-mentioned balanced circuits.
- the balance circuit and computer provided by the present disclosure include: a calculation module including N series calculation units in the calculation module; N balance modules, one balance module and one calculation unit connected in parallel, for balancing the voltage between the calculation units; , N is an integer greater than or equal to 2.
- the balancing circuit and the computer provided in this embodiment are provided with a balancing module connected in parallel with each computing unit.
- the balancing module can balance the pressure difference across each computing unit, thereby balancing the pressure difference between the computing units. The problem that the pressure difference between the two ends of the computing unit is too high or too low causes the computing power of the computing unit to decrease.
- FIG. 1 is a structural diagram of a balanced circuit shown in an exemplary embodiment of the present disclosure
- FIG. 2 is a structural diagram of a balanced circuit shown in another exemplary embodiment of the present disclosure.
- FIG. 2A is a schematic diagram of a voltage detection result of a calculation unit that does not use a Schottky diode in parallel according to a specific embodiment
- FIG. 2B is a schematic diagram of the voltage detection result of the calculation unit after the use of Tj diodes in parallel is shown in a specific embodiment.
- FIG. 1 is a structural diagram of a balanced circuit shown in an exemplary embodiment of the present disclosure.
- the balanced circuit provided in this embodiment includes a calculation module 11, and the calculation module 11 includes N series calculation units 111 connected in series.
- the balancing circuit provided in this embodiment can be applied to electronic devices with computing functions, such as computers.
- the computing module is a component in an electronic device and provides a computing function.
- the computing module 11 may be a processor in the electronic device.
- multiple computing units 111 can be integrated in the computing module 11, each computing unit can independently perform a computing task, and the computing module 11 provided with multiple computing units 111 can The processing capability of the electronic device is improved, and the multiple computing units 111 can also execute computing tasks in parallel, thereby further improving the processing capability of the electronic device.
- the calculation unit 111 may be a core provided in the processor.
- N calculation units 111 may be set in the calculation module 11, N may be an integer greater than or equal to 2, that is, a multi-core processor is set in the electronic device, thereby improving the computing capability of the electronic device.
- the N computing units 111 may be connected in series. If the voltage of each computing unit 111 should be V, a voltage of N ⁇ V can be added across the computing module 11. When the voltage between the computing units 111 is balanced, the voltage across each computing unit 111 should be V.
- N balancing modules 12 are further provided, and one balancing module 12 is connected in parallel with one computing unit 111 to balance the voltage between the computing units.
- the calculation module 11 is provided with four calculation units 111. At a certain moment, the voltage of the first calculation unit 111 is too high, the voltage of the third calculation unit 111 is too high, and the voltage of the other two calculation units 111 is too high low.
- the balancing module 12 connected in parallel with the first computing unit 111 can introduce electrical energy into the second computing unit 111, thereby reducing the voltage across the first computing unit 111 and increasing the voltage across the second computing unit 111. If the two ends of each computing unit 111 are normal, the balancing module 12 connected in parallel will not introduce electrical energy to the next computing unit 111. If the electrical energy introduced by the first balancing module 12 is increased, the voltage across the second computing unit 111 If it becomes too high, the balance module 12 connected in parallel will introduce electrical energy into the third calculation unit 111. Similarly, the balance module 12 connected in parallel with the third calculation unit 111 and the fourth calculation unit 111 will also The two calculation units adjust so that the voltage across each calculation unit 111 is balanced.
- the balance module 12 may be a diode.
- the anode of the diode can be connected to the anode of the calculation unit 111, and the cathode of the diode can be connected to the cathode of the calculation unit 111, so that the diode and the calculation unit 111 are connected in parallel.
- the voltage across the computing unit 111 is higher than the turn-on voltage of the diode, the diode turns on, and a part of the electrical energy can be introduced into the next computing unit 111, thereby reducing the voltage across the computing unit 111.
- the conduction voltage of the diode can be set to be consistent with the normal operating voltage of the calculation unit 111, so that when the voltage across the calculation unit 111 is higher than the normal voltage, the diode connected in parallel can be turned on.
- the balancing circuit provided in this embodiment includes: a computing module, which includes N computing units connected in series; N balancing modules, one balancing module and one computing unit connected in parallel to balance the voltage between the computing units; wherein, N is an integer greater than or equal to 2.
- the balancing circuit provided in this embodiment is provided with a balancing module connected in parallel with each computing unit.
- the balancing module can balance the pressure difference across each computing unit, so that the pressure difference between each computing unit is balanced. The problem that the pressure difference between the two ends is too high or too low causes the calculation capacity of the calculation unit to decrease.
- Fig. 2 is a structural diagram of a balanced circuit shown in another exemplary embodiment of the present disclosure.
- the balanced circuit provided in this embodiment includes: a plurality of calculation modules 11.
- electronic devices are required to have powerful computing functions, and a single computing module 11 can no longer meet the needs of users.
- multiple computing modules 11 can be provided to provide faster computing speed.
- the electronic device needs to determine a value that meets the requirements, and when the value is hashed, the result can meet the preset requirements. Due to the characteristics of hash calculation, electronic devices need to randomly select a large number of values for hash calculation, so as to find out the values that meet the requirements. Then in this calculation process, the electronic device needs to have strong computing power.
- each calculation module 11 may be connected in parallel.
- each calculation module 11 there may be a problem that the voltage of the terminal of the calculation unit 111 is unbalanced.
- a plurality of balance modules 12 may be provided so that each calculation unit 111 is connected in parallel with one balance module 12.
- the voltage domain can also be divided according to the setting order of the calculation unit 111, for example, the first calculation unit 111 in each calculation module 11 constitutes the first voltage domain, and the second calculation unit in each calculation module 11 111 constitutes the second voltage domain.
- N calculation units 111 are provided in the calculation module 11, N voltage domains can be formed.
- N balancing modules 12 may be provided, and each balancing module 12 is connected in parallel with a voltage domain, that is, in parallel with one computing unit 111 in each computing module 11, thereby reducing the number of balancing modules 12 installed and reducing costs.
- 10 calculation modules 11 can be provided in the balanced circuit.
- the calculation module 11 is a chip; the calculation unit 111 is a core provided in the chip.
- the calculation module 11 may be a processor chip provided in the electronic device, and each processor chip can perform calculation independently, and each processor chip may also perform data processing in series, for example, the first processor chip The result of processing the data can be used as input to another processor chip.
- calculation unit 111 provided in the calculation module 11 may be a core provided in the processor chip.
- Each core is a complete calculation engine that can receive control signals and command signals sent by the bus to perform calculations.
- the balancing module 12 is a diode, and the diode is turned on when the voltage difference between the calculation units 111 is greater than the turn-on voltage of the diode.
- the calculation unit 111 and the diode may be connected according to the conduction direction of the diode, the anode of the diode may be connected to the anode of the calculation unit 111, and the cathode of the diode may be connected to the cathode of the calculation unit 111. That is, the flow direction of the current in the calculation unit 111 coincides with the conduction direction of the diode.
- the terminal voltage of the calculation unit 111 is equal to the terminal voltage of the diode. When the terminal voltage of the calculation unit 111 is too high, the turn-on voltage of the diode is satisfied, so that the diode can be turned on.
- the conduction voltage of the diode is the same as the working voltage of the computing unit connected in parallel with it.
- the working voltage of the computing unit here refers to the voltage under normal conditions when the computing unit is in operation, and may also be regarded as the design voltage and rated voltage of the computing unit.
- the voltage loaded on the calculation unit is higher than the normal working voltage value, the voltage loaded on the diode connected in parallel will also be higher than the turn-on voltage of the diode, therefore, the diode will be turned on.
- the diode is a Schottky diode.
- the Schottky diode has the characteristics of low turn-on voltage and fast response. It can quickly turn on when the terminal voltage of the computing unit 111 is too high, thereby introducing electric energy to the next computing unit 111, so that the computing unit 111 can maintain a high computing power .
- the balancing circuit provided in this embodiment may further include N auxiliary balancing modules 13.
- N auxiliary balances can also be set in the balance circuit Module 13, an auxiliary balancing module 13 and a balancing module 12 are connected in parallel.
- auxiliary balancing module 13 and the balancing module 12 may be the same component and have the same function. Therefore, after the auxiliary balancing module 13 is provided, the auxiliary balancing module 13 can share the electric energy passing through the balancing module 12, thereby reducing the pressure of the balancing module 12.
- one or more auxiliary balancing modules can be arranged in parallel with one balancing module to share the electric energy passing through the balancing module.
- multiple auxiliary balancing modules and balancing modules connected in parallel may be replaced with one high-power device, for example, high-power diodes may be used to replace multiple parallel low-power diodes.
- each calculation module 11 may be provided in each calculation module 11.
- the number of balancing modules 12 is also 4. If an auxiliary balancing module 13 is provided, the number of auxiliary balancing modules 13 is also 4.
- the calculation module 11 is powered by 1.8V.
- Four calculation units 111 are provided in the calculation module 11, and the pressure difference of each calculation unit 111 should be 0.45V.
- the voltage of the calculation unit 111 should be 1.8, 1.35, 0.9, 0.45, but in reality, after detecting the current passing through each calculation unit 111, the voltage is as shown in FIG. 2A, showing that there is a voltage between the calculation units 111 Unbalanced situation.
- a voltage of 1.8 V is used to power the calculation module 11.
- the detected voltage is as shown in FIG. 2B, and the voltage between the calculation units 111 tends to be balanced.
- the balance circuit includes: a calculation module, the calculation module includes N series calculation units; N balance modules, a balance module and a calculation unit are connected in parallel to balance the voltage between the calculation units; wherein, N is greater than An integer equal to 2.
- the balancing circuit provided in this embodiment is provided with a balancing module connected in parallel with each computing unit. The balancing module can balance the pressure difference across each computing unit, so that the pressure difference between each computing unit is balanced. The problem that the pressure difference between the two ends is too high or too low causes the calculation capacity of the calculation unit to decrease.
- the balanced circuit and the computer disclosed in the embodiments of the present disclosure can solve the problem that the computing power of the computing unit is reduced due to the high or low pressure difference across the computing unit after the balancing circuit connected in parallel with the computing unit is provided, which can be improved The computing speed of the computer, thereby increasing the computing power of the computer.
- the technical solutions of the embodiments of the present disclosure may be embodied in the form of software products, which are stored in a storage medium and include one or more instructions to make a computer device (which may be a personal computer, server, or network) Equipment, etc.) to perform all or part of the steps of the method described in the embodiments of the present disclosure.
- the aforementioned storage medium may be a non-transitory storage medium, including: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), magnetic disk or optical disk, etc.
- a medium that can store program codes may also be a transient storage medium.
- first, second, etc. may be used in this application to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another.
- the first element can be called the second element, and likewise, the second element can be called the first element, as long as all occurrences of the "first element” are consistently renamed and all occurrences of The “second component” can be renamed consistently.
- the first element and the second element are both elements, but they may not be the same element.
- the various aspects, implementations, implementations or features in the described embodiments can be used alone or in any combination.
- Various aspects in the described embodiments may be implemented by software, hardware, or a combination of software and hardware.
- the described embodiments may also be embodied by a computer-readable medium that stores computer-readable code including instructions executable by at least one computing device.
- the computer-readable medium can be associated with any data storage device capable of storing data, which can be read by a computer system.
- Computer-readable media used for examples may include read-only memory, random access memory, CD-ROM, HDD, DVD, magnetic tape, optical data storage devices, and the like.
- the computer-readable medium may also be distributed in computer systems connected through a network, so that computer-readable codes can be stored and executed in a distributed manner.
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Abstract
一种平衡电路及计算机，包括：计算模块（11），计算模块（11）中包括N个串联的计算单元（111）；N个平衡模块（12），一个平衡模块（12）与一个计算单元（111）并联，用于平衡计算单元（111）之间的电压；其中，N为大于等于2的整数。该平衡电路及计算机中，设置有与每个计算单元（111）都并联的平衡模块（12），通过平衡模块（12）能够平衡各个计算单元（111）两端的压差，从而使得各个计算单元（111）间的压差平衡，解决由于计算单元（111）两端的压差过高或过低导致计算单元计算能力下降的问题。
Description
本公开涉及电路领域，例如涉及一种平衡电路及计算机。
随着芯片集成密度不断增长，计算机硬件正在蓬勃发展，多核架构处理器芯片已是高性能计算领域的技术趋势。在在每个芯片上设置多个核和硬件线程能够提高计算机的处理能力，与单核处理器相比，多核处理器在体系结构、软件、功耗和安全性设计等方面面临着巨大的挑战，但也蕴含着巨大的潜能。通过使用更多核、硬件线程、更高的内存，应用程序应该会更好地执行和表现出更出色地伸缩性，并能满足不断增长的性能和效率需求。
在一个芯片中设置多个核的时候，通常采用串联的方式连接多个核。这种连接方式下，容易出现各个核电压不平衡的问题，例如有的核两端电压高，有的核两端电压低。在这种情况下，会导致核的算力低下，无法满足用户需求。
因此，现有技术中亟需一种解决多核串联时，由于核两端电压不均衡导致的算力低下的问题。
发明内容
本公开实施例提供了一种平衡电路，包括：
计算模块，所述计算模块中包括N个串联的计算单元；
N个平衡模块，一个所述平衡模块与一个所述计算单元并联，用于平衡所述计算单元之间的电压；
其中，N为大于等于2的整数。
可选的，本实施例提供的平衡电路，还包括：多个所述计算模块；
一个所述平衡模块，与每个所述计算模块中的一个所述计算单元并联。
可选的，所述计算模块是芯片；所述计算单元是设置在所述芯片中的内 核。
可选的，所述平衡模块是二极管。
可选的，所述二极管的导通电压和与其并联的计算单元的工作电压相同。
可选的，所述计算单元之间的压差大于所述二极管的导通电压时，所述二极管导通。
可选的，所述二极管是肖特基二极管。
可选的，还包括：N个辅助平衡模块；
一个所述辅助平衡模块与一个所述平衡模块并联。
可选的，N等于4。
本公开实施例还提供了一种计算机，包含上述的任一种平衡电路。
本公开提供的平衡电路及计算机，包括：计算模块，计算模块中包括N个串联的计算单元；N个平衡模块，一个平衡模块与一个计算单元并联，用于平衡计算单元之间的电压；其中，N为大于等于2的整数。本实施例提供的平衡电路及计算机中，设置有与每个计算单元都并联的平衡模块，通过平衡模块能够平衡各个计算单元两端的压差，从而使得各个计算单元间的压差平衡，解决由于计算单元两端的压差过高或过低导致计算单元计算能力下降的问题。
一个或多个实施例通过与之对应的附图进行示例性说明，这些示例性说明和附图并不构成对实施例的限定，附图中具有相同参考数字标号的元件示为类似的元件，附图不构成比例限制，并且其中：
图1为本公开一示例性实施例示出的平衡电路的结构图；
图2为本公开另一示例性实施例示出的平衡电路的结构图；
图2A为一具体实施例示出的未采用肖特基二极管并联的计算单元电压检测结果示意图；
图2B为一具体实施例示出的采用特基二极管并联后的计算单元电压检 测结果示意图。
为了能够更加详尽地了解本公开实施例的特点与技术内容，下面结合附图对本公开实施例的实现进行详细阐述，所附附图仅供参考说明之用，并非用来限定本公开实施例。在以下的技术描述中，为方便解释起见，通过多个细节以提供对所披露实施例的充分理解。然而，在没有这些细节的情况下，一个或多个实施例仍然可以实施。在其它情况下，为简化附图，熟知的结构和装置可以简化展示。
图1为本公开一示例性实施例示出的平衡电路的结构图。
如图1所示，本实施例提供的平衡电路包括：计算模块11，计算模块11中包括N个串联的计算单元111。
其中，本实施例提供的平衡电路可以应用在具备计算功能的电子设备中，例如计算机中。计算模块是电子设备中与提供计算功能的部件，例如，计算模块11可以是电子设备中的处理器。
具体的，随着芯片集成密度的不断增长，在计算模块11中可以集成多个计算单元111，每个计算单元都可以独立的执行计算任务，设置有多个计算单元111的计算模块11，能够提高电子设备的处理能力，而且多个计算单元111还能够并行的执行计算任务，从而进一步的提高电子设备的处理能力。
进一步的，当计算模块11是处理器时，计算单元111可以是设置在处理器中的核(core)。
实际应用时，在计算模块11中可以设置N个计算单元111，N可以是大于等于2的整数，也就是在电子设备中设置多核处理器，从而提高电子设备的计算能力。
其中，N个计算单元111可以串联连接。若每个计算单元111的电压应当为V，则可以在计算模块11两端加N×V大小的电压，在各个计算单元111之间的电压均衡时，每个计算单元111两端的电压应为V。
但是在有的计算单元111未开启时，会由于计算单元111的阻抗不同， 而导致各个计算单元111两端的压差不同，这会影响计算单元111的计算能力。
具体的，本实施例提供的方案中，还设置有N个平衡模块12，一个平衡模块12与一个计算单元111并联，用于平衡计算单元之间的电压。当计算单元111上的压差过大时，一部分电能可以通过平衡模块12流向下一个计算单元111，从而平衡各个计算单元111。例如，计算模块11中设置有4个计算单元111，在某一时刻，第一个计算单元111的电压过高，第三个计算单元111的电压过高，另外两个计算单元111的电压过低。则与第一个计算单元111并联的平衡模块12能够将电能引入第二个计算单元111，从而降低第一个计算单元111两端的电压、提高第二个计算单元111两端的电压，若第二个计算单元111两端单元正常，则与之并联的平衡模块12不会将电能引入下一个计算单元111，若增加了第一个平衡模块12引入的电能，第二个计算单元111两端的电压变的过高，则与之并联的平衡模块12会将电能引入第三个计算单元111，相似的，与第三个计算单元111和第四个计算单元111并联的平衡模块12，也会对这两个计算单元进行调节，从而使得各个计算单元111两端的电压均衡。
进一步的，平衡模块12可以是二极管。
实际应用时，可以将二极管的正极与计算单元111的正极连接，将二极管的负极与计算单元111的负极连接，从而使二极管与计算单元111并联。当计算单元111两端的电压高于二极管的导通电压后，二极管导通，可以将一部分电能引入下一个计算单元111，从而降低计算单元111两端的电压。
其中，可以将二极管的导通电压设置的与计算单元111的正常工作电压一致，从而在计算单元111两端电压高于正常电压时，与之并联的二极管能够导通。
本实施例提供的平衡电路，包括：计算模块，计算模块中包括N个串联的计算单元；N个平衡模块，一个平衡模块与一个计算单元并联，用于平衡计算单元之间的电压；其中，N为大于等于2的整数。本实施例提供的平衡电路中，设置有与每个计算单元都并联的平衡模块，通过平衡模块能够平衡各个计算单元两端的压差，从而使得各个计算单元间的压差平衡，解决由于 计算单元两端的压差过高或过低导致计算单元计算能力下降的问题。
图2为本公开另一示例性实施例示出的平衡电路的结构图。
如图2所示，在上述实施例的基础上，本实施例提供的平衡电路中，包括：多个计算模块11。
其中，在一些应用场景中，需要电子设备具备强大的计算功能，而单一的计算模块11已经不能满足用户的需求，此时，可以设置多个计算模块11，从而能够提供更快的计算速度。例如，电子设备应用于数字凭证的相关数据处理时，需要电子设备确定出满足要求的数值，对该数值进行哈希计算时，结果能够满足预设要求。由于哈希计算的特性，使得电子设备需要随机选择大量的数值进行哈希计算，从而找出符合要求的数值，那么在这一计算过程中，就需要电子设备具有强大的计算能力。
具体的，当电子设备中设置多个计算模块11时，这些计算模块11可以是并联的连接关系。在每个计算模块11中都可能存在计算单元111端电压不平衡的问题，可以设置多个平衡模块12，使每个计算单元111与一个平衡模块12并联。
进一步的，还可以按照计算单元111的设置顺序划分电压域，例如，每个计算模块11中的第一个计算单元111构成第一个电压域，每个计算模块11中的第二个计算单元111构成第二个电压域，若计算模块11中设置有N个计算单元111，则可以形成N个电压域。可以设置N个平衡模块12，每个平衡模块12与一个电压域并联，也就是与每个计算模块11中的一个计算单元111并联，从而减少平衡模块12的设置数量，降低成本。
实际应用时，平衡电路中可以设置10个计算模块11。
其中，计算模块11是芯片；所述计算单元111是设置在所述芯片中的内核。
具体的，计算模块11可以是设置在电子设备中的处理器芯片，每个处理器芯片都能够独立的进行计算，各个处理器芯片也可以串联的进行数据处理，例如，第一个处理器芯片对数据进行处理输出的结果可以作为另一个处理器芯片的输入。
进一步的，计算模块11中设置的计算单元111可以是处理器芯片中设置的内核(core)。每个内核都是一个完整的计算引擎，可以接收总线发送的控制信号、命令信号，从而执行计算。
实际应用时，平衡模块12是二极管，计算单元111之间的压差大于二极管的导通电压时，二极管导通。可以根据二极管的导通方向连接计算单元111与二极管，将二极管的正极与计算单元111的正极连接，将二极管的负极与计算单元111的负极连接。即计算单元111中电流的流向与二极管的导通方向一致。计算单元111的端电压与二极管的端电压相等，当计算单元111的端电压过高时，满足二极管的导通电压，从而使二极管导通能够导通。
二极管的导通电压和与其并联的计算单元的工作电压相同。此处的计算单元的工作电压是指计算单元在运行时，正常情况下的电压，也可以认为是该计算单元的设计电压、额定电压。当计算单元上加载的电压高出正常工作的电压值时，与之并联的二极管上加载的电压也会高于二极管的导通电压，因此，二极管将导通。
其中，二极管是肖特基二极管。肖特基二极管具有导通电压低反应快的特点，能够在计算单元111的端电压过高时迅速导通，从而将电能引入下一个计算单元111，使得计算单元111能够保持较高的计算能力。
具体的，本实施例提供的平衡电路中，还可以包括N个辅助平衡模块13。当计算模块11中的计算单元111间的电压不平衡严重时，与计算单元111并联的平衡模块12的负担也会比较重，在这种情况下，还可以在平衡电路中设置N个辅助平衡模块13，一个辅助平衡模块13与一个平衡模块12并联。
进一步的，辅助平衡模块13与平衡模块12可以是相同的部件，具有相同的功能。因此，设置了辅助平衡模块13后，可以由辅助平衡模块13分担平衡模块12中经过的电能，从而降低平衡模块12的压力。
进一步的，可以设置一个或多个辅助平衡模块与一个平衡模块并联，来分担经过平衡模块的电能。当然，一种实施方式中，可以将相互并联的多个辅助平衡模块和平衡模块用一个大功率器件来替代，例如可以用大功率二极管来代替多个并联的小功率二极管。
实际应用时，可以在每个计算模块11中设置4个计算单元111，相应的， 平衡模块12的数量也是4，若设置有辅助平衡模块13，则辅助平衡模块13的数量也是4。
对一计算模块11进行供电，采用1.8V对其进行供电，计算模块11内设置有4个计算单元111，每个计算单元111的压差应当为0.45V。正常情况下的计算单元111的电压应当是1.8、1.35、0.9、0.45，但实际情况下，检测到电流经过每个计算单元111后，电压如图2A所示，显示计算单元111间的压存在不平衡的情况。
采用本实施例设置的平衡电路后，再使用1.8V的电压对该计算模块11进行供电，检测的电压如图2B所示，各个计算单元111间的电压趋近于平衡。
本公开实施例还提供了一种计算机，包含上述任一种平衡电路装置。其中，平衡电路，包括：计算模块，计算模块中包括N个串联的计算单元；N个平衡模块，一个平衡模块与一个计算单元并联，用于平衡计算单元之间的电压；其中，N为大于等于2的整数。本实施例提供的平衡电路中，设置有与每个计算单元都并联的平衡模块，通过平衡模块能够平衡各个计算单元两端的压差，从而使得各个计算单元间的压差平衡，解决由于计算单元两端的压差过高或过低导致计算单元计算能力下降的问题。
本公开实施例所揭示的平衡电路及计算机，在设置了与计算单元并联的平衡电路之后，可以解决由于计算单元两端的压差过高或过低导致计算单元计算能力下降的问题，因此可以提高计算机的计算速度，从而提高计算机的算力。
本公开实施例的技术方案可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括一个或多个指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本公开实施例所述方法的全部或部分步骤。而前述的存储介质可以是非暂态存储介质，包括：U盘、移动硬盘、只读存储器(ROM，Read-Only Memory)、随机存取存储器(RAM，Random Access Memory)、磁碟或者光盘等多种可以存储程序代码的介质，也可以是暂态存储介质。
当用于本申请中时，虽然术语“第一”、“第二”等可能会在本申请中使用以描述各元件，但这些元件不应受到这些术语的限制。这些术语仅用于将 一个元件与另一个元件区别开。比如，在不改变描述的含义的情况下，第一元件可以叫做第二元件，并且同样第，第二元件可以叫做第一元件，只要所有出现的“第一元件”一致重命名并且所有出现的“第二元件”一致重命名即可。第一元件和第二元件都是元件，但可以不是相同的元件。
本申请中使用的用词仅用于描述实施例并且不用于限制权利要求。如在实施例以及权利要求的描述中使用的，除非上下文清楚地表明，否则单数形式的“一个”(a)、“一个”(an)和“所述”(the)旨在同样包括复数形式。类似地，如在本申请中所使用的术语“和/或”是指包含一个或一个以上相关联的列出的任何以及所有可能的组合。另外，当用于本申请中时，术语“包括”(comprise)及其变型“包括”(comprises)和/或包括(comprising)等指陈述的特征、整体、步骤、操作、元素，和/或组件的存在，但不排除一个或一个以上其它特征、整体、步骤、操作、元素、组件和/或这些的分组的存在或添加。
所描述的实施例中的各方面、实施方式、实现或特征能够单独使用或以任意组合的方式使用。所描述的实施例中的各方面可由软件、硬件或软硬件的结合实现。所描述的实施例也可以由存储有计算机可读代码的计算机可读介质体现，该计算机可读代码包括可由至少一个计算装置执行的指令。所述计算机可读介质可与任何能够存储数据的数据存储装置相关联，该数据可由计算机***读取。用于举例的计算机可读介质可以包括只读存储器、随机存取存储器、CD-ROM、HDD、DVD、磁带以及光数据存储装置等。所述计算机可读介质还可以分布于通过网络联接的计算机***中，这样计算机可读代码就可以分布式存储并执行。
上述技术描述可参照附图，这些附图形成了本申请的一部分，并且通过描述在附图中示出了依照所描述的实施例的实施方式。虽然这些实施例描述的足够详细以使本领域技术人员能够实现这些实施例，但这些实施例是非限制性的；这样就可以使用其它的实施例，并且在不脱离所描述的实施例的范围的情况下还可以做出变化。比如，流程图中所描述的操作顺序是非限制性的，因此在流程图中阐释并且根据流程图描述的两个或两个以上操作的顺序可以根据若干实施例进行改变。作为另一个例子，在若干实施例中，在流程图中阐释并且根据流程图描述的一个或一个以上操作是可选的，或是可删除 的。另外，某些步骤或功能可以添加到所公开的实施例中，或两个以上的步骤顺序被置换。所有这些变化被认为包含在所公开的实施例以及权利要求中。
另外，上述技术描述中使用术语以提供所描述的实施例的透彻理解。然而，并不需要过于详细的细节以实现所描述的实施例。因此，实施例的上述描述是为了阐释和描述而呈现的。上述描述中所呈现的实施例以及根据这些实施例所公开的例子是单独提供的，以添加上下文并有助于理解所描述的实施例。上述说明书不用于做到无遗漏或将所描述的实施例限制到本公开的精确形式。根据上述教导，若干修改、选择适用以及变化是可行的。在某些情况下，没有详细描述为人所熟知的处理步骤以避免不必要地影响所描述的实施例。
Claims (10)
- 一种平衡电路，其特征在于，包括：计算模块，所述计算模块中包括N个串联的计算单元；N个平衡模块，一个所述平衡模块与一个所述计算单元并联，用于平衡所述计算单元之间的电压；其中，N为大于等于2的整数。
- 根据权利要求1所述的平衡电路，其特征在于，还包括：多个所述计算模块；一个所述平衡模块，与每个所述计算模块中的一个所述计算单元并联。
- 根据权利要求1或2所述的平衡电路，其特征在于，所述计算模块是芯片；所述计算单元是设置在所述芯片中的内核。
- 根据权利要求1或2所述的平衡电路，其特征在于，所述平衡模块是二极管。
- 根据权利要求4所述的平衡电路，其特征在于，所述二极管的导通电压和与其并联的计算单元的工作电压相同。
- 根据权利要求4所述的平衡电路，其特征在于，所述计算单元之间的压差大于所述二极管的导通电压时，所述二极管导通。
- 根据权利要求4所述的平衡电路，其特征在于，所述二极管是肖特基二极管。
- 根据权利要求1或2所述的平衡电路，其特征在于，还包括：N个辅助平衡模块；一个所述辅助平衡模块与一个所述平衡模块并联。
- 根据权利要求1或2所述的平衡电路，其特征在于，N等于4。
- 一种计算机，其特征在于，包含权利要求1-9任一项所述的平衡电路。
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101752624A (zh) * | 2010-01-13 | 2010-06-23 | 深圳市京泉华电子有限公司 | 一种电池均衡充电方法及装置 |
| CN103516030A (zh) * | 2013-10-21 | 2014-01-15 | 南车株洲电力机车有限公司 | 一种电压均衡装置及方法 |
| CN203607881U (zh) * | 2013-11-04 | 2014-05-21 | 江苏嘉钰新能源技术有限公司 | 一种分流均衡充电装置 |
| CN106655382A (zh) * | 2016-12-26 | 2017-05-10 | 浙江吉利控股集团有限公司 | 一种电池充放电管理*** |
-
2018
- 2018-11-30 WO PCT/CN2018/118756 patent/WO2020107470A1/zh active Application Filing
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101752624A (zh) * | 2010-01-13 | 2010-06-23 | 深圳市京泉华电子有限公司 | 一种电池均衡充电方法及装置 |
| CN103516030A (zh) * | 2013-10-21 | 2014-01-15 | 南车株洲电力机车有限公司 | 一种电压均衡装置及方法 |
| CN203607881U (zh) * | 2013-11-04 | 2014-05-21 | 江苏嘉钰新能源技术有限公司 | 一种分流均衡充电装置 |
| CN106655382A (zh) * | 2016-12-26 | 2017-05-10 | 浙江吉利控股集团有限公司 | 一种电池充放电管理*** |
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