WO2020103232A1 - 显示装置及其驱动方法 - Google Patents

显示装置及其驱动方法

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Publication number
WO2020103232A1
WO2020103232A1 PCT/CN2018/120849 CN2018120849W WO2020103232A1 WO 2020103232 A1 WO2020103232 A1 WO 2020103232A1 CN 2018120849 W CN2018120849 W CN 2018120849W WO 2020103232 A1 WO2020103232 A1 WO 2020103232A1
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WO
WIPO (PCT)
Prior art keywords
vbo
control signal
receiving
receiving end
signal
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Application number
PCT/CN2018/120849
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English (en)
French (fr)
Inventor
何欢
Original Assignee
惠科股份有限公司
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Filing date
Publication date
Application filed by 惠科股份有限公司 filed Critical 惠科股份有限公司
Publication of WO2020103232A1 publication Critical patent/WO2020103232A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters

Definitions

  • the present application relates to the field of display, and particularly to a display device and a driving method thereof.
  • VBO signal has the advantages of high transmission quality, fast transmission speed, cost saving and installation space, etc. It is widely used in display devices, especially high-definition display devices.
  • Ultra High Definition (UHD) or display devices with higher resolution generally use VBO (V-By-One) signals as the communication interface between the main board and the control board.
  • the motherboards of different merchants may provide different VBO signals. Therefore, when the control board is matched with the motherboard, the motherboard that outputs VBO signals of different signal formats should be matched with different control boards. However, this is not conducive to the control of the display control board; and once the matching is wrong, it will cause the screen to be abnormal.
  • the present application provides a display device and a driving method thereof to improve the situation that the screen is abnormal due to the mismatch between the main board and the control board.
  • An embodiment of the present application provides a display device, including:
  • Main board used to send VBO (V-By-One) signal and control signal;
  • the control board is configured to receive the control signal, trigger one of the multiple VBO receiving terminals provided by the control signal according to the control signal, and receive the VBO signal through the triggered VBO receiving terminal.
  • control board includes:
  • a first VBO receiving terminal configured to receive the VBO signal when the control signal is at a high level
  • the second VBO receiving end is used to receive the VBO signal when the control signal is at a low level.
  • control board further includes a control circuit for receiving the control signal, and when the control signal is at a high level, a high-level voltage is provided to the first VBO receiving end, Trigger the first VBO receiving end, and when the control signal is low, provide a high-level voltage to the second VBO receiving end to trigger the second VBO receiving end.
  • control circuit includes:
  • the first control branch is used to provide a high-level voltage to the first VBO receiving end when the control signal is at a high level to trigger the first VBO receiving end, so that the control board passes the The first VBO receiving end receives the VBO signal;
  • the second control branch is used to provide a high-level voltage to the second VBO receiving end when the control signal is at a low level to trigger the second VBO receiving end so that the control board passes through the The second VBO receiving end receives the VBO signal.
  • the first control branch includes:
  • a first switch tube the gate is connected to the main board, the drain is connected to the high-level voltage, and the source is connected to the first VBO receiving end;
  • the first resistor is arranged in series between the gate of the first switching tube and the drain of the first switching tube.
  • the second control branch includes:
  • a second switch tube the gate is connected to the main board, the source is connected to the high-level voltage, and the drain is connected to the second VBO receiving end;
  • One end of the second resistor is connected to the grid of the second switch tube, and the other end is grounded.
  • the first switch tube is an N-type switch tube
  • the second switch tube is a P-type switch tube
  • the first switch tube and the second switch tube are both field effect tubes or transistors.
  • the first VBO receiving end and the second VBO receiving end are both high-level enabled VBO receiving ends.
  • the first VBO receiving end further includes a first data processing chip, and the first data processing chip is connected to the source of the first switching tube through its high-level enable pin.
  • the second VBO receiving end further includes a second data processing chip, and the second data processing chip is connected to the drain of the second switching tube through its high-level enable pin.
  • the first VBO receiving terminal is a high-level enabling VBO receiving terminal
  • the second VBO receiving terminal is a low-level enabling VBO receiving terminal
  • control board further includes an inverter arranged in series between the second VBO receiving end and the main board, for receiving the control signal and outputting the inverse of the control signal Direction signal to the second VBO receiving end.
  • the first VBO receiving end and the second VBO receiving end are both high-level enabled VBO receiving ends.
  • the present application also provides a driving method of a display device, including:
  • VBO V-By-One
  • the first switch tube and the second switch tube are both field effect tubes or transistors.
  • the first VBO receiving end and the second VBO receiving end are both high-level enabled VBO receiving ends.
  • the first VBO receiving end further includes a first data processing chip, and the first data processing chip is connected to the source of the first switching tube through its high-level enable pin.
  • the second VBO receiving end further includes a second data processing chip, and the second data processing chip is connected to the drain of the second switching tube through its high-level enable pin.
  • this application provides a display device and a driving method thereof.
  • the display device includes the main board and the control board.
  • the main board is used to send VBO signals and control signals.
  • the control board is used to receive the control signal, trigger one of a plurality of VBO receiving ends of the control board according to the control signal, and receive the VBO signal through the triggered VBO receiving end.
  • the control board has multiple VBO receiving ends, and the control board triggers a VBO receiving end matching the main board according to the control signal, and receives the VBO signal through the triggered VBO receiving end, thereby Avoid the problem of abnormal screen caused by the mismatch between the control board and the main board.
  • FIG. 1 is a schematic diagram of the electrical structure of a display device provided by an embodiment of the present application.
  • FIG. 2 is a schematic diagram of an electrical structure of another display device provided by an embodiment of the present application.
  • FIG. 3 is a schematic diagram of the electrical structure of yet another display device provided by an embodiment of the present application.
  • FIG. 4 is a schematic flowchart of a driving method of a display device provided by an embodiment of the present application.
  • VBO signal used as the interface between the main board and the control board generally has the following two formats.
  • the display device includes a main board 100 and a control board 200.
  • the main board 100 is used to send a VBO signal and a control signal
  • the control board 200 is used to receive the control signal, trigger one of a plurality of VBO receiving terminals that it has, and the VBO after the trigger
  • the receiving end receives the VBO signal.
  • the control board 200 includes a first VBO receiver 210 and a second VBO receiver 220.
  • the first VBO receiving terminal 210 is configured to receive the VBO signal when the control signal is at a high level.
  • the second VBO receiving end 220 is used to receive the VBO signal when the control signal is at a low level.
  • the control board 200 should use the matching VBO receiving end to receive it. Therefore, corresponding to two different formats of VBO signals, in this embodiment, the first VBO signal receiving terminal 210 and the second VBO signal receiving terminal respectively receive the first partition VBO signal and the second partition VBO signal.
  • the control signal output at the same time is a high-level signal; when the main board 100 outputs the two-zone VBO signal, the control signal at the same time is a low-level signal. Therefore, in this embodiment, when the control signal is at a high level, the control board 200 receives the partition VBO signal through the first VBO receiving terminal 210. When the control signal is at a low level, the control board 200 receives the two-region VBO signal through the second VBO receiving end 220.
  • control board 200 further includes a control circuit 230.
  • the control circuit 230 is configured to receive the control signal, and when the control signal is at a high level, provide a high-level voltage to the first VBO receiving terminal 210 to trigger the first VBO receiving terminal 210, When the control signal is at a low level, the second VBO receiving terminal 220 is provided with a high-level voltage to trigger the second VBO receiving terminal 220.
  • the first VBO receiving terminal 210 and the second VBO receiving terminal 220 are both high-level enabled VBO receiving terminals, in order to avoid the control signal from simultaneously triggering the first VBO receiving terminal 210 And the second VBO receiving terminal 220, a control circuit 230 needs to be provided in the control board 200, so that the control circuit 230 can individually trigger the first VBO receiving terminal 210 or all the devices according to the control signal The second VBO receiving end 220, and then the VBO signal is received through the triggered first VBO receiving end 210 or the second VBO receiving end 220.
  • the control circuit 230 includes a first control branch 231 and a second control branch 232.
  • the first control branch is used to provide a high-level voltage to the first VBO receiving terminal 210 when the control signal is at a high level to trigger the first VBO receiving terminal 210, so that the control board 200 receives the VBO signal through the first VBO receiving terminal 210.
  • the second control branch 232 is used to provide a high-level voltage to the second VBO receiving terminal 220 when the control signal is at a low level to trigger the second VBO receiving terminal 220 so that the control The board 200 receives the VBO signal through the second VBO receiving terminal 220.
  • control signal is a weak current signal, which is generally only used to control the on and off of the first control branch 231 and the second control branch 232, and is not directly provided to the VBO receiving end as a trigger voltage to Avoid burning the circuit due to too little voltage or current. Therefore, in this application, the control signal is only used as a switching signal, and the first control branch 231 is controlled by the control signal to provide a high-level voltage to the first VBO receiving terminal 210, and the first Two control branches 232 provide a high-level voltage to the second VBO receiving end 220.
  • the first control branch 231 includes a first switch M1 and a first resistor R1.
  • the gate of the first switch M1 is connected to the main board 100, the drain is connected to the high-level voltage, and the source is connected to the first VBO receiving terminal 210.
  • the first resistor R1 is arranged in series between the gate of the first switch M1 and the drain of the first switch M1.
  • the second control branch 232 includes a second switch M2 and a second resistor R2.
  • the gate of the second switch M2 is connected to the main board 100, the source is connected to the high-level voltage, and the drain is connected to the second VBO receiving end 220.
  • One end of the second resistor R2 is connected to the gate of the second switch M2, and the other end is grounded.
  • the first switch M1 is an N-type field effect transistor
  • the second switch M2 is a P-type field effect transistor
  • the first switch M1 may also be an N-type transistor
  • the second switch M2 may also be a P-type transistor.
  • a first data processing chip 211 is provided in the first VBO receiving terminal 210, and the first data processing chip 211 enables the pin p1 and the N-type field effect transistor through its high level. Source connection.
  • a second data processing chip 221 is provided in the second VBO receiving terminal 220, and the second data processing chip 221 is connected to the drain of the P-type field effect transistor through its high-level enable pin p2.
  • the N-type field effect transistor When the control signal is a high-level signal, the N-type field effect transistor is turned on, and the source and drain voltages of the N-type field effect transistor are the same and are both high-level voltages, so the first The voltage at the enable pin of the data processing chip is also a high-level voltage, thereby triggering the first VBO receiving terminal 210, so that the control board 200 can receive the VBO signal through the first VBO receiving terminal 210.
  • the P-type field effect transistor is turned off and cannot provide the high-level voltage to the second VBO receiving terminal 220, and the second VBO receiving terminal 220 is in an inoperative state.
  • the control signal is a high-level signal
  • the N-type field effect transistor is turned off, and the high-level voltage cannot be provided to the first VBO receiving terminal 210, and the first VBO receiving terminal 210 is inactive status.
  • the P-type field effect transistor is turned on, and the source and drain voltages of the P-type field effect transistor are the same and are both high-level voltages, so the voltage at the enable pin of the second data processing chip is The high-level voltage triggers the second VBO receiving terminal 220 so that the control board 200 can receive the VBO signal through the second VBO signal control terminal.
  • control board 200 further includes an inverter 240.
  • the inverter 240 is connected in series between the second VBO receiving end 220 and the main board 100, and is used to receive the control signal and output a reverse signal of the control signal to the second VBO for receiving ⁇ 220 ⁇ End 220.
  • the control signal is directly provided to the VBO receiving end as a trigger voltage.
  • an inverter 240 needs to be provided between the second VBO receiving end 220 and the main board 100.
  • the inverter 240 when the control signal is a high-level signal, a low-level control signal is provided for the second VBO receiving terminal 220, and when the control signal is a low-level signal, The second VBO receiving terminal 220 raises the low-level control signal.
  • the first VBO receiving terminal 210 is a high-level enabling VBO receiving terminal
  • the second VBO receiving terminal 220 is a low-level enabling VBO receiving terminal. It can be understood that when the first VBO receiving terminal 210 and the second VBO receiving terminal 220 are respectively a high-level enabled VBO receiving terminal and a low-level enabled VBO receiving terminal, they can directly communicate with the motherboard 100 Connection, using the control signal to trigger the first VBO receiving end 210 and the second VBO receiving end 220, no need to design a control circuit 230 or an additional inverter 240, which is helpful to reduce the number of components used, Simplify circuit design and reduce production costs.
  • the control signal is directly provided to the VBO receiving end as a trigger voltage.
  • the present application also provides a driving method of a display device, including:
  • Step S100 receiving the control signal sent by the main board 100
  • Step S200 according to the control signal, trigger one of the VBO receiving ends of the plurality of VBO receiving ends in the control board 200;
  • Step S300 receiving the VBO signal sent by the main board 100 through the triggered VBO receiving end.
  • the main board 100 when the main board 100 sends the VBO signal, it simultaneously outputs the control signal, so that the control board 200 starts the VBO receiving end matching the VBO signal according to the control signal.
  • the VBO receiving end receives the control signal, so as to avoid the abnormal picture caused by the mismatch between the VBO signal and the VBO signal receiving end.
  • the control board 200 includes a first VBO receiver 210 and a second VBO receiver 220.
  • the first VBO receiving terminal 210 is configured to receive the VBO signal when the control signal is at a high level.
  • the second VBO receiving end 220 is used to receive the VBO signal when the control signal is at a low level.
  • the triggering one of the VBO receiving terminals in the control board according to the control signal includes:
  • control signal When the control signal is at a high level, supplying a high-level voltage to the first VBO receiving end to trigger the first VBO receiving end;
  • the control board 200 should use the matching VBO receiving end to receive it. Therefore, corresponding to two different formats of VBO signals, in this embodiment, the first VBO signal receiving terminal 210 and the second VBO signal receiving terminal respectively receive the first partition VBO signal and the second partition VBO signal.
  • the control signal output at the same time is a high-level signal; when the main board 100 outputs the two-zone VBO signal, the control signal at the same time is a low-level signal. Therefore, in this embodiment, when the control signal is at a high level, the control board 200 receives the partition VBO signal through the first VBO receiving terminal 210. When the control signal is at a low level, the control board 200 receives the two-region VBO signal through the second VBO receiving end 220.
  • the control board 200 further includes a control circuit 230 for receiving the control signal, and when the control signal is at a high level, providing a high-level voltage to the first VBO receiving terminal 210, In order to trigger the first VBO receiving terminal 210, when the control signal is at a low level, the second VBO receiving terminal 220 is provided with a high-level voltage to trigger the second VBO receiving terminal 220.
  • the control circuit 230 includes a first control branch 231 and a second control branch 232.
  • the first control branch 231 is used to provide a high-level voltage to the first VBO receiving terminal 210 when the control signal is at a high level to trigger the first VBO receiving terminal 210, so that the control The board 200 receives the VBO signal through the first VBO receiving terminal 210.
  • the second control branch 232 is used to provide a high-level voltage to the second VBO receiving terminal 220 when the control signal is at a low level to trigger the second VBO receiving terminal 220 so that the control The board 200 receives the VBO signal through the second VBO receiving terminal 220.
  • control signal is a weak current signal, which is generally only used to control the on and off of the first control branch 231 and the second control branch 232, and is not directly provided to the VBO receiving end as a trigger voltage to Avoid burning the circuit due to too little voltage or current. Therefore, in this application, the control signal is only used as a switching signal, and the first control branch 231 is controlled by the control signal to provide a high-level voltage to the first VBO receiving terminal 210, and the first Two control branches 232 provide a high-level voltage to the second VBO receiving end 220.
  • the first control branch includes a first switch M1, a gate of the first switch M1 is connected to the main board 100, a drain is connected to the high-level voltage, and a source is connected to the first VBO The receiving end 210 is connected.
  • the second control branch 232 includes a second switch M2, a gate of the second switch M2 is connected to the main board 100, a source is connected to the high-level voltage, and a drain is connected to the second VBO The receiving end 220 is connected.
  • the first switch tube M1 is an N-type field effect tube
  • the second switch tube M2 is a P-type field effect tube.
  • triggering one of the VBO receiving terminals in the control board 200 according to the control signal includes:
  • the first switch tube M1 When the control signal is at a high level, the first switch tube M1 provides a high-level voltage to the first VBO receiving terminal 210 to trigger the first VBO receiving terminal 210;
  • the second switch tube M2 When the control signal is at a low level, the second switch tube M2 provides a high-level voltage to the second VBO receiving terminal 220 to trigger the second VBO receiving terminal 220.
  • the receiving the VBO signal sent by the main board through the triggered VBO receiving end includes:
  • the VBO signal sent by the main board is received through the triggered second VBO receiving end.
  • control board 200 further includes an inverter 240 which is arranged in series between the second VBO receiving end 220 and the main board 100 for receiving the control Signal and output the reverse signal of the control signal to the second VBO receiving end 220.
  • triggering one of the VBO receiving terminals in the control board according to the control signal includes:
  • control signal When the control signal is at a high level, the control signal is used to trigger the first VBO receiving end;
  • the second VBO receiving end is triggered by using the reverse-processed control signal.
  • both the first VBO receiving end and the second VBO receiving end are high-level enabled VBO receiving ends.
  • the first VBO receiving terminal 210 is a high-level enabling VBO receiving terminal
  • the second VBO receiving terminal 220 is a low-level enabling VBO receiving terminal. It can be understood that when the first VBO receiving terminal 210 and the second VBO receiving terminal 220 are respectively a high-level enabled VBO receiving terminal and a low-level enabled VBO receiving terminal, they can directly communicate with the motherboard 100 Connection, using the control signal to trigger the first VBO receiving end 210 and the second VBO receiving end 220, no need to design a control circuit 230 or an additional inverter 240, which is helpful to reduce the number of components used, Simplify circuit design and reduce production costs.
  • triggering one of the VBO receiving terminals in the control board according to the control signal includes:
  • the second VBO receiving end is triggered.
  • this application provides a display device and a driving method thereof.
  • the display device includes the main board and the control board.
  • the main board is used to send VBO signals and control signals.
  • the control board is used to receive the control signal, trigger one of a plurality of VBO receiving ends of the control board according to the control signal, and receive the VBO signal through the triggered VBO receiving end.
  • the control board has multiple VBO receiving ends, and the control board triggers a VBO receiving end matching the main board according to the control signal, and receives the VBO signal through the triggered VBO receiving end Avoid the problem of abnormal screen caused by the mismatch between the control board and the main board.

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Abstract

一种显示装置及其驱动方法。显示装置包括主板（100）和控制板（200）；主板（100）用于发送VBO信号和控制信号；控制板（200）用于接收控制信号，根据控制信号触发自身具有的多个VBO接收端（210，220）中的一个，以及通过触发后的VBO接收端（210，220）接收VBO信号。控制板（200）中具有多个VBO接收端（210，220），控制板（200）根据控制信号触发与主板（100）匹配的VBO接收端（210，220），通过触发后的VBO接收端（210，220）接收VBO信号，从而避免产生因控制板（200）与主板（100）不匹配所导致的画面异常的问题。

Description

显示装置及其驱动方法
相关申请
本申请要求2018年11月23日申请的，申请号为201811412790.9，名称为“显示装置及其驱动方法”的中国专利申请的优先权，在此将其全文引入作为参考。
技术领域
本申请涉及显示领域，尤其涉及一种显示装置及其驱动方法。
背景技术
这里的陈述仅提供与本申请有关的背景信息，而不必然地构成现有技术。
随着对显示装置显示高质量画面的需求的增加，对于显示装置的信号传输接口的要求也越来越高。VBO信号具有传输质量高、传输速度快并且节省成本和安装空间等优点，广泛应用于显示设备，尤其是高清显示设备。目前超高清(Ultra High Definition，UHD)或具有更高解析度的显示装置，一般使用VBO(V-By-One)信号作为主板与控制板之间通信的接口。不同商家的主板可能会提供不同的VBO信号，因此控制板与主板匹配时，输出不同信号格式的VBO信号的主板应采用不同的控制板与之匹配。但是，这样不利于对显示屏控制板的管控；而且一旦匹配错误，就会导致画面异常。
发明内容
基于此，本申请提供了一种显示装置及其驱动方法以改善因主板与控制板不匹配从而导致画面产生异常的情况。
本申请实施例提供了一种显示装置，包括：
主板，用于发送VBO(V-By-One)信号和控制信号；
控制板，用于接收所述控制信号，根据所述控制信号触发自身具有的多 个VBO接收端中的一个，以及通过触发后的VBO接收端接收所述VBO信号。
在其中一个实施例中，所述控制板包括：
第一VBO接收端，用于当所述控制信号为高电平时，接收所述VBO信号；以及
第二VBO接收端，用于当所述控制信号为低电平时，接收所述VBO信号。
在其中一个实施例中，所述控制板还包括控制电路，用于接收所述控制信号，并且当所述控制信号为高电平时，为所述第一VBO接收端提供高电平电压，以触发所述第一VBO接收端，当所述控制信号为低电平时，为所述第二VBO接收端提供高电平电压，以触发所述第二VBO接收端。
在其中一个实施例中，所述控制电路包括：
第一控制支路，用于当所述控制信号为高电平时，为所述第一VBO接收端提供高电平电压，以触发所述第一VBO接收端，使得所述控制板通过所述第一VBO接收端接收所述VBO信号；以及
第二控制支路，用于当所述控制信号为低电平时，为所述第二VBO接收端提供高电平电压，以触发所述第二VBO接收端，使得所述控制板通过所述第二VBO接收端接收所述VBO信号。
在其中一个实施例中，所述第一控制支路包括：
第一开关管，栅极与所述主板连接，漏极与所述高电平电压连接，源极与所述第一VBO接收端连接；以及
第一电阻，串联设置在所述第一开关管的栅极与所述第一开关管的漏极之间。
在其中一个实施例中，所述第二控制支路包括：
第二开关管，栅极与所述主板连接，源极与所述高电平电压连接，漏极与所述第二VBO接收端连接；以及
第二电阻，一端与所述第二开关管的栅极连接，另一端接地。
在其中一个实施例中，所述第一开关管为N型开关管，所述第二开关管为P型开关管。
在其中一个实施例中，所述第一开关管和所述第二开关管均为场效应管或三极管。
在其中一个实施例中，所述第一VBO接收端和所述第二VBO接收端均为高电平使能VBO接收端。
在其中一个实施例中，所述第一VBO接收端还包括第一数据处理芯片，所述第一数据处理芯片通过其高电平使能管脚与所述第一开关管的源极连接。
在其中一个实施例中，所述第二VBO接收端还包括第二数据处理芯片，所述第二数据处理芯片通过其高电平使能管脚与所述第二开关管的漏极连接。
在其中一个实施例中，所述第一VBO接收端为高电平使能VBO接收端，所述第二VBO接收端为低电平使能VBO接收端。
在其中一个实施例中，所述控制板还包括反相器，串联设置于所述第二VBO接收端与所述主板之间，用于接收所述控制信号，并输出所述控制信号的反向信号给所述第二VBO接收端。
在其中一个实施例中，所述第一VBO接收端和所述第二VBO接收端均为高电平使能VBO接收端。
基于同一发明构思，本申请还提供了一种显示装置的驱动方法，包括：
接收主板发送的控制信号；
根据所述控制信号，触发控制板中多个VBO(V-By-One)接收端中的一个所述VBO接收端；
通过所述触发后的VBO接收端接收所述主板发送的VBO信号。
在其中一个实施例中，所述第一开关管和所述第二开关管均为场效应管或三极管。
在其中一个实施例中，所述第一VBO接收端和所述第二VBO接收端均为高电平使能VBO接收端。
在其中一个实施例中，所述第一VBO接收端还包括第一数据处理芯片，所述第一数据处理芯片通过其高电平使能管脚与所述第一开关管的源极连接。
在其中一个实施例中，所述第二VBO接收端还包括第二数据处理芯片，所述第二数据处理芯片通过其高电平使能管脚与所述第二开关管的漏极连接。
综上，本申请提供了一种显示装置及其驱动方法。所述显示装置包括所述主板和所述控制板。所述主板用于发送VBO信号和控制信号。所述控制板用于接收所述控制信号，根据所述控制信号触发自身具有的多个VBO接收端中的一个，以及通过触发后的VBO接收端接收所述VBO信号。本申请中，所述控制板中具有多个VBO接收端，所述控制板根据所述控制信号，触发与主板匹配的VBO接收端，通过该触发后的VBO接收端接收所述VBO信号，从而避免产生因所述控制板与所述主板不匹配所导致的画面异常的问题。
附图说明
图1为本申请实施例提供的一种显示装置的电气结构示意图；
图2为本申请实施例提供的另一种显示装置的电气结构示意图；
图3为本申请实施例提供的再一种显示装置的电气结构示意图；
图4为本申请实施例提供的显示装置的驱动方法的流程示意图。
具体实施方式
为使本申请的上述目的、特征和优点能够更加明显易懂，下面结合附图对本申请的具体实施方式做详细的说明。在下面的描述中阐述了很多具体细节以便于充分理解本申请。但是本申请能够以很多不同于在此描述的其它方式来实施，本领域技术人员可以在不违背本申请内涵的情况下做类似改进，因此本申请不受下面公开的具体实施的限制。
请参见表1，目前作为主板与控制板之间通信的接口VBO信号一般具有如下两种格式。
表1
Figure PCTCN2018120849-appb-000001
从表1中可以看出，一分区VBO信号与二分区VBO信号在格式上存在差异，因此，如果使用与一分区VBO信号格式匹配的VBO接收端接收二分区VBO信号，或者，使用与二分区VBO信号格式匹配的VBO接收端接收一分区VBO信号，则会导致画面异常。
为此，本申请实施例提供了一种显示装置，请参见图1，所述显示装置包括主板100和控制板200。所述主板100用于发送VBO信号和控制信号，所 述控制板200用于接收所述控制信号，根据所述控制信号触发自身具有的多个VBO接收端中的一个，以及通过触发后的VBO接收端接收所述VBO信号。
本实施例中，所述控制板200包括第一VBO接收端210和第二VBO接收端220。所述第一VBO接收端210用于当所述控制信号为高电平时，接收所述VBO信号。所述第二VBO接收端220用于当所述控制信号为低电平时，接收所述VBO信号。
可以理解，对应于不同格式的VBO信号，所述控制板200应使用与之匹配的VBO接收端来接收。因此，对应于两种不同格式的VBO信号，本实施例中通过所述第一VBO接收端210和第二VBO信号接收端分别接收所述一分区VBO信号和所述二分区VBO信号。当所述主板100输出所述一分区VBO信号时，同时输出的控制信号为高电平信号；当所述主板100输出二分区VBO信号时，同时输出的控制信号为低电平信号。因此，本实施例中，当所述控制信号为高电平时，所述控制板200通过所述第一VBO接收端210接收所述一分区VBO信号。当所述控制信号为低电平时，所述控制板200通过所述第二VBO接收端220接收所述二分区VBO信号。
在其中一个实施例中，所述控制板200还包括控制电路230。所述控制电路230用于接收所述控制信号，并且当所述控制信号为高电平时，为所述第一VBO接收端210提供高电平电压，以触发所述第一VBO接收端210，当所述控制信号为低电平时，为所述第二VBO接收端220提供高电平电压，以触发所述第二VBO接收端220。可以理解，一般设计中所述第一VBO接收端210与所述第二VBO接收端220均为高电平使能VBO接收端，为避免所述控制信号同时触发所述第一VBO接收端210与所述第二VBO接收端220，则需要在所述控制板200中设置控制电路230，以使所述控制电路230根据所 述控制信号能够单独的触发所述第一VBO接收端210或所述第二VBO接收端220，进而通过触发的所述第一VBO接收端210或所述第二VBO接收端220接收所述VBO信号。
在其中一个实施例中，所述控制电路230包括第一控制支路231和第二控制支路232。所述第一控制支路用于当所述控制信号为高电平时，为所述第一VBO接收端210提供高电平电压，以触发所述第一VBO接收端210，使得所述控制板200通过所述第一VBO接收端210接收所述VBO信号。所述第二控制支路232用于当所述控制信号为低电平时，为所述第二VBO接收端220提供高电平电压，以触发所述第二VBO接收端220，使得所述控制板200通过所述第二VBO接收端220接收所述VBO信号。
可以理解，所述控制信号为弱电信号，一般仅用于控制第一控制支路231和第二控制支路232的导通与断开，而不直接提供给VBO接收端作为触发电压使用，以避免因电压或电流过小导致电路烧毁。因此，本申请中将所述控制信号仅作为开关信号使用，通过所述控制信号控制所述第一控制支路231为所述第一VBO接收端210提供高电平电压，以及控制所述第二控制支路232为所述第二VBO接收端220提供高电平电压。
在其中一个实施例中，所述第一控制支路231包括第一开关管M1和第一电阻R1。所述第一开关管M1的栅极与所述主板100连接，漏极与所述高电平电压连接，源极与所述第一VBO接收端210连接。所述第一电阻R1串联设置在所述第一开关管M1的栅极与所述第一开关管M1的漏极之间。
所述第二控制支路232包括第二开关管M2和第二电阻R2。所述第二开关管M2的栅极与所述主板100连接，源极与所述高电平电压连接，漏极与所述第二VBO接收端220连接。所述第二电阻R2一端与所述第二开关管M2 的栅极连接，另一端接地。
在其中一个实施例中，所述第一开关管M1为N型场效应管，所述第二开关管M2为P型场效应管。此外，所述第一开关管M1还可以为N型三极管，所述第二开关管M2还可以为P型三极管。
本实施例中，所述第一VBO接收端210中设置有第一数据处理芯片211，所述第一数据处理芯片211通过其高电平使能管脚p1与所述N型场效应管的源极连接。所述第二VBO接收端220中设置有第二数据处理芯片221，所述第二数据处理芯片221通过其高电平使能管脚p2与所述P型场效应管的漏极连接。当所述控制信号为高电平信号时，所述N型场效应管导通，所述N型场效应管的源极和漏极电压相同，均为高电平电压，因此所述第一数据处理芯片的使能管脚处的电压也是高电平电压，从而触发所述第一VBO接收端210，使得所述控制板200能够通过所述第一VBO接收端210接收所述VBO信号。此时所述P型场效应管截止，无法为所述第二VBO接收端220提供所述高电平电压，所述第二VBO接收端220处于不工作状态。当所述控制信号为高电平信号时，所述N型场效应管截止，无法为所述第一VBO接收端210提供所述高电平电压，所述第一VBO接收端210处于不工作状态。所述P型场效应管导通，所述P型场效应管的源极和漏极电压相同，均为高电平电压，因此所述第二数据处理芯片的使能管脚处的电压也是高电平电压，从而触发所述第二VBO接收端220，使得所述控制板200能够通过所述第二VBO信号控制端接收所述VBO信号。
请参见图2，在其中一个实施例中，所述控制板200还包括反相器240。所述反相器240串联设置于所述第二VBO接收端220与所述主板100之间，用于接收所述控制信号，并输出所述控制信号的反向信号给所述第二VBO接 收端220。本实施例中，将所述控制信号直接提供给VBO接收端作为触发电压使用。
可以理解，当利用所述控制信号触发所述第一VBO接收端210和所述第二VBO接收端220时，为避免同为高电平使能的所述第二VBO接收端220在控制信号为高电平时触发，则需要在所述第二VBO接收端220与所述主板100之间设置一个反相器240。通过所述反相器240，当所述控制信号为高电平信号时，为所述第二VBO接收端220提供低电平控制信号，以及当所述控制信号为低电平信号时，为所述第二VBO接收端220提高低电平控制信号。
请参见图3，在其中一个实施例中，所述第一VBO接收端210为高电平使能VBO接收端，所述第二VBO接收端220为低电平使能VBO接收端。可以理解，当所述第一VBO接收端210和所述第二VBO接收端220分别为高电平使能VBO接收端和低电平使能VBO接收端时，可以分别直接与所述主板100连接，利用所述控制信号触发所述第一VBO接收端210和所述第二VBO接收端220，不需要再另外设计控制电路230或增设反相器240，有利于减少元器件的使用数量、简化电路设计以及降低生产成本。本实施例中，将所述控制信号直接提供给VBO接收端作为触发电压使用。
请参见图4，基于同一发明构思，本申请还提供了一种显示装置的驱动方法，包括：
步骤S100，接收主板100发送的控制信号；
步骤S200，根据所述控制信号，触发控制板200中多个VBO接收端中的一个所述VBO接收端；
步骤S300，通过所述触发后的VBO接收端接收所述主板100发送的VBO信号。
本实施例中所述主板100发送所述VBO信号时，同时输出所述控制信号，使得所述控制板200根据所述控制信号启动与所述VBO信号匹配的VBO接收端，通过所述启动的VBO接收端接收所述控制信号，从而避免因VBO信号与VBO信号接收端不匹配而导致画面异常。
本实施例中，所述控制板200包括第一VBO接收端210和第二VBO接收端220。所述第一VBO接收端210用于当所述控制信号为高电平时，接收所述VBO信号。所述第二VBO接收端220用于当所述控制信号为低电平时，接收所述VBO信号。
在其中一个实施例中，所述根据所述控制信号，触发所述控制板中多个VBO接收端中的一个所述VBO接收端，包括：
当所述控制信号为高电平时，为第一VBO接收端提供高电平电压，以触发所述第一VBO接收端；以及
当所述控制信号为低电平时，为第二VBO接收端提供高电平电压，以触发所述第二VBO接收端。
可以理解，对应于不同格式的VBO信号，所述控制板200应使用与之匹配的VBO接收端来接收。因此，对应于两种不同格式的VBO信号，本实施例中通过所述第一VBO接收端210和第二VBO信号接收端分别接收所述一分区VBO信号和所述二分区VBO信号。当所述主板100输出所述一分区VBO信号时，同时输出的控制信号为高电平信号；当所述主板100输出二分区VBO信号时，同时输出的控制信号为低电平信号。因此，本实施例中，当所述控制信号为高电平时，所述控制板200通过所述第一VBO接收端210接收所述一分区VBO信号。当所述控制信号为低电平时，所述控制板200通过所述第二VBO接收端220接收所述二分区VBO信号。
所述控制板200还包括控制电路230，所述控制电路230用于接收所述控制信号，并且当所述控制信号为高电平时，为所述第一VBO接收端210提供高电平电压，以触发所述第一VBO接收端210，当所述控制信号为低电平时，为所述第二VBO接收端220提供高电平电压，以触发所述第二VBO接收端220。
所述控制电路230包括第一控制支路231和第二控制支路232。所述第一控制支路231用于当所述控制信号为高电平时，为所述第一VBO接收端210提供高电平电压，以触发所述第一VBO接收端210，使得所述控制板200通过所述第一VBO接收端210接收所述VBO信号。所述第二控制支路232用于当所述控制信号为低电平时，为所述第二VBO接收端220提供高电平电压，以触发所述第二VBO接收端220，使得所述控制板200通过所述第二VBO接收端220接收所述VBO信号。
可以理解，所述控制信号为弱电信号，一般仅用于控制第一控制支路231和第二控制支路232的导通与断开，而不直接提供给VBO接收端作为触发电压使用，以避免因电压或电流过小导致电路烧毁。因此，本申请中将所述控制信号仅作为开关信号使用，通过所述控制信号控制所述第一控制支路231为所述第一VBO接收端210提供高电平电压，以及控制所述第二控制支路232为所述第二VBO接收端220提供高电平电压。
所述第一控制支路包括第一开关管M1，所述第一开关管M1的栅极与所述主板100连接，漏极与所述高电平电压连接，源极与所述第一VBO接收端210连接。所述第二控制支路232包括第二开关管M2，所述第二开关管M2栅极与所述主板100连接，源极与所述高电平电压连接，漏极与所述第二VBO接收端220连接。其中，所述第一开关管M1为N型场效应管，所述第二开 关管M2为P型场效应管。
在其中一个实施例中，所述根据所述控制信号，触发控制板200中多个VBO接收端中的一个所述VBO接收端，包括：
当所述控制信号为高电平时，通过第一开关管M1提供高电平电压给第一VBO接收端210，触发所述第一VBO接收端210；
当所述控制信号为低电平时，通过第二开关管M2提供高电平电压给第二VBO接收端220，触发所述第二VBO接收端220。
在其中一个实施例中，所述通过所述触发后的VBO接收端接收所述主板发送的VBO信号，包括：
当所述控制信号为高电平时，通过所述触发后的第一VBO接收端接收所述主板发送的VBO信号；以及
当所述控制信号为低电平时，通过所述触发后的第二VBO接收端接收所述主板发送的VBO信号。
在其中一个实施例中，所述控制板200还包括反相器240，所述反相器240串联设置于所述第二VBO接收端220与所述主板100之间，用于接收所述控制信号，并输出所述控制信号的反向信号给所述第二VBO接收端220。
本实施例中，所述根据所述控制信号，触发所述控制板中多个VBO接收端中的一个所述VBO接收端，包括：
将所述控制信号提供给第一VBO接收端，以及对所述控制信号进行反向处理，并将所述反向处理后的控制信号提供给第二VBO接收端；
当所述控制信号为高电平时，利用所述控制信号触发所述第一VBO接收端；
当所述控制信号为低电平时，利用所述反向处理后的控制信号触发所述 第二VBO接收端。
本实施例中，所述第一VBO接收端和所述第二VBO接收端均为高电平使能VBO接收端。
在其中一个实施例中，所述第一VBO接收端210为高电平使能VBO接收端，所述第二VBO接收端220为低电平使能VBO接收端。可以理解，当所述第一VBO接收端210和所述第二VBO接收端220分别为高电平使能VBO接收端和低电平使能VBO接收端时，可以分别直接与所述主板100连接，利用所述控制信号触发所述第一VBO接收端210和所述第二VBO接收端220，不需要再另外设计控制电路230或增设反相器240，有利于减少元器件的使用数量、简化电路设计以及降低生产成本。
本实施例中，所述根据所述控制信号，触发所述控制板中多个VBO接收端中的一个所述VBO接收端，包括：
将所述控制信号提供给高电平使能的第一VBO接收端以及低电平使能的第二VBO接收端；
当所述控制信号为高电平时，触发所述第一VBO接收端；
当所述控制信号为低电平时，触发所述第二VBO接收端。
综上，本申请提供了一种显示装置及其驱动方法。所述显示装置包括所述主板和所述控制板。所述主板用于发送VBO信号和控制信号。所述控制板用于接收所述控制信号，根据所述控制信号触发自身具有的多个VBO接收端中的一个，以及通过触发后的VBO接收端接收所述VBO信号。本申请中，所述控制板中具有多个VBO接收端，所述控制板根据所述控制信号，触发与主板匹配的VBO接收端，通过该触发后的VBO接收端接收所述VBO信号，从而避免产生因所述控制板与所述主板不匹配所导致的画面异常的问题。
以上所述实施例的各技术特征可以进行任意的组合，为使描述简洁，未对上述实施例中的各个技术特征所有可能的组合都进行描述，然而，只要这些技术特征的组合不存在矛盾，都应当认为是本说明书记载的范围。
以上所述实施例仅表达了本申请的几种实施方式，其描述较为具体和详细，但并不能因此而理解为对申请专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本发明构思的前提下，还可以做出若干变形和改进，这些都属于本申请的保护范围。因此，本申请专利的保护范围应以所附权利要求为准。

Claims (20)

  1. 一种显示装置，包括：
    主板，用于发送VBO(V-By-One)信号和控制信号；
    控制板，用于接收所述控制信号，根据所述控制信号触发自身具有的多个VBO接收端中的一个，以及通过触发后的VBO接收端接收所述VBO信号。
  2. 如权利要求1所述的显示装置，其中所述控制板包括：
    第一VBO接收端，用于当所述控制信号为高电平时，接收所述VBO信号；以及
    第二VBO接收端，用于当所述控制信号为低电平时，接收所述VBO信号。
  3. 如权利要求2所述的显示装置，其中所述控制板还包括控制电路，用于接收所述控制信号，并且当所述控制信号为高电平时，为所述第一VBO接收端提供高电平电压，以触发所述第一VBO接收端，当所述控制信号为低电平时，为所述第二VBO接收端提供高电平电压，以触发所述第二VBO接收端。
  4. 如权利要求3所述的显示装置，其中所述控制电路包括：
    第一控制支路，用于当所述控制信号为高电平时，为所述第一VBO接收端提供高电平电压，以触发所述第一VBO接收端，使得所述控制板通过所述第一VBO接收端接收所述VBO信号；以及
    第二控制支路，用于当所述控制信号为低电平时，为所述第二VBO接收端提供高电平电压，以触发所述第二VBO接收端，使得所述控制板通过所述第二VBO接收端接收所述VBO信号。
  5. 如权利要求4所述的显示装置，其中所述第一控制支路包括：
    第一开关管，栅极与所述主板连接，漏极与所述高电平电压连接，源极与所述第一VBO接收端连接；以及
    第一电阻，串联设置在所述第一开关管的栅极与所述第一开关管的漏极之间。
  6. 如权利要求5所述的显示装置，其中所述第二控制支路包括：
    第二开关管，栅极与所述主板连接，源极与所述高电平电压连接，漏极与所述第二VBO接收端连接；以及
    第二电阻，一端与所述第二开关管的栅极连接，另一端接地。
  7. 如权利要求6所述的显示装置，其中所述第一开关管为N型开关管，所述第二开关管为P型开关管。
  8. 如权利要求6所述的显示装置，其中所述第一开关管和所述第二开关管均为场效应管或三极管。
  9. 如权利要求6所述的显示装置，其中所述第一VBO接收端和所述第二VBO接收端均为高电平使能VBO接收端。
  10. 如权利要求6所述的显示装置，其中所述第一VBO接收端还包括第一数据处理芯片，所述第一数据处理芯片通过其高电平使能管脚与所述第一开关管的源极连接。
  11. 如权利要求10所述的显示装置，其中所述第二VBO接收端还包括第二数据处理芯片，所述第二数据处理芯片通过其高电平使能管脚与所述第二开关管的漏极连接。
  12. 如权利要求2所述的显示装置，其中所述第一VBO接收端为高电平使能VBO接收端，所述第二VBO接收端为低电平使能VBO接收端。
  13. 如权利要求2所述的显示装置，其中所述控制板还包括反相器，串 联设置于所述第二VBO接收端与所述主板之间，用于接收所述控制信号，并输出所述控制信号的反向信号给所述第二VBO接收端。
  14. 如权利要求13所述的显示装置，其中所述第一VBO接收端和所述第二VBO接收端均为高电平使能VBO接收端。
  15. 一种显示装置的驱动方法，包括：
    接收主板发送的控制信号；
    根据所述控制信号，触发控制板中多个VBO(V-By-One)接收端中的一个所述VBO接收端；
    通过所述触发后的VBO接收端接收所述主板发送的VBO信号。
  16. 如权利要求15所述的驱动方法，其中所述根据所述控制信号，触发所述控制板中多个VBO接收端中的一个所述VBO接收端，包括：
    当所述控制信号为高电平时，为第一VBO接收端提供高电平电压，以触发所述第一VBO接收端；以及
    当所述控制信号为低电平时，为第二VBO接收端提供高电平电压，以触发所述第二VBO接收端。
  17. 如权利要求16所述的驱动方法，其中所述通过所述触发后的VBO接收端接收所述主板发送的VBO信号，包括
    当所述控制信号为高电平时，通过所述触发后的第一VBO接收端接收所述主板发送的VBO信号；以及
    当所述控制信号为低电平时，通过所述触发后的第二VBO接收端接收所述主板发送的VBO信号。
  18. 如权利要求15所述的驱动方法，其中所述根据所述控制信号，触发所述控制板中多个VBO接收端中的一个所述VBO接收端，包括：
    将所述控制信号提供给第一VBO接收端，以及对所述控制信号进行反向处理，并将所述反向处理后的控制信号提供给第二VBO接收端；
    当所述控制信号为高电平时，利用所述控制信号触发所述第一VBO接收端；
    当所述控制信号为低电平时，利用所述反向处理后的控制信号触发所述第二VBO接收端。
  19. 如权利要求18所述的驱动方法，其中所述第一VBO接收端和所述第二VBO接收端均为高电平使能VBO接收端。
  20. 如权利要求15所述的驱动方法，其中所述根据所述控制信号，触发所述控制板中多个VBO接收端中的一个所述VBO接收端，包括：
    将所述控制信号提供给高电平使能的第一VBO接收端以及低电平使能的第二VBO接收端；
    当所述控制信号为高电平时，触发所述第一VBO接收端；
    当所述控制信号为低电平时，触发所述第二VBO接收端。
PCT/CN2018/120849 2018-11-23 2018-12-13 显示装置及其驱动方法 WO2020103232A1 (zh)

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