WO2020087930A1 - Data protection method and apparatus, and system - Google Patents

Data protection method and apparatus, and system Download PDF

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Publication number
WO2020087930A1
WO2020087930A1 PCT/CN2019/090715 CN2019090715W WO2020087930A1 WO 2020087930 A1 WO2020087930 A1 WO 2020087930A1 CN 2019090715 W CN2019090715 W CN 2019090715W WO 2020087930 A1 WO2020087930 A1 WO 2020087930A1
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Prior art keywords
data
storage device
controller
instruction
association identifier
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PCT/CN2019/090715
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French (fr)
Chinese (zh)
Inventor
吉辛维克多
周智
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华为技术有限公司
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Publication of WO2020087930A1 publication Critical patent/WO2020087930A1/en

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1076Parity data used in redundant arrays of independent storages, e.g. in RAID systems
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/78Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data

Definitions

  • This application relates to the storage field, and in particular, to a data protection method, device, and system.
  • Serial ATA Advanced Host Control Interface / Advanced Host Controller Interface Serial ATA Advanced Host Controller Interface, AHCI
  • Non-volatile high-speed transmission bus non-volatile memory express, NVMe
  • NVMe is a kind of interface that allows the host (Host) and non-volatile storage (non-volatile memory, NVM) subsystem to communicate
  • NVM This interface for communication between subsystems (including controllers and storage media) is attached to the Peripheral Component Interconnect Express (PCIe) interface in the form of a register interface, optimized for enterprise and consumer solid-state storage It has the advantages of high performance and low access delay.
  • PCIe Peripheral Component Interconnect Express
  • one method of data protection is to group multiple storage devices into a Redundant Array of Independent Disks (RAID).
  • RAID Redundant Array of Independent Disks
  • one storage device in the plurality of storage devices stores the parity result of the data belonging to the RAID stripe stored in other storage devices.
  • the host needs to read the old data that needs to be updated from the storage device that stores the updated data and update the parity from the storage device that updates the data when updating the parity result
  • the old parity check result is read from the check result storage device, and the old data, the new data and the old parity check result are XORed to obtain a new parity check result, and the new parity check is performed
  • the verification result is stored in a storage device for storing the parity result of the RAID stripe.
  • the present application discloses a data protection method, device and system.
  • the first storage device When the data needs to be updated, after the first storage device obtains new data from the host side, it will perform an XOR operation on the new data and the old data, and actively push the old data and the new data to the second storage device that stores the parity
  • the XOR result of the data after acquiring the XOR result of the old data and the new data, the second storage device directly performs an XOR operation on the XOR result of the old data and the new data and the old parity result, thereby obtaining Update the parity check result.
  • the present application discloses a data protection system.
  • the system includes a host, a first storage device, a second storage device, and at least one other storage device.
  • the first storage device, the second storage device, and at least one other storage device form a RAID of a redundant array of independent hard disks.
  • the first storage device stores first data
  • the second storage device stores second data
  • the at least one other storage device stores at least one third data
  • the first data and the at least one third data belong to the same One RAID stripe
  • the second data is the parity result of the first data and at least one third data.
  • the first storage device includes a first controller and a storage medium
  • the second storage device includes a second controller and a storage medium.
  • the host is used to trigger a first instruction to the first controller and a second instruction to the second controller.
  • the first instruction carries an association identifier, and the association identifier is used to indicate the second instruction.
  • the first controller is used to obtain the first instruction and the fourth data. After obtaining the first instruction, the first data and the fourth data are XORed to obtain the fifth data, and the data message is sent to the second controller.
  • the message contains fifth data and an associated identifier, where the fourth data is updated data of the first data.
  • the second controller is used to obtain a second instruction and a data message, and perform an exclusive-OR operation on the fifth data and the second data according to the second instruction to obtain sixth data.
  • the first instruction and / or the second instruction may be a submission queue entry (SQE) based on NVMe.
  • the host triggering the first instruction may be writing the first instruction into a submission queue (SQ) associated with the first controller, and notifying the first controller through the doorbell mechanism.
  • the host triggering the second instruction may be that the host writes the second instruction to the SQ associated with the second controller, and notifies the second controller through the doorbell mechanism.
  • the host may also directly send the first instruction to the first controller, and send the second instruction to the second controller.
  • the first controller After acquiring the fourth data, the first controller performs an XOR operation on the first data and the fourth data to obtain fifth data, and actively sends the fifth data to the second controller, and carries the associated first data in the data packet. 5.
  • the second instruction After receiving the data message, the second instruction associates the second instruction and the fifth data according to the association identifier, and performs an exclusive-OR operation on the fifth data and the second data according to the second instruction to obtain a new parity result sixth data.
  • the host no longer needs to perform multiple read and write operations on the storage device, and the data traffic of the uplink port of the switching network interconnecting the host with the first storage device and the second storage device is greatly reduced.
  • the data message is a PCIe message
  • the association identifier includes the PCIe address field of the second controller.
  • the first controller may write fifth data to the second controller in the form of a PCIe message, and the PCIe address indicated by the association identifier is an entry for writing fifth data.
  • the second controller may determine the second instruction associated with the fifth data according to the address of the PCIe message.
  • the second controller includes an internal memory, and the second controller performs the fifth data and the second data Before the XOR operation, it is also used to store the fifth data in the storage space of the internal memory, and record the mapping relationship between the storage space and the associated identifier.
  • the present invention does not limit the order in which the second controller obtains the second instruction and the fifth data.
  • the second controller may first receive the data packet, and cache the fifth data in its own internal memory, and record the fifth data The mapping relationship between the storage space and the associated ID.
  • the second controller is further used to determine the storage location of the second instruction according to the association identifier, and the second control The device is used for acquiring the second instruction according to the storage location of the second instruction.
  • the host and the second controller maintain the correspondence between the association identifier and the slot of the sending queue.
  • the host stores the second instruction in the SQ slot corresponding to the association identifier.
  • the second controller may determine the SQ slot stored in the second instruction according to the association identifier, and obtain the second instruction from the SQ slot.
  • the association identifier includes a partial field of the second instruction, and the second controller is configured to Some fields get the second instruction.
  • the association identifier may be indication information of the second instruction.
  • the second controller may query the second instruction according to the association identifier.
  • the second controller is further used to trigger a completion message, and the completion message is used to instruct the second controller The XOR operation on the fifth data and the second data is completed.
  • the host is also used to obtain the completion message.
  • the completion message may be a completion queue entry (CQE), which is used to instruct the second controller to complete the write operation indicated by the second instruction.
  • CQE completion queue entry
  • the trigger completion message of the second controller may specifically be that after the second controller completes the write operation, the CQE is written into a completion queue (CQ), and the host is notified by an interrupt.
  • the present invention provides a data protection method.
  • the data protection system includes a host, a first storage device, a second storage device and at least one other storage device, the first storage device, the second storage device and at least one other storage device form a redundant array of independent hard disks RAID, the first storage device Where the first data is stored, the second data is stored in the second storage device, at least one third data is stored in at least one other storage device, the first data and the at least one third data belong to the same RAID stripe, the second The data is a parity check result of the first data and at least one third data.
  • the first storage device includes a first controller and a storage medium
  • the second storage device includes a second controller and a storage medium.
  • the method includes: the host triggers the first instruction, the first instruction carries an association identifier, and the association identifier is used to indicate the second instruction; the first instruction is used to instruct the first controller to perform an XOR operation on the first data and the fourth data to obtain the first Five data, and instructs the first controller to send a data message to the second controller, the data message contains the fifth data and the associated identifier, wherein the fourth data is the updated data of the first data; the host triggers the second instruction, the second The instruction is used to instruct the second controller to XOR the fifth data and the second data to obtain the sixth data.
  • the method further includes: the host obtains a completion message triggered by the second controller, and the completion message is used to instruct the second controller to complete the fifth data and XOR operation of the second data.
  • the data message is a PCIe message
  • the association identifier includes the PCIe address field of the second controller.
  • the association identifier includes a partial field of the second instruction.
  • the first instruction and / or the second instruction are based on a non-volatile high-speed transmission bus NVMe
  • the submission queue entry SQE is based on a non-volatile high-speed transmission bus NVMe The submission queue entry SQE.
  • the present application provides a readable medium, including an execution instruction, when the processor of the computing device executes the execution instruction, the computing device executes the second aspect above or any possible implementation of the second aspect above The way in the way.
  • the present application provides a computing device, including: a processor, a memory, and a bus; the memory is used to store execution instructions, the processor and the memory are connected through the bus, and when the computing device is running, the processor performs the execution of the memory storage Instructions to cause the computing device to perform the method in the above second aspect or any possible implementation manner of the above second aspect.
  • the present application discloses a data protection method.
  • the data protection system includes a host, a first storage device, a second storage device and at least one other storage device, the first storage device, the second storage device and at least one other storage device form a redundant array of independent hard disks RAID, the first storage device Where the first data is stored, the second data is stored in the second storage device, at least one third data is stored in at least one other storage device, the first data and the at least one third data belong to the same RAID stripe, the second The data is a parity check result of the first data and at least one third data.
  • the first storage device includes a first controller and a storage medium
  • the second storage device includes a second controller and a storage medium
  • the method includes: a first control
  • the first instruction and the fourth data triggered by the host are acquired by the controller, the first instruction carries an association identifier, and the association identifier is used to indicate the second instruction, and the fourth data is the updated data of the first data; after the first controller obtains the first instruction XOR the first data and the fourth data to obtain the fifth data; the first controller sends the data to the second controller Text, data packet contains a fifth data and associated identity.
  • the data message is a PCIe message
  • the association identifier includes a PCIe address field of the second controller.
  • the association identifier includes a partial field of the second instruction.
  • the present application provides a readable medium, including an execution instruction, and when the processor of the computing device executes the execution instruction, the computing device performs the above fifth aspect or any possible implementation of the above fifth aspect The way in the way.
  • the present application provides a computing device, including: a processor, a memory, and a bus; the memory is used to store execution instructions, the processor and the memory are connected through the bus, and when the computing device is running, the processor performs the execution of the memory storage Instructions to cause the computing device to perform the method in the above fifth aspect or any possible implementation manner of the above fifth aspect.
  • the present application discloses a data protection method.
  • the data protection system includes a host, a first storage device, a second storage device and at least one other storage device, the first storage device, the second storage device and at least one other storage device form a redundant array of independent hard disks RAID, the first storage device Where the first data is stored, the second data is stored in the second storage device, at least one third data is stored in at least one other storage device, the first data and the at least one third data belong to the same RAID stripe, the second The data is a parity check result of the first data and at least one third data.
  • the first storage device includes a first controller and a storage medium
  • the second storage device includes a second controller and a storage medium
  • the method includes: a second control
  • the controller obtains the operation command triggered by the host
  • the second controller receives the data message sent by the first controller, the data message contains the fifth data and the association identifier, the fifth data is the XOR result of the first data and the fourth data,
  • the fourth data is the updated data of the first data, and the associated identifier is used to indicate the operation instruction; the second controller Five and second data to obtain a sixth exclusive OR data.
  • the data message is a PCIe message
  • the association identifier includes the PCIe address field of the second controller.
  • the second controller includes an internal memory, and the second controller performs the fifth data and the second data Before the XOR operation, the method further includes: the second controller stores the fifth data in the storage space of the internal memory, and records the mapping relationship between the storage space and the association identifier.
  • the method further includes: the second controller determines the storage location of the operation instruction according to the association identifier; second The controller acquiring the operation instruction includes: the second controller acquiring the operation instruction according to the storage location of the operation instruction.
  • the association identifier includes a partial field of the operation instruction; the second controller acquiring the operation instruction includes: second The controller obtains the operation instruction according to some fields of the operation instruction.
  • the method further includes: a second controller triggers a completion message, and the completion message is used to indicate the second The controller completes the XOR operation on the fifth data and the second data.
  • the first instruction and / or the second instruction are based on a non-volatile high-speed transmission bus NVMe
  • the submission queue entry SQE is based on a non-volatile high-speed transmission bus NVMe The submission queue entry SQE.
  • the eighth aspect is the method implementation of the second controller side corresponding to the system of the first aspect, and the description in the first aspect or any possible implementation manner of the first aspect corresponds to the eighth aspect or any one of the eighth aspect The possible implementation manners will not be repeated here.
  • the present application provides a readable medium, including an execution instruction, and when the processor of the computing device executes the execution instruction, the computing device performs the above eighth aspect or any possible implementation of the above eighth aspect The way in the way.
  • the present application provides a computing device, including: a processor, a memory, and a bus; the memory is used to store execution instructions, the processor and the memory are connected through the bus, and when the computing device is running, the processor performs memory storage execution Instructions to cause the computing device to perform the method in the above eighth aspect or any possible implementation manner of the above eighth aspect.
  • the present application discloses a data protection device.
  • the data protection system includes a data protection device, a first storage device, a second storage device and at least one other storage device, the first storage device, the second storage device and at least one other storage device form a redundant array of independent hard disks RAID, the first The first data is stored in the storage device, the second data is stored in the second storage device, at least one third data is stored in at least one other storage device, the first data and the at least one third data belong to the same RAID stripe, The second data is a parity result of the first data and at least one third data.
  • the first storage device includes a first controller and a storage medium
  • the second storage device includes a second controller and a storage medium
  • the data protection device includes : Processing unit, used to trigger the first instruction, the first instruction carries an association identifier, and the association identifier is used to indicate the second instruction; the first instruction is used to instruct the first controller to perform an XOR operation on the first data and the fourth data Fifth data, and instructs the first controller to send a data message to the second controller, the data message contains fifth data Association identifier, where the fourth data is the updated data of the first data; the processing unit is also used to trigger a second instruction, and the second instruction is used to instruct the second controller to perform an exclusive OR operation on the fifth data and the second data to obtain the sixth data.
  • the backup device further includes an acquiring unit, configured to acquire a completion message triggered by the second controller, and the completion message is used to indicate the first The second controller completes the XOR operation on the fifth data and the second data.
  • the data message is a PCIe message
  • the association identifier includes the PCIe address of the second controller Field.
  • the association identifier includes a partial field of the second instruction.
  • the first instruction and / or the second instruction are based on non-volatile high-speed The submission queue entry SQE of the transmission bus NVMe.
  • the eleventh aspect is the implementation of the device on the host side corresponding to the system of the first aspect.
  • the description in the first aspect or any possible implementation manner of the first aspect corresponds to either the eleventh aspect or the eleventh aspect.
  • the possible implementation manners will not be repeated here.
  • the present application discloses a data protection device.
  • the data protection system includes a host, a first storage device, a second storage device and at least one other storage device, the first storage device, the second storage device and at least one other storage device form a redundant array of independent hard disks RAID, the first storage device Where the first data is stored, the second data is stored in the second storage device, at least one third data is stored in at least one other storage device, the first data and the at least one third data belong to the same RAID stripe, the second The data is a parity check result of the first data and at least one third data.
  • the first storage device includes a data protection device and a storage medium
  • the second storage device includes a controller and a storage medium.
  • the data protection device includes: a processing unit for To obtain the first instruction and the fourth data triggered by the host, the first instruction carries an association identifier, and the association identifier is used to indicate the second instruction, and after obtaining the first instruction, perform an XOR operation on the first data and the fourth data to obtain the first instruction.
  • the data message is a PCIe message
  • the association identifier includes the PCIe address field of the controller.
  • the association identifier includes a partial field of the second instruction.
  • the twelfth aspect is the device implementation of the first controller side corresponding to the system of the first aspect, and the description in the first aspect or any possible implementation manner of the first aspect corresponds to the twelfth aspect or the twelfth aspect. Any possible implementation manner will not be repeated here.
  • the present application discloses a data protection device.
  • the data protection system includes a host, a first storage device, a second storage device and at least one other storage device, the first storage device, the second storage device and at least one other storage device form a redundant array of independent hard disks RAID, the first storage device Where the first data is stored, the second data is stored in the second storage device, at least one third data is stored in at least one other storage device, the first data and the at least one third data belong to the same RAID stripe, the second The data is a parity check result of the first data and at least one third data.
  • the first storage device includes a controller and a storage medium
  • the second storage device includes a data protection device and a storage medium.
  • the data protection device includes: an acquisition unit for In order to obtain the operation command triggered by the host, and receive the data message sent by the controller, the data message contains the fifth data and the association identifier, the fifth data is the XOR result of the first data and the fourth data, and the fourth data is the Update data of a data, the associated identifier is used to indicate the operation instruction; the processing unit is used to follow the second instruction The fifth and second data to obtain a sixth exclusive OR data.
  • the data message is a PCIe message
  • the association identifier includes the PCIe address field of the data protection device.
  • the data protection device further includes an internal memory, and the processing unit pairs the fifth data and the second Before the XOR operation of the data, it is also used to store the fifth data in the storage space of the internal memory, and record the mapping relationship between the storage space and the associated identifier.
  • the acquiring unit is further used to determine the storage location of the operation instruction according to the association identifier, and according to the operation The instruction storage location obtains the operation instruction.
  • the association identifier includes a partial field of the operation instruction; the obtaining unit is used for Some fields get operation instructions.
  • the processing unit is further used to trigger a completion message, and the completion message is used to instruct the data protection device The XOR operation on the fifth data and the second data is completed.
  • the first instruction and / or the second instruction are based on non-volatile high-speed The submission queue entry SQE of the transmission bus NVMe.
  • the thirteenth aspect is the device implementation of the second controller side corresponding to the system of the first aspect, and the description in the first aspect or any possible implementation manner of the first aspect corresponds to the thirteenth aspect or the thirteenth aspect. Any possible implementation manner will not be repeated here.
  • the host triggers the first instruction to the first controller and triggers the second instruction to the second controller.
  • the first instruction triggered by the host to the first controller carries an association identifier indicating the second instruction.
  • the first controller After acquiring the fourth data of the new data, the first controller XORs the fourth data of the new data and the first data of the old data to obtain the fifth data, and actively sends a data message to the second controller, which is carried in the data message The fifth data and the associated identification.
  • the second controller After obtaining the data message, the second controller associates the second instruction and the fifth data according to the association identifier, and performs an exclusive OR operation on the fifth data and the old parity check result second data according to the second instruction to obtain a new parity The sixth data of the verification result.
  • the host is prevented from reading and writing the storage device multiple times during the data update process.
  • the data traffic of the upstream port of the switching network interconnecting the host with the first storage device and the second storage device is greatly reduced, thereby improving the overall performance of the system.
  • FIG. 1 is a schematic diagram of a logical structure of an NVMe system according to an embodiment of the present application
  • FIG. 2 is a schematic flowchart of a data protection method based on NVMe
  • FIG. 3 is a schematic flowchart of a data protection method according to an embodiment of the present application.
  • FIG. 4 is a schematic diagram of a hardware structure of a host according to an embodiment of the present application.
  • FIG. 5 is a schematic diagram of a hardware structure of a controller according to an embodiment of the present application.
  • FIG. 6 is a schematic diagram of a hardware structure of a controller according to an embodiment of the present application.
  • FIG. 7 is a schematic flowchart of a data protection method according to an embodiment of the present application.
  • FIG. 8 is a schematic diagram of an entrance organization structure according to an embodiment of the present invention.
  • FIG. 9 is a schematic diagram of a PCIe address structure according to an embodiment of the invention.
  • FIG. 10 is a schematic diagram of a data storage structure according to an embodiment of the invention.
  • FIG. 11 is a schematic diagram of a logical structure of a data protection device according to an embodiment of the present application.
  • FIG. 12 is a schematic diagram of a logical structure of a data protection device according to an embodiment of the present application.
  • FIG. 13 is a schematic diagram of a logical structure of a data protection device according to an embodiment of the application.
  • first and second use the terms first and second to distinguish between various objects, such as the first instruction and the second instruction, etc., but there is no logical or timing dependency between the respective "first" and "second”.
  • a "data message” refers to a data message sent by a first storage device to a second storage device and carrying load data and an association identifier.
  • the term push means that the first storage device actively sends a data message to the second storage device.
  • the entry is an address space opened by the second storage device to the first storage device
  • the entry address may specifically be a PCIe address
  • the data message may be a PCIe write message.
  • the entry may be an address space opened by the controller of the second storage device to the controller of the first storage device, and the controller of the first storage device may push data to the controller of the second storage device according to the address space.
  • the first storage device may push a data message to the second storage device through the entry, and the data message may carry the entry address.
  • the second storage device After receiving the data message, the second storage device identifies the entry address, and can allocate the corresponding storage space for the entry in the local internal memory, and caches the load data carried in the data message to the storage space instead of storing the load
  • the data is stored in the storage space indicated by the entry address.
  • the internal memory may be specifically the private memory space of the controller.
  • the association identifier carried in the data packet is used to indicate the operation instruction.
  • the association identifier may include the entry address or a part of the entry address field.
  • the storage device includes a controller and a storage medium, and the storage controller is hereinafter referred to as a controller.
  • the execution subject of the storage device is generally a controller.
  • the first storage device includes a first controller and a storage medium
  • the second storage device includes a second controller and a storage medium.
  • the main body that the first storage device interacts with the outside world is the first controller
  • the main body that the second storage device interacts with the outside world is the second controller.
  • the embodiment of the present invention does not distinguish between the storage device and the controller when interacting with the outside world.
  • the specific implementation of the command triggered by the host may be SQE.
  • the host is interconnected with the first storage device and the second storage device through a switching network.
  • the upstream port of the switching network refers to the port interconnecting the switching network and the host.
  • the upstream traffic of the switching network refers to the data traffic interacting with the host.
  • the term host refers to a subject that can interact with a storage device and store data to the storage device.
  • the host can be a physical computer, virtual machine or network card.
  • the embodiment of the present invention does not limit the specific implementation form of the host.
  • the system 100 includes a host 101, a switching network 102, a first storage device 103, a second storage device 105, and at least One other storage device 107.
  • the first storage device 103, the second storage device 105, and at least one other storage device 107 form a redundant array of independent hard disks RAID.
  • the first storage device 103 stores first data
  • the second storage device 105 stores second data
  • at least one other storage device 107 stores at least one third data
  • the second data is the parity result of the first data and at least one third data.
  • the first storage device 103 includes a first controller 104 and a storage medium
  • the second storage device 105 includes a second controller 106 and a storage medium.
  • the second storage device 105 is a backup of the first storage device 103.
  • a group of data having a RAID check relationship is distributed and stored in multiple storage devices, and the multiple storage devices belong to a RAID group.
  • the storage medium is generally a non-volatile storage medium for permanently storing data.
  • the storage medium may be a magnetic medium (for example, a floppy disk, a hard disk, a magnetic tape), an optical medium (for example, an optical disk), or a semiconductor medium (for example, Flash), etc.
  • the embodiments of the present invention do not limit the specific implementation form of the storage medium.
  • the storage medium may further include a remote memory separate from the controller, for example, a storage medium interconnected with the controller through a network.
  • the switching network 102 may be used to refer to any manner or interconnection protocol in which the host 101, the first storage device 103, and the second storage device 105 are interconnected.
  • the switching network 102 may be a PCIe bus, where the PCIe bus may include a PCIe switch, and the PCIe switch is interconnected with the host 101.
  • the switching network 102 may also be an internal interconnect bus of computer equipment, the Internet, an intranet, a local area network (LAN), a wide area network (wide area network, WAN), a storage area network (storage area network, SAN), etc. , Or any combination of the above networks.
  • the embodiment of the present invention does not limit the specific implementation form of the switching network 102.
  • the host 101 when the first data stored in the first storage device 103 needs to be updated, the host 101 also needs to update the second data of the parity result stored in the second storage device 105.
  • the data update process is that the host 101 first reads the first data dold from the first storage device 103, and then XORs the new data with the fourth data dnew to obtain the fifth data, and then reads the first data from the second storage device 105.
  • Two data Pold, and the fifth data of the XOR result of Pold and dold and dnew is XORed again to obtain a new parity result sixth data Pnew.
  • the host 101 then stores the new data dnew in the first storage device 103, and stores the new parity result Pnew in the second storage device 105.
  • the host 101 needs at least two read operations and two write operations.
  • the host 101 when the first data dold stored in the first storage device 103 needs to be updated, the host 101 writes the new data fourth data dnew to the first storage device 103 through a write operation.
  • the first storage device 103 XORs the first data dold and the fourth data dold to obtain fifth data, and then the first storage device 103 actively sends the fifth data to the second storage device 105, and the second storage device 105 transfers the fifth data
  • the data and the old parity check result second data Pold are XORed to obtain a new parity check result Pnew.
  • the host 101 when data needs to be updated, the host 101 needs to perform a write operation once.
  • the XOR operation of the old and new data is completed through the first storage device 103, and the fifth data of the XOR result of the old and new data is actively pushed to the second storage device 105, thereby avoiding the read and write operations of the host 101 to the storage device
  • the upstream port of the switching network 102 interconnecting the first storage device 103, the second storage device 105 and the host 101 is reduced, and the overall performance of the system is improved.
  • FIG. 4 is a schematic structural diagram of a host 400 according to an embodiment of the present application.
  • the data protection system includes a host 400, a first storage device, a second storage device, and at least one other storage device.
  • the first storage device, the second storage device, and at least one other storage device form a RAID of a redundant array of independent hard disks.
  • the first storage device stores first data
  • the second storage device stores second data
  • the at least one other storage device stores at least one third data.
  • the first data and at least one third data belong to the same RAID stripe
  • the first data, the second data, and the third data are all one stripe of the stripe.
  • the second data is a parity check result of the first data and at least one third data.
  • the first storage device includes a first controller and a storage medium
  • the second storage device includes a second controller and a storage medium.
  • the host 400 includes a processor 401 connected to the system memory 402.
  • the processor 301 may be a central processing unit (CPU), an image processor (graphics processing unit, GPU), a field programmable gate array (Field Programmable Gate Array, FPGA), an application specific integrated circuit (Application Specific Integrated Circuit, ASIC) or a digital Signal processor (digital signal processor, DSP) and other calculation logic or any combination of the above calculation logic.
  • the processor 301 may be a single-core processor or a multi-core processor.
  • the processor 401 may further include protection logic 410, and the protection logic 410 may be a specific hardware circuit or a firmware module integrated in the processor 401. If the protection logic 410 is a specific hardware circuit, the protection logic 410 executes the method of the embodiment of the present application, and if the protection logic 410 is a firmware module, the processor 410 executes the firmware code in the protection logic 410 to implement the technology of the embodiment of the present application Program.
  • the protection logic 410 includes: (1) logic (circuit / firmware code) for triggering the first instruction, the first instruction carries an association identifier, the association identifier is used to indicate the second instruction, and the first instruction is used to indicate the first control
  • the device performs an XOR operation on the first data and the fourth data to obtain fifth data, and instructs the first controller to send a data message to the second controller.
  • the data message includes the fifth data and the associated identifier, where the fourth data is Update data of the first data;
  • Logic (circuit / firmware code) of the code used to trigger the second instruction the second instruction is used to instruct the second controller to perform an exclusive OR operation on the fifth data and the second data
  • the sixth data includes: (1) logic (circuit / firmware code) for triggering the first instruction, the first instruction carries an association identifier, the association identifier is used to indicate the second instruction, and the first instruction is used to indicate the first control
  • the device performs an XOR operation on the first data and the fourth data to obtain fifth
  • the bus 409 is used to transfer information between the components of the host 400.
  • the bus 409 may use a wired connection or a wireless connection, which is not limited in this application.
  • the bus 409 is also connected with an input / output interface 405 and a communication interface 403.
  • the input / output interface 405 is connected with an input / output device for receiving input information and outputting operation results.
  • the input / output device can be a mouse, keyboard, monitor, or optical drive.
  • the communication interface 403 is used to implement communication with other devices or networks.
  • the communication interface 403 may be interconnected with other devices or networks in a wired or wireless manner.
  • the host 400 may be interconnected with the switching network through the communication interface 403 and connected to the controller through the switching network.
  • the system memory 402 may include some software, for example, an operating system 408 (such as Darwin, RTXC, LINUX, UNIX, OS X, WINDOWS, or embedded operating system (such as Vxworks)), an application program 407, and a protection module 406.
  • an operating system 408 such as Darwin, RTXC, LINUX, UNIX, OS X, WINDOWS, or embedded operating system (such as Vxworks)
  • an application program 407 such as Vxworks
  • the processor 401 executes the protection module 406 to implement the technical solution of the embodiment of the present application.
  • the protection module 406 includes: (1) a code for triggering a first instruction.
  • the first instruction carries an association identifier, and the association identifier is used to indicate a second instruction, and the first instruction is used to instruct the first controller to
  • the fourth data performs an exclusive OR operation to obtain fifth data, and instructs the first controller to send a data message to the second controller.
  • the data message includes the fifth data and the associated identifier, where the fourth data is the update data of the first data (2)
  • a code for triggering a second instruction the second instruction is used to instruct the second controller to perform an exclusive OR operation on the fifth data and the second data to obtain sixth data.
  • FIG. 4 is merely an example of a host 400.
  • the host 400 may include more or fewer components than those shown in FIG. 4, or have different component configurations.
  • various components shown in FIG. 4 may be implemented by hardware, software, or a combination of hardware and software.
  • FIG. 5 is a schematic structural diagram of a controller 500 according to an embodiment of the present application.
  • the data protection system includes a host, a first storage device, a second storage device, and at least one other storage device.
  • the first storage device, the second storage device, and at least one other storage device form an independent hard disk redundancy Array RAID, where the first data is stored in the first storage device, the second data is stored in the second storage device, at least one third data is stored in at least one other storage device, the first data and the at least one third data belong to the same One RAID stripe, the second data is a parity result of the first data and at least one third data,
  • the first storage device includes a first controller and a storage medium, and the second storage device includes a second controller and a storage medium.
  • the controller 500 includes a processor 501 connected to the system memory 502.
  • the processor 401 may be computational logic such as CPU, GPU, FPGA, ASIC, or DSP, or any combination of the above.
  • the processor 401 may be a single-core processor or a multi-core processor.
  • the processor 501 may further include protection logic 505, and the protection logic 505 may be a specific hardware circuit or a firmware module integrated in the processor 501. If the protection logic 505 is a specific hardware circuit, the protection logic 505 executes the method of the embodiment of the present application, and if the protection logic 505 is a firmware module, the processor 501 executes the firmware code in the protection logic 505 to implement the technology of the embodiment of the present application Program.
  • the protection logic 505 includes: (1) logic (circuit / firmware code) for acquiring the first instruction and the fourth data triggered by the host, the first instruction carries an association identifier, and the association identifier is used to indicate the second instruction, and the fourth data is Update data of the first data; (2) Logic (circuit / firmware code) used to XOR the first data and the fourth data after acquiring the first instruction; (3) Used to send 2.
  • the data message contains the fifth data and the associated identifier.
  • the bus 507 is used to transfer information between the components of the controller 500.
  • the bus 507 may use a wired connection or a wireless connection, which is not limited in this application.
  • the bus 507 may also be connected with a communication interface 503.
  • the communication interface 503 is used to realize communication with other devices or networks.
  • the communication interface 503 may be interconnected with other devices or networks in a wired or wireless manner.
  • the controller 500 is interconnected with the switching network and the storage medium through the communication interface 503.
  • the system memory 502 may include some software, for example, an operating system 504 (such as Darwin, RTXC, LINUX, UNIX, OS X, WINDOWS, macOS, or embedded operating system (such as Vxworks)) and a protection module 506.
  • an operating system 504 such as Darwin, RTXC, LINUX, UNIX, OS X, WINDOWS, macOS, or embedded operating system (such as Vxworks)
  • the processor 501 executes a protection module 506 to implement the technical solution of the embodiment of the present application.
  • the protection module 506 includes: (1) a code for acquiring the first instruction and the fourth data triggered by the host, the first instruction carries an association identifier, the association identifier is used to indicate the second instruction, and the fourth data is the update of the first data Data; (2) a code for XORing the first data and the fourth data to obtain the fifth data after acquiring the first instruction; (3) a code for sending the data message to the second storage device, the The data message contains the fifth data and the associated identification.
  • FIG. 5 is only an example of a controller 500, and the controller 500 may include more or fewer components than those shown in FIG. 5, or have different component configurations. Meanwhile, various components shown in FIG. 5 may be implemented by hardware, software, or a combination of hardware and software.
  • FIG. 6 is a schematic structural diagram of a controller 600 according to an embodiment of the present application.
  • the data protection system includes a host, a first storage device, a second storage device, and at least one other storage device.
  • the first storage device, the second storage device, and at least one other storage device form an independent hard disk redundancy Array RAID, where the first data is stored in the first storage device, the second data is stored in the second storage device, at least one third data is stored in at least one other storage device, the first data and the at least one third data belong to The same RAID stripe, the second data is the parity result of the first data and the at least one third data, the second data and the first data belong to the same RAID stripe, and the first storage device includes the first controller and The storage medium, the second storage device includes a second controller and a storage medium.
  • the controller 600 includes a processor 601 connected to the system memory 602.
  • the processor 401 may be computational logic such as CPU, GPU, FPGA, ASIC, or DSP, or any combination of the above.
  • the processor 401 may be a single-core processor or a multi-core processor.
  • the processor 601 may further include a register, and the register may be opened to be accessed by controllers of other storage devices. More specifically, the register can be used as a PCIe address space to be opened to controllers of other storage devices for the controllers of other storage devices to access through the PCIe address.
  • the processor 601 may further include protection logic 605, and the protection logic 605 may be a specific hardware circuit or a firmware module integrated in the processor 601. If the protection logic 605 is a specific hardware circuit, the protection logic 605 executes the method of the embodiment of the present application; if the protection logic 605 is a firmware module, the processor 601 executes the firmware code in the protection logic 605 to implement the technology of the embodiment of the present application Program.
  • the protection logic 605 includes: (1) logic (circuit / firmware code) for acquiring operation instructions triggered by the host; (2) logic (circuit / firmware code) for receiving data messages sent by the first storage device, data The message contains fifth data and an associated identifier.
  • the fifth data is the XOR result of the first data and the fourth data.
  • the fourth data is the updated data of the first data.
  • the associated identifier is used to indicate the operation instruction; (3)
  • the logic (circuit / firmware code) of the sixth data is obtained by XORing the fifth data and the second data according to the second instruction.
  • the bus 607 is used to transfer information between the components of the controller 600.
  • the bus 607 may use a wired connection or a wireless connection, which is not limited in this application.
  • the bus 607 can also be connected with a communication interface 603.
  • the communication interface 603 is used to implement communication with other devices or networks.
  • the communication interface 603 may be interconnected with other devices or networks in a wired or wireless manner.
  • the controller 600 is interconnected with the host and the storage medium through the communication interface 603.
  • the controller 600 may also be connected to the network through the communication interface 603 and interconnected with the host or the storage medium through the network.
  • the system memory 602 may include some software, for example, an operating system 604 (such as Darwin, RTXC, LINUX, UNIX, OS X, WINDOWS, macOS, or embedded operating system (such as Vxworks)) and a protection module 606.
  • an operating system 604 such as Darwin, RTXC, LINUX, UNIX, OS X, WINDOWS, macOS, or embedded operating system (such as Vxworks)
  • the processor 601 executes the protection module 606 to implement the technical solution of the embodiment of the present application.
  • the protection module 606 includes: (1) a code for acquiring an operation instruction triggered by a host; (2) a code for receiving a data message sent by the first storage device, the data message includes fifth data and an association identifier, and the fifth The data is the XOR result of the first data and the fourth data, the fourth data is the updated data of the first data, and the association mark is used to indicate the operation instruction; (3) is used to compare the fifth data and the second data according to the second instruction Perform the exclusive OR operation to get the code of the sixth data.
  • FIG. 6 is merely an example of a controller 600.
  • the controller 600 may include more or fewer components than those shown in FIG. 6, or have different component configurations. Meanwhile, various components shown in FIG. 6 may be implemented by hardware, software, or a combination of hardware and software.
  • inventions of the present invention provide a data protection method.
  • the method may be specifically a data protection method based on NVMe.
  • the data protection system includes a host, a first storage device, a second storage device and at least one other storage device, the first storage device, the second storage device and at least one other storage device form a redundant array of independent hard disks RAID, the first storage device Where the first data is stored, the second data is stored in the second storage device, at least one third data is stored in at least one other storage device, the first data and the at least one third data belong to the same RAID stripe, the second The data is a parity check result of the first data and at least one third data.
  • the first storage device includes a first controller and a storage medium
  • the second storage device includes a second controller and a storage medium. As shown in FIG. 7, the method 700 includes:
  • Step 701 The host triggers the first instruction.
  • the first command is generated by the host, the host sends the first command to the first controller; or the first command is generated by the host, the host adds the first command to the queue for the first controller to read, this implementation
  • the host adds the first command to the queue for the first controller to read
  • the first instruction carries an association identifier, and the association identifier is used to indicate the second instruction.
  • the first instruction may specifically be NVMe-based SQE.
  • the first instruction is SQE as an example for explanation. However, it should be understood that the embodiment of the present invention does not limit the specific implementation form of the first instruction.
  • the process for the host to trigger the first instruction can refer to the NMVe standard.
  • the host writes the SQE to the sending queue associated with the first controller, and notifies the first controller of the new SQE through the doorbell.
  • the first command triggered by the host may also be implemented in other forms.
  • the host may directly send the first command to the first controller.
  • the invention does not limit the specific implementation form of the host triggering the first instruction.
  • Step 702 The host triggers the second instruction.
  • the second command is generated by the host, and the host sends the second command to the second controller; or the second command is generated by the host, the host adds the second command to the queue for the second controller to read, this implementation
  • the second command is generated by the host, the host adds the second command to the queue for the second controller to read, this implementation
  • the host adds the second command to the queue for the second controller to read
  • the second instruction may be NVMe-based SQE.
  • the second instruction is SQE as an example for explanation. However, it should be understood that the embodiment of the present invention does not limit the specific implementation form of the second instruction.
  • the host triggering the second instruction may be that the host writes the second instruction to the sending queue associated with the second controller, and notifies the second controller of the new SQE through the doorbell.
  • the second command triggered by the host may also be implemented in other forms. For example, the host may directly send the second command to the second controller.
  • the invention does not limit the specific implementation form of the host triggering the second instruction.
  • Step 703 The first controller obtains the first instruction.
  • the first controller may obtain the first instruction from the sending queue associated with the host. Specifically, the first controller receives the doorbell notification of the host, the doorbell is used to indicate that a new SQE arrives in the sending queue, and the first controller goes to the sending queue to obtain the SQE. The first controller may also directly receive the first command sent by the host.
  • the embodiment of the present invention does not limit the specific implementation form of the first controller acquiring the first instruction.
  • Step 704 The first controller obtains fourth data.
  • the fourth data is the updated data of the first data. That is, the fourth data will replace the first data in the first storage device.
  • the format of the first instruction may refer to the NVMe standard, and the host may indicate the address information of the fourth data through the PRP or SGL field of SQE in the first instruction.
  • the first controller reads the fourth data from the host side according to the address information.
  • the host may also directly send the fourth data to the first controller, and the first controller directly receives the fourth data from the host.
  • the embodiment of the present invention does not limit the specific implementation form of the first controller acquiring the fourth data.
  • the first controller After acquiring the fourth data, the first controller stores the fourth data in the storage medium of the first storage device.
  • Step 705 After acquiring the first instruction, the first controller performs an exclusive-OR operation on the first data and the fourth data to obtain fifth data.
  • the first data is old data dold stored in the first storage device
  • the fourth data is update data dnew of the first data
  • the second data is old parity stored in the second storage device
  • the verification result is Pold.
  • the calculation method of the new parity result Pnew is as follows:
  • the first controller first calculates the XOR result of the first data and the fourth data.
  • Step 706 The first controller sends a data message to the second controller.
  • the data packet contains the fifth data and the association identifier.
  • the first controller may divide the fifth data into multiple data packets and send the data to the second controller.
  • the first controller may actively push the data message to the second controller.
  • the association identifier carried in the data packet is used to associate the fifth data with the second instruction.
  • the embodiment of the present invention does not limit the specific implementation manner of the association identifier.
  • the association identifier may directly or indirectly indicate the second instruction corresponding to the fifth data carried in the data packet.
  • the data message may be a PCIe write operation message. More specifically, the data message may be a transaction layer packet (TLP), and the load data may be a payload carried in the TLP, and the association identifier It can be the PCIe address of the TLP or a partial field of the PCIe address.
  • TLP transaction layer packet
  • the load data may be a payload carried in the TLP
  • the association identifier It can be the PCIe address of the TLP or a partial field of the PCIe address.
  • the second controller opens a part of its address space to the first controller. More specifically, the address space opened by the second controller to the first controller may serve as the PCIe address space of the second controller.
  • the first controller can access the PCIe address access.
  • the second controller may open a part of the PCIe address of the base address register to the first controller for access.
  • the base address register is used as an example for illustration, but it should be understood that the embodiment of the present invention does not limit the type and form of the address space that the second controller opens to the first controller for access.
  • the second controller may organize a part of the PCIe addresses of the base address register into a portal, and each entry occupies a part of the PCIe address space of the base address register.
  • the first controller may write a data message to the second controller through the portal.
  • the entry is the data entry for the PCIe write operation from the first controller to the second controller. In the following description, the function of the entry will be described in more detail.
  • the data message pushed by the first controller to the second controller may be a PCIe message.
  • the first controller writes the fifth data associated with the second instruction to the second control through the entry
  • the address segment of the PCIe message indicates the entry corresponding to the write operation, that is, the entry address is a PCIe address or a partial field of the PCIe address in the data message.
  • the association identifier may be an entry address or a partial field of the entry address.
  • the second controller is also used to determine the storage address of the second instruction according to the association identifier, and obtain the second instruction according to the storage address of the second instruction.
  • the address for storing the second instruction may be the address of the slot in the commit queue where the second instruction is stored.
  • the host and the second controller maintain the correspondence between the entry and the slot in the sending queue.
  • the host stores the second command in the slot of the sending queue corresponding to the entry indicated by the association identifier, and carries the association identifier in the first instruction.
  • the first controller sends a data message to the second controller according to the association identifier, and the data message carries the association identifier.
  • the second controller determines the slot in the sending queue associated with the host to store the second address according to the association identifier, and obtains the second instruction associated with the fifth data from the slot.
  • the present invention does not limit the organization of entries in the PCIe address space, but only needs to ensure that each entry corresponds to a specific second instruction uniquely during the data protection operation, and each entry is uniquely associated with a specific second instruction.
  • a part of the PCIe address of the base address register of the second controller may be organized in the form of through holes (aperture), and each through hole contains multiple entries, that is, the entries may be organized in the form of an array, which is added through the array base address The port offset is addressed to the entrance, and this array is called a via.
  • Each entry is associated with a slot in the send queue.
  • Fig. 8 is a schematic diagram of the structure of the base address register. As shown in Fig. 8, each through hole is composed of a group of entries P0 to PN.
  • the PCIe address structure includes the base address of BAR, the via offset, and the entry offset. Among them, the BAR and the through hole offset are used to uniquely determine the through hole, and the entrance offset is used to indicate a specific entrance in the through hole.
  • the fifth data is "pushed" by the first controller to the second controller through the PCIe BAR hole.
  • “Push” refers to the PCIe write transaction initiated by the first controller.
  • the entries may also be arbitrarily distributed in the PCIe address space, and arbitrarily distributed entries in the PCIe space are called arbitrary "data entries”.
  • the association identifier is an entry address or a partial field of the entry address.
  • the host and the second controller maintain the correspondence between the entry and the slot in the SQ, and the SQ slot corresponds to the entry in a one-to-one relationship.
  • the host triggers the first instruction and the second instruction through the correspondence between the entry and the SQ slot.
  • the second controller may obtain the corresponding second instruction according to the association identifier in the data packet.
  • the SQ slot storing the second instruction is used to associate the entry with the second instruction, and the second instruction corresponding to the entry is determined by the SQ slot.
  • the association identifier may also be indication information of the second instruction.
  • the association identifier may further include a partial field of the second instruction, and the second controller obtains the second instruction according to the association identifier.
  • the second instruction may be SQE, and the indication information associated with the SQE is used to uniquely determine an SQE.
  • the SQE indication information is carried in the data message, so that the association between the SQE and the fifth data is directly realized, rather than the indirect association through the SQ slot.
  • the associated identifier may consist of "queue ID + CID”. If the CID of each SQE is unique, the association identifier may be the CID carried by the corresponding SQE. In other implementations, the association identifier may also be part of the CID.
  • the association identifier may also be specified using a specifically defined SGL type or SGL subtype or other fields in the SQE, as long as the second controller can uniquely determine the second instruction according to the association identifier, the embodiment of the present invention is not limited The specific implementation of the association identification.
  • the first instruction is used to instruct the first controller to perform the XOR operation on the first data and the fourth data, and instruct the first controller to change the XOR operation result of the first data and the fourth data.
  • Five data and the associated identifier are sent to the second controller.
  • Step 707 The second controller obtains the second instruction.
  • the second controller may obtain the second instruction from the sending queue associated with the host. More specifically, the second controller receives the doorbell notification of the host, the doorbell is used to indicate that a new SQE arrives in the sending queue, and after receiving the doorbell of the host, the controller goes to the sending queue to obtain the second instruction.
  • the second controller may also directly receive the second command sent by the host.
  • the embodiment of the present invention does not limit the specific implementation form of the second controller acquiring the second instruction.
  • the format of the second instruction may refer to the NVMe standard.
  • the second instruction is associated with the association identifier, and the fifth data is actively pushed to the second controller by the first controller.
  • the second command is no longer required.
  • the second controller actively takes the PCIe read operation to obtain data from the host, so the second command does not need to carry the address information of the data through the SGL field or the PRP field.
  • the SGL domain or PRP domain of the second instruction may not carry other information, and the processing method of the SGL domain or PRP domain by the second controller may be "ignore", that is, the SGL or PRP may be omitted in the embodiment of the present invention .
  • the association identifier may be an entry address or a partial field of the entry address.
  • the second controller maintains the correspondence between the entry and the slot in the sending queue. After receiving the data message, the second controller is also used to determine the storage address of the second instruction according to the association identifier, and obtain the second instruction according to the storage address of the second instruction.
  • the association identifier may also be indication information of the second instruction.
  • the association identifier may also include some fields of the second instruction.
  • the second controller may also search for the second instruction indicated by the association identifier in the sending queue according to the association identifier.
  • Step 708 The second controller obtains the data to be fifth.
  • the data message carries fifth data.
  • the address information carried in the data message indicates an entry of the second controller.
  • the entry of the second controller is used to receive the data message and is an entry for the first controller to send the data message to the second controller.
  • the storage space for the fifth data may be the internal memory of the second controller, instead of storing the fifth data in the storage space indicated by the entry address.
  • the second controller may allocate a specific storage block in its own internal memory for each entry to store the fifth data received by the entry.
  • the second controller may establish a mapping relationship between the storage block and the entry.
  • the internal memory used by the second controller to store data can no longer be accessed by the outside world through PCIe addressing, nor is it also used as a command memory buffer.
  • the embodiment of the present invention does not limit the specific implementation of the storage block for storing fifth data the way.
  • the first controller may use multiple data packets to send the fifth data.
  • the second controller may use the root data structure to organize the data received from the portal.
  • the data message may specifically be a PCIe write message, and the first controller writes the fifth data to the second controller through the PCIe write operation.
  • the second controller can organize the data into a root data structure to facilitate data management.
  • the second controller after receiving the data message, decodes the address of the data message and identifies the associated identifier, identifies the entry and root data structure according to the associated identifier, and allocates free memory blocks for data from the memory storage , And save the data to the allocated memory block, and attach the memory block to the root data structure.
  • the second controller first stores the data in its own internal memory. When certain conditions are met, the data stored in the internal memory is XORed with the second data or some fields of the second data. The satisfying condition here may be that the second controller obtains the second instruction, or the amount of data stored in the internal memory is accumulated to the extent that the second NMVe controller can perform an XOR operation on it.
  • the internal memory of the second controller may be the private memory of the controller.
  • the embodiment of the present invention does not limit the order in which the second controller acquires the data message and the second instruction.
  • the second controller may first receive the data message pushed by the first controller, and determine the second instruction according to the association identifier.
  • the second controller may also obtain the second instruction first, and then obtain the corresponding fifth data according to the second instruction.
  • the second controller may determine the association identifier according to the second instruction, and then determine the corresponding entry according to the association identifier, and obtain the stored load data from the storage space allocated to the entry according to the association identifier.
  • the embodiment of the present invention does not limit the order in which the fifth data corresponding to the second instruction and the second instruction itself arrive at the second controller.
  • the second controller may maintain a one-to-one correspondence between the SQ slot and the entry.
  • the entry corresponding to the second instruction may be determined according to the maintained correspondence. If the second controller detects that no data has arrived at the corresponding entry, the second controller suspends the second instruction and waits for the data to arrive. Until the second controller detects that data has arrived at the corresponding entry, it can perform an exclusive OR operation on the fifth data and the second data.
  • the second controller detects that the second instruction corresponding to the data has not reached the second controller or the corresponding SQ slot according to the association identifier carried in the data packet. Then the second controller can attach the data to the root data structure and wait for the relevant second instruction to arrive until the corresponding second instruction reaches the second controller or the addressable SQ slot of the second controller. Obtain the second instruction, and perform an exclusive OR operation on the fifth data and the second data according to the second instruction, thereby obtaining sixth data.
  • the second instruction is used to instruct the second controller to perform an XOR operation on the second data and the fifth data to obtain the latest parity check result of the stripe.
  • Step 709 The second controller performs an exclusive OR operation on the fifth data and the second data according to the second instruction to obtain sixth data.
  • the second instruction is used to instruct the second controller to perform an XOR operation on the second data and the fifth data to obtain the latest parity check result of the stripe.
  • the data is parity data of the fourth data and the at least one third data.
  • the sixth data is stored in the storage medium of the second storage device.
  • the first controller may send the fifth data through multiple data packets, and the second controller receives the data pushed by the first controller through the portal and the second controller combines the received data with the second XOR operations can be performed in parallel on some fields of the data. If the data processing currently received through the portal is completed, that is, the data currently received through the portal has been XORed with the corresponding field of the second data, but the system needs more data to complete the data protection, the second controller hangs The second instruction waits for data to arrive.
  • Step 710 The second controller triggers the completion message.
  • the completion message is used to instruct the second controller to complete the XOR operation on the fifth data and the second data.
  • the completion message may be a trigger queue entry (completion queue entry, CQE).
  • the trigger completion message of the second controller may specifically be that after the second controller completes the write operation, the CQE is written into a completion queue (CQ), and the host is notified by an interrupt.
  • the host triggers the first instruction to the first controller and triggers the second instruction to the second controller.
  • the first instruction triggered by the host to the first controller carries an association identifier indicating the second instruction.
  • the first controller After acquiring the fourth data of the new data, the first controller XORs the fourth data of the new data and the first data of the old data to obtain the fifth data, and actively sends a data message to the second controller, which is carried in the data message The fifth data and the associated identification.
  • the second controller After obtaining the data message, the second controller associates the second instruction and the fifth data according to the association identifier, and performs an exclusive OR operation on the fifth data and the old parity check result second data according to the second instruction to obtain a new parity The sixth data of the verification result.
  • the host is prevented from reading and writing the storage device multiple times during the data update process.
  • the data traffic of the upstream port of the switching network interconnecting the host with the first storage device and the second storage device is greatly reduced, thereby improving the overall performance of the system.
  • the data protection system includes a data protection device 1100, a first storage device, a second storage device and at least one other storage device, the first storage device, the second storage device and at least one other storage device form a redundant array of independent hard disks RAID, the first A storage device stores first data, a second storage device stores second data, at least one other storage device stores at least one third data, and the first data and at least one third data belong to the same RAID stripe
  • the second data is a parity check result of the first data and at least one third data.
  • the first storage device includes a first controller and a storage medium, and the second storage device includes a second controller and a storage medium.
  • the data protection device 1100 includes a processing unit 1101 and an acquisition unit 1102, where,
  • the processing unit 1101 is used to trigger a first instruction, the first instruction carries an association identifier, and the association identifier is used to indicate a second instruction; the first instruction is used to instruct the first controller to perform an XOR operation on the first data and the fourth data to obtain the first Five data, and instructs the first controller to send a data message to the second controller, where the data message contains the fifth data and the associated identifier, where the fourth data is the updated data of the first data.
  • the processing unit 1101 is further configured to trigger a second instruction, and the second instruction is used to instruct the second controller to perform an exclusive OR operation on the fifth data and the second data to obtain sixth data.
  • the backup device 1100 further includes an obtaining unit 1102, configured to obtain a completion message triggered by the second controller, and the completion message is used to instruct the second controller to complete the XOR operation on the fifth data and the second data.
  • an obtaining unit 1102 configured to obtain a completion message triggered by the second controller, and the completion message is used to instruct the second controller to complete the XOR operation on the fifth data and the second data.
  • the data message is a PCIe message
  • the association identifier includes the PCIe address field of the second controller.
  • the association identifier includes a partial field of the second instruction.
  • the processing unit 1101 and the obtaining unit 1102 may be implemented by the protection logic 410 in the processor 401 in FIG. 4 or may be implemented by the processor 401 in FIG. 4 and the protection module 406 in the system memory 402 achieve.
  • the embodiments of the present application are the embodiments of the host device corresponding to the above embodiments, and the feature descriptions in the above embodiments are applicable to the embodiments of the present application, which will not be repeated here.
  • the data protection system includes a host, a first storage device, a second storage device and at least one other storage device, the first storage device, the second storage device and at least one other storage device form a redundant array of independent hard disks RAID, the first storage device Where the first data is stored, the second data is stored in the second storage device, at least one third data is stored in at least one other storage device, the first data and the at least one third data belong to the same RAID stripe, the second The data is a parity check result of the first data and at least one third data.
  • the first storage device includes a data protection device 1200 and a storage medium
  • the second storage device includes a controller and a storage medium.
  • the backup device 1200 includes a processing unit 1201 and a sending unit 1202, where,
  • the processing unit 1201 is used to obtain the first instruction and the fourth data triggered by the host, the first instruction carries an association identifier, and the association identifier is used to indicate the second instruction, and after obtaining the first instruction, the first data and the fourth data are different Or the operation obtains the fifth data, wherein the fourth data is the updated data of the first data.
  • the sending unit 1202 is configured to send a data message to the controller.
  • the data message includes fifth data and an association identifier.
  • the data message is a PCIe message
  • the association identifier includes the PCIe address field of the controller.
  • the association identifier includes a partial field of the second instruction.
  • the processing unit 1201 and the sending unit 1202 may be implemented by the protection logic 505 in the processor 501 in FIG. 5 or by the processor 501 in FIG. 5 and the protection module 506 in the system memory 502 achieve.
  • the embodiments of the present application are the device embodiments of the first controller corresponding to the above embodiments, and the feature descriptions in the above embodiments are applicable to the embodiments of the present application, which will not be repeated here.
  • the data protection system includes a host, a first storage device, a second storage device and at least one other storage device, the first storage device, the second storage device and at least one other storage device form a redundant array of independent hard disks RAID, the first storage device Where the first data is stored, the second data is stored in the second storage device, at least one third data is stored in at least one other storage device, the first data and the at least one third data belong to the same RAID stripe, the second The data is a parity check result of the first data and at least one third data.
  • the first storage device includes a controller and a storage medium
  • the second storage device includes a data protection device 1300 and a storage medium.
  • the backup device 1300 includes an acquisition unit 1301 and a processing unit 1302, where,
  • the obtaining unit 1301 is used to obtain an operation instruction triggered by the host, and receive a data message sent by the controller.
  • the data message includes fifth data and an association identifier.
  • the fifth data is the XOR result of the first data and the fourth data.
  • the fourth data is the updated data of the first data, and the associated identifier is used to indicate the operation instruction.
  • the processing unit 1302 is configured to perform an exclusive OR operation on the fifth data and the second data according to the second instruction to obtain sixth data.
  • the data message is a PCIe message
  • the association identifier includes a PCIe address field of the data protection device 1301.
  • the data protection device 1300 further includes an internal memory, and before the XOR operation is performed on the fifth data and the second data, the processing unit 1302 is also used to store the fifth data in the storage space of the internal memory, and record the storage space and The mapping relationship between association IDs.
  • the obtaining unit 1301 is further configured to determine the storage location of the operation instruction according to the association identifier, and obtain the operation instruction according to the storage location of the operation instruction.
  • the association identifier includes a partial field of the operation instruction
  • the obtaining unit 1301 is further configured to obtain the second instruction according to the partial field of the operation instruction.
  • processing unit 1302 is also used to trigger a completion message, and the completion message is used to instruct the data protection device 1300 to complete the XOR operation on the fifth data and the second data.
  • the acquiring unit 1301 and the processing unit 1302 may be specifically implemented by the protection logic 605 in the processor 601 in FIG. 6 or may be implemented by the processor 601 in FIG. 6 and the protection module 606 in the system memory 602 to fulfill.
  • the embodiments of the present application are the device embodiments of the second controller corresponding to the above embodiments, and the feature descriptions in the above embodiments are applicable to the embodiments of the present application, and are not repeated here.

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Abstract

A data protection method and apparatus, and a system. The system comprises a host, a first storage device, a second storage device, and at least one other storage device, wherein first data is stored in the first storage device, the second data is stored in the second storage device, and the second data is a parity result of the first data and at least one third data. The host is configured to trigger a first instruction and a second instruction, the first instruction carrying an association identifier for indicating the second instruction. The first storage device is configured to acquire the first instruction and fourth data, to perform exclusive OR operation on the first data and the fourth data after acquiring the first instruction to obtain fifth data, and to send a data message to a second controller, the data message comprising the fifth data and the association identifier. The second storage device is configured to acquire the second instruction and the data message, and to perform exclusive OR operation on the fifth data and the second data according to the second instruction to obtain sixth data.

Description

一种数据保护方法、装置及***Data protection method, device and system 技术领域Technical field
本申请涉及存储领域,尤其涉及一种数据保护的方法、装置和***。This application relates to the storage field, and in particular, to a data protection method, device, and system.
背景技术Background technique
随着存储技术的发展,尤其是在使用闪存(Flash)作为存储介质的固态硬盘(solid state drive,SSD)中,传统的机械硬盘设计的串行高级技术附件(serial advanced technology attachment,SATA)接口与串行ATA高级主控接口/高级主机控制器接口(Serial ATA Advanced Host Controller Interface,AHCI)标准已经无法满足存储设备的要求,成为限制存储设备处理能力的一大瓶颈。非易失性高速传输总线(non-volatile memory express,NVMe)应运而生,NVMe是一种允许主机(Host)和非易失性存储(non-volatile memory,NVM)子***通信的接口,NVM子***(包括控制器和存储介质)通信的该接口以寄存器接口的方式附加到高速***部件互连总线(Peripheral Component Interconnect express,PCIe)接口之上,为企业级和消费级固态存储做了优化具有性能高、访问时延低的优势。With the development of storage technology, especially in solid state drives (SSDs) that use flash memory (Flash) as a storage medium, the serial advanced technology attachment (SATA) interface of the traditional mechanical hard disk design The Serial ATA Advanced Host Control Interface / Advanced Host Controller Interface (Serial ATA Advanced Host Controller Interface, AHCI) standard has been unable to meet the requirements of storage devices and has become a major bottleneck restricting the processing capabilities of storage devices. Non-volatile high-speed transmission bus (non-volatile memory express, NVMe) came into being, NVMe is a kind of interface that allows the host (Host) and non-volatile storage (non-volatile memory, NVM) subsystem to communicate, NVM This interface for communication between subsystems (including controllers and storage media) is attached to the Peripheral Component Interconnect Express (PCIe) interface in the form of a register interface, optimized for enterprise and consumer solid-state storage It has the advantages of high performance and low access delay.
现有技术中,一种数据保护的方式是将多个存储装置组整一个独立硬盘冗余阵列(Redundant Array of Independent Disks,RAID)。对于一个RAID分条,该多个存储装置中的一个存储装置存储其他存储装置中存储的属于该RAID分条的数据的奇偶校验结果。当其中一个存储装置中存储的属于该RAID分条的数据需要更新时,主机在更新奇偶校验结果时,需要从存储需要更新数据的存储装置中读取需要更新的旧数据,并从存储奇偶校验结果的存储装置中读取出旧的奇偶校验结果,对旧数据,新数据和该旧的奇偶校验结果进行异或操作得到新的奇偶校验结果,并将该新的奇偶校验结果存储于用于存储该RAID分条的奇偶校验结果的存储装置。In the prior art, one method of data protection is to group multiple storage devices into a Redundant Array of Independent Disks (RAID). For a RAID stripe, one storage device in the plurality of storage devices stores the parity result of the data belonging to the RAID stripe stored in other storage devices. When the data belonging to the RAID stripe stored in one of the storage devices needs to be updated, the host needs to read the old data that needs to be updated from the storage device that stores the updated data and update the parity from the storage device that updates the data when updating the parity result The old parity check result is read from the check result storage device, and the old data, the new data and the old parity check result are XORed to obtain a new parity check result, and the new parity check is performed The verification result is stored in a storage device for storing the parity result of the RAID stripe.
发明内容Summary of the invention
本申请公开了一种数据保护方法、装置和***。当需要对数据进行更新时,第一存储装置从主机侧获取到新数据后,会将新数据和旧数据进行异或操作,并主动向存储奇偶校验的第二存储装置推送旧数据和新数据的异或结果,第二存储装置在获取到该旧数据和新数据的异或结果后,直接对旧数据和新数据的异或结果与旧的奇偶校验结果进行异或操作,从而得到对奇偶校验结果进行更新。The present application discloses a data protection method, device and system. When the data needs to be updated, after the first storage device obtains new data from the host side, it will perform an XOR operation on the new data and the old data, and actively push the old data and the new data to the second storage device that stores the parity The XOR result of the data, after acquiring the XOR result of the old data and the new data, the second storage device directly performs an XOR operation on the XOR result of the old data and the new data and the old parity result, thereby obtaining Update the parity check result.
第一方面,本申请公开了一种数据保护***,该***包括主机,第一存储装置,第二存储装置和至少一个其他存储装置。第一存储装置,第二存储装置和至少一个其他存储装置组成一个独立硬盘冗余阵列RAID。其中,第一存储装置中存储有第一数据,第二存储装置中存储有第二数据,该至少一个其他存储装置中存储有至少一个第三数据,第一数据与至少一个第三数据属于同一个RAID分条,第二数据为第一数据与至少一个第三数据的奇偶校验结果。第一存储装置包含第一控制器和存储介质,第二存储装置包含第二控制器和存储介质。主机用于向第一控制器触发第一指令和向第二控制器触发第二指 令,第一指令携带关联标识,关联标识用于指示第二指令。第一控制器用于获取第一指令和第四数据,在获取第一指令后对第一数据和第四数据进行异或操作得到第五数据,并向第二控制器发送数据报文,该数据报文包含第五数据和关联标识,其中第四数据为第一数据的更新数据。第二控制器用于获取第二指令和数据报文,并根据第二指令对第五数据和第二数据进行异或操作得到第六数据。In a first aspect, the present application discloses a data protection system. The system includes a host, a first storage device, a second storage device, and at least one other storage device. The first storage device, the second storage device, and at least one other storage device form a RAID of a redundant array of independent hard disks. Wherein, the first storage device stores first data, the second storage device stores second data, the at least one other storage device stores at least one third data, and the first data and the at least one third data belong to the same One RAID stripe, the second data is the parity result of the first data and at least one third data. The first storage device includes a first controller and a storage medium, and the second storage device includes a second controller and a storage medium. The host is used to trigger a first instruction to the first controller and a second instruction to the second controller. The first instruction carries an association identifier, and the association identifier is used to indicate the second instruction. The first controller is used to obtain the first instruction and the fourth data. After obtaining the first instruction, the first data and the fourth data are XORed to obtain the fifth data, and the data message is sent to the second controller. The message contains fifth data and an associated identifier, where the fourth data is updated data of the first data. The second controller is used to obtain a second instruction and a data message, and perform an exclusive-OR operation on the fifth data and the second data according to the second instruction to obtain sixth data.
其中,第一指令和/或第二指令可以为基于NVMe的提交队列条目(submission queue entry,SQE)。主机触发第一指令可以为将第一指令写入与第一控制器关联的提交队列(submission queue,SQ),并通过门铃机制通知第一控制器。同理,主机触发第二指令可以为主机将第二指令写入与第二控制器关联的SQ,并通过门铃机制通知第二控制器。主机也可以直接将第一指令发送至第一控制器,并将第二指令发送至第二控制器。第一控制器获取到第四数据后,对第一数据和第四数据进行异或操作得到第五数据,并主动向第二控制器发送该第五数据,并在数据报文中携带关联第五数据和第二指令的关联标识。第二指令接收到数据报文后,根据关联标识关联第二指令和第五数据,并根据第二指令对第五数据和第二数据进行异或操作得到新的奇偶校验结果第六数据。在有数据需要更新时,主机不再需要对存储装置进行多次读写操作,主机与第一存储装置和第二存储装置互联的交换网络的上行端口的数据流量大大较少。The first instruction and / or the second instruction may be a submission queue entry (SQE) based on NVMe. The host triggering the first instruction may be writing the first instruction into a submission queue (SQ) associated with the first controller, and notifying the first controller through the doorbell mechanism. Similarly, the host triggering the second instruction may be that the host writes the second instruction to the SQ associated with the second controller, and notifies the second controller through the doorbell mechanism. The host may also directly send the first instruction to the first controller, and send the second instruction to the second controller. After acquiring the fourth data, the first controller performs an XOR operation on the first data and the fourth data to obtain fifth data, and actively sends the fifth data to the second controller, and carries the associated first data in the data packet. 5. The associated identification of the data and the second instruction. After receiving the data message, the second instruction associates the second instruction and the fifth data according to the association identifier, and performs an exclusive-OR operation on the fifth data and the second data according to the second instruction to obtain a new parity result sixth data. When data needs to be updated, the host no longer needs to perform multiple read and write operations on the storage device, and the data traffic of the uplink port of the switching network interconnecting the host with the first storage device and the second storage device is greatly reduced.
根据第一方面,在第一方面的第一种可能的实现方式中,该数据报文为PCIe报文,关联标识包含第二控制器的PCIe地址字段。第一控制器可以通过PCIe报文的形式向第二控制器写入第五数据,关联标识指示的PCIe地址是写入第五数据的入口。第二控制器可以根据PCIe报文的地址确定与该第五数据关联的第二指令。According to the first aspect, in a first possible implementation manner of the first aspect, the data message is a PCIe message, and the association identifier includes the PCIe address field of the second controller. The first controller may write fifth data to the second controller in the form of a PCIe message, and the PCIe address indicated by the association identifier is an entry for writing fifth data. The second controller may determine the second instruction associated with the fifth data according to the address of the PCIe message.
根据第一方面或第一方面第一种可能的实现方式,在第一方面第二种可能的实现方式中,第二控制器包含内部存储器,第二控制器对第五数据和第二数据进行异或操作之前,还用于将第五数据存入内部存储器的存储空间,并记录存储空间与关联标识之间的映射关系。本发明不限定第二控制器获取第二指令和第五数据的顺序,第二控制器可以首先接收到数据报文后,并将第五数据缓存在自己的内部存储器中,并记录第五数据的存储空间与关联标识的映射关系。According to the first aspect or the first possible implementation manner of the first aspect, in the second possible implementation manner of the first aspect, the second controller includes an internal memory, and the second controller performs the fifth data and the second data Before the XOR operation, it is also used to store the fifth data in the storage space of the internal memory, and record the mapping relationship between the storage space and the associated identifier. The present invention does not limit the order in which the second controller obtains the second instruction and the fifth data. The second controller may first receive the data packet, and cache the fifth data in its own internal memory, and record the fifth data The mapping relationship between the storage space and the associated ID.
根据第一方面或第一方面以上任意种可能的实现方式,在第一方面第三种可能的实现方式中,第二控制器还用于根据关联标识确定第二指令的存储位置,第二控制器用于根据第二指令的存储位置获取第二指令。主机和第二控制器维护有关联标识与发送队列的槽位之间的对应关系,主机在触发第一指令和第二指令的时候,将第二指令存入关联标识对应的SQ槽位中,第二控制器获取到关联标识后,可以根据关联标识确定第二指令存储的SQ槽位,并从该SQ槽位中获取第二指令。According to the first aspect or any possible implementation manner above the first aspect, in a third possible implementation manner of the first aspect, the second controller is further used to determine the storage location of the second instruction according to the association identifier, and the second control The device is used for acquiring the second instruction according to the storage location of the second instruction. The host and the second controller maintain the correspondence between the association identifier and the slot of the sending queue. When the first instruction and the second instruction are triggered, the host stores the second instruction in the SQ slot corresponding to the association identifier. After acquiring the association identifier, the second controller may determine the SQ slot stored in the second instruction according to the association identifier, and obtain the second instruction from the SQ slot.
根据第一方面或第一方面以上任一种可能的实现方式,在第一方面第四种可能的实现方式中,关联标识包含第二指令的部分字段,第二控制器用于根据第二指令的部分字段获取第二指令。关联标识可以为第二指令的指示信息,第二控制器获取到关联标识后,可以根据该关联标识查询第二指令。According to the first aspect or any possible implementation manner of the first aspect above, in a fourth possible implementation manner of the first aspect, the association identifier includes a partial field of the second instruction, and the second controller is configured to Some fields get the second instruction. The association identifier may be indication information of the second instruction. After acquiring the association identifier, the second controller may query the second instruction according to the association identifier.
根据第一方面或第一方面以上任一种可能的实现方式,在第一方面第五种可能的实现方式中,第二控制器还用于触发完成消息,完成消息用于指示第二控制器完成对第五数据和第二数据的异或操作。主机还用于获取完成消息。According to the first aspect or any one of the possible implementation manners above the first aspect, in a fifth possible implementation manner of the first aspect, the second controller is further used to trigger a completion message, and the completion message is used to instruct the second controller The XOR operation on the fifth data and the second data is completed. The host is also used to obtain the completion message.
完成消息可以为触发完成队列条目(completion queue entry,CQE),CQE用于指示第二控制器完成第二指令指示的写操作。第二控制器触发完成消息可以具体为第二控制器完成写操作后,将CQE写入完成队列(completion queue,CQ),并通过中断通知主机。The completion message may be a completion queue entry (CQE), which is used to instruct the second controller to complete the write operation indicated by the second instruction. The trigger completion message of the second controller may specifically be that after the second controller completes the write operation, the CQE is written into a completion queue (CQ), and the host is notified by an interrupt.
第二方面,本发明提供了一种数据保护方法。数据保护***包括主机,第一存储装置,第二存储装置和至少一个其他存储装置,第一存储装置,第二存储装置和至少一个其他存储装置组成一个独立硬盘冗余阵列RAID,第一存储装置中存储有第一数据,第二存储装置中存储有第二数据,至少一个其他存储装置中存储有至少一个第三数据,第一数据与至少一个第三数据属于同一个RAID分条,第二数据为第一数据与至少一个第三数据的奇偶校验结果,第一存储装置包含第一控制器和存储介质,第二存储装置包含第二控制器和存储介质。该方法包括:主机触发第一指令,第一指令携带关联标识,关联标识用于指示第二指令;第一指令用于指示第一控制器对第一数据和第四数据进行异或操作得到第五数据,并指示第一控制器向第二控制器发送数据报文,数据报文包含第五数据和关联标识,其中第四数据为第一数据的更新数据;主机触发第二指令,第二指令用于指示第二控制器对第五数据和第二数据进行异或操作得到第六数据。In a second aspect, the present invention provides a data protection method. The data protection system includes a host, a first storage device, a second storage device and at least one other storage device, the first storage device, the second storage device and at least one other storage device form a redundant array of independent hard disks RAID, the first storage device Where the first data is stored, the second data is stored in the second storage device, at least one third data is stored in at least one other storage device, the first data and the at least one third data belong to the same RAID stripe, the second The data is a parity check result of the first data and at least one third data. The first storage device includes a first controller and a storage medium, and the second storage device includes a second controller and a storage medium. The method includes: the host triggers the first instruction, the first instruction carries an association identifier, and the association identifier is used to indicate the second instruction; the first instruction is used to instruct the first controller to perform an XOR operation on the first data and the fourth data to obtain the first Five data, and instructs the first controller to send a data message to the second controller, the data message contains the fifth data and the associated identifier, wherein the fourth data is the updated data of the first data; the host triggers the second instruction, the second The instruction is used to instruct the second controller to XOR the fifth data and the second data to obtain the sixth data.
根据第二方面,在第二方面的第一种可能的实现方式中,该方法还包括:主机获取第二控制器触发的完成消息,完成消息用于指示第二控制器完成对第五数据和第二数据的异或操作。According to the second aspect, in a first possible implementation manner of the second aspect, the method further includes: the host obtains a completion message triggered by the second controller, and the completion message is used to instruct the second controller to complete the fifth data and XOR operation of the second data.
根据第二方面或第二方面第一种可能的实现方式,在第二方面第二种可能的实现方式中,数据报文为PCIe报文,关联标识包含第二控制器的PCIe地址字段。According to the second aspect or the first possible implementation manner of the second aspect, in a second possible implementation manner of the second aspect, the data message is a PCIe message, and the association identifier includes the PCIe address field of the second controller.
根据第二方面或第二方面第一种可能的实现方式,在第二方面第三种可能的实现方式中,关联标识包含第二指令的部分字段。According to the second aspect or the first possible implementation manner of the second aspect, in a third possible implementation manner of the second aspect, the association identifier includes a partial field of the second instruction.
根据第二方面或第二方面以上任一种可能的实现方式,在第二方面第四种可能的实现方式中,该第一指令和/或第二指令为基于非易失性高速传输总线NVMe的提交队列条目SQE。According to the second aspect or any possible implementation manner of the above second aspect, in a fourth possible implementation manner of the second aspect, the first instruction and / or the second instruction are based on a non-volatile high-speed transmission bus NVMe The submission queue entry SQE.
第三方面,本申请提供了一种可读介质,包括执行指令,当计算设备的处理器执行该执行指令时,该计算设备执行以上第二方面或以上第二方面的任一种可能的实现方式中的方法。In a third aspect, the present application provides a readable medium, including an execution instruction, when the processor of the computing device executes the execution instruction, the computing device executes the second aspect above or any possible implementation of the second aspect above The way in the way.
第四方面,本申请提供了一种计算设备,包括:处理器、存储器和总线;存储器用于存储执行指令,处理器与存储器通过总线连接,当计算设备运行时,处理器执行存储器存储的执行指令,以使计算设备执行以上第二方面或以上第二方面的任一种可能的实现方式中的方法。In a fourth aspect, the present application provides a computing device, including: a processor, a memory, and a bus; the memory is used to store execution instructions, the processor and the memory are connected through the bus, and when the computing device is running, the processor performs the execution of the memory storage Instructions to cause the computing device to perform the method in the above second aspect or any possible implementation manner of the above second aspect.
第五方面,本申请公开了一种数据保护方法。数据保护***包括主机,第一存储装置,第二存储装置和至少一个其他存储装置,第一存储装置,第二存储装置和至少一个其他存储装置组成一个独立硬盘冗余阵列RAID,第一存储装置中存储有第一数据,第二存储装置中存储有第二数据,至少一个其他存储装置中存储有至少一个第三数据,第一数据与至少一个第三数据属于同一个RAID分条,第二数据为第一数据与至少一个第三数据的奇偶校验结果,第一存储装置包含第一控制器和存储介质,第二存储装置包含第二控制器和存储介质;该方法包括:第一控制器获取主机触发的第一指令和第四数据,第 一指令携带关联标识,关联标识用于指示第二指令,第四数据为第一数据的更新数据;第一控制器在获取第一指令后对第一数据和第四数据进行异或操作得到第五数据;第一控制器并向第二控制器发送数据报文,数据报文包含第五数据和关联标识。In a fifth aspect, the present application discloses a data protection method. The data protection system includes a host, a first storage device, a second storage device and at least one other storage device, the first storage device, the second storage device and at least one other storage device form a redundant array of independent hard disks RAID, the first storage device Where the first data is stored, the second data is stored in the second storage device, at least one third data is stored in at least one other storage device, the first data and the at least one third data belong to the same RAID stripe, the second The data is a parity check result of the first data and at least one third data. The first storage device includes a first controller and a storage medium, and the second storage device includes a second controller and a storage medium; the method includes: a first control The first instruction and the fourth data triggered by the host are acquired by the controller, the first instruction carries an association identifier, and the association identifier is used to indicate the second instruction, and the fourth data is the updated data of the first data; after the first controller obtains the first instruction XOR the first data and the fourth data to obtain the fifth data; the first controller sends the data to the second controller Text, data packet contains a fifth data and associated identity.
根据第五方面,在第五方面的第一种可能的实现方式中,该数据报文为PCIe报文,关联标识包含第二控制器的PCIe地址字段。According to the fifth aspect, in a first possible implementation manner of the fifth aspect, the data message is a PCIe message, and the association identifier includes a PCIe address field of the second controller.
根据第五方面,在第五方面第二种可能的实现方式中,关联标识包含第二指令的部分字段。According to a fifth aspect, in a second possible implementation manner of the fifth aspect, the association identifier includes a partial field of the second instruction.
第六方面,本申请提供了一种可读介质,包括执行指令,当计算设备的处理器执行该执行指令时,该计算设备执行以上第五方面或以上第五方面的任一种可能的实现方式中的方法。In a sixth aspect, the present application provides a readable medium, including an execution instruction, and when the processor of the computing device executes the execution instruction, the computing device performs the above fifth aspect or any possible implementation of the above fifth aspect The way in the way.
第七方面,本申请提供了一种计算设备,包括:处理器、存储器和总线;存储器用于存储执行指令,处理器与存储器通过总线连接,当计算设备运行时,处理器执行存储器存储的执行指令,以使计算设备执行以上第五方面或以上第五方面的任一种可能的实现方式中的方法。In a seventh aspect, the present application provides a computing device, including: a processor, a memory, and a bus; the memory is used to store execution instructions, the processor and the memory are connected through the bus, and when the computing device is running, the processor performs the execution of the memory storage Instructions to cause the computing device to perform the method in the above fifth aspect or any possible implementation manner of the above fifth aspect.
第八方面,本申请公开了一种数据保护方法。数据保护***包括主机,第一存储装置,第二存储装置和至少一个其他存储装置,第一存储装置,第二存储装置和至少一个其他存储装置组成一个独立硬盘冗余阵列RAID,第一存储装置中存储有第一数据,第二存储装置中存储有第二数据,至少一个其他存储装置中存储有至少一个第三数据,第一数据与至少一个第三数据属于同一个RAID分条,第二数据为第一数据与至少一个第三数据的奇偶校验结果,第一存储装置包含第一控制器和存储介质,第二存储装置包含第二控制器和存储介质;该方法包括:第二控制器获取主机触发的操作指令;第二控制器接收第一控制器发送的数据报文,数据报文包含第五数据和关联标识,第五数据为第一数据和第四数据的异或结果,第四数据为第一数据的更新数据,关联标识用于指示操作指令;第二控制器根据第二指令对第五数据和第二数据进行异或操作得到第六数据。In an eighth aspect, the present application discloses a data protection method. The data protection system includes a host, a first storage device, a second storage device and at least one other storage device, the first storage device, the second storage device and at least one other storage device form a redundant array of independent hard disks RAID, the first storage device Where the first data is stored, the second data is stored in the second storage device, at least one third data is stored in at least one other storage device, the first data and the at least one third data belong to the same RAID stripe, the second The data is a parity check result of the first data and at least one third data. The first storage device includes a first controller and a storage medium, and the second storage device includes a second controller and a storage medium; the method includes: a second control The controller obtains the operation command triggered by the host; the second controller receives the data message sent by the first controller, the data message contains the fifth data and the association identifier, the fifth data is the XOR result of the first data and the fourth data, The fourth data is the updated data of the first data, and the associated identifier is used to indicate the operation instruction; the second controller Five and second data to obtain a sixth exclusive OR data.
根据第八方面,在第八方面的第一种可能的实现方式中,数据报文为PCIe报文,关联标识包含第二控制器的PCIe地址字段。According to the eighth aspect, in a first possible implementation manner of the eighth aspect, the data message is a PCIe message, and the association identifier includes the PCIe address field of the second controller.
根据第八方面或第八方面第一种可能的实现方式,在第八方面第二种可能的实现方式中,第二控制器包含内部存储器,第二控制器对第五数据和第二数据进行异或操作之前,该方法还包括:第二控制器将第五数据存入内部存储器的存储空间,并记录存储空间与关联标识之间的映射关系。According to the eighth aspect or the first possible implementation manner of the eighth aspect, in a second possible implementation manner of the eighth aspect, the second controller includes an internal memory, and the second controller performs the fifth data and the second data Before the XOR operation, the method further includes: the second controller stores the fifth data in the storage space of the internal memory, and records the mapping relationship between the storage space and the association identifier.
根据第八方面或第八方面以上任意种可能的实现方式,在第八方面第三种可能的实现方式中,该方法还包括:第二控制器根据关联标识确定操作指令的存储位置;第二控制器获取操作指令包括:第二控制器根据操作指令的存储位置获取操作指令。According to the eighth aspect or any possible implementation manner above the eighth aspect, in a third possible implementation manner of the eighth aspect, the method further includes: the second controller determines the storage location of the operation instruction according to the association identifier; second The controller acquiring the operation instruction includes: the second controller acquiring the operation instruction according to the storage location of the operation instruction.
根据第八方面或第八方面以上任一种可能的实现方式,在第八方面第四种可能的实现方式中,关联标识包含操作指令的部分字段;第二控制器获取操作指令包括:第二控制器根据操作指令的部分字段获取操作指令。According to the eighth aspect or any possible implementation manner of the eighth aspect or more, in a fourth possible implementation manner of the eighth aspect, the association identifier includes a partial field of the operation instruction; the second controller acquiring the operation instruction includes: second The controller obtains the operation instruction according to some fields of the operation instruction.
根据第八方面或第八方面以上任一种可能的实现方式,在第八方面第五种可能的实现方式中,该方法还包括:第二控制器触发完成消息,完成消息用于指示第二控制器完成对第五数据和第二数据的异或操作。According to the eighth aspect or any one of the possible implementation manners above the eighth aspect, in a fifth possible implementation manner of the eighth aspect, the method further includes: a second controller triggers a completion message, and the completion message is used to indicate the second The controller completes the XOR operation on the fifth data and the second data.
根据第八方面或第八方面以上任一种可能的实现方式,在第八方面第六种可能的实现方式中,该第一指令和/或第二指令为基于非易失性高速传输总线NVMe的提交队列条目SQE。According to the eighth aspect or any one of the possible implementation manners above the eighth aspect, in a sixth possible implementation manner of the eighth aspect, the first instruction and / or the second instruction are based on a non-volatile high-speed transmission bus NVMe The submission queue entry SQE.
第八方面为第一方面***对应的第二控制器侧的方法实现方式,第一方面或第一方面任一种可能的实现方式中的描述对应适用于第八方面或第八方面任一种可能的实现方式,在此不再赘述。The eighth aspect is the method implementation of the second controller side corresponding to the system of the first aspect, and the description in the first aspect or any possible implementation manner of the first aspect corresponds to the eighth aspect or any one of the eighth aspect The possible implementation manners will not be repeated here.
第九方面,本申请提供了一种可读介质,包括执行指令,当计算设备的处理器执行该执行指令时,该计算设备执行以上第八方面或以上第八方面的任一种可能的实现方式中的方法。In a ninth aspect, the present application provides a readable medium, including an execution instruction, and when the processor of the computing device executes the execution instruction, the computing device performs the above eighth aspect or any possible implementation of the above eighth aspect The way in the way.
第十方面,本申请提供了一种计算设备,包括:处理器、存储器和总线;存储器用于存储执行指令,处理器与存储器通过总线连接,当计算设备运行时,处理器执行存储器存储的执行指令,以使计算设备执行以上第八方面或以上第八方面的任一种可能的实现方式中的方法。In a tenth aspect, the present application provides a computing device, including: a processor, a memory, and a bus; the memory is used to store execution instructions, the processor and the memory are connected through the bus, and when the computing device is running, the processor performs memory storage execution Instructions to cause the computing device to perform the method in the above eighth aspect or any possible implementation manner of the above eighth aspect.
第十一方面,本申请公开了一种数据保护装置。数据保护***包括数据保护装置,第一存储装置,第二存储装置和至少一个其他存储装置,第一存储装置,第二存储装置和至少一个其他存储装置组成一个独立硬盘冗余阵列RAID,第一存储装置中存储有第一数据,第二存储装置中存储有第二数据,至少一个其他存储装置中存储有至少一个第三数据,第一数据与至少一个第三数据属于同一个RAID分条,第二数据为第一数据与至少一个第三数据的奇偶校验结果,第一存储装置包含第一控制器和存储介质,第二存储装置包含第二控制器和存储介质;该数据保护装置包括:处理单元,用于触发第一指令,第一指令携带关联标识,关联标识用于指示第二指令;第一指令用于指示第一控制器对第一数据和第四数据进行异或操作得到第五数据,并指示第一控制器向第二控制器发送数据报文,数据报文包含第五数据和关联标识,其中第四数据为第一数据的更新数据;处理单元还用于触发第二指令,第二指令用于指示第二控制器对第五数据和第二数据进行异或操作得到第六数据。In an eleventh aspect, the present application discloses a data protection device. The data protection system includes a data protection device, a first storage device, a second storage device and at least one other storage device, the first storage device, the second storage device and at least one other storage device form a redundant array of independent hard disks RAID, the first The first data is stored in the storage device, the second data is stored in the second storage device, at least one third data is stored in at least one other storage device, the first data and the at least one third data belong to the same RAID stripe, The second data is a parity result of the first data and at least one third data. The first storage device includes a first controller and a storage medium, and the second storage device includes a second controller and a storage medium; the data protection device includes : Processing unit, used to trigger the first instruction, the first instruction carries an association identifier, and the association identifier is used to indicate the second instruction; the first instruction is used to instruct the first controller to perform an XOR operation on the first data and the fourth data Fifth data, and instructs the first controller to send a data message to the second controller, the data message contains fifth data Association identifier, where the fourth data is the updated data of the first data; the processing unit is also used to trigger a second instruction, and the second instruction is used to instruct the second controller to perform an exclusive OR operation on the fifth data and the second data to obtain the sixth data.
根据第十一方面,在第十一方面的第一种可能的实现方式中,该备份装置还包括获取单元,获取单元,用于获取第二控制器触发的完成消息,完成消息用于指示第二控制器完成对第五数据和第二数据的异或操作。According to the eleventh aspect, in a first possible implementation manner of the eleventh aspect, the backup device further includes an acquiring unit, configured to acquire a completion message triggered by the second controller, and the completion message is used to indicate the first The second controller completes the XOR operation on the fifth data and the second data.
根据第十一方面或第十一方面第一种可能的实现方式,在第十一方面第二种可能的实现方式中,数据报文为PCIe报文,关联标识包含第二控制器的PCIe地址字段。According to the eleventh aspect or the first possible implementation manner of the eleventh aspect, in the second possible implementation manner of the eleventh aspect, the data message is a PCIe message, and the association identifier includes the PCIe address of the second controller Field.
根据第十一方面或第十一方面第一种可能的实现方式,在第十一方面第三种可能的实现方式中,关联标识包含第二指令的部分字段。According to the eleventh aspect or the first possible implementation manner of the eleventh aspect, in the third possible implementation manner of the eleventh aspect, the association identifier includes a partial field of the second instruction.
根据第十一方面或第十一方面以上任一种可能的实现方式,在第十一方面第四种可能的实现方式中,该第一指令和/或第二指令为基于非易失性高速传输总线NVMe的提交队列条目SQE。According to any possible implementation manner of the eleventh aspect or the eleventh aspect or more, in a fourth possible implementation manner of the eleventh aspect, the first instruction and / or the second instruction are based on non-volatile high-speed The submission queue entry SQE of the transmission bus NVMe.
第十一方面为第一方面***对应的主机侧的装置实现方式,第一方面或第一方面任一种可能的实现方式中的描述对应适用于第十一方面或第十一方面任一种可能的实现方式,在此不再赘述。The eleventh aspect is the implementation of the device on the host side corresponding to the system of the first aspect. The description in the first aspect or any possible implementation manner of the first aspect corresponds to either the eleventh aspect or the eleventh aspect. The possible implementation manners will not be repeated here.
第十二方面,本申请公开了一种数据保护装置。数据保护***包括主机,第一存储 装置,第二存储装置和至少一个其他存储装置,第一存储装置,第二存储装置和至少一个其他存储装置组成一个独立硬盘冗余阵列RAID,第一存储装置中存储有第一数据,第二存储装置中存储有第二数据,至少一个其他存储装置中存储有至少一个第三数据,第一数据与至少一个第三数据属于同一个RAID分条,第二数据为第一数据与至少一个第三数据的奇偶校验结果,第一存储装置包含数据保护装置和存储介质,第二存储装置包含控制器和存储介质;该数据保护装置包括:处理单元,用于获取主机触发的第一指令和第四数据,第一指令携带关联标识,关联标识用于指示第二指令,并在获取第一指令后对第一数据和第四数据进行异或操作得到第五数据,其中第四数据为第一数据的更新数据;发送单元,用于向控制器发送数据报文,数据报文包含第五数据和关联标识。In a twelfth aspect, the present application discloses a data protection device. The data protection system includes a host, a first storage device, a second storage device and at least one other storage device, the first storage device, the second storage device and at least one other storage device form a redundant array of independent hard disks RAID, the first storage device Where the first data is stored, the second data is stored in the second storage device, at least one third data is stored in at least one other storage device, the first data and the at least one third data belong to the same RAID stripe, the second The data is a parity check result of the first data and at least one third data. The first storage device includes a data protection device and a storage medium, and the second storage device includes a controller and a storage medium. The data protection device includes: a processing unit for To obtain the first instruction and the fourth data triggered by the host, the first instruction carries an association identifier, and the association identifier is used to indicate the second instruction, and after obtaining the first instruction, perform an XOR operation on the first data and the fourth data to obtain the first instruction. Five data, of which the fourth data is the updated data of the first data; the sending unit is used to send to the controller According to the message, the data packet contains a fifth data and associated identity.
根据第十二方面,在第十二方面的第一种可能的实现方式中,数据报文为PCIe报文,关联标识包含控制器的PCIe地址字段。According to the twelfth aspect, in a first possible implementation manner of the twelfth aspect, the data message is a PCIe message, and the association identifier includes the PCIe address field of the controller.
根据第十二方面,在第十二方面第二种可能的实现方式中,关联标识包含第二指令的部分字段。According to the twelfth aspect, in a second possible implementation manner of the twelfth aspect, the association identifier includes a partial field of the second instruction.
第十二方面为第一方面***对应的第一控制器侧的装置实现方式,第一方面或第一方面任一种可能的实现方式中的描述对应适用于第十二方面或第十二方面任一种可能的实现方式,在此不再赘述。The twelfth aspect is the device implementation of the first controller side corresponding to the system of the first aspect, and the description in the first aspect or any possible implementation manner of the first aspect corresponds to the twelfth aspect or the twelfth aspect. Any possible implementation manner will not be repeated here.
第十三方面,本申请公开了一种数据保护装置。数据保护***包括主机,第一存储装置,第二存储装置和至少一个其他存储装置,第一存储装置,第二存储装置和至少一个其他存储装置组成一个独立硬盘冗余阵列RAID,第一存储装置中存储有第一数据,第二存储装置中存储有第二数据,至少一个其他存储装置中存储有至少一个第三数据,第一数据与至少一个第三数据属于同一个RAID分条,第二数据为第一数据与至少一个第三数据的奇偶校验结果,第一存储装置包含控制器和存储介质,第二存储装置包含数据保护装置和存储介质;该数据保护装置包括:获取单元,用于获取主机触发的操作指令,并接收控制器发送的数据报文,数据报文包含第五数据和关联标识,第五数据为第一数据和第四数据的异或结果,第四数据为第一数据的更新数据,关联标识用于指示操作指令;处理单元,用于根据第二指令对第五数据和第二数据进行异或操作得到第六数据。In a thirteenth aspect, the present application discloses a data protection device. The data protection system includes a host, a first storage device, a second storage device and at least one other storage device, the first storage device, the second storage device and at least one other storage device form a redundant array of independent hard disks RAID, the first storage device Where the first data is stored, the second data is stored in the second storage device, at least one third data is stored in at least one other storage device, the first data and the at least one third data belong to the same RAID stripe, the second The data is a parity check result of the first data and at least one third data. The first storage device includes a controller and a storage medium, and the second storage device includes a data protection device and a storage medium. The data protection device includes: an acquisition unit for In order to obtain the operation command triggered by the host, and receive the data message sent by the controller, the data message contains the fifth data and the association identifier, the fifth data is the XOR result of the first data and the fourth data, and the fourth data is the Update data of a data, the associated identifier is used to indicate the operation instruction; the processing unit is used to follow the second instruction The fifth and second data to obtain a sixth exclusive OR data.
根据第十三方面,在第十三方面的第一种可能的实现方式中,数据报文为PCIe报文,关联标识包含数据保护装置的PCIe地址字段。According to the thirteenth aspect, in a first possible implementation manner of the thirteenth aspect, the data message is a PCIe message, and the association identifier includes the PCIe address field of the data protection device.
根据第十三方面或第十三方面第一种可能的实现方式,在第十三方面第二种可能的实现方式中,该数据保护装置还包含内部存储器,处理单元对第五数据和第二数据进行异或操作之前,还用于将第五数据存入内部存储器的存储空间,并记录存储空间与关联标识之间的映射关系。According to the thirteenth aspect or the first possible implementation manner of the thirteenth aspect, in a second possible implementation manner of the thirteenth aspect, the data protection device further includes an internal memory, and the processing unit pairs the fifth data and the second Before the XOR operation of the data, it is also used to store the fifth data in the storage space of the internal memory, and record the mapping relationship between the storage space and the associated identifier.
根据第十三方面或第十三方面以上任意种可能的实现方式,在第十三方面第三种可能的实现方式中,获取单元还用于根据关联标识确定操作指令的存储位置,并根据操作指令的存储位置获取操作指令。According to the thirteenth aspect or any possible implementation manner above the thirteenth aspect, in a third possible implementation manner of the thirteenth aspect, the acquiring unit is further used to determine the storage location of the operation instruction according to the association identifier, and according to the operation The instruction storage location obtains the operation instruction.
根据第十三方面或第十三方面以上任一种可能的实现方式,在第十三方面第四种可能的实现方式中,关联标识包含操作指令的部分字段;获取单元用于根据操作指令的部分字段获取操作指令。According to the thirteenth aspect or any one of the possible implementation manners above the thirteenth aspect, in the fourth possible implementation manner of the thirteenth aspect, the association identifier includes a partial field of the operation instruction; the obtaining unit is used for Some fields get operation instructions.
根据第十三方面或第十三方面以上任一种可能的实现方式,在第十三方面第五种可 能的实现方式中,处理单元还用于触发完成消息,完成消息用于指示数据保护装置完成对第五数据和第二数据的异或操作。According to the thirteenth aspect or any one of the possible implementation manners above the thirteenth aspect, in a fifth possible implementation manner of the thirteenth aspect, the processing unit is further used to trigger a completion message, and the completion message is used to instruct the data protection device The XOR operation on the fifth data and the second data is completed.
根据第十三方面或第十三方面以上任一种可能的实现方式,在第十三方面第六种可能的实现方式中,该第一指令和/或第二指令为基于非易失性高速传输总线NVMe的提交队列条目SQE。According to the thirteenth aspect or any one of the possible implementation manners above the thirteenth aspect, in a sixth possible implementation manner of the thirteenth aspect, the first instruction and / or the second instruction are based on non-volatile high-speed The submission queue entry SQE of the transmission bus NVMe.
第十三方面为第一方面***对应的第二控制器侧的装置实现方式,第一方面或第一方面任一种可能的实现方式中的描述对应适用于第十三方面或第十三方面任一种可能的实现方式,在此不再赘述。The thirteenth aspect is the device implementation of the second controller side corresponding to the system of the first aspect, and the description in the first aspect or any possible implementation manner of the first aspect corresponds to the thirteenth aspect or the thirteenth aspect. Any possible implementation manner will not be repeated here.
根据本发明实施例公开的技术方案,主机向第一控制器触发第一指令,并向第二控制器触发第二指令。其中,主机向第一控制器触发的第一指令中携带有指示第二指令的关联标识。第一控制器获取到新数据第四数据后,对新数据第四数据和旧数据第一数据进行异或操作得到第五数据,主动向第二控制器发送数据报文,数据报文中携带第五数据和该关联标识。第二控制器获取到数据报文后,根据关联标识关联第二指令和第五数据,并根据第二指令对第五数据和旧的奇偶校验结果第二数据进行异或操作得到新的奇偶校验结果第六数据。从而避免了数据更新过程中主机多次对存储装置进行读写操作。主机与第一存储装置和第二存储装置互联的交换网络的上行端口的数据流量大大减少,从而提升了***的总体性能。According to the technical solution disclosed in the embodiment of the present invention, the host triggers the first instruction to the first controller and triggers the second instruction to the second controller. Wherein, the first instruction triggered by the host to the first controller carries an association identifier indicating the second instruction. After acquiring the fourth data of the new data, the first controller XORs the fourth data of the new data and the first data of the old data to obtain the fifth data, and actively sends a data message to the second controller, which is carried in the data message The fifth data and the associated identification. After obtaining the data message, the second controller associates the second instruction and the fifth data according to the association identifier, and performs an exclusive OR operation on the fifth data and the old parity check result second data according to the second instruction to obtain a new parity The sixth data of the verification result. Thereby, the host is prevented from reading and writing the storage device multiple times during the data update process. The data traffic of the upstream port of the switching network interconnecting the host with the first storage device and the second storage device is greatly reduced, thereby improving the overall performance of the system.
附图说明BRIEF DESCRIPTION
图1为依据本申请一实施例的NVMe***的逻辑结构示意图;FIG. 1 is a schematic diagram of a logical structure of an NVMe system according to an embodiment of the present application;
图2为一种基于NVMe的数据保护方法的流程示意图;2 is a schematic flowchart of a data protection method based on NVMe;
图3为依据本申请一实施例的数据保护方法的流程示意图;3 is a schematic flowchart of a data protection method according to an embodiment of the present application;
图4为依据本申请一实施例的主机的硬件结构示意图;4 is a schematic diagram of a hardware structure of a host according to an embodiment of the present application;
图5为依据本申请一实施例的控制器的硬件结构示意图;5 is a schematic diagram of a hardware structure of a controller according to an embodiment of the present application;
图6为依据本申请一实施例的控制器的硬件结构示意图;6 is a schematic diagram of a hardware structure of a controller according to an embodiment of the present application;
图7为依据本申请一实施例的数据保护方法的流程示意图;7 is a schematic flowchart of a data protection method according to an embodiment of the present application;
图8为依据本发明一实施例的入口组织结构示意图;8 is a schematic diagram of an entrance organization structure according to an embodiment of the present invention;
图9为依据本发明一实施例的PCIe地址结构示意图;9 is a schematic diagram of a PCIe address structure according to an embodiment of the invention;
图10为依据本发明一实施例的数据存储结构示意图;10 is a schematic diagram of a data storage structure according to an embodiment of the invention;
图11为依据本申请一实施例的数据保护装置的逻辑结构示意图;11 is a schematic diagram of a logical structure of a data protection device according to an embodiment of the present application;
图12为依据本申请一实施例的数据保护装置的逻辑结构示意图;12 is a schematic diagram of a logical structure of a data protection device according to an embodiment of the present application;
图13为依据本申请一实施例的数据保护装置的逻辑结构示意图。13 is a schematic diagram of a logical structure of a data protection device according to an embodiment of the application.
具体实施方式detailed description
下面将结合附图,对本发明实施例进行描述。The embodiments of the present invention will be described below with reference to the drawings.
本发明实施例采用术语第一和第二等来区分各个对象,例如第一指令和第二指令等,但各个“第一”和“第二”之间不具有逻辑或时序上的依赖关系。The embodiments of the present invention use the terms first and second to distinguish between various objects, such as the first instruction and the second instruction, etc., but there is no logical or timing dependency between the respective "first" and "second".
在本发明实施例中,“数据报文”是指第一存储装置向第二存储装置发送的携带载荷数据和关联标识的数据报文。In the embodiment of the present invention, a "data message" refers to a data message sent by a first storage device to a second storage device and carrying load data and an association identifier.
在本发明实施例中,推送一词是指第一存储装置向第二存储装置主动发送数据报文。In the embodiment of the present invention, the term push means that the first storage device actively sends a data message to the second storage device.
在本发明实施例中,入口为第二存储装置向第一存储装置开放的地址空间,入口地址可以具体为PCIe地址,数据报文可以为PCIe写报文。更具体的,入口可以为第二存储装置的控制器向第一存储装置的控制器开放的地址空间,第一存储装置的控制器可以根据该地址空间向第二存储装置的控制器推送数据。In the embodiment of the present invention, the entry is an address space opened by the second storage device to the first storage device, the entry address may specifically be a PCIe address, and the data message may be a PCIe write message. More specifically, the entry may be an address space opened by the controller of the second storage device to the controller of the first storage device, and the controller of the first storage device may push data to the controller of the second storage device according to the address space.
在本发明实施例中,第一存储装置可以通过入口向第二存储装置推送数据报文,数据报文中可以携带该入口地址。第二存储装置接收到数据报文后,识别入口地址,可以在本地的内部存储器中为该入口分配对应的存储空间,并将数据报文携带的载荷数据缓存至该存储空间,而不是将载荷数据存入入口地址指示的存储空间。内部存储器可以具体为控制器的私有内存空间。In the embodiment of the present invention, the first storage device may push a data message to the second storage device through the entry, and the data message may carry the entry address. After receiving the data message, the second storage device identifies the entry address, and can allocate the corresponding storage space for the entry in the local internal memory, and caches the load data carried in the data message to the storage space instead of storing the load The data is stored in the storage space indicated by the entry address. The internal memory may be specifically the private memory space of the controller.
在本发明实施例中,数据报文中携带的关联标识用于指示操作指令。关联标识可以包含入口地址或者入口地址的部分字段。In the embodiment of the present invention, the association identifier carried in the data packet is used to indicate the operation instruction. The association identifier may include the entry address or a part of the entry address field.
在本发明实施例中,存储装置包含控制器和存储介质,存储控制器以下简称控制器。存储装置的执行主体一般是控制器。例如,第一存储装置包含第一控制器和存储介质,第二存储装置包含第二控制器和存储介质。第一存储装置与外界交互的主体是第一控制器,第二存储装置与外界的交互主体是第二控制器。在以下描述中,在于外界交互时,本发明实施例不对存储装置和控制器进行区分。In the embodiment of the present invention, the storage device includes a controller and a storage medium, and the storage controller is hereinafter referred to as a controller. The execution subject of the storage device is generally a controller. For example, the first storage device includes a first controller and a storage medium, and the second storage device includes a second controller and a storage medium. The main body that the first storage device interacts with the outside world is the first controller, and the main body that the second storage device interacts with the outside world is the second controller. In the following description, the embodiment of the present invention does not distinguish between the storage device and the controller when interacting with the outside world.
在本发明实施例中,主机触发的指令的具体实现方式可以为SQE。In the embodiment of the present invention, the specific implementation of the command triggered by the host may be SQE.
在本发明实施例中,主机通过交换网络与第一存储装置和第二存储装置互联。交换网络的上行端口是指交换网络与主机互联的端口。交换网络的上行流量是指与主机之间交互的数据流量。In the embodiment of the present invention, the host is interconnected with the first storage device and the second storage device through a switching network. The upstream port of the switching network refers to the port interconnecting the switching network and the host. The upstream traffic of the switching network refers to the data traffic interacting with the host.
在本发明实施例中,主机一词是指可以存储装置进行交互,并向存储装置存储数据的主体。主机可以是一个实体计算机,虚拟机或者网卡等。本发明实施例不限定主机的具体实现形式。In the embodiments of the present invention, the term host refers to a subject that can interact with a storage device and store data to the storage device. The host can be a physical computer, virtual machine or network card. The embodiment of the present invention does not limit the specific implementation form of the host.
图1为依据本发明一实施例的基于NVMe的数据保护***100的架构图,如图1所示,***100包含主机101,交换网络102,第一存储装置103,第二存储装置105和至少一个其他存储装置107。第一存储装置103,第二存储装置105和至少一个其他存储装置107组成一个独立硬盘冗余阵列RAID。其中,第一存储装置103中存储有第一数据,第二存储装置105中存储有第二数据,至少一个其他存储装置107中存储有至少一个第三数据,第一数据与至少一个第三数据属于同一个RAID分条,第二数据为第一数据与至少一个第三数据的奇偶校验结果。如图1所示,第一存储装置103包含第一控制器104和存储介质,第二存储装置105包含第二控制器106和存储介质。第二存储装置105为第一存储装置103的备份。1 is an architecture diagram of an NVMe-based data protection system 100 according to an embodiment of the present invention. As shown in FIG. 1, the system 100 includes a host 101, a switching network 102, a first storage device 103, a second storage device 105, and at least One other storage device 107. The first storage device 103, the second storage device 105, and at least one other storage device 107 form a redundant array of independent hard disks RAID. Among them, the first storage device 103 stores first data, the second storage device 105 stores second data, at least one other storage device 107 stores at least one third data, the first data and at least one third data Belonging to the same RAID stripe, the second data is the parity result of the first data and at least one third data. As shown in FIG. 1, the first storage device 103 includes a first controller 104 and a storage medium, and the second storage device 105 includes a second controller 106 and a storage medium. The second storage device 105 is a backup of the first storage device 103.
本发明实施例中,一组具有RAID校验关系的数据分散存储在多个存储装置中,这多个存储装置即属于一个RAID组。In the embodiment of the present invention, a group of data having a RAID check relationship is distributed and stored in multiple storage devices, and the multiple storage devices belong to a RAID group.
在本发明实施例中,存储介质一般为非易失存储介质,用于永久存储数据。存储介质可以是磁性介质,(例如,软盘、硬盘、磁带)、光介质(例如光盘)、或者半导体介质(例如闪存(Flash)等,本发明实施例不限定存储介质的具体实现形式。在一些实施例中,存储介质还可能进一步包括与控制器分离的远程存储器,例如通过网络与控制器互 联的存储介质。In the embodiment of the present invention, the storage medium is generally a non-volatile storage medium for permanently storing data. The storage medium may be a magnetic medium (for example, a floppy disk, a hard disk, a magnetic tape), an optical medium (for example, an optical disk), or a semiconductor medium (for example, Flash), etc. The embodiments of the present invention do not limit the specific implementation form of the storage medium. In an embodiment, the storage medium may further include a remote memory separate from the controller, for example, a storage medium interconnected with the controller through a network.
在本发明实施例中,交换网络102可以用于指代主机101,第一存储装置103以及第二存储装置105互联的任意方式或互联协议等。例如,交换网络102可以为PCIe总线,其中PCIe总线可以包含PCIe交换机,该PCIe交换机与主机101互联。交换网络102还可以为计算机设备内部互联总线,因特网,内联网(intranet),局域网(local area network,LAN),广域网络(wide area network,WAN),存储区域网络(storage area network,SAN)等,或者以上网络的任意组合。本发明实施例不限定交换网络102的具体实现形式。In the embodiment of the present invention, the switching network 102 may be used to refer to any manner or interconnection protocol in which the host 101, the first storage device 103, and the second storage device 105 are interconnected. For example, the switching network 102 may be a PCIe bus, where the PCIe bus may include a PCIe switch, and the PCIe switch is interconnected with the host 101. The switching network 102 may also be an internal interconnect bus of computer equipment, the Internet, an intranet, a local area network (LAN), a wide area network (wide area network, WAN), a storage area network (storage area network, SAN), etc. , Or any combination of the above networks. The embodiment of the present invention does not limit the specific implementation form of the switching network 102.
如图2所示,在传统保护方法中,当第一存储装置103中存储的第一数据需要更新时,主机101也需要更新第二存储装置105中存储的奇偶校验结果第二数据。数据更新的流程为主机101首先从第一存储装置103中读取出第一数据dold,然后与新数据第四数据dnew进行异或得到第五数据,然后从第二存储装置105中读取第二数据Pold,并将Pold与dold和dnew的异或结果第五数据再次进行异或从而得到新的奇偶校验结果第六数据Pnew。随后主机101将新数据dnew存入第一存储装置103,并将新的奇偶校验结果Pnew存入第二存储装置105。在进行数据存储时,需要向第一存储装置103和第二存储装置105分别触发相同的写指令。由以上流程可知,在需要数据更新时,主机101至少需要两次读操作和两次写操作。As shown in FIG. 2, in the conventional protection method, when the first data stored in the first storage device 103 needs to be updated, the host 101 also needs to update the second data of the parity result stored in the second storage device 105. The data update process is that the host 101 first reads the first data dold from the first storage device 103, and then XORs the new data with the fourth data dnew to obtain the fifth data, and then reads the first data from the second storage device 105. Two data Pold, and the fifth data of the XOR result of Pold and dold and dnew is XORed again to obtain a new parity result sixth data Pnew. The host 101 then stores the new data dnew in the first storage device 103, and stores the new parity result Pnew in the second storage device 105. When storing data, it is necessary to trigger the same write instruction to the first storage device 103 and the second storage device 105 respectively. As can be seen from the above process, when data update is required, the host 101 needs at least two read operations and two write operations.
在本发明实施例中,如图3所示,当第一存储装置103中存储的第一数据dold需要更新时,主机101通过写操作将新数据第四数据dnew写入第一存储装置103。第一存储装置103对第一数据dold和第四数据dold进行异或得到第五数据,然后第一存储装置103主动将第五数据发送至第二存储装置105,第二存储装置105将第五数据与旧的奇偶校验结果第二数据Pold进行异或操作,得到新的奇偶校验结果Pnew。由以上流程可知,在本发明实施例中,当有数据需要更新时,主机101主需要进行一次写操作。本发明实施例通过第一存储装置103完成新旧数据的异或操作,并主动向第二存储装置105推送新旧数据的异或结果第五数据,从而避免了主机101对存储装置的读写操作,减少了第一存储装置103,第二存储装置105与主机101互联的交换网络102的上行端口的流量,提升了***的总体性能。In the embodiment of the present invention, as shown in FIG. 3, when the first data dold stored in the first storage device 103 needs to be updated, the host 101 writes the new data fourth data dnew to the first storage device 103 through a write operation. The first storage device 103 XORs the first data dold and the fourth data dold to obtain fifth data, and then the first storage device 103 actively sends the fifth data to the second storage device 105, and the second storage device 105 transfers the fifth data The data and the old parity check result second data Pold are XORed to obtain a new parity check result Pnew. As can be seen from the above process, in the embodiment of the present invention, when data needs to be updated, the host 101 needs to perform a write operation once. In the embodiment of the present invention, the XOR operation of the old and new data is completed through the first storage device 103, and the fifth data of the XOR result of the old and new data is actively pushed to the second storage device 105, thereby avoiding the read and write operations of the host 101 to the storage device The upstream port of the switching network 102 interconnecting the first storage device 103, the second storage device 105 and the host 101 is reduced, and the overall performance of the system is improved.
图4为依据本申请一实施例的主机400的结构示意图。在本发明实施例中,数据保护***包括主机400,第一存储装置,第二存储装置和至少一个其他存储装置。第一存储装置,第二存储装置和至少一个其他存储装置组成一个独立硬盘冗余阵列RAID。第一存储装置中存储有第一数据,第二存储装置中存储有第二数据,该至少一个其他存储装置中存储有至少一个第三数据。第一数据与至少一个第三数据属于同一个RAID分条(stripe),第一数据、第二数据和第三数据均是分条中的一个分条(strip)。第二数据为第一数据与至少一个第三数据的奇偶校验结果。第一存储装置包含第一控制器和存储介质,第二存储装置包含第二控制器和存储介质。FIG. 4 is a schematic structural diagram of a host 400 according to an embodiment of the present application. In the embodiment of the present invention, the data protection system includes a host 400, a first storage device, a second storage device, and at least one other storage device. The first storage device, the second storage device, and at least one other storage device form a RAID of a redundant array of independent hard disks. The first storage device stores first data, the second storage device stores second data, and the at least one other storage device stores at least one third data. The first data and at least one third data belong to the same RAID stripe, and the first data, the second data, and the third data are all one stripe of the stripe. The second data is a parity check result of the first data and at least one third data. The first storage device includes a first controller and a storage medium, and the second storage device includes a second controller and a storage medium.
如图4所示,主机400包括处理器401,处理器401与***内存402连接。处理器301可以为中央处理器(CPU),图像处理器(graphics processing unit,GPU),现场可编程门阵列(Field Programmable Gate Array,FPGA),专用集成电路(Application Specific Integrated Circuit,ASIC)或数字信号处理器(digital signal processor, DSP)等计算逻辑或以上任意计算逻辑的组合。处理器301可以为单核处理器或多核处理器。As shown in FIG. 4, the host 400 includes a processor 401 connected to the system memory 402. The processor 301 may be a central processing unit (CPU), an image processor (graphics processing unit, GPU), a field programmable gate array (Field Programmable Gate Array, FPGA), an application specific integrated circuit (Application Specific Integrated Circuit, ASIC) or a digital Signal processor (digital signal processor, DSP) and other calculation logic or any combination of the above calculation logic. The processor 301 may be a single-core processor or a multi-core processor.
在本申请的一个实施例中,处理器401还可以包括保护逻辑410,保护逻辑410可以为具体的硬件电路或集成在处理器401中的固件模块。如果保护逻辑410为具体的硬件电路,则保护逻辑410执行本申请实施例的方法,如果保护逻辑410为固件模块,则处理器410执行保护逻辑410中的固件代码来实现本申请实施例的技术方案。保护逻辑410包括:(1)用于触发第一指令的逻辑(电路/固件代码),第一指令携带关联标识,该关联标识用于指示第二指令,该第一指令用于指示第一控制器对第一数据和第四数据进行异或操作得到第五数据,并指示第一控制器向第二控制器发送数据报文,数据报文包含第五数据和关联标识,其中第四数据为第一数据的更新数据;(2)用于触发第二指令的代码的逻辑(电路/固件代码),第二指令用于指示第二控制器对第五数据和第二数据进行异或操作得到第六数据。In an embodiment of the present application, the processor 401 may further include protection logic 410, and the protection logic 410 may be a specific hardware circuit or a firmware module integrated in the processor 401. If the protection logic 410 is a specific hardware circuit, the protection logic 410 executes the method of the embodiment of the present application, and if the protection logic 410 is a firmware module, the processor 410 executes the firmware code in the protection logic 410 to implement the technology of the embodiment of the present application Program. The protection logic 410 includes: (1) logic (circuit / firmware code) for triggering the first instruction, the first instruction carries an association identifier, the association identifier is used to indicate the second instruction, and the first instruction is used to indicate the first control The device performs an XOR operation on the first data and the fourth data to obtain fifth data, and instructs the first controller to send a data message to the second controller. The data message includes the fifth data and the associated identifier, where the fourth data is Update data of the first data; (2) Logic (circuit / firmware code) of the code used to trigger the second instruction, the second instruction is used to instruct the second controller to perform an exclusive OR operation on the fifth data and the second data The sixth data.
总线409用于在主机400的各部件之间传递信息,总线409可以使用有线的连接方式或采用无线的连接方式,本申请并不对此进行限定。总线409还连接有输入/输出接口405和通信接口403。The bus 409 is used to transfer information between the components of the host 400. The bus 409 may use a wired connection or a wireless connection, which is not limited in this application. The bus 409 is also connected with an input / output interface 405 and a communication interface 403.
输入/输出接口405连接有输入/输出设备,用于接收输入的信息,输出操作结果。输入/输出设备可以为鼠标、键盘、显示器、或者光驱等。The input / output interface 405 is connected with an input / output device for receiving input information and outputting operation results. The input / output device can be a mouse, keyboard, monitor, or optical drive.
通信接口403用来实现与其他设备或网络之间的通信,通信接口403可以通过有线或者无线的形式与其他设备或网络互联。例如,主机400可以通过通信接口403与交换网络互联,并通过交换网络连接控制器。The communication interface 403 is used to implement communication with other devices or networks. The communication interface 403 may be interconnected with other devices or networks in a wired or wireless manner. For example, the host 400 may be interconnected with the switching network through the communication interface 403 and connected to the controller through the switching network.
本申请实施例的一些特征可以由处理器401执行***内存402中的软件代码来完成/支持。***内存402可以包括一些软件,例如,操作***408(例如Darwin、RTXC、LINUX、UNIX、OS X、WINDOWS或嵌入式操作***(例如Vxworks)),应用程序407,和保护模块406等。Some features of the embodiments of the present application may be completed / supported by the processor 401 executing software codes in the system memory 402. The system memory 402 may include some software, for example, an operating system 408 (such as Darwin, RTXC, LINUX, UNIX, OS X, WINDOWS, or embedded operating system (such as Vxworks)), an application program 407, and a protection module 406.
在本申请的一个实施例中,处理器401执行保护模块406来实现本申请实施例的技术方案。保护模块406包括:(1)用于触发第一指令的代码,第一指令携带关联标识,该关联标识用于指示第二指令,该第一指令用于指示第一控制器对第一数据和第四数据进行异或操作得到第五数据,并指示第一控制器向第二控制器发送数据报文,数据报文包含第五数据和关联标识,其中第四数据为第一数据的更新数据;(2)用于触发第二指令的代码,第二指令用于指示第二控制器对第五数据和第二数据进行异或操作得到第六数据。In an embodiment of the present application, the processor 401 executes the protection module 406 to implement the technical solution of the embodiment of the present application. The protection module 406 includes: (1) a code for triggering a first instruction. The first instruction carries an association identifier, and the association identifier is used to indicate a second instruction, and the first instruction is used to instruct the first controller to The fourth data performs an exclusive OR operation to obtain fifth data, and instructs the first controller to send a data message to the second controller. The data message includes the fifth data and the associated identifier, where the fourth data is the update data of the first data (2) A code for triggering a second instruction, the second instruction is used to instruct the second controller to perform an exclusive OR operation on the fifth data and the second data to obtain sixth data.
此外,图4仅仅是一个主机400的例子,主机400可能包含相比于图4展示的更多或者更少的组件,或者有不同的组件配置方式。同时,图4中展示的各种组件可以用硬件、软件或者硬件与软件的结合方式实施。In addition, FIG. 4 is merely an example of a host 400. The host 400 may include more or fewer components than those shown in FIG. 4, or have different component configurations. Meanwhile, various components shown in FIG. 4 may be implemented by hardware, software, or a combination of hardware and software.
图5为依据本申请一实施例的控制器500的结构示意图。在本发明实施例中,数据保护***包括主机,第一存储装置,第二存储装置和至少一个其他存储装置,第一存储装置,第二存储装置和至少一个其他存储装置组成一个独立硬盘冗余阵列RAID,第一存储装置中存储有第一数据,第二存储装置中存储有第二数据,至少一个其他存储装置中存储有至少一个第三数据,第一数据与至少一个第三数据属于同一个RAID分条,第二数 据为第一数据与至少一个第三数据的奇偶校验结果,第一存储装置包含第一控制器和存储介质,第二存储装置包含第二控制器和存储介质。FIG. 5 is a schematic structural diagram of a controller 500 according to an embodiment of the present application. In the embodiment of the present invention, the data protection system includes a host, a first storage device, a second storage device, and at least one other storage device. The first storage device, the second storage device, and at least one other storage device form an independent hard disk redundancy Array RAID, where the first data is stored in the first storage device, the second data is stored in the second storage device, at least one third data is stored in at least one other storage device, the first data and the at least one third data belong to the same One RAID stripe, the second data is a parity result of the first data and at least one third data, the first storage device includes a first controller and a storage medium, and the second storage device includes a second controller and a storage medium.
如图5所示,控制器500包括处理器501,处理器501与***内存502连接。处理器401可以CPU,GPU,FPGA,ASIC或DSP等计算逻辑或以上任意计算逻辑的组合。处理器401可以为单核处理器或多核处理器。As shown in FIG. 5, the controller 500 includes a processor 501 connected to the system memory 502. The processor 401 may be computational logic such as CPU, GPU, FPGA, ASIC, or DSP, or any combination of the above. The processor 401 may be a single-core processor or a multi-core processor.
在本申请的一个实施例中,处理器501还可以包括保护逻辑505,保护逻辑505可以为具体的硬件电路或集成在处理器501中的固件模块。如果保护逻辑505为具体的硬件电路,则保护逻辑505执行本申请实施例的方法,如果保护逻辑505为固件模块,则处理器501执行保护逻辑505中的固件代码来实现本申请实施例的技术方案。保护逻辑505包括:(1)用于获取主机触发的第一指令和第四数据的逻辑(电路/固件代码),第一指令携带关联标识,关联标识用于指示第二指令,第四数据为第一数据的更新数据;(2)用于在获取第一指令后对第一数据和第四数据进行异或操作得到第五数据的逻辑(电路/固件代码);(3)用于向第二存储装置发送数据报文的逻辑(电路/固件代码),数据报文包含第五数据和关联标识。In an embodiment of the present application, the processor 501 may further include protection logic 505, and the protection logic 505 may be a specific hardware circuit or a firmware module integrated in the processor 501. If the protection logic 505 is a specific hardware circuit, the protection logic 505 executes the method of the embodiment of the present application, and if the protection logic 505 is a firmware module, the processor 501 executes the firmware code in the protection logic 505 to implement the technology of the embodiment of the present application Program. The protection logic 505 includes: (1) logic (circuit / firmware code) for acquiring the first instruction and the fourth data triggered by the host, the first instruction carries an association identifier, and the association identifier is used to indicate the second instruction, and the fourth data is Update data of the first data; (2) Logic (circuit / firmware code) used to XOR the first data and the fourth data after acquiring the first instruction; (3) Used to send 2. The logic (circuit / firmware code) of the data message sent by the storage device. The data message contains the fifth data and the associated identifier.
总线507用于在控制器500的各部件之间传递信息,总线507可以使用有线的连接方式或采用无线的连接方式,本申请并不对此进行限定。总线507还可以连接有通信接口503。The bus 507 is used to transfer information between the components of the controller 500. The bus 507 may use a wired connection or a wireless connection, which is not limited in this application. The bus 507 may also be connected with a communication interface 503.
通信接口503用来实现与其他设备或网络之间的通信,通信接口503可以通过有线或者无线的形式与其他设备或网络互联。例如,控制器500通过通信接口503与交换网络和存储介质互联。The communication interface 503 is used to realize communication with other devices or networks. The communication interface 503 may be interconnected with other devices or networks in a wired or wireless manner. For example, the controller 500 is interconnected with the switching network and the storage medium through the communication interface 503.
本申请实施例的一些特征可以由处理器501执行***内存502中的软件代码来完成/支持。***内存502可以包括一些软件,例如,操作***504(例如Darwin、RTXC、LINUX、UNIX、OS X、WINDOWS、macOS或嵌入式操作***(例如Vxworks))和保护模块506等。Some features of the embodiments of the present application may be completed / supported by the processor 501 executing software codes in the system memory 502. The system memory 502 may include some software, for example, an operating system 504 (such as Darwin, RTXC, LINUX, UNIX, OS X, WINDOWS, macOS, or embedded operating system (such as Vxworks)) and a protection module 506.
在本申请的一个实施例中,处理器501执行保护模块506来实现本申请实施例的技术方案。保护模块506包括:(1)用于获取主机触发的第一指令和第四数据的代码,该第一指令携带关联标识,关联标识用于指示第二指令,第四数据为第一数据的更新数据;(2)用于在获取第一指令后对第一数据和第四数据进行异或操作得到第五数据的代码;(3)用于向第二存储装置发送数据报文的代码,该数据报文包含第五数据和关联标识。In an embodiment of the present application, the processor 501 executes a protection module 506 to implement the technical solution of the embodiment of the present application. The protection module 506 includes: (1) a code for acquiring the first instruction and the fourth data triggered by the host, the first instruction carries an association identifier, the association identifier is used to indicate the second instruction, and the fourth data is the update of the first data Data; (2) a code for XORing the first data and the fourth data to obtain the fifth data after acquiring the first instruction; (3) a code for sending the data message to the second storage device, the The data message contains the fifth data and the associated identification.
此外,图5仅仅是一个控制器500的例子,控制器500可能包含相比于图5展示的更多或者更少的组件,或者有不同的组件配置方式。同时,图5中展示的各种组件可以用硬件、软件或者硬件与软件的结合方式实施。In addition, FIG. 5 is only an example of a controller 500, and the controller 500 may include more or fewer components than those shown in FIG. 5, or have different component configurations. Meanwhile, various components shown in FIG. 5 may be implemented by hardware, software, or a combination of hardware and software.
图6为依据本申请一实施例的控制器600的结构示意图。在本发明实施例中,数据保护***包括主机,第一存储装置,第二存储装置和至少一个其他存储装置,第一存储装置,第二存储装置和至少一个其他存储装置组成一个独立硬盘冗余阵列RAID,第一存储装置中存储有第一数据,第二存储装置中存储有第二数据,至少一个其他存储装置中存储有至少一个第三数据,第一数据与该至少一个第三数据属于同一个RAID分条,第二数据为第一数据与该至少一个第三数据的奇偶校验结果,第二数据与第一数据属于同一个RAID分条,第一存储装置包含第一控制器和存储介质,第二存储装置包含第二控制器和存储介质。FIG. 6 is a schematic structural diagram of a controller 600 according to an embodiment of the present application. In the embodiment of the present invention, the data protection system includes a host, a first storage device, a second storage device, and at least one other storage device. The first storage device, the second storage device, and at least one other storage device form an independent hard disk redundancy Array RAID, where the first data is stored in the first storage device, the second data is stored in the second storage device, at least one third data is stored in at least one other storage device, the first data and the at least one third data belong to The same RAID stripe, the second data is the parity result of the first data and the at least one third data, the second data and the first data belong to the same RAID stripe, and the first storage device includes the first controller and The storage medium, the second storage device includes a second controller and a storage medium.
如图6所示,控制器600包括处理器601,处理器601与***内存602连接。处理器401可以CPU,GPU,FPGA,ASIC或DSP等计算逻辑或以上任意计算逻辑的组合。处理器401可以为单核处理器或多核处理器。As shown in FIG. 6, the controller 600 includes a processor 601 connected to the system memory 602. The processor 401 may be computational logic such as CPU, GPU, FPGA, ASIC, or DSP, or any combination of the above. The processor 401 may be a single-core processor or a multi-core processor.
在本发明实施例中,处理器601内部还可以包含寄存器,该寄存器可以开放给其他存储装置的控制器访问。更具体的,该寄存器可以作为PCIe地址空间开放给其他存储装置的控制器,供其他存储装置的控制器通过PCIe地址进行访问。In the embodiment of the present invention, the processor 601 may further include a register, and the register may be opened to be accessed by controllers of other storage devices. More specifically, the register can be used as a PCIe address space to be opened to controllers of other storage devices for the controllers of other storage devices to access through the PCIe address.
在本申请的一个实施例中,处理器601还可以包括保护逻辑605,保护逻辑605可以为具体的硬件电路或集成在处理器601中的固件模块。如果保护逻辑605为具体的硬件电路,则保护逻辑605执行本申请实施例的方法,如果保护逻辑605为固件模块,则处理器601执行保护逻辑605中的固件代码来实现本申请实施例的技术方案。保护逻辑605包括:(1)用于获取主机触发的操作指令的逻辑(电路/固件代码);(2)用于接收第一存储装置发送的数据报文的逻辑(电路/固件代码),数据报文包含第五数据和关联标识,第五数据为第一数据和第四数据的异或结果,第四数据为第一数据的更新数据,关联标识用于指示操作指令;(3)用于根据第二指令对第五数据和第二数据进行异或操作得到第六数据的逻辑(电路/固件代码)。In an embodiment of the present application, the processor 601 may further include protection logic 605, and the protection logic 605 may be a specific hardware circuit or a firmware module integrated in the processor 601. If the protection logic 605 is a specific hardware circuit, the protection logic 605 executes the method of the embodiment of the present application; if the protection logic 605 is a firmware module, the processor 601 executes the firmware code in the protection logic 605 to implement the technology of the embodiment of the present application Program. The protection logic 605 includes: (1) logic (circuit / firmware code) for acquiring operation instructions triggered by the host; (2) logic (circuit / firmware code) for receiving data messages sent by the first storage device, data The message contains fifth data and an associated identifier. The fifth data is the XOR result of the first data and the fourth data. The fourth data is the updated data of the first data. The associated identifier is used to indicate the operation instruction; (3) The logic (circuit / firmware code) of the sixth data is obtained by XORing the fifth data and the second data according to the second instruction.
总线607用于在控制器600的各部件之间传递信息,总线607可以使用有线的连接方式或采用无线的连接方式,本申请并不对此进行限定。总线607还可以连接有通信接口603。The bus 607 is used to transfer information between the components of the controller 600. The bus 607 may use a wired connection or a wireless connection, which is not limited in this application. The bus 607 can also be connected with a communication interface 603.
通信接口603用来实现与其他设备或网络之间的通信,通信接口603可以通过有线或者无线的形式与其他设备或网络互联。例如,控制器600通过通信接口603与主机和存储介质互联,控制器600也可以通过通信接口603连接网络,并通过网络与主机或存储介质互联。The communication interface 603 is used to implement communication with other devices or networks. The communication interface 603 may be interconnected with other devices or networks in a wired or wireless manner. For example, the controller 600 is interconnected with the host and the storage medium through the communication interface 603. The controller 600 may also be connected to the network through the communication interface 603 and interconnected with the host or the storage medium through the network.
本申请实施例的一些特征可以由处理器601执行***内存602中的软件代码来完成/支持。***内存602可以包括一些软件,例如,操作***604(例如Darwin、RTXC、LINUX、UNIX、OS X、WINDOWS、macOS或嵌入式操作***(例如Vxworks))和保护模块606等。Some features of the embodiments of the present application may be completed / supported by the processor 601 executing software codes in the system memory 602. The system memory 602 may include some software, for example, an operating system 604 (such as Darwin, RTXC, LINUX, UNIX, OS X, WINDOWS, macOS, or embedded operating system (such as Vxworks)) and a protection module 606.
在本申请的一个实施例中,处理器601执行保护模块606来实现本申请实施例的技术方案。保护模块606包括:(1)用于获取主机触发的操作指令的代码;(2)用于接收第一存储装置发送的数据报文的代码,数据报文包含第五数据和关联标识,第五数据为第一数据和第四数据的异或结果,第四数据为第一数据的更新数据,关联标识用于指示操作指令;(3)用于根据第二指令对第五数据和第二数据进行异或操作得到第六数据的代码。In an embodiment of the present application, the processor 601 executes the protection module 606 to implement the technical solution of the embodiment of the present application. The protection module 606 includes: (1) a code for acquiring an operation instruction triggered by a host; (2) a code for receiving a data message sent by the first storage device, the data message includes fifth data and an association identifier, and the fifth The data is the XOR result of the first data and the fourth data, the fourth data is the updated data of the first data, and the association mark is used to indicate the operation instruction; (3) is used to compare the fifth data and the second data according to the second instruction Perform the exclusive OR operation to get the code of the sixth data.
此外,图6仅仅是一个控制器600的例子,控制器600可能包含相比于图6展示的更多或者更少的组件,或者有不同的组件配置方式。同时,图6中展示的各种组件可以用硬件、软件或者硬件与软件的结合方式实施。In addition, FIG. 6 is merely an example of a controller 600. The controller 600 may include more or fewer components than those shown in FIG. 6, or have different component configurations. Meanwhile, various components shown in FIG. 6 may be implemented by hardware, software, or a combination of hardware and software.
为了减少数据更新过程中主机对存储设备的读写操作,从而减少数据更新过程中对交换网络的上行端口的带宽的占用,本发明实施例提供了一种数据保护方法。该方法可以具体为基于NVMe的数据保护方法。数据保护***包括主机,第一存储装置,第二存储装置和至少一个其他存储装置,第一存储装置,第二存储装置和至少一个其他存储装置组成一个独立硬盘冗余阵列RAID,第一存储装置中存储有第一数据,第二存储装置中存 储有第二数据,至少一个其他存储装置中存储有至少一个第三数据,第一数据与至少一个第三数据属于同一个RAID分条,第二数据为第一数据与至少一个第三数据的奇偶校验结果,第一存储装置包含第一控制器和存储介质,第二存储装置包含第二控制器和存储介质。如图7所示,方法700包括:In order to reduce the reading and writing operations of the host to the storage device during the data update process, thereby reducing the occupation of the bandwidth of the upstream port of the switching network during the data update process, embodiments of the present invention provide a data protection method. The method may be specifically a data protection method based on NVMe. The data protection system includes a host, a first storage device, a second storage device and at least one other storage device, the first storage device, the second storage device and at least one other storage device form a redundant array of independent hard disks RAID, the first storage device Where the first data is stored, the second data is stored in the second storage device, at least one third data is stored in at least one other storage device, the first data and the at least one third data belong to the same RAID stripe, the second The data is a parity check result of the first data and at least one third data. The first storage device includes a first controller and a storage medium, and the second storage device includes a second controller and a storage medium. As shown in FIG. 7, the method 700 includes:
步骤701:主机触发第一指令。例如:所述第一指令由主机生成,主机发送第一指令给第一控制器;或者所述第一指令由主机生成,主机把第一指令加入队列,供第一控制器读取,本实施例用后一种情况为例进行介绍。Step 701: The host triggers the first instruction. For example: the first command is generated by the host, the host sends the first command to the first controller; or the first command is generated by the host, the host adds the first command to the queue for the first controller to read, this implementation The latter case is used as an example.
其中,第一指令携带关联标识,该关联标识用于指示第二指令。The first instruction carries an association identifier, and the association identifier is used to indicate the second instruction.
在本发明实施例中,第一指令可以具体为基于NVMe的SQE。在以下描述中,以第一指令为SQE为例进行解释说明。但应理解,本发明实施例并不限定第一指令的具体实现形式。In the embodiment of the present invention, the first instruction may specifically be NVMe-based SQE. In the following description, the first instruction is SQE as an example for explanation. However, it should be understood that the embodiment of the present invention does not limit the specific implementation form of the first instruction.
在本发明实施例中,主机向触发第一指令的流程可以参照NMVe标准。主机将SQE写入与第一控制器关联的发送队列,并通过门铃通知第一控制器有新的SQE。In the embodiment of the present invention, the process for the host to trigger the first instruction can refer to the NMVe standard. The host writes the SQE to the sending queue associated with the first controller, and notifies the first controller of the new SQE through the doorbell.
在本发明实施例中,主机触发第一指令也可以为其他实现形式。例如,主机可以将第一指令直接发送至第一控制器。本发明不限定主机触发第一指令的具体实现形式。In the embodiment of the present invention, the first command triggered by the host may also be implemented in other forms. For example, the host may directly send the first command to the first controller. The invention does not limit the specific implementation form of the host triggering the first instruction.
步骤702:主机触发第二指令。例如:所述第二指令由主机生成,主机发送第二指令给第二控制器;或者所述第二指令由主机生成,主机把第二指令加入队列,供第二控制器读取,本实施例用后一种情况为例进行介绍。Step 702: The host triggers the second instruction. For example: the second command is generated by the host, and the host sends the second command to the second controller; or the second command is generated by the host, the host adds the second command to the queue for the second controller to read, this implementation The latter case is used as an example.
同理,第二指令可以为基于NVMe的SQE。在以下描述中,以第二指令为SQE为例进行解释说明。但应理解,本发明实施例不限定第二指令的具体实现形式。Similarly, the second instruction may be NVMe-based SQE. In the following description, the second instruction is SQE as an example for explanation. However, it should be understood that the embodiment of the present invention does not limit the specific implementation form of the second instruction.
在本发明实施例中,主机触发第二指令可以为主机将第二指令写入与第二控制器关联的发送队列,并通过门铃通知第二控制器有新的SQE。主机触发第二指令也可以为其他实现形式。例如,主机可以将第二指令直接发送至第二控制器。本发明不限定主机触发第二指令的具体实现形式。In the embodiment of the present invention, the host triggering the second instruction may be that the host writes the second instruction to the sending queue associated with the second controller, and notifies the second controller of the new SQE through the doorbell. The second command triggered by the host may also be implemented in other forms. For example, the host may directly send the second command to the second controller. The invention does not limit the specific implementation form of the host triggering the second instruction.
步骤703:第一控制器获取第一指令。Step 703: The first controller obtains the first instruction.
在本发明实施例中,第一控制器可以从与主机关联的发送队列里获取第一指令。具体的,第一控制器接收到主机的门铃通知,该门铃用于指示有新的SQE到达发送队列,第一控制器去发送队列中获取该SQE。第一控制器也可以直接接收主机发送的第一指令。本发明实施例不限定第一控制器获取第一指令的具体实现形式。In the embodiment of the present invention, the first controller may obtain the first instruction from the sending queue associated with the host. Specifically, the first controller receives the doorbell notification of the host, the doorbell is used to indicate that a new SQE arrives in the sending queue, and the first controller goes to the sending queue to obtain the SQE. The first controller may also directly receive the first command sent by the host. The embodiment of the present invention does not limit the specific implementation form of the first controller acquiring the first instruction.
步骤704:第一控制器获取第四数据。Step 704: The first controller obtains fourth data.
其中,第四数据为第一数据的更新数据。即第四数据将替换第一数据存储于第一存储装置。本发明实施例中,第一指令的格式可以参照NVMe标准,主机可以在第一指令中通过SQE的PRP或SGL字段指示第四数据的地址信息。第一控制器根据该地址信息从主机侧读取第四数据。The fourth data is the updated data of the first data. That is, the fourth data will replace the first data in the first storage device. In the embodiment of the present invention, the format of the first instruction may refer to the NVMe standard, and the host may indicate the address information of the fourth data through the PRP or SGL field of SQE in the first instruction. The first controller reads the fourth data from the host side according to the address information.
在本发明实施例中,主机也可以直接向第一控制器发送第四数据,第一控制器从主机直接接收第四数据。本发明实施例不限定第一控制器获取第四数据的具体实现形式。In this embodiment of the present invention, the host may also directly send the fourth data to the first controller, and the first controller directly receives the fourth data from the host. The embodiment of the present invention does not limit the specific implementation form of the first controller acquiring the fourth data.
第一控制器获取到第四数据后,将第四数据存入第一存储装置的存储介质。After acquiring the fourth data, the first controller stores the fourth data in the storage medium of the first storage device.
步骤705:第一控制器在获取第一指令后对第一数据和第四数据进行异或操作,得到第五数据。Step 705: After acquiring the first instruction, the first controller performs an exclusive-OR operation on the first data and the fourth data to obtain fifth data.
在本发明实施例中,第一数据为存储于第一存储装置中的旧数据dold,第四数据为第一数据的更新数据dnew,第二数据为存储于第二存储装置中的旧的奇偶校验结果Pold。在新的奇偶校验结果Pnew的计算方式如下所示:In the embodiment of the present invention, the first data is old data dold stored in the first storage device, the fourth data is update data dnew of the first data, and the second data is old parity stored in the second storage device The verification result is Pold. The calculation method of the new parity result Pnew is as follows:
Figure PCTCN2019090715-appb-000001
Figure PCTCN2019090715-appb-000001
第一控制器首先计算第一数据与第四数据的异或结果。The first controller first calculates the XOR result of the first data and the fourth data.
步骤706:第一控制器向第二控制器发送数据报文。Step 706: The first controller sends a data message to the second controller.
其中,该数据报文中包含第五数据和该关联标识。在具体实现过程中,因为数据报文携带的载荷数据的大小受限,第一控制器可以将第五数据分为多个数据报文发送至第二控制器。Wherein, the data packet contains the fifth data and the association identifier. In a specific implementation process, because the size of the payload data carried in the data packet is limited, the first controller may divide the fifth data into multiple data packets and send the data to the second controller.
在本发明实施例中,第一控制器可以主动向第二控制器推送该数据报文。其中,数据报文携带的关联标识用于关联第五数据和第二指令。本发明实施例不限定关联标识的具体实现方式,关联标识可以直接或间接的指示数据报文中携带的第五数据对应的第二指令。In the embodiment of the present invention, the first controller may actively push the data message to the second controller. The association identifier carried in the data packet is used to associate the fifth data with the second instruction. The embodiment of the present invention does not limit the specific implementation manner of the association identifier. The association identifier may directly or indirectly indicate the second instruction corresponding to the fifth data carried in the data packet.
在本发明实施例中,数据报文可以为PCIe写操作报文,更具体的,数据报文可以是事务层包(TLP),载荷数据可以为TLP中携带的负荷(payload),该关联标识可以为TLP的PCIe地址或者PCIe地址的部分字段。In the embodiment of the present invention, the data message may be a PCIe write operation message. More specifically, the data message may be a transaction layer packet (TLP), and the load data may be a payload carried in the TLP, and the association identifier It can be the PCIe address of the TLP or a partial field of the PCIe address.
在本发明实施例中,第二控制器将其一部分地址空间开放给第一控制器。更具体的,第二控制器给第一控制器开放的地址空间可以作为第二控制器的PCIe地址空间。第一控制器可以访问该PCIe地址访问。例如,第二控制器可以将基地址寄存器的一部分PCIe地址开放给第一控制器访问。In the embodiment of the present invention, the second controller opens a part of its address space to the first controller. More specifically, the address space opened by the second controller to the first controller may serve as the PCIe address space of the second controller. The first controller can access the PCIe address access. For example, the second controller may open a part of the PCIe address of the base address register to the first controller for access.
在以下描述中,以基地址寄存器举例说明,但应理解本发明实施例不限定第二控制器开放给第一控制器访问的地址空间的种类和形式。In the following description, the base address register is used as an example for illustration, but it should be understood that the embodiment of the present invention does not limit the type and form of the address space that the second controller opens to the first controller for access.
在本发明实施例中,第二控制器可以讲一部分基地址寄存器的PCIe地址组织成入口(portal)的形式,每一个入口占据该基地址寄存器的一部分PCIe地址空间。第一控制器可以通过入口向第二控制器写入数据报文。入口即第一控制器向第二控制器进行PCIe写操作的数据入口,在下面的描述中,会对入口的功能进行更详细的描述。In the embodiment of the present invention, the second controller may organize a part of the PCIe addresses of the base address register into a portal, and each entry occupies a part of the PCIe address space of the base address register. The first controller may write a data message to the second controller through the portal. The entry is the data entry for the PCIe write operation from the first controller to the second controller. In the following description, the function of the entry will be described in more detail.
在本发明实施例中,第一控制器向第二控制器推送的数据报文可以为PCIe报文,第一控制器通过将与第二指令关联的第五数据通过入口写入到第二控制器,PCIe报文的地址段指示该写操作对应的入口,即入口地址为数据报文中PCIe地址或者PCIe地址的部分字段。In the embodiment of the present invention, the data message pushed by the first controller to the second controller may be a PCIe message. The first controller writes the fifth data associated with the second instruction to the second control through the entry The address segment of the PCIe message indicates the entry corresponding to the write operation, that is, the entry address is a PCIe address or a partial field of the PCIe address in the data message.
在本发明实施例中,关联标识可以为入口地址或者入口地址的部分字段。第二控制器接收到数据报文后,还用于根据关联标识确定第二指令的存储地址,并根据第二指令的存储地址获取第二指令。存储第二指令的地址可以为提交队列中存储第二指令的槽位地址。In the embodiment of the present invention, the association identifier may be an entry address or a partial field of the entry address. After receiving the data message, the second controller is also used to determine the storage address of the second instruction according to the association identifier, and obtain the second instruction according to the storage address of the second instruction. The address for storing the second instruction may be the address of the slot in the commit queue where the second instruction is stored.
在本发明实施例中,主机和第二控制器维护有入口与发送队列中槽位的对应关系。主机在触发第一指令和第二指令的时候,将第二指令存入关联标识指示的入口对应的发送队列的槽位,并在第一指令中携带该关联标识。第一控制器根据该关联标识向第二控制器发送数据报文,数据报文中携带该关联标识。第二控制器获取到数据报文后,根据关联标识确定与主机关联的发送队列中存储第二地址的槽位,并从该槽位中获取第五数 据关联的第二指令。In the embodiment of the present invention, the host and the second controller maintain the correspondence between the entry and the slot in the sending queue. When the first command and the second command are triggered, the host stores the second command in the slot of the sending queue corresponding to the entry indicated by the association identifier, and carries the association identifier in the first instruction. The first controller sends a data message to the second controller according to the association identifier, and the data message carries the association identifier. After acquiring the data message, the second controller determines the slot in the sending queue associated with the host to store the second address according to the association identifier, and obtains the second instruction associated with the fifth data from the slot.
本发明不限定PCIe地址空间里的入口的组织方式,只需要保证在数据保护操作的过程中,每个入口和具体的第二指令唯一对应,每个入口唯一地关联到具体的第二指令。例如,可以将第二控制器的基地址寄存器的一部分PCIe地址组织成通孔(aperture)的形式,每一个通孔中包含多个入口,即入口可以组织成数组的形式,通过数组基地址加入口偏移量寻址到入口,这个数组称为通孔。每一个入口关联发送队列的一个槽位。图8为基地址寄存器的结构示意图,如图8所示,每个通孔由一组入口P 0~P N组成。The present invention does not limit the organization of entries in the PCIe address space, but only needs to ensure that each entry corresponds to a specific second instruction uniquely during the data protection operation, and each entry is uniquely associated with a specific second instruction. For example, a part of the PCIe address of the base address register of the second controller may be organized in the form of through holes (aperture), and each through hole contains multiple entries, that is, the entries may be organized in the form of an array, which is added through the array base address The port offset is addressed to the entrance, and this array is called a via. Each entry is associated with a slot in the send queue. Fig. 8 is a schematic diagram of the structure of the base address register. As shown in Fig. 8, each through hole is composed of a group of entries P0 to PN.
图9为依据本发明一实施例的PCIe数据报文中的PCIe地址结构。如图9所示,PCIe地址结构中包含BAR的基地址、通孔偏移量以及入口偏移量。其中,BAR和通孔偏移量用于唯一的确定通孔,入口偏移量用于指示该通孔中具体的入口。在本发明实施例中,第五数据由第一控制器通过PCIe BAR空间的通孔“推送”到第二控制器。“推送”指的是第一控制器发起的PCIe写事务。9 is a PCIe address structure in a PCIe data message according to an embodiment of the invention. As shown in FIG. 9, the PCIe address structure includes the base address of BAR, the via offset, and the entry offset. Among them, the BAR and the through hole offset are used to uniquely determine the through hole, and the entrance offset is used to indicate a specific entrance in the through hole. In the embodiment of the present invention, the fifth data is "pushed" by the first controller to the second controller through the PCIe BAR hole. "Push" refers to the PCIe write transaction initiated by the first controller.
在本发明实施例中,入口还可以任意分布在PCIe地址空间,在PCIe空间中任意分布的入口称为任意的“数据入口”。In the embodiment of the present invention, the entries may also be arbitrarily distributed in the PCIe address space, and arbitrarily distributed entries in the PCIe space are called arbitrary "data entries".
在本发明实施例中,关联标识为入口地址或者入口地址的部分字段。主机和第二控制器维护有入口与SQ中槽位的对应关系,SQ槽位与入口一一对应。主机通过入口与SQ槽位的对应关系触发第一指令和第二指令。第二控制器根据SQ槽位与入口的对应关系,可以根据数据报文中的关联标识获取到对应的第二指令。本发明实施例使用存储第二指令的SQ槽位将入口与第二指令关联起来,通过SQ槽位确定入口对应的第二指令。In the embodiment of the present invention, the association identifier is an entry address or a partial field of the entry address. The host and the second controller maintain the correspondence between the entry and the slot in the SQ, and the SQ slot corresponds to the entry in a one-to-one relationship. The host triggers the first instruction and the second instruction through the correspondence between the entry and the SQ slot. According to the correspondence between the SQ slot and the entry, the second controller may obtain the corresponding second instruction according to the association identifier in the data packet. In the embodiment of the present invention, the SQ slot storing the second instruction is used to associate the entry with the second instruction, and the second instruction corresponding to the entry is determined by the SQ slot.
在本发明实施例的其他实现方式中,关联标识还可以为第二指令的指示信息。例如,关联标识还可以包含第二指令的部分字段,第二控制器根据关联标识获取第二指令。具体的,第二指令可以为SQE,关联标识为SQE的指示信息,用于唯一的确定一个SQE。In other implementation manners of the embodiments of the present invention, the association identifier may also be indication information of the second instruction. For example, the association identifier may further include a partial field of the second instruction, and the second controller obtains the second instruction according to the association identifier. Specifically, the second instruction may be SQE, and the indication information associated with the SQE is used to uniquely determine an SQE.
在本发明实施例中,通过在数据报文中携带SQE的指示信息,从而直接实现SQE与第五数据的关联,而不是通过SQ槽位实现间接的关联。例如,如果一个SQ中的每个SQE有各自独特的命令标识CID,则关联标识可以由“队列ID+CID”组成。如果每个SQE的CID都是唯一的,则关联标识可以为对应SQE携带的CID。在其他实现方式中,关联标识还可以为CID的一部分。在本发明实施例中,关联标识还可以使用特别定义的SGL类型或者SGL子类型或者SQE中其他字段指定,只要第二控制器可以根据关联标识唯一的确定第二指令,本发明实施例不限定关联标识的具体实现方式。In the embodiment of the present invention, the SQE indication information is carried in the data message, so that the association between the SQE and the fifth data is directly realized, rather than the indirect association through the SQ slot. For example, if each SQE in an SQ has its own unique command identifier CID, the associated identifier may consist of "queue ID + CID". If the CID of each SQE is unique, the association identifier may be the CID carried by the corresponding SQE. In other implementations, the association identifier may also be part of the CID. In the embodiment of the present invention, the association identifier may also be specified using a specifically defined SGL type or SGL subtype or other fields in the SQE, as long as the second controller can uniquely determine the second instruction according to the association identifier, the embodiment of the present invention is not limited The specific implementation of the association identification.
在本发明实施例中,第一指令用于指示第一控制器对第一数据和第四数据进行异或操作,并指示第一控制器将第一数据和第四数据的异或操作结果第五数据和该关联标识发送至第二控制器。In the embodiment of the present invention, the first instruction is used to instruct the first controller to perform the XOR operation on the first data and the fourth data, and instruct the first controller to change the XOR operation result of the first data and the fourth data. Five data and the associated identifier are sent to the second controller.
步骤707:第二控制器获取第二指令。Step 707: The second controller obtains the second instruction.
本发明实施例中,第二控制器可以从与主机关联的发送队列里获取该第二指令。更具体的,第二控制器接收到主机的门铃通知,该门铃用于指示有新的SQE到达发送队列,控制器在接收到主机的门铃后,去发送队列获取该第二指令。第二控制器也可以直接接收主机发送的第二指令。本发明实施例不限定第二控制器获取第二指令的具体实现形式。In the embodiment of the present invention, the second controller may obtain the second instruction from the sending queue associated with the host. More specifically, the second controller receives the doorbell notification of the host, the doorbell is used to indicate that a new SQE arrives in the sending queue, and after receiving the doorbell of the host, the controller goes to the sending queue to obtain the second instruction. The second controller may also directly receive the second command sent by the host. The embodiment of the present invention does not limit the specific implementation form of the second controller acquiring the second instruction.
本发明实施例中,第二指令的格式可以参照NVMe标准,但本发明实施例通过关联标识关联第二指令,且第五数据由第一控制器主动推送至第二控制器。第二指令不再需要 第二控制器主动通过PCIe读操作去主机获取数据,所以第二指令中不需要再通过SGL域或者PRP域携带数据的地址信息。在具体实现中,第二指令的SGL域或者PRP域中可以不携带其他信息,第二控制器对SGL域或者PRP域的处理方法可以为“忽略”,即本发明实施例可以省略SGL或者PRP。In the embodiment of the present invention, the format of the second instruction may refer to the NVMe standard. However, in the embodiment of the present invention, the second instruction is associated with the association identifier, and the fifth data is actively pushed to the second controller by the first controller. The second command is no longer required. The second controller actively takes the PCIe read operation to obtain data from the host, so the second command does not need to carry the address information of the data through the SGL field or the PRP field. In a specific implementation, the SGL domain or PRP domain of the second instruction may not carry other information, and the processing method of the SGL domain or PRP domain by the second controller may be "ignore", that is, the SGL or PRP may be omitted in the embodiment of the present invention .
在本发明实施例中,关联标识可以为入口地址或者入口地址的部分字段。第二控制器维护有入口与发送队列中槽位的对应关系。第二控制器接收到数据报文后,还用于根据关联标识确定第二指令的存储地址,并根据第二指令的存储地址获取第二指令。In the embodiment of the present invention, the association identifier may be an entry address or a partial field of the entry address. The second controller maintains the correspondence between the entry and the slot in the sending queue. After receiving the data message, the second controller is also used to determine the storage address of the second instruction according to the association identifier, and obtain the second instruction according to the storage address of the second instruction.
在本发明实施例中,关联标识还可以为第二指令的指示信息。例如,关联标识还可以包含第二指令的部分字段。第二控制器还可以根据该关联标识在发送队列中查找该关联标识指示的第二指令。In this embodiment of the present invention, the association identifier may also be indication information of the second instruction. For example, the association identifier may also include some fields of the second instruction. The second controller may also search for the second instruction indicated by the association identifier in the sending queue according to the association identifier.
步骤708:第二控制器获取待第五数据。Step 708: The second controller obtains the data to be fifth.
在本发明实施例中,数据报文中携带第五数据。数据报文中携带的地址信息指示第二控制器的一个入口,第二控制器的入口用于接收数据报文,是第一控制器向第二控制器发送数据报文的入口。第二控制器接收到数据报文后,用于第五数据的存储空间可以是第二控制器的内部存储器,而不是将第五数据存入入口地址指示的存储空间。In the embodiment of the present invention, the data message carries fifth data. The address information carried in the data message indicates an entry of the second controller. The entry of the second controller is used to receive the data message and is an entry for the first controller to send the data message to the second controller. After the second controller receives the data message, the storage space for the fifth data may be the internal memory of the second controller, instead of storing the fifth data in the storage space indicated by the entry address.
具体的,第二控制器可以为每个入口在自己的内部存储器中分配具体的存储块,用于存储该入口接收到的第五数据。为了便于数据管理和查询,第二控制器可以建立存储块与入口的映射关系。第二控制器用于存储数据的内部存储器可以不再通过PCIe寻址的方式供外界访问,不是也不作为命令内存缓冲区,本发明实施例不限定用于存储第五数据的存储块的具体实现方式。Specifically, the second controller may allocate a specific storage block in its own internal memory for each entry to store the fifth data received by the entry. In order to facilitate data management and query, the second controller may establish a mapping relationship between the storage block and the entry. The internal memory used by the second controller to store data can no longer be accessed by the outside world through PCIe addressing, nor is it also used as a command memory buffer. The embodiment of the present invention does not limit the specific implementation of the storage block for storing fifth data the way.
可选的,第一控制器可以使用多个数据报文对第五数据进行发送。第二控制器可以使用根数据结构对从入口接收的数据进行组织。如图10所示,数据报文可以具体为PCIe写报文,第一控制器通过PCIe写操作将第五数据写入第二控制器。第二控制器接收到数据报文后,可以将数据组织成根数据结构,以方便数据的管理。Optionally, the first controller may use multiple data packets to send the fifth data. The second controller may use the root data structure to organize the data received from the portal. As shown in FIG. 10, the data message may specifically be a PCIe write message, and the first controller writes the fifth data to the second controller through the PCIe write operation. After receiving the data message, the second controller can organize the data into a root data structure to facilitate data management.
在本发明实施例中,第二控制器接收到数据报文后,解码数据报文的地址并识别关联标识,根据关联标识识别入口和根数据结构,从内存存储器中为数据分配空闲的内存块,并将数据保存至分配的内存块,将内存块附到根数据结构。第二控制器首先将数据存储在自己的内部存储器中,在满足一定的条件时,将内部存储器存储的数据与第二数据或第二数据的部分字段进行异或操作。此处的满足条件可以为第二控制器获取到第二指令,或者内部存储器中存储的数据量积累到第二NMVe控制器可以对其进行一次异或操作的程度。其中,第二控制器的内部存储器可以为控制器的私有内存。In the embodiment of the present invention, after receiving the data message, the second controller decodes the address of the data message and identifies the associated identifier, identifies the entry and root data structure according to the associated identifier, and allocates free memory blocks for data from the memory storage , And save the data to the allocated memory block, and attach the memory block to the root data structure. The second controller first stores the data in its own internal memory. When certain conditions are met, the data stored in the internal memory is XORed with the second data or some fields of the second data. The satisfying condition here may be that the second controller obtains the second instruction, or the amount of data stored in the internal memory is accumulated to the extent that the second NMVe controller can perform an XOR operation on it. The internal memory of the second controller may be the private memory of the controller.
本发明实施例不限定第二控制器获取数据报文和第二指令的顺序,第二控制器可以先接收到第一控制器推送的数据报文,并根据关联标识确定第二指令。第二控制器也可以先获取第二指令,再根据第二指令获取对应的第五数据。例如,第二控制器可以根据第二指令确定该关联标识,然后根据关联标识确定对应的入口,并根据关联标识从为该入口分配的存储空间中获取存储的载荷数据。The embodiment of the present invention does not limit the order in which the second controller acquires the data message and the second instruction. The second controller may first receive the data message pushed by the first controller, and determine the second instruction according to the association identifier. The second controller may also obtain the second instruction first, and then obtain the corresponding fifth data according to the second instruction. For example, the second controller may determine the association identifier according to the second instruction, and then determine the corresponding entry according to the association identifier, and obtain the stored load data from the storage space allocated to the entry according to the association identifier.
本发明实施例不限定与第二指令对应的第五数据和第二指令本身的到达第二控制器的顺序。The embodiment of the present invention does not limit the order in which the fifth data corresponding to the second instruction and the second instruction itself arrive at the second controller.
第二控制器可以维护有SQ槽位与入口的一一对应关系,当从一个槽位中获取到第二 指令后,可以根据维护的对应关系确定该第二指令对应的入口。如果第二控制器检测到对应的入口还没有数据到达,则第二控制器挂起第二指令,等待数据到来。直至第二控制器检测到对应的入口有数据到达,便可以执行对第五数据与第二数据的异或操作。The second controller may maintain a one-to-one correspondence between the SQ slot and the entry. When the second instruction is obtained from a slot, the entry corresponding to the second instruction may be determined according to the maintained correspondence. If the second controller detects that no data has arrived at the corresponding entry, the second controller suspends the second instruction and waits for the data to arrive. Until the second controller detects that data has arrived at the corresponding entry, it can perform an exclusive OR operation on the fifth data and the second data.
如果一部分数据先于第二指令到达第二控制器,第二控制器根据数据报文中携带的关联标识检测到数据对应的第二指令还没有到达第二控制器或者对应的SQ槽位。则第二控制器可以将数据附到根数据结构,等待相关的第二指令到来,直至对应的第二指令到达第二控制器或者第二控制器可寻址的SQ槽位,第二控制器获取该第二指令,并根据第二指令对第五数据和第二数据进行异或操作,从而得到第六数据。If a part of the data arrives at the second controller before the second instruction, the second controller detects that the second instruction corresponding to the data has not reached the second controller or the corresponding SQ slot according to the association identifier carried in the data packet. Then the second controller can attach the data to the root data structure and wait for the relevant second instruction to arrive until the corresponding second instruction reaches the second controller or the addressable SQ slot of the second controller. Obtain the second instruction, and perform an exclusive OR operation on the fifth data and the second data according to the second instruction, thereby obtaining sixth data.
在本发明实施例中,第二指令用于指示第二控制器对第二数据和第五数据进行异或操作,得到该分条最新的奇偶校验结果。In the embodiment of the present invention, the second instruction is used to instruct the second controller to perform an XOR operation on the second data and the fifth data to obtain the latest parity check result of the stripe.
步骤709:第二控制器根据第二指令对第五数据和第二数据进行异或操作,得到第六数据。Step 709: The second controller performs an exclusive OR operation on the fifth data and the second data according to the second instruction to obtain sixth data.
在本发明实施例中,第二指令用于指示第二控制器对第二数据和第五数据进行异或操作,得到该分条最新的奇偶校验结果。In the embodiment of the present invention, the second instruction is used to instruct the second controller to perform an XOR operation on the second data and the fifth data to obtain the latest parity check result of the stripe.
因为第五数据是第一数据与第四数据的异或结果,则只需在对第五数据和第二数据进行异或操作就可以得到最新的奇偶校验结果第六数据,即该第六数据是第四数据和该至少一个第三数据的奇偶校验数据。Because the fifth data is the XOR result of the first data and the fourth data, you only need to perform the XOR operation on the fifth data and the second data to get the latest parity result sixth data, that is, the sixth The data is parity data of the fourth data and the at least one third data.
第二控制器对第二数据和第二数据进行异或操作得到第六数据后,将第六数据存入第二存储装置的存储介质。After the second controller performs an exclusive-OR operation on the second data and the second data to obtain the sixth data, the sixth data is stored in the storage medium of the second storage device.
在本发明实施例中,第一控制器可以通过多个数据报文发送第五数据,第二控制器通过入口接收第一控制器推送的数据和第二控制器将接收到的数据与第二数据的部分字段进行异或操作可以并行执行。如果当前通过入口接收的数据处理完成,即当前通过入口接收到的数据已经与第二数据的对应字段完成异或操作,但***需要更多的数据来完成数据保护,第二控制器则挂起第二指令等待数据到来。In the embodiment of the present invention, the first controller may send the fifth data through multiple data packets, and the second controller receives the data pushed by the first controller through the portal and the second controller combines the received data with the second XOR operations can be performed in parallel on some fields of the data. If the data processing currently received through the portal is completed, that is, the data currently received through the portal has been XORed with the corresponding field of the second data, but the system needs more data to complete the data protection, the second controller hangs The second instruction waits for data to arrive.
步骤710:第二控制器触发完成消息。Step 710: The second controller triggers the completion message.
第二控制器完成对第五数据和第二数据的异或操作后,会触发完成消息。该完成消息用于指示第二控制器完成对第五数据和第二数据的异或操作。After the second controller completes the XOR operation on the fifth data and the second data, it will trigger a completion message. The completion message is used to instruct the second controller to complete the XOR operation on the fifth data and the second data.
在本发明实施例中,完成消息可以为触发完成队列条目(completion queue entry,CQE)。第二控制器触发完成消息可以具体为第二控制器完成写操作后,将CQE写入完成队列(completion queue,CQ),并通过中断通知主机。In the embodiment of the present invention, the completion message may be a trigger queue entry (completion queue entry, CQE). The trigger completion message of the second controller may specifically be that after the second controller completes the write operation, the CQE is written into a completion queue (CQ), and the host is notified by an interrupt.
根据本发明实施例公开的技术方案,主机向第一控制器触发第一指令,并向第二控制器触发第二指令。其中,主机向第一控制器触发的第一指令中携带有指示第二指令的关联标识。第一控制器获取到新数据第四数据后,对新数据第四数据和旧数据第一数据进行异或操作得到第五数据,主动向第二控制器发送数据报文,数据报文中携带第五数据和该关联标识。第二控制器获取到数据报文后,根据关联标识关联第二指令和第五数据,并根据第二指令对第五数据和旧的奇偶校验结果第二数据进行异或操作得到新的奇偶校验结果第六数据。从而避免了数据更新过程中主机多次对存储装置进行读写操作。主机与第一存储装置和第二存储装置互联的交换网络的上行端口的数据流量大大减少,从而提升了***的总体性能。According to the technical solution disclosed in the embodiment of the present invention, the host triggers the first instruction to the first controller and triggers the second instruction to the second controller. Wherein, the first instruction triggered by the host to the first controller carries an association identifier indicating the second instruction. After acquiring the fourth data of the new data, the first controller XORs the fourth data of the new data and the first data of the old data to obtain the fifth data, and actively sends a data message to the second controller, which is carried in the data message The fifth data and the associated identification. After obtaining the data message, the second controller associates the second instruction and the fifth data according to the association identifier, and performs an exclusive OR operation on the fifth data and the old parity check result second data according to the second instruction to obtain a new parity The sixth data of the verification result. Thereby, the host is prevented from reading and writing the storage device multiple times during the data update process. The data traffic of the upstream port of the switching network interconnecting the host with the first storage device and the second storage device is greatly reduced, thereby improving the overall performance of the system.
图11为依据本发明一实施例的一种数据保护装置1100的逻辑结构示意图。数据保护***包括数据保护装置1100,第一存储装置,第二存储装置和至少一个其他存储装置,第一存储装置,第二存储装置和至少一个其他存储装置组成一个独立硬盘冗余阵列RAID,第一存储装置中存储有第一数据,第二存储装置中存储有第二数据,至少一个其他存储装置中存储有至少一个第三数据,第一数据与至少一个第三数据属于同一个RAID分条,第二数据为第一数据与至少一个第三数据的奇偶校验结果,第一存储装置包含第一控制器和存储介质,第二存储装置包含第二控制器和存储介质。如图11所示,数据保护装置1100包括处理单元1101和获取单元1102,其中,11 is a schematic diagram of a logical structure of a data protection device 1100 according to an embodiment of the invention. The data protection system includes a data protection device 1100, a first storage device, a second storage device and at least one other storage device, the first storage device, the second storage device and at least one other storage device form a redundant array of independent hard disks RAID, the first A storage device stores first data, a second storage device stores second data, at least one other storage device stores at least one third data, and the first data and at least one third data belong to the same RAID stripe The second data is a parity check result of the first data and at least one third data. The first storage device includes a first controller and a storage medium, and the second storage device includes a second controller and a storage medium. As shown in FIG. 11, the data protection device 1100 includes a processing unit 1101 and an acquisition unit 1102, where,
处理单元1101用于触发第一指令,第一指令携带关联标识,关联标识用于指示第二指令;第一指令用于指示第一控制器对第一数据和第四数据进行异或操作得到第五数据,并指示第一控制器向第二控制器发送数据报文,数据报文包含第五数据和关联标识,其中第四数据为第一数据的更新数据。处理单元1101还用于触发第二指令,第二指令用于指示第二控制器对第五数据和第二数据进行异或操作得到第六数据。The processing unit 1101 is used to trigger a first instruction, the first instruction carries an association identifier, and the association identifier is used to indicate a second instruction; the first instruction is used to instruct the first controller to perform an XOR operation on the first data and the fourth data to obtain the first Five data, and instructs the first controller to send a data message to the second controller, where the data message contains the fifth data and the associated identifier, where the fourth data is the updated data of the first data. The processing unit 1101 is further configured to trigger a second instruction, and the second instruction is used to instruct the second controller to perform an exclusive OR operation on the fifth data and the second data to obtain sixth data.
可选的,备份装置1100还包括获取单元1102,用于获取第二控制器触发的完成消息,完成消息用于指示第二控制器完成对第五数据和第二数据的异或操作。Optionally, the backup device 1100 further includes an obtaining unit 1102, configured to obtain a completion message triggered by the second controller, and the completion message is used to instruct the second controller to complete the XOR operation on the fifth data and the second data.
可选的,数据报文为PCIe报文,关联标识包含第二控制器的PCIe地址字段。Optionally, the data message is a PCIe message, and the association identifier includes the PCIe address field of the second controller.
可选的,关联标识包含第二指令的部分字段。Optionally, the association identifier includes a partial field of the second instruction.
在本申请实施例中,处理单元1101和获取单元1102可以由图4中的处理器401中的保护逻辑410来实现,或者由图4中的处理器401和***内存402中的保护模块406来实现。In the embodiment of the present application, the processing unit 1101 and the obtaining unit 1102 may be implemented by the protection logic 410 in the processor 401 in FIG. 4 or may be implemented by the processor 401 in FIG. 4 and the protection module 406 in the system memory 402 achieve.
本申请实施例为以上实施例对应的主机的装置实施例,以上实施例部分的特征描述适用于本申请实施例,在此不再赘述。The embodiments of the present application are the embodiments of the host device corresponding to the above embodiments, and the feature descriptions in the above embodiments are applicable to the embodiments of the present application, which will not be repeated here.
图12为依据本发明一实施例的一种备份装置1200的逻辑结构示意图。数据保护***包括主机,第一存储装置,第二存储装置和至少一个其他存储装置,第一存储装置,第二存储装置和至少一个其他存储装置组成一个独立硬盘冗余阵列RAID,第一存储装置中存储有第一数据,第二存储装置中存储有第二数据,至少一个其他存储装置中存储有至少一个第三数据,第一数据与至少一个第三数据属于同一个RAID分条,第二数据为第一数据与至少一个第三数据的奇偶校验结果,第一存储装置包含数据保护装置1200和存储介质,第二存储装置包含控制器和存储介质。如图12所示,备份装置1200包括处理单元1201和发送单元1202,其中,12 is a schematic diagram of a logical structure of a backup device 1200 according to an embodiment of the invention. The data protection system includes a host, a first storage device, a second storage device and at least one other storage device, the first storage device, the second storage device and at least one other storage device form a redundant array of independent hard disks RAID, the first storage device Where the first data is stored, the second data is stored in the second storage device, at least one third data is stored in at least one other storage device, the first data and the at least one third data belong to the same RAID stripe, the second The data is a parity check result of the first data and at least one third data. The first storage device includes a data protection device 1200 and a storage medium, and the second storage device includes a controller and a storage medium. As shown in FIG. 12, the backup device 1200 includes a processing unit 1201 and a sending unit 1202, where,
处理单元1201用于获取主机触发的第一指令和第四数据,第一指令携带关联标识,关联标识用于指示第二指令,并在获取第一指令后对第一数据和第四数据进行异或操作得到第五数据,其中第四数据为第一数据的更新数据。The processing unit 1201 is used to obtain the first instruction and the fourth data triggered by the host, the first instruction carries an association identifier, and the association identifier is used to indicate the second instruction, and after obtaining the first instruction, the first data and the fourth data are different Or the operation obtains the fifth data, wherein the fourth data is the updated data of the first data.
发送单元1202用于向控制器发送数据报文,数据报文包含第五数据和关联标识。The sending unit 1202 is configured to send a data message to the controller. The data message includes fifth data and an association identifier.
可选的,数据报文为PCIe报文,关联标识包含该控制器的PCIe地址字段。Optionally, the data message is a PCIe message, and the association identifier includes the PCIe address field of the controller.
可选的,关联标识包含第二指令的部分字段。Optionally, the association identifier includes a partial field of the second instruction.
在本申请实施例中,处理单元1201和发送单元1202可以由图5中的处理器501中的保护逻辑505来实现,或者由图5中的处理器501和***内存502中的保护模块506来实现。In the embodiment of the present application, the processing unit 1201 and the sending unit 1202 may be implemented by the protection logic 505 in the processor 501 in FIG. 5 or by the processor 501 in FIG. 5 and the protection module 506 in the system memory 502 achieve.
本申请实施例为以上实施例对应的第一控制器的装置实施例,以上实施例部分的特征描述适用于本申请实施例,在此不再赘述。The embodiments of the present application are the device embodiments of the first controller corresponding to the above embodiments, and the feature descriptions in the above embodiments are applicable to the embodiments of the present application, which will not be repeated here.
图13为依据本发明一实施例的一种备份装置1300的逻辑结构示意图。数据保护***包括主机,第一存储装置,第二存储装置和至少一个其他存储装置,第一存储装置,第二存储装置和至少一个其他存储装置组成一个独立硬盘冗余阵列RAID,第一存储装置中存储有第一数据,第二存储装置中存储有第二数据,至少一个其他存储装置中存储有至少一个第三数据,第一数据与至少一个第三数据属于同一个RAID分条,第二数据为第一数据与至少一个第三数据的奇偶校验结果,第一存储装置包含控制器和存储介质,第二存储装置包含数据保护装置1300和存储介质。如图13所示,备份装置1300包括获取单元1301和处理单元1302,其中,13 is a schematic diagram of a logical structure of a backup device 1300 according to an embodiment of the invention. The data protection system includes a host, a first storage device, a second storage device and at least one other storage device, the first storage device, the second storage device and at least one other storage device form a redundant array of independent hard disks RAID, the first storage device Where the first data is stored, the second data is stored in the second storage device, at least one third data is stored in at least one other storage device, the first data and the at least one third data belong to the same RAID stripe, the second The data is a parity check result of the first data and at least one third data. The first storage device includes a controller and a storage medium, and the second storage device includes a data protection device 1300 and a storage medium. As shown in FIG. 13, the backup device 1300 includes an acquisition unit 1301 and a processing unit 1302, where,
获取单元1301用于获取主机触发的操作指令,并接收控制器发送的数据报文,数据报文包含第五数据和关联标识,第五数据为第一数据和第四数据的异或结果,第四数据为第一数据的更新数据,关联标识用于指示操作指令。The obtaining unit 1301 is used to obtain an operation instruction triggered by the host, and receive a data message sent by the controller. The data message includes fifth data and an association identifier. The fifth data is the XOR result of the first data and the fourth data. The fourth data is the updated data of the first data, and the associated identifier is used to indicate the operation instruction.
处理单元1302用于根据第二指令对第五数据和第二数据进行异或操作得到第六数据。The processing unit 1302 is configured to perform an exclusive OR operation on the fifth data and the second data according to the second instruction to obtain sixth data.
可选的,数据报文为PCIe报文,关联标识包含数据保护装置1301的PCIe地址字段。Optionally, the data message is a PCIe message, and the association identifier includes a PCIe address field of the data protection device 1301.
可选的,数据保护装置1300还包含内部存储器,处理单元1302对第五数据和第二数据进行异或操作之前,还用于将第五数据存入内部存储器的存储空间,并记录存储空间与关联标识之间的映射关系。Optionally, the data protection device 1300 further includes an internal memory, and before the XOR operation is performed on the fifth data and the second data, the processing unit 1302 is also used to store the fifth data in the storage space of the internal memory, and record the storage space and The mapping relationship between association IDs.
可选的,获取单元1301还用于根据关联标识确定操作指令的存储位置,并根据操作指令的存储位置获取操作指令。Optionally, the obtaining unit 1301 is further configured to determine the storage location of the operation instruction according to the association identifier, and obtain the operation instruction according to the storage location of the operation instruction.
可选的,关关联标识包含操作指令的部分字段,获取单元1301还用于根据操作指令的部分字段获取第二指令。Optionally, the association identifier includes a partial field of the operation instruction, and the obtaining unit 1301 is further configured to obtain the second instruction according to the partial field of the operation instruction.
可选的,处理单元1302还用于触发完成消息,完成消息用于指示数据保护装置1300完成对第五数据和第二数据的异或操作。Optionally, the processing unit 1302 is also used to trigger a completion message, and the completion message is used to instruct the data protection device 1300 to complete the XOR operation on the fifth data and the second data.
在本申请实施例中,获取单元1301和处理单元1302可以具体由图6中的处理器601中的保护逻辑605来实现,或者由图6中的处理器601和***内存602中的保护模块606来实现。In the embodiment of the present application, the acquiring unit 1301 and the processing unit 1302 may be specifically implemented by the protection logic 605 in the processor 601 in FIG. 6 or may be implemented by the processor 601 in FIG. 6 and the protection module 606 in the system memory 602 to fulfill.
本申请实施例为以上实施例对应的第二控制器的装置实施例,以上实施例部分的特征描述适用于本申请实施例,在此不再赘述。The embodiments of the present application are the device embodiments of the second controller corresponding to the above embodiments, and the feature descriptions in the above embodiments are applicable to the embodiments of the present application, and are not repeated here.
以上实施例仅用以说明本申请的技术方案,而非对其限制;尽管参照前述实施例对本申请进行了详细的说明,本领域的普通技术人员应当理解:其依然可以对前述各实施例所记载的技术方案进行修改,或者替换其中部分技术特征;而这些修改或者替换,并不使相应技术方案脱离权利要求的保护范围。The above embodiments are only used to illustrate the technical solutions of the present application, not to limit them; although the present application has been described in detail with reference to the foregoing embodiments, persons of ordinary skill in the art should understand that they can still apply the technical solutions of the foregoing embodiments. The recorded technical solutions are modified or replace some of the technical features; and these modifications or replacements do not deviate from the protection scope of the claims of the corresponding technical solutions.

Claims (32)

  1. 一种数据保护***,其特征在于,所述***包括主机,第一存储装置,第二存储装置和至少一个其他存储装置,所述第一存储装置,所述第二存储装置和所述至少一个其他存储装置组成一个独立硬盘冗余阵列RAID,所述第一存储装置中存储有第一数据,所述第二存储装置中存储有第二数据,所述至少一个其他存储装置中存储有至少一个第三数据,所述第一数据与所述至少一个第三数据属于同一个RAID分条,所述第二数据为所述第一数据与所述至少一个第三数据的奇偶校验结果,所述第一存储装置包含第一控制器和存储介质,所述第二存储装置包含第二控制器和存储介质;A data protection system, characterized in that the system includes a host, a first storage device, a second storage device and at least one other storage device, the first storage device, the second storage device and the at least one Other storage devices form a RAID array of independent hard disks, the first storage device stores first data, the second storage device stores second data, and the at least one other storage device stores at least one The third data, the first data and the at least one third data belong to the same RAID stripe, and the second data is a parity result of the first data and the at least one third data. The first storage device includes a first controller and a storage medium, and the second storage device includes a second controller and a storage medium;
    所述主机用于触发第一指令和第二指令,所述第一指令携带关联标识,所述关联标识用于指示所述第二指令;The host is used to trigger a first instruction and a second instruction, the first instruction carries an association identifier, and the association identifier is used to indicate the second instruction;
    所述第一控制器用于获取所述第一指令和第四数据,在获取所述第一指令后对所述第一数据和所述第四数据进行异或操作得到第五数据,并向所述第二控制器发送数据报文,所述数据报文包含所述第五数据和所述关联标识,其中所述第四数据为所述第一数据的更新数据;The first controller is used to obtain the first instruction and the fourth data, and after obtaining the first instruction, perform an XOR operation on the first data and the fourth data to obtain fifth data, The second controller sends a data message, where the data message includes the fifth data and the association identifier, where the fourth data is updated data of the first data;
    所述第二控制器用于获取所述第二指令和所述数据报文,并根据所述第二指令对所述第五数据和所述第二数据进行异或操作得到第六数据。The second controller is used to obtain the second instruction and the data message, and perform an exclusive OR operation on the fifth data and the second data according to the second instruction to obtain sixth data.
  2. 根据权利要求1所述的***,其特征在于,所述数据报文为PCIe报文,所述关联标识包含所述第二控制器的PCIe地址字段。The system according to claim 1, wherein the data message is a PCIe message, and the association identifier includes a PCIe address field of the second controller.
  3. 根据权利要求1或2所述的***,其特征在于,所述第二控制器包含内部存储器,所述第二控制器还用于:对所述第五数据和所述第二数据进行异或操作之前,将所述第五数据存入所述内部存储器的存储空间,并记录所述存储空间与所述关联标识之间的映射关系。The system according to claim 1 or 2, wherein the second controller includes an internal memory, and the second controller is further configured to XOR the fifth data and the second data Before the operation, the fifth data is stored in the storage space of the internal memory, and the mapping relationship between the storage space and the association identifier is recorded.
  4. 根据权利要求1-3任一项所述的***,其特征在于,所述第二控制器还用于根据所述关联标识确定所述第二指令的存储位置,所述第二控制器用于根据所述第二指令的存储位置获取所述第二指令。The system according to any one of claims 1 to 3, wherein the second controller is further used to determine the storage location of the second instruction according to the association identifier, and the second controller is used to The storage location of the second instruction acquires the second instruction.
  5. 根据权利要求1-3任一项所述的***,其特征在于,所述关联标识包含所述第二指令的部分字段,所述第二控制器用于根据所述第二指令的部分字段获取所述第二指令。The system according to any one of claims 1-3, wherein the association identifier includes a partial field of the second instruction, and the second controller is configured to obtain Describe the second instruction.
  6. 根据权利要求1-5任一项所述的***,其特征在于,所述第一指令和/或所述第二指令为基于非易失性高速传输总线NVMe的提交队列条目SQE。The system according to any one of claims 1 to 5, wherein the first instruction and / or the second instruction is a submission queue entry SQE based on a non-volatile high-speed transmission bus NVMe.
  7. 一种数据保护方法,其特征在于,数据保护***包括主机,第一存储装置,第二存储装置和至少一个其他存储装置,所述第一存储装置,所述第二存储装置和所述至少一个其他存储装置组成一个独立硬盘冗余阵列RAID,所述第一存储装置中存储有第一数据,所述第二存储装置中存储有第二数据,所述至少一个其他存储装置中存储有至少一个第三数据,所述第一数据与所述至少一个第三数据属于同一个RAID分条,所述第二数据为所述第一数据与所述至少一个第三数据的奇偶校验结果,所述第一存储装置包含第一控制器和存储介质,所述第二存储装置包含第二控制器和存储介质;所述方法包括:A data protection method, characterized in that the data protection system includes a host, a first storage device, a second storage device and at least one other storage device, the first storage device, the second storage device and the at least one Other storage devices form a RAID array of independent hard disks, the first storage device stores first data, the second storage device stores second data, and the at least one other storage device stores at least one The third data, the first data and the at least one third data belong to the same RAID stripe, and the second data is a parity result of the first data and the at least one third data. The first storage device includes a first controller and a storage medium, and the second storage device includes a second controller and a storage medium; the method includes:
    所述主机触发第一指令,所述第一指令携带关联标识,所述关联标识用于指示第二指令;所述第一指令用于指示所述第一控制器对所述第一数据和第四数据进行异或操作 得到第五数据,并指示所述第一控制器向所述第二控制器发送数据报文,所述数据报文包含所述第五数据和所述关联标识,其中所述第四数据为所述第一数据的更新数据;The host triggers a first instruction, the first instruction carries an association identifier, and the association identifier is used to indicate a second instruction; the first instruction is used to instruct the first controller to Four data XOR operation to obtain fifth data, and instructs the first controller to send a data message to the second controller, the data message contains the fifth data and the association identifier, wherein The fourth data is updated data of the first data;
    所述主机触发第二指令,所述第二指令用于指示所述第二控制器对所述第五数据和所述第二数据进行异或操作得到第六数据。The host triggers a second instruction, and the second instruction is used to instruct the second controller to perform an exclusive OR operation on the fifth data and the second data to obtain sixth data.
  8. 根据权利要求7所述的方法,其特征在于,所述第一指令和/或所述第二指令为基于非易失性高速传输总线NVMe的提交队列条目SQE。The method according to claim 7, wherein the first instruction and / or the second instruction is a submission queue entry SQE based on a non-volatile high-speed transmission bus NVMe.
  9. 根据权利要求7或8所述的方法,其特征在于,所述数据报文为PCIe报文,所述关联标识包含所述第二控制器的PCIe地址字段。The method according to claim 7 or 8, wherein the data message is a PCIe message, and the association identifier includes a PCIe address field of the second controller.
  10. 根据权利要求7或8所述的方法,其特征在于,所述关联标识包含所述第二指令的部分字段。The method according to claim 7 or 8, wherein the association identifier includes a partial field of the second instruction.
  11. 一种数据保护方法,其特征在于,数据保护***包括主机,第一存储装置,第二存储装置和至少一个其他存储装置,所述第一存储装置,所述第二存储装置和所述至少一个其他存储装置组成一个独立硬盘冗余阵列RAID,所述第一存储装置中存储有第一数据,所述第二存储装置中存储有第二数据,所述至少一个其他存储装置中存储有至少一个第三数据,所述第一数据与所述至少一个第三数据属于同一个RAID分条,所述第二数据为所述第一数据与所述至少一个第三数据的奇偶校验结果,所述第一存储装置包含第一控制器和存储介质,所述第二存储装置包含第二控制器和存储介质;所述方法包括:A data protection method, characterized in that the data protection system includes a host, a first storage device, a second storage device and at least one other storage device, the first storage device, the second storage device and the at least one Other storage devices form a RAID array of independent hard disks, the first storage device stores first data, the second storage device stores second data, and the at least one other storage device stores at least one The third data, the first data and the at least one third data belong to the same RAID stripe, and the second data is a parity result of the first data and the at least one third data. The first storage device includes a first controller and a storage medium, and the second storage device includes a second controller and a storage medium; the method includes:
    所述第一控制器获取所述主机触发的第一指令和第四数据,所述第一指令携带关联标识,所述关联标识用于指示第二指令,所述第四数据为所述第一数据的更新数据;The first controller obtains the first instruction and the fourth data triggered by the host, the first instruction carries an association identifier, the association identifier is used to indicate a second instruction, and the fourth data is the first Data update data;
    所述第一控制器在获取所述第一指令后对所述第一数据和所述第四数据进行异或操作得到第五数据;After acquiring the first instruction, the first controller performs an exclusive OR operation on the first data and the fourth data to obtain fifth data;
    所述第一控制器并向所述第二控制器发送数据报文,所述数据报文包含所述第五数据和所述关联标识。The first controller also sends a data message to the second controller, where the data message includes the fifth data and the association identifier.
  12. 根据权利要求11所述的方法,其特征在于,所述数据报文为PCIe报文,所述关联标识包含所述第二控制器的PCIe地址字段。The method according to claim 11, wherein the data message is a PCIe message, and the association identifier includes a PCIe address field of the second controller.
  13. 根据权利要求11所述的方法,其特征在于,所述关联标识包含所述第二指令的部分字段。The method according to claim 11, wherein the association identifier includes a partial field of the second instruction.
  14. 一种数据保护方法,其特征在于,数据保护***包括主机,第一存储装置,第二存储装置和至少一个其他存储装置,所述第一存储装置,所述第二存储装置和所述至少一个其他存储装置组成一个独立硬盘冗余阵列RAID,所述第一存储装置中存储有第一数据,所述第二存储装置中存储有第二数据,所述至少一个其他存储装置中存储有至少一个第三数据,所述第一数据与所述至少一个第三数据属于同一个RAID分条,所述第二数据为所述第一数据与所述至少一个第三数据的奇偶校验结果,所述第一存储装置包含第一控制器和存储介质,所述第二存储装置包含第二控制器和存储介质;所述方法包括:A data protection method, characterized in that the data protection system includes a host, a first storage device, a second storage device and at least one other storage device, the first storage device, the second storage device and the at least one Other storage devices form a RAID array of independent hard disks, the first storage device stores first data, the second storage device stores second data, and the at least one other storage device stores at least one The third data, the first data and the at least one third data belong to the same RAID stripe, and the second data is a parity result of the first data and the at least one third data. The first storage device includes a first controller and a storage medium, and the second storage device includes a second controller and a storage medium; the method includes:
    所述第二控制器获取所述主机触发的操作指令;The second controller obtains an operation instruction triggered by the host;
    所述第二控制器接收所述第一控制器发送的数据报文,所述数据报文包含所述第五数据和关联标识,所述第五数据为第一数据和第四数据的异或结果,所述第四数据为所述第一数据的更新数据,所述关联标识用于指示所述操作指令;The second controller receives a data message sent by the first controller, the data message includes the fifth data and an association identifier, and the fifth data is an exclusive OR of the first data and the fourth data As a result, the fourth data is updated data of the first data, and the association identifier is used to indicate the operation instruction;
    所述第二控制器根据所述第二指令对所述第五数据和所述第二数据进行异或操作得 到第六数据。The second controller performs an exclusive OR operation on the fifth data and the second data according to the second instruction to obtain sixth data.
  15. 根据权利要求14所述的方法,其特征在于,所述数据报文为PCIe报文,所述关联标识包含所述第二控制器的PCIe地址字段。The method according to claim 14, wherein the data message is a PCIe message, and the association identifier includes a PCIe address field of the second controller.
  16. 根据权利要求14或15所述的方法,其特征在于,所述第二控制器包含内部存储器,所述第二控制器对所述第五数据和所述第二数据进行异或操作之前,所述方法还包括:The method according to claim 14 or 15, wherein the second controller includes an internal memory, and the second controller performs an exclusive OR operation on the fifth data and the second data before The method also includes:
    所述第二控制器将所述第五数据存入所述内部存储器的存储空间,并记录所述存储空间与所述关联标识之间的映射关系。The second controller stores the fifth data in the storage space of the internal memory, and records the mapping relationship between the storage space and the association identifier.
  17. 根据权利要求14-16任一项所述的方法,其特征在于,所述方法还包括:The method according to any one of claims 14 to 16, wherein the method further comprises:
    所述第二控制器根据所述关联标识确定所述操作指令的存储位置;The second controller determines the storage location of the operation instruction according to the association identifier;
    所述第二控制器获取所述操作指令包括:所述第二控制器根据所述操作指令的存储位置获取所述操作指令。The second controller acquiring the operation instruction includes: the second controller acquiring the operation instruction according to a storage location of the operation instruction.
  18. 根据权利要求14-16任一项所述的方法,其特征在于,所述关联标识包含所述操作指令的部分字段;The method according to any one of claims 14-16, wherein the association identifier includes a partial field of the operation instruction;
    所述第二控制器获取所述操作指令包括:所述第二控制器根据所述操作指令的部分字段获取所述操作指令。The second controller acquiring the operation instruction includes the second controller acquiring the operation instruction according to a partial field of the operation instruction.
  19. 根据权利要求14-18任一项所述的方法,其特征在于,所述操作指令为基于非易失性高速传输总线NVMe的提交队列条目SQE。The method according to any one of claims 14 to 18, wherein the operation instruction is a submission queue entry SQE based on a non-volatile high-speed transmission bus NVMe.
  20. 一种数据保护装置,其特征在于,数据保护***包括所述数据保护装置,第一存储装置,第二存储装置和至少一个其他存储装置,所述第一存储装置,所述第二存储装置和所述至少一个其他存储装置组成一个独立硬盘冗余阵列RAID,所述第一存储装置中存储有第一数据,所述第二存储装置中存储有第二数据,所述至少一个其他存储装置中存储有至少一个第三数据,所述第一数据与所述至少一个第三数据属于同一个RAID分条,所述第二数据为所述第一数据与所述至少一个第三数据的奇偶校验结果,所述第一存储装置包含第一控制器和存储介质,所述第二存储装置包含第二控制器和存储介质;所述数据保护装置包括:A data protection device, characterized in that the data protection system includes the data protection device, a first storage device, a second storage device and at least one other storage device, the first storage device, the second storage device and The at least one other storage device constitutes a redundant array of independent hard disk RAID, the first storage device stores first data, the second storage device stores second data, and the at least one other storage device At least one third data is stored, the first data and the at least one third data belong to the same RAID stripe, and the second data is a parity check of the first data and the at least one third data As a result, the first storage device includes a first controller and a storage medium, and the second storage device includes a second controller and a storage medium; and the data protection device includes:
    处理单元,用于触发第一指令,所述第一指令携带关联标识,所述关联标识用于指示第二指令;所述第一指令用于指示所述第一控制器对所述第一数据和第四数据进行异或操作得到第五数据,并指示所述第一控制器向所述第二控制器发送数据报文,所述数据报文包含所述第五数据和所述关联标识,其中所述第四数据为所述第一数据的更新数据;The processing unit is configured to trigger a first instruction, where the first instruction carries an association identifier, and the association identifier is used to indicate a second instruction; the first instruction is used to instruct the first controller Performing an exclusive-OR operation with the fourth data to obtain fifth data, and instructing the first controller to send a data message to the second controller, the data message including the fifth data and the association identifier, Wherein the fourth data is updated data of the first data;
    所述处理单元还用于触发第二指令,所述第二指令用于指示所述第二控制器对所述第五数据和所述第二数据进行异或操作得到第六数据。The processing unit is further configured to trigger a second instruction, and the second instruction is used to instruct the second controller to perform an exclusive OR operation on the fifth data and the second data to obtain sixth data.
  21. 根据权利要求20所述的数据保护装置,其特征在于,所述第一指令和/或所述第二指令为基于非易失性高速传输总线NVMe的提交队列条目SQE。The data protection device according to claim 20, wherein the first instruction and / or the second instruction is a submission queue entry SQE based on a non-volatile high-speed transmission bus NVMe.
  22. 根据权利要求20或21所述的数据保护装置,其特征在于,所述数据报文为PCIe报文,所述关联标识包含所述第二控制器的PCIe地址字段。The data protection device according to claim 20 or 21, wherein the data message is a PCIe message, and the association identifier includes a PCIe address field of the second controller.
  23. 根据权利要求20或21所述的数据保护装置,其特征在于,所述关联标识包含所述第二指令的部分字段。The data protection device according to claim 20 or 21, wherein the association identifier includes a partial field of the second instruction.
  24. 一种数据保护装置,其特征在于,数据保护***包括主机,第一存储装置,第二存储装置和至少一个其他存储装置,所述第一存储装置,所述第二存储装置和所述至少一个其他存储装置组成一个独立硬盘冗余阵列RAID,所述第一存储装置中存储有第一数据,所述第二存储装置中存储有第二数据,所述至少一个其他存储装置中存储有至少一个第三数据,所述第一数据与所述至少一个第三数据属于同一个RAID分条,所述第二数据为所述第一数据与所述至少一个第三数据的奇偶校验结果,所述第一存储装置包含所述数据保护装置和存储介质,所述第二存储装置包含控制器和存储介质;所述数据保护装置包括:A data protection device, characterized in that the data protection system includes a host, a first storage device, a second storage device and at least one other storage device, the first storage device, the second storage device and the at least one Other storage devices form a RAID array of independent hard disks, the first storage device stores first data, the second storage device stores second data, and the at least one other storage device stores at least one The third data, the first data and the at least one third data belong to the same RAID stripe, and the second data is a parity result of the first data and the at least one third data. The first storage device includes the data protection device and a storage medium, and the second storage device includes a controller and a storage medium; the data protection device includes:
    处理单元,用于获取所述主机触发的第一指令和第四数据,所述第一指令携带关联标识,所述关联标识用于指示第二指令,并在获取所述第一指令后对所述第一数据和所述第四数据进行异或操作得到第五数据,其中所述第四数据为所述第一数据的更新数据;The processing unit is configured to obtain the first instruction and the fourth data triggered by the host, the first instruction carries an association identifier, the association identifier is used to indicate a second instruction, and the Performing an exclusive-OR operation on the first data and the fourth data to obtain fifth data, where the fourth data is updated data of the first data;
    发送单元,用于向所述控制器发送数据报文,所述数据报文包含所述第五数据和所述关联标识。The sending unit is configured to send a data message to the controller, where the data message includes the fifth data and the association identifier.
  25. [根据细则91更正 09.12.2019] 
    根据权利要求24所述的数据保护装置,其特征在于,所述数据报文为PCIe报文,所述关联标识包含所述控制器的PCIe地址字段。
    [Corrected according to Rule 91 09.12.2019]
    The data protection device of claim 24, wherein the data message is a PCIe message, and the association identifier includes a PCIe address field of the controller.
  26. 根据权利要求25所述的数据保护装置,其特征在于,所述关联标识包含所述第二指令的部分字段。The data protection device of claim 25, wherein the association identifier includes a partial field of the second instruction.
  27. 一种数据保护装置,其特征在于,数据保护***包括主机,第一存储装置,第二存储装置和至少一个其他存储装置,所述第一存储装置,所述第二存储装置和所述至少一个其他存储装置组成一个独立硬盘冗余阵列RAID,所述第一存储装置中存储有第一数据,所述第二存储装置中存储有第二数据,所述至少一个其他存储装置中存储有至少一个第三数据,所述第一数据与所述至少一个第三数据属于同一个RAID分条,所述第二数据为所述第一数据与所述至少一个第三数据的奇偶校验结果,所述第一存储装置包含控制器和存储介质,所述第二存储装置包含所述数据保护装置和存储介质;所述数据保护装置包括:A data protection device, characterized in that the data protection system includes a host, a first storage device, a second storage device and at least one other storage device, the first storage device, the second storage device and the at least one Other storage devices form a RAID array of independent hard disks, the first storage device stores first data, the second storage device stores second data, and the at least one other storage device stores at least one The third data, the first data and the at least one third data belong to the same RAID stripe, and the second data is a parity result of the first data and the at least one third data. The first storage device includes a controller and a storage medium, and the second storage device includes the data protection device and the storage medium; the data protection device includes:
    获取单元,用于获取所述主机触发的操作指令,并接收所述控制器发送的数据报文,所述数据报文包含所述第五数据和关联标识,所述第五数据为第一数据和第四数据的异或结果,所述第四数据为所述第一数据的更新数据,所述关联标识用于指示所述操作指令;An obtaining unit, configured to obtain an operation instruction triggered by the host, and receive a data message sent by the controller, the data message including the fifth data and an association identifier, and the fifth data is the first data An XOR result with fourth data, the fourth data is updated data of the first data, and the association identifier is used to indicate the operation instruction;
    处理单元,用于根据所述第二指令对所述第五数据和所述第二数据进行异或操作得到第六数据。The processing unit is configured to perform an exclusive OR operation on the fifth data and the second data according to the second instruction to obtain sixth data.
  28. 根据权利要求27所述的数据保护装置,其特征在于,所述数据报文为PCIe报文,所述关联标识包含所述数据保护装置的PCIe地址字段。The data protection device of claim 27, wherein the data message is a PCIe message, and the association identifier includes a PCIe address field of the data protection device.
  29. 根据权利要求27或28所述的数据保护装置,其特征在于,所述数据保护装置还包含内部存储器,所述处理单元对所述第五数据和所述第二数据进行异或操作之前,还用于将所述第五数据存入所述内部存储器的存储空间,并记录所述存储空间与所述关联标识之间的映射关系。The data protection device according to claim 27 or 28, wherein the data protection device further includes an internal memory, and before the XOR operation is performed on the fifth data and the second data by the processing unit, It is used to store the fifth data in the storage space of the internal memory, and record the mapping relationship between the storage space and the association identifier.
  30. 根据权利要求27-29任一项所述的数据保护装置,其特征在于,所述获取单元还用于根据所述关联标识确定所述操作指令的存储位置,并根据所述操作指令的存储位 置获取所述操作指令。The data protection device according to any one of claims 27-29, wherein the acquiring unit is further configured to determine a storage location of the operation instruction according to the association identifier, and according to a storage location of the operation instruction Obtain the operation instruction.
  31. 根据权利要求27-29任一项所述的数据保护装置,其特征在于,所述关联标识包含所述操作指令的部分字段;The data protection device according to any one of claims 27 to 29, wherein the association identifier includes a part of the field of the operation instruction;
    所述获取单元用于根据所述操作指令的部分字段获取所述操作指令。The acquiring unit is configured to acquire the operation instruction according to some fields of the operation instruction.
  32. 根据权利要求27-31任一项所述的数据保护装置,其特征在于,所述第一指令和/或所述第二指令为基于非易失性高速传输总线NVMe的提交队列条目SQE。The data protection device according to any one of claims 27-31, wherein the first instruction and / or the second instruction is a submission queue entry SQE based on a non-volatile high-speed transmission bus NVMe.
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