WO2020082543A1 - 阵列基板及液晶显示面板 - Google Patents

阵列基板及液晶显示面板 Download PDF

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Publication number
WO2020082543A1
WO2020082543A1 PCT/CN2018/120986 CN2018120986W WO2020082543A1 WO 2020082543 A1 WO2020082543 A1 WO 2020082543A1 CN 2018120986 W CN2018120986 W CN 2018120986W WO 2020082543 A1 WO2020082543 A1 WO 2020082543A1
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WIPO (PCT)
Prior art keywords
thin film
array substrate
film transistor
pixel
pixel unit
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Application number
PCT/CN2018/120986
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English (en)
French (fr)
Inventor
刘娜
Original Assignee
深圳市华星光电技术有限公司
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Application filed by 深圳市华星光电技术有限公司 filed Critical 深圳市华星光电技术有限公司
Priority to US16/319,465 priority Critical patent/US20210333666A1/en
Publication of WO2020082543A1 publication Critical patent/WO2020082543A1/zh

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509—Filters, e.g. light shielding masks
    • G02F1/133512—Light shielding layers, e.g. black matrix
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1339—Gaskets; Spacers; Sealing of cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device

Definitions

  • the invention relates to the field of display technology, in particular to an array substrate and a liquid crystal display panel.
  • LCD Liquid crystal display
  • PDA personal digital assistant
  • digital camera computer screen or Laptop screens, etc.
  • liquid crystal displays which include a liquid crystal display panel and a backlight module (backlight) module).
  • the working principle of the LCD panel is on the thin film transistor substrate (Thin Film Transistor Liquid crystal molecules are poured between Array Substrate, TFT Array Substrate and Color Filter Substrate (Color Filter, CF), and a driving voltage is applied to the two substrates to control the rotation direction of the liquid crystal molecules, so as to light the backlight module Refracted to produce a picture.
  • Thifilm Transistor Liquid crystal molecules are poured between Array Substrate, TFT Array Substrate and Color Filter Substrate (Color Filter, CF)
  • the array substrate is generally provided with a plurality of scan lines, a plurality of data lines, and a common electrode line.
  • the scan line and the common electrode line are both located in the first metal layer, and the data line is located in the second metal layer above the first metal layer .
  • the color filter substrate generally includes a black matrix, a red-green-blue resistor, a common electrode, and a spacer (PS). The spacer is used to maintain a uniform spacing between the array substrate and the color filter substrate.
  • the existing liquid crystal display panel adopting the COA (color resist layer is made on the side of the array substrate) technology generally arranges TFT devices arranged in an array, a plurality of data lines, and a plurality of scanning lines on the substrate to form an array substrate and A color resist layer is formed on the array substrate.
  • the spacer is placed at a position corresponding to the TFT device. Due to the presence of the color resist layer, the TFT The device is protected to prevent the movement and compression of the spacers from affecting the electrical properties of the TFT device.
  • the spacers can only be set corresponding to the scanning lines. To ensure that the spacers can still accurately support the misalignment between the array substrate and the color filter substrate, additional scanning lines are required.
  • the width of the pixel will affect the aperture ratio of the pixel. In order to maximize the aperture ratio of pixels, please refer to FIG. 1.
  • An existing array substrate includes a plurality of scanning lines 1100 and a plurality of data lines 2100, and a plurality of scanning 1100 and a plurality of data lines 2100 are arranged crosswise to form an array row
  • Each pixel unit includes a thin film transistor T 'and a pixel electrode 3000.
  • the thin film transistor T' includes a gate 1200, a source 2200, and a drain 2300.
  • the thin film transistor T 'of a row of pixel units The gate 1200 is correspondingly connected to a scanning line 1100, the drain 2300 of the thin film transistor T 'of a column of pixel units is correspondingly connected to a data line 2100, and the source 2200 of each thin film transistor T' is connected to the pixel unit where it is located through a via 9001
  • the pixel electrode 3000, and in each pixel unit, the gate 1200 of the thin film transistor T 'and the via 9001 are located on the same side of the pixel unit.
  • the black matrix 5000 on the color filter substrate needs to cover the scan line 1100, the data line 2100, and the thin film transistor T ′ except for the connection with the pixel electrode 3000
  • the array substrate of this structure can ensure that the spacers will not affect the TFT device
  • the aperture ratio of the sub-pixel is maximized in the case of high-quality, however, the aperture ratio on both sides of one pixel area of the array substrate of this structure is different. As shown in FIG.
  • the aperture ratio on the left side of the pixel area is significantly smaller than that on the right side
  • the transmissivity on both sides of the pixel area will be different, which will cause a difference in viewing angle and affect the display quality.
  • An object of the present invention is to provide an array substrate having a high aperture ratio and capable of eliminating the difference in viewing angle.
  • Another object of the present invention is to provide a liquid crystal display panel with a high aperture ratio and capable of eliminating differences in viewing angles.
  • the present invention first provides an array substrate including a plurality of scanning lines and a plurality of data lines; a plurality of scanning lines and a plurality of data lines are intersected to form a plurality of pixel units arranged in an array; each pixel Each cell includes a thin film transistor and a pixel electrode; the thin film transistor includes a gate, a source, and a drain; the gate of the thin film transistor of a row of pixel cells is correspondingly connected to a scanning line, and the source and drain of the thin film transistor of a row of pixel cells One of them corresponds to a data line, and the other of the source and drain of each thin film transistor is connected to the pixel electrode of the pixel unit where it is located through a via;
  • each pixel unit the gate and the via of the thin film transistor are located on both sides of the pixel unit near two adjacent data lines.
  • the thin film transistor further includes an active pattern; in each thin film transistor, the active pattern is provided on the gate, and the source and the drain are respectively connected to both ends of the active pattern.
  • each pixel unit one end of the drain of the thin film transistor is connected to one end of the active pattern, the other end is connected to the corresponding data line, one end of the source is connected to the other end of the active pattern, and the other end is adjacent to the pixel unit
  • One of the two data lines far away from the gate of the thin film transistor extends and is connected to the pixel electrode of the pixel unit through a via.
  • the source electrode includes a first portion, a second portion, and a connection terminal connected in sequence; the first portion is connected to the active pattern and extends in a direction parallel to the data line, and the second portion extends in a direction parallel to the scan line , The via corresponds to the connection end.
  • the drain includes a third part and a fourth part connected in sequence; the third part is connected to the active pattern and extends in a direction away from the active pattern; the fourth part extends in a direction parallel to the scan line and Connect the third part to the corresponding data cable.
  • the array substrate includes a first metal layer and a second metal layer disposed above the first metal layer and insulated from the first metal layer;
  • the gates of the thin film transistors of the plurality of scan lines and the pixel units are located in the first metal layer; the source and drain of the thin film transistors of the plurality of data lines and the pixel units are located in the second metal layer .
  • the width of the portion where the scanning line overlaps the data line is smaller than the width of the portion of the scanning line other than the portion that overlaps the data line.
  • the invention also provides a liquid crystal display panel, comprising the above-mentioned array substrate and a color film substrate arranged opposite to the array substrate.
  • the color film substrate A black matrix is included.
  • the black matrix is disposed opposite to the plurality of scan lines, the plurality of data lines, and the plurality of thin film transistors, and at least partially exposes the connection between the thin film transistor and the pixel electrode.
  • the liquid crystal display panel further includes a plurality of spacers disposed between the array substrate and the color filter substrate, the plurality of spacers corresponding to the portions of the plurality of scan lines except for the overlapping portions with the data lines, the spacers
  • the projection of the object on the scan line is inside the edge of the scan line.
  • the gate of the thin film transistor and the via for connecting the thin film transistor and the pixel electrode are respectively located in two adjacent two adjacent to the pixel unit
  • the difference in aperture ratio on both sides of the pixel unit is significantly reduced. Without affecting the aperture ratio, the difference in viewing angle due to the difference in aperture ratio is effectively solved, and the display quality is improved.
  • the liquid crystal display panel provided by the present invention has a high aperture ratio, and can eliminate the viewing angle difference.
  • Fig 1 For the existing one COA A schematic top view of the technical array substrate
  • FIG. 1 A schematic diagram of the array substrate and the color film substrate paired after being covered by the black matrix of the color film substrate;
  • Fig 3 It is a schematic top view of the array substrate of the present invention.
  • Fig 4 It is a schematic top view of the scan line, data line and thin film transistor of the array substrate of the present invention.
  • Fig 5 It is a schematic diagram of setting spacers corresponding to the scanning lines of the liquid crystal display panel of the present invention.
  • Fig 6 It is a schematic view of the black matrix of the liquid crystal display panel of the present invention.
  • the present invention provides an array substrate, including a plurality of scan lines 110 And multiple data lines 210 , Multiple scan lines 110 With multiple data lines 210 Cross-arranged to form a plurality of pixel units arranged in an array 1 .
  • Each pixel unit 1 Both include thin film transistors T Pixel electrode 300 .
  • the thin film transistor T Including gate 120 Source 220 And drain 230 .
  • Row of pixel units 1 Thin film transistor T Gate 120 Correspondingly connect a scanning line 110 , A column of pixel units 1 Thin film transistor T Source of 220 And drain 230 One of them corresponds to a data line 210 , Each thin film transistor T Source of 220 And drain 230 The other one goes through the via 901 Connect the pixel unit where it is located 1 Pixel electrode 300 .
  • Each pixel unit 1 Medium and thin film transistors T Gate 120 And vias 901 Located in the pixel unit 1 Two adjacent data lines 210 On both sides.
  • the thin film transistor T also includes active patterns 400 .
  • Each thin film transistor T In the active pattern 400 Set on the gate 120 On the source 220 And drain 230 Active pattern 400 Connected at both ends.
  • each pixel unit 1 Medium and thin film transistors T Drain 230 Connected to the active pattern at one end 400 Connect one end of the other end to the corresponding data cable 210 , Source 220 Connected to the active pattern at one end 400 The other end, the other end faces the pixel unit 1 Two adjacent data lines 210 Thin-film transistor T Gate 120 Of an extension and through the via 901 Connect the pixel unit 1 Pixel electrode 300 .
  • the source 220 Including the first part connected in sequence 221 ,the second part 222 And connector 223 .
  • the first part 221 Connect to active pattern 400 Parallel to the data line 210 Extending in the direction of the second part 222 Parallel to scan line 110 Extending in the direction of the via 901 With the connection end 223 correspond.
  • the drain 230 Including the third part connected in sequence 231 And part four 232 .
  • the third part 231 Connect to active pattern 400 And away from the active pattern 400 Direction.
  • the fourth part 232 Parallel to scan line 110 Direction and extend the third part 231 Corresponding data line 210 connection.
  • the array substrate includes a first metal layer and a second metal layer disposed above the first metal layer and insulated from the first metal layer.
  • the multiple scan lines 110 And multiple pixel units 1 Thin film transistor T Gate 120 Both are located in the first metal layer.
  • the multiple data lines 210 And multiple pixel units 1 Thin film transistor T Source of 220 And drain 230 Both are located in the second metal layer.
  • a common electrode line is also provided in the first metal layer 130 .
  • the scan line 110 With data cable 210 The width of the overlapping part is smaller than the scan line 110 In addition to the data cable 210 The width of the part other than the overlapping part.
  • the array substrate of the present invention is provided with each pixel unit 1 Medium and thin film transistors T Gate 120 And for thin film transistors T With pixel electrode 300 Connected via 901 Located in the pixel unit 1 Two adjacent data lines 210 On both sides of the gate 120 And vias 901 All are important factors that affect the aperture ratio.
  • the pixel unit 1 The difference in aperture ratio on both sides is significantly reduced. Without affecting the aperture ratio, the difference in viewing angle due to the difference in aperture ratio is effectively solved, and the display quality is improved.
  • 220 With grid 120 The size of the formed capacitor has no effect on the pixel charging rate, and will not cause any loss to the pixel opening rate and penetration rate, thereby improving the quality of the product.
  • the present invention also provides a liquid crystal display panel, including the above-mentioned array substrate and a color film substrate disposed opposite to the array substrate.
  • the structure of the array substrate will not be described repeatedly here.
  • the liquid crystal display panel further includes a plurality of spacers disposed between the array substrate and the color filter substrate 600 ,
  • the plurality of spacers 600 Corresponding to multiple scan lines 100
  • spacer 600 On the scan line 110 The projection on is on the scan line 110 The inside of the edge, thereby using the spacer 600
  • the spacing between the array substrate and the color filter substrate is maintained uniform, and even if the array substrate and the color filter substrate are relatively moved, the spacer 600 can also Accurately play a supporting role.
  • the spacer 600 It can be made on the side of the array substrate or on the side of the color film substrate, neither of which will affect the implementation of the present invention.
  • the color filter substrate includes a black matrix 500 , The black matrix 500 With multiple scan lines 110 , Multiple data lines 210 And multiple thin film transistors T Oppositely arranged and at least partially expose the thin film transistor T With pixel electrode 300 Connection.
  • the array substrate is a non- COA Type array substrate
  • the color filter substrate further includes a color resist layer (not shown).
  • the liquid crystal display panel of the present invention is provided with each pixel unit 1 Medium and thin film transistors T Gate 120 And for thin film transistors T With pixel electrode 300 Connected via 901 Located in the pixel unit 1 Two adjacent data lines 210 On both sides of the gate 120 And vias 901 All are important factors that affect the aperture ratio.
  • the pixel unit 1 The difference in aperture ratio on both sides is significantly reduced. Without affecting the aperture ratio, the viewing angle difference caused by the aperture ratio difference is effectively solved to improve the display quality.
  • the array substrate does not affect the source electrode. 220 With grid 120 The size of the formed capacitor has no effect on the pixel charging rate, and will not cause any loss to the pixel opening rate and penetration rate, thereby improving the quality of the product.
  • the gate of the thin-film transistor and the via for connecting the thin-film transistor and the pixel electrode are respectively located at two sides of the pixel unit near two adjacent data lines Side, so that the difference in aperture ratio on both sides of the pixel unit is significantly reduced. Without affecting the aperture ratio, the difference in viewing angle due to the difference in aperture ratio is effectively solved, and the display quality is improved.
  • the liquid crystal display panel of the present invention has a high aperture ratio and can eliminate viewing angle differences.

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Abstract

一种阵列基板及液晶显示面板。该阵列基板的每一像素单元（1）中，薄膜晶体管（T）的栅极（120）及用于将薄膜晶体管（T）与像素电极（300）连接的过孔（901）分别位于该像素单元（1）靠近相邻的两条数据线（210）的两侧，从而使像素单元（1）两侧的开口率差异显著降低，在不影响开口率的情况下，有效解决了由于开口率差异导致的视角差异，提升显示品质。

Description

阵列基板及液晶显示面板 技术领域
本发明涉及显示技术领域，尤其涉及一种阵列基板及液晶显示面板。
 背景技术
液晶显示器（Liquid Crystal Display，LCD）具有机身薄、省电、无辐射等众多优点，得到了广泛的应用，如：液晶电视、移动电话、个人数字助理（PDA）、数字相机、计算机屏幕或笔记本电脑屏幕等，在平板显示领域中占主导地位。
现有市场上的液晶显示器大部分为背光型液晶显示器，其包括液晶显示面板及背 光模组（backlight  module）。液晶显示面板的工作原理是在薄膜晶体管基板（Thin Film Transistor Array Substrate，TFT Array Substrate）与彩色滤光片基板（Color Filter，CF）之间灌入液晶分子，并在两片基板上施加驱动电压来控制液晶分子的旋转方向，以将背光模组的光线折射出来产生画面。
现有技术中，阵列基板一般设有多条扫描线、多条数据线及共通电极线，扫描线及共通电极线均位于第一金属层，数据线位于第一金属层上方的第二金属层。彩膜基板一般包括黑色矩阵、红绿蓝色阻、公共电极及隔垫物（PS），隔垫物用于维持阵列基板与彩膜基板之间的间距均匀。
现有的采用COA（色阻层制作在阵列基板一侧）技术的液晶显示面板一般会在衬底上设置阵列排布的TFT器件、多条数据线、多条扫描线以形成阵列基板并在阵列基板上形成色阻层，在将该形成有色阻层的阵列基板与彩膜基板进行对组时，会将隔垫物设置在对应TFT器件的位置，由于色阻层的存在，可以对TFT器件进行保护，可防止隔垫物移动和挤压对TFT器件电性造成影响。然而，对于非COA设计的液晶显示面板，其隔垫物与阵列基板之间并没有色阻层作为保护层，此时若仍将隔垫物对应TFT器件设置，可能会对TFT电性产生影响，因此，对于非COA设计的显示面板，只能将隔垫物对应扫描线设置，为保证阵列基板与彩膜基板发生错位时隔垫物仍能够准确无误地起到支撑作用，需要增加扫描线的宽度，这会影响像素的开口率。为最大限度提高像素的开口率，请参阅图1，现有的一种阵列基板包括多条扫描线1100及多条数据线2100，多条扫描1100与多条数据线2100交叉设置，形成阵列排布的多个像素单元，每一像素单元均包括薄膜晶体管T’及像素电极3000，所述薄膜晶体管T’包括栅极1200、源极2200及漏极2300，一行像素单元的薄膜晶体管T’的栅极1200对应连接一条扫描线1100，一列像素单元的薄膜晶体管T’的漏极2300对应连接一条数据线2100，每一薄膜晶体管T’的源极2200通过过孔9001连接其所在的像素单元的像素电极3000，并且在每一像素单元中，薄膜晶体管T’的栅极1200及过孔9001位于该像素单元的同侧，在将该阵列基板与彩膜基板进行对组得到液晶显示面板时，请参阅图2，彩膜基板上的黑色矩阵5000需要覆盖扫描线1100、数据线2100、以及薄膜晶体管T’除了与像素电极3000连接处以外的其他部分，通过在彩膜基板与阵列基板之间对应扫描线1100除了与数据线2100交叉部分以外的部分上设置隔垫物，该结构的阵列基板能够在保证隔垫物不会影响TFT器件电性的情况下最大限度提升子像素的开口率，然而，该结构的阵列基板的一个像素区域两侧的开口率不同，如图2所示，像素区域左侧的开口率明显小于右侧的开口率，当对具有该阵列基板的液晶显示器进行列反转驱动时，像素区域两侧的穿透率会不同，因此会造成视角差异，影响显示品质。
 技术问题
本发明的目的在于提供一种阵列基板，开口率高，且能够消除视角差异。
本发明的另一目的在于提供一种液晶显示面板，开口率高，且能够消除视角差异。
技术解决方案
为实现上述目的，本发明首先提供一种阵列基板，包括多条扫描线及多条数据线；多条扫描线与多条数据线交叉设置，形成阵列排布的多个像素单元；每一像素单元均包括薄膜晶体管及像素电极；所述薄膜晶体管包括栅极、源极及漏极；一行像素单元的薄膜晶体管的栅极对应连接一条扫描线，一列像素单元的薄膜晶体管的源极及漏极中的一个对应连接一条数据线，每一薄膜晶体管的源极及漏极中的另一个通过过孔连接其所在的像素单元的像素电极；
每一像素单元中，薄膜晶体管的栅极及过孔分别位于该像素单元靠近相邻的两条数据线的两侧。
所述薄膜晶体管还包括有源图案；每一薄膜晶体管中，所述有源图案设于栅极上，源极及漏极分别与有源图案的两端连接。
每一像素单元中，薄膜晶体管的漏极的一端连接有源图案的一端，另一端连接对应的数据线，源极的一端连接有源图案的另一端，另一端向与该像素单元相邻的两条数据线中远离薄膜晶体管的栅极的一条延伸，并通过过孔连接该像素单元的像素电极。
所述源极包括依次连接的第一部分、第二部分及连接端；所述第一部分连接于有源图案并沿平行于数据线的方向延伸，所述第二部分沿平行于扫描线的方向延伸，所述过孔与所述连接端对应。
所述漏极包括依次连接的第三部分及第四部分；所述第三部分连接于有源图案并向远离有源图案的方向延伸；所述第四部分沿平行于扫描线的方向延伸并将第三部分与对应的数据线连接。
所述阵列基板包括第一金属层及设于第一金属层上方且与第一金属层绝缘的第二金属层；
所述多条扫描线及多个像素单元的薄膜晶体管的栅极均位于第一金属层；所述多条数据线及多个像素单元的薄膜晶体管的源极及漏极均位于第二金属层。
所述扫描线与数据线交叠部分的宽度小于扫描线除了与数据线交叠部分以外的部分的宽度。
本发明还提供一种液晶显示面板，包括上述的阵列基板及与所述阵列基板相对设置的彩膜基板。
所述彩膜基板 包括黑色矩阵，所述黑色矩阵与多条扫描线、多条数据线及多个薄膜晶体管相对设置，并至少部分暴露薄膜晶体管与像素电极的连接处。
所述液晶显示面板还包括设于阵列基板与彩膜基板之间的多个隔垫物，所述多个隔垫物对应多条扫描线除了与数据线交叠部分以外的部分设置，隔垫物在扫描线上的投影位于扫描线边缘内侧。
有益效果
本发明的有益效果：本发明提供的一种阵列基板的每一像素单元中，薄膜晶体管的栅极及用于将薄膜晶体管与像素电极连接的过孔分别位于该像素单元靠近相邻的两条数据线的两侧，从而使像素单元两侧的开口率差异显著降低，在不影响开口率的情况下，有效解决了由于开口率差异导致的视角差异，提升显示品质。本发明提供的一种液晶显示面板的开口率高，且能够消除视角差异。
附图说明
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
附图中，
图 1 为现有的一种采用非 COA 技术的阵列基板的俯视示意图；
图 2 为图 1 所示的阵列基板与彩膜基板对组后被彩膜基板的黑色矩阵覆盖的示意图；
图 3 为本发明的阵列基板的俯视示意图；
图 4 为本发明的阵列基板的扫描线、数据线及薄膜晶体管的俯视示意图；
图 5 为本发明的液晶显示面板对应扫描线设置隔垫物的示意图；
图 6 为本发明的液晶显示面板的黑色矩阵的设置示意图。
本发明的实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图 3 及图 4 ，本发明提供一种阵列基板，包括多条扫描线 110 及多条数据线 210 ，多条扫描线 110 与多条数据线 210 交叉设置，形成阵列排布的多个像素单元 1 。每一像素单元 1 均包括薄膜晶体管 T 及像素电极 300 。所述薄膜晶体管 T 包括栅极 120 、源极 220 及漏极 230 。一行像素单元 1 的薄膜晶体管 T 的栅极 120 对应连接一条扫描线 110 ，一列像素单元 1 的薄膜晶体管 T 的源极 220 及漏极 230 中的一个对应连接一条数据线 210 ，每一薄膜晶体管 T 的源极 220 及漏极 230 中的另一个通过过孔 901 连接其所在的像素单元 1 的像素电极 300 。
每一像素单元 1 中，薄膜晶体管 T 的栅极 120 及过孔 901 分别位于该像素单元 1 靠近相邻的两条数据线 210 的两侧。
具体地，请参阅图 3 及图 4 ，所述薄膜晶体管 T 还包括有源图案 400 。每一薄膜晶体管 T 中，所述有源图案 400 设于栅极 120 上，源极 220 及漏极 230 分别与有源图案 400 的两端连接。
具体地，在图 3 及图 4 所示的实施例中，每一像素单元 1 中，薄膜晶体管 T 的漏极 230 的一端连接有源图案 400 的一端，另一端连接对应的数据线 210 ，源极 220 的一端连接有源图案 400 的另一端，另一端向与该像素单元 1 相邻的两条数据线 210 中远离薄膜晶体管 T 的栅极 120 的一条延伸，并通过过孔 901 连接该像素单元 1 的像素电极 300 。
进一步地，所述源极 220 包括依次连接的第一部分 221 、第二部分 222 及连接端 223 。所述第一部分 221 连接于有源图案 400 并沿平行于数据线 210 的方向延伸，所述第二部分 222 沿平行于扫描线 110 的方向延伸，所述过孔 901 与所述连接端 223 对应。所述漏极 230 包括依次连接的第三部分 231 及第四部分 232 。所述第三部分 231 连接于有源图案 400 并向远离有源图案 400 的方向延伸。所述第四部分 232 沿平行于扫描线 110 的方向延伸并将第三部分 231 与对应的数据线 210 连接。
具体地，所述阵列基板包括第一金属层及设于第一金属层上方且与第一金属层绝缘的第二金属层。所述多条扫描线 110 及多个像素单元 1 的薄膜晶体管 T 的栅极 120 均位于第一金属层。所述多条数据线 210 及多个像素单元 1 的薄膜晶体管 T 的源极 220 及漏极 230 均位于第二金属层。
进一步地，第一金属层中还设置有公共电极线 130 。
优选地，所述扫描线 110 与数据线 210 交叠部分的宽度小于扫描线 110 除了与数据线 210 交叠部分以外的部分的宽度。
需要说明的是，本发明的阵列基板设置每一像素单元 1 中，薄膜晶体管 T 的栅极 120 及用于将薄膜晶体管 T 与像素电极 300 连接的过孔 901 分别位于该像素单元 1 靠近相邻的两条数据线 210 的两侧，栅极 120 及过孔 901 均是影响开口率的重要因素，通过此种结构设置，使得像素单元 1 两侧的开口率差异显著降低，在不影响开口率的情况下，有效解决了由于开口率差异导致的视角差异，提升显示品质，与此同时，该阵列基板不影响由源极 220 与栅极 120 组成的电容的大小，从而对像素充电率无影响，并且对像素的开口率及穿透率不会造成损失，提升产品的品质。
基于同一发明构思，请参阅图 5 及图 6 ，并结合图 3 及图 4 ，本发明还提供一种液晶显示面板，包括上述的阵列基板及与所述阵列基板相对设置的彩膜基板。在此不再对阵列基板的结构做重复性描述。
具体地，所述液晶显示面板还包括设于阵列基板与彩膜基板之间的多个隔垫物 600 ，所述多个隔垫物 600 对应多条扫描线 100 除了与数据线 210 交叠部分以外的部分设置，隔垫物 600 在扫描线 110 上的投影位于扫描线 110 边缘内侧，从而利用隔垫物 600 维持所述阵列基板与彩膜基板之间的间距均匀，并且即使阵列基板与彩膜基板的相对移动，隔垫物 600 也能 准确无误地起到支撑作用。该隔垫物 600 可制作在阵列基板侧，也可制作在彩膜基板侧，均不会影响本发明的实现。
具体地，所述彩膜基板包括黑色矩阵 500 ，所述黑色矩阵 500 与多条扫描线 110 、多条数据线 210 及多个薄膜晶体管 T 相对设置，并至少部分暴露薄膜晶体管 T 与像素电极 300 的连接处。
具体地，所述阵列基板为非 COA 型的阵列基板，所述彩膜基板还包括色阻层（未图示）。
需要说明的是，本发明的液晶显示面板设置每一像素单元 1 中，薄膜晶体管 T 的栅极 120 及用于将薄膜晶体管 T 与像素电极 300 连接的过孔 901 分别位于该像素单元 1 靠近相邻的两条数据线 210 的两侧，栅极 120 及过孔 901 均是影响开口率的重要因素，通过此种结构设置，使得像素单元 1 两侧的开口率差异显著降低，在不影响开口率的情况下，有效解决了由于开口率差异导致的视角差异，提升显示品质，与此同时，该阵列基板不影响由源极 220 与栅极 120 组成的电容的大小，从而对像素充电率无影响，并且对像素的开口率及穿透率不会造成损失，提升产品的品质。
综上所述，本发明的阵列基板的每一像素单元中，薄膜晶体管的栅极及用于将薄膜晶体管与像素电极连接的过孔分别位于该像素单元靠近相邻的两条数据线的两侧，从而使像素单元两侧的开口率差异显著降低，在不影响开口率的情况下，有效解决了由于开口率差异导致的视角差异，提升显示品质。本发明的液晶显示面板的开口率高，且能够消除视角差异。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明权利要求的保护范围。

Claims (10)

  1. 一种阵列基板，包括多条扫描线及多条数据线；多条扫描线与多条数据线交叉设置，形成阵列排布的多个像素单元；每一像素单元均包括薄膜晶体管及像素电极；所述薄膜晶体管包括栅极、源极及漏极；一行像素单元的薄膜晶体管的栅极对应连接一条扫描线，一列像素单元的薄膜晶体管的源极及漏极中的一个对应连接一条数据线，每一薄膜晶体管的源极及漏极中的另一个通过过孔连接其所在的像素单元的像素电极；
    每一像素单元中，薄膜晶体管的栅极及过孔分别位于该像素单元靠近相邻的两条数据线的两侧。
  2. 如权利要求1所述的阵列基板，其中，所述薄膜晶体管还包括有源图案；每一薄膜晶体管中，所述有源图案设于栅极上，源极及漏极分别与有源图案的两端连接。
  3. 如权利要求2所述的阵列基板，其中，每一像素单元中，薄膜晶体管的漏极的一端连接有源图案的一端，另一端连接对应的数据线，源极的一端连接有源图案的另一端，另一端向与该像素单元相邻的两条数据线中远离薄膜晶体管的栅极的一条延伸，并通过过孔连接该像素单元的像素电极。
  4. 如权利要求3所述的阵列基板，其中，所述源极包括依次连接的第一部分、第二部分及连接端；所述第一部分连接于有源图案并沿平行于数据线的方向延伸，所述第二部分沿平行于扫描线的方向延伸，所述过孔与所述连接端对应。
  5. 如权利要求3所述的阵列基板，其中，所述漏极包括依次连接的第三部分及第四部分；所述第三部分连接于有源图案并向远离有源图案的方向延伸；所述第四部分沿平行于扫描线的方向延伸并将第三部分与对应的数据线连接。
  6. 如权利要求2所述的阵列基板，包括第一金属层及设于第一金属层上方且与第一金属层绝缘的第二金属层；
    所述多条扫描线及多个像素单元的薄膜晶体管的栅极均位于第一金属层；所述多条数据线及多个像素单元的薄膜晶体管的源极及漏极均位于第二金属层。
  7. 如权利要求1所述的阵列基板，其中，所述扫描线与数据线交叠部分的宽度小于扫描线除了与数据线交叠部分以外的部分的宽度。
  8. 一种液晶显示面板，包括如权利要求1所述的阵列基板及与所述阵列基板相对设置的彩膜基板。
  9. 如权利要求8所述的液晶显示面板，其中，所述彩膜基板包括黑色矩阵，所述黑色矩阵与多条扫描线、多条数据线及多个薄膜晶体管相对设置，并至少部分暴露薄膜晶体管与像素电极的连接处。
  10. 如权利要求8所述的液晶显示面板，还包括设于阵列基板与彩膜基板之间的多个隔垫物，所述多个隔垫物对应多条扫描线除了与数据线交叠部分以外的部分设置，隔垫物在扫描线上的投影位于扫描线边缘内侧。
PCT/CN2018/120986 2018-10-23 2018-12-13 阵列基板及液晶显示面板 WO2020082543A1 (zh)

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