WO2020063592A1 - 一种量子点发光二极管 - Google Patents

一种量子点发光二极管 Download PDF

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Publication number
WO2020063592A1
WO2020063592A1 PCT/CN2019/107552 CN2019107552W WO2020063592A1 WO 2020063592 A1 WO2020063592 A1 WO 2020063592A1 CN 2019107552 W CN2019107552 W CN 2019107552W WO 2020063592 A1 WO2020063592 A1 WO 2020063592A1
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hole
layer
hole buffer
buffer
quantum dot
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PCT/CN2019/107552
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English (en)
French (fr)
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苏亮
谢相伟
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Tcl集团股份有限公司
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Priority claimed from CN201811150182.5A external-priority patent/CN110970567B/zh
Priority claimed from CN201811150184.4A external-priority patent/CN110970568B/zh
Application filed by Tcl集团股份有限公司 filed Critical Tcl集团股份有限公司
Priority to US16/955,705 priority Critical patent/US20210013437A1/en
Publication of WO2020063592A1 publication Critical patent/WO2020063592A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/24—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate of the light emitting region, e.g. non-planar junction
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
    • H10K50/11—OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
    • H10K50/115—OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers comprising active inorganic nanostructures, e.g. luminescent quantum dots
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
    • H10K50/14—Carrier transporting layers
    • H10K50/15—Hole transporting layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/81—Anodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/82—Cathodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00—Constructional details relating to the organic devices covered by this subclass
    • H10K2102/301—Details of OLEDs
    • H10K2102/351—Thickness
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
    • H10K50/14—Carrier transporting layers
    • H10K50/16—Electron transporting layers
    • H10K50/167—Electron transporting layers between the light-emitting layer and the anode

Definitions

  • the present disclosure relates to the field of light emitting diodes, and in particular, to a quantum dot light emitting diode.
  • QLED quantum dot-based electroluminescent diodes Due to the unique optical properties of quantum dots, whose emission wavelength is continuously adjustable with size and composition, narrow emission spectrum, high fluorescence efficiency, and good stability, quantum dot-based electroluminescent diodes (QLEDs) have received extensive attention and research.
  • QLED display also has many advantages such as large viewing angle, high contrast, fast response speed, and flexibility that cannot be achieved by LCDs, so it is expected to become the next generation of display technology.
  • the performance (luminous efficiency, life) of QLED has been greatly improved, but there is still a long way to go before commercialization, especially blue light QLED.
  • the existence of the space electric field will further hinder the continuous movement of the vector sub-points of the hole source, resulting in more unbalanced charge transport; on the other hand, the space electric field will cause exciton separation in the quantum dots, resulting in quantum dot fluorescence quenching. Both will degrade the performance of QLED.
  • the accumulation of holes at a very narrow interface also places high requirements on the electrical resistance of the hole-transporting material, which often causes QLED brightness and efficiency to rapidly decline due to the low electrical-resistance of the hole-transporting material.
  • an object of the present disclosure is to provide a quantum dot light emitting diode, which aims to solve the problem that the existing quantum dot light emitting diode easily generates a space electric field at the interface between the hole transport layer and the quantum dot layer due to the accumulation of holes. This leads to a problem that the quantum dot light emitting diode has a low light emitting efficiency.
  • a quantum dot light emitting diode includes an anode, a cathode, a quantum dot light emitting layer disposed between the anode and the cathode, and a hole function layer disposed between the anode and the quantum dot light emitting layer.
  • the hole functional layer includes a hole transport layer and a hole buffer layer, the hole transport layer is provided near the anode, and the hole buffer layer is provided near the quantum dot light emitting layer, wherein the holes
  • the buffer layer includes a first hole buffer sublayer disposed in close contact with the hole transport layer, and the material of the first hole buffer sublayer is a first hole buffer material or is buffered by the first hole.
  • a mixed material composed of a material and a fourth hole transport material, wherein the electrical conductivity of the first hole buffer material is less than 1 ⁇ 10 -8 Sm -1 .
  • a quantum dot light emitting diode includes an anode, a cathode, a quantum dot light emitting layer disposed between the anode and the cathode, and a hole function layer disposed between the anode and the quantum dot light emitting layer.
  • the hole functional layer includes a hole transport layer and a hole buffer layer, the hole transport layer is provided near the anode, and the hole buffer layer is provided near the quantum dot light emitting layer, wherein the holes
  • the buffer layer includes a first hole buffer sublayer disposed in close contact with the hole transport layer, and the material of the first hole buffer sublayer is a first hole buffer material or is buffered by the first hole A mixed material composed of a material and a fourth hole transport material, wherein the hole mobility of the first hole buffer material is less than 1 ⁇ 10 -6 cm 2 V -1 s -1 .
  • the hole buffer layer can hinder the transmission of the hole vector sub-dot luminescent layer, so that a part of the holes are scattered in the interface between the hole transport layer and the hole buffer layer, thereby reducing the holes in the holes.
  • the cumulative density at the interface between the transport layer and the quantum dot light-emitting layer widens the hole accumulation region and separates the hole accumulation region from the exciton recombination region, reducing the quenching of quantum dot fluorescence by the space electric field, which can improve hole transport.
  • the electric resistance of the layer can also improve the luminous efficiency, stability and life of the QLED.
  • FIG. 1 is a schematic diagram of a quantum dot light emitting diode of a first structure provided in a specific embodiment of the present disclosure.
  • FIG. 2 is a schematic diagram of a hole accumulation region and an exciton recombination region of a quantum dot light emitting diode in the prior art.
  • FIG. 3 is a schematic diagram of a hole accumulation region and an exciton recombination region of the quantum dot light emitting diode shown in FIG. 1 of the present disclosure.
  • FIG. 4 is a schematic diagram of a quantum dot light emitting diode of a second structure provided in a specific embodiment of the present disclosure.
  • FIG. 5 is a schematic diagram of a hole accumulation region and an exciton recombination region of the quantum dot light emitting diode described in FIG. 4 of the present disclosure.
  • FIG. 6 is a schematic diagram of a quantum dot light emitting diode of a third structure provided in a specific embodiment of the present disclosure.
  • FIG. 7 is a schematic diagram of a hole accumulation region and an exciton recombination region of the quantum dot light emitting diode described in FIG. 6 of the present disclosure.
  • FIG. 8 is a schematic diagram of a quantum dot light emitting diode of a fourth structure provided in a specific embodiment of the present disclosure.
  • FIG. 9 is a schematic diagram of a hole accumulation region and an exciton recombination region of the quantum dot light emitting diode described in FIG. 8 of the present disclosure.
  • FIG. 10 is a schematic diagram of a quantum dot light emitting diode of a fifth structure provided in a specific embodiment of the present invention.
  • FIG. 12 is a schematic diagram of a quantum dot light emitting diode of a sixth structure provided in a specific embodiment of the present invention.
  • FIG. 13 is a schematic diagram of a quantum dot light emitting diode of a seventh structure provided in a specific embodiment of the present invention.
  • FIG. 14 is a schematic diagram of a quantum dot light emitting diode of an eighth structure provided in a specific embodiment of the present invention.
  • FIG. 15 is a current density-voltage (J-V) curve of a QLED in Examples 5 to 9.
  • J-V current density-voltage
  • FIG. 17 is a current efficiency-current density (CE-J) curve of a QLED in Examples 5 to 9.
  • CE-J current efficiency-current density
  • FIG. 18 is a life curve of a QLED in Examples 5 to 9.
  • FIG. 18 is a life curve of a QLED in Examples 5 to 9.
  • the present disclosure provides a quantum dot light emitting diode.
  • the present disclosure is described in further detail below. It should be understood that the specific embodiments described herein are only used to explain the present disclosure and are not intended to limit the present disclosure.
  • quantum dot light emitting diodes there are various forms of quantum dot light emitting diodes, and the quantum dot light emitting diodes are divided into a formal structure and a trans structure.
  • the quantum structure light emitting diodes of the trans structure may include a substrate, a cathode, and a quantum layer stacked from bottom to top. Point emitting layer, hole functional layer, and anode.
  • a quantum dot light emitting diode with a formal structure will be mainly used as an example for description.
  • the quantum dot light emitting diode includes a substrate, an anode, a hole functional layer, a quantum dot light emitting layer, and a cathode, which are stacked and arranged from bottom to top, wherein the hole functional layer includes a hole transport layer and holes.
  • a buffer layer the hole transport layer is provided near the anode, the hole buffer layer is provided near the quantum dot light emitting layer, and the hole buffer layer includes a layer provided in close contact with the hole transport layer
  • a first hole buffer sublayer a material of the first hole buffer sublayer is a first hole buffer material or a mixed material composed of a fourth hole buffer material and a first hole transport material, wherein The electrical conductivity of the first hole buffer material is less than 1 ⁇ 10 -8 Sm -1 .
  • a hole function layer is provided between the anode and the quantum dot light-emitting layer.
  • the hole function layer includes a hole transport layer and a hole buffer layer.
  • the hole buffer layer can improve the hole transport.
  • the electric resistance of the layer can also improve the luminous efficiency, stability and life of the QLED.
  • the hole buffer layer in this embodiment includes a first hole buffer sublayer provided in close contact with the hole transport layer, when the material of the first hole buffer sublayer is a first hole buffer Material, and when the electrical conductivity of the first hole buffer material is less than 1 ⁇ 10 -8 Sm -1 , the first hole buffer sublayer can cause all of the original hole buffer sublayers to accumulate in the hole transport layer and the quantum dot light emitting layer.
  • the holes at the interface now accumulate at the interface between the hole transport layer and the first hole buffer sublayer, thereby separating the hole accumulation region and the quantum dot exciton recombination region, reducing the quantum electric field excited by the space electric field.
  • the unfavorable effects of the separation of molecules and the quenching of fluorescence have improved the luminous efficiency, stability and lifetime of QLEDs.
  • the material of the first hole buffer sublayer is a mixed material composed of a first hole buffer material and a fourth hole transport material
  • the electrical conductivity of the first hole buffer material is less than
  • the fourth hole-transporting material in the first hole-buffering sublayer can be used as a channel for hole-transport
  • the first hole-buffering material can be used as a barrier for hole-transport
  • all the holes that originally accumulated at the interface between the hole transport layer and the quantum dot light-emitting layer are diffused in the first hole buffer sublayer, thereby achieving the purpose of widening the hole accumulation region, and widening
  • the widened hole accumulation region can bring the following benefits: On the one hand, a widened hole accumulation region reduces the requirements for the electrical resistance of the hole transport material, in other words, a widened hole accumulation region reduces the unit The volume of hole transport layer accumulates the density of charge, which in turn improves the electrical resistance of the hole transport layer and
  • the widened hole accumulation region can reduce the proximity
  • the electric field intensity at the interface of the quantum dot light-emitting layer is To reduce the electric field caused by exciton dissociation, Fluorescence Quenching reduced, thereby contributing to improvement of luminous efficiency and lifetime QLED.
  • the hole buffer layer is a single-layer structure composed of a first hole buffer sublayer
  • the material of the first hole buffer sublayer is a first hole buffer material
  • the quantum dot light emitting diode includes a substrate 101, an anode 102, a hole transport layer 103, a first hole buffer sublayer 104, a quantum dot light emitting layer 105, and a cathode 106, which are stacked in this order from bottom to top.
  • the first hole buffer sub-layer material is a first hole buffer material.
  • a separate sub-buffer layer is first hole disposed between the hole transport layer and the quantum dot light emitting layer, since the first buffer sub-layer material is a hole conductivity of less than 1 ⁇ 10 -8 Sm - 1 hole buffer material, which causes part of the holes output from the anode to accumulate at the interface between the hole transport layer and the first hole buffer sublayer, and another part of the holes pass through the first in a tunneling manner.
  • the hole buffer sublayer emits light in combination with electrons in the quantum dot light emitting layer. As shown in FIG. 2 and FIG.
  • the interface between the transport layer and the first hole buffer sublayer separates the hole accumulation region from the quantum dot exciton recombination region, reduces the adverse effect of the space electric field on quantum dot exciton separation and fluorescence quenching, and improves QLED's luminous efficiency, stability and life.
  • the thickness of the first hole buffer sublayer is preferably 1-3 nm.
  • the hole buffer layer is a single-layer structure composed of a first hole buffer sublayer
  • the material of the first hole buffer sublayer is a first hole buffer material and a fourth hole
  • the quantum dot light emitting diode includes a substrate 201, an anode 202, a hole transport layer 203, and a first hole buffer sub-layer, which are stacked in this order from bottom to top. 204.
  • the material of the first hole buffer sublayer is a mixture composed of a first hole buffer material and a fourth hole transport material. In this embodiment, as shown in FIG.
  • the first hole-transporting material in the first hole-buffering sublayer can be used as a hole-transporting channel, and the first hole-buffering material can be used as a hole-transporting barrier.
  • the hole portion accumulated at the interface between the hole transport layer and the first hole buffer sublayer can be diffused in the first hole buffer sublayer, thereby achieving the purpose of widening the hole accumulation region and widening.
  • the hole accumulation region will reduce the density of the accumulated charge per unit volume of the hole transport layer, thereby improving the electrical resistance of the hole transport layer in a disguised manner, which will help improve the stability and service life of the QLED; further, the widened
  • the hole accumulation region can also reduce the electric field intensity near the interface of the quantum dot light-emitting layer, which is beneficial to reduce the exciton separation caused by the electric field and reduce the quantum dot fluorescence quenching, thereby improving the luminous efficiency and service life of the QLED.
  • the thickness of the first hole buffer sublayer is 1-7 nm.
  • the first hole buffer material is selected from one or more of Al 2 O 3 , SiO 2 , AlN, Si 3 N 4 and the like, but is not limited thereto.
  • the first hole transporting material is one or more of TAPC, NPB, NPD, TCTA, CBP, NiO, WO 3 , MoO 3 and V 2 O 5 , but is not limited thereto.
  • the fourth hole transport material is one or more of TAPC, NPB, NPD, TCTA, CBP, NiO, WO 3 , MoO 3 and V 2 O 5, etc., but is not limited thereto .
  • the hole buffer layer may also have a stacked structure, including a first hole buffer sublayer, a second hole buffer sublayer, and the first hole buffer sublayer and the second hole buffer sublayer.
  • a third hole transporting material wherein the electrical conductivity of the second hole buffering material is less than 1 ⁇ 10 -8 Sm -1 .
  • the first hole buffer material is one or more of Al 2 O 3 , SiO 2 , AlN, and Si 3 N 4 , but is not limited thereto.
  • the second hole buffer material is selected from one or more of Al 2 O 3 , SiO 2 , AlN, Si 3 N 4 and the like, but is not limited thereto.
  • the second hole transporting material is selected from one or more of TAPC, NPB, NPD, TCTA, CBP, NiO, WO 3 , MoO 3 and V 2 O 5, etc., but is not limited to this.
  • the third hole transporting material is selected from one or more of TAPC, NPB, NPD, TCTA, CBP, NiO, WO 3 , MoO 3 and V 2 O 5, etc., but is not limited to this.
  • the quantum dot light emitting diode includes a substrate 301, an anode 302, a hole transport layer 303, a first hole buffer sublayer 304, and a spacer layer, which are sequentially stacked from bottom to top. 305, a second hole buffer sublayer 306, a quantum dot light emitting layer 307, and a cathode 308, the material of the first hole buffer sublayer is a first hole buffer material, and the material of the second hole buffer sublayer is a first Two-hole buffer material. As shown in FIG.
  • a part of the holes output from the anode continuously tunnels through the first hole buffer sublayer and the second hole buffer sublayer and moves to the quantum dot light emitting layer and the electrons to emit light in combination;
  • the remaining part of the holes is blocked by the first hole buffer sublayer and the second hole buffer sublayer, which are spaced apart, and are accumulated at the interface between the hole transport layer and the first hole buffer sublayer, and at the interface. At the interface between the spacer layer and the second hole buffer sublayer.
  • This embodiment can not only achieve the purpose of widening the empty accumulation region, but also separate the hole accumulation region from the exciton recombination region, which can not only reduce the adverse effects of the space electric field on the quantum dot exciton separation and fluorescence quenching, It can also reduce the density of the accumulated charge per unit volume of the hole transport layer, thereby improving the electrical resistance of the hole transport layer in a disguised manner, and helping to improve the luminous efficiency, stability and service life of the QLED.
  • the thickness of the first hole buffer sublayer is preferably 0.5-2nm, and the thickness of the second hole buffer sublayer is 0.5-2nm.
  • the thickness of the spacer layer is 1-3 nm.
  • the quantum dot light emitting diode includes a substrate 401, an anode 402, a hole transporting layer 403, a first hole buffer sublayer 404, and a spacer layer, which are stacked in order from bottom to top. 405, a second hole buffer sublayer 406, a quantum dot light emitting layer 407, and a cathode 408, the material of the first hole buffer sublayer is a mixed material composed of a first hole buffer material and a fourth hole transport material, The second hole sub-layer material is a mixed material composed of a second hole buffer material and a third hole transport material.
  • the material of the first hole buffer sublayer is a mixed material composed of a first hole buffer material and a fourth hole transport material
  • the second hole sub-layer material is a mixed material composed of a second hole buffer material and a third hole transport material.
  • the hole transport material in the first hole buffer sublayer material and the second hole buffer sublayer material can be used as a hole transport channel, that is, holes output from the anode. It can move to the quantum dot light-emitting layer and the electrons to emit light through the hole-transporting channels of the first hole-buffering sublayer and the second hole-buffering sublayer; and the remaining holes are distributed in the hole-transporting layer, In the first hole buffer sublayer, the spacer layer, and the second hole buffer sublayer, the purpose of widening the hole accumulation region is achieved, and the luminous efficiency and service life of the QLED are further improved.
  • the thickness of the first hole buffer sublayer is 1-4 nm
  • the second hole is The thickness of the buffer sublayer is 1-4 nm.
  • the thickness of the spacer layer is 1-3 nm.
  • a quantum dot light emitting diode includes a substrate, an anode, a hole transport layer, a first hole buffer sub-layer, a spacer layer, and a second hole, which are sequentially stacked from bottom to top.
  • a buffer sublayer, a quantum dot light emitting layer, and a cathode the first hole buffer sublayer material is a first hole buffer material
  • the second hole sublayer material is a second hole buffer material and a third hole transport Material composition of mixed materials.
  • the light-emitting layer and the electron are combined to emit light; the remaining part of the holes is blocked by the first hole buffer sublayer and accumulated at the interface of the hole transport layer and the first hole buffer sublayer, at the spacer layer, and at the second At the hole buffer sublayer.
  • This embodiment can achieve the purpose of widening the empty accumulation region, which can reduce the electric field intensity near the interface of the light emitting layer of the quantum dot, which is beneficial to reduce the exciton separation caused by the electric field, reduce the fluorescence quenching of the quantum dot, and thus help improve the QLED. It can also reduce the density of the accumulated charge per unit volume of the hole transport layer, thereby improving the electrical resistance of the hole transport layer in a disguised manner, and helping to improve the stability and service life of the QLED.
  • the thickness of the first hole buffer sub-layer is 0.5-2 nm, and the thickness of the second hole buffer sub-layer is 1-4 nm.
  • the thickness of the spacer layer is 1-3 nm.
  • a quantum dot light emitting diode which includes a substrate, an anode, a hole transport layer, a first hole buffer sub-layer, a spacer layer, and a second hole buffer, which are sequentially stacked in order from bottom to top.
  • part of the holes output from the anode passes through the first hole buffer sub-layer based on the material of the first hole transport layer, and then passes through the second hole buffer sub-layer and moves in a tunneling manner.
  • the quantum dot light-emitting layer and the electron are combined to emit light; the remaining part of the holes is blocked by the second hole buffer sub-layer, and accumulated at the interface between the hole-transport layer and the first hole buffer sub-layer, respectively, in the first space.
  • This embodiment can not only achieve the purpose of widening the empty accumulation region, but also separate the hole accumulation region from the exciton recombination region, which can not only reduce the adverse effects of the space electric field on the quantum dot exciton separation and fluorescence quenching, It can also reduce the density of the accumulated charge per unit volume of the hole transport layer, thereby improving the electrical resistance of the hole transport layer in a disguised manner, and helping to improve the luminous efficiency, stability and service life of the QLED.
  • the thickness of the first hole buffer sublayer is preferably 1-4 nm, and the thickness of the second hole buffer sublayer is 0.5 in this embodiment. -2 nm, and the thickness of the spacer layer is 1-3 nm.
  • the substrate may be a substrate of rigid material, such as glass, or a substrate of flexible material, such as one of PET or PI.
  • the anode may be selected from the group consisting of indium-doped tin oxide (ITO), fluorine-doped tin oxide (FTO), antimony-doped tin oxide (ATO), aluminum-doped zinc oxide (AZO), and the like. One or more.
  • ITO indium-doped tin oxide
  • FTO fluorine-doped tin oxide
  • ATO antimony-doped tin oxide
  • AZO aluminum-doped zinc oxide
  • the material of the hole-transporting layer may be selected from materials having good hole-transporting properties, such as, but not limited to, TAPC, NPB, NPD, TCTA, CBP, NiO, WO 3 , MoO 3 And V 2 O 5 and the like.
  • the material of the quantum dot light emitting layer is one of a group II-VI compound semiconductor, a group III-V compound semiconductor, a group I-III-VI compound semiconductor, or a group IV elementary semiconductor.
  • the II-VI compound semiconductors are CdSe, ZnCdS, CdSeS, ZnCdSeS, CdSe / ZnS, CdSeS / ZnS, CdSe / CdS, CdSe / CdS / ZnS, ZnCdS / ZnS, CdS / ZnS, and ZnCdSeS / ZnS, etc.
  • One or more of the group III-V compound semiconductor is one or more of GaAs, GaN, InP, InP / ZnS, etc .
  • the group I-III-VI compound semiconductor is CuInS, AgInS, One or more of CuInS / ZnS, AnInS / ZnS, and the like
  • the group IV elemental semiconductor is one or more of Si, C, and graphene.
  • an electron transport layer is further provided between the quantum dot light emitting layer and the cathode, and the material of the electron transport layer may be selected from materials with good electron transport performance, for example, may be selected from, but not limited to, n type TPBi, Bepp2, BTPS, TmPyPb, ZnO, TiO 2, Fe 2 O 3, SnO 2, Ta 2 O 3, AlZnO, ZnSnO InSnO, and one or more other.
  • the cathode may be selected from one of an aluminum (Al) electrode, a silver (Ag) electrode, a gold (Au) electrode, and the like.
  • the quantum dot light emitting diode of the present disclosure may further include one or more of the following functional layers: a hole injection layer provided between the anode and the hole transport layer, and a hole injection layer provided between the cathode and the electron transport layer Electron injection layer.
  • the present disclosure also provides an embodiment of a method for manufacturing a quantum dot light emitting diode with a formal structure as shown in FIG. 1, which specifically includes the following steps:
  • a first hole buffer sub-layer is prepared on the hole transport layer.
  • the material of the first hole buffer sub-layer is a first hole buffer material, and the electrical conductivity of the first hole buffer material is less than 1 ⁇ 10 -8 Sm -1 ;
  • a cathode is prepared on the quantum dot light emitting layer to obtain the quantum dot light emitting diode.
  • the method for preparing each layer may be a chemical method or a physical method.
  • the chemical method includes, but is not limited to, one of a chemical vapor deposition method, a continuous ion layer adsorption and reaction method, an anodization method, an electrolytic deposition method, and a co-precipitation method.
  • physical methods include, but are not limited to, solution methods (such as spin coating method, printing method, blade coating method, dipping and pulling method, dipping method, spraying method, roll coating method, casting method, slit coating method Or strip coating method), evaporation method (such as thermal evaporation method, electron beam evaporation method, magnetron sputtering method or multi-arc ion plating method, etc.), deposition method (such as physical vapor deposition method, atomic layer Deposition method, pulsed laser deposition method, etc.).
  • solution methods such as spin coating method, printing method, blade coating method, dipping and pulling method, dipping method, spraying method, roll coating method, casting method, slit coating method Or strip coating method
  • evaporation method such as thermal evaporation method, electron beam evaporation method, magnetron sputtering method or multi-arc ion plating method, etc.
  • deposition method such as physical vapor deposition method, atomic layer Deposition method, pulsed laser deposition method,
  • a quantum dot light emitting diode which includes a substrate, an anode, a hole functional layer, a quantum dot light emitting layer, and a cathode layered from bottom to top, wherein the hole functional layer includes A hole transport layer and a hole buffer layer, the hole transport layer is provided near the anode, the hole buffer layer is provided near the quantum dot light emitting layer, and the hole buffer layer includes a layer and the space A first hole buffer sub-layer provided by the hole-transporting layer in close contact with each other, and the material of the first hole buffer sub-layer is the first hole buffer material or is composed of the first hole buffer material and the fourth hole transport material A mixed material, wherein the hole mobility of the first hole buffer material is less than 1 ⁇ 10 -6 cm 2 V -1 s -1 .
  • a hole function layer is provided between the anode and the quantum dot light-emitting layer.
  • the hole function layer includes a hole transport layer and a hole buffer layer.
  • the hole buffer layer can improve the hole transport.
  • the electric resistance of the layer can also improve the luminous efficiency, stability and life of the QLED.
  • the material of the first hole buffer sublayer is a first hole buffer material or a mixed material composed of a first hole buffer material and a fourth hole transport material.
  • the hole mobility of the hole buffer material is less than 1 ⁇ 10 -6 cm 2 V -1 s -1 , which enables the first hole buffer sublayer to delay the movement of the hole vector sub-point light emitting layer and reduce
  • the cumulative density of holes at the interface between the hole transport layer and the quantum dot light emitting layer widens the hole accumulation area of the quantum dot light emitting diode, thereby bringing the following benefits:
  • the widened hole accumulation area will reduce the In other words, the widened hole accumulation region reduces the density of the accumulated charge per unit volume of the hole transport layer, which in turn improves the electric resistance of the hole transport layer, which helps In order to improve the stability and service life of QLEDs, on the other hand, the widened hole accumulation region can reduce the electric field intensity near the interface of the quantum dot light-emitting layer, which is beneficial to
  • the HOMO energy level of the first hole buffer material in the first hole buffer sublayer is greater than the HOMO energy level of the material of the hole transport layer, and the HOMO energy of the first hole buffer material is The order is smaller than the valence band top energy level of the quantum dot in the quantum dot light emitting layer. Since the HOMO energy level of the first hole buffer material is greater than the HOMO energy level of the hole transport layer material, a hole barrier exists at the interface between the hole transport layer and the first hole buffer sublayer, thereby causing voids. The holes accumulate at this interface, and the purpose of widening the hole accumulation area is achieved.
  • the HOMO energy level of the first hole buffer material more closely matches the valence band top energy level of the quantum dot in the quantum dot light-emitting layer, which facilitates the transition of the holes in the first hole buffer sublayer to the quantum.
  • the light emitting layer emits light in combination with the electrons, thereby improving the light emitting efficiency of the QLED.
  • the hole buffer layer is a single-layer structure composed of a first hole buffer sublayer
  • the material of the first hole buffer sublayer is a first hole buffer material
  • the quantum dot light emitting diode includes a substrate 101, an anode 102, a hole transport layer 103, a first hole buffer sublayer 104, a quantum dot light emitting layer 105, and a cathode 106, which are stacked in this order from bottom to top.
  • the first hole buffer sub-layer material is a first hole buffer material.
  • a separate first hole buffer sublayer is disposed between the hole transport layer and the quantum dot light emitting layer.
  • a hole barrier exists at the interface, so that a portion of the holes output from the anode accumulates at the interface, and the remaining holes move through the interface to the first hole buffer sublayer; however, because the first void
  • the material of the hole buffer sub-layer is a first hole buffer material having a hole mobility of less than 1 ⁇ 10 -6 cm 2 V -1 s -1 , so that the movement to the holes in the first hole buffer sub-layer is partially delayed In the first hole buffer sublayer, another part transitions from the first hole buffer sublayer to the quantum dot light emitting layer and emits light in combination with electrons.
  • the hole accumulation region in the quantum dot light-emitting diode is widened, and the space electric field density is reduced, thereby reducing the space electric field's effect on quantum dot exciton separation and fluorescence quenching.
  • Adverse effects have improved the luminous efficiency, stability and life of QLED.
  • the thickness selection of the first hole buffer sub-layer becomes the key to balance the two.
  • the thickness of the first hole buffer sub-layer is preferably 1-6 nm.
  • the The first hole buffer sublayer can not only widen the hole accumulation region of the quantum dot light emitting diode, but also ensure that a sufficient number of holes are injected into the quantum dot light emitting layer, thereby improving the light emitting intensity and light emitting efficiency of the QLED.
  • the first hole buffer material is selected from one or more of TPBi, Bphen, TmPyPb, BCP, and TAZ, but is not limited thereto.
  • the hole buffer layer is a single-layer structure composed of a first hole buffer sublayer
  • the material of the first hole buffer sublayer is a first hole buffer material and a fourth hole
  • the quantum dot light emitting diode includes a substrate 201, an anode 202, a hole transport layer 203, and a first hole buffer sublayer, which are stacked in order from bottom to top. 204.
  • the material of the first hole buffer sublayer is a mixed material composed of a first hole buffer material and a fourth hole transport material.
  • the hole-transporting material in the first hole-buffering sublayer can be used as a hole-transporting channel, and the hole-buffering material is responsible for delaying hole-transportation, which can both delay hole-transportation. Effect, the thickness of the hole buffer layer can be increased, thereby further widening the hole accumulation region, and improving the luminous efficiency and service life of the QLED.
  • the thickness of the first hole buffer sub-layer is 1-15 nm, and within this thickness range, the first hole buffer sub-layer can further widen the hole accumulation region and make it sufficient. A number of holes are injected into the quantum dot light emitting layer, thereby ensuring the QLED light emitting intensity and light emitting efficiency.
  • the first hole buffer material is selected from one or more of TPBi, Bphen, TmPyPb, BCP, and TAZ, but is not limited thereto.
  • the first hole transporting material is one or more of TAPC, NPB, NPD, TCTA, CBP, NiO, WO 3 , MoO 3 and V 2 O 5 , but is not limited thereto.
  • the hole buffer layer may also have a stacked structure, including a first hole buffer sublayer, a second hole buffer sublayer, and the first hole buffer sublayer and the second hole buffer sublayer.
  • a hole buffer sublayer, the material of the spacer layer is a second hole transport material, and the material of the second hole buffer sublayer is a second hole buffer material or a second hole buffer material and a third hole A mixed material composed of a transport material, wherein the hole mobility of the second hole buffer material is less than 1 ⁇ 10 -6 cm 2 V -1 s -1 .
  • the first hole buffer material is selected from one or more of TPBi, Bphen, TmPyPb, BCP, TAZ, and the like, but is not limited thereto.
  • the second hole buffer material is selected from one or more of TPBi, Bphen, TmPyPb, BCP, TAZ, and the like, but is not limited thereto.
  • the second hole transporting material is selected from one or more of TAPC, NPB, NPD, TCTA, CBP, NiO, WO 3 , MoO 3 and V 2 O 5, etc., but is not limited to this.
  • the third hole transporting material is selected from one or more of TAPC, NPB, NPD, TCTA, CBP, NiO, WO 3 , MoO 3 and V 2 O 5, etc., but is not limited to this.
  • the quantum dot light emitting diode includes a substrate 301, an anode 302, a hole transport layer 303, a first hole buffer sublayer 304, and a spacer layer, which are sequentially stacked from bottom to top. 305, a second hole buffer sublayer 306, a quantum dot light emitting layer 307, and a cathode 308, the material of the first hole buffer sublayer is a first hole buffer material, and the material of the second hole buffer sublayer is a first Two hole buffer materials, the hole mobility of the first hole buffer material and the second hole buffer material are less than 1 ⁇ 10 -6 cm 2 V -1 s -1 .
  • a hole potential barrier exists at the interface between the hole transport layer and the first hole buffer sublayer, and holes also exist at the interface between the spacer layer and the second hole buffer sublayer.
  • the potential barrier can accumulate holes at the two interfaces, that is, the quantum dot light emitting diode in this embodiment increases the hole accumulating interface, thereby further widening the hole accumulating region, which can effectively improve the luminous efficiency of QLED and Service life.
  • the thickness of the first hole buffer sub-layer is 0.5-3 nm
  • the thickness of the second hole buffer sub-layer is 0.5-3 nm
  • the thickness of the spacer layer is 1-3 nm.
  • the quantum dot light emitting diode includes a substrate 401, an anode 402, a hole transporting layer 403, a first hole buffer sublayer 404, and a spacer layer, which are stacked in this order from bottom to top.
  • the material of the first hole buffer sublayer is a mixed material composed of a first hole buffer material and a fourth hole transport material
  • the second hole sub-layer material is a mixed material composed of a second hole buffer material and a third hole transport material
  • the hole mobility of the first hole buffer material and the second hole buffer material is less than 1 ⁇ 10 -6 cm 2 V -1 s -1 .
  • a first hole-transporting material in the first hole-buffering sublayer can be used as its hole-transporting channel
  • a third hole-transporting material in the second hole-buffering sublayer can be used as its hole-transporting channel.
  • Hole transport channels that is, holes output from the anode can move through the hole transport channels of the first hole buffer sublayer and the second hole buffer sublayer to the quantum dot light emitting layer and the electrons to emit light in combination; the remaining part
  • the holes are distributed in the hole transport layer, the first hole buffer sublayer, the spacer layer, and the second hole buffer sublayer, thereby achieving the purpose of widening the empty accumulation region, and further improving the light emitting efficiency and use of QLEDs. life.
  • the thickness of the first hole buffer sub-layer is preferably 1-8 nm, and the thickness of the second hole buffer sub-layer is 1-8 nm in this embodiment.
  • the thickness of the spacer layer is 1-5 nm.
  • a quantum dot light emitting diode includes a substrate, an anode, a hole transport layer, a first hole buffer sublayer, a spacer layer, and a second hole buffer sublayer, which are sequentially stacked in order from bottom to top.
  • a quantum dot light emitting layer, and a cathode the first hole buffer sublayer material is a first hole buffer material
  • the second hole sublayer material is a second hole buffer material and a third hole transport material.
  • the hole mobility of the first hole buffer material and the second hole buffer material are both less than 1 ⁇ 10 -6 cm 2 V -1 s -1 .
  • part of the holes output from the anode is accumulated on the interface between the hole transport layer and the first hole buffer sublayer, and part of the holes is accumulated on the first hole buffer layer and the spacer layer.
  • this embodiment can also achieve the purpose of widening the empty accumulation region. It can reduce the electric field strength near the interface of the quantum dot light-emitting layer, which is beneficial to reduce the exciton separation caused by the electric field and reduce the quantum dots. Fluorescence quenching, which helps to improve the luminous efficiency of QLEDs; it can also reduce the density of the accumulated charge per unit volume of the hole transport layer, which in turn improves the electrical resistance of the hole transport layer and helps to improve the stability of the QLED And life.
  • the thickness of the first hole buffer sublayer in this embodiment is 0.5-3nm
  • the thickness of the second hole buffer sublayer is 1-8nm
  • the spacer layer The thickness is 1-3nm.
  • a quantum dot light emitting diode includes a substrate, an anode, a hole transport layer, a first hole buffer sublayer, a spacer layer, and a second hole buffer sublayer, which are sequentially stacked in order from bottom to top.
  • the first hole buffer sublayer material is a mixed material composed of a first hole buffer material and a fourth hole transport material
  • the second hole sublayer material is a second hollow Hole buffer material
  • the hole mobility of the first hole buffer material and the second hole buffer material are less than 1 ⁇ 10 -6 cm 2 V -1 s -1 .
  • the holes output from the anode can be accumulated not only on the interface between the hole transport layer and the first hole buffer sub-layer, but also on the first hole buffer layer and the gap.
  • this embodiment can also achieve the purpose of widening the empty accumulation region, which can reduce the electric field intensity near the interface of the quantum dot light-emitting layer, which is beneficial to reduce the exciton separation caused by the electric field and reduce the quantum Point fluorescence quenching, which helps to improve the luminous efficiency of QLEDs; it can also reduce the density of the accumulated charge per unit volume of the hole transport layer, which in turn improves the electrical resistance of the hole transport layer and helps to improve the QLED's Stability and service life.
  • the thickness of the first hole buffer sub-layer is selected in this embodiment, and the thickness of the second hole buffer sub-layer is 0.5. -3 nm, and the thickness of the spacer layer is 1-3 nm.
  • the present invention further provides an embodiment of a method for manufacturing a quantum dot light emitting diode with a formal structure as shown in FIG. 10, which specifically includes the following steps:
  • a first hole buffer sub-layer is prepared on the hole transport layer.
  • the material of the first hole buffer sub-layer is a first hole buffer material, and the hole mobility of the first hole buffer material is less than 1. ⁇ 10 -6 cm 2 V -1 s -1 ;
  • a cathode is prepared on the quantum dot light emitting layer to obtain the quantum dot light emitting diode.
  • the preparation method of each layer may be a chemical method or a physical method.
  • the chemical method includes, but is not limited to, a chemical vapor deposition method, a continuous ion layer adsorption and reaction method, an anodization method, an electrolytic deposition method, and a co-precipitation method.
  • One or more; physical methods include, but are not limited to, solution methods (e.g., spin coating method, printing method, blade coating method, dipping and pulling method, dipping method, spray method, roll coating method, casting method, slit coating method Method or strip coating method, etc.), evaporation method (such as thermal evaporation method, electron beam evaporation method, magnetron sputtering method or multi-arc ion plating method, etc.), deposition method (such as physical vapor deposition method, atomic method) Layer deposition, pulsed laser deposition, etc.).
  • solution methods e.g., spin coating method, printing method, blade coating method, dipping and pulling method, dipping method, spray method, roll coating method, casting method, slit coating method Method or strip coating method, etc.
  • evaporation method such as thermal evaporation method, electron beam evaporation method, magnetron sputtering method or multi-arc ion plating method, etc.
  • deposition method such as physical vapor de
  • a quantum dot light emitting diode includes an ITO cathode, an electron transport layer, a quantum dot light emitting layer, a first hole buffer sub-layer, a hole transport layer, a hole injection layer, and an anode, which are sequentially stacked from bottom to top.
  • the specific preparation includes the following steps:
  • the transparent substrate is transferred to an atomic layer deposition system, and trimethylaluminum and water vapor are alternately passed on the quantum dot light emitting layer until 2 nm of Al 2 O 3 is deposited as the first hole buffer sub-layer;
  • HAT-CN as a hole injection layer on the hole transport layer at a rate of 0.05 nm / s, with a thickness of 10 nm;
  • Al is vapor-deposited at a rate of 0.4 nm / s as an anode with a thickness of 100 nm.
  • a quantum dot light emitting diode includes an ITO anode, a hole transport layer, a first hole buffer sublayer, a quantum dot light emitting layer, an electron transport layer, and a cathode, which are sequentially stacked from bottom to top.
  • the specific preparation includes the following: step:
  • a quantum dot light emitting diode includes an ITO anode, a hole transport layer, a first hole buffer sublayer, a spacer layer, a second hole buffer sublayer, a quantum dot light emitting layer, and an electron, which are sequentially stacked from bottom to top.
  • the specific preparation of the transport layer and the cathode includes the following steps:
  • the above transparent substrate is transferred into an evaporation chamber, vacuumed to below 1 ⁇ 10 -4 pa, and Al is deposited on the electron transport layer as a cathode at a rate of 0.4 nm / s to a thickness of 100 nm.
  • a quantum dot light emitting diode includes an ITO anode, a hole transport layer, a first hole buffer sublayer, a spacer layer, a second hole buffer sublayer, a quantum dot light emitting layer, and an electron, which are sequentially stacked from bottom to top.
  • the specific preparation of the transport layer and the cathode includes the following steps:
  • the above transparent substrate is transferred into an evaporation chamber, vacuumed to below 1 ⁇ 10 -4 pa, and Al is deposited on the electron transport layer as a cathode at a rate of 0.4 nm / s to a thickness of 100 nm.
  • a quantum dot light emitting diode includes an ITO cathode, an electron transport layer, a quantum dot light emitting layer, a hole transport layer, a hole injection layer, and an anode, which are sequentially stacked from bottom to top.
  • the specific preparation includes the following steps:
  • the transparent substrate is transferred to an evaporation chamber, vacuumed to 1 ⁇ 10 -4 pa or less, and NPB is deposited on the hole buffer layer at a rate of 0.1 nm / s as a hole transport layer with a thickness of 30nm;
  • HAT-CN as a hole injection layer on the hole transport layer at a rate of 0.05 nm / s, with a thickness of 10 nm;
  • Al is evaporated at a rate of 0.4 nm / s as an anode to a thickness of 100 nm.
  • a quantum dot light emitting diode includes an ITO cathode, an electron transport layer, a quantum dot light emitting layer, a first hole buffer sub-layer, a hole transport layer, a hole injection layer, and an anode, which are sequentially stacked from bottom to top.
  • the specific preparation includes the following steps:
  • HAT-CN on the hole transport layer as a hole injection layer at a rate of 0.1 nm / s, with a thickness of 10 nm;
  • Al is vapor-deposited at a rate of 0.4 nm / s as an anode with a thickness of 100 nm.
  • a quantum dot light emitting diode includes an ITO cathode, an electron transport layer, a quantum dot light emitting layer, a first hole buffer sub-layer, a hole transport layer, a hole injection layer, and an anode, which are sequentially stacked from bottom to top.
  • the specific preparation includes the following steps:
  • HAT-CN on the hole transport layer as a hole injection layer at a rate of 0.1 nm / s, with a thickness of 10 nm;
  • Al is vapor-deposited at a rate of 0.4 nm / s as an anode with a thickness of 100 nm.
  • a quantum dot light emitting diode includes an ITO cathode, an electron transport layer, a quantum dot light emitting layer, a first hole buffer sublayer, a spacer layer, a second hole buffer sublayer, and holes, which are sequentially stacked from bottom to top.
  • the specific preparation of the transport layer, the hole injection layer and the anode includes the following steps:
  • HAT-CN as a hole injection layer on the hole transport layer at a rate of 0.1 nm / s, with a thickness of 10 nm;
  • a quantum dot light emitting diode includes an ITO cathode, an electron transport layer, a quantum dot light emitting layer, a first hole buffer sublayer, a spacer layer, a second hole buffer sublayer, and holes, which are sequentially stacked from bottom to top
  • the specific preparation of the transport layer, the hole injection layer and the anode includes the following steps:
  • NPB is deposited on the first hole buffer sub-layer at a rate of 0.02 nm / s as a spacer layer with a thickness of 3 nm;
  • HAT-CN as a hole injection layer on the hole transport layer at a rate of 0.1 nm / s, with a thickness of 10 nm;
  • FIG. 15 is the QLED in embodiment 5 to embodiment 9.
  • FIG. 16 is a luminance-voltage (LV) curve of the QLED in Example 5 to Example 9
  • FIG. 17 is a current efficiency-current density of the QLED in Example 5 to Example 9 ( CE-J) curve
  • FIG. 18 is the life curve of the QLED in Example 5 to Example 9, wherein the QLED in Example 5 is a reference device.
  • the QLED current in Examples 6 to 9 is larger than the current of the reference device in Example 5. This is because the HOMO energy level of the hole buffer layer material is between the hole transport layer material. Between the HOMO level of the quantum dot and the top level of the valence band of the quantum dot, which is more conducive to the holes caused by the sub-point transition of the hole buffer layer vector.
  • the maximum current efficiency of the QLED shown in Example 6 is 28.6% higher than that of the reference device in Example 5.
  • the maximum current efficiency of the QLED shown in Example 7 is 45.1% higher than that of the reference device in Example 5.
  • the maximum current efficiency of the QLED shown in Example 8 is 42.1% higher than that of the reference device in Example 5, and the maximum current efficiency of the QLED shown in Example 9 is 69.2% higher than that of the reference device in Example 5.
  • Example 6 After introducing the hole buffer layer, the life of the QLED is improved to different degrees.
  • the T 50 of the QLED shown in Example 6 is 63.3% higher than that of the reference device in Example 5.
  • the Q 50 of QLED shown in Example 7 is 258% higher than that of the reference device in Example 5.
  • Example 8 T 50 relative QLED shown in reference Example 5 163% improved devices, reference Example 5 QLED device of FIG. 9
  • Example T 50 embodiment is relatively increased 432 percent.
  • the hole functional layer in the quantum dot light emitting diode of the present disclosure includes a hole transport layer and a hole buffer layer, and the hole buffer layer includes a first layer provided in close contact with the hole transport layer.
  • the material of the first hole buffer sublayer is the first hole buffer material or a mixed material composed of the first hole buffer material and the first hole transport material; when the first When the conductivity of the hole-buffering material is less than 1 ⁇ 10 -8 Sm -1 , the hole-buffering layer can block the transmission of the hole-vector sub-dot luminescent layer, so that a part of the holes are scattered in the hole-transporting layer and the hole-buffering layer Interface, thereby reducing the cumulative density of holes at the interface between the hole-transporting layer and the quantum dot light-emitting layer, widening the hole accumulation region, and separating the hole accumulation region from the exciton recombination region, reducing the spatial electric field on the quantum dots.
  • Quenching of the fluorescent light can not only improve the electric resistance of the hole transport layer, but also improve the luminous efficiency, stability and life of the QLED; when the hole mobility of the first hole buffer material is less than 1 ⁇ 10 -6 cm 2 V -1 s -1, the buffer layer may be wider than the hole
  • the hole accumulation region reduces the accumulated hole density per unit volume of the hole transport layer, thereby distorting the enhancement of the electric resistance of the hole transport layer; the widened hole accumulation region also reduces the space near the exciton recombination region
  • the electric field thereby reducing the quantum dot exciton separation and fluorescence quenching, can improve the luminous efficiency, stability and lifetime of QLEDs.

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Abstract

公开一种量子点发光二极管，其包括设置在所述阳极与所述量子点发光层之间的空穴功能层，所述空穴功能层包括空穴传输层和空穴缓冲层，所述空穴传输层靠近所述阳极设置，所述空穴缓冲层靠近所述量子点发光层设置，所述空穴缓冲层包括一层与所述空穴传输层贴合设置的第一空穴缓冲子层，所述第一空穴缓冲子层的材料为第一空穴缓冲材料或者为由第一空穴缓冲材料和第一空穴传输材料组成的混合材料，其中所述第一空穴缓冲材料的电导率小于1×10 -8Sm -1或者所述第一空穴缓冲材料的空穴迁移率小于1×10 -6cm 2V -1s -1。

Description

一种量子点发光二极管 技术领域
本公开涉及发光二极管领域，尤其涉及一种量子点发光二极管。
背景技术
由于量子点具有发光波长随尺寸和成分连续可调，发光光谱窄，荧光效率高、稳定性好等独特的光学性质，使得基于量子点的电致发光二极管(QLED)得到广泛的关注和研究。此外，QLED显示还具有可视角大、对比度高、响应速度快、可柔性等诸多LCD所无法实现的优势，因而有望成为下一代的显示技术。经过二十多年不断的研究和发展，QLED的性能(发光效率、寿命)取得了很大的提高，但目前距离商业化仍有不小的距离，尤其是蓝光QLED。
目前QLED的发展存在着一个很大的瓶颈，那就是没有合适的空穴传输材料，因为当前空穴传输材料的HOMO能级和量子点的价带顶能级不匹配，导致在空穴传输层和量子点层之间存在较大的空穴注入势垒；相反，电子传输层到量子点层的电子注入势垒则小得多甚至为零，这导致电子很容易就运动到量子点中，而空穴更多地积累在空穴传输层/量子点发光层界面。界面处累积的空穴形成空间电荷区，产生空间电场。一方面，空间电场的存在会进一步阻碍空穴源源不断地向量子点运动，导致电荷传输更加不平衡；另一方面，空间电场会造成量子点中激子分离，导致量子点荧光猝灭，二者都会降低QLED的性能。此外，空穴在非常窄的界面处累积也对空穴传输材料的耐电性提出了很高的要求，往往会因为空穴传输材料的耐电性能低而造成QLED亮度、效率快速衰降。
因此，现有技术还有待于改进和发展。
发明内容
鉴于上述现有技术的不足，本公开的目的在于提供一种量子点发光二极管，旨在解决现有量子点发光二极管在空穴传输层和量子点层界面由于空穴累积易产生空间电场，从而导致量子点发光二极管发光效率较低的问题。
本公开的技术方案如下：
一种量子点发光二极管，包括层叠设置的阳极、阴极、设置在所述阳极和阴 极之间的量子点发光层、设置在所述阳极与所述量子点发光层之间的空穴功能层，所述空穴功能层包括空穴传输层和空穴缓冲层，所述空穴传输层靠近所述阳极设置，所述空穴缓冲层靠近所述量子点发光层设置，其中，所述空穴缓冲层包括一层与所述空穴传输层贴合设置的第一空穴缓冲子层，所述第一空穴缓冲子层的材料为第一空穴缓冲材料或者为由第一空穴缓冲材料和第四空穴传输材料组成的混合材料，其中所述第一空穴缓冲材料的电导率小于1×10 -8Sm -1。
一种量子点发光二极管，包括层叠设置的阳极、阴极、设置在所述阳极和阴极之间的量子点发光层、设置在所述阳极与所述量子点发光层之间的空穴功能层，所述空穴功能层包括空穴传输层和空穴缓冲层，所述空穴传输层靠近所述阳极设置，所述空穴缓冲层靠近所述量子点发光层设置，其中，所述空穴缓冲层包括一层与所述空穴传输层贴合设置的第一空穴缓冲子层，所述第一空穴缓冲子层的材料为第一空穴缓冲材料或者为由第一空穴缓冲材料和第四空穴传输材料组成的混合材料，其中所述第一空穴缓冲材料的空穴迁移率小于1×10 -6cm 2V -1s -1。
有益效果：本公开中，所述空穴缓冲层可阻碍空穴向量子点发光层传输，使一部分空穴散布在空穴传输层与空穴缓冲层的界面中，从而降低空穴在空穴传输层与量子点发光层界面的累积密度，宽化空穴累积区域，并使空穴累积区与激子复合区分离，减小空间电场对量子点的荧光猝灭，既可以提高空穴传输层的耐电性，又可以提高QLED的发光效率、稳定性和寿命。
附图说明
图1为本公开具体实施方式中提供的第一种结构的量子点发光二极管的示意图。
图2为现有技术中量子点发光二极管的空穴累积区和激子复合区示意图。
图3为本公开图1所示量子点发光二极管的空穴累积区和激子复合区示意图。
图4为本公开具体实施方式中提供的第二种结构的量子点发光二极管的示意图。
图5为本公开图4所述量子点发光二极管的空穴累积区和激子复合区示意图。
图6为本公开具体实施方式中提供的第三种结构的量子点发光二极管的示 意图。
图7为本公开图6所述量子点发光二极管的空穴累积区和激子复合区示意图。
图8为本公开具体实施方式中提供的第四种结构的量子点发光二极管的示意图。
图9为本公开图8所述量子点发光二极管的空穴累积区和激子复合区示意图。
图10为本发明具体实施方式中提供的第五种结构的量子点发光二极管的示意图。
图11为本发明图10所示量子点发光二极管的空穴累积区和激子复合区示意图。
图12为本发明具体实施方式中提供的第六种结构的量子点发光二极管的示意图。
图13为本发明具体实施方式中提供的第七种结构的量子点发光二极管的示意图。
图14为本发明具体实施方式中提供的第八种结构的量子点发光二极管的示意图。
图15为实施例5-实施例9中QLED的电流密度-电压(J-V)曲线。
图16为实施例5-实施例9中QLED的亮度-电压(L-V)曲线。
图17为实施例5-实施例9中QLED的电流效率-电流密度(CE-J)曲线。
图18为实施例5-实施例9中QLED的寿命曲线。
具体实施方式
本公开提供一种量子点发光二极管，为使本公开的目的、技术方案及效果更加清楚、明确，以下对本公开进一步详细说明。应当理解，此处所描述的具体实施例仅仅用以解释本公开，并不用于限定本公开。
量子点发光二极管有多种形式，且所述量子点发光二极管分为正式结构和反式结构，所述反式结构的量子点发光二极管可包括从下往上层叠设置的衬底、阴极、量子点发光层、空穴功能层以及阳极。而本公开的具体实施方式中将主要以正式结构的量子点发光二极管为实施例进行介绍。具体地，所述量子点发光二极 管包括从下往上层叠设置的衬底、阳极、空穴功能层、量子点发光层以及阴极，其中，所述空穴功能层包括空穴传输层和空穴缓冲层，所述空穴传输层靠近所述阳极设置，所述空穴缓冲层靠近所述量子点发光层设置，所述空穴缓冲层包括一层与所述空穴传输层贴合设置的第一空穴缓冲子层，所述第一空穴缓冲子层的材料为第一空穴缓冲材料或者为由第四空穴缓冲材料和第一空穴传输材料组成的混合材料，其中所述第一空穴缓冲材料的电导率小于1×10 -8Sm -1。
本实施例通过在阳极与量子点发光层之间设置一空穴功能层，所述空穴功能层包括空穴传输层和空穴缓冲层，所述空穴缓冲层的设置既可以提高空穴传输层的耐电性，又可以提高QLED的发光效率、稳定性和寿命。实现上述效果的机理具体如下：
由于本实施例所述空穴缓冲层包括一层与所述空穴传输层贴合设置的第一空穴缓冲子层，当所述第一空穴缓冲子层的材料为第一空穴缓冲材料，且所述第一空穴缓冲材料的电导率小于1×10 -8Sm -1时，所述第一空穴缓冲子层能够使得原来全部累积在空穴传输层和量子点发光层之间界面处的空穴现在则累积在空穴传输层与第一空穴缓冲子层之间的界面，从而将空穴累积区和量子点激子复合区分离，降低了空间电场对量子点激子分离和荧光猝灭的不利影响，提升了QLED的发光效率、稳定性和寿命。
本实施例中，当所述第一空穴缓冲子层的材料为由第一空穴缓冲材料和第四空穴传输材料组成的混合材料，且所述第一空穴缓冲材料的电导率小于1×10 -8Sm -1时，所述第一空穴缓冲子层中的第四空穴传输材料可以作为空穴传输的通道，而第一空穴缓冲材料则作为空穴传输的壁垒，这样可使原来全部累积在空穴传输层和量子点发光层之间界面处的空穴部分弥漫在所述第一空穴缓冲子层中，从而达到宽化空穴累积区的目的，而宽化的空穴累积区可带来以下好处：一方面，宽化的空穴累积区会降低对空穴传输材料耐电性的要求，换一句话说，宽化的空穴累积区会减小单位体积空穴传输层累积电荷的密度，从而变相提高了空穴传输层的耐电性，有助于提高QLED的稳定性和使用寿命；另一方面，宽化的空穴累积区能够减小靠近量子点发光层界面的电场强度，有利于减少电场导致的激子分离，减少量子点荧光猝灭，从而有助于提高QLED的发光效率和使用寿命。
在一些实施方式中，当所述空穴缓冲层为第一空穴缓冲子层构成的单层结 构，且第一空穴缓冲子层材料为第一空穴缓冲材料时，即如图1所示，所述量子点发光二极管包括从下至上依次叠层设置的衬底101、阳极102、空穴传输层103、第一空穴缓冲子层104、量子点发光层105以及阴极106，所述第一空穴缓冲子层材料为第一空穴缓冲材料。本实施例中，单独的第一空穴缓冲子层设置在空穴传输层和量子点发光层之间，由于所述第一空穴缓冲子层材料为电导率小于1×10 -8Sm -1的空穴缓冲材料，这使得从阳极输出的空穴一部分会累积在空穴传输层与第一空穴缓冲子层之间的界面处，另一部分空穴则以隧穿的方式通过第一空穴缓冲子层在量子点发光层与电子复合发光。如图2和图3所示，本实施例由于第一空穴缓冲子层的引入，使得原来全部累积在空穴传输层和量子点发光层之间界面处的空穴现在则累积在空穴传输层与第一空穴缓冲子层之间的界面，从而将空穴累积区和量子点激子复合区分离，降低了空间电场对量子点激子分离和荧光猝灭的不利影响，提升了QLED的发光效率、稳定性和寿命。
由于第一空穴缓冲子层中空穴缓冲材料导电性极低，若第一空穴缓冲子层厚度过大，则会导致QLED的电流减小、驱动电压增大，导致QLED性能下降；若第一空穴缓冲子层厚度过小，则空穴累积区域与激子复合区分离效果较差，不能降低空间电场对量子点激子分离和荧光猝灭的不利影响。因此，为了优化QLED的性能并提升其发光效率，本实施例优选所述第一空穴缓冲子层的厚度为1-3nm。
在一些实施方式中，当所述空穴缓冲层为第一空穴缓冲子层构成的单层结构，且所述第一空穴缓冲子层材料为第一空穴缓冲材料和第四空穴传输材料组成的混合材料时，即如图4所示，所述量子点发光二极管包括从下至上依次叠层设置的衬底201、阳极202、空穴传输层203、第一空穴缓冲子层204、量子点发光层205以及阴极206，所述第一空穴缓冲子层材料为由第一空穴缓冲材料和第四空穴传输材料组成的混合物。本实施例中，如图5所示，所述第一空穴缓冲子层中的第一空穴传输材料可以作为空穴传输的通道，而第一空穴缓冲材料则作为空穴传输的壁垒，这样可使累积在空穴传输层和第一空穴缓冲子层界面处的空穴部分弥漫在所述第一空穴缓冲子层中，从而达到宽化空穴累积区的目的，宽化的空穴累积区域会减小单位体积空穴传输层累积电荷的密度，从而变相提高了空穴传输层的耐电性，有助于提高QLED的稳定性和使用寿命；进一步地，宽化的空穴累积区域还能够减小靠近量子点发光层界面的电场强度，有利于减少电场导致 的激子分离，减少量子点荧光猝灭，从而提高QLED的发光效率和使用寿命。
在一些实施方式中，为了宽化空穴累积区域，从而提升QLED的发光效率，本实施例优选所述第一空穴缓冲子层的厚度为1-7nm。
在一些实施方式中，所述第一空穴缓冲材料选自Al 2O 3、SiO 2、AlN和Si 3N 4等中的一种或多种，但不限于此。在一些实施方式中，所述第一空穴传输材料为TAPC、NPB、NPD、TCTA、CBP、NiO、WO 3、MoO 3和V 2O 5等中的一种或多种，但不限于此。在一些实施方式中，所述第四空穴传输材料为TAPC、NPB、NPD、TCTA、CBP、NiO、WO 3、MoO 3和V 2O 5等中的一种或多种，但不限于此。
在一些实施方式中，所述空穴缓冲层还可为叠层结构，包括第一空穴缓冲子层、第二空穴缓冲子层和设置在所述第一空穴缓冲子层和第二空穴缓冲子层之间的间隔层，所述间隔层材料为第二空穴传输材料，所述第二空穴缓冲子层材料为第二空穴缓冲材料或者为由第二空穴缓冲材料和第三空穴传输材料组成的混合材料，其中所述第二空穴缓冲材料的电导率小于1×10 -8Sm -1。
在一些实施方式中，所述第一空穴缓冲材料为Al 2O 3、SiO 2、AlN和Si 3N 4等中的一种或多种，但不限于此。在一些实施方式中，所述第二空穴缓冲材料选自Al 2O 3、SiO 2、AlN和Si 3N 4等中的一种或多种，但不限于此。在一些实施方式中，所述第二空穴传输材料选自TAPC、NPB、NPD、TCTA、CBP、NiO、WO 3、MoO 3和V 2O 5等中的一种或多种，但不限于此。在一些实施方式中，所述第三空穴传输材料选自TAPC、NPB、NPD、TCTA、CBP、NiO、WO 3、MoO 3和V 2O 5等中的一种或多种，但不限于此。
在一些实施方式中，如图6所示，所述量子点发光二极管包括从下至上依次层叠设置的衬底301、阳极302、空穴传输层303、第一空穴缓冲子层304、间隔层305、第二空穴缓冲子层306、量子点发光层307以及阴极308，所述第一空穴缓冲子层材料为第一空穴缓冲材料，所述第二空穴缓冲子层材料为第二空穴缓冲材料。如图7所示，在本实施例中，从阳极输出的空穴一部分连续隧穿通过第一空穴缓冲子层和第二空穴缓冲子层并运动至量子点发光层与电子复合发光；而剩余的另一部分空穴则被间隔设置的第一空穴缓冲子层和第二空穴缓冲子层阻隔，分别累积在空穴传输层与第一空穴缓冲子层的界面处以及累积在所述间隔层与第二空穴缓冲子层的界面处。本实施例不仅可实现宽化空积累区的目的，还可 使得空穴累积区与所述激子复合区分离，这不仅可降低空间电场对量子点激子分离和荧光猝灭的不利影响，还可减小单位体积空穴传输层累积电荷的密度，从而变相提高了空穴传输层的耐电性，有助于提高QLED的发光效率、稳定性和使用寿命。
为优化QLED的性能并提升其发光效率，本实施例优选所述第一空穴缓冲子层的厚度为0.5-2nm，所述第二空穴缓冲子层的厚度为0.5-2nm。
在一些实施方式中，所述间隔层的厚度为1-3nm。
在一些实施方式中，如图8所示，所述量子点发光二极管包括从下至上依次层叠设置的衬底401、阳极402、空穴传输层403、第一空穴缓冲子层404、间隔层405、第二空穴缓冲子层406、量子点发光层407以及阴极408，所述第一空穴缓冲子层材料为由第一空穴缓冲材料和第四空穴传输材料组成的混合材料，所述第二空穴子层材料为由第二空穴缓冲材料和第三空穴传输材料组成的混合材料。本实施例中，如图9所示，所述第一空穴缓冲子层材料和第二空穴缓冲子层材料中的空穴传输材料可以作为空穴传输通道，即从阳极输出的空穴可通过第一空穴缓冲子层和第二空穴缓冲子层的空穴传输通道运动至量子点发光层与电子复合发光；而剩余的另一部分空穴则分布在所述空穴传输层、第一空穴缓冲子层、间隔层以及第二空穴缓冲子层中，从而达到宽化空穴累积区的目的，进一步提高QLED的发光效率和使用寿命。
为使QLED的空穴累积区得到有效宽化，从而优化QLED的性能并提升其发光效率，本实施例优选所述第一空穴缓冲子层的厚度为1-4nm，所述第二空穴缓冲子层的厚度为1-4nm。
在一些实施方式中，所述间隔层的厚度为1-3nm。
在一种优选的实施方式中，一种量子点发光二极管，其包括从下至上依次层叠设置的衬底、阳极、空穴传输层、第一空穴缓冲子层、间隔层、第二空穴缓冲子层、量子点发光层以及阴极，所述第一空穴缓冲子层材料为第一空穴缓冲材料，所述第二空穴子层材料为第二空穴缓冲材料和第三空穴传输材料组成的混合材料。在本实施例中，从阳极输出的空穴一部分隧穿通过第一空穴缓冲子层后，可再基于第三空穴传输层材料通过所述第二空穴缓冲子层并运动至量子点发光层与电子复合发光；而剩余的另一部分空穴则被第一空穴缓冲子层阻隔，分别累积在空穴传输层与第一空穴缓冲子层的界面处、间隔层处以及第二空穴缓冲子层 处。本实施例能够实现宽化空积累区的目的，其能够减小靠近量子点发光层界面的电场强度，有利于减少电场导致的激子分离，减少量子点荧光猝灭，从而有助于提高QLED的发光效率；其还可减小单位体积空穴传输层累积电荷的密度，从而变相提高了空穴传输层的耐电性，有助于提高QLED的稳定性和使用寿命。
在一些实施方式中，为优化QLED的性能并提升其发光效率，所述第一空穴缓冲子层的厚度为0.5-2nm，所述第二空穴缓冲子层的厚度为1-4nm，所述间隔层的厚度为1-3nm。
在一些实施方式中，还提供一种量子点发光二极管，其包括从下至上依次层叠设置的衬底、阳极、空穴传输层、第一空穴缓冲子层、间隔层、第二空穴缓冲子层、量子点发光层以及阴极，所述第一空穴缓冲子层材料为由第一空穴缓冲材料和第四空穴传输材料组成的混合材料，所述第二空穴子层材料为第二空穴缓冲材料。在本实施例中，从阳极输出的空穴一部分基于第一空穴传输层材料通过所述第一空穴缓冲子层，再通过隧穿方式穿过所述第二空穴缓冲子层并运动至量子点发光层与电子复合发光；而剩余的另一部分空穴则被第二空穴缓冲子层阻隔，分别累积在空穴传输层与第一空穴缓冲子层的界面处、第一空穴缓冲子层处以及间隔层处。本实施例不仅可实现宽化空积累区的目的，还可使得空穴累积区与所述激子复合区分离，这不仅可降低空间电场对量子点激子分离和荧光猝灭的不利影响，还可减小单位体积空穴传输层累积电荷的密度，从而变相提高了空穴传输层的耐电性，有助于提高QLED的发光效率、稳定性和使用寿命。
在一些实施方式中，为优化QLED的性能并提升其发光效率，本实施例优选所述第一空穴缓冲子层的厚度为1-4nm，所述第二空穴缓冲子层的厚度为0.5-2nm，所述间隔层的厚度为1-3nm。
在一些实施方式中，所述衬底可以为刚性材质的衬底，如玻璃等，也可以为柔性材质的衬底，如PET或PI等中的一种。
在一些实施方式中，所述阳极可以选自铟掺杂氧化锡(ITO)、氟掺杂氧化锡(FTO)、锑掺杂氧化锡(ATO)、铝掺杂氧化锌(AZO)等中的一种或多种。
在一些实施方式中，所述空穴传输层的材料可以选自具有良好空穴传输性能的材料，例如可以选自但不限于TAPC、NPB、NPD、TCTA、CBP、NiO、WO 3、MoO 3和V 2O 5等中的一种或多种。
在一些实施方式中，所述量子点发光层材料为II-VI族化合物半导体、III-V 族化合物半导体、I-III-VI族化合物半导体或IV族单质半导体中的一种。作为举例，所述II-VI族化合物半导体为CdSe、ZnCdS、CdSeS、ZnCdSeS、CdSe/ZnS、CdSeS/ZnS、CdSe/CdS、CdSe/CdS/ZnS、ZnCdS/ZnS、CdS/ZnS和ZnCdSeS/ZnS等中的一种或多种；所述III-V族化合物半导体为GaAs、GaN、InP和InP/ZnS等中的一种或多种；所述I-III-VI族化合物半导体为CuInS、AgInS、CuInS/ZnS和AnInS/ZnS等中的一种或多种；所述IV族单质半导体为Si、C和石墨烯等中的一种或多种。
在一些实施方式中，在所述量子点发光层和阴极之间还设置有电子传输层，所述电子传输层的材料可以选自具有良好电子传输性能的材料，例如可以选自但不限于n型的TPBi、Bepp2、BTPS、TmPyPb、ZnO、TiO 2、Fe 2O 3、SnO 2、Ta 2O 3、AlZnO、ZnSnO和InSnO等中的一种或多种。
在一些实施方式中，所述阴极可选自铝(Al)电极、银(Ag)电极和金(Au)电极等中的一种。
需说明的是，本公开量子点发光二极管还可以包含以下功能层的一层或者多层：设置于阳极和空穴传输层之间的空穴注入层，设置于阴极和电子传输层之间的电子注入层。
本公开还提供一种如图1所示正式结构的量子点发光二极管的制备方法的实施例，具体的包括以下步骤：
提供一衬底，在所述衬底上形成阳极；
在所述阳极上制备空穴传输层；
在所述空穴传输层上制备第一空穴缓冲子层，所述第一空穴缓冲子层材料为第一空穴缓冲材料，且所述第一空穴缓冲材料的电导率小于1×10 -8Sm -1；
在所述第一空穴缓冲子层上制备量子点发光层；
在所述量子点发光层上制备阴极，得到所述量子点发光二极管。
本公开中，各层制备方法可以是化学法或物理法，其中化学法包括但不限于化学气相沉积法、连续离子层吸附与反应法、阳极氧化法、电解沉积法、共沉淀法中的一种或多种；物理法包括但不限于溶液法(如旋涂法、印刷法、刮涂法、浸渍提拉法、浸泡法、喷涂法、滚涂法、浇铸法、狭缝式涂布法或条状涂布法等)、蒸镀法(如热蒸镀法、电子束蒸镀法、磁控溅射法或多弧离子镀膜法等)、沉积法(如物理气相沉积法、原子层沉积法、脉冲激光沉积法等)中的一种或多种。
在一些实施方式中，还提供一种量子点发光二极管，其包括从下往上层叠设置的衬底、阳极、空穴功能层、量子点发光层以及阴极，其中，所述空穴功能层包括空穴传输层和空穴缓冲层，所述空穴传输层靠近所述阳极设置，所述空穴缓冲层靠近所述量子点发光层设置，所述空穴缓冲层包括一层与所述空穴传输层贴合设置的第一空穴缓冲子层，所述第一空穴缓冲子层的材料为第一空穴缓冲材料或者为由第一空穴缓冲材料和第四空穴传输材料组成的混合材料，其中所述第一空穴缓冲材料的空穴迁移率小于1×10 -6cm 2V -1s -1。
本实施例通过在阳极与量子点发光层之间设置一空穴功能层，所述空穴功能层包括空穴传输层和空穴缓冲层，所述空穴缓冲层的设置既可以提高空穴传输层的耐电性，又可以提高QLED的发光效率、稳定性和寿命。实现上述效果的机理具体如下：
本实施例中，所述第一空穴缓冲子层的材料为第一空穴缓冲材料或者为由第一空穴缓冲材料和第四空穴传输材料组成的混合材料，由于所述第一空穴缓冲材料的空穴迁移率小于1×10 -6cm 2V -1s -1，这使得所述第一空穴缓冲子层能够起到延缓空穴向量子点发光层运动的作用，降低空穴在空穴传输层与量子点发光层界面处的累积密度，使得量子点发光二极管的空穴累积区宽化，从而带来以下好处：一方面，宽化的空穴累积区会降低对空穴传输材料耐电性的要求，换一句话说，宽化的空穴累积区会减小单位体积空穴传输层累积电荷的密度，从而变相提高了空穴传输层的耐电性，有助于提高QLED的稳定性和使用寿命；另一方面，宽化的空穴累积区能够减小靠近量子点发光层界面的电场强度，有利于减少电场导致的激子分离，减少量子点荧光猝灭，从而有助于提高QLED的发光效率和使用寿命。
在本实施例中，所述第一空穴缓冲子层中的第一空穴缓冲材料的HOMO能级大于空穴传输层材料的HOMO能级，且所述第一空穴缓冲材料的HOMO能级小于所述量子点发光层中量子点的价带顶能级。由于第一空穴缓冲材料的HOMO能级大于空穴传输层材料的HOMO能级，使得所述空穴传输层与第一空穴缓冲子层之间的界面存在空穴势垒，从而造成空穴在该界面累积，达到宽化空穴积累区的目的。进一步地，所述第一空穴缓冲材料的HOMO能级与量子点发光层中量子点的价带顶能级更为匹配，有助于第一空穴缓冲子层中的空穴跃迁至量子点发光层中与电子复合发光，从而提升QLED的发光效率。
在一些实施方式中，当所述空穴缓冲层为第一空穴缓冲子层构成的单层结构，且第一空穴缓冲子层材料为第一空穴缓冲材料时，即如图10所示，所述量子点发光二极管包括从下至上依次叠层设置的衬底101、阳极102、空穴传输层103、第一空穴缓冲子层104、量子点发光层105以及阴极106，所述第一空穴缓冲子层材料为第一空穴缓冲材料。本实施例中，如图11所示，单独的第一空穴缓冲子层设置在空穴传输层和量子点发光层之间，由于空穴传输层和第一空穴缓冲子层之间的界面存在空穴势垒，使得从阳极输出的空穴一部分积累在该界面处，剩余的部分空穴则穿过该界面运动至第一空穴缓冲子层中；然而，由于所述第一空穴缓冲子层材料为空穴迁移率小于1×10 -6cm 2V -1s -1的第一空穴缓冲材料，使得运动至第一空穴缓冲子层中的空穴，一部分被延缓在第一空穴缓冲子层中，另一部分则从第一空穴缓冲子层中跃迁至量子点发光层中与电子复合发光。本实施例由于第一空穴缓冲子层的引入，使得量子点发光二极管中的空穴累积区宽化，减小空间电场密度，进而降低了空间电场对量子点激子分离和荧光猝灭的不利影响，提升了QLED的发光效率、稳定性和寿命。
在本实施例中，虽然第一空穴缓冲子层的设计能够起到宽化空穴累积区的作用，但其延缓空穴传输的能力是不利于空穴向量子点发光层注入的，而向量子点发光层中注入足够数量的空穴是保证QLED发光强度和发光效率的关键。基于此，所述第一空穴缓冲子层的厚度选择成为二者平衡的关键，本实施例优选所述第一空穴缓冲子层的厚度为1-6nm，在该厚度范围内，所述第一空穴缓冲子层既能够宽化量子点发光二极管的空穴累积区，又能够保证使足够数量的空穴注入到量子点发光层，从而提升QLED的发光强度和发光效率。
本实施例中，所述第一空穴缓冲材料选自TPBi、Bphen、TmPyPb、BCP和TAZ中的一种或多种，但不限于此。
在一些实施方式中，当所述空穴缓冲层为第一空穴缓冲子层构成的单层结构，且所述第一空穴缓冲子层材料为第一空穴缓冲材料和第四空穴传输材料组成的混合材料时，即如图12所示，所述量子点发光二极管包括从下至上依次叠层设置的衬底201、阳极202、空穴传输层203、第一空穴缓冲子层204、量子点发光层205以及阴极206，所述第一空穴缓冲子层材料为由第一空穴缓冲材料和第四空穴传输材料组成的混合材料。本实施例中，所述第一空穴缓冲子层中的空穴传输材料可以作为空穴传输的通道，而空穴缓冲材料则负责延缓空穴的传输，这 样既可以起到延缓空穴传输的效果，又可以增大空穴缓冲层的厚度，从而进一步的宽化空穴累积区，提高QLED的发光效率和使用寿命。
本实施例中，所述第一空穴缓冲子层的厚度为1-15nm，在该厚度范围内，所述第一空穴缓冲子层既可进一步宽化空穴累积区，又能够使足够数量的空穴注入到量子点发光层，从而保证QLED发光强度和发光效率。
本实施例中，所述第一空穴缓冲材料选自TPBi、Bphen、TmPyPb、BCP和TAZ中的一种或多种，但不限于此。优选的，所述第一空穴传输材料为TAPC、NPB、NPD、TCTA、CBP、NiO、WO 3、MoO 3和V 2O 5等中的一种或多种，但不限于此。
在一些实施方式中，所述空穴缓冲层还可为叠层结构，包括第一空穴缓冲子层、第二空穴缓冲子层和设置在所述第一空穴缓冲子层和第二空穴缓冲子层，所述间隔层材料为第二空穴传输材料，所述第二空穴缓冲子层材料为第二空穴缓冲材料或者为由第二空穴缓冲材料和第三空穴传输材料组成的混合材料，其中所述第二空穴缓冲材料的空穴迁移率小于1×10 -6cm 2V -1s -1。
在一些实施方式中，所述第一空穴缓冲材料选自TPBi、Bphen、TmPyPb、BCP和TAZ等中的一种或多种，但不限于此。在一些实施方式中，所述第二空穴缓冲材料选自TPBi、Bphen、TmPyPb、BCP和TAZ等中的一种或多种，但不限于此。在一些实施方式中，所述第二空穴传输材料选自TAPC、NPB、NPD、TCTA、CBP、NiO、WO 3、MoO 3和V 2O 5等中的一种或多种，但不限于此。在一些实施方式中，所述第三空穴传输材料选自TAPC、NPB、NPD、TCTA、CBP、NiO、WO 3、MoO 3和V 2O 5等中的一种或多种，但不限于此。
在一些实施方式中，如图13所示，所述量子点发光二极管包括从下至上依次层叠设置的衬底301、阳极302、空穴传输层303、第一空穴缓冲子层304、间隔层305、第二空穴缓冲子层306、量子点发光层307以及阴极308，所述第一空穴缓冲子层材料为第一空穴缓冲材料，所述第二空穴缓冲子层材料为第二空穴缓冲材料，所述第一空穴缓冲材料和第二空穴缓冲材料的空穴迁移率均小于1×10 -6cm 2V -1s -1。在本实施例中，所述空穴传输层与第一空穴缓冲子层之间的界面存在空穴势垒，所述间隔层与第二空穴缓冲子层之间的界面也存在空穴势垒，所述两个界面处均可以累积空穴，即本实施例中的量子点发光二极管增加了空穴累积界面，从而进一步宽化了空穴累积区，可有效提高QLED的发光效率和使 用寿命。
为优化QLED的性能并提升其发光效率，所述第一空穴缓冲子层的厚度为0.5-3nm，所述第二空穴缓冲子层的厚度为0.5-3nm。
在一些实施方式中，所述间隔层的厚度为1-3nm。
在一些实施方式中，如图14所示，所述量子点发光二极管包括从下至上依次层叠设置的衬底401、阳极402、空穴传输层403、第一空穴缓冲子层404、间隔层405、第二空穴缓冲子层406、量子点发光层407以及阴极408，所述第一空穴缓冲子层材料为由第一空穴缓冲材料和第四空穴传输材料组成的混合材料，所述第二空穴子层材料为由第二空穴缓冲材料和第三空穴传输材料组成的混合材料，所述第一空穴缓冲材料和第二空穴缓冲材料的空穴迁移率均小于1×10 -6cm 2V -1s -1。本实施例中，所述第一空穴缓冲子层中的第一空穴传输材料可作为其空穴传输通道，所述第二空穴缓冲子层中的第三空穴传输材料可作为其空穴传输通道，即从阳极输出的空穴可通过第一空穴缓冲子层和第二空穴缓冲子层的空穴传输通道运动至量子点发光层与电子复合发光；而剩余的另一部分空穴则分布在所述空穴传输层、第一空穴缓冲子层、间隔层以及第二空穴缓冲子层中，从而达到宽化空积累区的目的，进一步提高QLED的发光效率和使用寿命。
为优化QLED的性能并提升其发光效率，本实施例优选所述第一空穴缓冲子层的厚度为1-8nm，所述第二空穴缓冲子层的厚度为1-8nm。
在一些实施方式中，所述间隔层的厚度为1-5nm。
在一些实施方式中，一种量子点发光二极管，其包括从下至上依次层叠设置的衬底、阳极、空穴传输层、第一空穴缓冲子层、间隔层、第二空穴缓冲子层、量子点发光层以及阴极，所述第一空穴缓冲子层材料为第一空穴缓冲材料，所述第二空穴子层材料为第二空穴缓冲材料和第三空穴传输材料组成的混合材料，所述第一空穴缓冲材料和第二空穴缓冲材料的空穴迁移率均小于1×10 -6cm 2V -1s -1。在本实施例中，从阳极输出的空穴部分累积在所述空穴传输层与第一空穴缓冲子层之间的界面上，部分则累积在所述第一空穴缓冲层、间隔层以及第二空穴缓冲层上，本实施例同样能够实现宽化空积累区的目的，其能够减小靠近量子点发光层界面的电场强度，有利于减少电场导致的激子分离，减少量子点荧光猝灭，从而有助于提高QLED的发光效率；其还可减小单位体积空穴传输层累积电荷的密度，从而变相提高了空穴传输层的耐电性，有助于提高QLED的稳定性和使 用寿命。
为优化QLED的性能并提升其发光效率，本实施例所述第一空穴缓冲子层的厚度为0.5-3nm，所述第二空穴缓冲子层的厚度为1-8nm，所述间隔层的厚度为1-3nm。
在一些实施方式中，一种量子点发光二极管，其包括从下至上依次层叠设置的衬底、阳极、空穴传输层、第一空穴缓冲子层、间隔层、第二空穴缓冲子层、量子点发光层以及阴极，所述第一空穴缓冲子层材料为由第一空穴缓冲材料和第四空穴传输材料组成的混合材料，所述第二空穴子层材料为第二空穴缓冲材料，所述第一空穴缓冲材料和第二空穴缓冲材料的空穴迁移率均小于1×10 -6cm 2V -1s -1。在本实施例中，从阳极输出的空穴既可累积在所述空穴传输层与第一空穴缓冲子层之间的界面上，还可累积在所述第一空穴缓冲层、间隔层以及第二空穴缓冲层上，本实施例同样能够实现宽化空积累区的目的，其能够减小靠近量子点发光层界面的电场强度，有利于减少电场导致的激子分离，减少量子点荧光猝灭，从而有助于提高QLED的发光效率；其还可减小单位体积空穴传输层累积电荷的密度，从而变相提高了空穴传输层的耐电性，有助于提高QLED的稳定性和使用寿命。
在一些实施方式中，为优化QLED的性能并提升其发光效率，本实施例选所述第一空穴缓冲子层的厚度为1-8nm，所述第二空穴缓冲子层的厚度为0.5-3nm，所述间隔层的厚度为1-3nm。
在一些实施方式中，本发明还提供一种如图10所示正式结构的量子点发光二极管的制备方法的实施例，具体的包括以下步骤：
提供一衬底，在所述衬底上形成阳极；
在所述阳极上制备空穴传输层；
在所述空穴传输层上制备第一空穴缓冲子层，所述第一空穴缓冲子层材料为第一空穴缓冲材料，所述第一空穴缓冲材料的空穴迁移率小于1×10 -6cm 2V -1s -1；
在所述第一空穴缓冲子层上制备量子点发光层；
在所述量子点发光层上制备阴极，得到所述量子点发光二极管。
本实施例中，各层制备方法可以是化学法或物理法，其中化学法包括但不限于化学气相沉积法、连续离子层吸附与反应法、阳极氧化法、电解沉积法、共沉淀法中的一种或多种；物理法包括但不限于溶液法(如旋涂法、印刷法、刮涂法、 浸渍提拉法、浸泡法、喷涂法、滚涂法、浇铸法、狭缝式涂布法或条状涂布法等)、蒸镀法(如热蒸镀法、电子束蒸镀法、磁控溅射法或多弧离子镀膜法等)、沉积法(如物理气相沉积法、原子层沉积法、脉冲激光沉积法等)中的一种或多种。
下面通过实施例对本公开进行详细说明。
实施例1
一种量子点发光二极管，其包括自下而上依次层叠设置的ITO阴极、电子传输层、量子点发光层、第一空穴缓冲子层、空穴传输层、空穴注入层以及阳极，其具体的制备包括以下步骤：
1、在透明基片上沉积导电薄膜ITO作为阴极，厚度为50nm；
2、在阴极上利用溶液法沉积40nm的ZnO作为电子传输层，N 2环境中100℃退火15min；
3、在电子传输层上利用溶液法沉积25nm的CdSe/ZnS作为量子点发光层，N 2环境中100℃退火15min；
4、将所述透明基片转移至原子层沉积***中，在量子点发光层上交替通过三甲基铝和水蒸气，直至沉积2nm的Al 2O 3作为第一空穴缓冲子层；
5、将所述透明基片转移至蒸镀舱内，抽真空至1×10 -4pa以下，在第一空穴缓冲子层上以0.1nm/s的速率蒸镀NPB作为空穴传输层，厚度为30nm；
6、在空穴传输层上以0.05nm/s的速率蒸镀HAT-CN作为空穴注入层，厚度为10nm；
7、在空穴注入层上以0.4nm/s的速率蒸镀Al作为阳极，厚度为100nm。
实施例2
一种量子点发光二极管，其包括自下而上依次层叠设置的ITO阳极、空穴传输层、第一空穴缓冲子层、量子点发光层、电子传输层以及阴极，其具体的制备包括以下步骤：
1、在透明基片上沉积导电薄膜ITO作为阳极，厚度为50nm；
2、采用200W的射频功率，保证氧氩比2:100，以0.02nm/s的速率在阳极上溅射30nm的NiO作为空穴传输层；
3、采用Al 2O 3和NiO双靶，控制氧氩比2:100，以0.01nm/s的速率在空穴传输层上共溅射Al 2O 3:NiO混合物作为第一空穴缓冲子层，厚度为5nm；
4、将上述透明基片转移到手套箱中，在第一空穴缓冲子层上利用溶液法沉 积25nmCdSe/ZnS作为量子点发光层，并在N 2环境中100℃退火15min；
5、在量子点发光层上利用溶液法沉积40nm的ZnO作为电子传输层，并在N 2环境中100℃退火15min；
6、将上述基片转移至蒸镀舱内，抽真空至1×10 -4pa以下，以0.4nm/s的速率在电子传输层上蒸镀Al作为阴极，厚度为100nm。
实施例3
一种量子点发光二极管，其包括自下而上依次层叠设置的ITO阳极、空穴传输层、第一空穴缓冲子层、间隔层、第二空穴缓冲子层、量子点发光层、电子传输层以及阴极，其具体的制备包括以下步骤：
1、在透明基片上沉积导电薄膜ITO作为阳极，厚度为50nm；
2、采用200W的射频功率，保证氧氩比2:100，以0.02nm/s的速率在阳极上溅射30nm的NiO作为空穴传输层；
3、在空穴传输层上以0.01nm/s的速率溅射1nm的Al 2O 3作为第一空穴缓冲子层；
4、在第一空穴缓冲子层以0.01nm/s的速率溅射2nm的NiO作为间隔层；
5、在间隔层上以0.01nm/s的速率溅射1nm的Al 2O 3作为第二空穴缓冲子层；
6、将上述基片转移至手套箱中，在第二空穴缓冲子层上利用溶液法沉积25nm的CdSe/ZnS作为量子点发光层，并在N 2环境中100℃退火15min；
7、在量子点发光层上利用溶液法沉积40nm的ZnO作为电子传输层，并在N 2环境中100℃退火15min；
8、将上述透明基片转移至蒸镀舱内，抽真空至1×10 -4pa以下，以0.4nm/s的速率在电子传输层上蒸镀Al作为阴极，厚度为100nm。
实施例4
一种量子点发光二极管，其包括自下而上依次层叠设置的ITO阳极、空穴传输层、第一空穴缓冲子层、间隔层、第二空穴缓冲子层、量子点发光层、电子传输层以及阴极，其具体的制备包括以下步骤：
1、在透明基片上沉积导电薄膜ITO作为阳极，厚度为50nm；
2、采用200W的射频功率，保证氧氩比2:100，以0.02nm/s的速率在阳极上溅射30nm的NiO作为空穴传输层；
3、采用Al 2O 3和NiO双靶，控制氧氩比2:100，以0.01nm/s的速率在空穴 传输层上共溅射Al 2O 3:NiO混合物作为第一空穴缓冲子层，厚度为2nm；
4、在第一空穴缓冲子层以0.01nm/s的速率溅射3nmNiO作为间隔层；
5、采用Al 2O 3和NiO双靶，控制氧氩比2:100，以0.01nm/s的速率在间隔层上共溅射Al 2O 3:NiO混合物作为第二空穴缓冲子层，厚度为2nm；
6、将上述基片转移至手套箱中，在第二空穴缓冲子层上利用溶液法沉积25nm的CdSe/ZnS作为量子点发光层，并在N 2环境中100℃退火15min；
7、在量子点发光层上利用溶液法沉积40nm的ZnO作为电子传输层，并在N 2环境中100℃退火15min；
8、将上述透明基片转移至蒸镀舱内，抽真空至1×10 -4pa以下，以0.4nm/s的速率在电子传输层上蒸镀Al作为阴极，厚度为100nm。
实施例5
一种量子点发光二极管，其包括自下而上依次层叠设置的ITO阴极、电子传输层、量子点发光层、空穴传输层、空穴注入层以及阳极，其具体的制备包括以下步骤：
1、在透明基片上沉积导电薄膜ITO作为阴极，厚度为50nm；
2、在阴极上利用溶液法沉积40nm的ZnO作为电子传输层，N 2环境中100℃退火15min；
3、在电子传输层上利用溶液法沉积25nm的CdSe/ZnS作为量子点发光层，N 2环境中100℃退火15min；
4、将所述透明基片转移至蒸镀舱内，抽真空至1×10 -4pa以下，在空穴缓冲层上以0.1nm/s的速率蒸镀NPB作为空穴传输层，厚度为30nm；
5、在空穴传输层上以0.05nm/s的速率蒸镀HAT-CN作为空穴注入层，厚度为10nm；
6、在空穴注入层上以0.4nm/s的速率蒸镀Al作为阳极，厚度为100nm。
实施例6
一种量子点发光二极管，其包括自下而上依次层叠设置的ITO阴极、电子传输层、量子点发光层、第一空穴缓冲子层、空穴传输层、空穴注入层以及阳极，其具体的制备包括以下步骤：
1、在透明基片上沉积导电薄膜ITO作为阴极，厚度为50nm；
2、在阴极上利用溶液法沉积40nm的ZnO作为电子传输层，N 2环境中100℃ 退火15min；
3、在电子传输层上利用溶液法沉积25nm的CdSe/ZnS作为量子点发光层，N 2环境中100℃退火15min；
4、将上述透明基片移到蒸镀舱，抽真空到1×10 -4Pa以下，然后以0.02nm/s的速率在量子点发光层上蒸镀TPBi作为第一空穴缓冲子层，厚度为3nm；
5、在第一空穴缓冲子层上以0.1nm/s的速率蒸镀NPB作为空穴传输层，厚度为30nm；
6、在空穴传输层上以0.1nm/s的速率蒸镀HAT-CN作为空穴注入层，厚度为10nm；
7、在空穴注入层上以0.4nm/s的速率蒸镀Al作为阳极，厚度为100nm。
实施例7
一种量子点发光二极管，其包括自下而上依次层叠设置的ITO阴极、电子传输层、量子点发光层、第一空穴缓冲子层、空穴传输层、空穴注入层以及阳极，其具体的制备包括以下步骤：
1、在透明基片上沉积导电薄膜ITO作为阴极，厚度为50nm；
2、在阴极上利用溶液法沉积40nm厚ZnO作为电子传输层，在N 2中100℃退火15min；
3、在电子传输层上利用溶液法沉积25nm厚CdSe/ZnS作为量子点发光层，在N 2中100℃退火15min；
4、将上述基片移到蒸镀舱，抽真空到1×10 -4Pa以下，然后以0.02nm/s的速率在量子点发光层上共蒸镀TPBi:NPB作为第一空穴缓冲子层，厚度为7nm；
5、在第一空穴缓冲子层上以0.1nm/s的速率蒸镀NPB作为空穴传输层，厚度为30nm；
6、在空穴传输层上以0.1nm/s的速率蒸镀HAT-CN作为空穴注入层，厚度为10nm；
7、在空穴注入层上以0.4nm/s的速率蒸镀Al作为阳极，厚度为100nm。
实施例8
一种量子点发光二极管，其包括自下而上依次层叠设置的ITO阴极、电子传输层、量子点发光层、第一空穴缓冲子层、间隔层、第二空穴缓冲子层、空穴传输层、空穴注入层以及阳极，其具体的制备包括以下步骤：
1、在透明基片上沉积导电薄膜ITO作为阴极，厚度为50nm；
2、在阴极上利用溶液法沉积40nm厚ZnO作为电子传输层，在N 2中100℃退火15min；
3、在电子传输层上利用溶液法沉积25nm厚CdSe/ZnS作为量子点发光层，在N 2中100℃退火15min；
4、将上述透明基片移到蒸镀舱，抽真空到1×10 -4Pa以下，然后以0.01nm/s的速率在量子点发光层上蒸镀TPBi作为第一空穴缓冲子层，厚度为1.5nm；
5、在第一空穴缓冲子层上以0.01nm/s的速率蒸镀NPB作为间隔层，厚度为2nm；
6、在间隔层上以0.01nm/s的速率蒸镀TPBi作为第二空穴缓冲子层，厚度为1.5nm；
7、在第二空穴缓冲子层上以0.1nm/s的速率蒸镀NPB作为空穴传输层，厚度为30nm；
8、在空穴传输层上以0.1nm/s的速率蒸镀HAT-CN作为空穴注入层，厚度为10nm；
9、在空穴注入层上以0.4nm/s的速率蒸镀Al作为阳极，厚度为100nm。
实施例9
一种量子点发光二极管，其包括自下而上依次层叠设置的ITO阴极、电子传输层、量子点发光层、第一空穴缓冲子层、间隔层、第二空穴缓冲子层、空穴传输层、空穴注入层以及阳极，其具体的制备包括以下步骤：
1、在透明基片上沉积导电薄膜ITO作为阴极，厚度为50nm；
2、在阴极上利用溶液法沉积40nm厚ZnO作为电子传输层，在N 2中100℃退火15min；
3、在电子传输层上利用溶液法沉积25nm厚CdSe/ZnS作为量子点发光层，在N 2中100℃退火15min；
4、将上述透明基片移到蒸镀舱，抽真空到1×10 -4Pa以下，然后以0.02nm/s的速率在量子点层上共蒸镀TPBi:NPB作为第一空穴缓冲子层，厚度为3nm；
5、在第一空穴缓冲子层上以0.02nm/s的速率蒸镀NPB作为间隔层，厚度为3nm；
6、在间隔层上以0.02nm/s的速率蒸镀TPBi:NPB作为第二空穴缓冲子层， 厚度为3nm；
7、在第二空穴缓冲子层上以0.1nm/s的速率蒸镀NPB作为空穴传输层层，厚度为30nm；
8、在空穴传输层上以0.1nm/s的速率蒸镀HAT-CN作为空穴注入层，厚度为10nm；
9、在空穴注入层上以0.4nm/s的速率蒸镀Al作为阳极，厚度为100nm。
进一步地，本发明还对上述实施例5-实施例9中的量子点发光二极管的性能进行了测试，测试结果如图15-图18所示，图15为实施例5-实施例9中QLED的电流密度-电压(J-V)曲线；图16为实施例5-实施例9中QLED的亮度-电压(L-V)曲线；图17为实施例5-实施例9中QLED的电流效率-电流密度(CE-J)曲线；图18为实施例5-实施例9中QLED的寿命曲线，其中实施例5中的QLED为参比器件。
如图15所示，实施例6-实施例9中的QLED电流均大于所述实施例5中参比器件的电流，这是由于空穴缓冲层材料的HOMO能级介于空穴传输层材料的HOMO能级和量子点价带顶能级之间，从而更有利于空穴从空穴缓冲层向量子点跃迁所引起的。
由于空穴缓冲层的引入，宽化了空穴累积区，减小了空间电场密度，所以减少了空间电场对量子点激子的不利影响，因此，引入空穴缓冲层的QLED的亮度和效率都相比参比器件的亮度和效率有所提高，如图16和图17所示。其中，实施例6所示QLED的最大电流效率相比实施例5中参比器件提高了28.6％，实施例7所示QLED的最大电流效率相对实施例5中参比器件提高了45.1％，实施例8所示QLED的最大电流效率相对实施例5中参比器件提高了42.1％，实施例9所示QLED的最大电流效率相对实施例5中参比器件提高了69.2％。
从图18可以看到，引入空穴缓冲层后，QLED的寿命都有不同程度的提高。其中，实施例6所示QLED的T 50相比实施例5中参比器件提高了63.3％，实施例7所示QLED的T 50相对实施例5中参比器件提高了258％，实施例8所示QLED的T 50相对实施例5中参比器件提高了163％，实施例9所示QLED的T 50相对实施例5中参比器件提高了432％。
综上所述，本公开量子点发光二极管中的空穴功能层包括空穴传输层和空穴缓冲层，所述空穴缓冲层包括一层与所述空穴传输层贴合设置的第一空穴缓冲子 层，所述第一空穴缓冲子层的材料为第一空穴缓冲材料或者为由第一空穴缓冲材料和第一空穴传输材料组成的混合材料；当所述第一空穴缓冲材料的电导率小于1×10 -8Sm -1时，所述空穴缓冲层可阻碍空穴向量子点发光层传输，使一部分空穴散布在空穴传输层与空穴缓冲层的界面中，从而降低空穴在空穴传输层与量子点发光层界面的累积密度，宽化空穴累积区域，并使空穴累积区与激子复合区分离，减小空间电场对量子点的荧光猝灭，既可以提高空穴传输层的耐电性，又可以提高QLED的发光效率、稳定性和寿命；当所述第一空穴缓冲材料的空穴迁移率小于1×10 -6cm 2V -1s -1时，所述空穴缓冲层可以宽化空穴积累区，减小单位体积空穴传输层的累积空穴密度，从而变相增强了空穴传输层的耐电性；宽化的空穴累积区还减小了激子复合区附近的空间电场，从而减少量子点激子分离和荧光猝灭，可以提高QLED的发光效率、稳定性和寿命。
应当理解的是，本公开的应用不限于上述的举例，对本领域普通技术人员来说，可以根据上述说明加以改进或变换，所有这些改进和变换都应属于本公开所附权利要求的保护范围。

Claims (20)

  1. 一种量子点发光二极管，包括层叠设置的阳极、阴极、设置在所述阳极和阴极之间的量子点发光层、设置在所述阳极与所述量子点发光层之间的空穴功能层，所述空穴功能层包括空穴传输层和空穴缓冲层，所述空穴传输层靠近所述阳极设置，所述空穴缓冲层靠近所述量子点发光层设置，其特征在于，所述空穴缓冲层包括一层与所述空穴传输层贴合设置的第一空穴缓冲子层，所述第一空穴缓冲子层的材料为第一空穴缓冲材料或者为由第一空穴缓冲材料和第四空穴传输材料组成的混合材料，其中所述第一空穴缓冲材料的电导率小于1×10 -8Sm -1。
  2. 根据权利要求1所述的量子点发光二极管，其特征在于，所述第一空穴缓冲材料包括Al 2O 3、SiO 2、AlN和Si 3N 4中的至少一种。
  3. 根据权利要求1或2所述的量子点发光二极管，其特征在于，所述空穴缓冲层为第一空穴缓冲子层构成的单层结构，当所述第一空穴缓冲子层材料为第一空穴缓冲材料时，所述第一空穴缓冲子层的厚度为1-3nm。
  4. 根据权利要求1或2所述的量子点发光二极管，其特征在于，所述空穴缓冲层为第一空穴缓冲子层构成的单层结构，当所述第一空穴缓冲子层材料为第一空穴缓冲材料和第四空穴传输材料组成的混合材料时，所述第一空穴缓冲子层的厚度为1-7nm。
  5. 根据权利要求1或2所述的量子点发光二极管，其特征在于，所述空穴缓冲层为叠层结构，包括第一空穴缓冲子层、第二空穴缓冲子层和设置在所述第一空穴缓冲子层和第二空穴缓冲子层之间的间隔层，所述间隔层材料为第二空穴传输材料，所述第二空穴缓冲子层材料为第二空穴缓冲材料或者为由第二空穴缓冲材料和第三空穴传输材料组成的混合材料，其中所述第二空穴缓冲材料的电导率小于1×10 -8Sm -1。
  6. 根据权利要求5所述的量子点发光二极管，其特征在于，当所述第一空穴缓冲子层材料为第一空穴缓冲材料，所述第二空穴缓冲子层材料为第二空穴缓冲材料时，所述第一空穴缓冲子层的厚度为0.5-2nm，所述第二空穴缓冲子层的厚度为0.5-2nm。
  7. 根据权利要求5所述的量子点发光二极管，其特征在于，当所述第一空穴缓冲子层材料为由第一空穴缓冲材料和第四空穴传输材料组成的混合材料，所述第二空穴缓冲子层材料为第二空穴缓冲材料和第三空穴传输材料组成的混合材料时，第一空穴缓冲子层的厚度为1-4nm，所述第二空穴缓冲子层的厚度为 1-4nm。
  8. 根据权利要求5所述的量子点发光二极管，其特征在于，当所述第一空穴缓冲子层材料为第一空穴缓冲材料，所述第二空穴缓冲子层材料为第二空穴缓冲材料和第三空穴传输材料组成的混合材料时，第一空穴缓冲子层的厚度为0.5-2nm，所述第二空穴缓冲子层的厚度为1-4nm。
  9. 根据权利要求5所述的量子点发光二极管，其特征在于，当所述第一空穴缓冲子层材料为由第一空穴缓冲材料和第四空穴传输材料组成的混合材料，所述第二空穴缓冲子层材料为第二空穴缓冲材料时，第一空穴缓冲子层的厚度为1-4nm，所述第二空穴缓冲子层的厚度为0.5-2nm。
  10. 根据权利要求6-9任一所述的量子点发光二极管，其特征在于，所述间隔层的厚度为1-3nm。
  11. 一种量子点发光二极管，包括层叠设置的阳极、阴极、设置在所述阳极和阴极之间的量子点发光层、设置在所述阳极与所述量子点发光层之间的空穴功能层，所述空穴功能层包括空穴传输层和空穴缓冲层，所述空穴传输层靠近所述阳极设置，所述空穴缓冲层靠近所述量子点发光层设置，其特征在于，所述空穴缓冲层包括一层与所述空穴传输层贴合设置的第一空穴缓冲子层，所述第一空穴缓冲子层的材料为第一空穴缓冲材料或者为由第一空穴缓冲材料和第四空穴传输材料组成的混合材料，其中所述第一空穴缓冲材料的空穴迁移率小于1×10 -6cm 2V -1s -1。
  12. 根据权利要求11所述的量子点发光二极管，其特征在于，所述第一空穴缓冲材料包括TPBi、Bphen、TmPyPb、BCP和TAZ中的至少一种。
  13. 根据权利要求11或12所述的量子点发光二极管，其特征在于，所述空穴缓冲层为第一空穴缓冲子层构成的单层结构，当所述第一空穴缓冲子层材料为第一空穴缓冲材料时，所述第一空穴缓冲子层的厚度为1-6nm。
  14. 根据权利要求11所述的量子点发光二极管，其特征在于，所述空穴缓冲层为第一空穴缓冲子层构成的单层结构，当所述第一空穴缓冲子层材料为第一空穴缓冲材料和第四空穴传输材料组成的混合材料时，所述第一空穴缓冲子层的厚度为1-15nm。
  15. 根据权利要求11或12所述的量子点发光二极管，其特征在于，所述空穴缓冲层为叠层结构，包括第一空穴缓冲子层、第二空穴缓冲子层和设置在所述 第一空穴缓冲子层和第二空穴缓冲子层之间的间隔层，所述间隔层材料为第二空穴传输材料，所述第二空穴缓冲子层材料为第二空穴缓冲材料或者为由第二空穴缓冲材料和第三空穴传输材料组成的混合材料，其中所述第二空穴缓冲材料的空穴迁移率小于1×10 -6cm 2V -1s -1。
  16. 根据权利要求15所述的量子点发光二极管，其特征在于，当所述第一空穴缓冲子层材料为第一空穴缓冲材料，所述第二空穴缓冲子层材料为第二空穴缓冲材料时，所述第一空穴缓冲子层的厚度为0.5-3nm，所述第二空穴缓冲子层的厚度为0.5-3nm。
  17. 根据权利要求15所述的量子点发光二极管，其特征在于，当所述第一空穴缓冲子层材料为由第一空穴缓冲材料和第四空穴传输材料组成的混合材料，所述第二空穴子层材料为第二空穴缓冲材料和第三空穴传输材料组成的混合材料时，第一空穴缓冲子层的厚度为1-8nm，所述第二空穴缓冲子层的厚度为1-8nm。
  18. 根据权利要求15所述的量子点发光二极管，其特征在于，当所述第一空穴缓冲子层材料为第一空穴缓冲材料，所述第二空穴子层材料为第二空穴缓冲材料和第三空穴传输材料组成的混合材料时，第一空穴缓冲子层的厚度为0.5-3nm，所述第二空穴缓冲子层的厚度为1-8nm。
  19. 根据权利要求15所述的量子点发光二极管，其特征在于，当所述第一空穴缓冲子层材料为由第一空穴缓冲材料和第四空穴传输材料组成的混合材料，所述第二空穴子层材料为第二空穴缓冲材料时，第一空穴缓冲子层的厚度为1-8nm，所述第二空穴缓冲子层的厚度为0.5-3nm。
  20. 根据权利要求16至19任一所述的量子点发光二极管，其特征在于，所述第二空穴缓冲材料包括TPBi、Bphen、TmPyPb、BCP和TAZ中的至少一种。
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