WO2020063590A1 - 一种复用电路及移动终端 - Google Patents

一种复用电路及移动终端 Download PDF

Info

Publication number
WO2020063590A1
WO2020063590A1 PCT/CN2019/107543 CN2019107543W WO2020063590A1 WO 2020063590 A1 WO2020063590 A1 WO 2020063590A1 CN 2019107543 W CN2019107543 W CN 2019107543W WO 2020063590 A1 WO2020063590 A1 WO 2020063590A1
Authority
WO
WIPO (PCT)
Prior art keywords
transistor
coupled
gate
voltage
terminal
Prior art date
Application number
PCT/CN2019/107543
Other languages
English (en)
French (fr)
Inventor
黄停
常智
邱钰鹏
Original Assignee
华为技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to RU2021105549A priority Critical patent/RU2761602C1/ru
Priority to US17/264,935 priority patent/US11445276B2/en
Priority to ES19866456T priority patent/ES2926981T3/es
Priority to EP19866456.7A priority patent/EP3812910B1/en
Publication of WO2020063590A1 publication Critical patent/WO2020063590A1/zh

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/16—Sound input; Sound output
    • G06F3/162—Interface to dedicated audio devices, e.g. audio drivers, interface to CODECs
    • G—PHYSICS
    • G10—MUSICAL INSTRUMENTS; ACOUSTICS
    • G10L—SPEECH ANALYSIS TECHNIQUES OR SPEECH SYNTHESIS; SPEECH RECOGNITION; SPEECH OR VOICE PROCESSING TECHNIQUES; SPEECH OR AUDIO CODING OR DECODING
    • G10L19/00—Speech or audio signals analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis
    • G10L19/008—Multichannel audio signal coding or decoding using interchannel correlation to reduce redundancy, e.g. joint-stereo, intensity-coding or matrixing
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00—Networks using active elements
    • H03H11/02—Multiple-port networks
    • H03H11/34—Networks for connecting several sources or loads working on different frequencies or frequency bands, to a common load or source
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04S—STEREOPHONIC SYSTEMS 
    • H04S1/00—Two-channel systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/034—Codec; PCM compression

Definitions

  • the present application relates to the field of electronic and communication technologies, and in particular, to a multiplexing circuit and a mobile terminal.
  • a plurality of switching switches need to be provided in a circuit coupled to the above interface in a mobile phone.
  • the circuit for transmitting data or charging voltage in the mobile phone can be electrically coupled with the pin on the interface through the multiple switching switches described above to connect external data
  • the charging voltage is supplied to the phone.
  • the circuit related to audio playback in the mobile phone can be electrically coupled with the pin on the interface to transmit the audio signal in the mobile phone to External headphones.
  • the above-mentioned switch is usually an integrated switch. The structure of the integrated switch is complicated, thereby increasing the cost of the product.
  • the present application provides a multiplexing circuit and a mobile terminal, which are used to solve the problem of higher product cost when a circuit coupled with an interface is used to switch an integrated switch in a mobile phone.
  • the multiplexing circuit includes a first switching circuit, a second switching circuit, and a third switching circuit.
  • the multiplexing circuit further includes a first signal transmission end, a second signal transmission end, a right channel transmission end, a left channel transmission end, a first output end, and a second output end.
  • the first switch circuit is coupled to the first signal transmission terminal and the right channel transmission terminal.
  • the first switch circuit is configured to receive the first voltage and transmit the right channel under the control of the first voltage.
  • the right channel audio signal provided by the terminal is transmitted to the first signal transmitting terminal.
  • the second switch circuit is coupled to the second signal transmission terminal and the left channel transmission terminal.
  • the second switch circuit is configured to receive the first voltage and control the left sound provided by the left channel transmission terminal under the control of the first voltage.
  • the channel audio signal is transmitted to the second signal transmitting end.
  • the third switch circuit is coupled to the first signal transmission terminal, the second signal transmission terminal, the first output terminal, and the second output terminal.
  • the third switch circuit is configured to receive the second voltage and control the second voltage. Next, the signal provided by the first signal transmission terminal is transmitted to the first output terminal, and the signal provided by the second signal transmission terminal is transmitted to the second output terminal.
  • the third switch circuit is configured to receive the second voltage, and under the control of the second voltage, transmit the signal provided by the first output terminal to the first signal transmission terminal, and transmit the signal provided by the second output terminal to the first Two signal transmission ends.
  • the third switch circuit when the third switch circuit is turned on, signal transmission between the first output terminal and the first signal transmission terminal, and signal transmission between the second output terminal and the second signal transmission terminal can be achieved.
  • the first switching circuit and the second switching circuit are turned on under the control of the first voltage.
  • the third switching circuit is turned off.
  • the right channel audio signal and the left channel audio signal in the mobile phone can be output to the earphone coupled to the external interface through the right channel transmission end and the left channel audio signal, respectively.
  • the third switch circuit when the mobile phone is coupled to the data line through the external interface, the third switch circuit is turned on under the control of the second voltage.
  • the above-mentioned first and second switching circuits are turned off. In this way, external data or charging voltage can be transmitted to the first output terminal and the second output terminal of the multiplexing circuit through a data line coupled to the external interface.
  • the third switch circuit when the third switch circuit is turned on, and the first switch circuit and the second switch circuit are turned off, the first output terminal and the second output terminal of the multiplexing circuit can pass data in the mobile terminal through The data line coupled to the external interface is passed to the external device coupled to the data line.
  • the external device may be a mobile storage device, a mobile phone, or a computer.
  • the first switching circuit includes a first transistor and a first constant voltage control circuit.
  • the gate of the first transistor is used to receive a first voltage
  • the first pole is coupled to the first signal transmission terminal
  • the second pole is coupled to the right channel transmission terminal.
  • the gate of the first transistor receives the first voltage, it is in a conducting state, so that the right channel transmitting end can transmit the right channel audio signal in the mobile phone to the first signal through the first transistor. Transmission end.
  • the first constant voltage control circuit is coupled to the gate and the second electrode of the first transistor, and the first constant voltage control circuit is used to load the right channel audio signal to the gate of the first transistor.
  • the gate of the first transistor also has a fluctuating right-channel audio signal
  • the voltage difference between the gate of the first transistor and the second electrode is a constant DC voltage, so that during the audio signal transmission process, Reduce the probability that the impedance of the first transistor changes, and increase the THD-N index.
  • the second switching circuit includes a second transistor and a second constant voltage control circuit. The gate of the second transistor is used to receive the first voltage, the first pole is coupled to the second signal transmission terminal, and the second pole is coupled to the left channel transmission terminal. In this case, when the gate of the second transistor receives the first voltage, it is in a conducting state, so that the left channel transmitting end can transmit the left channel audio signal in the mobile phone to the second signal through the second transistor. Transmission end.
  • the second constant voltage control circuit is coupled to the gate and the second pole of the second transistor, and the second constant voltage control circuit is used to load the left channel audio signal to the gate of the second transistor, so that the second transistor
  • the voltage difference between the gate and the second electrode is a constant DC voltage.
  • the first constant voltage control circuit includes a first capacitor.
  • One end of the first capacitor is coupled to the gate of the first transistor, and the other end is coupled to the second electrode of the first transistor.
  • the first capacitor has a characteristic of blocking AC and DC currents, so that the right channel audio signal on the right channel transmission end can be transmitted to the gate of the first transistor through the first capacitor.
  • the first voltage of the DC voltage cannot be transmitted to the right channel transmission end through the first capacitor.
  • the capacitance of the first capacitor is 4 ⁇ F to 10 ⁇ F.
  • the resistance of the capacitor is less than 4 ⁇ F, because the capacitance is small, the blocking effect on the DC voltage is poor, resulting in the audio signal on the right channel transmission end or the left channel transmission end having a larger noise.
  • the resistance of the capacitor is greater than 10 ⁇ F, the capacitor has good AC and DC resistance characteristics, but the size of the capacitor will be large, which will occupy a large wiring space on the mobile phone.
  • the first constant voltage control circuit further includes a first inductor.
  • One end of the first inductor is coupled to the gate of the first transistor, and the other end is coupled to the second electrode of the first transistor.
  • the first inductor is connected in parallel with the first capacitor.
  • the first inductor has a filtering function, so that when the audio signal at the right channel transmission end is loaded to the gate of the first transistor through the first constant voltage control circuit, noise on the gate of the first transistor is reduced.
  • the first switching circuit further includes a first resistor, one end of the first resistor is coupled to the gate of the first transistor, and the other end is used to receive the first voltage.
  • the first resistor can prevent the AC audio signal loaded on the gate of the first transistor, that is, the right-channel audio signal is transmitted to a power source for providing a first voltage, so that the phase difference with the power source is prevented. Influence of other circuit structures coupled.
  • the second constant voltage control circuit includes a second capacitor.
  • One end of the second capacitor is coupled to the gate of the second transistor, and the other end is coupled to the second electrode of the second transistor.
  • the technical effect of the first capacitor the technical effect of the second capacitor can be obtained in the same way, which is not repeated here.
  • the capacitance of the second capacitor is 4 ⁇ F to 10 ⁇ F. According to the technical effect of the capacitance value range of the first capacitor, the technical effect of the second capacitance value range can be obtained in the same way, and details are not described herein again.
  • the second constant voltage control circuit further includes a second inductor.
  • the first end of the second inductor is coupled to the gate of the second transistor, and the other end is coupled to the second electrode of the second transistor.
  • the technical effect of the first inductor the technical effect of the second inductor can be obtained in the same way, which will not be repeated here.
  • the second switch circuit further includes a second resistor, one end of the second resistor is coupled to the gate of the second transistor, and the other end is used to receive the first voltage.
  • the technical effect of the first resistor the technical effect of the second resistor can be obtained in the same way, which will not be repeated here.
  • the third switching circuit includes a third transistor and a fourth transistor.
  • the gate of the third transistor is used to receive the second voltage, the first pole is coupled to the first output terminal, and the second pole is coupled to the first signal transmission terminal.
  • the gate of the fourth transistor is used to receive the second voltage, the first pole is coupled to the second output terminal, and the second pole is coupled to the second signal transmission terminal.
  • the data line coupled to the external interface transmits external data or charging voltage to the first signal transmission terminal, and then to the first output terminal through the third transistor, and the above is coupled to the external interface.
  • the data line also transmits external data or charging voltage to the second signal transmission terminal, and then transmits it to the second output terminal through the fourth transistor.
  • the third switch circuit is further coupled to the right channel transmission end and the left channel transmission end.
  • the third switching circuit further includes a third capacitor and a fourth capacitor.
  • One end of the third capacitor is coupled to the gate of the third transistor, and the other end of the third capacitor is coupled to the right channel transmission end.
  • One end of the fourth capacitor is coupled to the gate of the fourth transistor, and the other end of the fourth capacitor is coupled to the left channel transmission end.
  • the right channel audio signal on the right channel transmission end is transmitted to the gate of the third transistor through the third capacitor.
  • the voltage difference between the gate of the third transistor and the second pole is zero, and the third transistor is still at The cut-off state prevents the first signal transmission end and the first output end from forming a signal path for transmitting external data or charging voltage when the mobile phone is plugged into the earphone.
  • the technical effect of the fourth capacitor can be obtained in the same way, which is not repeated here.
  • the third switch circuit further includes a third resistor, a fourth resistor, a fifth resistor, and a sixth resistor.
  • One end of the third resistor is used to receive the second voltage, and the other end is coupled to the gate of the third transistor.
  • One end of the fourth resistor is coupled to the gate of the third transistor, and the other end is grounded.
  • One end of the fifth resistor is used to receive the second voltage, and the other end is coupled to the gate of the fourth transistor.
  • One end of the sixth resistor is coupled to the gate of the fourth transistor, and the other end is grounded.
  • An aspect of the embodiments of the present application provides a mobile terminal including an external interface for coupling with an external device, a central processing unit, an audio codec, and any one of the multiplexing circuits described above.
  • the external interface includes D + pins and D- pins according to the Type-C interface protocol.
  • the first signal transmission end of the multiplexing circuit is coupled to the D + pin, the second signal transmission end is coupled to the D- pin, and the right channel transmission end and the left channel transmission end are coupled to the audio codec.
  • the audio decoder is also connected to the central processing unit.
  • the audio codec is used to decode the audio signal output from the central processing unit, and provide the right channel audio signal to the right channel transmission end and the left channel audio signal to the left channel transmission end.
  • first output terminal and the second output terminal of the multiplexing circuit are coupled to the central processing unit.
  • the multiplexing circuit is configured to pass the signals of the D + pin and the D- pin through the first output terminal and the second output terminal, respectively. Provided to the central processing unit.
  • the above mobile terminal has the same technical effect as the multiplexing circuit provided in the foregoing embodiment, and details are not described herein again.
  • the method includes: controlling the first switch by using a first voltage.
  • the circuit is turned on, the first switch circuit transmits the right channel audio signal provided by the right channel transmission terminal to the first signal transmission terminal, and loads the right channel audio signal to the gate of the first transistor in the first switch circuit;
  • the first voltage controls the second switch circuit to be turned on.
  • the second switch circuit transmits the left channel audio signal provided by the left channel transmission terminal to the second signal transmission terminal, and loads the left channel audio signal into the second switch circuit.
  • the gates of the two transistors; and the third switching circuit is turned off.
  • the above method includes: turning off the first switching circuit. And the second switch circuit; the third switch circuit is controlled to be turned on by the second voltage, and the third switch circuit transmits the signal provided by the first signal transmission terminal to the first output terminal, and transmits the signal provided by the second signal transmission terminal to the second The output terminal, or the third switching circuit transmits the signal provided by the first output terminal to the first signal transmission terminal, and transmits the signal provided by the second output terminal to the second signal transmission terminal.
  • the control method of the multiplexing circuit has the same technical effect as the multiplexing circuit provided in the foregoing embodiment, and details are not described herein again.
  • FIG. 1 is a schematic structural diagram of a multiplexing circuit provided by some embodiments of the present application.
  • FIG. 2 is a schematic structural diagram of another multiplexing circuit provided by some embodiments of the present application.
  • FIG. 3 is a schematic diagram of loading a right channel audio signal to the gate of the first transistor in FIG. 2;
  • FIG. 4 is a schematic structural diagram of another multiplexing circuit provided by some embodiments of the present application.
  • FIG. 5 is a schematic structural diagram of another multiplexing circuit provided by some embodiments of the present application.
  • FIG. 6 is a waveform diagram of a right channel audio signal and a left channel audio signal provided by some embodiments of the present application.
  • FIG. 7 is a schematic diagram showing a relationship between frequencies and level amplitudes of a right channel audio signal and a left channel audio signal provided by some embodiments of the present application;
  • FIG. 8 is a schematic structural diagram of a mobile terminal according to some embodiments of the present application.
  • FIG. 9 is a schematic structural diagram of an external interface according to some embodiments of the present application.
  • FIG. 10 is a flowchart of a working process of a terminal having a multiplexing circuit provided by some embodiments of the present application;
  • FIG. 11 is a flowchart of a working process of another terminal with a multiplexing circuit provided by some embodiments of the present application.
  • 100-multiplexing circuit 10- first switching circuit; 101- first constant voltage control circuit; 20- second switching circuit; 201- second constant voltage control circuit; 30- third switching circuit; 110- external interface; 112- central processing unit; 113- audio codec; 114- analog switch.
  • first”, “second”, etc. are used for descriptive purposes only and cannot be interpreted as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as “first”, “second”, etc. may explicitly or implicitly include one or more of the features.
  • the multiplexing circuit 100 includes: a first switching circuit 10, a second switching circuit 20, and a third switching circuit 30.
  • the multiplexing circuit 100 further includes a first signal transmission terminal ST1, a second signal transmission terminal ST2, a right channel transmission terminal HSR, a left channel transmission terminal HSL, a first output terminal OP1, and a second output terminal OP2.
  • the first switch circuit 10 is coupled to the first signal transmission terminal ST1 and the right channel transmission terminal HSR.
  • the first switch circuit 10 is configured to receive a first voltage V1 and transmit the right-channel audio signal provided by the right-channel transmission terminal HSR to the first signal transmission terminal ST1 under the control of the first voltage V1.
  • the second switch circuit 20 is coupled to the second signal transmission terminal ST2 and the left channel transmission terminal HSL.
  • the second switching circuit 20 is configured to receive the first voltage V1 and transmit the left channel audio signal provided by the left channel transmission end HSL to the second signal transmission end ST2 under the control of the first voltage V1.
  • the third switch circuit 30 is coupled to the first signal transmission terminal ST1, the second signal transmission terminal ST2, the first output terminal OP1, and the second output terminal OP2.
  • the third switching circuit 30 is configured to receive the second voltage V2 and transmit the signal provided by the first signal transmission terminal ST1 to the first output terminal OP1 under the control of the second voltage V2, and provide the second signal transmission terminal ST2. The signal is transmitted to the second output OP2.
  • the third switch circuit 30 is configured to receive the second voltage V2 and transmit the signal provided by the first output terminal OP1 to the first signal transmission terminal ST1 under the control of the second voltage V2, and provide the second output terminal OP2.
  • the signal is transmitted to the second signal transmission terminal ST2. Therefore, when the third switching circuit 30 is turned on, the signal transmission between the first signal transmission terminal ST1 and the first output terminal OP1, and the signal between the second signal transmission terminal ST2 and the second output terminal OP2 can be realized. transmission.
  • the mobile terminal having the multiplexing circuit 100 includes an external interface 110 (as shown in FIG. 8) for coupling with an external device.
  • the external interface 110 includes CC pins specified according to the Type-C interface protocol.
  • the CC pin can identify the type of an external device coupled to the Type-C interface.
  • a power source for example, a battery of a mobile phone
  • V1 a first voltage
  • the first switching circuit 10 and the second switching circuit 20 are turned on.
  • the third switching circuit 30 is turned off under the control of the second voltage V2. In this way, the right channel audio signal and the left channel audio signal in the mobile phone can be output to the earphone coupled to the external interface through the right channel transmission end HSR and the left channel audio signal HSL, respectively.
  • the CC pin recognizes that the external device coupled to the Type-C interface is not a headset, but another device coupled to the data line.
  • External devices such as chargers, mobile storage devices, mobile phones or computers.
  • a power source for example, a battery of a mobile phone or an external device
  • the third switching circuit 30 is turned on.
  • the first switching circuit 10 and the second switching circuit 20 are turned off.
  • first output terminal OP1 and the second output terminal OP2 of the multiplexing circuit 100 may transfer the data in the mobile terminal to the data line through a data line coupled to the Type-C interface of the mobile terminal.
  • the first voltage V1 provided by the power source can both control the first switch circuit 10 and the second switch circuit 20 to be turned on, and control the first switch circuit 10 and the first The two switch circuits 20 are turned off.
  • the first voltage V1 for controlling the opening of the first switching circuit 10 and the second switching circuit 20 is referred to as an effective first voltage V1; and the first voltage V1 for controlling the first switching circuit 10 and the second switching circuit 20 is used.
  • the closed first voltage V1 is referred to as an inactive first voltage V1.
  • the second voltage V2 used to control the third switching circuit 30 to be turned on is referred to as an effective second voltage V2; and the second voltage V2 used to control the third switching circuit 30 to be turned off is referred to as an ineffective second voltage V2.
  • the above-mentioned first switching circuit 10 includes a first transistor M1.
  • the gate (Gate, G) of the first transistor M1 is configured to receive the first voltage V1.
  • the first electrode for example, the drain
  • the second electrode for example, the source.
  • the gate of the first transistor M1 receives the first voltage V1, it is in a conducting state, so that the right channel transmission end HSR can transmit the right channel audio signal in the mobile phone through the first transistor M1. To the first signal transmission end ST1.
  • the audio signal is an AC signal
  • the audio signal is fluctuating, that is, the voltage applied to the second pole of the first transistor M1 is fluctuating, and the first voltage V1 for controlling the conduction of the first transistor M1 is described above.
  • the voltage difference Vgs between the gate of the first transistor M1 and the second electrode will change as the audio signal of the right channel fluctuates, so that the impedance of the first transistor M1 changes, which affects the audio frequency.
  • TDD-N Total Harmonic Distortion-Noise
  • the above-mentioned first switching circuit 10 further includes a first constant voltage control circuit 101.
  • the second switching circuit 20 includes a second transistor M2.
  • the gate of the second transistor M2 is used to receive the first voltage V1, the first pole is coupled to the second signal transmission terminal ST2, and the second pole is coupled to the left channel transmission terminal HSL.
  • the gate of the second transistor M2 receives the first voltage V1, it is in a conducting state, so that the left channel transmission end HSL can transmit the left channel audio signal in the mobile phone through the second transistor M2.
  • the second switching circuit 20 further includes a second constant voltage control circuit 201.
  • the second constant voltage control circuit 201 is coupled to the gate and the second pole of the second transistor M2.
  • the first transistor M1 and the second transistor M2 may be a metal-oxide-semiconductor (Metal-Oxide-Semiconductor) field effect transistor, a thin film transistor (Thin Film Transistor, TFT), or Triode, this application does not limit this.
  • Metal-Oxide-Semiconductor Metal-Oxide-Semiconductor
  • TFT Thin Film Transistor
  • the first pole of the transistor may be a source (S, S), a second pole (Drain, D), or a first pole and a second pole, and a source.
  • S source
  • D drain
  • D first pole and a second pole
  • a source a source
  • the following embodiments of the present application are described using the transistor as the NMOS transistor, the first electrode being the drain and the second electrode being the source.
  • a mobile phone may be provided with a DC power source, such as a battery of the mobile phone, for providing the first voltage V1 to the gate of the first transistor M1 and the gate of the second transistor M2.
  • a DC power source such as a battery of the mobile phone
  • the first transistor M1 and the second transistor M2 are N-type transistors as an example, when the CC pin in the Type-C interface of the mobile phone recognizes that the external device coupled to the Type-C interface is a headset, the The first transistor M1 and the second transistor M2 are turned on to achieve the purpose of turning on the first switching circuit 10 and the second switching circuit 20 respectively.
  • the DC voltage provided by the DC power source is a constant high level (ie, the valid first voltage V1); and when the CC in the Type-C interface of the mobile phone
  • the first transistor needs to be M1 and the second transistor M2 are turned off to achieve the purpose of turning off the first switching circuit 10 and the second switching circuit 20 respectively.
  • the first voltage V1 provided by the DC power source according to the identification result of the CC pin is a constant low level (that is, the invalid first voltage V1).
  • the structures of the first constant voltage control circuit 101 and the second constant voltage control circuit 201 described above are exemplified in detail below.
  • the first constant voltage control circuit 101 includes a first capacitor C1. One end of the first capacitor C1 is coupled to the gate of the first transistor M1, and the other end is coupled to the second electrode of the first transistor M2.
  • the AC signal on the right channel transmission end HSR that is, the right channel audio signal
  • the first DC voltage V1 cannot be transmitted to the right channel transmission terminal HSR through the first capacitor C1.
  • the second constant voltage control circuit 201 includes a second capacitor C2.
  • One end of the second capacitor C2 is coupled to the gate of the second transistor M2, and the other end is coupled to the second pole of the second transistor M2.
  • the first DC voltage V2 cannot be transmitted to the left channel transmission terminal HSL through the second capacitor C2.
  • the capacitance values of the first capacitor C1 and the second capacitor C2 may be 4 ⁇ F to 10 ⁇ F.
  • the resistance of the capacitor is less than 4 ⁇ F, because the capacitance is small, the blocking effect on the DC voltage is poor, resulting in a large noise on the audio signal on the right channel transmission end HSR or the left channel transmission end HSL.
  • the resistance of the capacitor is greater than 10 ⁇ F, the capacitor has good AC and DC resistance characteristics, but because the size of the capacitor is large, it will occupy a large wiring space on the mobile phone.
  • the capacitance values of the first capacitor C1 and the second capacitor C2 may be 4.5 ⁇ F, 4.7 ⁇ F, 5 ⁇ F, 7 ⁇ F, or the like.
  • the structures of the first constant voltage control circuit 101 and the second constant voltage control circuit 201 further include an inductor.
  • the first constant voltage control circuit 101 further includes a first inductor L1.
  • One end of the first inductor L1 is coupled to the gate of the first transistor M1, and the other end is coupled to the second electrode of the first transistor M1.
  • the first inductor L1 is connected in parallel with the first capacitor C1.
  • the first inductor L1 has a filtering function, so that when the audio signal of the right channel transmission end HSR is loaded to the gate of the first transistor M1 through the first constant voltage control circuit 101, the gate of the first transistor M1 can be reduced. On the noise.
  • the structure of the first constant voltage control circuit 101 shown in FIG. 5 is smaller than the structure of the first constant voltage control circuit 101 shown in FIG. 4, so the right channel transmission end HSR
  • the frequency of the right channel audio signal transmitted on the channel may be higher, for example, 10 Hz to 20 Hz.
  • the second constant voltage control circuit 201 further includes a second inductor L2.
  • the first end of the second inductor L2 is coupled to the gate of the second transistor M2, and the other end is coupled to the second electrode of the second transistor M2.
  • the second inductor L2 is connected in parallel with the second capacitor C2.
  • the second inductor L2 has a filtering function, so that when the audio signal of the left channel transmission end HSL is loaded to the gate of the second transistor M2 through the second constant voltage control circuit 201, the gate of the second transistor M2 is reduced. On the noise.
  • the structure of the second constant voltage control circuit 201 shown in FIG. 5 is smaller than the structure of the second constant voltage control circuit 201 shown in FIG. 4, so the left channel transmission end HSL
  • the frequency of the left channel audio signal transmitted on the channel may be higher, for example, between 10 Hz and 20 Hz.
  • a transistor such as the first transistor M1 in the first switching circuit 10 can transmit the right channel audio signal provided by the right channel transmitting end HSR to the first channel when the first transistor M1 is turned on.
  • a first capacitor C1 is coupled between the gate and the second electrode of the first transistor M1, or a parallel connection is coupled. The first capacitor C1 and the first inductor L1.
  • the AC right channel audio signal is loaded to the gate of the first transistor M1 through the first capacitor C1, so that the voltage difference Vgs between the gate of the first transistor M1 and the second electrode is a fixed value, reducing the first The probability that the impedance of the transistor M1 changes as the right channel audio signal fluctuates.
  • the first switching circuit 10 provided in the foregoing embodiments of the present application has fewer transistors, a simpler structure, and is beneficial to reducing the cost of the product.
  • the impedance change of the first switching circuit 10 can be effectively reduced.
  • the above-mentioned first switch circuit further includes a first resistor R1, one end of the first resistor R1 is coupled to the gate of the first transistor M1, and the other end is connected to the The power supply for providing the first voltage V1 is coupled to receive the first voltage V1.
  • the first resistor R1 can prevent the AC audio signal loaded on the gate of the first transistor M1, that is, the right channel audio signal is transmitted to the power supply for providing the first voltage V1, so as to This circuit is affected by other circuit structures.
  • the second switching circuit 20 further includes a second resistor R2.
  • One end of the second resistor R2 is coupled to the gate of the second transistor M2, and the other end is coupled to the first resistor V1.
  • the power source is coupled to receive the first voltage V1.
  • the second resistor R2 can prevent the AC audio signal loaded on the gate of the second transistor M2, that is, the right channel audio signal is transmitted to the power supply for providing the first voltage V1, so as to counteract This circuit is affected by other circuit structures.
  • the configuration of the third switch circuit 30 will be described below.
  • the third switching circuit 30 includes a third transistor M3 and a fourth transistor M4.
  • the gate of the third transistor M3 is used to receive the second voltage V2, the first pole is coupled to the first output terminal OP1, and the second pole is coupled to the first signal transmission terminal ST1.
  • the gate of the fourth transistor M4 is used to receive the second voltage V2, the first pole is coupled to the second output terminal OP2, and the second pole is coupled to the second signal transmission terminal ST2.
  • a mobile terminal having the above multiplexing circuit 100 such as a mobile phone
  • an external interface such as a Type_C interface
  • the first transistor M1 and the first transistor M1 are controlled by the first voltage V1.
  • the second transistor M2 is turned off.
  • the third transistor M3 and the fourth transistor M4 are turned on.
  • the data line coupled to the external interface transmits external data or charging voltage to the first signal transmission terminal ST1, and then the third transistor M3 to the first output terminal OP1, and the above-mentioned interface with the external interface
  • the coupled data lines also transmit external data or charging voltage to the second signal transmission terminal ST2, and then to the second output terminal OP2 through the fourth transistor M4.
  • the first output terminal OP1 of the multiplexing circuit 100 may transmit the data in the mobile terminal to the first signal transmitting terminal ST1 through the third transistor M3, and the second output terminal OP2 of the multiplexing circuit 100 may transmit the mobile terminal The data in is transmitted to the second signal transmission terminal ST2 through the fourth transistor M4.
  • the data line coupled to the external interface receives the data in the mobile terminal and transfers the data to the external device coupled to the data line.
  • the third transistor M3 and fourth transistor M4 are turned off to achieve the purpose of turning off the third switching circuit 30.
  • the second voltage V2 provided by the DC power source for example, a battery of a mobile phone or an external device
  • the recognition result of the CC pin is a constant low level (that is, the above-mentioned invalid second voltage V2).
  • the CC pin in the Type-C interface of the mobile phone recognizes that the external device coupled to the Type-C interface is not a headset, but other external devices coupled to the data line, such as chargers, mobile storage devices, and mobile phones
  • the third transistor M3 and the fourth transistor M4 need to be turned on to achieve the purpose of turning on the third switch circuit 30.
  • the second voltage V2 provided by the DC power source according to the identification result of the CC pin is a constant high level (ie, the valid second voltage V2).
  • the second voltage V2 when the second voltage V2 is at a high level, the second voltage V2 may be provided by an external device coupled to the Type_C interface.
  • the second voltage V2 when the Type_C interface is coupled to a charger, the second voltage V2 is provided by the charger, and the charger is the DC power source; for example, when the Type_C interface is coupled to a mobile storage device (for example, a U disk, a mobile hard disk) ), The battery of the mobile phone will supply power to the storage device.
  • the storage device can provide the second voltage V2 to the gates of the third transistor M3 and the fourth transistor M4. At this time, the storage device is the DC power source.
  • the second voltage V2 may be powered by the battery of the mobile phone. In this case, the battery of the mobile phone is the DC power.
  • one of the circuit structures related to the above-mentioned two power supply modes of the second voltage V2 may be selected.
  • the circuit structures related to the above two power supply modes are set, but during use, the circuit structure of only one power supply mode can be used to form the second voltage V2 through a gating switch. Power supply path.
  • the third switch circuit 30 further includes a third resistor R3 and a fourth resistor R4.
  • One end of the third resistor R3 is used to receive the second voltage V2, and the other end is coupled to the gate of the third transistor M3.
  • One end of the fourth resistor R4 is coupled to the gate of the third transistor M3, and the other end is grounded. In this way, by setting the resistance values of the third resistor R3 and the fourth resistor R4, the third resistor R3 and the fourth resistor R4 can divide the second voltage V2 to reduce the gate of the third transistor M3 On the voltage.
  • the third switch circuit 30 further includes a fifth resistor R5 and a sixth resistor R6.
  • One end of the fifth resistor R5 is used to receive the second voltage V2, and the other end is coupled to the gate of the fourth transistor M4.
  • One end of the sixth resistor R6 is coupled to the gate of the fourth transistor M4, and the other end is grounded. In this way, by setting the resistance values of the fifth resistor R5 and the sixth resistor R6, the fifth resistor R5 and the sixth resistor R6 can divide the second voltage V2 to reduce the gate of the fourth transistor M4. On the voltage.
  • the circuit powered by the charger or the system can be disconnected from the gates of the third transistor M3 and the fourth transistor M4.
  • the gate voltages of the third transistor M3 and the fourth transistor M4 are pulled down by the fourth resistor R4 and the sixth resistor R3 grounded at one end, respectively.
  • the second voltage V2 is low, and the third transistor M3 and the third transistor M3 are low.
  • the four transistor M4 is turned off.
  • the third transistor M3 and the fourth transistor M4 can be turned off, and The first transistor M1 and the second transistor M2 are turned on.
  • the negative voltages of the right channel audio signal of the first signal transmission terminal ST1 and the left channel audio signal of the second signal transmission terminal ST2 are respectively transmitted.
  • the structure of the third switch circuit 30 is further coupled to the right channel transmission end HSR and the left channel transmission end HSL as shown in FIG. 4.
  • the third switching circuit 30 further includes a third capacitor C3.
  • One end of the third capacitor C3 is coupled to the gate of the third transistor M3, and the other end of the third capacitor C3 is coupled to the right channel transmission terminal HSR.
  • the right channel audio signal on the right channel transmission end HSR is transmitted to the gate of the third transistor M3 through the third capacitor C3.
  • the third switch circuit 30 further includes a fourth capacitor C4.
  • One end of the fourth capacitor C4 is coupled to the gate of the fourth transistor M4.
  • the other end of the fourth capacitor C4 is in phase with the left channel transmission terminal HSL. Coupling.
  • the left channel audio signal on the left channel transmission end HSL is transmitted to the gate of the fourth transistor M4 through the fourth capacitor C4.
  • the above is the signal transmission between the first signal transmission terminal ST1 and the first output terminal OP1 through the third transistor M3, and the signal transmission between the second signal transmission terminal ST2 and the second output terminal OP2 through the fourth transistor M4.
  • an integrated switch composed of an NMOS tube and a PMOS tube may be used instead of the third transistor M3 and the fourth transistor M4.
  • the parameters of some components in FIG. 4 are shown in Table 1.
  • the test result is shown in FIG. 7.
  • the resistance of the third resistor R3 and the fifth resistor R5 can be selected as 2k ⁇ .
  • the resistance values of the third resistor R3 and the fifth resistor R5 can be selected to be 1 k ⁇ .
  • the waveforms of the right channel audio signal provided by the right channel transmission end HSR and the left channel audio signal provided by the left channel transmission end HSL overlap.
  • the frequency of the right channel audio signal (indicated by a dashed line) and the left channel audio signal (indicated by a solid line) is 1kHZ
  • the amplitude of the waveform of the right channel audio signal and the left channel audio signal is the largest. The sound source hears the loudest.
  • the THD index measured at this time is about 92db, and the audio quality is good.
  • an external interface such as a Type-C interface
  • the multiplexing circuit 100 provided in the present application not only has a simple structure and a low cost, but also has a high THD index, which can ensure high audio quality during the audio transmission process.
  • the first transistor M1, the second transistor M2, the third transistor M3, and Fourth crystal M4 when the multiplexing circuit 100 is manufactured, the first transistor M1, the second transistor M2, the third transistor M3, and Fourth crystal M4.
  • the mobile terminal includes an external interface 110 (Type-C interface) and a central processing unit 112 (Central Processing Unit) for coupling with external devices.
  • CPU Central Processing Unit
  • audio codec 113 audio codec 113
  • the external interface includes D + pins and D- pins as shown in FIG. 9 according to the Type-C interface protocol.
  • the first signal transmission end ST1 of the multiplexing circuit 100 is coupled to the D + pin, the second signal transmission end ST2 is coupled to the D- pin, the right channel transmission end HSR, the left channel transmission end HSL and audio
  • the codec 113 is coupled.
  • the audio decoder 103 is connected to the central processing unit 112 through the Serial Low-power Inter-chip Media Bus (SLIMbus) and the Inter-Integrated Circuit (I 2 C) bus. Coupling.
  • SLIMbus Serial Low-power Inter-chip Media Bus
  • I 2 C Inter-Integrated Circuit
  • the headset When the external device is a headset, the headset is coupled to the D + pin and the D- pin of the Type-C interface. at this time.
  • the audio codec 113 can decode the audio signal output from the central processing unit 112, and provide the right channel audio signal to the right channel transmission end HSR and the left channel audio signal to the left channel transmission end HSL.
  • the first transistor M1 and the second transistor M2 in the multiplexing circuit 100 are turned on; the third transistor M3 and the fourth transistor M4 are turned off.
  • the right channel transmission end HSR and the left channel transmission end HSL respectively transmit the right channel audio signal and the left channel audio signal to the D + pin and the D- pin through the first transistor M1 and the second transistor M2, so that the user The above-mentioned audio signals can be received through headphones.
  • the first output terminal OP1 and the second output terminal OP2 of the multiplexing circuit 100 are coupled to the central processing unit 112.
  • the external device is a non-headphone device such as a charger, a mobile phone, a computer, a tablet computer, a car device, or a mobile storage device
  • the external device is coupled to the D + pin and D- pin of the Type-C interface.
  • the third transistor M3 and the fourth transistor M4 are turned on; the first transistor M1 and the second transistor M2 are turned off.
  • the signals of the D + pin and D- pin are transmitted to the first output terminal OP1 and the second output terminal OP2 through the third transistor M3 and the fourth transistor M4, respectively, and then the first output terminal OP1 and the second output terminal OP2 It is provided to the central processing unit 112, thereby realizing the transmission of charging voltage or external data.
  • the first output terminal OP1 of the multiplexing circuit 100 may transmit the data in the central processing unit 112 of the mobile terminal to the D + pin and the D- pin through the third transistor M3 and the fourth transistor M4, respectively.
  • the data line coupled to the Type-C interface transmits the data to the external device coupled to the data line.
  • the microphone (Microphone, MIC) on the headset is coupled to the SBU1 pin in the Type-C interface, and the ground terminal on the headset is connected to the SBU2 in the Type-C interface.
  • the feet are coupled.
  • the signal of the MIC terminal on the headset can be transmitted to the audio codec 113, and then encoded and processed by the audio codec 113, and then transmitted to the central processing unit.
  • the SBU1 pin and SBU2 pin in the Type-C interface are located on the A and B sides of the Type-C interface, in this case, when the headset is inserted into the Type- In the C interface, the MIC terminal on the headset is coupled to the SBU1 pin, the ground terminal is coupled to the SBU2 pin, and the signal at the MIC terminal can be normally input to the audio codec 113.
  • the above-mentioned mobile terminal further includes an analog switch 114 through which the coupling mode of the SBU1 pin, SBU2 pin and the headset can be switched, so that whether the headset is used in the forward or reverse direction can be guaranteed.
  • the MIC terminal on the headset is coupled to the SBU1 pin, and the ground terminal is coupled to the SBU2 pin.
  • the CC pin set on the Type-C interface can identify the type of the external device coupled to the Type-C interface.
  • identifying the external device as a headset enable the signal path for transmitting audio in the multiplexing circuit 100; or when identifying the external device as a non-headphone device such as a charger, mobile phone, computer, or mobile storage device, enable the multiplexing circuit 100 Signal path for transmitting charging voltage or external data.
  • the mobile terminal may include a mobile phone, a tablet computer, a Personal Digital Assistant (PDA), an on-board computer, and the like.
  • PDA Personal Digital Assistant
  • the embodiment of the present application does not specifically limit the specific form of the mobile terminal.
  • description is made by taking a mobile terminal as a mobile phone as an example.
  • the foregoing mobile terminal has the same technical effect as the multiplexing circuit 100 provided in the foregoing embodiment, and details are not described herein again.
  • Some embodiments of the present application provide a working process of a terminal having any one of the multiplexing circuits 100 described above.
  • the terminal has the above-mentioned external interface, such as a Type-C interface, and the Type-C includes a CC pin.
  • the above working process includes S101-S105.
  • the CC pin identifies the type of an external device coupled to the Type-C interface, and recognizes that the external device coupled to the Type-C interface is a headset.
  • the power supply in the terminal provides a valid first voltage V1 to the first switching circuit 10 and the second switching circuit 20, and supplies an invalid second voltage V2 to the third switching circuit 30.
  • the terminal controls the first switch circuit 10 to be turned on by the effective first voltage V1.
  • the first switch circuit 10 transmits the right channel audio signal provided by the right channel transmission end HSR to the first signal transmission end ST1, and transmits the right sound.
  • the track audio signal is applied to the gate of the first transistor M1 in the first switching circuit 10.
  • the first transistor M1 when the first voltage V1 is at a high level, the first transistor M1 is turned on, and the right channel audio signal provided by the right channel transmission terminal HSR is transmitted to the first signal transmission terminal ST1 through the first transistor M1.
  • the terminal controls the second switch circuit 20 to be turned on by the effective first voltage V1.
  • the second switch circuit 20 transmits the left channel audio signal provided by the left channel transmission end HSL to the second signal transmission terminal ST2, and transmits the left sound
  • the track audio signal is applied to the gate of the second transistor M2 in the second switching circuit 20.
  • the left channel audio signal provided by the left channel transmission end HSL is transmitted to the second signal transmission through the second transistor M2. ⁇ ST2.
  • the terminal controls the third switch circuit 30 to be turned off by using the invalid second voltage V2.
  • the second voltage V2 is at a low level, and the third transistor M3 and the fourth transistor M4 in the third switching circuit 30 are turned off.
  • FIG. 11 when the terminal is coupled to an external device through a data line, and the terminal receives a charging voltage or transmits external data through the multiplexing circuit 100, the above working process includes S201 to S204.
  • S201 and CC pins identify the type of the external device coupled to the Type-C interface, and recognize that the external device coupled to the Type-C interface is not a headset, but other external devices coupled to the data line.
  • Devices such as chargers, mobile storage devices, mobile phones or computers.
  • the power supply in the terminal supplies the invalid first voltage V1 to the first switching circuit 10 and the second switching circuit 20, and provides the valid second voltage V2 to the third switching circuit 30.
  • the terminal controls the first switch circuit 10 and the second switch circuit 20 to be turned off by using the invalid first voltage V1.
  • the first voltage V1 is at a low level
  • the first transistor M1 in the first switching circuit 10 is turned off
  • the second transistor M2 in the second switching circuit 20 is turned off.
  • the terminal controls the third switch circuit 30 to be turned on by the effective second voltage V2.
  • the third switch circuit 30 transmits the signal provided by the first signal transmission terminal ST1 to the first output terminal OP1, and transmits the signal provided by the second signal transmission terminal ST2. The signal is transmitted to the second output terminal OP2.
  • the second voltage V2 is at a high level
  • the third transistor M3 is turned on, and a signal provided by the first signal transmission terminal ST1 is transmitted to the first output terminal OP1 through the third transistor M3.
  • the fourth transistor M4 is turned on, and a signal provided by the second signal transmission terminal ST2 is transmitted to the second output terminal OP2 through the fourth transistor M4.
  • the terminal may be a computer, a smart TV, a vehicle-mounted device, or the like.
  • the above mobile terminal such as a mobile phone, a tablet computer, and the like.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Audiology, Speech & Language Pathology (AREA)
  • Acoustics & Sound (AREA)
  • Signal Processing (AREA)
  • Health & Medical Sciences (AREA)
  • Multimedia (AREA)
  • Human Computer Interaction (AREA)
  • Computer Hardware Design (AREA)
  • Computational Linguistics (AREA)
  • General Health & Medical Sciences (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Telephone Function (AREA)
  • Amplifiers (AREA)
  • Electronic Switches (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Abstract

本申请实施例提供一种复用电路及移动终端，涉及电子及通信技术领域，用于解决在手机采用集成开关时，产品成本较高的问题。该复用电路中，第一开关电路将右声道传输端提供的右声道音频信号传输至第一信号传输端。第二开关电路将左声道传输端提供的左声道音频信号传输至第二信号传输端。通过第三开关电路实现第一信号传输端与第一输出端之间的信号传输，以及第二信号传输端与第二输出端之间的信号传输。第一开关电路包括第一晶体管和第一恒压控制电路，第一恒压控制电路将右声道音频信号加载至第一晶体管的栅极。第二开关电路包括第二晶体管和第二恒压控制电路，第二恒压控制电路将左声道音频信号加载至第二晶体管的栅极。

Description

一种复用电路及移动终端 技术领域
本申请涉及电子及通信技术领域，尤其涉及一种复用电路及移动终端。
背景技术
随着电子产品便携性能要求的逐渐提升，一些移动终端，例如手机上用于与外部设备相耦接的接口需要具备较高的兼容性。为了满足兼容性，手机中与上述接口相耦接的电路中需要设置多个切换开关。这样一来，当接口与数据线相耦接时，通过上述多个切换开关，可以使得手机中用于传输数据或充电电压的电路能够与该接口上的引脚电耦接，以将外界数据或充电电压提供至手机内。或者，当该接口与耳机相耦接时，通过上述多个切换开关，又可以使得开关手机中与音频播放相关的电路与接口上的引脚电耦接，以将手机中的音频信号传输至外部的耳机中。上述切换开关通常采用集成开关，该集成开关的结构复杂，从而增加了产品的成本。
发明内容
本申请提供一种复用电路及移动终端，用于解决在手机中采用集成开关切换与接口相耦接的电路时，产品成本较高的问题。
为达到上述目的，本申请采用如下技术方案：
本申请实施例的一方面，提供一种复用电路。该复用电路包括：第一开关电路、第二开关电路、第三开关电路。此外，上述复用电路还包括第一信号传输端、第二信号传输端、右声道传输端、左声道传输端、第一输出端以及第二输出端。在此情况下，第一开关电路与第一信号传输端和右声道传输端相耦接，第一开关电路用于接收第一电压，并在第一电压的控制下，将右声道传输端提供的右声道音频信号传输至第一信号传输端。第二开关电路与第二信号传输端和左声道传输端相耦接，第二开关电路用于接收第一电压，并在第一电压的控制下，将左声道传输端提供的左声道音频信号传输至第二信号传输端。此外，第三开关电路与第一信号传输端、第二信号传输端、第一输出端以及第二输出端相耦接，第三开关电路用于接收第二电压，并在第二电压的控制下，将第一信号传输端提供的信号传输至第一输出端，将第二信号传输端提供的信号传输至第二输出端。或者，第三开关电路用于接收第二电压，并在该第二电压的控制下，将第一输出端提供的信号传输至第一信号传输端，将第二输出端提供的信号传输至第二信号传输端。因此，当第三开关电路开启时，可以实现第一输出端与第一信号传输端之间的信号传输，以及第二输出端与第二信号传输端之间的信号传输。这样一来，具有上述复用电路的移动终端，通过一外接接口与耳机相耦接时，在第一电压的控制下，开启上述第一开关电路和第二开关电路。此外，将第三开关电路关闭。此时，可以将手机中的右声道音频信号和左声道音频信号分别通过右声道传输端和左声道音频信号输出至与上述外接接口相耦接的耳机中。或者，上述手机通过上述外接接口与数据线相耦接时，在第二 电压的控制下，开启第三开关电路。此外，关闭上述第一开关电路和第二开关电路。这样一来，外界数据或者充电电压可以通过与该外接接口相耦接的数据线，传递至上述复用电路的第一输出端和第二输出端。或者，在第三开关电路开启，第一开关电路和第二开关电路关闭的情况下，复用电路的第一输出端和第二输出端可以将移动终端中的数据，通过与该移动终端的外接接口耦接的数据线，传递至与该数据线耦接的外接设备。该外接设备可以是移动存储设备、手机或电脑等。在此基础上，第一开关电路包括第一晶体管和第一恒压控制电路。该第一晶体管的栅极用于接收第一电压，第一极与第一信号传输端相耦接，第二极与右声道传输端相耦接。在此情况下，当第一晶体管的栅极接收到第一电压后，处于导通状态，从而可以使得右声道传输端将手机中的右声道音频信号通过第一晶体管传输至第一信号传输端。此外，第一恒压控制电路与第一晶体管的栅极和第二极相耦接，第一恒压控制电路用于将右声道音频信号加载至第一晶体管的栅极。这样一来，第一晶体管的栅极也具有波动的右声道音频信号，第一晶体管的栅极与第二极之间的压差为恒定的直流电压，从而可以在音频信号传输过程中，降低第一晶体管阻抗发生变化的几率，提升THD-N指标。同理，第二开关电路包括第二晶体管和第二恒压控制电路。第二晶体管的栅极用于接收第一电压，第一极与第二信号传输端相耦接，第二极与左声道传输端相耦接。在此情况下，当第二晶体管的栅极接收到第一电压后，处于导通状态，从而可以使得左声道传输端将手机中的左声道音频信号通过第二晶体管传输至第二信号传输端。此外，第二恒压控制电路与第二晶体管的栅极和第二极相耦接，第二恒压控制电路用于将左声道音频信号加载至第二晶体管的栅极，使得第二晶体管的栅极与第二极之间的压差为恒定的直流电压。
可选的，第一恒压控制电路包括第一电容。第一电容的一端与第一晶体管的栅极相耦接，另一端与第一晶体管的第二极相耦接。第一电容具有通交流阻直流的特性，可以使得右声道传输端上的右声道音频信号，通过该第一电容传输至第一晶体管的栅极。此外，直流电压第一电压无法通过第一电容传输至右声道传输端。
可选的，第一电容的电容值为4μF～10μF。当上述电容的阻值小于4μF时，由于电容值较小，因此对直流电压的阻隔效果较差，导致右声道传输端或者左声道传输端上的音频信号具有较大的噪声。当上述电容的阻值大于10μF时，上述电容很好的通交流阻直流的特性，但是上述电容的尺寸会很大，从而会占用手机上较大的布线空间。
可选的，第一恒压控制电路还包括第一电感，第一电感的一端与第一晶体管的栅极相耦接，另一端与第一晶体管的第二极相耦接。第一电感与第一电容并联。第一电感具有滤波的作用，从而能够在将右声道传输端的音频信号通过第一恒压控制电路加载至第一晶体管的栅极时，减小第一晶体管的栅极上的噪声。
可选的，第一开关电路还包括第一电阻，第一电阻的一端与第一晶体管的栅极相耦接，另一端用于接收第一电压。在此情况下，通过上述第一电阻能够防止加载至第一晶体管栅极的交流音频信号，即上述右声道音频信号会传输至用于提供第一电压的电源上，从而对与该电源相耦接的其他电路结构影响。
可选的，第二恒压控制电路包括第二电容。该第二电容的一端与第二晶体管的栅极相耦接，另一端与第二晶体管的第二极相耦接。根据第一电容的技术效果，同理可以获得第二电容的技术效果，此处不再赘述。
可选的，第二电容的电容值为4μF～10μF。根据第一电容的电容取值范围的技术效果，同理可以获得第二电容取值范围的技术效果，此处不再赘述。
可选的，第二恒压控制电路还包括第二电感。第二电感的第一端与第二晶体管的栅极相耦接，另一端与第二晶体管的第二极相耦接。根据第一电感的技术效果，同理可以获得第二电感的技术效果，此处不再赘述。
可选的，第二开关电路还包括第二电阻，第二电阻的一端与第二晶体管的栅极相耦接，另一端用于接收第一电压。根据第一电阻的技术效果，同理可以获得第二电阻的技术效果，此处不再赘述。
可选的，第三开关电路包括第三晶体管和第四晶体管。第三晶体管的栅极用于接收第二电压，第一极与第一输出端相耦接，第二极与第一信号传输端相耦接。第四晶体管的栅极用于接收第二电压，第一极与第二输出端相耦接，第二极与第二信号传输端相耦接。在此情况下，当具有上述复用电路的移动终端通过一外接接口与数据线相耦接时，在第一电压的控制下，使得第一晶体管和第二晶体管截止。此外，在第二电压的控制下，导通上述第三晶体管和第四晶体管。这样一来，与该外接接口相耦接的数据线将外界数据或者充电电压传输至第一信号传输端，再通过第三晶体管，传输至第一输出端，且上述与该外接接口相耦接的数据线将外界数据或者充电电压还传输至第二信号传输端，再通过第四晶体管，传输至第二输出端。
可选的，第三开关电路还与右声道传输端和左声道传输端相耦接。第三开关电路还包括第三电容和第四电容。第三电容的一端与第三晶体管的栅极相耦接，第三电容的另一端与右声道传输端相耦接。第四电容的一端与第四晶体管的栅极相耦接，第四电容的另一端与左声道传输端相耦接。在此情况下，右声道传输端上的右声道音频信号会通过第三电容传输至第三晶体管的栅极。此时，当传递至第一信号传输端的右声道音频信号施加至第三晶体管的第二极时，该第三晶体管的栅极和第二极的电压差为零，该第三晶体管仍然处于截止状态，避免在手机***耳机时，第一信号传输端与第一输出端形成用于传输外界数据或者充电电压的信号通路。根据第三电容的技术效果，同理可以获得第四电容的技术效果，此处不再赘述。
可选的，第三开关电路还包括第三电阻、第四电阻、第五电阻以及第六电阻。第三电阻的一端用于接收第二电压，另一端与第三晶体管的栅极相耦接。第四电阻的一端与第三晶体管的栅极相耦接，另一端接地。第五电阻的一端用于接收第二电压，另一端与第四晶体管的栅极相耦接。第六电阻的一端与第四晶体管的栅极相耦接，另一端接地。通过对第三电阻和第四电阻的电阻值进行设置，使得第三电阻和第四电阻可以对第二电压进行分压，以减小第三晶体管栅极上的电压。此外，通过对第五电阻以及第六电阻的电阻值进行设置，使得第五电阻以及第六电阻可以对第二电压进行分压，以减小第四晶体管栅极上的电压。
本申请实施例的一方面，提供一种移动终端，包括用于与外接设备相耦接的外接接口、中央处理器、音频编解码器，以及如上述所述的任意一种复用电路。该外接接口包括根据Type-C接口协议规定的D+引脚、D-引脚。复用电路的第一信号传输端与D+引脚相耦接，第二信号传输端与D-引脚相耦接，右声道传输端、左声道传输端与音频编解码器相耦接。音频解码器还与中央处理器相连。该音频编解码器用于对中央处理器输 出的音频信号进行解码，并将右声道音频信号提供至右声道传输端，将左声道音频信号提供至左声道传输端。此外，复用电路的第一输出端、第二输出端与中央处理器相耦接，复用电路用于将D+引脚以及D-引脚的信号分别通过第一输出端和第二输出端提供至中央处理器。上述移动终端具有与前述实施例提供的复用电路相同的技术效果，此处不再赘述。
本申请实施例的又一方面，提供一种如上所述的任意一种复用电路的控制方法，当该复用电路用于传输音频信号时，该方法包括：通过第一电压控制第一开关电路开启，第一开关电路将右声道传输端提供的右声道音频信号传输至第一信号传输端，并将右声道音频信号加载至第一开关电路中第一晶体管的栅极；通过第一电压控制第二开关电路开启，第二开关电路将左声道传输端提供的左声道音频信号传输至第二信号传输端，并将左声道音频信号加载至第二开关电路中第二晶体管的栅极；并且关闭第三开关电路。
本申请实施例的又一方面，提供一种如上所述的任意一种复用电路的控制方法，当该复用电路用于传输充电电压或外界数据时，上述方法包括：关闭第一开关电路和第二开关电路；通过第二电压控制第三开关电路开启，第三开关电路将第一信号传输端提供的信号传输至第一输出端，将第二信号传输端提供的信号传输至第二输出端，或者，第三开关电路将第一输出端提供的信号传输至第一信号传输端，将第二输出端提供的信号传输至第二信号传输端。上述复用电路的控制方法具有与前述实施例提供的复用电路相同的技术效果，此处不再赘述。
附图说明
图1为本申请的一些实施例提供的一种复用电路的结构示意图；
图2为本申请的一些实施例提供的另一种复用电路的结构示意图；
图3为右声道音频信号加载至图2中第一晶体管栅极的示意图；
图4为本申请的一些实施例提供的另一种复用电路的结构示意图；
图5为本申请的一些实施例提供的另一种复用电路的结构示意图；
图6为本申请的一些实施例提供的右声道音频信号和左声道音频信号的波形图；
图7为本申请的一些实施例提供的右声道音频信号和左声道音频信号的频率与电平幅值的关系示意图；
图8为本申请的一些实施例提供的一种移动终端的结构示意图；
图9为本申请的一些实施例提供的一种外接接口的结构示意图；
图10为本申请的一些实施例提供的一种具有复用电路的终端的工作过程流程图；
图11为本申请的一些实施例提供的另一种具有复用电路的终端的工作过程流程图。
附图标记：
100-复用电路；10-第一开关电路；101-第一恒压控制电路；20-第二开关电路；201-第二恒压控制电路；30-第三开关电路；110-外接接口；112-中央处理器；113-音频编解码器；114-模拟切换开关。
具体实施方式
以下，术语“第一”、“第二”等仅用于描述目的，而不能理解为指示或暗示相对重要 性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”等的特征可以明示或者隐含地包括一个或者更多个该特征。
本申请的一些实施例提供一种复用电路100，如图1所示，该复用电路100包括：第一开关电路10、第二开关电路20、第三开关电路30。
此外，上述复用电路100还包括第一信号传输端ST1、第二信号传输端ST2、右声道传输端HSR、左声道传输端HSL、第一输出端OP1以及第二输出端OP2。
第一开关电路10与第一信号传输端ST1和右声道传输端HSR相耦接。该第一开关电路10用于接收第一电压V1，并在第一电压V1的控制下，将右声道传输端HSR提供的右声道音频信号传输至第一信号传输端ST1。
第二开关电路20与第二信号传输端ST2和左声道传输端HSL相耦接。第二开关电路20用于接收上述第一电压V1，并在第一电压V1的控制下，将左声道传输端HSL提供的左声道音频信号传输至第二信号传输端ST2。
第三开关电路30与第一信号传输端ST1、第二信号传输端ST2、第一输出端OP1以及第二输出端OP2相耦接。该第三开关电路30用于接收第二电压V2，并在第二电压V2的控制下，将第一信号传输端ST1提供的信号传输至第一输出端OP1，将第二信号传输端ST2提供的信号传输至第二输出端OP2。或者，第三开关电路30用于接收第二电压V2，并在第二电压V2的控制下，将第一输出端OP1提供的信号传输至第一信号传输端ST1，将第二输出端OP2提供的信号传输至第二信号传输端ST2。因此，在第三开关电路30开启的情况下，可以实现第一信号传输端ST1与第一输出端OP1之间的信号传输，以及第二信号传输端ST2与第二输出端OP2之间的信号传输。
此外，具有上述复用电路100的移动终端，包括用于与外接设备相耦接的外接接口110(如图8所示)。该外接接口110包括根据Type-C接口协议规定的CC引脚。CC引脚可以对与该Type-C接口相耦接的外部设备的类型进行识别。
在此情况下，具有上述复用电路100的移动终端，例如手机通过Type_C接口与耳机相耦接时，上述CC引脚识可以别出与该Type-C接口相耦接的外部设备为耳机。此时，一电源(例如，手机的电池)可以根据CC引脚的识别结果，向第一开关电路10和第二开关电路20提供第一电压V1，并向第三开关电路30提供第二电压V2。在第一电压V1的控制下，开启上述第一开关电路10和第二开关电路20。并且，在第二电压V2的控制下，将第三开关电路30关闭。这样一来，可以将手机中的右声道音频信号和左声道音频信号分别通过右声道传输端HSR和左声道音频信号HSL输出至与上述外接接口相耦接的耳机中。
或者，上述移动终端，例如手机通过上述外接接口与数据线相耦接时，上述CC引脚识别出与该Type-C接口相耦接的外部设备不是耳机，而是与数据线耦接的其他外部设备，例如充电器、移动存储设备、手机或电脑等。此时，一电源(例如，手机的电池或者外部设备)可以根据CC引脚的识别结果，向第三开关电路30提供第二电压V2，并向第一开关电路10和第二开关电路20提供第一电压V1。在第二电压V2的控制下，开启第三开关电路30。并且，在第一电压V1的控制下，关闭上述第一开关电路10和第二开关电路20。这样一来，外界数据或者充电电压可以通过与该外接接口相耦接的数据线，传递至上述复用电路100的第一输出端OP1和第二输出端OP2。或者，复用电 路100的第一输出端OP1和第二输出端OP2可以将移动终端中的数据，通过与该移动终端的Type-C接口耦接的数据线，传递至与该数据线耦接的上述外接设备。
需要说明的是，由上述可知，上述电源(例如手机的电池)提供的第一电压V1，既可以控制第一开关电路10和第二开关电路20开启，又可以控制第一开关电路10和第二开关电路20关闭。为了方便说明，将用于控制第一开关电路10和第二开关电路20开启的第一电压V1称为有效的第一电压V1；而将用于控制第一开关电路10和第二开关电路20关闭的第一电压V1称为无效的第一电压V1。同理，将用于控制第三开关电路30开启的第二电压V2称为有效的第二电压V2；而将用于控制第三开关电路30关闭的第二电压V2称为无效的第二电压V2。
此外，如图2所示，上述第一开关电路10包括第一晶体管M1。
该第一晶体管M1的栅极(Gate，G)用于接收上述第一电压V1，第一极(例如，漏极)与第一信号传输端ST1相耦接，第二极(例如，源极)与右声道传输端HSR相耦接。
在此情况下，当第一晶体管M1的栅极接收到第一电压V1后，处于导通状态，从而可以使得右声道传输端HSR将手机中的右声道音频信号通过第一晶体管M1传输至第一信号传输端ST1。
基于此，由于音频信号为交流信号，因此音频信号是波动的，即加载在第一晶体管M1的第二极的电压是波动的，而上述用于控制第一晶体管M1导通的第一电压V1为直流电压，例如3V。这样一来，第一晶体管M1栅极和第二极之间的压差Vgs会随着右声道音频信号的波动而发生变化，从而使得第一晶体管M1的阻抗发生变化，进而影响到音频的总谐波失真-噪声(Total Harmonic Distortion-Noise，THD-N)指标。
为了解决上述问题，如图2所示，上述第一开关电路10还包括第一恒压控制电路101。
上述第一恒压控制电路101与第一晶体管M1的栅极和第二极相耦接。如图3所示，该恒压控制电路101用于将右声道音频信号(图中以正弦波表示)加载至第一晶体管M1的栅极。在此情况下，第一晶体管M1的栅极也具有波动的右声道音频信号，这样一来，第一晶体管M1的栅极与第二极之间的压差Vgs＝V1＝3V，为恒定的直流电压，从而可以在音频信号传输过程中，降低第一晶体管M1阻抗发生变化的几率，提升THD-N指标。
此外，如图2所示，第二开关电路20包括第二晶体管M2。
第二晶体管M2的栅极用于接收上述第一电压V1，第一极与第二信号传输端ST2相耦接，第二极与左声道传输端HSL相耦接。在此情况下，当第二晶体管M2的栅极接收到第一电压V1后，处于导通状态，从而可以使得左声道传输端HSL将手机中的左声道音频信号通过第二晶体管M2传输至第二信号传输端ST2。
同理，为了减低第二晶体管M2的阻抗发生变化的几率，该第二开关电路20还包括第二恒压控制电路201。
该第二恒压控制电路201与第二晶体管M2的栅极和第二极相耦接，恒压控制电路201用于将左声道音频信号加载至第二晶体管M2的栅极，使得第二晶体管M2的栅极与第二极之间的压差Vgs＝V1＝3V，为恒定的直流电压。
需要说明的是，本申请实施例中，上述第一晶体管M1、第二晶体管M2可以为金属-氧化物-半导体(Metal-Oxide-Semiconductor)场效应晶体管、薄膜晶体管(Thin Film Transistor，TFT)或者三极管，本申请对此不做限定。
本申请实施例中，晶体管的第一极可以为源极(Source，S)，第二极为漏极(Drain，D)，或者第一极为漏极，第二极为源极。为了方便说明，本申请以下实施例均是以晶体管为NMOS管，第一极为漏极，第二极为源极为例进行的说明。
此外，在手机中可以设置一直流电源，例如手机的电池，用于向第一晶体管M1的栅极以第二晶体管M2的栅极提供上述第一电压V1。
以上述第一晶体管M1和第二晶体管M2为N型晶体管为例，当手机的Type-C接口中的CC引脚识别出与该Type-C接口相耦接的外部设备为耳机时，需要将第一晶体管M1和第二晶体管M2导通，以达到分别开启第一开关电路10和第二开关电路20的目的。在此情况下，上述直流电源根据CC引脚的识别结果，提供的第一电压V1为恒定的高电平(即上述有效的第一电压V1)；而当手机的Type-C接口中的CC引脚识别出与该Type-C接口相耦接的外部设备不是耳机，而是与数据线耦接的其他外部设备，例如充电器、移动存储设备、手机或电脑等时，需要将第一晶体管M1和第二晶体管M2截止，以达到分别关闭第一开关电路10和第二开关电路20的目的。在此情况下，上述直流电源根据CC引脚的识别结果，提供的第一电压V1为恒定的低电平(即上述无效的第一电压V1)。
以下对上述第一恒压控制电路101和第二恒压控制电路201的结构进行详细的举例说明。
在本申请的一些实施例中，如图4所示，上述第一恒压控制电路101包括第一电容C1。该第一电容C1的一端与第一晶体管M1的栅极相耦接，另一端与第一晶体管M2的第二极相耦接。
在此情况下，利用第一电容C1具有的通交流阻直流的特性，可以使得右声道传输端HSR上的交流信号，即右声道音频信号，通过该第一电容C1传输至第一晶体管M1的栅极，以使得第一晶体管M1的栅极与第二极之间的压差Vgs＝V1。此外，直流电压第一电压V1无法通过第一电容C1传输至右声道传输端HSR。
同理，如图4所示，上述第二恒压控制电路201包括第二电容C2。该第二电容C2的一端与第二晶体管M2的栅极相耦接，另一端与第二晶体管M2的第二极相耦接。
在此情况下，利用第二电容C2具有的通交流阻直流的特性，可以使得左声道传输端HSL上的左声道音频信号，通过该第二电容C2传输至第二晶体管M2的栅极，以使得第二晶体管M2的栅极与第二极之间的压差Vgs＝V1。此外，直流电压第一电压V2无法通过第二电容C2传输至左声道传输端HSL。
在本申请的一些实施例中，上述第一电容C1、第二电容C2的电容值可以为4μF～10μF。当上述电容的阻值小于4μF时，由于电容值较小，因此对直流电压的阻隔效果较差，导致右声道传输端HSR或者左声道传输端HSL上的音频信号具有较大的噪声。当上述电容的阻值大于10μF时，上述电容很好的通交流阻直流的特性，但是由于上述电容的尺寸较大，从而会占用手机上较大的布线空间。
在本申请的一些实施例中，上述第一电容C1、第二电容C2的电容值可以为4.5μF、 4.7μF、5μF、7μF等。
此外，在本申请的一些实施例中，上述第一恒压控制电路101和第二恒压控制电路201的结构中还包括电感。如图5所示，该第一恒压控制电路101还包括第一电感L1。该第一电感L1的一端与第一晶体管M1的栅极相耦接，另一端与第一晶体管M1的第二极相耦接。此时，第一电感L1与第一电容C1并联。第一电感L1具有滤波的作用，从而在将右声道传输端HSR的音频信号通过第一恒压控制电路101加载至第一晶体管M1的栅极时，能够减小第一晶体管M1的栅极上的噪声。
在此情况下，图5所示的第一恒压控制电路101的结构，相对于图4所示的第一恒压控制电路101的结构而言，噪声更小，因此右声道传输端HSR上传输的右声道音频信号的频率可以更高，例如在10Hz～20Hz。
同理，如图5所示，第二恒压控制电路201还包括第二电感L2。该第二电感L2的第一端与第二晶体管M2的栅极相耦接，另一端与第二晶体管M2的第二极相耦接。此时，第二电感L2与第二电容C2并联。第二电感L2具有滤波的作用，从而能够在将左声道传输端HSL的音频信号通过第二恒压控制电路201加载至第二晶体管M2的栅极时，减小第二晶体管M2的栅极上的噪声。
在此情况下，图5所示的第二恒压控制电路201的结构，相对于图4所示的第二恒压控制电路201的结构而言，噪声更小，因此左声道传输端HSL上传输的左声道音频信号的频率可以更高，例如在10Hz～20Hz。
综上所述，第一开关电路10中通过一个晶体管，例如第一晶体管M1，就可以在该第一晶体管M1导通时，将右声道传输端HSR提供的右声道音频信号传输至第一信号传输端ST1。且为了避免第一晶体管M1收到右声道音频信号波动的影响而出现阻抗变化，在该第一晶体管M1的栅极和第二极之间耦接有第一电容C1，或者耦接有并联的第一电容C1和第一电感L1。从而通过第一电容C1将交流电右声道音频信号加载至第一晶体管M1的栅极，以使得第一晶体管M1栅极和第二极之间的压差Vgs为一固定值，减小第一晶体管M1的阻抗随着右声道音频信号波动而变化的几率。
基于此，对于采用集成开关的方案而言，为了在传输音频信号的过程中，避免该集成开关的阻抗出现变化，通常在该集成开关中至少设置一对相互耦接的NMOS管和PMOS管。其中，NMOS管会随着音频信号的波动增加，而阻抗增大，PMOS管会随着音频信号的波动减小，而阻抗减小。这样一来，通过对NMOS管和PMOS管阻抗变化进行叠加，以减小集成开关阻抗出现变化的几率。本申请上述实施例提供的第一开关电路10相对于集成开关而言，晶体管的数量更少，结构更加简单有利于降低产品的成本，且能够有效减小第一开关电路10阻抗的变化。
此外，第二开关电路20的技术效果同上所述，此处不再赘述。
在本申请的一些实施例中，如图4所示，上述第一开关电路还包括第一电阻R1，该第一电阻R1的一端与第一晶体管M1的栅极相耦接，另一端与用于提供第一电压V1的电源相耦接，以接收该第一电压V1。在此情况下，通过上述第一电阻R1能够防止加载至第一晶体管M1栅极的交流音频信号，即上述右声道音频信号会传输至用于提供第一电压V1的电源上，从而对与该电源相耦接的其他电路结构影响。
同理，如图4所示，第二开关电路20还包括第二电阻R2，第二电阻R2的一端与 第二晶体管M2的栅极相耦接，另一端与用于提供第一电压V1的电源相耦接，以接收该第一电压V1。在此情况下，通过上述第二电阻R2能够防止加载至第二晶体管M2栅极的交流音频信号，即上述右声道音频信号会传输至用于提供第一电压V1的电源上，从而对与该电源相耦接的其他电路结构影响。
以下对上述第三开关电路30的结构进行说明。
在本申请的一些实施例中，如图4所示，上述第三开关电路30包括第三晶体管M3和第四晶体管M4。
该第三晶体管M3的栅极用于接收第二电压V2，第一极与第一输出端OP1相耦接，第二极与第一信号传输端ST1相耦接。
第四晶体管M4的栅极用于接收第二电压V2，第一极与第二输出端OP2相耦接，第二极与第二信号传输端ST2相耦接。
在此情况下，当具有上述复用电路100的移动终端，例如手机通过一外接接口(例如Type_C接口)与数据线相耦接时，在第一电压V1的控制下，使得第一晶体管M1和第二晶体管M2截止。此外，在第二电压V2的控制下，导通上述第三晶体管M3和第四晶体管M4。这样一来，与该外接接口相耦接的数据线将外界数据或者充电电压传输至第一信号传输端ST1，再通过第三晶体管M3，传输至第一输出端OP1，且上述与该外接接口相耦接的数据线将外界数据或者充电电压还传输至第二信号传输端ST2，再通过第四晶体管M4，传输至第二输出端OP2。或者，复用电路100的第一输出端OP1可以将移动终端中的数据，通过第三晶体管M3，传输至第一信号传输端ST1，且复用电路100的第二输出端OP2可以将移动终端中的数据，通过第四晶体管M4，传输至第二信号传输端ST2。从而使得与该外接接口相耦接的数据线接收到移动终端中的数据，并传递至与该数据线耦接的上述外接设备中。
以上述第三晶体管M3和第四晶体管M4为N型晶体管为例，当手机的Type-C接口中的CC引脚识别出与该Type-C接口相耦接的外部设备为耳机时，需要将上述第三晶体管M3和第四晶体管M4截止，以达到关闭上述第三开关电路30的目的。在此情况下，通过一直流电源(例如，手机的电池或者外部设备)根据CC引脚的识别结果，提供的第二电压V2为恒定的低电平(即上述无效的第二电压V2)。
当手机的Type-C接口中的CC引脚识别出与该Type-C接口相耦接的外部设备不是耳机，而是与数据线耦接的其他外部设备，例如充电器、移动存储设备、手机或电脑等时，需要将上述第三晶体管M3和第四晶体管M4导通，以达到开启上述第三开关电路30的目的。在此情况下，上述直流电源根据CC引脚的识别结果，提供的第二电压V2为恒定的高电平(即上述有效的第二电压V2)。
基于此，当上述第二电压V2为高电平时，该第二电压V2可以由与上述Type_C接口相耦接的外部设备提供。例如，当上述Type_C接口耦接充电器时，上述第二电压V2由充电器提供，该充电器为上述直流电源；又例如，当上述Type_C接口耦接移动存储设备(例如，U盘、移动硬盘)时，手机的电池会向上述存储设备供电，在此情况下，上述存储设备能够向第三晶体管M3和第四晶体管M4的栅极提供上述第二电压V2，此时存储设备为上述直流电源。或者，上述第二电压V2可以由手机电池进行***供电，此时该手机的电池为上述直流电源。
基于此，在本申请提供的复用电路100中，与上述两种第二电压V2的供电方式相关的电路结构可以择其一进行设置。或者，在该复用电路100中将与上述两种供电方式相关的电路结构均设置，但在使用过程中，可以通过选通开关，只选用一种供电方式的电路结构形成第二电压V2高电平时的供电通路。
此外，当第二电压V2为高电平时，无论采用充电器供电还是***供电的方式向第三晶体管M3和第四晶体管M4提供第二电压V2，为了避免第二电压V2的电压值较大，从而对第三晶体管M3和第四晶体管M4产生不良影响，如图4所示，第三开关电路30还包括第三电阻R3、第四电阻R4。
第三电阻R3的一端用于接收第二电压V2，另一端与第三晶体管M3的栅极相耦接。第四电阻R4的一端与第三晶体管M3的栅极相耦接，另一端接地。这样一来，通过对第三电阻R3和第四电阻R4的电阻值进行设置，使得第三电阻R3和第四电阻R4可以对第二电压V2进行分压，以减小第三晶体管M3栅极上的电压。
同理，第三开关电路30还包括第五电阻R5以及第六电阻R6。
第五电阻R5的一端用于接收第二电压V2，另一端与第四晶体管M4的栅极相耦接。第六电阻R6的一端与第四晶体管M4的栅极相耦接，另一端接地。这样一来，通过对第五电阻R5以及第六电阻R6的电阻值进行设置，使得第五电阻R5以及第六电阻R6可以对第二电压V2进行分压，以减小第四晶体管M4栅极上的电压。
在此情况下，当需要将第三晶体管M3和第四晶体管M4截止时，可以将充电器供电或***供电的电路与第三晶体管M3和第四晶体管M4的栅极断开，在此情况下，通过一端接地的第四电阻R4和第六电阻R3，分别将第三晶体管M3和第四晶体管M4的栅极电压拉低，此时第二电压V2为低电平，第三晶体管M3和第四晶体管M4截止。
基于此，以图4所示的结构为例，由上述可知，当具有上述复用电路100的手机通过Type_C接口与耳机相耦接时，可以将第三晶体管M3和第四晶体管M4截止，而将第一晶体管M1和第二晶体管M2导通。此时，通过右声道传输端HSR和左声道传输端HSL，分别传递至第一信号传输端ST1的右声道音频信号和第二信号传输端ST2的左声道音频信号的负向电压，分别施加至第三晶体管M3和第四晶体管M4的第二极(S)，会使得第三晶体管M3和第四晶体管M4的栅极和第二极之间具有压差，从而将原本截止的第三晶体管M3和第四晶体管M4导通，进而使得右声道音频信号、左声道音频信号分别通过第三晶体管M3和第四晶体管M4输出至第一输出端OP1和第二输出端OP2，对与该第一输出端OP1和第二输出端OP2耦接的其他电路结构造成损伤。
为了解决上述问题，上述第三开关电路30的结构，如图4所示，还与右声道传输端HSR和左声道传输端HSL相耦接。
在此情况下，该第三开关电路30还包括第三电容C3。
第三电容C3的一端与第三晶体管M3的栅极相耦接，第三电容C3的另一端与右声道传输端HSR相耦接。在此情况下，右声道传输端HSR上的右声道音频信号会通过第三电容C3传输至第三晶体管M3的栅极。此时，当传递至第一信号传输端ST1的右声道音频信号施加至第三晶体管M3的第二极(S)时，该第三晶体管M3的栅极和第二极的电压差Vgs＝0，该第三晶体管M3仍然处于截止状态，避免在手机***耳机时，第一信号传输端ST1与第一输出端OP1形成用于传输外界数据或者充电电压的信号通路。
同理，该第三开关电路30还包括第四电容C4，该第四电容C4的一端与第四晶体管M4的栅极相耦接，第四电容C4的另一端与左声道传输端HSL相耦接。在此情况下，左声道传输端HSL上的左声道音频信号会通过第四电容C4传输至第四晶体管M4的栅极。此时，当传递至第二信号传输端ST2的左声道音频信号施加至第四晶体管M4的第二极(S)时，该第四晶体管M4的栅极和第二极的电压差Vgs＝0，该第四晶体管M4仍然处于截止状态，避免在手机***耳机时，第二信号传输端ST2与第二输出端OP2形成用于传输外界数据或者充电电压的信号通路。
上述是以通过第三晶体管M3实现第一信号传输端ST1与第一输出端OP1之间的信号传输，通过第四晶体管M4实现第二信号传输端ST2与第二输出端OP2之间的信号传输为例进行的说明。在本申请的另一些实施例中，在布线空间以及产品成本允许的情况下，可以采用由NMOS管和PMOS管构成的集成开关代替上述第三晶体管M3和第四晶体管M4。
以图4所示的结构为例，该图4中部分元件的参数如表1所示。在此情况下，当采用如图6所示的音频信号对上述复用电路100的THD指标进行测试后，测试结果如图7所示。
表1
电阻 参数 电容 参数
R1 2kΩ C1 4.7μF
R2 2kΩ C2 4.7μF
R3 2kΩ或1kΩ C3 4.7μF
R4 1kΩ C4 4.7μF
R5 2kΩ或1kΩ    
R6 1kΩ    
需要说明的是，当采用外部设备(例如充电器)向第三晶体管M3和第四晶体管M4的栅极提供第二电压V2(为高电平)时，考虑到充电器提供的电压较高，第三电阻R3和第五电阻R5的阻值可以选取2kΩ。当采用***供电的方式向第三晶体管M3和第四晶体管M4的栅极提供第二电压V2(为高电平)时，第三电阻R3和第五电阻R5的阻值可以选取1kΩ。
在THD指标测试的过程中，如图6所示，右声道传输端HSR提供的右声道音频信号和左声道传输端HSL提供的左声道音频信号的波形重叠。如图7所示，右声道音频信号(采用虚线标示)和左声道音频信号(采用实线标示)的频率为1kHZ时，右声道音频信号以及左声道音频信号波形的幅度最大，人耳听到的音源的声音最大。此时测得的THD指标在92db左右，音频质量较好。
此外，与上述复用电路100相耦接的外接接口，例如Type-C接口，进行眼图测试后，获得的眼图较为集中，因此与上述复用电路100相耦接的外接接口的信号传输效果良好。所以，本申请提供的复用电路100不仅结构简单，成本较低，同时具有较高的THD指标，能够在音频传输的过程中，确保音频具有较高的质量。为了进一步提高与上述复用电路100相耦接的外接接口的信号传输效果，在制作复用电路100时，可以选择寄生电容较小的第一晶体管M1、第二晶体管M2、第三晶体管M3以及第四晶体M4。
本申请的一些实施例，提供一种移动终端，如图8所示，该移动终端包括用于与外接设备相耦接的外接接口110(Type-C接口)、中央处理器112(Central Processing Unit，CPU)、音频编解码器113，以及如上所述的任意一种复用电路100。
上述外接接口包括根据Type-C接口协议规定的，如图9所示的D+引脚、D-引脚。
上述复用电路100的第一信号传输端ST1与D+引脚相耦接，第二信号传输端ST2与D-引脚相耦接，右声道传输端HSR、左声道传输端HSL与音频编解码器113相耦接。
音频解码器103通过串行低功耗芯片内部媒体总线(The Serial Low-power Inter-chip Media Bus，SLIMbus)以及内部集成电路((Inter-Integrated Circuit，I 2C)总线与中央处理器112相耦接。
当外接设备为耳机时，该耳机与Type-C接口的D+引脚、D-引脚相耦接。此时。音频编解码器113可以对中央处理器112输出的音频信号进行解码，并将右声道音频信号提供至右声道传输端HSR，将左声道音频信号提供至左声道传输端HSL。
此时，复用电路100中第一晶体管M1、第二晶体管M2导通；第三晶体管M3和第四晶体管M4截止。右声道传输端HSR、左声道传输端HSL分别通过第一晶体管M1和第二晶体管M2将右声道音频信号、左声道音频信号分别传输至D+引脚和D-引脚，使得用户通过耳机能够接收到上述音频信号。
此外，复用电路100的第一输出端OP1、第二输出端OP2与中央处理器112相耦接。当外接设备为充电器、手机、电脑、平板电脑、车载设备或者移动存储设备等非耳机设备时，该外接设备与Type-C接口的D+引脚、D-引脚相耦接。
此时。该复用电路100中第三晶体管M3和第四晶体管M4导通；第一晶体管M1、第二晶体管M2截止。D+引脚以及D-引脚的信号，分别通过第三晶体管M3和第四晶体管M4传输至，第一输出端OP1和第二输出端OP2，再由第一输出端OP1和第二输出端OP2提供至中央处理器112，从而实现充电电压或外界数据的传输。或者，复用电路100的第一输出端OP1可以将移动终端的中央处理器112中的数据，分别通过第三晶体管M3、第四晶体管M4传输至D+引脚以及D-引脚。此时，与该Type-C接口相耦接的数据线，在接收到中央处理器112中的数据后，将该数据传递至与该数据线耦接的上述外接设备中。
此外，当耳机与Type-C接口耦接时，耳机上的麦克风(Microphone，MIC)与Type-C接口中的SBU1引脚相耦接，耳机上的接地端与Type-C接口中的SBU2引脚相耦接。耳机上的MIC端的信号能够传输至音频编解码器113，然后经过音频编解码器113的编码处理后，传输至中央处理器。
此外，由于Type-C接口中SBU1引脚和SBU2引脚分别位于Type-C接口的A面和B面，在此情况下，当耳机采用正插(与A面电耦接)方式***Type-C接口时，耳机上的MIC端与SBU1引脚相耦接，接地端与SBU2引脚相耦接，MIC端的信号能够正常输入至音频编解码器113。
然而，当耳机采用反插(与B面电耦接)方式***Type-C接口时，耳机上的MIC端与SBU2引脚相耦接，接地端与SBU1引脚相耦接，MIC端的信号无法正常输入至音频编解码器113。因此，上述移动终端还包括模拟切换开关114，通过该模拟切换开关114可以对SBU1引脚、SBU2引脚与耳机的耦接方式进行切换，使得无论耳机采用正 或反插的方式，均能够保证耳机上的MIC端与SBU1引脚相耦接，接地端与SBU2引脚相耦接。
此外，Type-C接口上设置的CC引脚可以对与该Type-C接口相耦接的外部设备的类型进行识别。当识别外部设备为耳机时，开启复用电路100中用于传输音频的信号通路；或者，当识别外部设备为充电器、手机、电脑或者移动存储设备等非耳机设备时，开启复用电路100中用于传输充电电压或外界数据的信号通路。
需要说明的是，该移动终端可以包括手机、平板电脑、个人数字助理(Personal Digital Assistant，PDA)、车载电脑等。本申请实施例对上述移动终端的具体形式不做特殊限制。本申请实施例为了方便说明均是以移动终端为手机为例进行的说明。此外，上述移动终端具有与前述实施例提供的复用电路100相同的技术效果，此处不再赘述。
本申请的一些实施例提供一种具有如上所述的任意一种复用电路100的终端的工作过程。该终端具有上述外接接口，例如Type-C接口，且该Type-C包括CC引脚。如图10所示，当该复用电路100用于传输音频信号时，上述工作过程包括S101～S105。
S101、CC引脚对与该Type-C接口相耦接的外部设备的类型进行识别，并识别出与该Type-C接口相耦接的外部设备为耳机。
S102、终端中的电源向第一开关电路10和第二开关电路20提供有效的第一电压V1，并向第三开关电路30提供无效的第二电压V2。
S103、终端通过有效的第一电压V1控制第一开关电路10开启，第一开关电路10将右声道传输端HSR提供的右声道音频信号传输至第一信号传输端ST1，并将右声道音频信号加载至第一开关电路10中第一晶体管M1的栅极。
如图4所示，当第一电压V1为高电平时，第一晶体管M1导通，右声道传输端HSR提供的右声道音频信号通过第一晶体管M1传输至第一信号传输端ST1。此外，该右声道传输端HSR提供的右声道音频信号还可以通过第一电容C1加载至第一晶体管M1的栅极，从而使得第一晶体管M1栅极和第二极的电压差Vgs＝V1，为一恒定的直流电压，使得第一晶体管M1在传输音频信号的过程中，减小其阻抗发生变化的几率。
S104、终端通过有效的第一电压V1控制第二开关电路20开启，第二开关电路20将左声道传输端HSL提供的左声道音频信号传输至第二信号传输端ST2，并将左声道音频信号加载至第二开关电路20中第二晶体管M2的栅极。
同理，如图4所示，当第一电压V1为高电平时，第二晶体管M2导通，左声道传输端HSL提供的左声道音频信号通过第二晶体管M2传输至第二信号传输端ST2。此外，该左声道传输端HSL提供的左声道音频信号还可以通过第二电容C2加载至第二晶体管M2的栅极，从而使得第二晶体管M2栅极和第二极的电压差Vgs＝V1，为一恒定的直流电压，使得第二晶体管M2在传输音频信号的过程中，减小其阻抗发生变化的几率。
S105、终端通过无效的第二电压V2控制第三开关电路30关闭。
如图4所示，第二电压V2为低电平，该第三开关电路30中的第三晶体管M3和第四晶体管M4截止。
本申请的另一些实施例提供一种具有如上所述的任意一种复用电路100的终端的工作过程。该终端具有上述外接接口，例如Type-C接口，且该Type-C包括CC引脚。如图11所示，当上述终端通过数据线与外接设备相耦接，该终端通过复用电路100接收 充电电压或传输外界数据时，上述工作过程包括S201～S204。
S201、CC引脚对与该Type-C接口相耦接的外部设备的类型进行识别，并识别出与Type-C接口相耦接的外部设备不是耳机，而是与数据线耦接的其他外部设备，例如充电器、移动存储设备、手机或电脑等。
S202、终端中的电源向第一开关电路10和第二开关电路20提供无效的第一电压V1，并向第三开关电路30提供有效的第二电压V2。
S203、终端通过无效的第一电压V1控制第一开关电路10和第二开关电路20关闭。
如图4所示，第一电压V1为低电平，第一开关电路10中的第一晶体管M1截止，第二开关电路20中的第二晶体管M2截止。
S204、终端通过有效的第二电压V2控制第三开关电路30开启，第三开关电路30将第一信号传输端ST1提供的信号传输至第一输出端OP1，将第二信号传输端ST2提供的信号传输至第二输出端OP2。
如图4所示，第二电压V2为高电平，第三晶体管M3导通，第一信号传输端ST1提供的信号通过第三晶体管M3传输至第一输出端OP1。此外，第四晶体管M4导通，第二信号传输端ST2提供的信号通过第四晶体管M4传输至第二输出端OP2。
需要说明的是，上述终端可以为电脑、智能电视、车载设备等。或者上述移动终端，例如手机、平板电脑等。
以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何在本申请揭露的技术范围内的变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以所述权利要求的保护范围为准。

Claims (13)

  1. 一种复用电路，其特征在于，包括：第一开关电路、第二开关电路、第三开关电路；所述复用电路还包括第一信号传输端、第二信号传输端、右声道传输端、左声道传输端、第一输出端以及第二输出端；
    所述第一开关电路与所述第一信号传输端和所述右声道传输端相耦接，所述第一开关电路用于接收第一电压，并在所述第一电压的控制下，将所述右声道传输端提供的右声道音频信号传输至所述第一信号传输端；
    所述第二开关电路与所述第二信号传输端和所述左声道传输端相耦接，所述第二开关电路用于接收所述第一电压，并在所述第一电压的控制下，将所述左声道传输端提供的左声道音频信号传输至所述第二信号传输端；
    所述第三开关电路与所述第一信号传输端、所述第二信号传输端、第一输出端以及第二输出端相耦接，所述第三开关电路用于接收第二电压，并在所述第二电压的控制下，将所述第一信号传输端提供的信号传输至所述第一输出端，将所述第二信号传输端提供的信号传输至所述第二输出端，或者所述第三开关电路用于接收所述第二电压，并在所述第二电压的控制下，将所述第一输出端提供的信号传输至所述第一信号传输端，将所述第二输出端提供的信号传输至所述第二信号传输端；
    所述第一开关电路包括第一晶体管和第一恒压控制电路；
    所述第一晶体管的栅极用于接收所述第一电压，第一极与所述第一信号传输端相耦接，第二极与所述右声道传输端相耦接；
    所述第一恒压控制电路与所述第一晶体管的栅极和第二极相耦接，所述第一恒压控制电路用于将所述右声道音频信号加载至所述第一晶体管的栅极；
    所述第二开关电路包括第二晶体管和第二恒压控制电路；
    所述第二晶体管的栅极用于接收所述第一电压，第一极与所述第二信号传输端相耦接，第二极与所述左声道传输端相耦接；
    所述第二恒压控制电路与所述第二晶体管的栅极和第二极相耦接，所述第二恒压控制电路用于将所述左声道音频信号加载至所述第二晶体管的栅极。
  2. 根据权利要求1所述的复用电路，其特征在于，所述第一恒压控制电路包括第一电容；所述第一电容的一端与所述第一晶体管的栅极相耦接，另一端与所述第一晶体管的第二极相耦接。
  3. 根据权利要求2所述的复用电路，其特征在于，所述第一电容的电容值为4μF～10μF。
  4. 根据权利要求2所述的复用电路，其特征在于，所述第一恒压控制电路还包括第一电感，所述第一电感的一端与所述第一晶体管的栅极相耦接，另一端与所述第一晶体管的第二极相耦接。
  5. 根据权利要求1-4任一项所述的复用电路，其特征在于，所述第一开关电路还包括第一电阻，所述第一电阻的一端与所述第一晶体管的栅极相耦接，另一端用于接收所述第一电压。
  6. 根据权利要求1所述的复用电路，其特征在于，所述第二恒压控制电路包括第二电容；所述第二电容的一端与所述第二晶体管的栅极相耦接，另一端与所述第二晶体 管的第二极相耦接。
  7. 根据权利要求6所述的复用电路，其特征在于，所述第二电容的电容值为4μF～10μF。
  8. 根据权利要求6所述的复用电路，其特征在于，所述第二恒压控制电路还包括第二电感；所述第二电感的第一端与所述第二晶体管的栅极相耦接，另一端与所述第二晶体管的第二极相耦接。
  9. 根据权利要求1、6～8任一项所述的复用电路，其特征在于，所述第二开关电路还包括第二电阻，所述第二电阻的一端与所述第二晶体管的栅极相耦接，另一端用于接收所述第一电压。
  10. 根据权利要求1所述的复用电路，其特征在于，所述第三开关电路包括第三晶体管和第四晶体管；
    所述第三晶体管的栅极用于接收所述第二电压，第一极与所述第一输出端相耦接，第二极与所述第一信号传输端相耦接；
    所述第四晶体管的栅极用于接收所述第二电压，第一极与所述第二输出端相耦接，第二极与所述第二信号传输端相耦接。
  11. 根据权利要求10所述的复用电路，其特征在于，所述第三开关电路还与所述右声道传输端和所述左声道传输端相耦接；所述第三开关电路还包括第三电容和第四电容；
    所述第三电容的一端与所述第三晶体管的栅极相耦接，所述第三电容的另一端与所述右声道传输端相耦接；
    所述第四电容的一端与所述第四晶体管的栅极相耦接，所述第四电容的另一端与所述左声道传输端相耦接。
  12. 根据权利要求10或11所述的复用电路，其特征在于，所述第三开关电路还包括第三电阻、第四电阻、第五电阻以及第六电阻；
    所述第三电阻的一端用于接收所述第二电压，另一端与所述第三晶体管的栅极相耦接；
    所述第四电阻的一端与所述第三晶体管的栅极相耦接，另一端接地；
    所述第五电阻的一端用于接收所述第二电压，另一端与所述第四晶体管的栅极相耦接；
    所述第六电阻的一端与所述第四晶体管的栅极相耦接，另一端接地。
  13. 一种移动终端，其特征在于，包括用于与外接设备相耦接的外接接口、中央处理器、音频编解码器，以及如权利要求1-12任一项所述的复用电路；所述外接接口包括根据Type-C接口协议规定的D+引脚、D-引脚；
    所述复用电路的第一信号传输端与所述D+引脚相耦接，第二信号传输端与所述D-引脚相耦接，右声道传输端、左声道传输端与所述音频编解码器相耦接；
    所述音频解码器还与中央处理器相耦接；所述音频编解码器用于对所述中央处理器输出的音频信号进行解码，并将右声道音频信号提供至所述右声道传输端，将左声道音频信号提供至所述左声道传输端；
    所述复用电路的第一输出端、第二输出端与所述中央处理器相耦接，所述复用电路 用于将所述D+引脚以及D-引脚的信号分别通过所述第一输出端和所述第二输出端提供至所述中央处理器，或者将所述中央处理器的信号分别通过所述第一输出端和所述第二输出端提供给所述D+引脚以及D-引脚。
PCT/CN2019/107543 2018-09-26 2019-09-24 一种复用电路及移动终端 WO2020063590A1 (zh)

Priority Applications (4)

Application Number Priority Date Filing Date Title
RU2021105549A RU2761602C1 (ru) 2018-09-26 2019-09-24 Схема мультиплексирования и мобильный терминал
US17/264,935 US11445276B2 (en) 2018-09-26 2019-09-24 Multiplexing circuit and mobile terminal
ES19866456T ES2926981T3 (es) 2018-09-26 2019-09-24 Circuito multiplexor y terminal móvil
EP19866456.7A EP3812910B1 (en) 2018-09-26 2019-09-24 Multiplexing circuit and mobile terminal

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201811126968.3A CN109491942B (zh) 2018-09-26 2018-09-26 一种复用电路及移动终端
CN201811126968.3 2018-09-26

Publications (1)

Publication Number Publication Date
WO2020063590A1 true WO2020063590A1 (zh) 2020-04-02

Family

ID=65689927

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2019/107543 WO2020063590A1 (zh) 2018-09-26 2019-09-24 一种复用电路及移动终端

Country Status (6)

Country Link
US (1) US11445276B2 (zh)
EP (1) EP3812910B1 (zh)
CN (1) CN109491942B (zh)
ES (1) ES2926981T3 (zh)
RU (1) RU2761602C1 (zh)
WO (1) WO2020063590A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022078385A1 (zh) * 2020-10-16 2022-04-21 维沃移动通信有限公司 控制电路、方法及电子设备

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109491942B (zh) 2018-09-26 2020-11-06 华为技术有限公司 一种复用电路及移动终端
CN110569207A (zh) * 2019-04-10 2019-12-13 北京乐驾科技有限公司 接口复用装置及车载设备
CN111130596B (zh) * 2019-11-14 2021-08-03 荣耀终端有限公司 一种复用电路、接口电路***以及移动终端
CN112468625B (zh) * 2020-11-30 2022-11-04 维沃移动通信有限公司 防失真电路及其控制方法、电子设备
CN112737566B (zh) * 2021-04-02 2021-06-22 荣耀终端有限公司 一种接口转换电路及电子设备

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009061559A1 (en) * 2007-11-05 2009-05-14 Freescale Semiconductor, Inc. High speed overlay mode for burst data and real time streaming (audio) applications
CN202111352U (zh) * 2011-06-10 2012-01-11 深圳市博亚时代科技有限公司 一种Micro USB连接器的复用电路
CN206226696U (zh) * 2016-12-05 2017-06-06 徐焱 一种电子信号处理装置
CN109491942A (zh) * 2018-09-26 2019-03-19 华为技术有限公司 一种复用电路及移动终端

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8699717B2 (en) * 2010-05-28 2014-04-15 Fairchild Semiconductor Corporation Audio amplifier performance while maintaining USB compliance and power down protection
US20140281071A1 (en) 2013-03-15 2014-09-18 Jianping Jane Xu Optical memory extension architecture
CN106027015B (zh) 2015-03-24 2020-02-28 快捷半导体(苏州)有限公司 增强型保护性多路复用器
CN104917880B (zh) * 2015-04-28 2017-10-20 广东欧珀移动通信有限公司 一种移动终端及其控制方法
US20160373408A1 (en) * 2015-06-22 2016-12-22 Adapt IP Usb firewall devices
CN105071795A (zh) * 2015-08-17 2015-11-18 广东欧珀移动通信有限公司 一种基于usb接口的复用电路
US9788097B2 (en) * 2016-01-29 2017-10-10 Big O LLC Multi-function bone conducting headphones
CN105867874A (zh) * 2016-03-25 2016-08-17 乐视控股（北京）有限公司 用户设备
US10225640B2 (en) * 2016-04-19 2019-03-05 Snik Llc Device and system for and method of transmitting audio to a user
TWI601015B (zh) * 2016-05-25 2017-10-01 瑞昱半導體股份有限公司 資料處理電路與資料處理方法
US10078616B2 (en) * 2016-05-26 2018-09-18 Silicon Laboratories Inc. System, USB Type-C connector and method to transmit encoded data
CN108335710B (zh) * 2017-01-20 2021-04-13 群联电子股份有限公司 切换器模块、存储器存储装置及多路复用器
CN106874233B (zh) 2017-02-16 2018-10-19 维沃移动通信有限公司 一种Type-C接口控制电路、控制方法及移动终端
CN107221983B (zh) * 2017-07-06 2020-03-27 建荣集成电路科技(珠海)有限公司 一种充电控制电路及音频设备
US10063223B1 (en) 2017-11-06 2018-08-28 Semiconductor Components Industries, Llc Audio switch circuit for reducing on-resistance variation
US10394740B1 (en) * 2018-09-10 2019-08-27 Texas Instruments Incorporated Signal line switch arrangement with multiple paths between a charge pump and a transistor control terminal
CN111602379B (zh) * 2018-10-15 2022-11-22 华为技术有限公司 语音通话方法、电子设备及***

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009061559A1 (en) * 2007-11-05 2009-05-14 Freescale Semiconductor, Inc. High speed overlay mode for burst data and real time streaming (audio) applications
CN202111352U (zh) * 2011-06-10 2012-01-11 深圳市博亚时代科技有限公司 一种Micro USB连接器的复用电路
CN206226696U (zh) * 2016-12-05 2017-06-06 徐焱 一种电子信号处理装置
CN109491942A (zh) * 2018-09-26 2019-03-19 华为技术有限公司 一种复用电路及移动终端

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP3812910A4 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022078385A1 (zh) * 2020-10-16 2022-04-21 维沃移动通信有限公司 控制电路、方法及电子设备

Also Published As

Publication number Publication date
EP3812910A1 (en) 2021-04-28
EP3812910B1 (en) 2022-08-10
EP3812910A4 (en) 2021-09-01
RU2761602C1 (ru) 2021-12-10
US11445276B2 (en) 2022-09-13
CN109491942B (zh) 2020-11-06
ES2926981T3 (es) 2022-10-31
CN109491942A (zh) 2019-03-19
US20210321177A1 (en) 2021-10-14

Similar Documents

Publication Publication Date Title
WO2020063590A1 (zh) 一种复用电路及移动终端
CN111130596B (zh) 一种复用电路、接口电路***以及移动终端
US9338570B2 (en) Method and apparatus for an integrated headset switch with reduced crosstalk noise
US7800443B2 (en) Circuit arrangement for providing an analog signal, and electronic apparatus
CA2839487A1 (en) Audio signal receiving device, audio signal adapter device and system for transmitting audio signal
CN106878872B (zh) 一种消除噪声信号的***电路
JP2014139773A (ja) 電力供給されないバス上のｕｓｂ周辺装置検出
WO2020187024A1 (zh) 音频电路、相关设备及控制方法
US9065414B2 (en) Automatic volume reduction
US20110222712A1 (en) Audio output driver for reducing electromagnetic interference and improving audio channel performance
WO2023093684A1 (zh) 一种消除开机***音的音频***及供电控制方法
US20230291402A1 (en) Universal serial bus (usb) host data switch with integrated equalizer
US8334672B2 (en) Charging circuit with ability to identify power source
CN114630230B (zh) 电子设备、上拉电路和抑制耳机pop音的方法
CN212628411U (zh) 一种骨传导助听器
US10051395B2 (en) Accessory management and data communication using audio port
RU2792883C1 (ru) Схема мультиплексирования, система интерфейсных схем и мобильный терминал
RU2792085C1 (ru) Аудиосхема, устройство и способ управления, связанные с ней
US20200257048A1 (en) Multiplexing device of transmission line, and electronic device
WO2018129096A1 (en) Hum reduction circuit and method
CN211047170U (zh) 一种刷机***
CN109254753B (zh) 音频信号接口电路及其装置、控制方法、播放设备
TWI599238B (zh) 耳機用連接模組、耳機裝置、及媒體播放系統
JP2003061185A (ja) ジャック回路、これを利用する携帯型電子機器および電話機
TW201935844A (zh) 具收聽調頻電台功能的電子裝置

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 19866456

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 2019866456

Country of ref document: EP

Effective date: 20210121

NENP Non-entry into the national phase

Ref country code: DE

WWE Wipo information: entry into national phase

Ref document number: 2021105549

Country of ref document: RU