WO2020063359A1 - Producing method for programmable memory - Google Patents

Producing method for programmable memory Download PDF

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Publication number
WO2020063359A1
WO2020063359A1 PCT/CN2019/105517 CN2019105517W WO2020063359A1 WO 2020063359 A1 WO2020063359 A1 WO 2020063359A1 CN 2019105517 W CN2019105517 W CN 2019105517W WO 2020063359 A1 WO2020063359 A1 WO 2020063359A1
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layer
finger
isolation
holes
hole
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PCT/CN2019/105517
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French (fr)
Chinese (zh)
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彭泽忠
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成都皮兆永存科技有限公司
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Publication of WO2020063359A1 publication Critical patent/WO2020063359A1/en

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B99/00—Subject matter not provided for in other groups of this subclass

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  • the invention relates to a technology for preparing a memory.
  • the technical problem to be solved by the present invention is to provide a method for preparing a programmable memory.
  • the prepared memory has the characteristics of high density and low cost.
  • the technical solution adopted by the present invention to solve the technical problem is a method for preparing a programmable memory, which includes the following steps:
  • step of forming the basic structure setting the conductive medium layer and the insulating medium layer in a predetermined number of layers in a manner that the conductive medium layer and the insulating medium layer alternately overlap to form the basic structure;
  • the step of forming a finger structure on the basic structure divide the basic structure into two interdigitated finger structures by setting a split structure that runs through the top to the bottom of the basic structure, and the finger structure includes at least two Finger strip and a common connection strip, each finger strip in the same interdigitation structure is connected with the common connection strip in the interdigitation structure; the divided structure includes a columnar hole array and an isolation groove filled with an insulating material; The area between two adjacent fingers is called the inter-finger area, and the cylindrical holes in the same inter-finger area are the same cylindrical holes;
  • Steps of forming a cylindrical storage unit According to a preset memory structure, the required intermediate layer dielectric materials are arranged layer by layer on the inner wall of the cylindrical hole, and finally the core dielectric material is filled in the cylindrical hole to form the core dielectric material Floor.
  • the preset memory is: a PN junction semiconductor memory, a Schottky diode memory, or a memory medium memory;
  • the memory medium memory is a resistance change memory, a magnetic change memory, a phase change memory, or a ferroelectric memory.
  • step 2) the columnar holes are separated from each other.
  • the step 2) includes:
  • the base structure is divided into two interdigitated interdigitated structures by providing isolation grooves that run through the top layer to the bottom layer of the basic structure.
  • the interdigitated structure includes at least two finger bars and a common connection bar. The same finger structure Each finger in the finger is connected to the common connection bar in the finger structure;
  • the step 2) includes the following steps:
  • An isolation hole is provided between the center points of the two adjacent cylindrical holes that are adjacent to each other, the isolation hole penetrates into the adjacent two cylindrical holes, and the edge of the isolation hole is located between the center points of the adjacent two cylindrical holes; Fill the isolation holes with insulating material.
  • step 2) in the column hole array, adjacent column holes in the same row invade each other, and the nearest edge of the intruder is between the center point of the intruder and the center point of the intruder, and the nearest edge is The edge closest to the center point of the intruded party.
  • each step is: A) the step of forming a basic structure: setting a predetermined number of conductive medium layers and insulating medium layers in a manner that the conductive medium layer and the insulating medium layer are staggered to form a basic structure body;
  • the base structure is divided into two interdigitated interdigitated structures by providing isolation grooves that run through the top layer to the bottom layer of the basic structure.
  • the interdigitated structure includes at least two finger bars and a common connecting bar. The same finger structure Each finger in the finger is connected to the common connection bar in the finger structure;
  • Steps of forming a cylindrical storage unit According to a preset memory structure, the required intermediate layer dielectric materials are arranged layer by layer on the inner wall of the cylindrical hole, and finally the core dielectric material is filled in the cylindrical hole to form the core dielectric material.
  • the required intermediate layer dielectric materials are arranged layer by layer on the inner wall of the cylindrical hole, and finally the core dielectric material is filled in the cylindrical hole to form the core dielectric material.
  • Floor According to a preset memory structure, the required intermediate layer dielectric materials are arranged layer by layer on the inner wall of the cylindrical hole, and finally the core dielectric material is filled in the cylindrical hole to form the core dielectric material.
  • the present invention is the following steps in order:
  • the required intermediate layer dielectric materials are arranged layer by layer on the inner wall of the columnar hole, and finally the core medium material is filled in the columnar hole to form the core medium material layer;
  • Isolation holes are provided between two adjacent cylindrical holes in the same row and left and right ends of each column of cylindrical holes, and the isolation holes penetrate the core dielectric material in the cylindrical holes on both sides thereof.
  • the insulation medium in the isolation trench and the isolation hole is silicon dioxide or air.
  • the invention has the beneficial effects that the prepared semiconductor memory has high storage density, low process cost and easy implementation.
  • FIG. 1 is a schematic diagram of a three-dimensional structure of a semiconductor memory obtained by the manufacturing method of Embodiment 1 of the present invention.
  • FIG. 2 is a schematic diagram (view from above) of a memory cell according to the present invention.
  • FIG. 3 is a schematic perspective view of step 1 in Embodiment 2 of the present invention.
  • FIG. 4 is a schematic plan view of step 1 in Embodiment 2 of the present invention.
  • FIG. 5 is a schematic diagram of step 2 in Embodiment 2 of the present invention.
  • FIG. 6 is a schematic diagram of step 3 in Embodiment 2 of the present invention.
  • FIG. 7 is a schematic diagram of step 4 in Embodiment 2 of the present invention.
  • FIG. 8 is a schematic diagram of step 5 in Embodiment 2 of the present invention.
  • FIG. 9 is a schematic diagram of step 6 in Embodiment 2 of the present invention.
  • FIG. 10 is a schematic diagram of step 7 in Embodiment 3 of the present invention.
  • FIG. 11 is a schematic diagram of step 8 in Embodiment 3 of the present invention.
  • FIG. 12 shows a range of two adjacent cylindrical holes of Embodiment 4.
  • FIG. 13 shows the positions of the isolation holes of the fourth embodiment.
  • FIG. 14 is a schematic diagram of Step 2 of Embodiment 4.
  • FIG. 14 is a schematic diagram of Step 2 of Embodiment 4.
  • FIG. 15 is a schematic diagram showing Step 3 of Embodiment 4.
  • FIG. 15 is a schematic diagram showing Step 3 of Embodiment 4.
  • FIG. 16 is a schematic diagram of step 4 in Embodiment 4.
  • FIG. 16 is a schematic diagram of step 4 in Embodiment 4.
  • FIG. 17 is a schematic diagram of Step 5 in Embodiment 4.
  • FIG. 17 is a schematic diagram of Step 5 in Embodiment 4.
  • FIG. 18 is a schematic diagram showing Step 6 of Embodiment 4.
  • FIG. 18 is a schematic diagram showing Step 6 of Embodiment 4.
  • FIG. 19 is a schematic diagram of Step 7 of Embodiment 4.
  • FIG. 19 is a schematic diagram of Step 7 of Embodiment 4.
  • FIG. 20 is a schematic diagram of the fifth embodiment.
  • FIG. 1 illustrates one of the semiconductor memory structures prepared by the present invention.
  • 11 is a conductive medium
  • 12 is a first dielectric layer
  • 13 is a core dielectric layer.
  • the area shown by the oval dotted line is the memory.
  • Two memories on the same layer are distributed on both sides of a cylindrical structure.
  • Embodiment 1 This embodiment is a two-layer cylindrical structure, see FIG. 1 and FIG. 2.
  • the materials of the conductive dielectric layer, the first dielectric layer, and the core dielectric layer may be any combination in Table 1.
  • Embodiment 2 The cylinder of this embodiment has a three-layer structure.
  • Step 1 A deposition process is used to arrange the conductive dielectric layer and the insulating dielectric layer in a staggered manner to set a predetermined number of conductive dielectric layers and insulating dielectric layers to form a basic structure.
  • FIG. 3 is a schematic perspective view of the basic structure, and FIG. 4 Is a top view.
  • Step 2 Define with a mask and use deep-well etching to etch the isolation trenches 50 that run through the top to bottom of the basic structure to form two interdigitated interdigitated structures, which include at least two fingers and one Common connection bar, each finger bar in the same finger structure is connected with the common connection bar in the finger structure, and an insulation medium is filled in the isolation groove.
  • 51, 52, 53, 54 are finger bars
  • 55 and 56 are public connection bars
  • the finger bars 51, 53 and the public connection bar 55 form the first interdigitated structure
  • the finger bars 52, 54 are connected to the public
  • the strip 56 forms a second finger structure, and the fingers of the two finger structure are staggered, as shown in FIG. 5.
  • Step 3 Define with a mask and use deep-well etching to form holes 60 through the top to bottom of the basic structure at the isolation trenches to form a columnar hole array; the area between two adjacent fingers is called an inter-finger In the region, the columnar holes in the same interdigital area are the columnar holes of the same row, as shown in Figure 6.
  • Step 4 A layer of programmable dielectric with a thickness of 0.5 to 5 nm is grown on the inner wall of the cylindrical hole by using the ALD process as the first dielectric layer, as shown in FIG. 7;
  • Step 5 Use the ALD process to grow a layer of buffered P-polysilicon or silicon on the inner wall of the columnar hole (that is, the surface of the first dielectric layer) as the second dielectric layer. . See Figure 8.
  • Step 6 After the dielectric layer on the inner wall of the cylindrical hole is set, the core dielectric material is deposited and filled in the cavity inside the cylindrical hole by an ALD process to form a core dielectric material layer.
  • the core dielectric material is an N + semiconductor or a Schottky metal, as shown in FIG. 9.
  • the materials of the conductive dielectric layer, the first dielectric layer, the second dielectric layer, and the core dielectric layer may adopt any combination in Table 2:
  • This embodiment has the following steps after step 6 in Embodiment 2:
  • Step 7 Define it with a mask and use a deep-well etching process to set an isolation hole between the center points of two adjacent cylindrical holes adjacent to each other.
  • the isolation hole invades the two adjacent cylindrical holes and the edge of the isolation hole. Located between the center points of two adjacent cylindrical holes, that is, after the isolation hole is opened, the core dielectric material layer of the cylindrical hole remains as a whole, see FIG. 10;
  • Step 8 Use an ALD process to fill the isolation hole with insulating material, as shown in FIG. 11.
  • the cylindrical holes of Examples 2 and 3 are independent of each other.
  • the adjacent columnar holes in the same row invade each other. Since the isolation holes are provided in the subsequent process, the isolation holes completely isolate the relevant medium in the columnar holes on the left and right sides thereof.
  • the closest edge of the intruder is between the center of the intruder and the center of the intruder, and the nearest edge is the edge closest to the center of the intruder to maintain the integrity of the core medium. See FIGS. 12 and 13.
  • Figure 12 shows the range of two adjacent cylindrical holes
  • Figure 13 shows the location of the isolation holes.
  • This embodiment is an improved embodiment. It includes the following steps:
  • Step of forming a basic structure a predetermined number of conductive medium layers and insulating medium layers are provided in a manner that the conductive medium layer and the insulating medium layer are alternately overlapped to form a basic structure; this step is the same as that of the second embodiment.
  • An ALD process is used to form a first dielectric layer with a layer of 0.5 to 5 nm on the surface of the inner wall of the cylindrical hole, as shown in FIG. 15.
  • the ALD process is used to grow a layer of buffer P-polysilicon or silicon on the surface of the first dielectric layer in the columnar hole to form a second dielectric layer, the thickness of which is optimized according to the requirements of the programmed reverse diode leakage current. See Figure 16.
  • the cavity inside the cylindrical hole is filled with a core dielectric material, such as N + semiconductor or silicon, or Schottky metal, to form the core dielectric material layer; as shown in FIG. 17.
  • a core dielectric material such as N + semiconductor or silicon, or Schottky metal
  • Isolation holes are provided between adjacent two cylindrical holes in the same row and the left and right ends of each row of cylindrical holes, the isolation holes penetrate the core dielectric material layer in the cylindrical holes on both sides, and The left and right ends of the finger strip area are alternately arranged with isolation grooves in rows to form two interdigitated finger prong structures, as shown in FIG. 18.
  • the finger structure of this embodiment is finally formed by drilling holes at the ends of the finger strips, which is different from the method of forming the complete finger structure with isolation grooves in Embodiments 2 and 3. See Figure 20.
  • the hole at the end of the finger can be a cylindrical hole as a storage unit, or it can be an isolation hole.
  • the former is equivalent to expanding the number of storage units.

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Abstract

A producing method for a programmable memory, relating to technology for producing memories. The present invention comprises the following steps: (1) a step of forming a base structure body; (2) a step of forming an interdigital structure on the base structure body; and (3) a step of forming a columnar storage unit: providing required intermediate layer dielectric materials on the inner wall of a cylindrical hole layer by layer according to a preset structure of the memory, and finally filling the cylindrical hole with a core dielectric material to form a core dielectric material layer. The obtained advantageous effects are that the produced semiconductor memory is high in storage density, low in process costs and easy to achieve.

Description

可编程存储器的制备方法Preparation method of programmable memory 技术领域Technical field
本发明涉及存储器的制备技术。The invention relates to a technology for preparing a memory.
背景技术Background technique
现有技术包括可擦除可编程只读存储器(EPROM)，电可擦除可编程只读存储器(EEPROM)，闪存，NAND-快闪存储器，硬磁盘、光盘(CD)、数字通用光盘(DVD)，蓝光光盘协会注册的蓝光光盘等在内的各种数字存储技术，50余年来已经广泛用于数据存储。然而，存储介质的寿命通常小于5年到10年。针对大数据存储而开发的反熔丝存储技术，因其非常昂贵且存储密度低，不能满足海量数据存储的需求。Current technologies include Erasable Programmable Read-Only Memory (EPROM), Electrically Erasable Programmable Read-Only Memory (EEPROM), Flash Memory, NAND-Flash Memory, Hard Disk, Compact Disk (CD), Digital Versatile Disc (DVD) Various digital storage technologies, including the Blu-ray Disc registered by the Blu-ray Disc Association, have been widely used for data storage for more than 50 years. However, the life of a storage medium is usually less than 5 to 10 years. The anti-fuse storage technology developed for large data storage cannot meet the needs of mass data storage due to its very expensive and low storage density.
发明内容Summary of the Invention
本发明所要解决的技术问题是，提供一种可编程存储器的制备方法，制备得到的存储器具有高密度、低成本的特点。The technical problem to be solved by the present invention is to provide a method for preparing a programmable memory. The prepared memory has the characteristics of high density and low cost.
本发明解决所述技术问题采用的技术方案是，可编程存储器的制备方法，包括下述步骤：The technical solution adopted by the present invention to solve the technical problem is a method for preparing a programmable memory, which includes the following steps:
1)形成基础结构体的步骤：以导电介质层和绝缘介质层交错重叠的方式，设置预定层数的导电介质层和绝缘介质层，形成基础结构体；1) The step of forming the basic structure: setting the conductive medium layer and the insulating medium layer in a predetermined number of layers in a manner that the conductive medium layer and the insulating medium layer alternately overlap to form the basic structure;
2)在基础结构体上形成指叉结构的步骤：通过设置贯穿基础结构体顶层到底层的分割结构，将基础结构体分为两个交错的指叉结构，所述指叉结构包括至少两个指条和一个公共连接条，同一指叉结构中的各指条皆与该指叉结构中的公共连接条相接；所述分割结构包括柱形孔阵列和填充有绝缘材料的隔离槽；相邻两个指条之间的区域称为指间区域，处于同一指间区域的柱形孔为同行的柱形孔；2) The step of forming a finger structure on the basic structure: divide the basic structure into two interdigitated finger structures by setting a split structure that runs through the top to the bottom of the basic structure, and the finger structure includes at least two Finger strip and a common connection strip, each finger strip in the same interdigitation structure is connected with the common connection strip in the interdigitation structure; the divided structure includes a columnar hole array and an isolation groove filled with an insulating material; The area between two adjacent fingers is called the inter-finger area, and the cylindrical holes in the same inter-finger area are the same cylindrical holes;
3)形成柱形存储单元的步骤：按照预设的存储器的结构，在柱形孔内壁逐层设置所需的各中间层介质材料，最后在柱形孔内填充核心介质材料，形成核心介质材料层。3) Steps of forming a cylindrical storage unit: According to a preset memory structure, the required intermediate layer dielectric materials are arranged layer by layer on the inner wall of the cylindrical hole, and finally the core dielectric material is filled in the cylindrical hole to form the core dielectric material Floor.
进一步的，所述步骤3)中，预设的存储器为：PN结型半导体存储器、肖特基二极管型存储器或记忆介质存储器；Further, in the step 3), the preset memory is: a PN junction semiconductor memory, a Schottky diode memory, or a memory medium memory;
所述记忆介质存储器为阻变存储器、磁变存储器、相变存储器或铁电存储器。The memory medium memory is a resistance change memory, a magnetic change memory, a phase change memory, or a ferroelectric memory.
进一步的，所述步骤2)中，各柱形孔相互分离。Further, in the step 2), the columnar holes are separated from each other.
所述步骤2)包括：The step 2) includes:
2a.通过设置贯穿基础结构体顶层到底层的隔离槽，将基础结构体分为两个交错的指叉结构，所述指叉结构包括至少两个指条和一个公共连接条，同一指叉结构中的各指条皆与该指叉结构中的公共连接条相接；2a. The base structure is divided into two interdigitated interdigitated structures by providing isolation grooves that run through the top layer to the bottom layer of the basic structure. The interdigitated structure includes at least two finger bars and a common connection bar. The same finger structure Each finger in the finger is connected to the common connection bar in the finger structure;
2b.在隔离槽中填充绝缘材料；2b. Fill the isolation tank with insulating material;
2c.在隔离槽处钻孔，形成贯穿基础结构体顶层到底层的柱形孔，所述柱形孔侵入其两侧的指叉结构中的各层导电介质层和各层绝缘介质层。2c. Drill holes at the isolation grooves to form columnar holes penetrating from the top layer to the bottom layer of the basic structure, the columnar holes invading each of the conductive dielectric layers and each insulating dielectric layer in the finger structure on both sides thereof.
或者，所述步骤2)包括下述步骤：Alternatively, the step 2) includes the following steps:
在同行且相邻的两柱形孔的中心点之间设置隔离孔，隔离孔侵入与其相邻的两柱形孔，且隔离孔的边缘位于相邻两柱形孔的中心点之间；然后在隔离孔中填充绝缘材料。An isolation hole is provided between the center points of the two adjacent cylindrical holes that are adjacent to each other, the isolation hole penetrates into the adjacent two cylindrical holes, and the edge of the isolation hole is located between the center points of the adjacent two cylindrical holes; Fill the isolation holes with insulating material.
所述步骤2)中，在柱形孔阵列中，同一行且相邻的柱形孔相互侵入，侵入方的最近边缘处于侵入方中心点与被侵入方中心点之间，所述最近边缘为最靠近被侵入方中心点的边缘。In the step 2), in the column hole array, adjacent column holes in the same row invade each other, and the nearest edge of the intruder is between the center point of the intruder and the center point of the intruder, and the nearest edge is The edge closest to the center point of the intruded party.
进一步的，各步骤顺序为：A)形成基础结构体的步骤：以导电介质层和绝缘介质层交错重叠的方式，设置预定层数的导电介质层和绝缘介质层，形成基础结构体；Further, the sequence of each step is: A) the step of forming a basic structure: setting a predetermined number of conductive medium layers and insulating medium layers in a manner that the conductive medium layer and the insulating medium layer are staggered to form a basic structure body;
B)在基础结构体上形成指叉结构的步骤：B) The steps of forming a finger structure on the basic structure:
B1.通过设置贯穿基础结构体顶层到底层的隔离槽，将基础结构体分为两个交错的指叉结构，所述指叉结构包括至少两个指条和一个公共连接条，同一指叉结构中的各指条皆与该指叉结构中的公共连接条相接；B1. The base structure is divided into two interdigitated interdigitated structures by providing isolation grooves that run through the top layer to the bottom layer of the basic structure. The interdigitated structure includes at least two finger bars and a common connecting bar. The same finger structure Each finger in the finger is connected to the common connection bar in the finger structure;
B2.在隔离槽中填充绝缘介质；B2. Fill the isolation tank with insulation medium;
B3.在隔离槽处形成贯穿基础结构体顶层到底层的孔，形成柱形孔阵列；相邻两个指条之间的区域称为指间区域，处于同一指间区域的柱形孔为同行的柱形孔；B3. Form a hole through the top to bottom of the basic structure at the isolation groove to form a columnar hole array; the area between two adjacent fingers is called the interdigital area, and the cylindrical holes in the same interdigital area are the same Cylindrical hole
C)形成柱形存储单元的步骤：按照预设的存储器的结构，在柱形孔内壁逐层设置所需的各中间层介质材料，最后在柱形孔内填充核心介质材料，形成核心介质材料层。C) Steps of forming a cylindrical storage unit: According to a preset memory structure, the required intermediate layer dielectric materials are arranged layer by layer on the inner wall of the cylindrical hole, and finally the core dielectric material is filled in the cylindrical hole to form the core dielectric material. Floor.
或者，本发明按顺序为以下步骤：Alternatively, the present invention is the following steps in order:
Ⅰ)形成基础结构体的步骤：以导电介质层和绝缘介质层交错重叠的方式，设置预定层数的导电介质层和绝缘介质层，形成基础结构体；Ⅰ) Forming a basic structure: setting a predetermined number of conductive dielectric layers and insulating dielectric layers in such a manner that the conductive dielectric layer and the insulating dielectric layer overlap each other to form a basic structural body;
Ⅱ)在基础结构体上形成指叉结构雏形和柱形存储单元的步骤：Ⅱ) Steps of forming a finger-shaped structure and a cylindrical storage unit on the basic structure:
Ⅱ1.在基础结构体上设置贯穿基础结构体顶层到底层的孔，形成柱形孔阵列；相邻两行柱形孔之间为指条区域；Ⅱ1. Set holes on the basic structure body that penetrate the top to bottom of the basic structure body to form a columnar hole array; between two adjacent rows of columnar holes is a finger area;
Ⅱ2.按照预设的存储器的结构，在柱形孔内壁逐层设置所需的各中间层介质材料，最后在柱形孔内填充核心介质材料，形成核心介质材料层；Ⅱ2. According to the preset memory structure, the required intermediate layer dielectric materials are arranged layer by layer on the inner wall of the columnar hole, and finally the core medium material is filled in the columnar hole to form the core medium material layer;
Ⅲ)形成指叉结构：在同一行的相邻两柱形孔之间以及每一行柱形孔的左右两端设置隔离孔，所述隔离孔侵入其两侧的柱形孔内的核心介质材料层，并在各指条区域左右两个端部中按行交替择一设置隔离槽，形成两个交错的指叉结构，并在所述隔离槽和隔离孔中填充绝缘介质。Ⅲ) Form a finger structure: Isolation holes are provided between two adjacent cylindrical holes in the same row and left and right ends of each column of cylindrical holes, and the isolation holes penetrate the core dielectric material in the cylindrical holes on both sides thereof. Layer, and in the left and right ends of each finger strip area, alternately set one isolation groove in a row to form two interdigitated interdigitated structures, and fill the isolation groove and the isolation hole with an insulating medium.
所述隔离槽和隔离孔中的绝缘介质为二氧化硅或空气。The insulation medium in the isolation trench and the isolation hole is silicon dioxide or air.
本发明的有益效果是，制备得到的半导体存储器存储密度高，并且工艺成本低，易于实现。The invention has the beneficial effects that the prepared semiconductor memory has high storage density, low process cost and easy implementation.
附图说明BRIEF DESCRIPTION OF THE DRAWINGS
图1是本发明的实施例1的制备方法所得到的半导体存储器的立体结构示意图。FIG. 1 is a schematic diagram of a three-dimensional structure of a semiconductor memory obtained by the manufacturing method of Embodiment 1 of the present invention.
图2是本发明的存储单元示意图(俯视方向)。FIG. 2 is a schematic diagram (view from above) of a memory cell according to the present invention.
图3是本发明的实施例2的步骤1的立体示意图。FIG. 3 is a schematic perspective view of step 1 in Embodiment 2 of the present invention.
图4是本发明的实施例2的步骤1的俯视示意图。FIG. 4 is a schematic plan view of step 1 in Embodiment 2 of the present invention.
图5是本发明的实施例2的步骤2的示意图。FIG. 5 is a schematic diagram of step 2 in Embodiment 2 of the present invention.
图6是本发明的实施例2的步骤3的示意图。FIG. 6 is a schematic diagram of step 3 in Embodiment 2 of the present invention.
图7是本发明的实施例2的步骤4的示意图。FIG. 7 is a schematic diagram of step 4 in Embodiment 2 of the present invention.
图8是本发明的实施例2的步骤5的示意图。FIG. 8 is a schematic diagram of step 5 in Embodiment 2 of the present invention.
图9是本发明的实施例2的步骤6的示意图。FIG. 9 is a schematic diagram of step 6 in Embodiment 2 of the present invention.
图10是本发明的实施例3的步骤7示意图。FIG. 10 is a schematic diagram of step 7 in Embodiment 3 of the present invention.
图11是本发明的实施例3的步骤8示意图。FIG. 11 is a schematic diagram of step 8 in Embodiment 3 of the present invention.
图12示出了实施例4的两个相邻的柱形孔的范围。FIG. 12 shows a range of two adjacent cylindrical holes of Embodiment 4.
图13示出了实施例4的隔离孔的位置。FIG. 13 shows the positions of the isolation holes of the fourth embodiment.
图14示出了实施例4步骤2的示意图。FIG. 14 is a schematic diagram of Step 2 of Embodiment 4. FIG.
图15示出了实施例4步骤3的示意图。FIG. 15 is a schematic diagram showing Step 3 of Embodiment 4. FIG.
图16示出了实施例4步骤4的示意图。FIG. 16 is a schematic diagram of step 4 in Embodiment 4. FIG.
图17示出了实施例4步骤5的示意图。FIG. 17 is a schematic diagram of Step 5 in Embodiment 4. FIG.
图18示出了实施例4步骤6的示意图。FIG. 18 is a schematic diagram showing Step 6 of Embodiment 4. FIG.
图19示出了实施例4步骤7的示意图。FIG. 19 is a schematic diagram of Step 7 of Embodiment 4. FIG.
图20示出了实施例5的示意图。FIG. 20 is a schematic diagram of the fifth embodiment.
具体实施方式detailed description
参见图1，图1示出了本发明所制备得到的半导体存储器结构中的一种。其中，11为导电介质，12为第一介质层，13为核心介质层。Referring to FIG. 1, FIG. 1 illustrates one of the semiconductor memory structures prepared by the present invention. Among them, 11 is a conductive medium, 12 is a first dielectric layer, and 13 is a core dielectric layer.
图2中，椭圆形虚线所示区域为存储器。同一层的两个存储器分布在一个圆柱形结构的两侧。In FIG. 2, the area shown by the oval dotted line is the memory. Two memories on the same layer are distributed on both sides of a cylindrical structure.
实施例1：本实施例为两层圆柱结构，参见图1和图2。导电介质层、第一介质层和核心介质层的材料可采用表1中的任一组合。Embodiment 1: This embodiment is a two-layer cylindrical structure, see FIG. 1 and FIG. 2. The materials of the conductive dielectric layer, the first dielectric layer, and the core dielectric layer may be any combination in Table 1.
表1Table 1
 Zh 导电介质层Conductive dielectric layer 第一介质层First dielectric layer 核心介质层Core dielectric layer
组合1Combination 1 P型半导体P-type semiconductor 绝缘介质Insulation medium N型半导体N-type semiconductor
组合2Combination 2 N型半导体N-type semiconductor 绝缘介质Insulation medium P型半导体P-type semiconductor
组合3Combination 3 肖特基金属Schottky metal 绝缘介质Insulation medium 半导体semiconductor
组合4Combination 4 半导体semiconductor 绝缘介质Insulation medium 肖特基金属Schottky metal
组合5Combination 5 导体conductor 记忆介质Memory medium 导体conductor
实施例2：本实施例的圆柱为3层结构。Embodiment 2: The cylinder of this embodiment has a three-layer structure.
步骤1：采用沉积工艺，以导电介质层和绝缘介质层交错重叠的方式，设置预定层数的导电介质层和绝缘介质层，形成基础结构体，图3为基础结构体的立体示意图，图4为俯视图。Step 1: A deposition process is used to arrange the conductive dielectric layer and the insulating dielectric layer in a staggered manner to set a predetermined number of conductive dielectric layers and insulating dielectric layers to form a basic structure. FIG. 3 is a schematic perspective view of the basic structure, and FIG. 4 Is a top view.
步骤2：用掩膜定义，并用深井刻蚀工艺刻蚀出贯穿基础结构体顶层到底层的隔离槽50，形成两个交错的指叉结构，所述指叉结构包括至少两个指条和一个公共连接条，同一指叉结构中的各指条皆与该指叉结构中的公共连接条相接，并在隔离槽中填充绝缘介质。在图5中，51、52、53、54为指条，55和56为公共连接条，指条51、53与公共连接条55形成第一个指叉结构，指条52、54与公共连接条56形成第二个指叉结构，两个指叉结构的指条交错排列，如图5。Step 2: Define with a mask and use deep-well etching to etch the isolation trenches 50 that run through the top to bottom of the basic structure to form two interdigitated interdigitated structures, which include at least two fingers and one Common connection bar, each finger bar in the same finger structure is connected with the common connection bar in the finger structure, and an insulation medium is filled in the isolation groove. In FIG. 5, 51, 52, 53, 54 are finger bars, 55 and 56 are public connection bars, the finger bars 51, 53 and the public connection bar 55 form the first interdigitated structure, and the finger bars 52, 54 are connected to the public The strip 56 forms a second finger structure, and the fingers of the two finger structure are staggered, as shown in FIG. 5.
步骤3：用掩膜定义，并用深井刻蚀工艺，在隔离槽处形成贯穿基础结构体顶层到底层的孔60，形成柱形孔阵列；相邻两个指条之间的区域称为指间区域，处于同一指间区域的柱形孔为同行的柱形孔，如图6。Step 3: Define with a mask and use deep-well etching to form holes 60 through the top to bottom of the basic structure at the isolation trenches to form a columnar hole array; the area between two adjacent fingers is called an inter-finger In the region, the columnar holes in the same interdigital area are the columnar holes of the same row, as shown in Figure 6.
步骤4：在用ALD工艺在柱形孔内壁生长一层厚度0.5～5nm的可编程的介质，作为第一介质层，如图7；Step 4: A layer of programmable dielectric with a thickness of 0.5 to 5 nm is grown on the inner wall of the cylindrical hole by using the ALD process as the first dielectric layer, as shown in FIG. 7;
步骤5：用ALD工艺在柱形孔内壁(即第一介质层的表面)生长一层缓冲P-多晶硅或硅，作为第二介质层，其厚度根据编程反向二极管漏电流的要求优化而定。如图8。Step 5: Use the ALD process to grow a layer of buffered P-polysilicon or silicon on the inner wall of the columnar hole (that is, the surface of the first dielectric layer) as the second dielectric layer. . See Figure 8.
步骤6：在柱形孔内壁的介质层设置完毕后，在柱形孔内部的空腔中，用ALD工艺沉积填充核心介质材料，形成核心介质材料层。所述核心介质材料为N+半导体或肖特基金属，如图9。Step 6: After the dielectric layer on the inner wall of the cylindrical hole is set, the core dielectric material is deposited and filled in the cavity inside the cylindrical hole by an ALD process to form a core dielectric material layer. The core dielectric material is an N + semiconductor or a Schottky metal, as shown in FIG. 9.
导电介质层、第一介质层、第二介质层和核心介质层的材料可采用表2中的任一组合：The materials of the conductive dielectric layer, the first dielectric layer, the second dielectric layer, and the core dielectric layer may adopt any combination in Table 2:
表2Table 2
Figure PCTCN2019105517-appb-000001
Figure PCTCN2019105517-appb-000001
实施例3Example 3
本实施例在实施例2的步骤6之后还有下述步骤：This embodiment has the following steps after step 6 in Embodiment 2:
步骤7：用掩膜定义，并用深井刻蚀工艺，在同行且相邻的两柱形孔的中心点之间设置隔离孔，隔离孔侵入与其相邻的两柱形孔，且隔离孔的边缘位于相邻两柱形孔的中心点之间，亦即，在开设了隔离孔以后，柱形孔的核心介质材料层依然保持为一个整体，参见图10；Step 7: Define it with a mask and use a deep-well etching process to set an isolation hole between the center points of two adjacent cylindrical holes adjacent to each other. The isolation hole invades the two adjacent cylindrical holes and the edge of the isolation hole. Located between the center points of two adjacent cylindrical holes, that is, after the isolation hole is opened, the core dielectric material layer of the cylindrical hole remains as a whole, see FIG. 10;
步骤8：用ALD工艺，在隔离孔中填充绝缘材料，如图11。Step 8: Use an ALD process to fill the isolation hole with insulating material, as shown in FIG. 11.
实施例2和实施例3的柱形孔是相互独立的。作为实施例4，同一行且相邻的柱形孔相互侵入，由于后续工艺中会设置隔离孔，隔离孔会将其左右两侧的柱形孔中相关介质完全隔离。侵入方的最近边缘处于侵入方中心点与被侵入方中心点之间，所述最近边缘为最靠近被侵入方中心点的边缘，以保持核心介质的完整性。参见图12和图13。图12示出了两个相邻的柱形孔的范围，图13示出了隔离孔的位置。The cylindrical holes of Examples 2 and 3 are independent of each other. As the fourth embodiment, the adjacent columnar holes in the same row invade each other. Since the isolation holes are provided in the subsequent process, the isolation holes completely isolate the relevant medium in the columnar holes on the left and right sides thereof. The closest edge of the intruder is between the center of the intruder and the center of the intruder, and the nearest edge is the edge closest to the center of the intruder to maintain the integrity of the core medium. See FIGS. 12 and 13. Figure 12 shows the range of two adjacent cylindrical holes, and Figure 13 shows the location of the isolation holes.
实施例4Example 4
本实施例是一种改进的实施例。具体包括下述步骤：This embodiment is an improved embodiment. It includes the following steps:
1：形成基础结构体的步骤：以导电介质层和绝缘介质层交错重叠的方式，设置预定层数的导电介质层和绝缘介质层，形成基础结构体；此步骤与实施例2相同。1: Step of forming a basic structure: a predetermined number of conductive medium layers and insulating medium layers are provided in a manner that the conductive medium layer and the insulating medium layer are alternately overlapped to form a basic structure; this step is the same as that of the second embodiment.
2：用掩膜定义，并用深井刻蚀工艺，在基础结构体上设置贯穿基础结构体顶层到底层的孔，形成柱形孔阵列；相邻两行柱形孔之间为指条区域，如图14。2: Define with a mask and use deep-well etching to set holes on the basic structure that run through the top to bottom of the basic structure to form a columnar hole array; between two adjacent rows of columnar holes is a finger area, such as Figure 14.
3.用ALD工艺在柱形孔内壁表面上长一层0.5～5nm的可编程的介质形成第一介质层，如图15。3. An ALD process is used to form a first dielectric layer with a layer of 0.5 to 5 nm on the surface of the inner wall of the cylindrical hole, as shown in FIG. 15.
4.用ALD工艺在柱形孔内第一介质层表面上长一层层缓冲P-多晶硅或硅，形成第二介质层，其厚度根据编程反向二极管漏电流的要求优化而定。如图16。4. The ALD process is used to grow a layer of buffer P-polysilicon or silicon on the surface of the first dielectric layer in the columnar hole to form a second dielectric layer, the thickness of which is optimized according to the requirements of the programmed reverse diode leakage current. See Figure 16.
5.柱形孔内壁的介质层设置完毕后，在柱形孔内部的空腔中填充核心介质材料，例如N+半导体或硅，或肖特基金属，形成核心介质材料层；如图17。5. After the dielectric layer on the inner wall of the cylindrical hole is set, the cavity inside the cylindrical hole is filled with a core dielectric material, such as N + semiconductor or silicon, or Schottky metal, to form the core dielectric material layer; as shown in FIG. 17.
6.在同一行的相邻两柱形孔之间以及每一行柱形孔的左右两端设置隔离孔，所述隔离孔侵入其两侧的柱形孔内的核心介质材料层，并在各指条区域左右两个端部中按行交替择一设置隔离槽，形成两个交错的指叉结构，如图18。6. Isolation holes are provided between adjacent two cylindrical holes in the same row and the left and right ends of each row of cylindrical holes, the isolation holes penetrate the core dielectric material layer in the cylindrical holes on both sides, and The left and right ends of the finger strip area are alternately arranged with isolation grooves in rows to form two interdigitated finger prong structures, as shown in FIG. 18.
7.在所述隔离槽和隔离孔中填充绝缘介质。如图19。7. Fill the isolation trench and the isolation hole with an insulating medium. See Figure 19.
实施例5Example 5
相较于实施例2、3，本实施例的指叉结构最终是通过在指条的端部钻孔形成，区别于实施例2、3的先以隔离槽形成完整指叉结构的方式。参见图20。Compared with Embodiments 2 and 3, the finger structure of this embodiment is finally formed by drilling holes at the ends of the finger strips, which is different from the method of forming the complete finger structure with isolation grooves in Embodiments 2 and 3. See Figure 20.
在指条端部的孔可以是作为存储单元的柱形孔，也可以是隔离孔。前者相当于扩展了存储单元的数量。The hole at the end of the finger can be a cylindrical hole as a storage unit, or it can be an isolation hole. The former is equivalent to expanding the number of storage units.

Claims (11)

  1. 可编程存储器的制备方法，其特征在于，包括下述步骤：The method for preparing a programmable memory is characterized by including the following steps:
    1)形成基础结构体的步骤：以导电介质层和绝缘介质层交错重叠的方式，设置预定层数的导电介质层和绝缘介质层，形成基础结构体；1) The step of forming the basic structure: setting the conductive medium layer and the insulating medium layer in a predetermined number of layers in a manner that the conductive medium layer and the insulating medium layer alternately overlap to form the basic structure;
    2)在基础结构体上形成指叉结构的步骤：通过设置贯穿基础结构体顶层到底层的分割结构，将基础结构体分为两个交错的指叉结构，所述指叉结构包括至少两个指条和一个公共连接条，同一指叉结构中的各指条皆与该指叉结构中的公共连接条相接；所述分割结构包括柱形孔阵列和填充有绝缘材料的隔离槽；相邻两个指条之间的区域称为指间区域，处于同一指间区域的柱形孔为同行的柱形孔；2) The step of forming a finger structure on the basic structure: divide the basic structure into two interdigitated finger structures by setting a split structure that runs through the top to the bottom of the basic structure, and the finger structure includes at least two Finger strip and a common connection strip, each finger strip in the same interdigitation structure is connected with the common connection strip in the interdigitation structure; the divided structure includes a columnar hole array and an isolation groove filled with an insulating material; The area between two adjacent fingers is called the inter-finger area, and the cylindrical holes in the same inter-finger area are the same cylindrical holes;
    3)形成柱形存储单元的步骤：按照预设的存储器的结构，在柱形孔内壁逐层设置所需的各中间层介质材料，最后在柱形孔内填充核心介质材料，形成核心介质材料层。3) Steps of forming a cylindrical storage unit: According to a preset memory structure, the required intermediate layer dielectric materials are arranged layer by layer on the inner wall of the cylindrical hole, and finally the core dielectric material is filled in the cylindrical hole to form the core dielectric material Floor.
  2. 如权利要求1所述的可编程存储器的制备方法，其特征在于，The method for manufacturing a programmable memory according to claim 1, wherein:
    所述步骤3)中，预设的存储器为：PN结型半导体存储器、肖特基二极管型存储器或记忆介质存储器；In the step 3), the preset memory is: a PN junction semiconductor memory, a Schottky diode memory, or a memory medium memory;
    所述记忆介质存储器为阻变存储器、磁变存储器、相变存储器或铁电存储器。The memory medium memory is a resistance change memory, a magnetic change memory, a phase change memory, or a ferroelectric memory.
  3. 如权利要求1所述的可编程存储器的制备方法，其特征在于，所述步骤2)中，各柱形孔相互分离。The method of claim 1, wherein in the step 2), the cylindrical holes are separated from each other.
  4. 如权利要求1所述的可编程存储器的制备方法，其特征在于，所述步骤2)包括：The method of claim 1, wherein the step 2) comprises:
    2a.通过设置贯穿基础结构体顶层到底层的隔离槽，将基础结构体分为两个交错的指叉结构，所述指叉结构包括至少两个指条和一个公共连接条，同一指叉结构中的各指条皆与该指叉结构中的公共连接条相接；2a. The base structure is divided into two interdigitated interdigitated structures by providing isolation grooves that run through the top layer to the bottom layer of the basic structure. The interdigitated structure includes at least two finger bars and a common connection bar. Each finger in the finger is connected to the common connection bar in the finger structure;
    2b.在隔离槽中填充绝缘材料；2b. Fill the isolation tank with insulating material;
    2c.在隔离槽处钻孔，形成贯穿基础结构体顶层到底层的柱形孔，所述柱形孔侵入其两侧的指叉结构中的各层导电介质层和各层绝缘介质层。2c. Drill holes at the isolation grooves to form columnar holes penetrating from the top layer to the bottom layer of the basic structure, the columnar holes invading each of the conductive dielectric layers and each insulating dielectric layer in the finger structure on both sides thereof.
  5. 如权利要求1所述的可编程存储器的制备方法，其特征在于，所述步骤2)包括下述步骤：The method of claim 1, wherein the step 2) comprises the following steps:
    在同行且相邻的两柱形孔的中心点之间设置隔离孔，隔离孔侵入与其相邻的两柱形孔，且隔离孔的边缘位于相邻两柱形孔的中心点之间；然后在隔离孔中填充绝缘材料。An isolation hole is provided between the center points of the two adjacent cylindrical holes that are adjacent to each other, the isolation hole penetrates into the adjacent two cylindrical holes, and the edge of the isolation hole is located between the center points of the adjacent two cylindrical holes; Fill the isolation holes with insulating material.
  6. 如权利要求4所述的可编程存储器的制备方法，其特征在于，所述步骤2)中，在柱形孔阵列中，同一行且相邻的柱形孔相互侵入，侵入方的最近边缘处于侵入方中心点与被侵入方中心点之间，所述最近边缘为最靠近被侵入方中心点的边缘。The method for preparing a programmable memory according to claim 4, wherein in the step 2), in the columnar hole array, adjacent columnar holes in the same row and adjacently invade each other, and the closest edge of the intruder is at Between the center point of the intruder and the center point of the intruder, the nearest edge is the edge closest to the center point of the intruder.
  7. 如权利要求1所述的可编程存储器的制备方法，其特征在于，各步骤顺序为：The method for preparing a programmable memory according to claim 1, wherein the sequence of each step is:
    A)形成基础结构体的步骤：以导电介质层和绝缘介质层交错重叠的方式，设置预定层数的导电介质层和绝缘介质层，形成基础结构体；A) Step of forming a basic structure: setting a predetermined number of conductive medium layers and insulating medium layers in a manner that the conductive medium layer and the insulating medium layer are staggered to form a basic structure body;
    B)在基础结构体上形成指叉结构的步骤：B) The steps of forming a finger structure on the basic structure:
    B1.通过设置贯穿基础结构体顶层到底层的隔离槽，将基础结构体分为两个交错的指叉结构，所述指叉结构包括至少两个指条和一个公共连接条，同一指叉结构中的各指条皆与该指叉结构中的公共连接条相接；B1. The base structure is divided into two interdigitated interdigitated structures by providing isolation grooves that run through the top layer to the bottom layer of the basic structure. The interdigitated structure includes at least two finger bars and a common connecting bar. The same finger structure Each finger in the finger is connected to the common connection bar in the finger structure;
    B2.在隔离槽中填充绝缘介质；B2. Fill the isolation tank with insulation medium;
    B3.在隔离槽处形成贯穿基础结构体顶层到底层的孔，形成柱形孔阵列；相邻两个指条之间的区域称为指间区域，处于同一指间区域的柱形孔为同行的柱形孔；B3. Form a hole through the top to bottom of the basic structure at the isolation groove to form a columnar hole array; the area between two adjacent fingers is called the interdigital area, and the cylindrical holes in the same interdigital area are the same Cylindrical hole
    C)形成柱形存储单元的步骤：按照预设的存储器的结构，在柱形孔内壁逐层设置所需的各中间层介质材料，最后在柱形孔内填充核心介质材料，形成核心介质材料层。C) Steps of forming a cylindrical storage unit: According to a preset memory structure, the required intermediate layer dielectric materials are arranged layer by layer on the inner wall of the cylindrical hole, and finally the core dielectric material is filled in the cylindrical hole to form the core dielectric material. Floor.
  8. 如权利要求1所述的可编程存储器的制备方法，其特征在于，按顺序为以下步骤：The method for preparing a programmable memory according to claim 1, wherein the steps are as follows:
    Ⅰ)形成基础结构体的步骤：以导电介质层和绝缘介质层交错重叠的方式，设置预定层数的导电介质层和绝缘介质层，形成基础结构体；Ⅰ) Forming a basic structure: setting a predetermined number of conductive dielectric layers and insulating dielectric layers in such a manner that the conductive dielectric layer and the insulating dielectric layer overlap each other to form a basic structural body;
    Ⅱ)在基础结构体上形成指叉结构雏形和柱形存储单元的步骤：Ⅱ) Steps of forming a finger-shaped structure and a cylindrical storage unit on the basic structure:
    Ⅱ1.在基础结构体上设置贯穿基础结构体顶层到底层的孔，形成柱形孔阵列；相邻两行柱形孔之间为指条区域；Ⅱ1. Set holes on the basic structure body that penetrate the top to bottom of the basic structure body to form a columnar hole array; between two adjacent rows of columnar holes is a finger area;
    Ⅱ2.按照预设的存储器的结构，在柱形孔内壁逐层设置所需的各中间层介质材料，最后在柱形孔内填充核心介质材料，形成核心介质材料层；Ⅱ2. According to the preset memory structure, the required intermediate layer dielectric materials are arranged layer by layer on the inner wall of the columnar hole, and finally the core medium material is filled in the columnar hole to form the core medium material layer;
    Ⅲ)形成指叉结构：在同一行的相邻两柱形孔之间以及每一行柱形孔的左右两端设置隔离孔，所述隔离孔侵入其两侧的柱形孔内的核心介质材料层，并在各指条区域左右两个端部中按行交替择一设置隔离槽，形成两个交错的指叉结构，并在所述隔离槽和隔离孔中填充绝缘介质。Ⅲ) Form a finger structure: Isolation holes are provided between two adjacent cylindrical holes in the same row and left and right ends of each column of cylindrical holes, and the isolation holes penetrate the core dielectric material in the cylindrical holes on both sides thereof. Layer, and in the left and right ends of each finger strip area, alternately set one isolation groove in a row to form two interdigitated interdigitated structures, and fill the isolation groove and the isolation hole with an insulating medium.
  9. 如权利要求1所述的可编程存储器的制备方法，其特征在于，所述隔离槽和隔离孔中的绝缘介质为二氧化硅或空气。The method for preparing a programmable memory according to claim 1, wherein the insulation medium in the isolation trench and the isolation hole is silicon dioxide or air.
  10. 如权利要求1、2、3、4、5、6、7、8或9所述的可编程存储器的制备方法，其特征在于，在柱形孔内壁设置的中间层为第一介质层，导电介质层、第一介质层和核心介质层的材料为下述组合之一：The method for preparing a programmable memory according to claim 1, 2, 3, 4, 5, 6, 7, 8, or 9, wherein the intermediate layer provided on the inner wall of the cylindrical hole is a first dielectric layer and is conductive The material of the dielectric layer, the first dielectric layer, and the core dielectric layer is one of the following combinations:
     Zh 导电介质层Conductive dielectric layer 第一介质层First dielectric layer 核心介质层Core dielectric layer 组合1Combination 1 P型半导体P-type semiconductor 绝缘介质Insulation medium N型半导体N-type semiconductor 组合2Combination 2 N型半导体N-type semiconductor 绝缘介质Insulation medium P型半导体P-type semiconductor 组合3Combination 3 肖特基金属Schottky metal 绝缘介质Insulation medium 半导体semiconductor
    组合4 半导体 绝缘介质 肖特基金属 组合5 导体 记忆介质 导体
    。     Combination 4 semiconductor Insulation medium Schottky metal Combination 5 conductor Memory medium conductor
    .
  11. 如权利要求1、2、3、4、5、6、7、8或9所述的可编程存储器的制备方法，其特征在于，在柱形孔内壁设置的中间层包括第一介质层和第二介质层，第一介质层设置于柱形孔内壁，第二介质层设置于第一介质层的内壁，导电介质层、第一介质层、第二介质层和核心介质层的材料为下述组合之一：The method for preparing a programmable memory according to claim 1, 2, 3, 4, 5, 6, 7, 8, or 9, wherein the intermediate layer provided on the inner wall of the cylindrical hole includes a first dielectric layer and a first layer. Two dielectric layers. The first dielectric layer is disposed on the inner wall of the columnar hole. The second dielectric layer is disposed on the inner wall of the first dielectric layer. The materials of the conductive dielectric layer, the first dielectric layer, the second dielectric layer, and the core dielectric layer are as follows. One of the combinations:
    Figure PCTCN2019105517-appb-100001
    Figure PCTCN2019105517-appb-100001
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