WO2020038554A1 - Forming a semiconductor device with heat conduction layers formed by laser direct structuring - Google Patents

Forming a semiconductor device with heat conduction layers formed by laser direct structuring Download PDF

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Publication number
WO2020038554A1
WO2020038554A1 PCT/EP2018/072459 EP2018072459W WO2020038554A1 WO 2020038554 A1 WO2020038554 A1 WO 2020038554A1 EP 2018072459 W EP2018072459 W EP 2018072459W WO 2020038554 A1 WO2020038554 A1 WO 2020038554A1
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WO
WIPO (PCT)
Prior art keywords
conducting layer
heat conducting
lds
electronic assembly
microelectronic component
Prior art date
Application number
PCT/EP2018/072459
Other languages
French (fr)
Inventor
Stefan Martens
Original Assignee
Huawei Technologies Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huawei Technologies Co., Ltd. filed Critical Huawei Technologies Co., Ltd.
Priority to PCT/EP2018/072459 priority Critical patent/WO2020038554A1/en
Publication of WO2020038554A1 publication Critical patent/WO2020038554A1/en

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    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293—Organic, e.g. plastic
    • H01L23/295—Organic, e.g. plastic containing a filler
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    • H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
    • H01L23/4334—Auxiliary members in encapsulations
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Definitions

  • the present disclosure in some embodiments thereof, relates to electronic assemblies and, more specifically, but not exclusively, to heat conductivity in electronic assemblies.
  • thermal interface material for instance a thermal gasket, thermal grease, conductive and non-conductive glue, and/or the like.
  • TIM thermal interface material
  • the thermal conductivity is in a range of between 3 and 5 Watts per meter- Kelvin, W/mK.
  • Metals have higher thermal conductivity in the range of between 50 and 400 W/mK are preferred for the thermal management of high-power applications.
  • an electronic assembly that comprises a circuit board, a microelectronic component, such as a small power- amplifier chip, mounted above or in the circuit board and connected to the circuit board by a plurality of interconnections, the microelectronic component is embedded, at least in part, in a Laser Direct Structuring, LDS, suitable epoxy molding compound comprising a plurality of laser activatable particles and a heat conducting layer formed on top and along the LDS suitable epoxy molding compound by an LDS process.
  • the microelectronic component may be a FlipChip so the plurality of interconnections are a plurality of soldered bumps. Alternatively the plurality of interconnections are wires formed in a wire bonding process.
  • a method of manufacturing an electronic assembly such as the above reviewed electronic assembly.
  • the method is based on connecting a microelectronic component above a circuit board by a plurality of interconnections, embedding the microelectronic component, at least in part, in a LDS suitable epoxy molding compound comprising a plurality of laser activatable particles, and forming a heat conducting layer above the LDS suitable epoxy molding compound by activating at least some of the laser activatable particles in an LDS process.
  • the forming of the heat conducting layer on top and along the LDS suitable epoxy molding compound by an LDS process may assist in increasing the thermal conductivity of high-power devices, such as FlipChip based devices and solve the problem of low thermal conductivity of plastic packages.
  • the heat conducting layer is molded as a single plate with a plurality of protrusions interconnecting the plate to the microelectronic component to provide a vertical interconnect access.
  • the heat conducting layer is physically disconnected from the microelectronic component.
  • the heat conducting layer is molded as a single plate with a plurality of protrusions sized to provide a partial vertical interconnect access between the heat conducting layer and the microelectronic component.
  • the heat conducting layer embodies a radio frequency, RF, antenna and/or includes an RF antenna formed on top of the LDS suitable epoxy molding compound by the LDS process.
  • the RF antenna and the head conducting layer can be generated by the LDS process, for example in a single manufacturing session.
  • the electronic assembly includes one or more active cooling elements each extended along and above the heat conducting layer and/or along and below the circuit board. This provides an additional heat management tool.
  • the heat conducting layer having a typical range of LDS metallization thickness in a range between 5 and 20 micrometer.
  • the thickness of the heat conducting layer is in a range between 20 and 2000 micrometer.
  • the electronic assembly further includes an additional layer extended to cover at least some of the heat conducting layer and comprising Stannum, Argentum, Palladium and/or Gold. This provides an additional heat management tool.
  • the heat conducting layer is formed by electroplating process and/or an electroless galvanic plating process.
  • FIGs. 1A-1G are schematic illustrations of an electronic assembly in various configurations, according to some embodiments of the present disclosure.
  • FIG. 2 is a method of manufacturing an electronic assembly in any of various configurations, for example any of the configurations depicted in FIGs. 1A-1H, according to some embodiments of the present disclosure;
  • FIG. 3A is a table comparing heat conductivity of a known electronic assembly and electronic assemblies formed according to some embodiments of the present disclosure
  • FIG. 3B is an electronic assembly having a state-of-the-Art, SotA, thermal interface material, TIM, directly on an exposed Si-backside.
  • the present disclosure in some embodiments thereof, relates to electronic assemblies and, more specifically, but not exclusively, to heat conductivity in electronic assemblies.
  • a microelectronic component embedded, at least in part, in a LDS suitable epoxy molding compound and a heat conducting layer formed on top and along the LDS suitable epoxy molding compound by an LDS process.
  • This provide a solution heat conductivity in power amplifiers, PAs, and millimeter wave, mmW, devices having high power densities.
  • the microelectronic component may be a FlipChip or a wire bond packaging.
  • LDMOS Silicon-based laterally diffused metal oxide semiconductor
  • power amplifiers have a power density of around 1 W/mm 2 .
  • Gallium Nitride, GaN, on silicon, GaN-on-Si, or GaN-on-Silicon carbide, GaN-on-SiC technologies have high power densities of 5-10 W/mm2.
  • FlipChip are usually used instead of wirebond chips as wirebond chips are acting as antennas, causing high losses and have isolation and cross-talk problems. Since FlipChip do not have a good thermal connection to the substrate as wirebond, the heat management of FlipChip package is challenging. Also, due to cost reasons there is clear trend to use epoxy molding compound for high-frequency and mmW packages since the relative costs are much lower than for a ceramic flange package. Therefore, a technical problem of thermal management for high-power devices, such as FlipChip based devices, are addressed by embodiments of the present application. Also the low thermal conductivity of plastic packages is also addressed.
  • FIGs. 1A-12G are schematic illustrations of an electronic assembly 100 in various configurations, according to some embodiments of the present disclosure.
  • the electronic assembly 100 includes a substrate such as a circuit board 101, for example a printed circuit board, PCB, having a microelectronic component 102, such as a semiconductor integrated circuit, IC, mounted thereabove or therein.
  • the microelectronic component 102 is connected to the circuit board by a plurality of interconnections 103, such as wires (e.g. wire bonding) or soldered bumps (e.g. FlipChip).
  • the microelectronic component 102 is embedded, at least in part, in a molding compound 104, such as an FDS suitable epoxy molding compound.
  • the molding compound 104 includes laser activatable particles.
  • the molding compound 104 is an epoxy molding compound that overmolds the microelectronic component 102 and contains FDS seed particles which are activated by laser activation of an FDS process.
  • the electronic assembly 100 has a heat conducting layer 105 formed on top and/or along the molding compound 104 by an FDS process.
  • the heat conducting layer 105 is applied by metal plating such as electroplating or an electroless galvanic plating process.
  • the heat conducting layer 105 is depicted as a block with a pattern of inclined lines.
  • the forming of the heat conducting layer 105 allows spreading thermal losses of the microelectronic component 102, for instance a small power-amplifier chip (e.g. below few mm 2 for instance 1 mm 2 ), over the molding compound 104 that has a larger area than the area of the microelectronic component 102 (e.g. several 10 mm 2 ⁇ several 100 mm 2 or more).
  • a thermal path from a microelectronic component 102 such as a FlipChip chip, towards the heat conducting layer 105 is a pure metal connection and heat spreads over a much larger area than the area of the microelectronic component 102.
  • the heat conducting layer 105 is a single plate.
  • the heat conducting layer 105 is divided to a plurality of segments which are not connected to one another by any metallic connection or bridge.
  • the heat conducting layer 102 is formed as a single mold having a plate 105A with a plurality of protmsions 105B interconnecting the plate 105A to the microelectronic component 102 to provide a vertical interconnect access.
  • Such plurality of protrusions 105B may be also formed during the LDS process.
  • the heat conducting layer 105 is physically disconnected from the microelectronic component 102.
  • the heat conducting layer 105 is a single mold having a plate with a plurality of protrusions sized to provide a partial vertical interconnect access between the heat conducting layer and the microelectronic component.
  • the heat conducting layer 105 as a whole or one or more of the segments of the heat conducting layer 105, for example as depicted in FIG. 1D, embodies an RF antenna 141.
  • the RF antenna 141 is formed on top of the molding compound 104 by the LDS process.
  • the RF antenna 141 is formed at least partly in the molding compound 104 by the LDS process.
  • the electronic assembly 101 includes an upper active cooling element 151.
  • the upper active cooling element 151 extends along and above the heat conducting layer 102.
  • the electronic assembly 101 includes a lower active cooling element 152.
  • the lower active cooling element 152 extends along and below the circuit board 101.
  • the heat conducting layer 102 thickness is in a range between 5 and 20 micrometer.
  • the heat conducting layer 102 thickness is in a range between 20 and 2000 micrometer.
  • the electronic assembly 101 further includes an additional layer extended to cover at least some of the heat conducting layer 105.
  • the additional layer is optionally made of Stannum, Argentum, Palladium and/or Gold.
  • FIG. 2 is a flowchart of a method of manufacturing an electronic assembly as described above, for example as depicted in FIGs. 1A-1G, according to some embodiments of the present disclosure.
  • a microelectronic component such as 102
  • a circuit board such as 101
  • a plurality of interconnections for instance by a FlipChip process or wire bonding.
  • the microelectronic component is embedded, at least in part, in a molding compound, such as 104, for instance an LDS suitable epoxy molding compound that includes a plurality of laser activatable particles.
  • a heat conducting layer such as 105, is formed above the molding compound by activating at least some of the laser activatable particles in an LDS process.
  • the forming involves an electroplating process and/or electroless galvanic plating process.
  • a plurality of protmsions physically connecting a plate of the heat conducting layer to the microelectronic component are formed by the LDS process, for example as depicted in FIG. 1A.
  • a plurality of protrusions perpendicular to a plate of the heat conducting layer and extended toward the microelectronic component are formed by the LDS process.
  • these protrusions are not physically connecting the plate to the microelectronic component.
  • a separated RF antenna is formed on top of the molding compound by the LDS process, for instance as depicted in FIG. 1D.
  • the heat conducting layer is connected to a receiver module so as to be used as an RF antenna of the connected receiver module.
  • FIG. 3A is a table comparing heat conductivity of electronic assemblies having different heat conductivity solutions.
  • the microelectronic component is a FlipChip chip having a 1 mm 2 chip size and 1W / 3W / 4.8W dissipated power. The comparison was between an electronic assembly having a state-of-the- Art, SotA, thermal interface material, TIM, directly on an exposed Si-backside as depicted in FIG.
  • FIG. 3B 3B and two different electronic assemblies, each formed as described above with reference to FIG. 1A.
  • One of these electronic assemblies has a heat conducting layer formed in an LDS process with 3mm x 3mm heat conducting layer area and the other has a heat conducting layer formed in an LDS process with lOmm x lOmm heat conducting layer area. It can be clearly seen in the table depicted in FIG.
  • the conventional electronic assembly with the TIM does not even dissipate power of 1 W while for the calculation with 4.8 W the calculated Tj is 451 Celsius and the electronic assembly according to some embodiments of the present disclosure with a 3mm x 3mm heat conducting layer area gives 82% lower R lh (154 Celsius) and with a lOmm x lOmm heat conducting layer area gives 91% lower R th (119 Celsius).
  • the term“about” refers to ⁇ 10 %.
  • the terms“comprises”,“comprising”,“includes”,“including”,“having” and their conjugates mean“including but not limited to”. This term encompasses the terms“consisting of’ and“consisting essentially of’.
  • composition or method may include additional ingredients and/or steps, but only if the additional ingredients and/or steps do not materially alter the basic and novel characteristics of the claimed composition or method.
  • the singular form“a”,“an” and“the” include plural references unless the context clearly dictates otherwise.
  • the term“a compound” or“at least one compound” may include a plurality of compounds, including mixtures thereof.
  • range format is merely for convenience and brevity and should not be constmed as an inflexible limitation on the scope of the disclosure. Accordingly, the description of a range should be considered to have specifically disclosed all the possible subranges as well as individual numerical values within that range. For example, description of a range such as from 1 to 6 should be considered to have specifically disclosed subranges such as from 1 to 3, from 1 to 4, from 1 to 5, from 2 to 4, from 2 to 6, from 3 to 6 etc., as well as individual numbers within that range, for example, 1, 2, 3, 4, 5, and 6. This applies regardless of the breadth of the range.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
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Abstract

An electronic assembly 100 that comprises a circuit board 101, a microelectronic component 102 mounted above or in the circuit board 100 and connected to the circuit board 100 by a plurality of interconnections103, the microelectronic component 102 is embedded, at least in part, in a Laser Direct Structuring, LDS, suitable epoxy molding compound 104 5 comprising a plurality of laser activatable particles, and a heat conducting layer 105 formed on top and along the LDS suitable epoxy molding compound 104 by an LDS process.

Description

FORMING A SEMICONDUCTOR DEVICE WITH HEAT CONDUCTION LAYERS FORMED BY LASER DIRECT STRUCTURING
BACKGROUND
The present disclosure, in some embodiments thereof, relates to electronic assemblies and, more specifically, but not exclusively, to heat conductivity in electronic assemblies.
There are various solutions and approaches to control temperature in high-power devices; however, the majority of solutions are based on thermal interface material, TIM, for instance a thermal gasket, thermal grease, conductive and non-conductive glue, and/or the like. Usually when TIM is used, the thermal conductivity is in a range of between 3 and 5 Watts per meter- Kelvin, W/mK. Metals have higher thermal conductivity in the range of between 50 and 400 W/mK are preferred for the thermal management of high-power applications.
SUMMARY
According to a first possible embodiment of the present disclosure there is provided an electronic assembly that comprises a circuit board, a microelectronic component, such as a small power- amplifier chip, mounted above or in the circuit board and connected to the circuit board by a plurality of interconnections, the microelectronic component is embedded, at least in part, in a Laser Direct Structuring, LDS, suitable epoxy molding compound comprising a plurality of laser activatable particles and a heat conducting layer formed on top and along the LDS suitable epoxy molding compound by an LDS process. The microelectronic component may be a FlipChip so the plurality of interconnections are a plurality of soldered bumps. Alternatively the plurality of interconnections are wires formed in a wire bonding process.
According to a second possible embodiment of the present disclosure there is provided a method of manufacturing an electronic assembly such as the above reviewed electronic assembly. The method is based on connecting a microelectronic component above a circuit board by a plurality of interconnections, embedding the microelectronic component, at least in part, in a LDS suitable epoxy molding compound comprising a plurality of laser activatable particles, and forming a heat conducting layer above the LDS suitable epoxy molding compound by activating at least some of the laser activatable particles in an LDS process.
The forming of the heat conducting layer on top and along the LDS suitable epoxy molding compound by an LDS process may assist in increasing the thermal conductivity of high-power devices, such as FlipChip based devices and solve the problem of low thermal conductivity of plastic packages.
Optionally, in any of the first and second embodiments, the heat conducting layer is molded as a single plate with a plurality of protrusions interconnecting the plate to the microelectronic component to provide a vertical interconnect access. This simplified the manufacturing process, facilitating the connection of the microelectronic component to the heat conducting layer while the heat conducting layer is formed. Alternatively, the heat conducting layer is physically disconnected from the microelectronic component. For example, the heat conducting layer is molded as a single plate with a plurality of protrusions sized to provide a partial vertical interconnect access between the heat conducting layer and the microelectronic component.
Optionally, in any of the first and second embodiments, the heat conducting layer embodies a radio frequency, RF, antenna and/or includes an RF antenna formed on top of the LDS suitable epoxy molding compound by the LDS process. In such a manner, the RF antenna and the head conducting layer can be generated by the LDS process, for example in a single manufacturing session.
Additionally or alternatively, the electronic assembly includes one or more active cooling elements each extended along and above the heat conducting layer and/or along and below the circuit board. This provides an additional heat management tool.
Optionally, in any of the first and second embodiments, the heat conducting layer having a typical range of LDS metallization thickness in a range between 5 and 20 micrometer. Alternatively, the thickness of the heat conducting layer is in a range between 20 and 2000 micrometer. Optionally, the electronic assembly further includes an additional layer extended to cover at least some of the heat conducting layer and comprising Stannum, Argentum, Palladium and/or Gold. This provides an additional heat management tool.
Optionally, in any of the first and second embodiments, the heat conducting layer is formed by electroplating process and/or an electroless galvanic plating process.
Unless otherwise defined, all technical and/or scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the disclosure pertains. Although methods and materials similar or equivalent to those described herein can be used in the practice or testing of embodiments of the disclosure, exemplary methods and/or materials are described below. In case of conflict, the patent specification, including definitions, will control. In addition, the materials, methods, and examples are illustrative only and are not intended to be necessarily limiting.
BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS
Some embodiments of the disclosure are herein described, by way of example only, with reference to the accompanying drawings. With specific reference now to the drawings in detail, it is stressed that the particulars shown are by way of example and for purposes of illustrative discussion of embodiments of the disclosure. In this regard, the description taken with the drawings makes apparent to those skilled in the art how embodiments of the disclosure may be practiced.
In the drawings:
FIGs. 1A-1G are schematic illustrations of an electronic assembly in various configurations, according to some embodiments of the present disclosure;
FIG. 2 is a method of manufacturing an electronic assembly in any of various configurations, for example any of the configurations depicted in FIGs. 1A-1H, according to some embodiments of the present disclosure;
FIG. 3A is a table comparing heat conductivity of a known electronic assembly and electronic assemblies formed according to some embodiments of the present disclosure; and FIG. 3B is an electronic assembly having a state-of-the-Art, SotA, thermal interface material, TIM, directly on an exposed Si-backside.
DETAILED DESCRIPTION
The present disclosure, in some embodiments thereof, relates to electronic assemblies and, more specifically, but not exclusively, to heat conductivity in electronic assemblies.
According to some embodiments of the present disclosure there are provided methods of creating electronic assemblies and electronic assemblies having a microelectronic component embedded, at least in part, in a LDS suitable epoxy molding compound and a heat conducting layer formed on top and along the LDS suitable epoxy molding compound by an LDS process. This provide a solution heat conductivity in power amplifiers, PAs, and millimeter wave, mmW, devices having high power densities. The microelectronic component may be a FlipChip or a wire bond packaging.
Currently used Silicon-based laterally diffused metal oxide semiconductor, LDMOS, power amplifiers have a power density of around 1 W/mm2. While upcoming Gallium Nitride, GaN, on silicon, GaN-on-Si, or GaN-on-Silicon carbide, GaN-on-SiC, technologies have high power densities of 5-10 W/mm2.
FlipChip are usually used instead of wirebond chips as wirebond chips are acting as antennas, causing high losses and have isolation and cross-talk problems. Since FlipChip do not have a good thermal connection to the substrate as wirebond, the heat management of FlipChip package is challenging. Also, due to cost reasons there is clear trend to use epoxy molding compound for high-frequency and mmW packages since the relative costs are much lower than for a ceramic flange package. Therefore, a technical problem of thermal management for high-power devices, such as FlipChip based devices, are addressed by embodiments of the present application. Also the low thermal conductivity of plastic packages is also addressed.
Before explaining at least one embodiment of the disclosure in detail, it is to be understood that the disclosure is not necessarily limited in its application to the details of construction and the arrangement of the components and/or methods set forth in the following description and/or illustrated in the drawings and/or the Examples. The disclosure is capable of other embodiments or of being practiced or carried out in various ways.
Aspects of the present disclosure are described herein with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the disclosure. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer readable program instmctions.
Reference is now made to FIGs. 1A-12G which are schematic illustrations of an electronic assembly 100 in various configurations, according to some embodiments of the present disclosure. As depicted in each of the figures, for instance in FIG. 1A, the electronic assembly 100 includes a substrate such as a circuit board 101, for example a printed circuit board, PCB, having a microelectronic component 102, such as a semiconductor integrated circuit, IC, mounted thereabove or therein. The microelectronic component 102 is connected to the circuit board by a plurality of interconnections 103, such as wires (e.g. wire bonding) or soldered bumps (e.g. FlipChip). The microelectronic component 102 is embedded, at least in part, in a molding compound 104, such as an FDS suitable epoxy molding compound. The molding compound 104 includes laser activatable particles. For example, the molding compound 104 is an epoxy molding compound that overmolds the microelectronic component 102 and contains FDS seed particles which are activated by laser activation of an FDS process.
The electronic assembly 100 has a heat conducting layer 105 formed on top and/or along the molding compound 104 by an FDS process. For example, after, the microelectronic component 102 is overmolded with the molding compound 104 and the FDS seed particles are laser activated, the heat conducting layer 105 is applied by metal plating such as electroplating or an electroless galvanic plating process. The heat conducting layer 105 is depicted as a block with a pattern of inclined lines.
The forming of the heat conducting layer 105 allows spreading thermal losses of the microelectronic component 102, for instance a small power-amplifier chip (e.g. below few mm2 for instance 1 mm2), over the molding compound 104 that has a larger area than the area of the microelectronic component 102 (e.g. several 10 mm2· several 100 mm2 or more). In such embodiments, a thermal path from a microelectronic component 102 such as a FlipChip chip, towards the heat conducting layer 105 is a pure metal connection and heat spreads over a much larger area than the area of the microelectronic component 102.
Optionally, for example as depicted in FIG. 1B, the heat conducting layer 105 is a single plate. Alternatively, for example as depicted in FIG. 1D, the heat conducting layer 105 is divided to a plurality of segments which are not connected to one another by any metallic connection or bridge.
Optionally, as shown in FIG. 1A, the heat conducting layer 102 is formed as a single mold having a plate 105A with a plurality of protmsions 105B interconnecting the plate 105A to the microelectronic component 102 to provide a vertical interconnect access. Such plurality of protrusions 105B may be also formed during the LDS process.
Alternatively, for example as depicted in FIG. 1B, the heat conducting layer 105 is physically disconnected from the microelectronic component 102. In such an embodiment, there is no continuous metallic connection between the heat conducting layer 102 and the microelectronic component 102.
Alternatively, for example as depicted in FIG. 1C, the heat conducting layer 105 is a single mold having a plate with a plurality of protrusions sized to provide a partial vertical interconnect access between the heat conducting layer and the microelectronic component. In such an embodiment, there is no continuous metallic connection between the heat conducting layer 102 with the plurality of protmsions and the microelectronic component 102.
Optionally, the heat conducting layer 105 as a whole or one or more of the segments of the heat conducting layer 105, for example as depicted in FIG. 1D, embodies an RF antenna 141. Optionally, the RF antenna 141 is formed on top of the molding compound 104 by the LDS process. Optionally, the RF antenna 141 is formed at least partly in the molding compound 104 by the LDS process.
Additionally or alternatively, for example as depicted in FIG. 1E, the electronic assembly 101 includes an upper active cooling element 151. The upper active cooling element 151 extends along and above the heat conducting layer 102. Additionally or alternatively, for example as depicted in FIG. 1F, the electronic assembly 101 includes a lower active cooling element 152. The lower active cooling element 152 extends along and below the circuit board 101.
Optionally, for example as depicted in FIG. 1 A, the heat conducting layer 102 thickness is in a range between 5 and 20 micrometer. Alternatively, for example as depicted in FIG. 1G, the heat conducting layer 102 thickness is in a range between 20 and 2000 micrometer.
Optionally, the electronic assembly 101 further includes an additional layer extended to cover at least some of the heat conducting layer 105. The additional layer is optionally made of Stannum, Argentum, Palladium and/or Gold.
Reference is also made to FIG. 2 which is a flowchart of a method of manufacturing an electronic assembly as described above, for example as depicted in FIGs. 1A-1G, according to some embodiments of the present disclosure. First, as shown at 301, a microelectronic component, such as 102, is connected above a circuit board, such as 101, by a plurality of interconnections, for instance by a FlipChip process or wire bonding. Then, as shown at 302, the microelectronic component is embedded, at least in part, in a molding compound, such as 104, for instance an LDS suitable epoxy molding compound that includes a plurality of laser activatable particles. Now, as shown at 303, a heat conducting layer, such as 105, is formed above the molding compound by activating at least some of the laser activatable particles in an LDS process. Optionally the forming involves an electroplating process and/or electroless galvanic plating process.
Optionally, a plurality of protmsions physically connecting a plate of the heat conducting layer to the microelectronic component are formed by the LDS process, for example as depicted in FIG. 1A. Optionally, a plurality of protrusions perpendicular to a plate of the heat conducting layer and extended toward the microelectronic component are formed by the LDS process. For example, as depicted in FIG. 1C, these protrusions are not physically connecting the plate to the microelectronic component.
Optionally, a separated RF antenna is formed on top of the molding compound by the LDS process, for instance as depicted in FIG. 1D. Additionally or alternatively the heat conducting layer is connected to a receiver module so as to be used as an RF antenna of the connected receiver module. Reference is also made to FIG. 3A, which is a table comparing heat conductivity of electronic assemblies having different heat conductivity solutions. In this example the microelectronic component is a FlipChip chip having a 1 mm2 chip size and 1W / 3W / 4.8W dissipated power. The comparison was between an electronic assembly having a state-of-the- Art, SotA, thermal interface material, TIM, directly on an exposed Si-backside as depicted in FIG. 3B and two different electronic assemblies, each formed as described above with reference to FIG. 1A. One of these electronic assemblies has a heat conducting layer formed in an LDS process with 3mm x 3mm heat conducting layer area and the other has a heat conducting layer formed in an LDS process with lOmm x lOmm heat conducting layer area. It can be clearly seen in the table depicted in FIG. 3A that the conventional electronic assembly with the TIM does not even dissipate power of 1 W while for the calculation with 4.8 W the calculated Tj is 451 Celsius and the electronic assembly according to some embodiments of the present disclosure with a 3mm x 3mm heat conducting layer area gives 82% lower Rlh (154 Celsius) and with a lOmm x lOmm heat conducting layer area gives 91% lower Rth (119 Celsius).
The methods as described above are used in the fabrication of integrated circuit chips.
The descriptions of the various embodiments of the present disclosure have been presented for purposes of illustration, but are not intended to be exhaustive or limited to the embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terminology used herein was chosen to best explain the principles of the embodiments, the practical application or technical improvement over technologies found in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.
It is expected that during the life of a patent maturing from this application many relevant assemblies and methods will be developed and the scope of the term a circuit board, a microelectronic component and a molding compound is intended to include all such new technologies a priori.
As used herein the term“about” refers to ± 10 %. The terms“comprises”,“comprising”,“includes”,“including”,“having” and their conjugates mean“including but not limited to”. This term encompasses the terms“consisting of’ and“consisting essentially of’.
The phrase“consisting essentially of’ means that the composition or method may include additional ingredients and/or steps, but only if the additional ingredients and/or steps do not materially alter the basic and novel characteristics of the claimed composition or method.
As used herein, the singular form“a”,“an” and“the” include plural references unless the context clearly dictates otherwise. For example, the term“a compound” or“at least one compound” may include a plurality of compounds, including mixtures thereof.
The word“exemplary” is used herein to mean“serving as an example, instance or illustration”. Any embodiment described as“exemplary” is not necessarily to be constmed as preferred or advantageous over other embodiments and/or to exclude the incorporation of features from other embodiments.
The word“optionally” is used herein to mean“is provided in some embodiments and not provided in other embodiments”. Any particular embodiment of the disclosure may include a plurality of“optional” features unless such features conflict.
Throughout this application, various embodiments of this disclosure may be presented in a range format. It should be understood that the description in range format is merely for convenience and brevity and should not be constmed as an inflexible limitation on the scope of the disclosure. Accordingly, the description of a range should be considered to have specifically disclosed all the possible subranges as well as individual numerical values within that range. For example, description of a range such as from 1 to 6 should be considered to have specifically disclosed subranges such as from 1 to 3, from 1 to 4, from 1 to 5, from 2 to 4, from 2 to 6, from 3 to 6 etc., as well as individual numbers within that range, for example, 1, 2, 3, 4, 5, and 6. This applies regardless of the breadth of the range.
Whenever a numerical range is indicated herein, it is meant to include any cited numeral (fractional or integral) within the indicated range. The phrases“ranging/ranges between” a first indicate number and a second indicate number and“ranging/ranges from” a first indicate number“to” a second indicate number are used herein interchangeably and are meant to include the first and second indicated numbers and all the fractional and integral numerals therebetween.
It is appreciated that certain features of the disclosure, which are, for clarity, described in the context of separate embodiments, may also be provided in combination in a single embodiment. Conversely, various features of the disclosure, which are, for brevity, described in the context of a single embodiment, may also be provided separately or in any suitable subcombination or as suitable in any other described embodiment of the disclosure. Certain features described in the context of various embodiments are not to be considered essential features of those embodiments, unless the embodiment is inoperative without those elements.
Although the disclosure has been described in conjunction with specific embodiments thereof, it is evident that many alternatives, modifications and variations will be apparent to those skilled in the art. Accordingly, it is intended to embrace all such alternatives, modifications and variations that fall within the spirit and broad scope of the appended claims. All publications, patents and patent applications mentioned in this specification are herein incorporated in their entirety by reference into the specification, to the same extent as if each individual publication, patent or patent application was specifically and individually indicated to be incorporated herein by reference. In addition, citation or identification of any reference in this application shall not be construed as an admission that such reference is available as prior art to the present disclosure. To the extent that section headings are used, they should not be construed as necessarily limiting.

Claims

1. An electronic assembly, comprising:
a circuit board (101);
a microelectronic component (102) mounted above or in the circuit board (101) and connected to the circuit board by a plurality of interconnections (103), the microelectronic component (102) is embedded, at least in part, in a Laser Direct Structuring, LDS, suitable epoxy molding compound (104) comprising a plurality of laser activatable particles; and a heat conducting layer (105) formed on top and along the LDS suitable epoxy molding compound (104) by an LDS process.
2. The electronic assembly of claim 1 , wherein the heat conducting layer is molded as a single plate with a plurality of protrusions interconnecting the plate to the microelectronic component to provide a vertical interconnect access.
3. The electronic assembly of any one of the previous claims, wherein the heat conducting layer is physically disconnected from the microelectronic component.
4. The electronic assembly of claim 3, wherein the heat conducting layer is molded as a single plate with a plurality of protrusions sized to provide a partial vertical interconnect access between the heat conducting layer and the microelectronic component.
5. The electronic assembly of any one of the previous claims, wherein the heat conducting layer embodies a radio frequency, RF, antenna and/or further comprises an RF antenna formed on top of the LDS suitable epoxy molding compound by the LDS process.
6. The electronic assembly of any one of the previous claims, further comprising an active cooling element extended along and above the heat conducting layer.
7. The electronic assembly of any one of the previous claims, further comprising an active cooling element extended along and below the circuit board.
8. The electronic assembly of any one of the previous claims, wherein the heat conducting layer having a typical range of LDS metallization thickness in a range between 5 and 20 micrometer.
9. The electronic assembly of any one of claims 2-7, wherein a thickness of the heat conducting layer is in a range between 20 and 2000 micrometer.
10. The electronic assembly of any one of claims 2-7, further comprising an additional layer extended to cover at least some of the heat conducting layer and comprising a material selected from a group consisting of Stannum, Argentum, Palladium and Gold.
11. The electronic assembly of any one of the previous claims, wherein the
microelectronic component is a small power-amplifier chip.
12. The electronic assembly of any one of the previous claims, wherein the
microelectronic component is a FlipChip and the plurality of interconnections are a plurality of soldered bumps.
13. The electronic assembly of any one of the previous claims, wherein the
microelectronic component and the heat separator are spread over an area of at least 10 mm2.
14. A method, comprising:
connecting a microelectronic component (102) above a circuit board (101) by a plurality of interconnections (103);
embedding the microelectronic component (102), at least in part, in a Laser Direct Structuring, LDS, suitable epoxy molding compound (104) comprising a plurality of laser activatable particles;
forming a heat conducting layer (105) above the LDS suitable epoxy molding compound (104) by activating at least some of the laser activatable particles in an LDS process.
15. The method of claim 14, wherein the connecting is performed by soldering and the interconnections are plurality of bumps.
16. The method of claim 14, wherein the forming comprises forming a radio frequency, RF, antenna on top of the LDS suitable epoxy molding compound by the LDS process or connecting the heat conducting layer to be used as an RF antenna of a receiver module.
17. The method of any one of claims 14-16, wherein the forming further comprises forming, by the LDS process, a plurality of protmsions physically connecting a plate of the heat conducting layer to the microelectronic component.
18. The method of any one of claims 14-17, wherein the forming is performed by electroplating process.
19. The method of any one of claims 14-18, wherein the forming is performed by an electroless galvanic plating process.
PCT/EP2018/072459 2018-08-20 2018-08-20 Forming a semiconductor device with heat conduction layers formed by laser direct structuring WO2020038554A1 (en)

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