WO2020021197A1 - Method for producing a power electronics module - Google Patents

Method for producing a power electronics module Download PDF

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Publication number
WO2020021197A1
WO2020021197A1 PCT/FR2019/051832 FR2019051832W WO2020021197A1 WO 2020021197 A1 WO2020021197 A1 WO 2020021197A1 FR 2019051832 W FR2019051832 W FR 2019051832W WO 2020021197 A1 WO2020021197 A1 WO 2020021197A1
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WO
WIPO (PCT)
Prior art keywords
substrates
connectors
fixing
layer
layers
Prior art date
Application number
PCT/FR2019/051832
Other languages
French (fr)
Inventor
Rabih KHAZAKA
Stéphane Joseph AZZOPARDI
Donatien Henri Edouard MARTINEAU
Toni Youssef
Philippe DE-SA-COSTA
Original Assignee
Safran
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Safran filed Critical Safran
Publication of WO2020021197A1 publication Critical patent/WO2020021197A1/en

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    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4867—Applying pastes or inks, e.g. screen printing
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Definitions

  • the present invention relates to electronic power modules intended for an aeronautical application, and in particular in the manufacture of such electronic modules.
  • electronic power modules are on board, integrated for example, into converters, necessary for supplying electric power to propulsion and non-propulsion systems on board aircraft. These electronic power modules help convert electrical energy from the main network into a current and voltage suitable for these propulsion and non-propulsion systems.
  • the on-board electronic power modules include power semiconductor components, such as diodes and transistors, arranged on a ceramic substrate and connected together by electrical connectors in order to perform more electronic functions. or less complex.
  • power semiconductor components such as diodes and transistors
  • Such electronic power modules are subjected to severe environmental constraints, in particular thermal. They are therefore designed to withstand temperatures of up to 200 ° C.
  • the existing power electronic modules include heat sinks.
  • the heat sinks are arranged on the face opposite to the face on which the power semiconductor components are arranged.
  • the heat sinks are manufactured, by machining or foundry for example, independently of the rest of the electrical power module, then are fixed on a free face of at least one of the substrates.
  • a thermal interface material (known by the acronym TIM meaning Thermal Interface Material) is disposed between the substrate and the radiator, making it possible to improve the thermal coupling between the substrate and the heat sinks, and therefore to cool the substrate.
  • the TIMs used can be rigid materials (brazing or sintering for example) or flexible materials (for example a thermal grease, a silicone elastomer).
  • Rigid TIMs that is to say when the radiator is fixed to the substrate by brazing or sintering, have the advantage of having a low thermal resistance.
  • they have limited thermomechanical reliability, which turns out to be a major drawback for use in an on-board system of an aircraft near hot sources such as engines or brakes, since this reduces the life of the systems. on board and therefore increases the frequency of maintenance operations.
  • Flexible TIMs are not compatible with high temperatures, going beyond 175 ° C, and moreover have lower thermal conductivities than those of rigid TIMs.
  • the TIMs known from the prior art are not optimal for an aeronautical application, in particular in the case where the control electronics is located near heat sources such as the engine, in optics to integrate on-board systems as closely as possible.
  • the invention particularly aims to provide an electric power module adapted to the environmental constraints of an aircraft.
  • the present invention firstly relates to a method for manufacturing an electronic power module, comprising the following steps: a) providing at least two metallized ceramic substrates from at least two ceramic substrates, each of the ceramic substrates comprising two opposite faces on which a first and a second metal layer are respectively disposed;
  • thermal interface materials are no longer necessary to ensure thermal coupling with the substrate.
  • the electronic power modules obtained by this process can be integrated in environments that are highly thermally constrained (that is to say for temperatures above 175 ° C) and mechanically thanks to the elimination of TIMs limited in temperature.
  • printing the heatsinks directly on the metallized faces of the substrates makes it possible to produce heatsinks having complex and efficient geometries for cooling the electronic modules by a fluid (that is to say a gas or a liquid ).
  • the optimization of the geometry of the printed heat sinks as well as their arrangement on the two substrates also makes it possible to reduce the volume and the mass of these compared to those used in the prior art, the heat sinks obtained by this process being more efficient.
  • the shape of the printed heat sink improves the cooling, of the order of 1% to 10%. Combined with the removal of TIMs, this improvement can be revised upwards.
  • the printing of the connectors makes it possible to control the height of the printed connectors, thus facilitating the connection of components of different thicknesses.
  • the second connectors can include at least one external connector. Such a connection makes it possible to electrically connect the electronic module obtained by the method, to an electronic circuit.
  • steps b) and c) can be carried out by the selective melting of a bed of metal powder.
  • Metal additive manufacturing in particular the selective melting of a metal powder bed, thus makes it possible to manufacture heat sinks with complex geometry, optimizing the cooling of the substrates.
  • the selective melting of a metal powder bed allows the heat sinks to be printed directly on the metallized ceramic substrate.
  • the metal powder used can be chosen alone or in combination from an alloy powder and a pure metal powder.
  • the fixing layer fixing the power semiconductor components as well as the connections between them and with said free faces of the second metal layers of said at least two substrates can be chosen from among a solder, a silver paste, an epoxy-conductive material and glass loaded with silver.
  • the fixing layer may have a thickness greater than or equal to 10 ⁇ m.
  • Step e) can be followed by a step of solidifying the fixing layer by brazing or sintering or annealing.
  • Step e) can also be followed by a step f) consisting of:
  • the insulating material used during step f) can be chosen from, for example, an epoxy resin, a silicone gel and a silicone elastomer.
  • the invention also relates to an electronic power module comprising at least two metallized ceramic substrates, each comprising a first face and a second opposite face, said metallized substrates being arranged so that said second faces are arranged opposite one on the other, characterized in that heat sinks are disposed directly on each first face and in that first connectors are arranged on each second face, power semiconductor components and second connectors being disposed between these seconds faces and fixed to substrates via a fixing layer.
  • Such an electronic power module can thus, if it comprises power semiconductor components of the SiC or GaN type which can operate beyond the temperature limits of the semiconductor components of conventional power Si, can be integrated in an environment highly constrained in temperature (above 200 ° C).
  • Such electronic modules prove to be particularly advantageous, in particular for applications in aeronautics.
  • FIG. 1 is a flow diagram illustrating the method of manufacturing an electronic module according to the invention
  • Figure 2 is an illustration of the DBC process based on an AI2O3 ceramic
  • FIG. 3 is a schematic view of part of the various stages of the manufacturing process of an electronic power module according to the invention.
  • FIG. 4 illustrates an electronic power module obtained following the implementation of a manufacturing process according to the invention
  • FIG. 5 illustrates the geometries of heat sinks which can be obtained by the method according to the invention.
  • the electronic power modules include numerous power semiconductor components, such as diodes and transistors for example, providing more or less complex electrical functions.
  • FIG. 1 illustrates by means of a flowchart, a method of manufacturing an electronic power module, which can be carried on board an aircraft.
  • the first process step denoted A in FIGS. 1 and 3, aims to provide at least two metallized ceramic substrates 2 from at least two ceramic substrates 4, each of the ceramic substrates 4 comprising two opposite faces 6, 8 on which are first and second metal layers 10, 12 respectively.
  • the substrates of the electronic power modules are intended to support the power semiconductor components as well as the conductive tracks connecting the various components.
  • the substrate used is a so-called metallized ceramic substrate 2, as known from the state of the art.
  • the metallized ceramic substrate 2 is obtained by one of the following methods: Direct Bonded Copper (DBC), illustrated in FIG. 2, or Direct Bonded Aluminum (DBA) or Active Métal Brazing (AMB).
  • DBC substrates are commonly used in electronics because of their low cost. This process consists, as can be seen in FIG. 2, of fixing two layers of copper 10, 12, previously oxidized, on either side of the ceramic substrate 4 by sintering.
  • the ceramic substrate 4 can be chosen from the following materials: AI2O3, AIN and S13N4 In the example illustrated, the ceramic substrate 4 is AI2O3.
  • the attachment of the layers of copper 10, 12 (or of aluminum respectively) to the ceramic 4 is done by a specific process at high temperature under an inert atmosphere.
  • DBA substrates more recently developed, have good thermal conductivities, but are much more expensive than the DBC substrate.
  • the DBA process consists in fixing two aluminum layers on either side of a ceramic substrate, which can be chosen from the following materials: AI2O3, AIN and S13N4
  • the aluminum layers are attached by diffusion welding in transient liquid phase (Transient Liquid Phase Diffusion Bonding, TLPDB).
  • the AMB process is also known to those skilled in the art. It is a process based on a form of brazing allowing metal to be joined to ceramic without metallization.
  • the AMB substrate consists of a ceramic insulator SbN 4 (silicon nitride), on which copper is brazed by brazing under vacuum at high temperature.
  • AMB substrates have good thermal conduction and good resistance to fatigue during thermomechanical cycles, hence their use in power electronics. However, the process is more complex than the DBC and DBA processes.
  • the DBC or DBA or AMB substrates obtained have two opposite faces 8, 6 on which are disposed a first layer of metal 10 and a second layer of metal 12.
  • a 1 mm AIN metallized ceramic DBA substrate is used. This substrate 2 has on each of its faces a first and a second layer of 400pm aluminum.
  • the metallized ceramic substrate may hereinafter also be called metallized substrate.
  • the metallized ceramic substrate 2 obtained is illustrated in FIG. 3, in the first step of the method, noted A.
  • the second metal layer 12 can be discontinuous: the metal layer 12 can comprise several metallic zones.
  • the metal layer 12 comprises four zones 12a, 12b, 12c and 12d, also called tracks. These zones 12a, 12b, 12c and 12d are isolated from each other by the ceramic substrate 4 which creates an electrical discontinuity between the zones 12a, 12b, 12c and 12d.
  • the second step of the process according to the invention consists in printing heat sinks 14 on the first metal layer 10 of each of said at least two substrates 2.
  • SLM selective laser fusion technique
  • the laser has sufficient power to melt the metal powder or at least one of the constituents.
  • the metal powder is an alloy and / or pure metal powder.
  • an AISi Mgo powder . e can be used.
  • the design of heat sinks by the SLM technique is carried out by several iterations.
  • a first layer of metallic powder is deposited on the first metallic layer 10 of the metallized ceramic substrate 2.
  • a laser then scans this first layer of metallic powder according to a targeted pattern. This thus makes it possible to melt and merge the powder locally according to the intended motif.
  • a second layer is deposited and is followed by scanning by the laser according to a targeted pattern. These steps are repeated until the heat sink is obtained in the desired three-dimensional shape.
  • the thickness of the deposited layers varies between 20 and 150 ⁇ m.
  • the substrates 2, on which the heat sinks 14 are printed are included in a tray, the temperature of which can vary between approximately 20 ° C. and 200 ° C. In particular, a high temperature may prove useful in reducing the residual mechanical stresses resulting from local heating induced by the laser causing the powder to melt during the manufacturing process.
  • Figure 3 illustrates a substrate 2 on which are printed heat sinks 14.
  • the geometry of heat sinks is not limited to this example. Examples of geometry of heat sinks obtained by printing are visible in Figure 5.
  • the printing of the heat sinks 14 directly on the metallized ceramic substrates 2 makes it possible in particular to produce a variety of complex geometric patterns. Such complex geometric patterns make it possible in particular to optimize the heat exchange coefficient and the pressure drop of the air circulating in the radiator.
  • the patterns of the heat sinks are chosen to maximize the surface area for exchange with the surrounding air, while limiting their size.
  • the third step of the method consists in printing first connectors 16 on the second metal layer 12 of each of said at least two metallized ceramic substrates 2.
  • the selective melting technique is also used to manufacture, by metallic additive manufacturing, the tracks and connectors 16 on the second metallic layer 12 of metallized ceramic substrates 2.
  • This step C can, of course, be inverted with the second step B.
  • the printed connectors 16 can extend outside of the substrate 2, in order to produce connectors, called “external” connectors allowing the connection of the electronic power module to the electrical network of the aircraft.
  • the printing of the connectors 16 makes it possible in particular to control their height, thereby facilitating the connection of components of different heights as well as the filling of the interstices between the components and the connectors 16 with an insulating material.
  • FIG. 3 is illustrated an example of printing connectors 16 on one of the substrates 2.
  • these connectors 16 may be tracks, pads, sizes (height and width) different.
  • the metallized ceramic substrate 2 has on a metal layer 10 heat sinks 14, and on the other metal layer 12 of connectors 16, these elements being printed directly on the substrate 2.
  • Printing appears to be more reliable in the face of the risks of short-circuit at the level of the minimum distances between the tracks of small dimensions, of the order of 100 ⁇ m to 500 ⁇ m, compared to the methods used in the prior art. such as direct soldering or "bump".
  • This precise method also makes it possible to connect electrodes of semiconductor components of small dimensions (that is to say less than 300 ⁇ 300 mih 2 ).
  • the fourth step of the method consists in depositing a fixing layer 18 at least in part on the first connectors 16 printed on the second metallic layer 12 of each of the at least two substrates 2 .
  • the fixing layer 18 makes it possible to attach between:
  • the fixing layer 18 can be chosen from: a solder and / or silver paste and / or an epoxy-conductive material and / or glass loaded with silver.
  • the fixing layer 18 has a thickness greater than or equal to 10 ⁇ m.
  • the deposition of the fixing layer 18 can be achieved by different techniques, such as for example screen printing, injection or printing.
  • each component 19 with a power semiconductor comprises electrodes 24, 26 on at least two of its faces 28, 30. These electrodes 26 can cover the entire surface of the face 30 of the component 19 on which they are arranged: they are then called “full face” electrodes. Also, several electrodes 24 can be arranged on the same face 28 of component 19.
  • the two components 19 to power semiconductors each comprise on their underside 30 an electrode 26 "full face".
  • the two power semiconductor components 19 also include two electrodes on the upper face 28.
  • the semiconductor components are arranged between the fixing layers 18 of the two ceramic substrates metallized 2 so that the "full face” electrodes 26 are connected to the same metallized substrate 2. It is of course possible to fix each of the "full face” electrodes 26 to separate metallized ceramic substrates 2.
  • a uniform distribution of the electrodes 24, 26 between the two metallized substrates 2 allows better thermal management and limits the differential thermodynamic stresses linked to the coefficients of thermal expansion between the two metallized ceramic substrates 2.
  • the second connection 22 which in this example is an external connection, is brought into contact with the fixing layer of one of the metallized ceramic substrates.
  • a step of solidifying the fixing layer 18 is then carried out, consisting of freezing using a method such as for example, soldering, sintering or even annealing, the fixing of the elements (substrates, components 19 with power semiconductors, second connectors) between them.
  • the sixth step of the method consists in injecting an insulating material between the second metallic layers 12 said at least two substrates 2 comprising the fixing layer 18 of the electronic power components and second connectors.
  • This sixth step F consists in ensuring the insulation between the various constituent elements of the electronic power module.
  • the gaps between the substrates 2, the power semiconductor components 19, and the first 16 and second connectors are filled with an encapsulant, an insulating material which can be chosen from: an epoxy resin and / or a silicone gel and / or a silicone elastomer.
  • the encapsulant can be chosen to be resistant to temperatures greater than or equal to 200 ° C.
  • an electronic power module is obtained, as illustrated in FIG. 4.
  • Such an electronic power module therefore comprises two metallized substrates 2, each comprising a first face 20 and a second opposite 22 opposite on which are arranged respectively the metal layers 10, 12.
  • the metallized substrates 2 are arranged so that their second faces 22 are arranged opposite one another.
  • heat sinks 14 are placed directly on each first face 20 of the substrates 2 of the electronic module and connectors 16 are placed on each second face 22 of the electronic module.
  • a fixing layer is deposited on the connectors 16 of each of the substrates 2.
  • power semiconductor components 19 and external connectors are placed between the fixing layers 18 of the substrates 2.
  • the components 19 Power semiconductors include electrodes which are directly contacted with the substrate fixing layer, so that the power semiconductor components 19 are held between the two substrates.
  • the modules obtained have very good thermal performance. Indeed, with heat sinks 14 present on the two substrates 2, the cooling is done on two faces of the electronic power module.
  • the elimination of TIMs makes it possible to reduce the number of interfaces in the electronic power module, and therefore reduces the thermal resistance of the assembly, allowing better evacuation of calories to the radiator, and therefore to the outside.
  • the modules obtained can be used at high temperature. These modules are compatible with the use of power semiconductor components of the SiC and GaN type for uses above 200 ° C., thanks to the elimination of TIMs which limit the temperature of the electronic modules of the prior art. These modules are useful for applications in aeronautics, allowing the control electronics to be brought closer to hot sources (for example motors, brakes, etc.) in order to have more integrated systems and to reduce their size.
  • hot sources for example motors, brakes, etc.
  • the electronic power modules obtained can have a higher power density and volume of the converters compared to existing electronic modules, in particular thanks to the use of SiC and GaN components combined with the reduction of the overall thermal resistance of the electronic module.

Abstract

The invention relates to a method of producing a power electronics module and to a power electronics module, said method comprising the following steps: a) supplying at least two metallized ceramic substrates (2) from at least two ceramic substrates (4), every one of the ceramic substrates (4) having two opposite sides (6, 8) on each of which are disposed a first and a second metallic layer (10, 12); b) printing heat sinks (14) on the first metallic layer (10) of each of the at least two substrates (2); c) printing first connectors (16) on the second metallic layer (12) of each one of the at least two substrates (2); d) applying, on every substrate (2), a fastening layer (18) to at least a portion of the first connectors (16) printed on the second metallic layer (12) of each of the at least two substrates (2); and e) arranging power semiconductor components (19) and second connectors (22) between the second metallic layers (12) of the at least two substrates (2) in order for them to be secured in place by the fastening layers (18). Steps b) and c) can be carried out by selective laser melting (SLM) of a metal powder bed. The second connectors (22) can comprise at least one external connector (22).

Description

PROCEDE DE FABRICATION D’UN MODULE ELECTRONIQUE DE  METHOD FOR MANUFACTURING AN ELECTRONIC MODULE OF
PUISSANCE  POWER
DOMAINE FIELD
[001] La présente invention concerne les modules électroniques de puissance destinés à une application aéronautique, et en particulier sur la fabrication de tels modules électroniques. The present invention relates to electronic power modules intended for an aeronautical application, and in particular in the manufacture of such electronic modules.
CONTEXTE CONTEXT
[002] Dans le domaine de l’aéronautique, des modules électroniques de puissance sont embarqués, intégrés par exemple, à des convertisseurs, nécessaires à l’alimentation en courant électrique des systèmes propulsifs et non propulsifs à bord des aéronefs. Ces modules électroniques de puissance contribuent à convertir l’énergie électrique du réseau principal en un courant et une tension adaptés à ces systèmes propulsifs et non propulsifs. [002] In the aeronautics field, electronic power modules are on board, integrated for example, into converters, necessary for supplying electric power to propulsion and non-propulsion systems on board aircraft. These electronic power modules help convert electrical energy from the main network into a current and voltage suitable for these propulsion and non-propulsion systems.
[003] Ainsi, les modules électroniques de puissance embarqués comprennent des composants à semi-conducteurs de puissance, tels que des diodes et des transistors, disposés sur un substrat en céramique et connectés entre eux par des connectiques électriques afin de réaliser des fonctions électroniques plus ou moins complexes. Thus, the on-board electronic power modules include power semiconductor components, such as diodes and transistors, arranged on a ceramic substrate and connected together by electrical connectors in order to perform more electronic functions. or less complex.
[004] De tels modules électroniques de puissance sont soumis à des contraintes environnementales sévères, notamment thermiques. Ils sont donc conçus pour résister à des températures pouvant aller jusqu’à 200 °C. [004] Such electronic power modules are subjected to severe environmental constraints, in particular thermal. They are therefore designed to withstand temperatures of up to 200 ° C.
[005] Afin de garantir le maintien de ces modules électroniques à une température inférieure à la température maximale, les modules électroniques de puissance existants comprennent des dissipateurs thermiques. En particulier, les dissipateurs thermiques sont disposés sur la face opposée à la face sur laquelle sont disposés les composants à semi-conducteurs de puissance. [006] Les dissipateurs thermiques sont fabriqués, par usinage ou fonderie par exemple, indépendamment du reste du module électrique de puissance, puis sont fixés sur une face libre d’au moins un des substrats. Un matériau d’interface thermique (connu sous l’acronyme anglais TIM signifiant Thermal Interface Material) est disposé entre le substrat et le radiateur, permettant d’améliorer le couplage thermique entre le substrat et les dissipateurs thermiques, et donc de refroidir plus efficacement le substrat. Les TIMs utilisés peuvent être des matériaux rigides (brasure ou frittage par exemple) ou souples (par exemple une graisse thermique, un élastomère silicone). In order to ensure that these electronic modules are kept at a temperature below the maximum temperature, the existing power electronic modules include heat sinks. In particular, the heat sinks are arranged on the face opposite to the face on which the power semiconductor components are arranged. The heat sinks are manufactured, by machining or foundry for example, independently of the rest of the electrical power module, then are fixed on a free face of at least one of the substrates. A thermal interface material (known by the acronym TIM meaning Thermal Interface Material) is disposed between the substrate and the radiator, making it possible to improve the thermal coupling between the substrate and the heat sinks, and therefore to cool the substrate. The TIMs used can be rigid materials (brazing or sintering for example) or flexible materials (for example a thermal grease, a silicone elastomer).
[007] Les TIMs rigides, c’est-à-dire lorsque le radiateur est fixé au substrat par brasure ou par frittage, ont l’avantage de présenter une résistance thermique faible. Néanmoins, ils présentent une fiabilité thermomécanique limitée, ce qui se révèle être un inconvénient majeur pour une utilisation dans un système embarqué d’un aéronef à proximité de sources chaudes telles que les moteurs ou les freins, puisque cela réduit la durée de vie des systèmes embarqués et augmente donc la fréquence des opérations de maintenance. Les TIMs souples ne sont quant à eux pas compatibles avec de hautes températures, allant au-delà de 175°C, et présentent de plus des conductivités thermiques plus faibles que celles des TIMs rigides. Rigid TIMs, that is to say when the radiator is fixed to the substrate by brazing or sintering, have the advantage of having a low thermal resistance. However, they have limited thermomechanical reliability, which turns out to be a major drawback for use in an on-board system of an aircraft near hot sources such as engines or brakes, since this reduces the life of the systems. on board and therefore increases the frequency of maintenance operations. Flexible TIMs are not compatible with high temperatures, going beyond 175 ° C, and moreover have lower thermal conductivities than those of rigid TIMs.
[008] Ainsi, les TIMs connus de l’art antérieur ne sont pas optimaux pour une application aéronautique, en particulier dans le cas où l’électronique de commande se trouve à proximité de sources de chaleurs telles que le moteur, dans l’optique d’intégrer au plus près les systèmes embarqués. Thus, the TIMs known from the prior art are not optimal for an aeronautical application, in particular in the case where the control electronics is located near heat sources such as the engine, in optics to integrate on-board systems as closely as possible.
[009] L’invention a notamment pour but de proposer un module de puissance électrique adapté aux contraintes environnementales d’un aéronef. The invention particularly aims to provide an electric power module adapted to the environmental constraints of an aircraft.
RESUME DE L’INVENTION SUMMARY OF THE INVENTION
[010] La présente invention concerne tout d’abord un procédé de fabrication d’un module électronique de puissance, comprenant les étapes suivantes : a) Fournir au moins deux substrats céramiques métallisés à partir d’au moins deux substrats céramiques, chacun des substrats céramiques comprenant deux faces opposées sur lesquelles sont respectivement disposées une première et une seconde couches métalliques ; The present invention firstly relates to a method for manufacturing an electronic power module, comprising the following steps: a) providing at least two metallized ceramic substrates from at least two ceramic substrates, each of the ceramic substrates comprising two opposite faces on which a first and a second metal layer are respectively disposed;
b) Imprimer des dissipateurs thermiques sur la première couche métallique de chacun desdits au moins deux substrats ;  b) printing heat sinks on the first metal layer of each of said at least two substrates;
c) Imprimer des premières connectiques sur la seconde couche métallique de chacun desdits au moins deux substrats ;  c) Printing of the first connectors on the second metallic layer of each of said at least two substrates;
d) Déposer, sur chaque substrat, une couche de fixation au moins en partie sur les premières connectiques imprimées sur la seconde couche métallique de chacun des au moins deux substrats ;  d) deposit, on each substrate, a fixing layer at least in part on the first connectors printed on the second metal layer of each of the at least two substrates;
e) Disposer des composants à semi-conducteur de puissance et des secondes connectiques entre les couches de fixation d’au moins deux substrats métallisés.  e) Arrange power semiconductor components and second connectors between the fixing layers of at least two metallized substrates.
[011] En imprimant directement des dissipateurs thermiques sur les faces des substrats céramiques métallisés, les matériaux d’interface thermique (TIM), ne sont plus nécessaires pour assurer le couplage thermique avec le substrat. Ainsi, les modules électroniques de puissance obtenus par ce procédé peuvent être intégrés dans des environnements fortement contraints thermiquement (c’est-à-dire pour des températures supérieures à 175°C) et mécaniquement grâce à la suppression des TIMs limités en température. En outre, l’impression des dissipateurs thermiques directement sur les faces métallisées des substrats permet de réaliser des dissipateurs thermiques présentant des géométries complexes et efficaces pour un refroidissement des modules électroniques par un fluide (c’est-à-dire un gaz ou un liquide). L’optimisation de la géométrie des dissipateurs thermiques imprimés ainsi que leur disposition sur les deux substrats permet de plus de réduire le volume et la masse de ceux-ci par rapport à ceux utilisés dans l’art antérieur, les dissipateurs obtenus par ce procédé étant plus performants. La forme du dissipateur thermique imprimé permet une amélioration du refroidissement, de l’ordre de 1 % à 10%. Combiné à la suppression des TIMs, cette amélioration peut être revue à la hausse. By directly printing heat sinks on the faces of metallized ceramic substrates, thermal interface materials (TIM) are no longer necessary to ensure thermal coupling with the substrate. Thus, the electronic power modules obtained by this process can be integrated in environments that are highly thermally constrained (that is to say for temperatures above 175 ° C) and mechanically thanks to the elimination of TIMs limited in temperature. In addition, printing the heatsinks directly on the metallized faces of the substrates makes it possible to produce heatsinks having complex and efficient geometries for cooling the electronic modules by a fluid (that is to say a gas or a liquid ). The optimization of the geometry of the printed heat sinks as well as their arrangement on the two substrates also makes it possible to reduce the volume and the mass of these compared to those used in the prior art, the heat sinks obtained by this process being more efficient. The shape of the printed heat sink improves the cooling, of the order of 1% to 10%. Combined with the removal of TIMs, this improvement can be revised upwards.
[012] De plus, l’impression des connectiques, permet de maîtriser la hauteur des connectiques imprimées facilitant ainsi la connexion des composants de différentes épaisseurs.  [012] In addition, the printing of the connectors makes it possible to control the height of the printed connectors, thus facilitating the connection of components of different thicknesses.
[013] Les secondes connectiques peuvent comprendre au moins une connectique externe. Une telle connectique permet de relier électriquement le module électronique obtenu par le procédé, à un circuit électronique.  The second connectors can include at least one external connector. Such a connection makes it possible to electrically connect the electronic module obtained by the method, to an electronic circuit.
[014] Selon une caractéristique supplémentaire, les étapes b) et c) peuvent être réalisées par la fusion sélective d’un lit de poudre métallique. According to an additional characteristic, steps b) and c) can be carried out by the selective melting of a bed of metal powder.
[015] La fabrication additive métallique, en particulier la fusion sélective d’un lit de poudre métallique, permet ainsi de fabriquer des dissipateurs thermiques à géométrie complexe, optimisant le refroidissement des substrats. En outre, la fusion sélective d’un lit de poudre métallique permet d’imprimer directement sur le substrat céramique métallisé les dissipateurs thermiques.  [015] Metal additive manufacturing, in particular the selective melting of a metal powder bed, thus makes it possible to manufacture heat sinks with complex geometry, optimizing the cooling of the substrates. In addition, the selective melting of a metal powder bed allows the heat sinks to be printed directly on the metallized ceramic substrate.
[016] La poudre métallique utilisée peut être choisie seule ou en combinaison parmi une poudre d’alliage et une poudre de métal pur.  The metal powder used can be chosen alone or in combination from an alloy powder and a pure metal powder.
[017] Selon une autre caractéristique, la couche de fixation fixant les composants à semi-conducteurs de puissance ainsi que les connectiques entre eux et avec lesdites faces libres des secondes couches métalliques desdits au moins deux substrats, peut être choisie parmi une brasure, une pâte d’argent, un matériau époxy-conducteur et du verre chargé en argent.  According to another characteristic, the fixing layer fixing the power semiconductor components as well as the connections between them and with said free faces of the second metal layers of said at least two substrates, can be chosen from among a solder, a silver paste, an epoxy-conductive material and glass loaded with silver.
[018] De plus, la couche de fixation peut avoir une épaisseur supérieure ou égale à 10 pm. In addition, the fixing layer may have a thickness greater than or equal to 10 μm.
[019] L’étape e) peut être suivie d’une étape de solidification de la couche de fixation par brasage ou frittage ou recuit.  Step e) can be followed by a step of solidifying the fixing layer by brazing or sintering or annealing.
[020] L’étape e) peut en outre être suivie d’une étape f) consistant à :  [020] Step e) can also be followed by a step f) consisting of:
Injecter un matériau isolant entre les secondes couches métalliques desdits au moins deux substrats comprenant la couche de fixation, les composants à semi-conducteur de puissance et les secondes connectiques. [021] Le matériau isolant utilisé lors de l’étape f) peut être choisi parmi par exemple une résine époxy, un gel silicone et un élastomère silicone. Injecting an insulating material between the second metallic layers of said at least two substrates comprising the fixing layer, the power semiconductor components and the second connectors. [021] The insulating material used during step f) can be chosen from, for example, an epoxy resin, a silicone gel and a silicone elastomer.
[022] De plus, la maîtrise de la hauteur des premières connectiques grâce à leur fabrication par fabrication additive métallique, permet d’utiliser une grande variété de matériaux d’encapsulation, aussi appelés matériaux d’isolation, chargés avec des nano- ou des microparticules et ayant des viscosités plus élevées que les matériaux utilisés dans les modules électroniques de la technique antérieure.  [022] In addition, controlling the height of the first connectors thanks to their manufacture by metal additive manufacturing, makes it possible to use a wide variety of encapsulation materials, also called insulation materials, loaded with nano- or microparticles and having higher viscosities than the materials used in the electronic modules of the prior art.
[023] L’invention concerne également un module électronique de puissance comprenant au moins deux substrats céramiques métallisés, chacun comprenant une première face et une seconde face opposées, lesdits substrats métallisés étant disposés de sorte que lesdites secondes faces sont disposées en regard l’une de l’autre, caractérisé en ce que des dissipateurs thermiques sont disposés directement sur chaque première face et en ce que des premières connectiques sont disposées sur chaque seconde face, des composants à semi-conducteurs de puissance et des secondes connectiques étant disposés entre ces secondes faces et fixés aux substrats via une couche de fixation.  [023] The invention also relates to an electronic power module comprising at least two metallized ceramic substrates, each comprising a first face and a second opposite face, said metallized substrates being arranged so that said second faces are arranged opposite one on the other, characterized in that heat sinks are disposed directly on each first face and in that first connectors are arranged on each second face, power semiconductor components and second connectors being disposed between these seconds faces and fixed to substrates via a fixing layer.
[024] Un tel module électronique de puissance peut ainsi, s’il comprend des composants à semi-conducteurs de puissance de type SiC ou GaN pouvant fonctionner au-delà des limites en température des composants à semi- conducteurs de puissance classique Si, peut être intégré dans un environnement fortement contraint en température (au-delà de 200°C). De tels modules électroniques se révèlent particulièrement intéressants notamment pour des applications dans l’aéronautique.  Such an electronic power module can thus, if it comprises power semiconductor components of the SiC or GaN type which can operate beyond the temperature limits of the semiconductor components of conventional power Si, can be integrated in an environment highly constrained in temperature (above 200 ° C). Such electronic modules prove to be particularly advantageous, in particular for applications in aeronautics.
[025] L’invention sera mieux comprise et d’autres détails, caractéristiques et avantages de l’invention apparaîtront à la lecture de la description suivante faite à titre d’exemple non limitatif en référence aux dessins annexés. BREVE DESCRIPTION DES FIGURES la figure 1 est un logigramme illustrant le procédé de fabrication d’un module électronique selon l’invention ; The invention will be better understood and other details, characteristics and advantages of the invention will appear on reading the following description given by way of nonlimiting example with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE FIGURES FIG. 1 is a flow diagram illustrating the method of manufacturing an electronic module according to the invention;
la figure 2 est une illustration du procédé DBC à base d’une céramique AI2O3 ;  Figure 2 is an illustration of the DBC process based on an AI2O3 ceramic;
la figure 3 est une vue schématique d’une partie des différentes étapes du procédé fabrication d’un module électronique de puissance selon l’invention ;  FIG. 3 is a schematic view of part of the various stages of the manufacturing process of an electronic power module according to the invention;
la figure 4 illustre un module électronique de puissance obtenu suite à la mise en œuvre d’un procédé de fabrication selon l’invention ; la figure 5 illustre les géométries de dissipateurs thermiques pouvant être obtenues par le procédé selon l’invention.  FIG. 4 illustrates an electronic power module obtained following the implementation of a manufacturing process according to the invention; FIG. 5 illustrates the geometries of heat sinks which can be obtained by the method according to the invention.
DESCRIPTION DETAILLEE DETAILED DESCRIPTION
[026] De nombreux modules électroniques de puissance sont embarqués dans les aéronefs, en particulier au sein de convertisseurs, convertissant l’énergie électrique du réseau principal en un courant et une tension adaptés à l’électrification de systèmes propulsifs et non propulsifs embarqués. [026] Many electronic power modules are on board aircraft, in particular in converters, converting electrical energy from the main network into current and voltage suitable for the electrification of on-board propulsion and non-propulsion systems.
[027] Les modules électroniques de puissances comprennent de nombreux composants à semi-conducteurs de puissance, tels que des diodes et des transistors par exemple, assurant des fonctions électriques plus ou moins complexes.  [027] The electronic power modules include numerous power semiconductor components, such as diodes and transistors for example, providing more or less complex electrical functions.
[028] Ces modules électroniques sont, lors de leur utilisation, prompts à être le siège d’auto-échauffement, d’où la nécessité d’intégrer, à chacun d’eux, un dissipateur thermique pour limiter l’augmentation en température de ces modules.  [028] These electronic modules are, when in use, quick to be the seat for self-heating, hence the need to integrate, in each of them, a heat sink to limit the increase in temperature of these modules.
[029] La figure 1 illustre par le biais d’un logigramme, un procédé de fabrication d’un module électronique de puissance, pouvant être embarqué dans un aéronef. [030] La première étape de procédé, notée A sur les figures 1 et 3, vise à fournir au moins deux substrats céramiques métallisés 2 à partir d’au moins deux substrats céramiques 4, chacun des substrats céramiques 4 comprenant deux faces opposées 6, 8 sur lesquelles sont respectivement disposées une première et une seconde couches métalliques 10, 12. [029] FIG. 1 illustrates by means of a flowchart, a method of manufacturing an electronic power module, which can be carried on board an aircraft. The first process step, denoted A in FIGS. 1 and 3, aims to provide at least two metallized ceramic substrates 2 from at least two ceramic substrates 4, each of the ceramic substrates 4 comprising two opposite faces 6, 8 on which are first and second metal layers 10, 12 respectively.
[031] Les substrats des modules électroniques de puissances sont destinés à supporter les composants à semi-conducteurs de puissance ainsi que les pistes conductrices reliant les différents composants. Dans l’invention, le substrat utilisé est un substrat céramique dit métallisé 2, comme connu de de l’état de la technique. Le substrat céramique métallisé 2 est obtenu par un des procédés parmi : Direct Bonded Copper (DBC), illustré sur la figure 2, ou Direct Bonded Aluminium (DBA) ou Active Métal Brazing (AMB).  [031] The substrates of the electronic power modules are intended to support the power semiconductor components as well as the conductive tracks connecting the various components. In the invention, the substrate used is a so-called metallized ceramic substrate 2, as known from the state of the art. The metallized ceramic substrate 2 is obtained by one of the following methods: Direct Bonded Copper (DBC), illustrated in FIG. 2, or Direct Bonded Aluminum (DBA) or Active Métal Brazing (AMB).
[032] Les substrats DBC sont couramment utilisés en électronique en raison de leur faible coût. Ce procédé consiste, comme on peut le voir sur la figure 2, à fixer deux couches de cuivre 10, 12, oxydées au préalable, de part et d’autre du substrat céramique 4 par frittage. Le substrat céramique 4 peut être choisi parmi les matériaux suivants: AI2O3, AIN et S13N4 Dans l’exemple illustré, le substrat céramique 4 est AI2O3. L’attache des couches de cuivre 10, 12 (ou d’aluminium respectivement) à la céramique 4 se fait par un procédé spécifique à haute température sous atmosphère inerte.  [032] DBC substrates are commonly used in electronics because of their low cost. This process consists, as can be seen in FIG. 2, of fixing two layers of copper 10, 12, previously oxidized, on either side of the ceramic substrate 4 by sintering. The ceramic substrate 4 can be chosen from the following materials: AI2O3, AIN and S13N4 In the example illustrated, the ceramic substrate 4 is AI2O3. The attachment of the layers of copper 10, 12 (or of aluminum respectively) to the ceramic 4 is done by a specific process at high temperature under an inert atmosphere.
[033] Les substrats DBA, plus récemment développés, présentent de bonnes conductivités thermiques, mais sont bien plus coûteux que le substrat DBC. Le procédé DBA consiste à fixer deux couches d’aluminium de part et d’autre d’un substrat céramique, pouvant être choisi parmi les matériaux suivants : AI2O3, AIN et S13N4 L’attache des couches d’aluminium est réalisée par soudage par diffusion en phase liquide transitoire ( Transient Liquid Phase Diffusion Bonding, TLPDB ).  [033] DBA substrates, more recently developed, have good thermal conductivities, but are much more expensive than the DBC substrate. The DBA process consists in fixing two aluminum layers on either side of a ceramic substrate, which can be chosen from the following materials: AI2O3, AIN and S13N4 The aluminum layers are attached by diffusion welding in transient liquid phase (Transient Liquid Phase Diffusion Bonding, TLPDB).
[034] Le procédé AMB est également connu de l’homme du métier. Il s’agit d’un procédé s’appuyant sur une forme de brasure permettant de joindre le métal à la céramique sans métallisation. Le substrat AMB est constitué d’un isolant céramique SbN4 (nitrure de silicium), sur lequel du cuivre est brasé par brasage sous vide à haute température. The AMB process is also known to those skilled in the art. It is a process based on a form of brazing allowing metal to be joined to ceramic without metallization. The AMB substrate consists of a ceramic insulator SbN 4 (silicon nitride), on which copper is brazed by brazing under vacuum at high temperature.
[035] Les substrats AMB présentent une bonne conduction thermique et une bonne tenue à la fatigue lors des cycles thermomécaniques, d’où leur utilisation en électronique de puissance. Néanmoins, le procédé est plus complexe que les procédés DBC et DBA.  AMB substrates have good thermal conduction and good resistance to fatigue during thermomechanical cycles, hence their use in power electronics. However, the process is more complex than the DBC and DBA processes.
[036] Ainsi, les substrats DBC ou DBA ou AMB obtenus présentent deux faces opposées 8, 6 sur lesquelles sont disposées une première couche de métal 10 et une deuxième couche de métal 12.  [036] Thus, the DBC or DBA or AMB substrates obtained have two opposite faces 8, 6 on which are disposed a first layer of metal 10 and a second layer of metal 12.
[037] En pratique, un substrat DBA céramique métallisé AIN de 1 mm est utilisé. Ce substrat 2 présente sur chacune de ses faces une première et une deuxième couche de d’Aluminium de 400pm. [037] In practice, a 1 mm AIN metallized ceramic DBA substrate is used. This substrate 2 has on each of its faces a first and a second layer of 400pm aluminum.
[038] Le substrat céramique métallisé pourra dans la suite du document être également appelé substrat métallisé.  [038] The metallized ceramic substrate may hereinafter also be called metallized substrate.
[039] Le substrat céramique métallisé 2 obtenu est illustré sur la figure 3, dans la première étape du procédé, notée A. La deuxième couche de métal 12 peut être discontinue : la couche de métal 12 peut comprendre plusieurs zones métalliques. Sur l’exemple illustré à la figure 2, la couche de métal 12 comprend quatre zones 12a, 12b, 12c et 12d, aussi appelées pistes. Ces zones 12a, 12b, 12c et 12d sont isolées entre elle par le substrat céramique 4 qui crée une discontinuité électrique entre les zones 12a, 12b, 12c et 12d. [039] The metallized ceramic substrate 2 obtained is illustrated in FIG. 3, in the first step of the method, noted A. The second metal layer 12 can be discontinuous: the metal layer 12 can comprise several metallic zones. In the example illustrated in FIG. 2, the metal layer 12 comprises four zones 12a, 12b, 12c and 12d, also called tracks. These zones 12a, 12b, 12c and 12d are isolated from each other by the ceramic substrate 4 which creates an electrical discontinuity between the zones 12a, 12b, 12c and 12d.
[040] La deuxième étape du procédé selon l’invention, notée B sur les figures 1 et 3, consiste à imprimer des dissipateurs thermiques 14 sur la première couche métallique 10 de chacun desdits au moins deux substrats 2. The second step of the process according to the invention, denoted B in FIGS. 1 and 3, consists in printing heat sinks 14 on the first metal layer 10 of each of said at least two substrates 2.
[041] Par impression, on entend ici une technique par fabrication additive métallique (FA). En particulier, la technique de fusion sélective par laser (SLM) est utilisée. Cette technique permet de produire des pièces métalliques en faisant fusionner un lit de poudre métallique localement, dans une atmosphère inerte pour éviter toute oxydation. Ainsi, des couches de poudre sont déposées, puis figées par le balayage du laser sur les zones à imprimer. [041] By printing is meant here a technique by metallic additive manufacturing (FA). In particular, the selective laser fusion technique (SLM) is used. This technique makes it possible to produce metal parts by fusing a bed of metal powder locally, in an inert atmosphere to avoid any oxidation. So layers of powder are deposited, then frozen by scanning the laser over the areas to be printed.
[042] Le laser a une puissance suffisante pour faire fondre la poudre métallique ou au moins l’un des constituants. La poudre métallique est une poudre d’alliage et/ou de métal pur. Par exemple, une poudre AISi Mgo.e peut être utilisée. [042] The laser has sufficient power to melt the metal powder or at least one of the constituents. The metal powder is an alloy and / or pure metal powder. For example, an AISi Mgo powder . e can be used.
[043] D’autres types de poudres métalliques peuvent bien entendu être utilisés, à base de cuivre et/ou d’aluminium. En pratique, il est préférable de choisir une poudre présentant une base de métal de même nature que la métallisation du substrat, afin d’éviter la formation d’intermétallique (CuAI) fragile aux interfaces.  [043] Other types of metallic powders can of course be used, based on copper and / or aluminum. In practice, it is preferable to choose a powder having a metal base of the same kind as the metallization of the substrate, in order to avoid the formation of fragile intermetallic (CuAI) at the interfaces.
[044] La conception des dissipateurs thermiques par la technique SLM est réalisée par plusieurs itérations. Une première couche de poudre métallique est déposée sur la première couche métallique 10 du substrat céramique métallisé 2. Un laser balaye ensuite cette première couche de poudre métallique selon un motif visé. Cela permet ainsi de faire fondre et de fusionner la poudre localement selon le motif visé. Ensuite, une seconde couche est déposée et est suivie d’un balayage par le laser selon un motif visé. Ces étapes sont réitérées jusqu’à l’obtention du dissipateur thermique selon la forme tridimensionnelle souhaitée.  [044] The design of heat sinks by the SLM technique is carried out by several iterations. A first layer of metallic powder is deposited on the first metallic layer 10 of the metallized ceramic substrate 2. A laser then scans this first layer of metallic powder according to a targeted pattern. This thus makes it possible to melt and merge the powder locally according to the intended motif. Then, a second layer is deposited and is followed by scanning by the laser according to a targeted pattern. These steps are repeated until the heat sink is obtained in the desired three-dimensional shape.
[045] L’épaisseur des couches déposées varient entre 20 et 150 pm.  [045] The thickness of the deposited layers varies between 20 and 150 μm.
[046] Les substrats 2, sur lesquels sont imprimés les dissipateurs thermiques 14, sont inclus dans un plateau dont la température peut varier entre environ 20°C et 200°C. En particulier, une haute température peut se révéler utile pour réduire les contraintes mécaniques résiduelles résultant des échauffements locaux induits par le laser faisant fondre la poudre lors du procédé de fabrication.  [046] The substrates 2, on which the heat sinks 14 are printed, are included in a tray, the temperature of which can vary between approximately 20 ° C. and 200 ° C. In particular, a high temperature may prove useful in reducing the residual mechanical stresses resulting from local heating induced by the laser causing the powder to melt during the manufacturing process.
[047] La figure 3 illustre un substrat 2 sur lequel sont imprimés des dissipateurs thermiques 14. La géométrie de dissipateurs thermiques ne se limite pas à cet exemple. Des exemples de géométrie de dissipateurs thermiques obtenus par impression sont visibles sur la figure 5. [048] L’impression des dissipateurs thermiques 14 directement sur les substrats céramiques métallisés 2 permet en particulier de réaliser une variété de motifs géométriques complexes. De tels motifs géométriques complexes permettent en particulier d’optimiser le coefficient d’échange thermique et la chute de pression de l’air circulant dans le radiateur. Les motifs des dissipateurs thermiques sont choisis pour maximiser la surface d’échange avec l’air environnant, tout en limitant leur encombrement. [047] Figure 3 illustrates a substrate 2 on which are printed heat sinks 14. The geometry of heat sinks is not limited to this example. Examples of geometry of heat sinks obtained by printing are visible in Figure 5. [048] The printing of the heat sinks 14 directly on the metallized ceramic substrates 2 makes it possible in particular to produce a variety of complex geometric patterns. Such complex geometric patterns make it possible in particular to optimize the heat exchange coefficient and the pressure drop of the air circulating in the radiator. The patterns of the heat sinks are chosen to maximize the surface area for exchange with the surrounding air, while limiting their size.
[049] En outre, de tels dissipateurs thermiques 14 permettent de se passer de TIMs ( Thermal Interface Materials). Cela a plusieurs avantages non négligeables :  [049] In addition, such heat sinks 14 make it possible to dispense with TIMs (Thermal Interface Materials). This has several significant advantages:
- une meilleure performance thermique : le contact étant direct entre le substrat, source de production de chaleur, et le dissipateur thermique (directement imprimé sur une des faces du substrat), la conduction thermique globale se retrouve améliorée ;  better thermal performance: the contact being direct between the substrate, source of heat production, and the heat sink (directly printed on one of the faces of the substrate), the overall thermal conduction is found to be improved;
- une utilisation à des températures plus élevées : en effet, la présence des TIMs dans les modules électroniques de puissance, présentant une faible résistance en température, limite l’utilisation de ces modules électroniques de puissance à très haute température, c’est- à-dire supérieure à 200°C ;  - use at higher temperatures: in fact, the presence of TIMs in the electronic power modules, having a low temperature resistance, limits the use of these electronic power modules at very high temperature, that is to say - say greater than 200 ° C;
- une compatibilité avec l’utilisation de composants à semi-conducteurs de puissance à grand gap (SiC, GaN) : en effet, ces composants à semi-conducteurs de puissance peuvent fonctionner au-delà des limites en température classique des composants à semi-conducteurs classiques Si (au-delà de 175°C). De tels dissipateurs thermiques, directement imprimés sur le substrat céramique métallisé, assure une fiabilité à haute température (c’est-à-dire au-delà de 200°C).  - compatibility with the use of large gap power semiconductor components (SiC, GaN): indeed, these power semiconductor components can operate beyond the conventional temperature limits of semiconductor components conventional Si conductors (above 175 ° C). Such heat sinks, directly printed on the metallized ceramic substrate, ensure reliability at high temperatures (i.e. above 200 ° C).
[050] L’impression de dissipateurs thermiques 14 directement sur les substrats céramiques est contraignant, comme cela a été démontré par les travaux retranscrits dans l’article de Syed-Khaja, Aarief, Daniel Schwarz, and Joerg Franke. "Advanced substrate and packaging concepts for compact System intégration with additive manufacturing technologies for high température applications." CPMT Symposium Japan (ICSJ), IEEE, 2015. Dans ces travaux, l’impression directe de canaux de refroidissement sur un substrat céramique s’est ainsi révélée trop contraignante pour la céramique, cette dernière se fragilisant avec l’apparition de fissures et la formation d’un intermétallique. Dans notre cas, en utilisant un substrat céramique métallisé 2, les contraintes impliquées par l’impression sont réduites, permettant une impression directe des dissipateurs thermiques 14 sur le substrat 2, avec une bonne fiabilité mécanique. The printing of heat sinks 14 directly on the ceramic substrates is restrictive, as has been demonstrated by the work transcribed in the article by Syed-Khaja, Aarief, Daniel Schwarz, and Joerg Franke. "Advanced substrate and packaging concepts for compact System integration with additive manufacturing technologies for high temperature applications. "CPMT Symposium Japan (ICSJ), IEEE, 2015. In this work, the direct printing of cooling channels on a ceramic substrate thus proved too restrictive for ceramics, the latter weakening with the appearance of cracks and the formation of an intermetallic. In our case, using a metallized ceramic substrate 2, the stresses involved in printing are reduced, allowing direct printing of the heat sinks 14 on the substrate 2, with good mechanical reliability .
[051] La troisième étape du procédé, notée C sur les figures 1 et 3, consiste à imprimer des premières connectiques 16 sur la seconde couche métallique 12 de chacun desdits au moins deux substrats céramiques métallisés 2.  [051] The third step of the method, denoted C in FIGS. 1 and 3, consists in printing first connectors 16 on the second metal layer 12 of each of said at least two metallized ceramic substrates 2.
[052] De manière similaire à la deuxième étape B, la technique de fusion sélective est également utilisée pour fabriquer par fabrication additive métallique les pistes et les connectiques 16 sur la seconde couche métallique 12 des substrats céramiques métallisés 2. [052] Similarly to the second step B, the selective melting technique is also used to manufacture, by metallic additive manufacturing, the tracks and connectors 16 on the second metallic layer 12 of metallized ceramic substrates 2.
[053] Cette étape C peut, bien entendu, être intervertie avec la deuxième étape B. En outre, les connectiques 16 imprimées peuvent s’étendre à l’extérieur du substrat 2, afin de réaliser des connectiques, dites connectiques « externes » permettant la liaison du module électronique de puissance au réseau électrique de l’aéronef.  [053] This step C can, of course, be inverted with the second step B. In addition, the printed connectors 16 can extend outside of the substrate 2, in order to produce connectors, called “external” connectors allowing the connection of the electronic power module to the electrical network of the aircraft.
[054] L’impression des connectiques 16 permet en particulier de maîtriser leur hauteur, facilitant de fait la connexion de composants de différentes hauteurs ainsi que le remplissage des interstices entre les composants et les connectiques 16 par un matériau isolant.  The printing of the connectors 16 makes it possible in particular to control their height, thereby facilitating the connection of components of different heights as well as the filling of the interstices between the components and the connectors 16 with an insulating material.
[055] En figure 3 est illustré un exemple d’impression de connectiques 16 sur l’un des substrats 2. Comme on peut le voir, ces connectiques 16 peuvent être des pistes, des plots, de tailles (hauteur et largeur) différentes. Ainsi, au terme des étapes B et C, le substrat céramique métallisé 2 a sur une couche métallique 10 des dissipateurs thermiques 14, et sur l’autre couche métallique 12 des connectiques 16, ces éléments étant imprimés directement sur le substrat 2. [056] L’impression se révèle être plus fiable face aux risques de court-circuit au niveau des distances minimales entre les pistes de faibles dimensions, de l’ordre de 100 pm à 500 miti, par rapport aux méthodes utilisées dans la technique antérieure telle que le brasage direct ou le « bump ». Ce procédé précis permet en outre de connecter des électrodes des composants à semi- conducteurs de faibles dimensions (c’est-à-dire inférieurs à 300 x 300 mih2). [055] In Figure 3 is illustrated an example of printing connectors 16 on one of the substrates 2. As can be seen, these connectors 16 may be tracks, pads, sizes (height and width) different. Thus, at the end of steps B and C, the metallized ceramic substrate 2 has on a metal layer 10 heat sinks 14, and on the other metal layer 12 of connectors 16, these elements being printed directly on the substrate 2. Printing appears to be more reliable in the face of the risks of short-circuit at the level of the minimum distances between the tracks of small dimensions, of the order of 100 μm to 500 μm, compared to the methods used in the prior art. such as direct soldering or "bump". This precise method also makes it possible to connect electrodes of semiconductor components of small dimensions (that is to say less than 300 × 300 mih 2 ).
[057] La quatrième étape du procédé, notée D sur les figures 1 et 3, consiste à déposer une couche de fixation 18 au moins en partie sur les premières connectiques 16 imprimées sur la seconde couche métallique 12 de chacun des au moins deux substrats 2. The fourth step of the method, denoted D in FIGS. 1 and 3, consists in depositing a fixing layer 18 at least in part on the first connectors 16 printed on the second metallic layer 12 of each of the at least two substrates 2 .
[058] La couche de fixation 18 permet de faire l’attache entre :  [058] The fixing layer 18 makes it possible to attach between:
- le composant à semi-conducteur de puissance et les connectiques imprimées ;  - the power semiconductor component and the printed connections;
- les connectiques imprimées et le substrat.  - the printed connections and the substrate.
[059] La couche de fixation 18 peut être choisie parmi : une brasure et/ou de la pâte d’argent et/ou un matériau époxy-conducteur et/ou du verre chargé en Argent.  [059] The fixing layer 18 can be chosen from: a solder and / or silver paste and / or an epoxy-conductive material and / or glass loaded with silver.
[060] Typiquement, la couche de fixation 18 présente une épaisseur supérieure ou égale à 10 pm.  [060] Typically, the fixing layer 18 has a thickness greater than or equal to 10 μm.
[061] Le dépôt de la couche de fixation 18 peut être réalisé par différentes techniques, telles que par exemple la sérigraphie, l’injection ou l’impression.  [061] The deposition of the fixing layer 18 can be achieved by different techniques, such as for example screen printing, injection or printing.
[062] La cinquième étape, notée E sur la figure 1 , consiste ensuite à disposer des composants 19 semi-conducteurs de puissance et des secondes connectiques 22 entre les couches de fixation 18 des au moins deux substrats métallisés 2. [062] The fifth step, denoted E in FIG. 1, then consists in having components 19 power semiconductors and second connectors 22 between the fixing layers 18 of the at least two metallized substrates 2.
[063] En pratique et comme visible sur la figure 4, chaque composant 19 à semi-conducteur de puissance comprend des électrodes 24, 26 sur au moins deux de ses faces 28, 30. Ces électrodes 26 peuvent recouvrir toute la surface de la face 30 du composant 19 sur laquelle elles sont disposées : elles sont alors appelées électrodes « pleine face ». Également, plusieurs électrodes 24 peuvent être disposées sur une même face 28 du composant 19. [063] In practice and as visible in FIG. 4, each component 19 with a power semiconductor comprises electrodes 24, 26 on at least two of its faces 28, 30. These electrodes 26 can cover the entire surface of the face 30 of the component 19 on which they are arranged: they are then called "full face" electrodes. Also, several electrodes 24 can be arranged on the same face 28 of component 19.
[064] Sur la figure 4, les deux composants 19 à semi-conducteurs de puissance comprennent chacun sur leur face inférieure 30 une électrode 26 « pleine face ». Les deux composants 19 à semi-conducteurs de puissance comprennent également sur la face supérieure 28 deux électrodes 24. En pratique, et comme illustré sur la figure 4, les composants à semi-conducteur sont disposés entre les couches de fixation 18 des deux substrats céramiques métallisés 2 de sorte que les électrodes 26 « pleine face » soient reliées au même substrat métallisé 2. Il est bien entendu possible de fixer chacune des électrodes 26 « pleine face » à des substrats céramiques métallisés 2 distincts. De manière générale, une distribution uniforme des électrodes 24, 26 entre les deux substrats métallisés 2 permet une meilleure gestion thermique et limite les contraintes thermodynamiques différentielles liées aux coefficients de dilatation thermique entre les deux substrats céramiques métallisés 2.  [064] In Figure 4, the two components 19 to power semiconductors each comprise on their underside 30 an electrode 26 "full face". The two power semiconductor components 19 also include two electrodes on the upper face 28. In practice, and as illustrated in FIG. 4, the semiconductor components are arranged between the fixing layers 18 of the two ceramic substrates metallized 2 so that the "full face" electrodes 26 are connected to the same metallized substrate 2. It is of course possible to fix each of the "full face" electrodes 26 to separate metallized ceramic substrates 2. In general, a uniform distribution of the electrodes 24, 26 between the two metallized substrates 2 allows better thermal management and limits the differential thermodynamic stresses linked to the coefficients of thermal expansion between the two metallized ceramic substrates 2.
[065] Les composants 19 à semi-conducteurs de puissance ainsi que des secondes connectiques 22 qui ne sont pas réalisées par impression tel que décrit dans la troisième étape du procédé, sont placés sur les couches de fixation. Ainsi, les différentes parties à attacher sont mises en contact mécanique.  [065] The power semiconductor components 19 as well as second connectors 22 which are not produced by printing as described in the third step of the method, are placed on the fixing layers. Thus, the various parts to be attached are brought into mechanical contact.
[066] Comme on peut le voir sur la figure 4, la seconde connectique 22, qui est dans cet exemple une connectique extérieure, est mise en contact avec la couche de fixation d’un des substrats céramiques métallisés.  [066] As can be seen in FIG. 4, the second connection 22, which in this example is an external connection, is brought into contact with the fixing layer of one of the metallized ceramic substrates.
[067] Une étape de solidification de la couche de fixation 18 est ensuite réalisée, consistant à figer à l’aide d’un procédé tel que par exemple, le brasage, le frittage ou encore le recuit, la fixation des éléments (substrats, composants 19 à semi-conducteurs de puissances, secondes connectiques) entre eux. [067] A step of solidifying the fixing layer 18 is then carried out, consisting of freezing using a method such as for example, soldering, sintering or even annealing, the fixing of the elements (substrates, components 19 with power semiconductors, second connectors) between them.
[068] La sixième étape du procédé, notée F sur la figure 1 , consiste à injecter un matériau isolant entre les secondes couches métalliques 12 desdits au moins deux substrats 2 comprenant la couche de fixation 18 des composants électroniques de puissance et des secondes connectiques. [068] The sixth step of the method, denoted F in FIG. 1, consists in injecting an insulating material between the second metallic layers 12 said at least two substrates 2 comprising the fixing layer 18 of the electronic power components and second connectors.
[069] Cette sixième étape F consiste à assurer l’isolation entre les différents éléments constitutifs du module électronique de puissance. Ainsi, les interstices entre les substrats 2, les composants 19 à semi-conducteurs de puissance, et les premières 16 et secondes connectiques, sont remplis par un encapsulant, un matériau isolant pouvant être choisi parmi : une résine époxy et/ou un gel silicone et/ou un élastomère silicone. [069] This sixth step F consists in ensuring the insulation between the various constituent elements of the electronic power module. Thus, the gaps between the substrates 2, the power semiconductor components 19, and the first 16 and second connectors, are filled with an encapsulant, an insulating material which can be chosen from: an epoxy resin and / or a silicone gel and / or a silicone elastomer.
[070] En particulier, pour dans le cas d’utilisation de composants 19 à semi- conducteurs de puissance de type SiC, GaN, l’encapsulant peut être choisi résistant à des températures supérieures ou égale à 200 °C.  In particular, for the use of power semiconductor components 19 of the SiC, GaN type, the encapsulant can be chosen to be resistant to temperatures greater than or equal to 200 ° C.
[071] Il est à noter, de plus, que la maîtrise de la hauteur des premières connectiques 16 grâce à leur fabrication par impression, permet d’utiliser une grande variété de matériaux d’encapsulation. En effet, par exemple, des matériaux d’encapsulation chargés avec des nano ou microparticules peuvent être utilisés. Ce genre de matériaux d’encapsulation chargés avec des nano ou microparticules, bien qu’ils aient des propriétés électriques plus intéressantes que des matériaux sans de telles particules, présente une viscosité plus élevée. Une viscosité élevée des matériaux encapsulant, dont l’écoulement est de fait réduit, rend difficile le remplissage des petits espacements. En maîtrisant la hauteur des connectiques 16, on peut alors s’assurer de dimensionner les espaces de sorte qu’ils peuvent être remplis avec des matériaux d’encapsulation chargés avec des nano ou microparticules.  [071] It should be noted, moreover, that the control of the height of the first connectors 16 thanks to their manufacture by printing, makes it possible to use a wide variety of encapsulation materials. Indeed, for example, encapsulation materials loaded with nano or microparticles can be used. This type of encapsulation material loaded with nano or microparticles, although they have more advantageous electrical properties than materials without such particles, has a higher viscosity. High viscosity of the encapsulating material, which in fact reduces flow, makes it difficult to fill small gaps. By controlling the height of the connectors 16, we can then be sure to size the spaces so that they can be filled with encapsulation materials loaded with nano or microparticles.
[072] Le procédé ici proposé se distingue des procédés de l’état de la technique de par la réduction du nombre d’étapes et du temps d’assemblage. En effet, ici une seule étape de solidification est nécessaire. [072] The method proposed here differs from prior art methods by the reduction in the number of steps and the assembly time. Indeed, here only one solidification step is necessary.
[073] Ainsi, au terme de ce procédé, un module électronique de puissance est obtenu, tel qu’illustré sur la figure 4. Un tel module électronique de puissance comprend donc deux substrats métallisés 2, chacun comprenant une première face 20 et une seconde face 22 opposées sur lesquelles sont disposées respectivement les couches métalliques 10, 12. Les substrats métallisés 2 sont disposés de sorte que leurs secondes faces 22 sont disposées en regard l’une de l’autre. En particulier, des dissipateurs thermiques 14 sont disposés directement sur chaque première face 20 des substrats 2 du module électronique et des connectiques 16 sont disposées sur chaque seconde face 22 du module électronique. Une couche de fixation est déposée sur les connectiques 16 de chacun des substrats 2. En outre, des composants 19 à semi-conducteurs de puissance et des connectiques externes sont disposés entre les couches de fixation 18 des substrats 2. En particulier, les composants 19 à semi-conducteurs de puissance comprennent des électrodes qui sont directement mises en contact avec la couche de fixation des substrats, de sorte que les composants 19 à semi- conducteurs de puissance sont maintenus entre les deux substrats. [073] Thus, at the end of this process, an electronic power module is obtained, as illustrated in FIG. 4. Such an electronic power module therefore comprises two metallized substrates 2, each comprising a first face 20 and a second opposite 22 opposite on which are arranged respectively the metal layers 10, 12. The metallized substrates 2 are arranged so that their second faces 22 are arranged opposite one another. In particular, heat sinks 14 are placed directly on each first face 20 of the substrates 2 of the electronic module and connectors 16 are placed on each second face 22 of the electronic module. A fixing layer is deposited on the connectors 16 of each of the substrates 2. In addition, power semiconductor components 19 and external connectors are placed between the fixing layers 18 of the substrates 2. In particular, the components 19 Power semiconductors include electrodes which are directly contacted with the substrate fixing layer, so that the power semiconductor components 19 are held between the two substrates.
[074] De tels modules électroniques de puissance présentent les avantages suivants :  [074] Such electronic power modules have the following advantages:
- Les modules obtenus présentent une très bonne performance thermique. En effet, avec des dissipateurs thermiques 14 présents sur les deux substrats 2, le refroidissement se fait sur deux faces du module électronique de puissance. En outre, la géométrie complexe des dissipateurs thermiques 14, grâce à leur impression, optimise l’échange thermique entre le fluide (air ou liquide) présent dans l’environnement du module électronique de puissance. La suppression des TIMs permet de réduire le nombre d’interfaces dans le module électronique de puissance, et donc réduit la résistance thermique de l’ensemble, permettant une meilleure évacuation des calories vers sle radiateur, et donc vers l’extérieur.  - The modules obtained have very good thermal performance. Indeed, with heat sinks 14 present on the two substrates 2, the cooling is done on two faces of the electronic power module. In addition, the complex geometry of the heat sinks 14, thanks to their printing, optimizes the heat exchange between the fluid (air or liquid) present in the environment of the electronic power module. The elimination of TIMs makes it possible to reduce the number of interfaces in the electronic power module, and therefore reduces the thermal resistance of the assembly, allowing better evacuation of calories to the radiator, and therefore to the outside.
- Les modules obtenus peuvent être utilisés à haute température. Ces modules sont compatibles avec l’utilisation de composants à semi- conducteur de puissance de type SiC et GaN pour des utilisations à plus de 200 °C, grâce à la suppression des TIMs qui limitent en température les modules électroniques de la technique antérieure. Ces modules sont intéressants pour des applications dans l’aéronautique, permettant de rapprocher l’électronique de commande des sources chaudes (par exemple moteurs, freins...) afin d’avoir des systèmes plus intégrés et d’en réduire l’encombrement. - The modules obtained can be used at high temperature. These modules are compatible with the use of power semiconductor components of the SiC and GaN type for uses above 200 ° C., thanks to the elimination of TIMs which limit the temperature of the electronic modules of the prior art. These modules are useful for applications in aeronautics, allowing the control electronics to be brought closer to hot sources (for example motors, brakes, etc.) in order to have more integrated systems and to reduce their size.
- Les modules électroniques de puissance obtenus peuvent présenter une densité de puissance surfacique et volumique des convertisseurs plus importante par rapport aux modules électroniques existants, notamment grâce l’utilisation de composants SiC et GaN combiné à la réduction de la résistance thermique globale du module électronique. - The electronic power modules obtained can have a higher power density and volume of the converters compared to existing electronic modules, in particular thanks to the use of SiC and GaN components combined with the reduction of the overall thermal resistance of the electronic module.

Claims

REVENDICATIONS
1. Procédé de fabrication d’un module électronique de puissance, comprenant les étapes suivantes : 1. Method for manufacturing an electronic power module, comprising the following steps:
a) Fournir au moins deux substrats céramiques métallisés (2) à partir d’au moins deux substrats céramiques (4), chacun des substrats céramiques (4) comprenant deux faces opposées (6, 8) sur lesquelles sont respectivement disposées une première et une seconde couches métalliques (10,12) ;  a) Provide at least two metallized ceramic substrates (2) from at least two ceramic substrates (4), each of the ceramic substrates (4) comprising two opposite faces (6, 8) on which a first and a second metallic layers (10,12);
b) Imprimer des dissipateurs thermiques (14) sur la première couche métallique (10) de chacun desdits au moins deux substrats (2) ; c) Imprimer des premières connectiques (16) sur la seconde couche métallique (12) de chacun desdits au moins deux substrats (2) ; d) Déposer, sur chaque substrat (2), une couche de fixation (18) au moins en partie sur les premières connectiques (16) imprimées sur la seconde couche métallique (12) de chacun desdits au moins deux substrats (2) ;  b) printing heat sinks (14) on the first metal layer (10) of each of said at least two substrates (2); c) Printing first connectors (16) on the second metal layer (12) of each of said at least two substrates (2); d) depositing, on each substrate (2), a fixing layer (18) at least in part on the first connectors (16) printed on the second metal layer (12) of each of said at least two substrates (2);
e) Disposer des composants à semi-conducteur de puissance et des secondes connectiques entre les couches de fixation desdits au moins deux substrats métallisés.  e) Arrange power semiconductor components and second connectors between the fixing layers of said at least two metallized substrates.
2. Procédé selon la revendication 1 , dans lequel lesdites secondes connectiques comprennent au moins une connectique externe.  2. Method according to claim 1, in which said second connectors comprise at least one external connector.
3. Procédé selon la revendication 1 , caractérisé en ce que les étapes b) et c) sont réalisées par la fusion sélective d’un lit de poudre métallique.  3. Method according to claim 1, characterized in that steps b) and c) are carried out by the selective melting of a bed of metal powder.
4. Procédé selon la revendication 2, caractérisé en ce que la poudre métallique choisie seule ou en combinaison parmi une poudre d’alliage et une poudre de métal pur.  4. Method according to claim 2, characterized in that the metal powder chosen alone or in combination from an alloy powder and a pure metal powder.
5. Procédé selon l’une des revendications 1 à 3, caractérisé en ce que chaque couche de fixation (18) fixant les composants (19) à semi- conducteurs de puissance ainsi que les connectiques entre eux et avec lesdites faces libres des secondes couches métalliques (12) desdits au moins deux substrats (2), est choisie parmi une brasure, une pâte d’argent, un matériau époxy-conducteur et du verre chargé en argent. 5. Method according to one of claims 1 to 3, characterized in that each fixing layer (18) fixing the components (19) with power semiconductors as well as the connections between them and with said free faces of the second metal layers (12) of said at least two substrates (2), is chosen from a solder, a silver paste, an epoxy-conductive material and glass loaded with silver.
6. Procédé selon l’une des revendications 1 à 4, caractérisé en ce que la couche de fixation (18) a une épaisseur supérieure ou égale à 10 pm.  6. Method according to one of claims 1 to 4, characterized in that the fixing layer (18) has a thickness greater than or equal to 10 pm.
7. Procédé selon l’une des revendications 1 à 5, caractérisé en ce que l’étape e) est suivie d’une étape de solidification de la couche de fixation (18) par brasage ou frittage ou recuit.  7. Method according to one of claims 1 to 5, characterized in that step e) is followed by a step of solidifying the fixing layer (18) by brazing or sintering or annealing.
8. Procédé selon l’une des revendications 1 à 6, caractérisé en ce que l’étape e) est suivie d’une étape f) consistant à :  8. Method according to one of claims 1 to 6, characterized in that step e) is followed by a step f) consisting in:
- Injecter un matériau isolant entre les secondes couches métalliques (12) desdits au moins deux substrats (2) comprenant la couche de fixation (18), les composants à semi-conducteur de puissance et les secondes connectiques.  - Injecting an insulating material between the second metallic layers (12) of said at least two substrates (2) comprising the fixing layer (18), the power semiconductor components and the second connectors.
9. Procédé selon la revendication 7, caractérisé en ce que le matériau isolant utilisé lors de l’étape f), est choisi parmi une résine époxy, un gel silicone et un élastomère silicone.  9. Method according to claim 7, characterized in that the insulating material used during step f) is chosen from an epoxy resin, a silicone gel and a silicone elastomer.
10. Module électronique de puissance pouvant être obtenu par le procédé selon l’une des revendications 1 à 8 comprenant au moins deux substrats céramiques métallisés (2), chacun comprenant une première face (20) et une seconde face (22) opposées, lesdits substrats céramiques métallisés (2) étant disposés de sorte que lesdites secondes faces (22) sont disposées en regard l’une de l’autre, caractérisé en ce que des dissipateurs thermiques (14) sont disposés directement sur chaque première face (20) et en ce que des premières connectiques (16) sont disposées sur chaque seconde face (22), des composants (19) à semi-conducteurs de puissance et des secondes connectiques étant disposés entre ces secondes faces (22) et fixés aux substrats (2) via deux couches de fixation (18).  10. Electronic power module obtainable by the method according to one of claims 1 to 8 comprising at least two metallized ceramic substrates (2), each comprising a first face (20) and a second face (22) opposite, said metallized ceramic substrates (2) being arranged so that said second faces (22) are arranged facing each other, characterized in that heat sinks (14) are arranged directly on each first face (20) and in that first connectors (16) are arranged on each second face (22), components (19) with power semiconductors and second connectors being placed between these second faces (22) and fixed to the substrates (2) via two fixing layers (18).
PCT/FR2019/051832 2018-07-27 2019-07-24 Method for producing a power electronics module WO2020021197A1 (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023079236A1 (en) 2021-11-08 2023-05-11 Safran Electrical system with cooling by heat-transfer fluid, aircraft comprising such a system and method for manufacturing such a system

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080224303A1 (en) * 2006-10-18 2008-09-18 Sunao Funakoshi Power Semiconductor Module
US20130307156A1 (en) * 2012-05-15 2013-11-21 Infineon Technologies Ag Reliable Area Joints for Power Semiconductors
US20160351468A1 (en) * 2015-05-28 2016-12-01 Ut-Battelle, Llc Integrated packaging of multiple double sided cooling planar bond power modules
WO2017166157A1 (en) * 2016-03-29 2017-10-05 Hong Kong Applied Science & Technology Research Institute Company Limited Three dimensional fully molded power electronics module for high power applications and the method thereof
EP3261119A1 (en) * 2016-06-21 2017-12-27 Infineon Technologies AG Power semiconductor module components and additive manufacturing thereof
FR3061989A1 (en) * 2017-01-18 2018-07-20 Safran METHOD FOR MANUFACTURING ADDITIVE MANUFACTURING ELECTRONIC POWER MODULE, SUBSTRATE AND MODULE THEREFOR

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080224303A1 (en) * 2006-10-18 2008-09-18 Sunao Funakoshi Power Semiconductor Module
US20130307156A1 (en) * 2012-05-15 2013-11-21 Infineon Technologies Ag Reliable Area Joints for Power Semiconductors
US20160351468A1 (en) * 2015-05-28 2016-12-01 Ut-Battelle, Llc Integrated packaging of multiple double sided cooling planar bond power modules
WO2017166157A1 (en) * 2016-03-29 2017-10-05 Hong Kong Applied Science & Technology Research Institute Company Limited Three dimensional fully molded power electronics module for high power applications and the method thereof
EP3261119A1 (en) * 2016-06-21 2017-12-27 Infineon Technologies AG Power semiconductor module components and additive manufacturing thereof
FR3061989A1 (en) * 2017-01-18 2018-07-20 Safran METHOD FOR MANUFACTURING ADDITIVE MANUFACTURING ELECTRONIC POWER MODULE, SUBSTRATE AND MODULE THEREFOR

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
HAQUE S ET AL: "An Innovative Technique for Packaging Power Electronic Building Blocks Using Metal Posts Interconnected Parallel Plate Structures", IEEE TRANSACTIONS ON ADVANCED PACKAGING, vol. 22, no. 2, May 1999 (1999-05-01), pages 136 - 144, XP011002144 *
SYED-KHAJA, AARIEFDANIEL SCHWARZJOERG FRANKE: "CPMT Symposium Japan (ICSJ", 2015, IEEE, article "Advanced substrate and packaging concepts for compact system intégration with additive manufacturing technologies for high temperature applications"

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023079236A1 (en) 2021-11-08 2023-05-11 Safran Electrical system with cooling by heat-transfer fluid, aircraft comprising such a system and method for manufacturing such a system
FR3128941A1 (en) 2021-11-08 2023-05-12 Safran FLUID-COOLED ELECTRICAL SYSTEM, AIRCRAFT COMPRISING SUCH A SYSTEM AND METHOD FOR MANUFACTURING SUCH A SYSTEM

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