WO2020003183A1

WO2020003183A1 - Partitioning of zero unit

Info

Publication number: WO2020003183A1
Application number: PCT/IB2019/055433
Authority: WO
Inventors: Kai Zhang; Li Zhang; Hongbin Liu; Hsiao Chiang Chuang; Yue Wang
Original assignee: Beijing Bytedance Network Technology Co., Ltd.; Bytedance Inc.
Priority date: 2018-06-29
Filing date: 2019-06-27
Publication date: 2020-01-02
Also published as: TWI707580B; CN110662038B; TW202002658A; CN110662038A

Abstract

Zero units (ZU) are used in coding or decoding of video. One example method of video processing includes determining that a block of video data is to be coded as a ZU block, due to the block of video data having dimensions S×T at least one of S and T being a non-power-of two number; partitioning the ZU block into one of two units, three units, or four units; and generating a bitstream by coding the units.

Description

PARTITIONING OF ZERO UNIT

CROSS REFERENCE TO RELATED APPLICATIONS

[0001] Under the applicable patent law and/or rules pursuant to the Paris Convention, this application is made to timely claim the priority to and benefits of International Patent Application No. PCT/CN2018/093631, filed on June 29, 2018, and U.S. Provisional Patent Application No. 62/693,415, filed on July 2, 2018, and International Patent Application No. PCT/CN2018/094767, filed on July 6, 2018. For all purposes under the U.S. law, the entire disclosures of International Patent Application No. PCT/CN2018/093631, U.S. Provisional Patent Application No. 62/693,415, and International Patent Application No. PCT/CN2018/094767 are incorporated by reference as part of the disclosure of this application.

TECHNICAL FIELD

[0002] This patent document is directed generally to image and video coding technologies.

BACKGROUND

[0003] Digital video accounts for the largest bandwidth use on the internet and other digital communication networks. As the number of connected user devices capable of receiving and displaying video increases, it is expected that the bandwidth demand for digital video usage will continue to grow.

SUMMARY

[0004] Devices, systems and methods related to a specialized coding unit (CU) and/or coding tree unit (CTU) to increase coding efficiency are described. Specifically, the presently disclosed technology discloses provides the zero-unit that enhances, in an example, the processing of sub blocks that are located at the borders of a block of video data (e.g., in a picture, slice, tile and the like). The described methods may be applied to both the existing video coding standards (e.g., High Efficiency Video Coding (HEVC)) and future video coding standards or video codecs.

[0005] In one representative aspect, the disclosed technology may be used to provide a method for video coding, which may be implemented in a video encoder. This method includes determining that a block of video data is to be coded as a zero unit (ZU) block, due to the block of video data having dimensions SxT at least one of S and T being a non-power-of two number; partitioning the ZU block into one of two units, three units, or four units; and generating a bitstream by coding the units.

[0006] In another example aspect, another method of video processing is disclosed. The method includes receiving a bitstream corresponding to a block of video data coded as a zero unit (ZU) block partitioned into two units, three units or four units, the block of video data having dimensions SxT; and generating the block of video data by decoding the bitstream.

[0007] In another example aspect, another method of video processing is disclosed. The method includes determining that a block of video data is to be coded as a zero unit (ZU) block due to the block having a height or a width that is a non-power-of-two number; partitioning the block of video data using a partitioning scheme, wherein the partitioning scheme partitions the block of video data into one of two units, three units, or four units; generating a bitstream by coding the block of video data, wherein the partitioning scheme is signaled using a syntax that is identical to that used for signaling partitioning of another block of video data that is a non-zero unit block.

[0008] In another example aspect, another method of video processing is disclosed. The method includes receiving a bitstream corresponding to a block of video data that is coded as a zero unit (ZU) block due to the block of video data having dimensions SxT, at least one of S and T being a non-power-of two number, wherein the block of video data is partitioned using a partitioning scheme that partitions the block of video data into one of two units, three units, or four units, and wherein the partitioning scheme is signaled in the bitstream using a syntax that is identical to that used for signaling partitioning of a non-zero unit block; decoding, based on the signaling, the bitstream to generate the block of video data.

[0009] In another example aspect, another method of video processing is disclosed. The method includes determining that a block of video data is to be coded as a zero unit (ZU) block due to the block of video data having dimensions SxT, at least one of S and T being a non- power-of two number; partitioning the ZU block into one of two units, three units, or four units using a partitioning scheme selected from a set of ZU block partitioning schemes; coding the units; and signaling the coded units in a bitstream. Here, the set of ZU block partitioning schemes is a subset of a set of partitioning schemes available for splitting a coding unit (CU). [0010] In another example aspect, another method of video processing is disclosed. The method includes receiving a bitstream corresponding to a block of video data, the block of video data having dimensions; receiving signaling indicating that the block of video data is partitioned as a zero unit (ZU) block due to the block of video data having dimensions SxT, at least one of S and T being a non-power-of two number, the block being partitioned using a partitioning scheme selected from a set of ZU block partitioning schemes; and decoding, based on the signaling, the bitstream corresponding to the units to reconstruct the block of video data. Here, the set of ZU block partitioning schemes is a subset of a set of partitioning schemes available for splitting a coding unit (CU).

[0011] In another example aspect, another method of video processing is disclosed. The method includes determining that a block of video data is to be coded as a zero unit (ZU) block due to the block of video data having dimensions, at least one of which is a non-power-of two number; partitioning the ZU block into one of two, three or four units upon determining that the ZU block is located in an I-slice or an intra-coded picture; coding the units; and signaling the coded units in a bitstream.

[0012] In another example aspect, another method of video processing is disclosed. The method includes receiving a bitstream corresponding to a block of video data, the block of video data having dimensions; receiving signaling indicating that the block of video data includes units partitioned from a zero unit (ZU) block that has at least a height or a width that is a non-power- of-two number and is coded without a transform and a residual coding, the partitioned ZU block being located in an I-slice or an intra-coded picture; and decoding, based on the signaling, the bitstream corresponding to the units to reconstruct the block of video data.

[0013] In yet another representative aspect, the above-described method is embodied in the form of processor-executable code and stored in a computer-readable program medium.

[0014] In yet another representative aspect, a device that is configured or operable to perform the above-described method is disclosed. The device may include a processor that is

programmed to implement this method.

[0015] In yet another representative aspect, a video decoder apparatus may implement a method as described herein.

[0016] The above and other aspects and features of the disclosed technology are described in greater detail in the drawings, the description and the claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] FIG. 1 shows an example block diagram of a typical High Efficiency Video Coding (HE VC) video encoder and decoder.

[0018] FIG. 2 shows examples of macroblock (MB) partitions in H.264/AVC.

[0019] FIG. 3 shows examples of splitting coding blocks (CBs) into prediction blocks (PBs).

[0020] FIGS. 4A and 4B show an example of the subdivision of a coding tree block (CTB) into CBs and transform blocks (TBs), and the corresponding quadtree, respectively.

[0021] FIG. 5 shows an example of a partition structure of one frame.

[0022] FIGS. 6A and 6B show the subdivisions and signaling methods, respectively, of a CTB highlighted in the exemplary frame in FIG. 5.

[0023] FIGS. 7A and 7B show an example of the subdivisions and a corresponding QTBT (quadtree plus binary tree) for a largest coding unit (ECU).

[0024] FIGS. 8A-8E show examples of partitioning a coding block.

[0025] FIG. 9 shows an example subdivision of a CB based on a QTBT.

[0026] FIGS. 10A-10I show examples of the partitions of a CB supported the multi-tree type (MTT), which is a generalization of the QTBT.

[0027] FIG. 11 shows an example of tree-type signaling.

[0028] FIGS. 12A-12C show examples of CTBs crossing picture borders.

[0029] FIG. 13 shows an example of a zero-unit at a picture border.

[0030] FIG. 14 shows a flowchart of an example method for video encoding in accordance with the presently disclosed technology.

[0031] FIG. 15 shows a flowchart of another example method for video decoding in accordance with the presently disclosed technology.

[0032] FIG. 16 is a block diagram illustrating an example of the architecture for a computer system or other control device that can be utilized to implement various portions of the presently disclosed technology.

[0033] FIG. 17 shows a block diagram of an example embodiment of a mobile device that can be utilized to implement various portions of the presently disclosed technology.

[0034] FIG. 18 is a flowchart for an example method of video processing.

[0035] FIG. 19 is a flowchart for an example method of video processing. DETAILED DESCRIPTION

[0036] Due to the increasing demand of higher resolution video, video coding methods and techniques are ubiquitous in modern technology. Video codecs typically include an electronic circuit or software that compresses or decompresses digital video, and are continually being improved to provide higher coding efficiency. A video codec converts uncompressed video to a compressed format or vice versa. There are complex relationships between the video quality, the amount of data used to represent the video (determined by the bit rate), the complexity of the encoding and decoding algorithms, sensitivity to data losses and errors, ease of editing, random access, and end-to-end delay (latency). The compressed format usually conforms to a standard video compression specification, e.g., the High Efficiency Video Coding (HEVC) standard (also known as H.265 or MPEG-H Part 2), the Versatile Video Coding standard to be finalized, or other current and/or future video coding standards.

[0037] Embodiments of the disclosed technology may be applied to existing video coding standards (e.g., HEVC, H.265) and future standards to improve compression performance.

Section headings are used in the present document to improve readability of the description and do not in any way limit the discussion or the embodiments (and/or implementations) to the respective sections only.

[0038] Section headings are used in the present document to facilitate ease of understanding and do not limit the embodiments disclosed in a section to only that section. Furthermore, while certain embodiments are described with reference to Versatile Video Coding or other specific video codecs, the disclosed techniques are applicable to other video coding technologies also. Furthermore, while some embodiments describe video coding steps in detail, it will be understood that corresponding steps decoding that undo the coding will be implemented by a decoder. Furthermore, the term video processing encompasses video coding or compression, video decoding or decompression and video transcoding in which video pixels are represented from one compressed format into another compressed format or at a different compressed bitrate. 1. Example embodiments of video coding

[0039] FIG. 1 shows an example block diagram of a typical HEVC video encoder and decoder. An encoding algorithm producing an HEVC compliant bitstream would typically proceed as follows. Each picture is split into block-shaped regions, with the exact block partitioning being conveyed to the decoder. The first picture of a video sequence (and the first picture at each clean random access point into a video sequence) is coded using only intra picture prediction (that uses some prediction of data spatially from region-to-region within the same picture, but has no dependence on other pictures). For all remaining pictures of a sequence or between random access points, inter-picture temporally predictive coding modes are typically used for most blocks. The encoding process for inter-picture prediction consists of choosing motion data comprising the selected reference picture and motion vector (MV) to be applied for predicting the samples of each block. The encoder and decoder generate identical inter-picture prediction signals by applying motion compensation (MC) using the MV and mode decision data, which are transmitted as side information.

[0040] The residual signal of the intra- or inter-picture prediction, which is the difference between the original block and its prediction, is transformed by a linear spatial transform. The transform coefficients are then scaled, quantized, entropy coded, and transmitted together with the prediction information.

[0041] The encoder duplicates the decoder processing loop (see gray-shaded boxes in FIG.

1) such that both will generate identical predictions for subsequent data. Therefore, the quantized transform coefficients are constructed by inverse scaling and are then inverse transformed to duplicate the decoded approximation of the residual signal. The residual is then added to the prediction, and the result of that addition may then be fed into one or two loop filters to smooth out artifacts induced by block-wise processing and quantization. The final picture representation (that is a duplicate of the output of the decoder) is stored in a decoded picture buffer to be used for the prediction of subsequent pictures. In general, the order of encoding or decoding processing of pictures often differs from the order in which they arrive from the source;

necessitating a distinction between the decoding order (i.e., bitstream order) and the output order (i.e., display order) for a decoder.

[0042] Video material to be encoded by HEVC is generally expected to be input as progressive scan imagery (either due to the source video originating in that format or resulting from deinterlacing prior to encoding). No explicit coding features are present in the HEVC design to support the use of interlaced scanning, as interlaced scanning is no longer used for displays and is becoming substantially less common for distribution. However, a metadata syntax has been provided in HEVC to allow an encoder to indicate that interlace-scanned video has been sent by coding each field (i.e., the even or odd numbered lines of each video frame) of interlaced video as a separate picture or that it has been sent by coding each interlaced frame as an HEVC coded picture. This provides an efficient method of coding interlaced video without burdening decoders with a need to support a special decoding process for it.

1.1. Examples of partition tree structures in H.264/AVC

[0043] The core of the coding layer in previous standards was the macroblock, containing a 16x 16 block of luma samples and, in the usual case of 4:2:0 color sampling, two corresponding 8x8 blocks of chroma samples.

[0044] An intra-coded block uses spatial prediction to exploit spatial correlation among pixels. Two partitions are defined: 16x16 and 4x4.

[0045] An inter-coded block uses temporal prediction, instead of spatial prediction, by estimating motion among pictures. Motion can be estimated independently for either 16x16 macroblock or any of its sub-macroblock partitions: 16x8, 8x16, 8x8, 8x4, 4x8, 4x4, as shown in FIG. 2. Only one motion vector (MV) per sub-macroblock partition is allowed.

1.2 Examples of partition tree structures in HEVC

[0046] In HEVC, a coding tree unit (CTU) is split into coding units (CUs) by using a quadtree structure denoted as coding tree to adapt to various local characteristics. The decision whether to code a picture area using inter-picture (temporal) or intra-picture (spatial) prediction is made at the CU level. Each CU can be further split into one, two or four prediction units (PUs) according to the PU splitting type. Inside one PU, the same prediction process is applied and the relevant information is transmitted to the decoder on a PU basis. After obtaining the residual block by applying the prediction process based on the PU splitting type, a CU can be partitioned into transform units (TUs) according to another quadtree structure similar to the coding tree for the CU. One of key feature of the HEVC structure is that it has the multiple partition conceptions including CU, PU, and TU.

[0047] Certain features involved in hybrid video coding using HEVC include:

[0048] ( 1 ) Coding tree units (CTUs) and coding tree block (CTB) structure: The analogous structure in HEVC is the coding tree unit (CTU), which has a size selected by the encoder and can be larger than a traditional macroblock. The CTU consists of a luma CTB and the corresponding chroma CTBs and syntax elements. The size LxL of a luma CTB can be chosen as L = 16, 32, or 64 samples, with the larger sizes typically enabling better compression. HEVC then supports a partitioning of the CTBs into smaller blocks using a tree structure and quadtree-like signaling.

[0049] (2) Coding units (CUsf and coding blocks (CBsf: The quadtree syntax of the CTU specifies the size and positions of its luma and chroma CBs. The root of the quadtree is associated with the CTU. Hence, the size of the luma CTB is the largest supported size for a luma CB. The splitting of a CTU into luma and chroma CBs is signaled jointly. One luma CB and ordinarily two chroma CBs, together with associated syntax, form a coding unit (CU). A CTB may contain only one CU or may be split to form multiple CUs, and each CU has an associated partitioning into prediction units (PUs) and a tree of transform units (TUs).

[0050] (3) Prediction units and prediction blocks (PBsj: The decision whether to code a picture area using inter picture or intra picture prediction is made at the CU level. A PU partitioning structure has its root at the CU level. Depending on the basic prediction-type decision, the luma and chroma CBs can then be further split in size and predicted from luma and chroma prediction blocks (PBs). HEVC supports variable PB sizes from 64x64 down to 4x4 samples. FIG. 3 shows examples of allowed PBs for an MxM CU.

[0051] (4) Transform units (Tusj and transform blocks: The prediction residual is coded using block transforms. A TU tree structure has its root at the CU level. The luma CB residual may be identical to the luma transform block (TB) or may be further split into smaller luma TBs. The same applies to the chroma TBs. Integer basis functions similar to those of a discrete cosine transform (DCT) are defined for the square TB sizes 4x4, 8x8, 16x16, and 32x32. For the 4x4 transform of luma intra picture prediction residuals, an integer transform derived from a form of discrete sine transform (DST) is alternatively specified.

1.2.1. Examples of tree-structured partitioning into TBs and TUs

[0052] For residual coding, a CB can be recursively partitioned into transform blocks (TBs). The partitioning is signaled by a residual quadtree. Only square CB and TB partitioning is specified, where a block can be recursively split into quadrants, as illustrated in FIG. 4. For a given luma CB of size MxM, a flag signals whether it is split into four blocks of size M/2xM/2. If further splitting is possible, as signaled by a maximum depth of the residual quadtree indicated in the SPS, each quadrant is assigned a flag that indicates whether it is split into four quadrants. The leaf node blocks resulting from the residual quadtree are the transform blocks that are further processed by transform coding. The encoder indicates the maximum and minimum luma TB sizes that it will use. Splitting is implicit when the CB size is larger than the maximum TB size. Not splitting is implicit when splitting would result in a luma TB size smaller than the indicated minimum. The chroma TB size is half the luma TB size in each dimension, except when the luma TB size is 4x4, in which case a single 4x4 chroma TB is used for the region covered by four 4x4 luma TBs. In the case of intra-picture-predicted CUs, the decoded samples of the nearest-neighboring TBs (within or outside the CB) are used as reference data for intra picture prediction.

[0053] In contrast to previous standards, the HEVC design allows a TB to span across multiple PBs for inter-picture predicted CUs to maximize the potential coding efficiency benefits of the quadtree-structured TB partitioning.

1.2.2. Examples of picture border coding

[0054] The borders of the picture are defined in units of the minimally allowed luma CB size. As a result, at the right and bottom borders of the picture, some CTUs may cover regions that are partly outside the borders of the picture. This condition is detected by the decoder, and the CTU quadtree is implicitly split as necessary to reduce the CB size to the point where the entire CB will fit into the picture.

[0055] FIG. 5 shows an example of a partition structure of one frame, with a resolution of 416x240 pixels and dimensions 7 CTBs x 4 CTBs, wherein the size of a CTB is 64x64. As shown in FIG. 5, the CTBs that are partially outside the right and bottom border have implied splits (dashed lines, indicated as 502), and the CUs that fall outside completely are simply skipped (not coded).

[0056] In the example shown in FIG. 5, the highlighted CTB (504), with row CTB index equal to 2 and column CTB index equal to 3, has 64x48 pixels within the current picture, and doesn’t fit a 64x64 CTB. Therefore, it is forced to be split to 32x32 without the split flag signaled. For the top-left 32x32, it is fully covered by the frame. When it chooses to be coded in smaller blocks (8x8 for the top-left 16x16, and the remaining are coded in 16x16) according to rate-distortion cost, several split flags need to be coded. These split flags (one for whether split the top-left 32x32 to four 16x16 blocks, and flags for signaling whether one 16x16 is further split and 8x8 is further split for each of the four 8x8 blocks within the top-left 16x16) have to be explicitly signaled. A similar situation exists for the top-right 32x32 block. For the two bottom 32x32 blocks, since they are partially outside the picture border (506), further QT split needs to be applied without being signaled. FIGS. 6A and 6B show the subdivisions and signaling methods, respectively, of the highlighted CTB (504) in FIG. 5.

1.2.3. Examples of CTB size indications

[0057] An example RBSP (raw byte sequence payload) syntax table for the general sequence parameter set is shown in Table 1.

Table 1 : RBSP syntax structure

[0058] The corresponding semantics includes:

[0059] log2_min_luma_coding_block_size_minus3 plus 3 specifies the minimum luma coding block size; and

[0060] log2_diff_max_min_luma_coding_block_size specifies the difference between the maximum and minimum luma coding block size.

[0061] The variables MinCbLog2SizeY, CtbLog2SizeY, MinCbSizeY, CtbSizeY,

PicWidthlnMinCbsY, PicWidthlnCtbsY, PicHeightlnMinCbsY, PicHeightlnCtbsY,

PicSizelnMinCbsY, PicSizelnCtbsY, PicSizelnSamplesY, PicWidthlnSamplesC and

PicHeightlnSamplesC are derived as follows:

[0062] MinCbLog2SizeY = log2_min_luma_coding_block_size_minus3 + 3

[0063] CtbLog2SizeY = MinCbLog2SizeY + log2_diff_max_min_luma_coding_block_size [0064] MinCbSizeY = 1 « MmCbLog2SizeY

[0065] CtbSizeY = 1 « CtbLog2SizeY

[0066] PicWidthlnMinCbsY = pic width in luma samples / MinCbSizeY

[0067] PicWidthlnCtbsY = Ceil( pic width in luma samples ÷ CtbSizeY )

[0068] PicHeightlnMinCbsY = pic height in luma samples / MinCbSizeY [0069] PicHeightlnCtbsY = Ceil( pic height in luma samples ÷ CtbSizeY )

[0070] PicSizelnMinCbsY = PicWidthlnMinCbsY * PicHeightlnMinCbsY

[0071] PicSizelnCtbsY = PicWidthlnCtbsY * PicHeightlnCtbsY

[0072] PicSizelnSamplesY = pic width in luma samples * pic height in luma samples [0073] PicWidthlnSamplesC = pic width in luma samples / SubWidthC

[0074] PicHeightlnSamplesC = pic height in luma samples / SubHeightC

[0075] The variables CtbWidthC and CtbHeightC, which specify the width and height, respectively, of the array for each chroma CTB, are derived as follows:

[0076] If chroma format idc is equal to 0 (monochrome) or separate_colour_plane_flag is equal to 1, CtbWidthC and CtbHeightC are both equal to 0;

[0077] Otherwise, CtbWidthC and CtbHeightC are derived as follows:

[0078] CtbWidthC = CtbSizeY / SubWidthC

[0079] CtbHeightC = CtbSizeY / SubHeightC

1.3. Examples of quadtree plus binary tree block structures with larger CTUs in JEM

[0080] In some embodiments, future video coding technologies are explored using a reference software known as the Joint Exploration Model (JEM). In addition to binary tree structures, JEM describes quadtree plus binary tree (QTBT) and ternary tree (TT) structures.

1.3.1. Examples of the QTBT block partitioning structure

[0081] In contrast to HEVC, the QTBT structure removes the concepts of multiple partition types, i.e. it removes the separation of the CU, PU and TU concepts, and supports more flexibility for CU partition shapes. In the QTBT block structure, a CU can have either a square or rectangular shape. As shown in FIG. 7A, a coding tree unit (CTU) is first partitioned by a quadtree structure. The quadtree leaf nodes are further partitioned by a binary tree structure. There are two splitting types, symmetric horizontal splitting and symmetric vertical splitting, in the binary tree splitting. The binary tree leaf nodes are called coding units (CUs), and that segmentation is used for prediction and transform processing without any further partitioning. This means that the CU, PU and TU have the same block size in the QTBT coding block structure. In the JEM, a CU sometimes consists of coding blocks (CBs) of different colour components, e.g. one CU contains one luma CB and two chroma CBs in the case of P and B slices of the 4:2:0 chroma format and sometimes consists of a CB of a single component, e.g., one CU contains only one luma CB or just two chroma CBs in the case of I slices. [0082] The following parameters are defined for the QTBT partitioning scheme:

[0083] — CTU size: the root node size of a quadtree, the same concept as in HEVC

[0084] — MinQTSize : the minimally allowed quadtree leaf node size

[0085] — MaxBTSize : the maximally allowed binary tree root node size

[0086] — MaxBTDepth: the maximally allowed binary tree depth

[0087] — MinBTSize : the minimally allowed binary tree leaf node size

[0088] In one example of the QTBT partitioning structure, the CTU size is set as 128x 128 luma samples with two corresponding 64x64 blocks of chroma samples, theMinQTSize is set as 16x 16, t e MaxBTSize is set as 64x64, the MinBTSize (for both width and height) is set as 4x4, and the MaxBTDepth is set as 4. The quadtree partitioning is applied to the CTU first to generate quadtree leaf nodes. The quadtree leaf nodes may have a size from 16x 16 (i.e., the MinQTSize) to 128x128 (i.e., the CTU size). If the leaf quadtree node is 128x128, it will not be further split by the binary tree since the size exceeds the MaxBTSize (i.e., 64x64). Otherwise, the leaf quadtree node could be further partitioned by the binary tree. Therefore, the quadtree leaf node is also the root node for the binary tree and it has the binary tree depth as 0. When the binary tree depth reaches MaxBTDepth (i.e., 4), no further splitting is considered. When the binary tree node has width equal to MinBTSize (i.e., 4), no further horizontal splitting is considered. Similarly, when the binary tree node has height equal to MinBTSize, no further vertical splitting is considered. The leaf nodes of the binary tree are further processed by prediction and transform processing without any further partitioning. In the JEM, the maximum CTU size is 256x256 luma samples.

[0089] FIG. 7A shows an example of block partitioning by using QTBT, and FIG. 7B shows the corresponding tree representation. The solid lines indicate quadtree splitting and dotted lines indicate binary tree splitting. In each splitting (i.e., non-leaf) node of the binary tree, one flag is signalled to indicate which splitting type (i.e., horizontal or vertical) is used, where 0 indicates horizontal splitting and 1 indicates vertical splitting. For the quadtree splitting, there is no need to indicate the splitting type since quadtree splitting always splits a block both horizontally and vertically to produce 4 sub-blocks with an equal size.

[0090] In addition, the QTBT scheme supports the ability for the luma and chroma to have a separate QTBT structure. Currently, for P and B slices, the luma and chroma CTBs in one CTU share the same QTBT structure. However, for I slices, the luma CTB is partitioned into CUs by a QTBT structure, and the chroma CTBs are partitioned into chroma CUs by another QTBT structure. This means that a CU in an I slice consists of a coding block of the luma component or coding blocks of two chroma components, and a CU in a P or B slice consists of coding blocks of all three colour components.

[0091] In HEVC, inter prediction for small blocks is restricted to reduce the memory access of motion compensation, such that bi-prediction is not supported for 4x8 and 8x4 blocks, and inter prediction is not supported for 4x4 blocks. In the QTBT of the JEM, these restrictions are removed.

1.4. Ternary-tree (TT) for Versatile Video Coding (WC)

[0092] FIG. 8 A shows an example of quad-tree (QT) partitioning, and FIGS. 8B and 8C show examples of the vertical and horizontal binary-tree (BT) partitioning, respectively. In some embodiments, and in addition to quad-trees and binary-trees, ternary tree (TT) partitions, e.g., horizontal and vertical center-side ternary- trees (as shown in FIGS. 8D and 8E) are supported.

[0093] In some implementations, two levels of trees are supported: region tree (quad-tree) and prediction tree (binary-tree or ternary-tree). A CTU is firstly partitioned by region tree (RT). A RT leaf may be further split with prediction tree (PT). A PT leaf may also be further split with PT until max PT depth is reached. A PT leaf is the basic coding unit. It is still called CU for convenience. A CU cannot be further split. Prediction and transform are both applied on CU in the same way as JEM. The whole partition structure is named‘multiple-type-tree’.

1.5. Examples of partitioning structures in alternate video coding technologies

[0094] In some embodiments, a tree structure called a Multi-Tree Type (MTT), which is a generalization of the QTBT, is supported. In QTBT, as shown in FIG. 9, a Coding Tree Unit (CTU) is firstly partitioned by a quad-tree structure. The quad-tree leaf nodes are further partitioned by a binary-tree structure.

[0095] The structure of the MTT constitutes of two types of tree nodes: Region Tree (RT) and Prediction Tree (PT), supporting nine types of partitions, as shown in FIG. 10A to 101. A region tree can recursively split a CTU into square blocks down to a 4x4 size region tree leaf node. At each node in a region tree, a prediction tree can be formed from one of three tree types: Binary Tree, Ternary Tree, and Asymmetric Binary Tree. In a PT split, it is prohibited to have a quadtree partition in branches of the prediction tree. As in JEM, the luma tree and the chroma tree are separated in I slices. [0096] In general, RT signaling is same as QT signaling in JEM with exception of the context derivation. For PT signaling, up to 4 additional bins are required, as shown in FIG. 11. The first bin indicates whether the PT is further split or not. The context for this bin is calculated based on the observation that the likelihood of further split is highly correlated to the relative size of the current block to its neighbors. If PT is further split, the second bin indicates whether it is a horizontal partitioning or vertical partitioning. In some embodiments, the presence of the center sided triple tree and the asymmetric binary trees (ABTs) increase the occurrence of“tall” or “wide” blocks. The third bin indicates the tree-type of the partition, i.e., whether it is a binary- tree/triple-tree, or an asymmetric binary tree. In case of a binary-tree/triple-tree, the fourth bin indicates the type of the tree. In case of asymmetric binary trees, the four bin indicates up or down type for horizontally partitioned trees and right or left type for vertically partitioned trees. 1.5.1. Examples of restrictions at picture borders

[0097] In some embodiments, if the CTB/LCU size is indicated by M x N (typically M is equal to N, as defined in HEVC/JEM), and for a CTB located at picture (or tile or slice or other kinds of types) border, K x L samples are within picture border.

[0098] The CU splitting rules on the picture bottom and right borders may apply to any of the coding tree configuration QTBT+TT, QTBT+ABT or QTBT+TT+ABT. They include the two following aspects:

[0099] (1) If a part of a given Coding Tree node (CU) is partially located outside the picture, then the binary symmetric splitting of the CU is always allowed, along the concerned border direction (horizontal split orientation along bottom border, as shown in FIG. 12A, vertical split orientation along right border, as shown in FIG. 12B). If the bottom-right corner of the current CU is outside the frame (as depicted in FIG. 12C), then only the quad-tree splitting of the CU is allowed. In addition, if the current binary tree depth is greater than the maximum binary tree depth and current CU is on the frame border, then the binary split is enabled to ensure the frame border is reached.

[00100] (2) With respect to the ternary tree splitting process, the ternary tree split is allowed in case the first or the second border between resulting sub-CU exactly lies on the border of the picture. The asymmetric binary tree splitting is allowed if a splitting line (border between two sub-CU resulting from the split) exactly matches the picture border.

2. Examples of existing implementations [00101] Existing implementations, the width or the height of a CTU or a CU may be not equal to 2ⁿ, where N is a positive integer. These cases are difficult to handle. Specifically, may be difficult to design a transform with integer-operations excluding division, if the number of rows or columns is not in a form of 2^N.

[00102] In one example, to avoid a CTU or a CU with width or height not equal to 2^N, the CTU or CU are forced to be split into smaller ones, until both the width and height are in the form of 2^N or by padding or using transform skip. The coding gain may be further improved if treating those blocks in a more flexible way.

[00103] In another example, transforms are defined for CUs with the width or the height not in the form of 2^N. Such transforms are not desirable in practical video coding applications.

3. Example methods using zero-units based on the disclosed technology

[00104] Embodiments of the presently disclosed technology overcome the drawbacks of existing implementations, thereby providing video coding with higher efficiencies. Specifically, the zero-unit block is proposed as a special CU/CTU, and a block is interpreted as a zero-unit if and only if its height and/or width are not of the form 2^N.

[00105] The use of zero-units to improve video coding efficiency and enhance both existing and future video coding standards is elucidated in the following examples described for various implementations. The examples of the disclosed technology provided below explain general concepts, and are not meant to be interpreted as limiting. In an example, unless explicitly indicated to the contrary, the various features described in these examples may be combined. In another example, the various features described in these examples may be applied to methods for picture border coding that employ block sizes that are backward compatible and use partition trees for visual media coding. FIG. 13 shows an example of a zero-unit at a picture border (with dimensions in pixels or samples).

[00106] Example A A zero-unit can be further split into two (BT or ABT), three (TT, FTT) or four (QT, EQT) units. A split unit split from a zero-unit can be a zero-unit, or it can be a normal CU with its width or height in the form of 2^N. Suppose a zero-unit Z is with the size SxT.

[00107] (a) In one example, Z can be split with BT into two units both with the size as

S/2xT.

[00108] (b) In one example, Z can be split with BT into two units both with the size as

SxT/2. [00109] (c) In one example, suppose 2^N<S<2^N+1, Z can be split with BT into two units with the size as 2^NxT and (S-2^X)/T, or (S-2^N)xT and 2^NxT.

[00110] (d) In one example, suppose 2^N<T<2^N+1, Z can be split with BT into two units with the size as Sx2^N and Sx(T-2^N), or Sx(T-2^N) and Sx2^N.

[00111] (e) In one example, Z can be split with TT into three units with the size as S/4xT,

S/2xT and S/4xT.

[00112] (f) In one example, Z can be split with TT into three units with the size as SxT/4,

SxT/2 and SxT/4.

[00113] (g) In one example, suppose 2^N<S<2^N+1, Z can be split with TT into three units with the size as 2^x ' xT, 2^xx xT and (S-2^N)xT, or 2^x ' xT, (S-2^N)xT and 2^x ' xT, or (S-2^N)xT, 2^{N 1}xT and 2^{N 1}xT.

[00114] (h) In one example, suppose 2^N<T<2^N+1, Z can be split with TT into three units with the size as Sx2^{N 1}, Sx2^{N 1} and Sx(T-2^N), or Sx2^{N 1}, Sx(T-2^N) and Sx2^{N 1}, or Sx(T-2^N),

S X2^{n 1} and Sx2^{N 1}.

[00115] (i) In one example, Z can be split with QT into four units both with the size as

S/2xT/2.

[00116] (i) In one example, suppose 2^N<S<2^N+1, Z can be split with QT into four units with the size as 2^NxT/2, 2^NxT/2, (S-2^N)xT/2 and (S-2^N)xT/2, or (S-2^N)xT/2, (S-2^N)xT/2, 2^NxT/2 and 2^NXT/2.

[00117] (k) In one example, suppose 2^N<T<2^N+1, Z can be split with QT into four units with the size as S/2x2^N, S/2x2^N, S/2x(T-2^N) and S/2x(T-2^N), or S/2x(T-2^N), S/2x(T-2^N), S/2x2^N and S/2X2ⁿ.

[00118] (1) In one example, suppose 2^N<S<2^N+1 and 2^M<T<2^M+1, Z can be split with QT into four units with the size as 2^Nx2^M, 2^Nx2^M, (S-2^N)x(T-2^M) and (S-2^N)x(T-2^M), or (S-2^N)x(T- 2^m), (S-2^N)X(T-2^m), 2^NX2^M and 2^Nx2^M, or 2^Nx(T-2^M), 2^Nx(T-2^M), (S-2^N)x 2^M and (S-2^N)x 2^M, or (S-2^N)X 2^m, (S-2^N)X 2^m, 2^NX(T-2^m) and 2^Nx(T-2^M).

[00119] (m) In one example, the width/height of all split units shall be even. If one partition structure results in a unit with either width or height to be odd, such a partition structure is automatically disallowed.

[00120] Alternatively, furthermore, the signaling of such a partition structure is skipped.

[00121] (n) In one example, Z can be split with TT into three units. [00122] In one example, suppose 3*2^N<S<=3*2^N+1, the three units size are 2^X/T, 2^N+1xT and (S-3*2^N)XT, respectively.

[00123] In one example, suppose 3*2^X<T<=3*2^X , the three units size are Sx2^N, Sx2^N+1 and S X(T-3*2ⁿ) , respectively.

[00124] (o) In one example, the width and/or height of all split units shall be in a form of

K*M, where M is the minimum width and/or height of allowed coding units/prediction units, such as 4; K is an integer larger than 0. If one partition structure results in a unit with either width or height not in such a form that partition structure is automatically disallowed.

[00125] For example, suppose the width and height of a split unit in a partition structure is W and H, if W<M or H <M or (W&(M-l)!=0) or (H&(M-l)!=0), then the partition structure is disallowed.

[00126] Alternatively, furthermore, the signaling of such a partition structure is skipped.

[00127] Alternatively, width and/or height of all split non-ZUs shall be in a form of K*M, where M is the minimum width and/or height of allowed coding units/prediction units, such as 4. In this case, if a split zero unit doesn’t follow this restriction but non-ZUs follow this restriction, the partition structure is still allowed.

[00128] Example B The splitting signaling method of a ZU is the same to that of a normal CU.

a. In one example, different contexts may be utilized to code ZU or non-ZUs.

b. Alternatively, only partial splitting methods of a normal CU are allowed for a ZU. i. The sub-set of splitting methods of a normal CU allowed for a ZU is determined by the ZU size, and/or picture/slice/tile boundary positions (bottom, right, bottom-right etc. al), and/or slice type.

ii. In one example, only QT and BT partition structures are allowed for a ZU. iii. Alternatively, furthermore, whether and how to use TT (and other kinds of partition structures except QT/BT) is not signaled in a ZU splitting information.

iv. Alternatively, furthermore, the splitting signaling method of a ZU is still kept the same to that of a normal CU, however, the context for indications of TT (or other kinds of partition structures) may further depend on whether the current block is a ZU or not.

[00129] Example C. In one embodiment, a ZU must be split in an I-slice or intra-coded picture.

[00130] In one example, the width or height of the ZU is not in the form of 2^N.

[00131] In one example, the CU is treated as a ZU if

i) W >=T0 and H>=Tl . TO and/or Tl is an integer such as 128 or 256.

ii) W >=T0 or H>=Tl. TO and/or Tl is an integer such as 128 or 256.

iii) WxH>=T. T is an integer such as 16384 or 65536.

[00132] The examples described above may be incorporated in the context of the methods described below, e.g., methods 1400 and 1500, which may be implemented at a video decoder and/or video encoder.

[00133] FIG. 14 shows a flowchart of an exemplary method for video coding, which may be implemented in a video encoder. The method 1400 includes, at step 1410, determining dimensions of a block of video data.

[00134] The method 1400 includes, at step 1420, signaling, upon determining that at least one of the dimensions is a non-power-of-two, the block of video data as a zero unit (ZU) block, which is untransformable.

[00135] In some embodiments, a non-power-of-two is any non-zero number that cannot be represented in the form 2^N. For example, the integers excluding the powers of two (e.g., 1, 3, 5,

6, 7, 9, 10, 11, 12, 13, 14, 15, 17, 18, ... ) are each a non-power-of-two.

[00136] In some embodiments, untransformable may be defined in the context of Example 2, such that no transform, inverse-transform, quantization and de-quantization operations are invoked for a zero-unit. For example, the untransformable property of a zero-unit is that it is inferred to be coded with the skip mode, and thus, the skip mode need not be explicitly signaled. In other embodiments, untransformable may be defined in the context of Example 3, such that although there may be non-zero residuals, there are no transform and inverse-transform operations defined for a zero-unit.

[00137] FIG. 15 shows a flowchart of another exemplary method for video coding, which may be implemented in a video decoder. This flowchart includes some features and/or steps that are similar to those shown in FIG. 14, and described above. At least some of these features and/or steps may not be separately described in this section.

[00138] The method 1500 includes, at step 1510, receiving a bitstream corresponding to a block of video data.

[00139] The method 1500 includes, at step 1520, receiving signaling indicating that the block of video data is a zero unit (ZU) block, which is untransformable, and has at least one dimension that is a non-power-of-two.

[00140] The method 1500 includes, at step 1530, decoding, based on the signaling, the bitstream to reconstruct the block of video data.

[00141] In some embodiments, the methods 1400 and 1500, and as described in the context of Example 1, may further include the dimensions of the block of video data being an even number of the form 2N, or of the form 2^KN with K = 1, 2, 3, 4, .... In other embodiments, the signaling may exclude a merge index or a skip flag, and/or exclude a prediction mode flag, and/or include a maximum or minimum value for at least one of the dimensions of the ZU block. In an example, the signaling is in a Video Parameter Set (VPS), a Sequence Parameter Set (SPS), a Picture Parameter Set (PPS), a slice header, a coding tree unit (CTU) or a coding unit (CU).

[00142] In some embodiments, motion information of the ZU block is inherited from motion information of a neighboring block of size 2^Nx2^M.

[00143] In some embodiments, and as described in the context of Example 7, the ZU block is split into two or more units. In an example, at least one of the two or more units is a zero unit. In another example, at least one of the two or more units is a coding unit (CU) with dimensions

2^NX₂ ^M

4. Example implementations of the disclosed technology

[00144] FIG. 16 is a block diagram illustrating an example of the architecture for a computer system or other control device 1600 that can be utilized to implement various portions of the presently disclosed technology, including (but not limited to) methods 1400 and 1500. In FIG. 16, the computer system 1600 includes one or more processors 1605 and memory 1610 connected via an interconnect 1625. The interconnect 1625 may represent any one or more separate physical buses, point to point connections, or both, connected by appropriate bridges, adapters, or controllers. The interconnect 1625, therefore, may include, for example, a system bus, a Peripheral Component Interconnect (PCI) bus, a HyperTransport or industry standard architecture (ISA) bus, a small computer system interface (SCSI) bus, a universal serial bus (USB), IIC (I2C) bus, or an Institute of Electrical and Electronics Engineers (IEEE) standard 674 bus, sometimes referred to as“Firewire.” [00145] The processor(s) 1605 may include central processing units (CPUs) to control the overall operation of, for example, the host computer. In certain embodiments, the processor(s) 1605 accomplish this by executing software or firmware stored in memory 1610. The processor(s) 1605 may be, or may include, one or more programmable general-purpose or special-purpose microprocessors, digital signal processors (DSPs), programmable controllers, application specific integrated circuits (ASICs), programmable logic devices (PLDs), or the like, or a combination of such devices.

[00146] The memory 1610 can be or include the main memory of the computer system. The memory 1610 represents any suitable form of random access memory (RAM), read-only memory (ROM), flash memory, or the like, or a combination of such devices. In use, the memory 1610 may contain, among other things, a set of machine instructions which, when executed by processor 1605, causes the processor 1605 to perform operations to implement embodiments of the presently disclosed technology.

[00147] Also connected to the processor(s) 1605 through the interconnect 1625 is a (optional) network adapter 1615. The network adapter 1615 provides the computer system 1600 with the ability to communicate with remote devices, such as the storage clients, and/or other storage servers, and may be, for example, an Ethernet adapter or Fiber Channel adapter.

[00148] FIG. 17 shows a block diagram of an example embodiment of a mobile device 1700 that can be utilized to implement various portions of the presently disclosed technology, including (but not limited to) methods 1400 and 1500. The mobile device 1700 can be a laptop, a smartphone, a tablet, a camcorder, or other types of devices that are capable of processing videos. The mobile device 1700 includes a processor or controller 1701 to process data, and memory 1702 in communication with the processor 1701 to store and/or buffer data. For example, the processor 1701 can include a central processing unit (CPU) or a microcontroller unit (MCU). In some implementations, the processor 1701 can include a field-programmable gate-array (FPGA). In some implementations, the mobile device 1700 includes or is in communication with a graphics processing unit (GPU), video processing unit (VPU) and/or wireless communications unit for various visual and/or communications data processing functions of the smartphone device. For example, the memory 1702 can include and store processor-executable code, which when executed by the processor 1701, configures the mobile device 1700 to perform various operations, e.g., such as receiving information, commands, and/or data, processing information and data, and transmitting or providing processed information/data to another device, such as an actuator or external display.

[00149] To support various functions of the mobile device 1700, the memory 1702 can store information and data, such as instructions, software, values, images, and other data processed or referenced by the processor 1701. For example, various types of Random Access Memory (RAM) devices, Read Only Memory (ROM) devices, Flash Memory devices, and other suitable storage media can be used to implement storage functions of the memory 1702. In some implementations, the mobile device 1700 includes an input/output (I/O) unit 1703 to interface the processor 1701 and/or memory 1702 to other modules, units or devices. For example, the I/O unit 1703 can interface the processor 1701 and memory 1702 with to utilize various types of wireless interfaces compatible with typical data communication standards, e.g., such as between the one or more computers in the cloud and the user device. In some implementations, the mobile device 1700 can interface with other devices using a wired connection via the I/O unit 1703. The mobile device 1700 can also interface with other external interfaces, such as data storage, and/or visual or audio display devices 1704, to retrieve and transfer data and information that can be processed by the processor, stored in the memory, or exhibited on an output unit of a display device 1704 or an external device. For example, the display device 1704 can display a video frame that includes a block (a CU, PU or TU) that applies the intra-block copy based on whether the block is encoded using a motion compensation algorithm, and in accordance with the disclosed technology.

[00150] In some embodiments, a video decoder apparatus may implement a method of using zero-units as described herein is used for video decoding. The various features of the method may be similar to the various methods described herein.

[00151] In some embodiments, the video decoding methods may be implemented using a decoding apparatus that is implemented on a hardware platform as described with respect to FIG. 16 and FIG. 17.

[00152] Some embodiments described herein may be captured using the following listing of solutions.

[00153] 1. A method for video encoding (e.g., method 1800 depicted in FIG. 18), comprising: determining (1802) that a block of video data is to be coded as a zero unit (ZU) block, the block of video data having dimensions SxT; partitioning (1804) the ZU block into one of two units, three units, or four units; and generating (1806) a bitstream by coding the units.

[00154] 2. A method of video decoding (e.g., method 1900 depicted in FIG. 19) comprising: receiving (1902) a bitstream corresponding to a block of video data coded as a zero unit (ZU) block partitioned into two units, three units or four units, the block of video data having dimensions SxT; and generating (1904) the block of video data by decoding the bitstream.

[00155] 3. The method of solution 1 or 2, wherein the ZU block is partitioned into two units using a binary tree partitioning scheme, each ZU block having dimensions S/2 T.

[00156] 4. The method of solution 1 or 2, wherein the ZU block is partitioned into two units using a binary tree partitioning scheme, each unit having dimensions SxT/2.

[00157] 5. The method of solution 1 or 2, wherein the ZU block is partitioned into two units using a binary tree partitioning scheme as a result of 2N<S<2N+l, the first unit of the two units having dimensions 2NxT and the second unit of the two units having dimensions (S-2N)xT.

[00158] 6. The method of solution 1 or 2, wherein the ZU block is partitioned into two units using a binary tree partitioning scheme as a result of 2N<S<2N+l, the first unit of the two units having dimensions (S-2N)xT and the second unit of the two units having dimensions 2NxT.

[00159] 7. The method of solution 1 or 2, wherein the ZU block is partitioned into two units using a binary tree partitioning scheme as a result of 2N<T<2N+l, the first unit of the two units having dimensions Sx2N and the second unit of the two units having dimensions Sx(T-2N).

[00160] 8. The method of solution 1 or 2, wherein the ZU block is partitioned into two units using a binary tree partitioning scheme as a result of 2N<T<2N+l, the first unit of the two units having dimensions Sx(T-2N) and the second unit of the two units having dimensions Sx2N.

[00161] 9. The method of solution 1 or 2, wherein the ZU block is partitioned into three units using a ternary tree partitioning scheme, two units of the three units each having dimensions S/4xT and one units of the three units having dimensions S/2xT.

[00162] 10. The method of solution 1 or 2, wherein the ZU block is partitioned into three units using a ternary tree partitioning scheme, two of the three units each having dimensions SxT/4 and one of the three units having dimensions SxT/2.

[00163] 11. The method of solution 1 or 2, wherein the ZU block is partitioned into three units using a ternary tree partitioning scheme as a result of 2N<S<2N+l, a first unit having dimensions 2N-1 xT, a second unit having dimensions (S-2N)xT, and a third unit having dimensions 2N-l xT. [00164] 12. The method of solution 1 or 2, wherein the ZU block is partitioned into three units using a ternary tree partitioning scheme as a result of 2N<T<2N+l, a first unit having dimensions Sx2N-l, a second unit having dimensions Sx(T-2N), and a third unit having dimensions Sx2N-l .

[00165] 13. The method of solution 1 or 2, wherein the ZU block is partitioned into four units using a quad-tree partitioning scheme, each unit having dimensions S/2xT/2.

[00166] 14. The method of solution 1 or 2, wherein the ZU block is partitioned into four units using a quad-tree partitioning scheme as a result of 2N<S<2N+l, a first unit having dimensions 2NxT/2, a second unit having dimensions 2NxT/2, and a third unit having dimensions S/2x(T- 2N), and a fourth unit having dimensions S/2x(T-2N).

[00167] 15. The method of solution 1 or 2, wherein the ZU block is partitioned into four units using a quad-tree partitioning scheme as a result of 2N<T<2N+l, a first unit having dimensions S/2x2N, a second unit having dimensions S/2x2N, and a third unit having dimensions S/2x(T- 2N), and a fourth unit having dimensions S/2x(T-2N).

[00168] 16. The method of solution 1 or 2, wherein the ZU block is partitioned into four units using a quad-tree partitioning scheme as a result of 2N<S<2N+l and 2M<T<2M+l, a first unit having dimensions 2Nx2M, a second unit having dimensions 2Nx2M, and a third unit having dimensions (S-2N)x(T-2M), and a fourth unit having dimensions (S-2N)x(T-2M).

[00169] 17. The method of solution 1 or 2, wherein the ZU block is partitioned into four units using a quad-tree partitioning scheme as a result of 2N<S<2N+l and 2M<T<2M+l, a first unit having dimensions 2Nx(T-2M), a second unit having dimensions 2Nx(T-2M), and a third unit having dimensions (S-2N)x 2M, and a fourth unit having dimensions (S-2N)x 2M.

[00170] 18. The method of solution 1 or 2, wherein the a height and/or a width of each unit of the ZU block is an even number.

[00171] 19. The method of solution 1 or 2, wherein the ZU block is split into three units using a ternary tree partitioning scheme.

[00172] 20. The method of solution 19, wherein the ZU block is partitioned as a result of

3*2N<S<3*2N+l, the first unit of the three units having dimensions 2NxT, the second unit of the three units having dimensions (S-3*2N)xT, and the third unit of the three units having dimensions 2N+1 xT.

[00173] 21. The method of solution 19, wherein the ZU block is split as a result of 3*2N<T£3*2N+l, the first unit of the three units having dimensions Sx2N, the second unit of the three units having dimensions Sx(T-3*2N), and the third unit of the three units having dimensions Sx2N+l .

[00174] 22. The method of solution 1 or 2, wherein the units have dimensions in the form

K*M, where M and K are integers.

[00175] 23. The method of solution 1 or 2, wherein the units have dimensions in the form

K*M, M being a minimum height or a minimum width of allowed coding units and the units being partitioned from a non-ZU block.

[00176] 24. The method of solution 22, wherein the signaling of a ZU block partitioning scheme resulting in units not in the form K*M is skipped.

[00177] 25. The method of solution 23, wherein the signaling of a partitioning scheme resulting in units not in the form K*M that were partitioned from a non-ZU block is skipped.

[00178] 26. A method for video encoding, comprising: determining that a block of video data is to be coded as a zero unit (ZU) block; partitioning the block of video data using a partitioning scheme, wherein the partitioning scheme partitions the block of video data into one of two units, three units, or four units; generating a bitstream by coding the block of video data, wherein the partitioning scheme is signaled using a syntax that is identical to that used for signaling partitioning of another block of video data that is a non-zero unit block.

[00179] 27. A method of video decoding, comprising: receiving a bitstream corresponding to a block of video data that is coded as a zero unit (ZU) block, wherein the block of video data is partitioned using a partitioning scheme that partitions the block of video data into one of two units, three units, or four units, and wherein the partitioning scheme is signaled in the bitstream using a syntax that is identical to that used for signaling partitioning of a non-zero unit block; decoding, based on the signaling, the bitstream to generate the block of video data.

[00180] 28. A method for video encoding, comprising: determining that a block of video data is to be coded as a zero unit (ZU) block, the block of video data having dimensions; partitioning the ZU block into one of two units, three units, or four units using a partitioning scheme selected from a set of ZU block partitioning schemes; coding the units; and signaling the coded units in a bitstream. Here, the set of ZU block partitioning schemes is a subset of a set of partitioning schemes available for splitting a coding unit (CU).

[00181] 29. A method of video decoding, comprising: receiving a bitstream corresponding to a block of video data, the block of video data having dimensions; receiving signaling indicating that the block of video data includes units partitioned from a zero unit (ZU) block, the partitioned ZU block being partitioned using a partitioning scheme selected from a set of ZU block partitioning schemes; and decoding, based on the signaling, the bitstream corresponding to the units to reconstruct the block of video data. Here, the set of ZU block partitioning schemes is a subset of a set of partitioning schemes available for splitting a coding unit (CU).

[00182] 30. The method of solution 28 or 29, wherein the set of ZU block partitioning schemes is based on one of a size of the ZU block or a position of the ZU block in relation to one of a picture, a slice, a tile or a slice type.

[00183] 31. The method of solution 28 or 29, wherein the set of ZU block partitioning schemes available is limited to quad-tree partitioning schemes and binary tree partitioning schemes.

[00184] 32. The method of solution 28 or 29, wherein the ZU block is partitioned into three units using a ternary tree partitioning scheme and the signaling of the ZU block does not include information relating to the partitioning scheme.

[00185] 33. The method of solution 28 or 29, wherein the set of ZU block partitioning schemes is the same as the set of partitioning schemes available for splitting the coding unit (CU) and a context used to signal the indication to split the ZU block is selected based on the block of video data being the ZU block.

[00186] 34. A method for video encoding, comprising: determining that a block of video data is to be coded as a zero unit (ZU) block, the block of video data having dimensions; partitioning the ZU block into one of two, three or four units upon determining that the ZU block is located in an I-slice or an intra-coded picture; coding the units; and signaling the coded units in a bitstream.

[00187] 35. A method of video decoding, comprising: receiving a bitstream corresponding to a block of video data, the block of video data having dimensions; receiving signaling indicating that the block of video data includes units partitioned from a zero unit (ZU) block, the partitioned ZU block being located in an I-slice or an intra-coded picture; and decoding, based on the signaling, the bitstream corresponding to the units to reconstruct the block of video data.

[00188] 36. The method of solution 34 or 35, wherein at least one dimension of the ZU block is a non-power-of-two number.

[00189] 37. The method of solution 34 or 35, wherein the block of video data is a coding unit (CU) block and wherein the CU block is treated as ZU block as a result of at least one dimension being an integer larger than a threshold.

[00190] 38. An apparatus in a video system comprising a processor and a non- transitory memory with instructions thereon, wherein the instructions upon execution by the processor, cause the processor to implement the method in any one of solutions 1 to 37.

[00191] 39. A computer program product stored on a non-transitory computer readable media, the computer program product including program code for carrying out the method in any one of solutions 1 to 37.

[00192] 40. A method, apparatus or system described in the present document.

[00193] From the foregoing, it will be appreciated that specific embodiments of the presently disclosed technology have been described herein for purposes of illustration, but that various modifications may be made without deviating from the scope of the invention. Accordingly, the presently disclosed technology is not limited except as by the appended claims.

[00194] Implementations of the subject matter and the functional operations described in this patent document can be implemented in various systems, digital electronic circuitry, or in computer software, firmware, or hardware, including the structures disclosed in this specification and their structural equivalents, or in combinations of one or more of them. Implementations of the subject matter described in this specification can be implemented as one or more computer program products, i.e., one or more modules of computer program instructions encoded on a tangible and non-transitory computer readable medium for execution by, or to control the operation of, data processing apparatus. The computer readable medium can be a machine- readable storage device, a machine-readable storage substrate, a memory device, a composition of matter effecting a machine-readable propagated signal, or a combination of one or more of them. The term“data processing unit” or“data processing apparatus” encompasses all apparatus, devices, and machines for processing data, including by way of example a

programmable processor, a computer, or multiple processors or computers. The apparatus can include, in addition to hardware, code that creates an execution environment for the computer program in question, e.g., code that constitutes processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of them.

[00195] A computer program (also known as a program, software, software application, script, or code) can be written in any form of programming language, including compiled or interpreted languages, and it can be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a computing environment.

A computer program does not necessarily correspond to a file in a file system. A program can be stored in a portion of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple coordinated files (e.g., files that store one or more modules, sub programs, or portions of code).

A computer program can be deployed to be executed on one computer or on multiple computers that are located at one site or distributed across multiple sites and interconnected by a communication network.

[00196] The processes and logic flows described in this specification can be performed by one or more programmable processors executing one or more computer programs to perform functions by operating on input data and generating output. The processes and logic flows can also be performed by, and apparatus can also be implemented as, special purpose logic circuitry, e.g., an FPGA (field programmable gate array) or an ASIC (application specific integrated circuit).

[00197] Processors suitable for the execution of a computer program include, by way of example, both general and special purpose microprocessors, and any one or more processors of any kind of digital computer. Generally, a processor will receive instructions and data from a read only memory or a random access memory or both. The essential elements of a computer are a processor for performing instructions and one or more memory devices for storing instructions and data. Generally, a computer will also include, or be operatively coupled to receive data from or transfer data to, or both, one or more mass storage devices for storing data, e.g., magnetic, magneto optical disks, or optical disks. However, a computer need not have such devices.

Computer readable media suitable for storing computer program instructions and data include all forms of nonvolatile memory, media and memory devices, including by way of example semiconductor memory devices, e.g., EPROM, EEPROM, and flash memory devices. The processor and the memory can be supplemented by, or incorporated in, special purpose logic circuitry.

[00198] It is intended that the specification, together with the drawings, be considered exemplary only, where exemplary means an example. As used herein, the singular forms“a”, “an” and“the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. Additionally, the use of“or” is intended to include“and/or”, unless the context clearly indicates otherwise.

[00199] While this patent document contains many specifics, these should not be construed as limitations on the scope of any invention or of what may be claimed, but rather as descriptions of features that may be specific to particular embodiments of particular inventions. Certain features that are described in this patent document in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment can also be implemented in multiple

embodiments separately or in any suitable subcombination. Moreover, although features may be described above as acting in certain combinations and even initially claimed as such, one or more features from a claimed combination can in some cases be excised from the combination, and the claimed combination may be directed to a subcombination or variation of a subcombination.

[00200] Similarly, while operations are depicted in the drawings in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. Moreover, the separation of various system components in the embodiments described in this patent document should not be understood as requiring such separation in all

embodiments.

[00201] Only a few implementations and examples are described and other implementations, enhancements and variations can be made based on what is described and illustrated in this patent document.

Claims

CLAIMS What is claimed is:

1. A method for video encoding, comprising:

determining that a block of video data is to be coded as a zero unit (ZU) block due to the block of video data having dimensions SxT, at least one of S and T being a non-power-of two number;

partitioning the ZU block into one of two units, three units, or four units; and generating a bitstream by coding the units.

2. A method of video decoding, comprising:

receiving a bitstream corresponding to a block of video data coded as a zero unit (ZU) block partitioned into two units, three units or four units, the block of video data having dimensions SxT; and

generating the block of video data by decoding the bitstream.

3. The method of claim 1 or 2, wherein the ZU block is partitioned into two units using a binary tree partitioning scheme, each unit having dimensions S/2xT.

4. The method of claim 1 or 2, wherein the ZU block is partitioned into two units using a binary tree partitioning scheme, each unit having dimensions SxT/2.

5. The method of claim 1 or 2, wherein the ZU block is partitioned into two units using a binary tree partitioning scheme as a result of 2^N<S<2^N+1, the first unit of the two units having dimensions 2^NxT and the second unit of the two units having dimensions (S-2^N)xT.

6. The method of claim 1 or 2, wherein the ZU block is partitioned into two units using a binary tree partitioning scheme as a result of 2^N<S<2^N+1, the first unit of the two units having dimensions (S-2^N)xT and the second unit of the two units having dimensions 2^NxT.

7. The method of claim 1 or 2, wherein the ZU block is partitioned into two units using a binary tree partitioning scheme as a result of 2^N<T<2^N+1, the first unit of the two units having dimensions Sx2^N and the second unit of the two units having dimensions Sx(T-2^N).

8. The method of claim 1 or 2, wherein the ZU block is partitioned into two units using a binary tree partitioning scheme as a result of 2^N<T<2^N+1, the first unit of the two units having dimensions Sx(T-2^N) and the second unit of the two units having dimensions Sx2^N.

9. The method of claim 1 or 2, wherein the ZU block is partitioned into three units using a ternary tree partitioning scheme, two units of the three units each having dimensions S/4xT and one units of the three units having dimensions S/2xT.

10. The method of claim 1 or 2, wherein the ZU block is partitioned into three units using a ternary tree partitioning scheme, two of the three units each having dimensions SxT/4 and one of the three units having dimensions SxT/2.

11. The method of claim 1 or 2, wherein the ZU block is partitioned into three units using a ternary tree partitioning scheme as a result of 2^N<S<2^N+1, a first unit having dimensions 2^N_1xT, a second unit having dimensions (S-2^N)xT, and a third unit having dimensions 2^N_1xT.

12. The method of claim 1 or 2, wherein the ZU block is partitioned into three units using a ternary tree partitioning scheme as a result of 2^N<T<2^N+1, a first unit having dimensions S 2^X_I, a second unit having dimensions Sx(T-2^N), and a third unit having dimensions S 2^{X 1}.

13. The method of claim 1 or 2, wherein the ZU block is partitioned into four units using a quad-tree partitioning scheme, each unit having dimensions S/2xT/2.

14. The method of claim 1 or 2, wherein the ZU block is partitioned into four units using a quad-tree partitioning scheme as a result of 2^N<S<2^N+1, a first unit having dimensions 2^NxT/2, a second unit having dimensions 2^NxT/2, and a third unit having dimensions S/2x(T-2^N), and a fourth unit having dimensions S/2x(T-2^N).

15. The method of claim 1 or 2, wherein the ZU block is partitioned into four units using a quad-tree partitioning scheme as a result of 2^N<T<2^N+1, a first unit having dimensions S/2x2^N, a second unit having dimensions S/2*2^N, and a third unit having dimensions S/2x(T-2^N), and a fourth unit having dimensions S/2x(T-2^N).

16. The method of claim 1 or 2, wherein the ZU block is partitioned into four units using a quad-tree partitioning scheme as a result of 2^N<S<2^N+1 and 2^M<T<2^M+1, a first unit having dimensions 2^Nx2^M, a second unit having dimensions 2^Nx2^M, and a third unit having dimensions (S-2^N)X(T-2^m), and a fourth unit having dimensions (S-2^N)x(T-2^M).

17. The method of claim 1 or 2, wherein the ZU block is partitioned into four units using a quad-tree partitioning scheme as a result of 2^N<S<2^N+1 and 2^M<T<2^M+1, a first unit having dimensions 2^Nx(T-2^M), a second unit having dimensions 2^Nx(T-2^M), and a third unit having dimensions (S-2^N)x 2^M, and a fourth unit having dimensions (S-2^N)x 2^M.

18. The method of claim 1 or 2, wherein a height and/or a width of each unit of the ZU block is an even number.

19. The method of claim 1 or 2, wherein the ZU block is split into three units using a ternary tree partitioning scheme.

20. The method of claim 19, wherein the ZU block is partitioned as a result of

3*2^N<S<3*2ⁿ⁺¹, the first unit of the three units having dimensions 2^NxT, the second unit of the three units having dimensions (S-3*2^N)xT, and the third unit of the three units having dimensions 2^N+1xT.

21. The method of claim 19, wherein the ZU block is split as a result of 3*2^N<T<3*2^N+1, the first unit of the three units having dimensions Sx2^N, the second unit of the three units having dimensions Sx(T-3*2^N), and the third unit of the three units having dimensions Sx2^N+1.

22. The method of claim 1 or 2, wherein the units have dimensions in the form K*M, where M and K are integers.

23. The method of claim 1 or 2, wherein the units have dimensions in the form K*M, M being a minimum height or a minimum width of allowed coding units and the units being partitioned from a non-ZU block.

24. The method of claim 22, wherein the signaling of a ZU block partitioning scheme resulting in units not in the form K*M is skipped.

25. The method of claim 23, wherein the signaling of a partitioning scheme resulting in units not in the form K*M that were partitioned from a non-ZU block is skipped.

26. A method for video encoding, comprising:

determining that a block of video data is to be coded as a zero unit (ZU) block due to the block having a height or a width that is a non-power-of-two number;

partitioning the block of video data using a partitioning scheme, wherein the partitioning scheme partitions the block of video data into one of two units, three units, or four units;

generating a bitstream by coding the block of video data, wherein the partitioning scheme is signaled using a syntax that is identical to that used for signaling partitioning of another block of video data that is a non-zero unit block.

27. A method of video decoding, comprising:

receiving a bitstream corresponding to a block of video data that is coded as a zero unit (ZU) block due to the block of video data having dimensions SxT, at least one of S and T being a non-power-of two number, wherein the block of video data is partitioned using a partitioning scheme that partitions the block of video data into one of two units, three units, or four units, and wherein the partitioning scheme is signaled in the bitstream using a syntax that is identical to that used for signaling partitioning of a non-zero unit block;

decoding, based on the signaling, the bitstream to generate the block of video data.

28. A method for video encoding, comprising:

partitioning the ZU block into one of two units, three units, or four units using a partitioning scheme selected from a set of ZU block partitioning schemes;

coding the units; and signaling the coded units in a bitstream;

wherein the set of ZU block partitioning schemes is a subset of a set of partitioning schemes available for splitting a coding unit (CU).

29. A method of video decoding, comprising:

receiving a bitstream corresponding to a block of video data, the block of video data having dimensions;

receiving signaling indicating that the block of video data is partitioned as a zero unit (ZU) block due to the block of video data having dimensions SxT, at least one of S and T being a non-power-of two number, the block being partitioned using a partitioning scheme selected from a set of ZU block partitioning schemes; and

decoding, based on the signaling, the bitstream corresponding to the units to reconstruct the block of video data;

30. The method of claim 28 or 29, wherein the set of ZU block partitioning schemes is based on one of a size of the ZU block or a position of the ZU block in relation to one of a picture, a slice, a tile or a slice type.

31. The method of claim 28 or 29, wherein the set of ZU block partitioning schemes available is limited to quad-tree partitioning schemes and binary tree partitioning schemes.

32. The method of claim 28 or 29, wherein the ZU block is partitioned into three units using a ternary tree partitioning scheme and the signaling of the ZU block does not include information relating to the partitioning scheme.

33. The method of claim 28 or 29, wherein the set of ZU block partitioning schemes is the same as the set of partitioning schemes available for splitting the coding unit (CU) and a context used to signal the indication to split the ZU block is selected based on the block of video data being the ZU block.

34. A method for video encoding, comprising: determining that a block of video data is to be coded as a zero unit (ZU) block due to the block of video data having dimensions, at least one of which is a non-power-of two number; partitioning the ZU block into one of two, three or four units upon determining that the ZU block is located in an I-slice or an intra-coded picture;

coding the units; and

signaling the coded units in a bitstream.

35. A method of video decoding, comprising:

receiving signaling indicating that the block of video data includes units partitioned from a zero unit (ZU) block that has at least a height or a width that is a non-power-of-two number and is coded without a transform and a residual coding, the partitioned ZU block being located in an I-slice or an intra-coded picture; and

decoding, based on the signaling, the bitstream corresponding to the units to reconstruct the block of video data.

36. The method of claim 34 or 35, wherein at least one dimension of the ZU block is a non- power-of-two number.

37. The method of claim 34 or 35, wherein the block of video data is a coding unit (CU) block and wherein the CU block is treated as ZU block as a result of at least one dimension being an integer larger than a threshold.

38. An apparatus in a video system comprising a processor and a non-transitory memory with instructions thereon, wherein the instructions upon execution by the processor, cause the processor to implement the method recited in one or more of claims 1 to 37.

39. A computer program product stored on a non-transitory computer readable media, the computer program product including program code for carrying out the method recited in one or more of claims 1 to 37.

40. A method, apparatus or system described in the present document.