WO2019236909A1

WO2019236909A1 - Reduction of diffusion across film interfaces

Info

Publication number: WO2019236909A1
Application number: PCT/US2019/035875
Authority: WO
Inventors: Gorun Butail; Joshua Collins; Griffin John Kennedy; Hanna Bamnolker
Original assignee: Lam Research Corporation
Priority date: 2018-06-07
Filing date: 2019-06-06
Publication date: 2019-12-12
Also published as: CN112218975A; KR20210007031A

Abstract

Provided are methods of treating a substrate surface to reduce diffusion of species that may be generated or provided in a subsequent operation. The substrate surface may be, for example, an oxide surface or a metal or metal compound film and may be a surface of a blanket film or of a liner film in a topographical feature according to various embodiments. Examples of treating the surface can include exposure to one or more chemical species and/or a thermal anneal. In some embodiments, the treatment increases the roughness of the grain boundary of the film surface. This can reduce the space available for diffusion and increase the tortuosity of diffusion paths through the film. In some embodiments, the treatment may involve forming compound molecules, for example, oxidation of a metal-containing film to form an oxide. The treated surface is less susceptible to diffusion of species such as halogen species.

Description

REDUCTION OF DIFFUSION ACROSS FILM

INTERFACES

INCORPOR ATION BY REFERENCE

[0001] A PCX Request Form is filed concurrently with this specification as part of the present application. Each application that the present application claims benefit of or priority to as identified in the concurrently filed PCX Request Form is incorporated by reference herein in its entirety and for ail puiposes.

BACKGROUND

[0002] Vapor deposition of a film can lead to migration of species in the deposition chemistry at the interface. For certain applications, this migration can lead to poisoning of the device. For example, tungsten (W) is used for logic and memory contacts and may be deposited from tungsten hexafluoride (WF₆) gas. When fluorine (F) from WIG migrates to a metal/oxide interface, it can lead to poisoning of the underlying device.

SUMMARY

[0003] One aspect of the disclosure relates to a method including: treating a surface on a substrate to increase the roughness of grain boundaries at the surface; and after increasing the roughness of the grain boundaries, depositing a film on the surface. In some embodiments, the surface is one of: tungsten, tungsten nitride, tungsten carbide, tungsten carbon nitride, titanium nitride, titanium, silicon oxide, and aluminum oxide. In some embodiments, the treatment includes exposing the surface to an oxidant. In some embodiments, the method further includes annealing the substrate in a reducing atmosphere after exposing the surface to an oxidant and prior to depositing the film. In some embodiments, the method further includes annealing the substrate after exposing the surface to an oxidant and prior to depositing the film. In some embodiments, the method further includes exposing the surface to a reducing chemistry after exposing the surface to an oxidant and prior to depositing the film. In some embodiments, the film is deposited using a fluorine-containing precursor. One example of a fluorine-containing precursor is tungsten hexafluoride. In some such embodiments, the amount of fluorine at the surface/film interface is no more than 1E19 atoms/ cm3. In some embodiments, the surface is tungsten (W) and treating the surface includes forming tungsten oxide (WOx).

[0004] Another aspect of the disclosure relates to a method including: exposing a liner layer to an oxidant; after exposing the liner layer to the oxidant, exposing the liner layer to a reducing agent; and depositing a bulk layer on the liner layer. In some embodiments, the liner layer is tungsten or a tungsten compound film. In some embodiments, the liner is a fluorine-free layer. In some embodiments, the liner layer is a titanium or titanium compound film. In some embodiments, depositing the bulk layer includes exposing the liner layer to a fluorine-containing compound. In some such embodiments, the amount of fluorine at the liner/bulk layer interface is no more than IE 19 atoms/cm3. In some embodiments, the liner layer directly contacts an oxide film.

[0005] Another aspect of the disclosure relates to apparatuses for performing the methods described herein. In some embodiments, an apparatus includes one or more stations each configured to house a substrate; a support substrate in each of the one or more stations; gas inlets configured to direct gas into each of the one or more stations; and a controller comprising program instructions for: fa) inletting an oxidant to the one or more stations to expose a substrate to the oxidant; (b) directly after (a) and before (c) inletting a reducing agent to the one or more stations to expose the substrate to the reducing agent; and after (c) inletting alternating pulses of hydrogen (H₂) and WF₆ to the one or more stations.

[0006] These and other aspects are described in more detail below with reference to the drawings.

BRIEF DESCRIPTION OF DRAWINGS

[0007] Figure 1 provides a process flow diagram for a method performed in accordance with disclosed embodiments.

[0008] Figure 2 shows a simplified schematic illustrating grains 220 having boundaries 222 before and after treatment.

[0009] Figure 3 shows an example stack of layers deposited on a substrate.

[0010] Figures 4A-4D are schematic examples of various structures for which the methods disclosed herein may be implemented during fabrication.

[0011] Figure 5 provides a process flow diagram for a method performed in accordance with disclosed embodiments.

[0012] Figure 6 provides a process flow diagram for a tungsten fill method performed in accordance with disclosed embodiments.

[0013] Figure 7 shows a simplified schematic illustrating of grains having boundaries before and after treatment operations according to certain embodiments

[0014] Figure 8 is a block diagram of a processing system suitable for conducting tungsten thin film deposition processes in accordance with embodiments.

[0015] Figure 9 depicts a schematic example of a deposition system.

DETAILED DESCRIPTION

[0016] In the following description, numerous specific details are set forth to provide a thorough understanding of the presented embodiments. The disclosed embodiments may be practiced without some or all of these specific details. In other instances, well-known process operations have not been described in detail to not unnecessarily obscure the disclosed embodiments. While the disclosed embodiments will be described in conjunction with the specific embodiments, it will be understood that it is not intended to limit the disclosed embodiments

[0017] Figure 1 provides a process flow diagram for a method performed in accordance with disclosed embodiments. The method 100 in Figure 1 begins with treating a substrate surface to reduce diffusion of species that may be generated or provided in a subsequent operation (102). The substrate surface may be, for example, an oxide surface, such as a silicon oxide (e.g , Si0₂) or aluminum oxide (e.g., A1₂0₃) surface. It may also be a metal or metal compound film, with examples including tungsten (W), tungsten nitride (WN), tungsten carbon nitride (WCN), titanium, and titanium nitride (TiN) As discussed further below, in some embodiments, a liner layer of a film such as a W, WN, WCN, or TiN film is deposited, with its surface treated in operation 102. In some embodiments, the surface may be a film surface of a blanket film or a film surface of a pattern film. In some embodiments, it may be a film surface of a liner film in a topographical feature.

[0018] Examples of treating the surface are discussed further below and can include exposure to one or more chemical species and/or a thermal anneal. In some embodiments, the treatment increases the roughness of the grain boundary of the film surface. Figure 2 shows a simplified schematic illustrating grains 220 having boundaries 222 before and after treatment. The grain boundaries are rougher after treatment. This can reduce the space available for diffusion and increase the tortuosity of diffusion paths through the film. In some embodiments, operation 102 may involve forming compound molecules. For example, operation 102 can involve oxidation of a metal -containing film to form an oxide.

[0019] Returning to Figure 1, after treating the film, an operation is performed that includes exposure to the species (104). For example, the substrate may be exposed to a halogen species in operation 104. The treated surface is less susceptible to migration of the species across it. In examples described below, operation 104 involves deposition of a second film on deposited on the treated surface. A deposition chemistry containing a deposition species such a halogen may be used, with the now treated surface less susceptible to diffusion of the halogen. In other embodiments, the treated surface may be exposed to other species during other types of operations performed on it or other areas of the substrate. Without limitation, these can include deposition, etching, treatment, patterning, and the like. In addition to halogen species, including fluorine (F) and chlorine (Cl), the methods may be used to prevent diffusion of species such as carbon (C), nitrogen (N), and phosphorous (P), or of metals such as sodium (Na), potassiu (K), calcium (Ca), and magnesiu (Mg) Species can be atomic species or molecular species that include any of these. For example, fluorine species may be in the form of atomic fluorine or molecular fluorine.

[0020] Figures 3 and 4 show examples of film stacks that may be formed using the methods described herein. Figure 3 show's an example stack of layers deposited on a substrate. Substrate 300 includes a silicon layer 310, an oxide layer 312 (e.g., titanium oxide (TiO_x)), tetraethyl orthosilicate (TEOS) oxide, etc.), a fluorine barrier layer 314, a tungsten nucleation layer 316, and a bulk tungsten layer 318 deposited thereon. The fluorine barrier layer 314 is deposited to prevent fluorine diffusion from the bulk tungsten layer 318 and the tungsten nucleation layer 316 to the oxide layer. Examples of fluorine barrier layers can include TIN layers and fluorine-free W or W-containing films. As devices shrink, barrier layers become thinner, and fluorine may still diffuse from the deposited tungsten layers. By treating the fluorine barrier layer 314 (as in operation 102), fluorine diffusion may be further reduced. A similar stack may be used for other metals; for example, a stack can includes a silicon layer, an oxide layer, a fluorine barrier layer, a molybdenum (MO) nucleation layer and a molybdenum (Mo) bulk layer.

[0021] In some implementations, the methods described herein may be used in fill of topographical features. For example, metal fill of features is often used in semiconductor device fabrication to form electrical contacts. Figures 4A-4D are schematic examples of various structures for which the methods may be implemented during fabrication. First, Figure 4A shows an example of a feature 401 with a liner layer 413 lining the sidewall or interior surfaces of a feature hole 405. The liner layer 413 can be for example, a diffusion barrier layer, an adhesion layer, a nucleation layer, a combination of thereof, or any other applicable material. Non-limiting examples of under-layers can include dielectric layers and conducting layers, e.g., silicon oxides, silicon nitrides, silicon carbides, metal oxides, metal nitrides, metal carbides, and metal layers. In particular implementations an under-layer can be one or more of Ti, TiN, W, and tungsten. In some embodiments, the liner layer 413 may be treated as described above with respect to operation 102 in Figure 1 before fill of the feature by W, Mo, or another metal.

[0022] Horizontal features, such as in 3-D memory structures, can also be filled. Figure 4B, for example, shows a plan view' of pillars 425 in a VNAND or vertically integrated memory (VIM) structure 448, with Figure 4C showing a simplified schematic of a cross- sectional depiction of the pillars 425. Arrows in Figure 4B represent deposition material. The structure 448 can be formed, for example, by depositing a stack of alternating interlayer dielectric layers 429 and sacrificial layers (not shown) on a substrate 410 and selectively etching the sacrificial layers. The interlayer dielectric layers may be, for example, silicon oxide and/or silicon nitride layers, with the sacrificial layers a material selectively etchable with an etchant. This may be follow'ed by etching and deposition processes to form pillars 425, which can include channel regions of the completed memory' device.

[0023] The main surface of substrate 410 can extend in the x and y directions, with pillars 425 oriented in the z-direction. Pillars 425 can include an annular semi-conducting material, or circular (or square) semi-conducting material. A gate dielectric may surround the semi conducting material. The area between each interlayer dielectric layer 429 can be filled with a conductive material W or Mo; thus structure 448 has a plurality of stacked horizontally- oriented features that extend in the x and/or y directions to be filled. In some embodiments, a fluorine free tungsten (FFW) liner layer may be deposited in the horizontally -oriented features, followed by a treatment operation as described with respect to operation 102 in Figure 1 , and subsequent bulk deposition of W. The bulk deposition may use a fluorine- containing tungsten precursor.

[0024] Figure 4D depicts another example of a feature that may be filled with a metal according to embodiments disclosed herein. In particular, Figure 4D depicts a schematic example of a DRAM architecture including a W or Mo buried wordline (bWL) 421 in a silicon substrate 410. The bWL is formed in a trench etched in the silicon substrate 410 Lining the trench is a conformal barrier layer 413 and an insulating layer 412 that is disposed between the conformal barrier layer 413 and the silicon substrate 410. In the example of Figure 4D, the insulating layer 412 may be a gate oxide layer, formed from a high-k dielectric material such as a silicon oxide or silicon nitride material.

[0025] TIN can be used as a barrier in wordline applications. However, TiN/W wordline fill is limited by the resistivity scaling; because TiN has relatively high resistivity, as dimensions decrease and TiN conformal layers occupy a greater volume fraction of the trench, the resistance increases. In some embodiments, the barrier layer 413 is a tungsten or tungsten-containing layer deposited using a fluorine-free deposition. A treatment operation as described with respect to operation 102 in Figure 1 may be performed with following deposition of the conformal barrier layer prior to bulk deposition of W. Fluorine-free deposition may involve deposition from a chlorine-containing precursor such as WC1₅ or WCl₆ or from an organo-tungsten precursor. In some embodiments barrier layer is a molybdenum or molybdenum-containing layer deposited using a fluorine-free deposition. Fluorine-free Mo-containing precursors include molybdenum pentachJoride (M0CJ₅), molybdenum dichloride dioxide (MO0₂C1₂), molybdenum tetrachloride oxide (M0OCI₄), and molybdenum hexacarbonyl (Mo(CO)₆).

[0026] Figure 5 provides a process flow diagram for a method performed in accordance with disclosed embodiments. The method 500 in Figure 5 begins with exposing a substrate to an oxidizative chemistry (502). The substrate has a surface on which a bulk film is to be deposited as described above with reference to operation 102 of Figure 1 and Figures 3 and 4.

[0027] In some embodiments, operation 502 is performed by exposing the substrate to air during an air break. Alternatively, it may be exposed under vacuum to an oxidative chemistry, e.g., molecular oxygen (0₂), water (H₂0) vapor, ozone (O3), etc. Other oxygen- containing compounds may be employed such as nitrogen dioxide (N0₂), nitrous oxide (N₂0), hydrogen peroxide (H₂0₂), carbon dioxide (C0₂), carbon monoxide (CO), etc.

[0028] In some embodiments, the exposure may have the effect of forming an oxide at least at the surface of the film on which the bulk layer is to be deposited. For example, for tungsten and tungsten-containing (e.g., WN, WC, and WCN) surfaces, a tungsten oxide may be formed, and for titanium and titanium-containing (e.g., TiN) surfaces, a titanium oxide may be formed. In some embodiments, this may increase the roughness of the grain boundaries of the surface as discussed above with reference to Figure 2. The substrate is then exposed to a reducing gas (504). Examples of reducing gases include hydrogen (¾) or a hydrogen-containing gas such as ammonia (NH₃), silane (SiH₄), and diborane (B₂H₆). In some embodiments, the exposure is during a thermal anneal. The conditions are such that the gas can effectively reduce the desired surface. In some embodiments, the reduction may be done without thermal activation, for example, plasma activated reducing gas, an atomic reducing gas (e.g., atomic H), a UV-mediated exposure, or a catalytic reduction. If performed, a temperature for a thermal anneal will depends on the reducing species and the surface to be reduced. For example, ¾ can effectively reduce a tungsten oxide surface at temperatures of about 450°C and above. Lower temperatures (e.g., 30Q°C) may be used for stronger reducing agents such as Sil L and B 4 {,·,. Very high temperatures (e.g., > H00°C) may be used to reduce oxide surfaces such as Si0₂ with lh.

[0029] For metal contacts, resistivity can be improved by removing oxygen and/or converting oxides formed in the previous operation. In some embodiments, residual hydrogen may react with a deposition gas species in the subsequent deposition of the bulk material to further aid in reducing the species incorporation into the underlying material. For example, it may react with fluorine species to from hydrogen fluoride (HF) or chlorine species to form hydrogen chloride (HC1). Operations 502 and 504 together (or operation 502 alone if operation 504 is not performed) may be a treatment operation 102 as described above with respect to Figure 1.

[0030] For oxide surfaces such as A1₂0₃ and Si0₂ surfaces, the oxidation in operation 502 may be omitted in certain embodiments, with reduction in a reducing environment reducing the grain boundaries and increasing tortuosity. For surfaces such as metal-containing surfaces that can oxidized, in some embodiments, the reducing operation 504 may be omitted if oxidation of the surface is sufficient to roughen the grain boundaries and an oxidized surface is not otherwise undesirable.

[0031] A bulk layer may then be deposited on the surface (506). This is an example of operation 104 in Figure 1. According to various embodiments, a thin nucleation or seed layer may be deposited prior to deposition of a bulk layer. Deposition of the bulk layer can include a vapor deposition process such as an atomic layer deposition (ALD) or chemical vapor deposition (CVD) process. As indicated above, the deposition chemistry can include a species that can be detrimental to an underlying device or film. In some embodiments, the deposition chemistry' includes a halogen species, e.g., a fluorine or chlorine species. The treated surface acts a barrier to the species, preventing it from diffusing or otherwise migrating across it.

[0032] Figure 6 provides a process flow diagram for a tungsten fill method performed in accordance with disclosed embodiments. As described above, tungsten is used for a variety of logic and memory applications including interconnects and wordlines. There are various challenges in tungsten fill as devices scale to smaller technology nodes and more complex patterning structures are used. Conventional deposition of tungsten has involved the use of the fluorine-containing precursor tungsten hexafluoride (WF₆). However, the use of WF₆ results in some incorporation of fluorine into the deposited tungsten film. The presence of fluorine can cause electromigration and/or fluorine diffusion into adjacent components and damages contacts, thereby reducing the performance of the device. One challenge is reducing the fluorine concentration or content in the deposited tungsten film. As compared to larger features, a smaller feature having the same fluorine concentration in the tungsten film as a larger feature affects the performance of the device more substantially. For example, the smaller the feature, the thinner the films are deposited. As a result, fluorine in the deposited tungsten film is more likely to diffuse through the thinner films, thereby potentially causing device failure.

[0033] In Figure 6, the method 600 begins with an operation of exposing a fluorine-free W liner layer to an oxidant (602). In certain embodiments, the method may further include depositing the fluorine-free W liner layer from a tungsten chloride (WC!_X) precursor such as WCU, WCI5, or WCL·,. The liner layer will serve as a barrier layer to prevent fluorine from diffusing from tungsten to other layers of the substrate such as an oxide layer.

[0034] In some embodiments, the W liner layer is formed directly on an oxide surface, such as a Si0₂ or AI₂O₃ surface. This eliminates the need for a barrier layer such as a TIN layer or Ti/TiN bilayer. Formation of the tungsten layer directly on an oxide is possible because the oxide is not damaged exposure to WC1_X or chlorine gas byproduct. By eliminating TiN and other barrier layers, line resistance is reduced.

[0035] Next, the fluorine-free W liner layer is exposed to a reducing gas during a thermal anneal (604). Example anneal temperatures may range from 400°C to 600°C This operation may decrease resistivity at the interface after the oxidation.

[0036] After the treatment of the W liner layer in operations 602 and 604, a tungsten bulk film is deposited from WF₆ (606). Bulk deposition often involves a chemical vapor deposition (CVD) reaction, but can also be performed using atomic layer deposition (ALD). According to various embodiments, a tungsten nucleation layer may first be performed, or the bulk layer may be deposited directly on the tungsten liner layer without an intervening nucleation layer. A nucleation layer is a thin conformal layer that serves to facilitate the subsequent formation of a bulk material thereon. The tungsten nucleation layer may be deposited to conformally coat the feature. Nucleation layers are often deposited using ALD or pulsed nucleation layer (PNL) methods.

[0037] In a PNL technique, pulses of reactant are sequentially injected and purged from the reaction chamber, typically by a pulse of a purge gas between reactants. A first reactant can be adsorbed onto the substrate, available to react with the next reactant. The process is repeated in a cyclical fashion until the desired thickness is achieved. PNL is similar to ALD techniques PNL is generally distinguished from ALD by its higher operating pressure range (greater than 1 Torr) and its higher growth rate per cycle (greater than 1 monolayer film growth per cycle). Chamber pressure during PNL deposition may range fro about 1 Torr to about 400 Torr. In the context of the description provided herein, PNL broadly embodies any cyclical process of sequentially adding reactants for reaction on a semiconductor substrate. Thus, the concept embodies techniques conventionally referred to as ALD In the context of the disclosed embodiments, CVD embodies processes in which reactants are together introduced to a reactor for a vapor-phase reaction. PNL and ALD processes are distinct from CVD processes and vice versa.

[0038] Bulk tungsten may be deposited on the nucleation layer or directly on the W liner layer by a CVD process by reducing WF₆ using a reducing agent such as hydrogen (H₂). Bulk tungsten is different from a tungsten nucleation layer. Bulk tungsten as used herein refers to tungsten used to fill most or all of a feature, such as at least about 50% of the feature. Unlike a nucleation layer, which is a thin conformal film that serves to facilitate the subsequent formation of a bulk material thereon, bulk tungsten is used to carry current. The bulk tungsten may be deposited to a thickness of at least 50.A. Further, in some embodiments, the bulk tungsten may be deposited by alternating pulses of WF₆ and H_2. This ALD -type process may be useful to fill large aspect ratio or complex features such as wordlines

[0039] Figure 7 shows a simplified schematic that illustrates grains having boundaries 722 before and after operations 602 and 604 according to certain embodiments. At 710, grain boundaries 722 prior to or without treatment are shown. As depicted, the film is susceptible to fluorine diffusion. Then, at 720, a treatment with 0₂ and/or H₂0 forms WO_x, which fills the grain boundaries, preventing or reducing the ability of F to diffuse through the film. At 740, grain boundary roughness remains elevated after H₂-anneal, but resistivity is reduced and fluorine diffusion is reduced due to increased grain boundary' roughness.

[0040] As noted above, in some embodiments, the methods described above may further include deposition of a liner layer. In some such embodiments, deposition of a W liner layer may include depositing a conformal reducing agent layer on the substrate. The reducing agent layer is conformal to the topography of the substrate including the feature. The reducing agent layer is then exposed to a WCl_x precursor, which is reduced by the reducing agent layer. The conformal reducing agent layer is converted to a conformal tungsten layer. According to various embodiments, the WC!_X precursor may or may not be provided in the presence of hydrogen (H₂) gas.

Experimental

[0041] Fluorine incorporation at an interface was measured after three processes. In each process, 120 A of bulk tungsten was deposited from WFe/Ft on a 60 A layer of fluorine-free tungsten liner deposited from WC1_X. The tungsten liner was deposited on Si0₂. In process A, there was no air break (A/B) and no H>-anneal between the WC1_X and WF₆ depositions; in process, B, there was an H₂-axmeal, but no A/B; in process C, there was an A/B followed by an H₂-anneal as described with respect to Figure 6. If performed, the anneal was at 550°C. Bulk deposition was at 430°C. Fluorine and chlorine were measured at the Si0₂/tungsten liner interface.

[0042] Notably, the air break reduced the F diffusion through the fluorine-free liner by 30 times. An anneal without an air break did not reduce the fluorine, though chlorine w^?as reduced by 5 times. The reduction in chlorine was not observed with the air break performed before the anneal, possibly due to rougher grain boundaries from the air break. Apparatus

[0043] Any suitable chamber may be used to implement the disclosed embodiments. Example deposition apparatuses include various systems, e.g., ALTUS^® and ALTUS^® Max, available from Lam Research Corp., of Fremont California, or any of a variety of other commercially available processing systems. In some embodiments, chemical vapor deposition (CVD) may be performed at a first station that is one of two, five, or even more deposition stations positioned within a single deposition chamber. Thus, for example, silane ( S : 1 1_{4 )} and diborane (B₂H₆) m y be introduced to the surface of the semiconductor substrate, at the first station, using an individual gas supply system that creates a localized atmosphere at the substrate surface to form a reducing agent layer. Another station may be used for fluorine-free tungsten conversion of the reducing agent layer. A treatment including exposure to an oxidant and/or an anneal may be performed at another station or in another chamber. Two or more stations may be used to fill the features with bulk tungsten in parallel processing.

[0044] Figure 8 is a block diagram of a processing system suitable for conducting tungsten thin film deposition processes in accordance with embodiments. The system 800 includes a transfer module 803. The transfer module 803 provides a clean, pressurized environment to minimize risk of contamination of substrates being processed as they are moved between various reactor modules. Mounted on the transfer module 803 is a multi-station reactor 809. Multi-station reactor 809 may also be used to perform reducing agent layer deposition, fluorine-free tungsten conversion, and subsequent CVD in some embodiments. Reactor 809 may include multiple stations 811 , 813, 815, and 817 that may sequentially perform operations in accordance with disclosed embodiments. For example, reactor 809 could be configured such that station 811 performs a first operation using a reducing agent, station 813 performs a second sequential operation using a WC1_X precursor, station 815 performs a treatment operation as described above and 817 performs CVD. Each stations may include a heated pedestal or substrate support for independent temperature control, one or more gas inlets or showerhead or dispersion plate. An example of a deposition station 900 is depicted in Figure 9, including substrate support 902 and showerhead 903. A heater may be provided in pedestal portion 901.

[0045] Also mounted on the transfer module 803 may be one or more single or multi station modules 907 capable of performing one or more of the treatment operations described herein. The system 800 also includes one or more wafer source modules 801, where wafers are stored before and after processing. An atmospheric robot (not shown) in the atmospheric transfer chamber 819 may first remove wafers from the source modules 801 to loadlocks 821. A wafer transfer device (generally a robot arm unit) in the transfer module 803 moves the wafers from loadlocks 821 to and among the modules mounted on the transfer module 803.

[0046] In various embodiments, a system controller 829 is employed to control process conditions during deposition. The controller 829 will typically include one or more memory devices and one or more processors A processor may include a CPU or computer, analog and/or digital input/output connections, stepper motor controller boards, etc.

[0047] The controller 829 may control all of the activities of the deposition apparatus. The syste controller 829 executes system control software, including sets of instructions for controlling the timing, mixture of gases, chamber pressure, chamber temperature, wafer temperature, wafer chuck or pedestal position, and other parameters of a particular process. Other computer programs stored on memory devices associated with the controller 829 may be employed in some embodiments.

[0048] Typically there will be a user interface associated with the controller 829. The user interface may include a display screen, graphical software displays of the apparatus and/or process conditions, and user input devices such as pointing devices, keyboards, touch screens, microphones, etc

[0049] System control logic may be configured in any suitable way. In general, the logic can be designed or configured in hardware and/or software. The instructions for controlling the drive circuitry may be hard coded or provided as software. The instructions may be provided by‘"programming.” Such programming is understood to include logic of any form, including hard coded logic in digital signal processors, application-specific integrated circuits, and other devices which have specific algorithms implemented as hardware. Programming is also understood to include software or firmware instructions that may he executed on a general purpose processor. System control software may be coded in any suitable computer readable programming language.

[0050] The computer program code for controlling the reducing agent pulses, hydrogen flow, and tungsten-containing precursor pulses, and other processes in a process sequence can be written in any conventional computer readable programming language: for example, assembly language, C, C++, Pascal, Fortran, or others. Compiled object code or script is executed by the processor to perform the tasks identified in the program. Also as indicated, the program code may be hard coded.

[0051] The controller parameters relate to process conditions, such as, for example, process gas composition and flow rates, temperature, pressure, cooling gas pressure, substrate temperature, and chamber wall temperature. These parameters are provided to the user in the form of a recipe, and may be entered utilizing the user interface.

[0052] Signals for monitoring the process may be provided by analog and/or digital input connections of the system controller 829. The signals for controlling the process are output on the analog and digital output connections of the deposition apparatus 800.

[0053] The system software may be designed or configured in many different ways. For example, various chamber component subroutines or control objects may be written to control operation of the chamber components necessary to cany out the deposition processes in accordance with the disclosed embodiments. Examples of programs or sections of programs for this purpose include substrate positioning code, process gas control code, pressure control code, and heater control code.

[0054] In some implementations, a controller 829 is part of a system, which may be part of the above-described examples. Such systems can include semiconductor processing equipment, including a processing tool or tools, chamber or chambers, a platform or platforms for processing, and/or specific processing components (a wafer pedestal, a gas flow system, etc.). These systems may be integrated with electronics for controlling their operation before, during, and after processing of a semiconductor wafer or substrate. The electronics may be referred to as the“controller,” which may control various components or subparts of the system or systems. The controller 829, depending on the processing requirements and/or the type of system, may be programmed to control any of the processes disclosed herein, including the delivery of processing gases, temperature settings (e.g., heating and/or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings in some systems, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, positional and operation settings, wafer transfers into and out of a tool and other transfer tools and/or load locks connected to or interfaced with a specific system.

[0055] Broadly speaking, the controller may be defined as electronics having various integrated circuits, logic, memory_', and/or software that receive instructions, issue instructions, control operation, enable cleaning operations, enable endpoint measurements, and the like. The integrated circuits may include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as application specific integrated circuits (ASICs), and/or one or more microprocessors, or microcontrollers that execute program instructions (e.g., software). Program instructions may be instructions communicated to the controller in the form of various individual settings (or program files), defining operational parameters for carrying out a particular process on or for a semiconductor wafer or to a system. The operational parameters may, in some embodiments, be part of a recipe defined by process engineers to accomplish one or more processing steps during the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and/or dies of a wafer.

[0056] The controller 829, in some implementations, may be a part of or coupled to a computer that is integrated with, coupled to the system, otherwise networked to the system, or a combination thereof. For example, the controller 829 may be in the“cloud” or all or a part of a fab host computer system, which can allow for remote access of the wafer processing. The computer may enable remote access to the system to monitor current progress of fabrication operations, examine a history of past fabrication operations, examine trends or performance metrics from a plurality of fabrication operations, to change parameters of current processing, to set processing steps to follow a current processing, or to start a new process. In some examples, a remote computer (e.g. a server) can provide process recipes to a system over a network, which may include a local network or the Internet. The remote computer may include a user interface that enables entry or programming of parameters and/or settings, which are then communicated to the system from the remote computer. In some examples, the controller receives instructions in the form of data, which specify parameters for each of the processing steps to be performed during one or more operations. It should be understood that the parameters may be specific to the type of process to be performed and the type of tool that the controller is configured to interface with or control. Thus as described above, the controller may be distributed, such as by including one or more discrete controllers that are networked together and working towards a common purpose, such as the processes and controls described herein. An example of a distributed controller for such purposes would be one or more integrated circuits on a chamber in communication with one or more integrated circuits located remotely (such as at the platform level or as part of a remote computer) that combine to control a process on the chamber.

[0057] Without limitation, example systems may include a plasma etch chamber or module, a deposition chamber or module, a spin-rinse chamber or module, a metal plating chamber or module, a clean chamber or module, a bevel edge etch chamber or module, a physical vapor deposition (PVD) chamber or module, a CVD chamber or module, an ALD chamber or module, an atomic layer etch (ALE) chamber or module, an ion implantation chamber or module, a track chamber or module, and any other semiconductor processing systems that may be associated or used in the fabrication and/or manufacturing of semiconductor wafers.

[0058] As noted above, depending on the process step or steps to be performed by the tool, the controller might communicate with one or more of other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, neighboring tools, tools located throughout a factory, a main computer, another controller, or tools used in material transport that bring containers of wafers to and from tool locations and/or load ports in a semiconductor manufacturing factory.

[0059] The controller 829 may include various programs. A substrate positioning program may include program code for controlling chamber components that are used to load the substrate onto a pedestal or chuck and to control the spacing between the substrate and other parts of the chamber such as a gas inlet and/or target. A process gas control program may include code for controlling gas composition, flow rates, pulse times, and optionally for flowing gas into the chamber prior to deposition in order to stabilize the pressure in the chamber. A pressure control program may include code for controlling the pressure in the chamber by regulating, e.g., a throttle valve in the exhaust system of the chamber. A heater control program may include code for controlling the current to a heating unit that is used to heat the substrate. Alternatively, the heater control program may control delivery of a heat transfer gas such as helium to the wafer chuck.

[0060] Examples of chamber sensors that may be monitored during deposition include mass flow controllers, pressure sensors such as manometers, and thermocouples located in the pedestal or chuck. Appropriately programmed feedback and control algorithms may be used with data from these sensors to maintain desired process conditions.

[0061] The foregoing describes implementation of disclosed embodiments in a single or multi-chamber semiconductor processing tool. The apparatus and process described herein may be used in conjunction with lithographic patterning tools or processes, for example, for the fabrication or manufacture of semiconductor devices, displays, LEDs, photovoltaic panels, and the like. Typically, though not necessarily, such tools/processes will be used or conducted together in a common fabrication facility. Lithographic patterning of a film typically includes some or all of the following steps, each step provided with a number of possible tools: (1) application of photoresist on a workpiece, i.e., substrate, using a spin-on or spray-on tool; (2) curing of photoresist using a hot plate or furnace or UV curing tool; (3) exposing the photoresist to visible or UV or x-ray light with a tool such as a wafer stepper; (4) developing the resist so as to selectively remove resist and thereby pattern it using a tool such as a wet bench; (5) transferring the resist pattern into an underlying film or workpiece by using a diy or plasma-assisted etching tool; and (6) removing the resist using a tool such as an RF or microwave plasma resist stripper.

CONCLUSION

[0062] Although the foregoing embodiments have been described in some detail for purposes of clarity of understanding, it will be apparent that certain changes and modifications may be practiced within the scope of the appended claims. It should be noted that there are many alternative ways of implementing the processes, systems, and apparatus of the present embodiments. Accordingly, the present embodiments are to be considered as illustrative and not restrictive, and the embodiments are not to be limited to the details given herein.

Claims

CLAIMS What is claimed is:

1. A method comprising:

treating a surface on a substrate to increase roughness of grain boundaries at the surface; and

after increasing the roughness of the grain boundaries, depositing a film on the surface

2. The method of claim 1, wherein the surface is one of: tungsten, tungsten nitride, tungsten carbide, tungsten carbon nitride, titanium nitride, titanium, silicon oxide, and aluminum oxide

3. The method of claim 1, wherein the treatment compri ses exposing the surface to an oxidant.

4. The method of claim 3, further comprising annealing the substrate in a reducing atmosphere after exposing the surface to an oxidant and prior to depositing the film.

5. The method of claim 3, further comprising annealing the substrate after exposing the surface to an oxidant and prior to depositing the film.

6. The method of claim 3, further comprising exposing the surface to a reducing chemistry after exposing the surface to an oxidant and prior to depositing the film

7. The method of claim 1, wherein the film is deposited using a fluorine-containing precursor.

8. The method of claim 7, wherein the fluorine-containing precursor is tungsten hexafluoride.

9. The method of claim 7, wherein the amount of fluorine at the surface/film interface is no more than 1 E19 atoms/cm .

10. The method of claim 1, wherein the surface is tungsten (W) and treating the surface comprises forming tungsten oxide (WOx).

11. A method comprising:

exposing a liner layer to an oxidant;

after exposing the liner layer to the oxidant, exposing the liner layer to a reducing agent; and

depositing a bulk layer on the liner layer.

12. The method of claim 11, wherein the liner layer is tungsten or a tungsten compound film.

13. The method of claim 12, wherein the liner layer is a fluorine-free layer.

14. The method of claim 1 1, wherein the liner layer is a titanium or titanium compound film.

15. The method of claim 11, wherein depositing the bulk layer comprises exposing the liner layer to a fluorine-containing compound.

16. The method of claim 15, wherein the amount of fluorine at the iiner/bulk layer interface is no more than IE 19 atoms/cm³.

17. The method of claim 15, wherein the liner layer directly contacts an oxide film.

18. An apparatus comprising:

one or more stations each configured to house a substrate;

a support substrate in each of the one or more stations;

gas inlets configured to direct gas into each of the one or more stations; and

a controller comprising program instructions for:

(a) inletting an oxidant to the one or more stations to expose a substrate to the oxidant; (h) directly after (a) and before (c) inletting a reducing agent to the one or more stations to expose the substrate to the reducing agent, and

after (c) inletting alternating pulses of hydrogen (H₂) and WF₆ to the one or more stations.