WO2019228237A1 - 数据处理方法以及计算机设备 - Google Patents

数据处理方法以及计算机设备 Download PDF

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Publication number
WO2019228237A1
WO2019228237A1 PCT/CN2019/087923 CN2019087923W WO2019228237A1 WO 2019228237 A1 WO2019228237 A1 WO 2019228237A1 CN 2019087923 W CN2019087923 W CN 2019087923W WO 2019228237 A1 WO2019228237 A1 WO 2019228237A1
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Prior art keywords
task
buffer
memory
computer device
target
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PCT/CN2019/087923
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English (en)
French (fr)
Inventor
高雄
李维
郑明�
林灏勋
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华为技术有限公司
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Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to EP24151801.8A priority Critical patent/EP4372572A3/en
Priority to EP19810599.1A priority patent/EP3783484B1/en
Publication of WO2019228237A1 publication Critical patent/WO2019228237A1/zh
Priority to US17/107,173 priority patent/US11422861B2/en
Priority to US17/878,401 priority patent/US20220365822A1/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • G06F9/5022—Mechanisms to release resources
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • G06F9/5038—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering the execution order of a plurality of tasks, e.g. taking priority or time dependency constraints into consideration
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00—Indexing scheme relating to G06F9/00
    • G06F2209/48—Indexing scheme relating to G06F9/48
    • G06F2209/484—Precedence
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00—Indexing scheme relating to G06F9/00
    • G06F2209/50—Indexing scheme relating to G06F9/50
    • G06F2209/5011—Pool

Definitions

  • the present application relates to the field of communication technologies, and in particular, to a data processing method and a computer device.
  • Storage system refers to a system in a computer that is composed of various storage devices, control components, and management information scheduling hardware and software that store programs and data. During the running of application programs, memory allocation and release are constantly involved.
  • the task data exchange method is mainly based on the device memory for data exchange and management of the device memory exchange data through the cache management module in the computer device.
  • the specific process is: the computer device applies for the cache register buffer request through the application routine module.
  • the Buffer management module will synchronously request the corresponding device memory for the Buffer, and then the computer device initiates a dependent task that depends on the Buffer through the application routine module, and then the computer device calls the computer device according to the dependent task through the task scheduler.
  • a corresponding module so that the corresponding module executes the dependent task, the application routine module synchronously waits for the completion of the dependent task, the application routine module sends a request to the Buffer management module to release the buffer, and then the Buffer manager module according to the Request for release Buffer memory corresponding to the device.
  • Buffer applies in advance before the dependent task is initiated, then the computer device initiates the application through the application routine module.
  • the buffer applied by the computer device through the buffer management module is in an idle state; and the release of the buffer can only be performed after the application routine module synchronously waits for the execution of the dependent task to complete.
  • the buffer applied by the computer device through the buffer management module is in an idle state. Therefore, the turnover efficiency of the device memory corresponding to the applied buffer is low.
  • the embodiments of the present application provide a data processing method and a computer device for improving the turnover efficiency of the device memory corresponding to the buffer.
  • a first aspect of the embodiments of the present application provides a data processing method, including:
  • the target task may include a Buffer application task or a Buffer release task.
  • the target task is a successor task of the first task and a predecessor task of the second task, and the first task and the second task are pending tasks having an order dependency relationship, and when the target task is a Buffer application
  • the second task may use the Buffer to request the Buffer corresponding to the task.
  • the first task may use the Buffer to release the Buffer corresponding to the task.
  • the computer device may obtain a Buffer entry corresponding to the target task according to the target task, where the Buffer entry contains the target task location The memory size of the corresponding buffer, the memory location of the buffer, and the An entry of the memory address of the buffer, and then, the computer device can execute the target task to implement the application or release the buffer corresponding to the target task.
  • the computer device may determine that the target device executes the target task after the predecessor task of the target task is completed, and the target device executes the target task before the subsequent task is executed.
  • the device's application for the buffer can be truly postponed to the completion of the predecessor task of the target task, and before the successor task of the target task is executed, and the release of the buffer by the computer device can be advanced to the immediate completion of the predecessor task of the target task. Execution, thereby improving the turnover efficiency of the device memory corresponding to the Buffer.
  • the target task may include a memory identity (ID) of a buffer corresponding to the target task; obtaining, by the computer device according to the target task, a buffer entry corresponding to the target task may include: The computer device obtains a Buffer entry corresponding to the target task according to the memory ID.
  • ID memory identity
  • a specific method for obtaining the Buffer table entry corresponding to the target task by the computer device is provided. In actual applications, the realizability and practicability of the solution are improved.
  • the target task may be a Buffer application task; the computer device executing the target task to request or release the buffer of the target task may include: first, the computer device may determine from the Buffer entry The memory size of the buffer and the memory location of the buffer; then, the computer device can determine the corresponding device memory for the buffer according to the memory size of the buffer and the memory location of the buffer; the computer device can update the buffer entry according to the device memory The memory address of the Buffer.
  • a specific execution manner for a specific computer device to perform a Buffer application task is provided. In practical applications, the solution's executableness is improved.
  • a specific execution manner for the computer device to perform a buffer release task is provided. In practical applications, the operability and integrity of the solution are improved.
  • another method for obtaining a Buffer entry corresponding to the target task by a computer device is provided. In practical applications, the implementability of the solution is improved, and the diversity of the solution is increased.
  • the target task may be a Buffer application task; the computer device executing the target task to apply for or release the Buffer corresponding to the target task may include: first, the computer device may determine the Buffer entry Whether the memory location of the buffer corresponding to the target task is in local memory; if the memory location of the buffer is in local memory, the computer device can determine the target local memory according to a preset strategy; then the computer device can determine the target local memory according to the target Update the memory address of the buffer and the memory location of the buffer in the buffer entry; if the memory location of the buffer is not located in local memory, the computer device can set the memory location of the buffer to global memory, and then the computer device can Update the memory address of the buffer and the memory location of the buffer in the buffer entry according to the global memory.
  • another execution manner of the computer equipment performing the Buffer application task is provided. In practical applications, the diversity and practicability of the scheme are increased.
  • the target task may be a Buffer release task; the computer device executing the target task to apply for or release the Buffer corresponding to the target task may include: first, the computer device may determine the Buffer entry The memory address of the buffer corresponding to the target task; then the computer device can release the device memory corresponding to the memory address of the buffer, and then set the memory address of the buffer in the buffer entry to an empty address.
  • another execution manner in which a computer device performs a Buffer release task is provided. In actual application process, the diversity and practicability of the solution are improved.
  • the target task may be a Buffer application task; the computer device obtains a Buffer entry corresponding to the target task according to the target task, and executes the target task to apply for or release the target task location.
  • the method may further include: first, the computer device may determine that there is preloaded data, and then the computer device may generate a task to copy the preloaded data, and then execute the task to copy the preloaded data.
  • the computer device executes and completes the Buffer application task, it can also determine that there is preloaded data, and then copy the preloaded data to the target location. Therefore, in the actual application process, the solution is improved. Completeness and operability.
  • the target task may be a Buffer release task; the computer device obtains a Buffer entry corresponding to the target task according to the target task, and executes the target task to apply for or release the target task location.
  • the method may further include: first, the computer device may determine that pre-stored data exists, and then, the computer device may generate a task of copying the pre-stored data, and then execute the task of copying the pre-stored data.
  • the computer device before the computer device executes the Buffer release task, it can determine that pre-stored data exists, and then copy the pre-stored data to the target location. Therefore, in the actual application process, the integrity and practicability of the solution are improved.
  • the target task is a memory copy task
  • the target task carries a source address of the data copy corresponding to the memory copy task as a valid memory ID and / or data corresponding to the memory copy task.
  • the destination address of the copy is a legal memory ID
  • the method may further include: first, the computer device may obtain a Buffer entry corresponding to the memory ID according to the memory ID, and then the computer device may carry the target task carried in the target task.
  • the memory ID is replaced with the memory address of the buffer in the buffer entry, and then the memory copy task is executed.
  • the target task is a memory copy task
  • the memory copy task carries a legal memory ID
  • a specific execution method for a specific computer device to perform the memory copy task is provided.
  • the realizability and integrity of the solution are improved.
  • the method may include: first, the computer device may obtain according to the memory ID Buffer entry corresponding to the memory ID; then, the computer device can replace the memory ID in the input parameter with the memory address of the buffer in the buffer entry; then the computer device can determine the buffer memory location corresponding to the memory ID Whether it is located in local memory, and if the buffer memory location corresponding to the memory ID is located in local memory, the computer device can perform the heterogeneous computing task according to the local memory.
  • the target task is a heterogeneous computing task
  • the heterogeneous computing task includes a legal memory ID
  • a specific computer device is provided to perform the execution process of the heterogeneous computing task.
  • the computer device can perform the heterogeneous computing task according to the local memory through the task scheduler. Since the local memory access performance is better than the global memory, the computer device performs the heterogeneous computing tasks to read, write, and access data more efficiently. High, through the data processing method of the present application, the high performance of local memory access performance is fully utilized, which meets a variety of device memory application scenarios, and in the actual application process, improves the realizability and practicability of the solution.
  • the method may further include: first, the computer device may obtain a correspondence of the dependent task group ID The Buffer entry of the Buffer entry; then, the computer device may determine that the Buffer memory location in the Buffer entry is located in local memory; the computer device sets the Buffer memory address in the Buffer entry as an implicit parameter of the heterogeneous computing task, and then Then execute the heterogeneous computing task according to the local memory.
  • the target task is a heterogeneous computing task
  • the heterogeneous computing task carries a dependent task group ID
  • another specific computer device is provided to perform a heterogeneous computing task execution process.
  • the computer device can perform the heterogeneous computing task according to the local memory through the task scheduler. Because the local memory access performance is better than the global memory, the computer device performs the heterogeneous computing tasks to read, write, and access data more efficiently.
  • the data processing method of the present application makes full use of the higher performance of local memory access performance, and satisfies the diversified application scenarios of device memory. In the process of practical application, the diversity and practicability of the solution are improved.
  • the method may further include: : The computer device can release the dependency relationship between the task that depends on the target task and the target task.
  • the dependency relationship between the dependent task and the target task can be released.
  • a specific computer device is provided to determine how to determine the predecessor task of the target task. The way in which the successor tasks are performed improves the program's realizability.
  • the target task may be a Buffer application task; the computer device generating the target task may include: first, the computer device may apply for a Buffer entry for the Buffer corresponding to the target task and the Buffer table The memory ID corresponding to the item; then, the computer device may fill the Buffer entry according to the parameters of the application programming interface, where the parameters of the application programming interface are parameters generated by the computer device calling the application programming interface of the computer device, The buffer memory address in the Buffer entry is an empty address; then, the computer device may generate a Buffer application task according to the Buffer entry, where the Buffer application task includes a memory ID corresponding to the Buffer entry.
  • a specific method for generating a target task by a specific computer device is provided, and in practical applications, the implementability of the solution is improved.
  • the target task may be a Buffer application task; the computer device generating the target task may include: first, the computer device may fill in a Buffer entry corresponding to the task group ID according to an application programming interface parameter
  • the parameter of the application programming interface is a parameter generated by the computer device invoking the application programming interface of the computer device, wherein the memory address of the buffer in the Buffer entry is an empty address; then, the computer device may use the buffer entry according to the Buffer entry.
  • the Buffer Application Task contains the dependent task group ID.
  • the target task may be a Buffer release task; the Buffer release task includes a memory ID of a buffer corresponding to the Buffer release task.
  • the Buffer release task carries a memory ID of the Buffer corresponding to the Buffer release task, and is used for subsequent computer equipment to perform the Buffer release task according to the memory ID. In the actual application process, the solution is improved Realizable.
  • the target task may be a Buffer release task; the Buffer release task includes a dependent task group ID of a Buffer corresponding to the Buffer release task.
  • the buffer release task carries a dependent task group ID of the buffer corresponding to the buffer release task, and is used for subsequent computer equipment to perform the buffer release task according to the dependent task group ID.
  • the target task is a Buffer application task.
  • the computer device generating the target task may include: first, the computer device may determine that the heterogeneous computing task carries a buffer corresponding to the target task. Related information, wherein the heterogeneous computing task is a task generated by the computer device, the heterogeneous computing task is a task in which a predecessor of the heterogeneous computing task has been completed, and a successor task of the heterogeneous computing task is to be executed, the The relevant information of the buffer includes the memory size of the buffer corresponding to the heterogeneous computing task, the memory address of the buffer, and the memory location of the buffer; then, the computer device can fill in the corresponding information of the heterogeneous computing task according to the relevant information of the buffer.
  • the computer device can generate a Buffer application task according to the information carried in the heterogeneous computing task, and provides another method for generating a Buffer application task by a computer device. In the actual application process, it improves the Diversity of programmes.
  • the target task may be a Buffer release task; the computer device generating the target task may include: first, the computer device may determine that the heterogeneous computing task carries a Buffer corresponding to the target task Related information, the heterogeneous computing task is a task generated by the computer device, the heterogeneous computing task is a task in which a predecessor of the heterogeneous computing task has been completed, and a task to be executed in a successor of the heterogeneous computing task, the Buffer The relevant information may include the memory size of the buffer corresponding to the heterogeneous computing task, the memory address of the buffer, and the memory location of the buffer; then, the computer device may obtain a buffer entry corresponding to the target task, and then according to the buffer, The entry generates a Buffer release task.
  • another generation manner of generating a buffer release task by a computer device is provided. In practical applications, the diversity of schemes is improved.
  • the heterogeneous computing task may include related information of preloaded data, and the related information of the preloaded data may include a source address of the preloaded data, a data length of the preloaded data, and preloaded data.
  • the offset address in the buffer after the computer device obtains a buffer entry corresponding to the target task according to the target task and executes the target task to apply for or release the buffer corresponding to the target task, the method may further include: : The computer device may generate a task of copying the preloaded data according to the related information of the preloaded data, and then execute the task of copying the preloaded data.
  • another method is provided by a computer device for determining preloaded data and performing copying of the preloaded data to a target location. In practical applications, the diversity of solutions is improved.
  • the heterogeneous computing task may further include related information of pre-stored data
  • the related information of the pre-stored data may include a storage address of the pre-stored data, a length of the pre-stored data, and a length of the pre-stored data in the buffer.
  • Offset address after the computer device obtains a Buffer entry corresponding to the target task according to the target task, and executes the target task to request or release a buffer corresponding to the target task, the method may further include: first, the computer The device may generate a task of copying the pre-stored data according to the related information of the pre-stored data; then, the computer device executes the task of copying the pre-stored data.
  • another method is provided by a computer device for determining pre-stored data and performing copying of the pre-stored data to a target location. In practical applications, the diversity and practicability of the solution are improved.
  • the method may further include: the computer device may fill the parameter according to an application programming interface parameter The Buffer entry corresponding to the heterogeneous computing task, wherein the application programming interface parameter is a parameter generated when the computer device invokes the application programming interface of the computer device; then, the computer device can generate the Buffer entry according to the Buffer entry Heterogeneous computing task, where the heterogeneous computing task contains information about the buffer corresponding to the heterogeneous computing task.
  • a specific generation manner in which a specific computer device generates a heterogeneous computing task is provided, and in the process of practical application, the implementability and integrity of the solution are improved.
  • the second aspect of the embodiments of the present application provides a computer device, which has a function for realizing the behavior of the computer device of the first aspect, and the function may be implemented by hardware, or may be implemented by hardware executing corresponding software.
  • the hardware or software includes one or more modules corresponding to the above functions.
  • a third aspect of the embodiments of the present application provides a computer device.
  • the computer device includes: a processor, a memory, an input-output device, and a bus; the processor, the memory, and the input-output device are respectively connected to the bus, and are stored in the memory.
  • a fourth aspect of the embodiments of the present application provides a chip system.
  • the chip system includes a processor, and is configured to support a network device to implement the functions involved in the first aspect, for example, to send or process data involved in the foregoing method. And / or information.
  • the chip system further includes a memory, and the memory is configured to store program instructions and data necessary for the network device.
  • the chip system may be composed of chips, and may also include chips and other discrete devices.
  • a fifth aspect of the embodiments of the present application provides a computer program product including instructions, which is characterized in that when it is run on a computer, the computer is caused to execute an implementation manner as in any of the first aspect.
  • a sixth aspect of the embodiments of the present application provides a computer-readable storage medium, which is characterized in that it includes instructions that, when the instructions run on a computer, cause the computer to execute any implementation manner as in the first aspect.
  • FIG. 1-A is a schematic diagram of an application scenario system framework according to an embodiment of the present application.
  • 1-B is a schematic diagram of an application scenario of a data processing method according to an embodiment of the present application.
  • FIG. 2 is a schematic diagram of an embodiment of a data processing method according to an embodiment of the present application.
  • FIG. 3 is a schematic diagram of another embodiment of a data processing method according to an embodiment of the present application.
  • FIG. 4 is a schematic diagram of another embodiment of a data processing method according to an embodiment of the present application.
  • FIG. 5 is a schematic diagram of another embodiment of a data processing method according to an embodiment of the present application.
  • FIG. 6 is a schematic diagram of another embodiment of a data processing method according to an embodiment of the present application.
  • FIG. 7 is a schematic diagram of another application scenario of a data processing method according to an embodiment of the present application.
  • FIG. 8 is a schematic diagram of another application scenario of a data processing method according to an embodiment of the present application.
  • FIG. 9 is a schematic diagram of another embodiment of a data processing method according to an embodiment of the present application.
  • FIG. 10 is a schematic structural diagram of a computer device according to an embodiment of the present application.
  • FIG. 11 is another schematic structural diagram of a computer device according to an embodiment of the present application.
  • the embodiments of the present application provide a data processing method and a computer device for improving the turnover efficiency of the device memory corresponding to the buffer.
  • FIG. 1-A is a schematic diagram of an application scenario system framework provided by an embodiment of the present application.
  • FIG. 1-A is a system architecture of a computer device in the embodiment of the present application. It is a heterogeneous computing system architecture, and may also be a homogeneous computing system architecture, which is not limited in this application. The following only introduces the heterogeneous computing system architecture of FIG. 1-A as an example.
  • the computer device includes a host system and a slave system.
  • the host system and the slave system are connected by a bus.
  • the bus is used for It is used to connect the host system and the slave system, and supports functions such as direct data access by the host system and the slave system.
  • the Host system includes hardware modules such as a central processing unit (CPU), host memory, direct memory access (DMA), and software modules such as a heterogeneous computing operation module and an application routine module.
  • the CPU is used to execute the programs of the heterogeneous computing runtime module and the application routine module;
  • the host memory is used to store the program code and the like executed in the CPU;
  • the DMA is used for data exchange in the heterogeneous computing system.
  • the slave system includes a device calculation unit and a memory device, wherein the memory unit includes a device local memory and a device global memory.
  • the computing unit is used to perform heterogeneous computing tasks; the local memory of the device is a memory area read and written by the computing unit corresponding to the local memory; the global memory of the device is a memory that can be read and written by all computing units in the slave system region.
  • the heterogeneous computing runtime module is used to provide a software programming control interface for heterogeneous computing and related functions of the device, such as digital copy between host memory and global memory of the device, and initiation of heterogeneous tasks.
  • the application routine module is used to call the application programming interface of the heterogeneous computing runtime module for heterogeneous programming, so as to achieve the computing requirements of a specific domain.
  • the heterogeneous computing runtime module in the computer equipment is connected with the application routine module in the computer equipment.
  • the heterogeneous computing runtime module in the computer equipment includes multiple sub-modules. Please refer to FIG. 1-B for details.
  • 1-B is a heterogeneous computing runtime module including a task generating device, a task buffer pool, a task scheduler, a data copy transmitter, a heterogeneous computing transmitter, a buffer manager, and a buffer resource pool.
  • the task generating device is configured to generate a corresponding task by calling an application programming interface parameter returned by an application routine module, and then place the generated task in a task buffer pool.
  • the task buffer pool is used to receive and cache tasks generated by the task generating device according to the application programming interface parameters input by the application routine module, which may include data copy tasks, heterogeneous computing tasks, Buffer application tasks, or Buffer release tasks.
  • Each task Contains dependency information for other tasks.
  • the task scheduler is used to select a task that has been removed from its dependencies with other tasks from the task cache pool, and schedule the task to be submitted to the corresponding module to execute the task and other functions.
  • the data copy transmitter is used to receive the data copy task sent by the task scheduler, and submit it to the DMA through the corresponding hardware driver to move the data.
  • the heterogeneous computing transmitter is used for receiving a heterogeneous computing task dispatched by a task scheduler, and calling a corresponding computing unit to execute the heterogeneous computing task through the heterogeneous computing transmitter.
  • the Buffer manager is used to receive a Buffer application task or a Buffer release task dispatched by the task scheduler, wherein the predecessor task of the Buffer application task or the Buffer release task has been completed and its successor task is pending execution, the predecessor task and the successor task Logical dependencies exist to implement the application or release of buffers for data exchange, and update the buffer resource pool; the buffer resource pool is used to store the relevant information of each buffer for the task scheduler to query each buffer Related information.
  • the task scheduler dispatches the Buffer application task or the Buffer release task to the Buffer manager, and the task scheduling is performed when the task scheduler determines that the Buffer application task or the predecessor task of the Buffer release task has been completed and the subsequent task is pending.
  • the processor will send the Buffer application task or Buffer release task to the Buffer manager, thereby improving the turnover efficiency of the device memory corresponding to the Buffer.
  • the certain task or some task can be performed only after the execution of the task is completed. There is a logical order dependency between the two.
  • the task is the Predecessor task; for example, the predecessor task is a copy data task, the certain task is a heterogeneous computing task, and the execution of the heterogeneous computing task requires the user to copy the data from the copy data task to the destination address, so the copy data task Is a predecessor of this heterogeneous computing task.
  • a task is a Buffer release task, and the execution of a heterogeneous computing task requires the use of the Buffer corresponding to the Buffer release task. Then it can be known that the heterogeneous computing task is a predecessor task of the Buffer release task.
  • Successor task Assuming the first task, the first task can be executed only after the execution of the second task is completed, and there is a logical order dependency between the two tasks, then the first task is a successor task of the second task.
  • the first task is a Buffer release task
  • the first task is a heterogeneous computing task.
  • the execution of the heterogeneous computing task depends on the Buffer corresponding to the Buffer release task, so it can be known that only after the execution of the heterogeneous computing task is completed ,
  • the Buffer release task can be executed, so the heterogeneous computing task is a successor task of the Buffer release task.
  • Sequential dependency refers to the relationship between the execution order of a task and the task during the execution process. For example, the execution of a heterogeneous computing task depends on the memory requested by the buffer. Then, the buffer application task and the heterogeneous computing task. There are order dependencies.
  • Target task This task is the task that its predecessor has completed, and the predecessor task of this task executes the task.
  • the predecessor task has an order dependency relationship with the successor task; for example, the target task is a Buffer application task, and the target task
  • the successor task is a heterogeneous computing task.
  • the predecessor task of the target task is a memory copy task.
  • the execution of the heterogeneous computing task requires the use of the memory corresponding to the Buffer.
  • the Buffer application task can only be executed after executing the memory copy task. Therefore, the memory copy task is a predecessor task of the Buffer application task. Therefore, when the heterogeneous computing task is to be executed, it must be executed after the Buffer application has been applied.
  • Buffer resource pool A data table used to store the relevant information of each buffer.
  • the relevant information of the buffer includes the memory size of the buffer, the memory address of the buffer, and the memory location of the buffer.
  • Dependent task group A number of tasks that have a logical dependency on order specified by the application routine module.
  • an embodiment of the data processing method in the embodiment of the present application includes:
  • the computer device generates a target task.
  • the computer device runs the code through the application routine module, the application programming interface of the computer device is called, and then the corresponding parameters are input to the application programming interface in the computer device through the application routine module, then the computer
  • the device may generate a target task according to the parameter, where the target task may include a Buffer request task or a Buffer release task, the target task is a successor task of the first task, and is a successor task of the second task, the first task and The second task is a to-be-executed task that has an order dependency relationship.
  • the target task is a Buffer application task
  • the second task uses the Buffer corresponding to the Buffer application task when the second task is executed, and the target task is released by the Buffer.
  • the first task is executed to release the buffer corresponding to the task by using the buffer.
  • the computer device generates the target task.
  • the computer device may generate the target task according to the parameters input when the application routine module in the computer device calls the application programming interface of the computer device, or the computer device may obtain the generated task.
  • Heterogeneous computing task, and the predecessor tasks of the heterogeneous computing task have been completed, and the subsequent tasks are to be executed, the computer equipment can generate the target task according to the relevant information of the buffer carried in the heterogeneous computing task. This is not limited.
  • the computer device obtains a Buffer entry corresponding to the target task according to the target task.
  • the computer device may obtain a Buffer entry corresponding to the target task according to the target task.
  • the computer device may obtain the Buffer entry of the memory ID from the Buffer resource pool in the computer device according to the memory ID of the buffer carried in the target task, or it may be a dependency carried by the computer device according to the target task.
  • the task group ID obtains the Buffer entry that depends on the task group ID from the Buffer resource pool in the computer device, or the computer device can obtain the corresponding corresponding heterogeneous computing task from the buffer resource pool of the computer device according to the heterogeneous computing task. Buffer entry, which is not limited in this application.
  • the computer device executes the target task to request or release a buffer corresponding to the target task.
  • the computer device After the computer device obtains the Buffer entry, it can execute the target task, so as to implement the application or release the buffer corresponding to the target task.
  • the computer device may determine the memory size and memory location of the Buffer according to the Buffer entry, and then apply for the corresponding device memory for the Buffer according to the memory size and memory location, and then The memory address of the device memory is filled in the Buffer entry; when the Buffer releases the task, the computer device can determine the device memory of the Buffer according to the Buffer entry, and then release the device memory corresponding to the Buffer.
  • the computer device can delete the buffer entry, and when the target task is a task in a dependent task group, the computer device can delete the memory in the buffer entry.
  • the address is set to an empty address, and the process of executing the target task subsequently may be determined according to the structure of the Buffer resource pool.
  • the computer device generates a target task, where the target task includes a Buffer application task or a Buffer release task, the target task is a successor task of the first task, and is a successor task of the second task, the first task
  • the task and the second task are pending tasks that have a sequential dependency relationship.
  • the target task is the Buffer application task
  • the second task uses the Buffer corresponding to the Buffer application task when the second task is executed.
  • the target task is When the Buffer releases the task, the Buffer corresponding to the task is used to release the Buffer corresponding to the task when the first task is executed.
  • the computer device may perform the task according to the target.
  • the task obtains a Buffer entry corresponding to the target task, where the Buffer entry is an entry containing the memory size of the buffer corresponding to the target task, the memory location of the Buffer, and the memory address of the Buffer, and then the computer device executes the
  • the target task requests or releases the buffer corresponding to the target task. Therefore, before the computer equipment applies for the Buffer or releases the Buffer, the computer equipment can determine that the predecessor task of the target task is completed, and the predecessor task of the target task is executed before the computer device executes the target task.
  • the buffer application can be truly postponed to the completion of the predecessor task of the target task, and the predecessor task of the target task can be executed, and the release of the buffer by the computer device can be executed as soon as the predecessor task of the target task is completed, thus Improved the turnover efficiency of device memory corresponding to Buffer.
  • the buffer manager may determine the target local memory according to a preset policy.
  • the Buffer manager can directly correspond to the local memory as the memory address of the Buffer, or the Buffer manager can determine the target local memory according to the load of the computing unit corresponding to the local memory or the local memory idle condition. It is not limited here.
  • the buffer manager is used to determine the target local memory according to the load of the computing unit and the idle state of the local memory as an example.
  • the task scheduler can select a target computing unit from the computing units corresponding to global memory to execute the heterogeneous computing task. Specifically, the task scheduler can select a computing unit with the smallest load according to the load of the computing unit. To execute the heterogeneous computing task, the task scheduler can also select the target computing unit according to other policies, which is not limited here. In the subsequent embodiments, only the computing unit with the smallest load is selected by the task scheduler to execute the heterogeneous computing task.
  • the calculation task is described as an example.
  • a Buffer entry in a Buffer resource pool in a computer device may be a data table with Buffer as a dimension.
  • An application routine module in the computer device calls an application program interface in a task generating device in the computer device, and then Enter the corresponding application programming interface parameters into the task generation device. For example, when the application routine module calls the task generation device to initiate a request for a Buffer task, the application routine module will enter the parameters of the application buffer task into the task generation device.
  • the task generating device can apply for a Buffer entry in the Buffer resource pool, then fill in the Buffer entry according to the application program interface parameters, and create a Buffer application task, and the Buffer application task carries the memory ID of the Buffer, and then the task
  • the generating device puts the created Buffer application task into the task buffer pool in the computer equipment, and returns the memory ID to the application routine module; or the task generating device creates a Buffer release task in the Buffer resource pool, and places the Buffer release task in Into the task buffer pool, the Buffer releases the task Contains the memory ID of the corresponding Buffer; therefore, the subsequent Buffer Manager can execute the Buffer application task or the Buffer release task according to the memory ID in the Buffer application task information.
  • the Buffer entry in the Buffer resource pool can be a data table whose dimensions are dependent on the task group.
  • the task generating device applies for the Buffer entry in the Buffer resource pool, and then calls the application program input when the task generating device is called according to the application routine module.
  • the interface parameter fills in the Buffer entry and creates a Buffer application task.
  • the Buffer application task carries a dependent task group ID.
  • the task generation device places the created Buffer application task in the task buffer pool. Or the task generation device is in the Buffer resource pool. Create a Buffer release task and add the Buffer release task to the task buffer pool.
  • the Buffer release task contains the ID of the dependent task group; therefore, subsequent Buffer managers can use the ID of the dependent task group in the Buffer application task to Execute the Buffer request task or the Buffer release task.
  • the order dependency relationship may be embodied in multiple ways.
  • the first way when the task generating device in the computer device generates a target task, the target task carries task and task dependencies. The relationship is consistent with the principle of the dependency relationship between tasks in the prior art;
  • the second method the task generating device in the computer equipment generates a target task, and the target task carries a corresponding identifier, and the type Determine which task is related, for example, a heterogeneous computing task carries an identifier 1, and a Buffer application task carries an identifier 2.
  • the preset mechanism of the computer device is that the task carrying the identifier 1 and the task carrying the identifier 2 exist logically. Execution sequence.
  • This application is not limited, and in the following embodiments, the first method is used as an example for description.
  • the computer device may obtain the corresponding buffer entry from the buffer resource pool in the computer device according to the memory ID of the buffer corresponding to the target task sent by the task scheduler in the computer device through the Buffer Manager, and according to the Buffer Manager, The target task and the Buffer entry are used to execute the target task.
  • the target task is a Buffer application task or a Buffer release task, which is described in detail below with reference to FIG. 3:
  • the computer device obtains the corresponding Buffer entry from the Buffer resource pool in the computer device through the Buffer manager according to the memory ID, and then the Buffer manager according to the task of the target task Type and the Buffer entry to perform the target task.
  • Another embodiment of the data processing method in the embodiment of the present application includes:
  • a computer device obtains a target task from a task buffer pool in the computer device through a task scheduler.
  • the application program interface of the task generating device in the heterogeneous computing runtime module in the computer device is called, and then the corresponding application programming interface parameters are input into the task generating device.
  • the task generating device generates a task according to the parameters of the application programming interface, and then places the generated task into a task buffer pool in the computer device.
  • the target task is a Buffer request task or a Buffer release task; when the predecessor task of the target task has been completed and before and after the subsequent task of the target task is executed, the task scheduler will remove the task from the task buffer pool.
  • the target task where the predecessor task and the subsequent task have a logical order dependency relationship, and the target task carries the memory ID of the buffer corresponding to the target task.
  • the process of creating the Buffer application task by the task generation device in the computer equipment in the early stage is: the computer equipment invokes the application programming interface of the task generation device through the application routine module to initiate the Buffer application task, Then input the relevant parameters of the corresponding Buffer application task into the application programming interface, and then the task generating device can apply for the Buffer entry and the memory ID corresponding to the Buffer in the Buffer resource pool in the computer equipment.
  • Relevant parameters fill in the Buffer entry, set the memory address in the Buffer entry to an empty address, and then apply for a Buffer application task according to the Buffer entry, and the Buffer application task carries a memory ID, and place the Buffer application task in In the task buffer pool in the computer device, the application programming interface of the task generation device returns a memory ID to the application routine module.
  • the process of the task generation device creating a Buffer release task is specifically : Task generation device Enter the relevant parameters of the routine module to create Buffer release task, and the task of carrying the release Buffer Buffer memory ID, the task then is released into the task Buffer cache pool.
  • the target task carries the memory ID of the buffer corresponding to the target task.
  • Table 1 is a buffer resource pool with Buffer as the dimension. Among them, Buffer1, Buffer2, and Buffer3 represent three Buffer tables. Entries, each table entry contains information such as memory ID, memory size, memory location, and memory address.
  • the target task is a Buffer application task, and its memory ID is 101.
  • the Buffer entry corresponding to this target task is an entry corresponding to memory ID 101.
  • the target task corresponds to a Buffer memory size of 500 and a memory location of local 1.
  • the memory address is 0x1001.
  • the computer device determines a task type of the target task through a task scheduler.
  • the computer device can determine the task type of the target task according to the fields in the target task through the task scheduler. For example, when the first task is a Buffer application task, the target task will carry a corresponding field to indicate the Buffer application task.
  • the computer device sends the target task to the Buffer manager in the computer device through the task scheduler.
  • the task scheduler After the task scheduler determines that the task type of the target task is a Buffer application task or a Buffer release task, the task scheduler can send the target task to the Buffer manager in the computer device, and the target task carries the Buffer corresponding to the target task. Memory ID.
  • the computer device obtains the Buffer entry corresponding to the memory ID from the Buffer resource pool in the computer device through the Buffer manager according to the memory ID of the Buffer carried by the target task.
  • the computer device can obtain the corresponding Buffer entry from the Buffer resource pool in the computer device from the memory ID carried in the target task through the Buffer manager. For example, as shown in Table 1, if the memory ID is 101, the Buffer manager can obtain the Buffer entry corresponding to the memory ID, and Table 2 is the Buffer entry corresponding to the memory ID.
  • the computer device can obtain the Buffer entry corresponding to the memory ID through the Buffer Manager, and Table 3 is the Buffer entry corresponding to the memory ID 201.
  • the computer device determines the task type of the target task through the Buffer manager. If the task type of the target task is a Buffer application task, step 306 is performed; if the task type of the target task is a Buffer release task, step 310 is performed.
  • the computer device Buffer manager can determine the task type of the target task by using the target task.
  • step 306 is performed; when the task type of the target task is a Buffer release task, Then step 310 is performed.
  • the computer device determines, through the buffer manager, that the size of the free memory in the buffer memory location is greater than the size of the buffer memory.
  • the Buffer manager in the computer device obtains the Buffer entry from step 304 to query the memory location of the Buffer, and then the Buffer manager can determine whether the free memory size in the memory location is It is larger than the buffer memory size in the Buffer table entry. If it is larger, the Buffer manager can determine that there is enough free memory in the buffer memory location.
  • the Buffer entry obtained by the Buffer manager is Table 3, then from Table 3, it can be known that the memory location of the buffer applied for the Buffer application task is local memory 2 and the memory size is 30, then the Buffer The manager will determine whether the size of the free memory in local memory 2 is greater than 30. If it is larger, then the Buffer manager determines that there is sufficient memory in local memory 2.
  • the Buffer Manager can wait until there is free memory in the memory location before determining to allocate memory for the Buffer table entry, or it can be The Buffer Manager can use global memory instead of the local memory, and then allocate global memory for the Buffer table entry, which is not limited here. When the global memory also runs out of memory, the Buffer Manager can wait to the global memory at this time. Allocate memory to the Buffer when idle, which is not limited here.
  • the heterogeneous computing runtime module can grasp the dependency relationship between the buffer and the heterogeneous computing task. Therefore, the computer device schedules the task through the task.
  • the processor can perform Buffer affinity scheduling for this heterogeneous computing task.
  • the task scheduler can support the buffer allocation management of the local memory of the device, and improves the memory access performance during the execution of heterogeneous computing tasks to meet different application scenarios.
  • the heterogeneous computing task can be performed by applying for local memory of the device, for example, The application routine module determines whether the data is the most frequently copied data or the most frequently used data during the execution of the heterogeneous computing task. At this time, the application routine module can apply for a buffer of local memory to copy the data to the buffer in the future. Corresponding local memory, so when performing heterogeneous calculations More efficient write task accessing the data, full use of the local memory access performance high performance to meet the needs of different application scenarios.
  • the computer device updates the buffer memory address in the buffer entry through the buffer manager.
  • the buffer manager After the buffer manager determines the free memory in the buffer memory location, the buffer manager updates the memory address in the buffer entry. For example, the Buffer entry obtained by the Buffer manager from the Buffer resource pool according to the memory ID is Table 3. After the Buffer manager determines the free memory, it fills the corresponding memory address of the free memory into the space of the memory address in Table 3. , That is, the state that the memory address in Table 3 is an empty address is updated to the memory address corresponding to the free memory.
  • the computer device sends a first notification message to the task scheduler in the computer device through the Buffer manager.
  • the Buffer manager After the Buffer manager updates the Buffer memory address in the Buffer entry, the Buffer manager sends a first notification message to the task scheduler, and the first notification message is used to instruct the Buffer manager to execute and complete the target task.
  • the computer device releases the dependency relationship between the task that depends on the Buffer request task and the task that the Buffer requests in the task buffer pool of the computer device through the task scheduler.
  • the task scheduler After the task scheduler receives the first notification message, the task scheduler will release the dependency relationship between the task buffer pool and the tasks that depend on the Buffer application task and the Buffer application task, and is used for subsequent task scheduler scheduling to release the dependency relationship. Task.
  • the computer device releases the device memory corresponding to the buffer memory address in the buffer entry through the buffer manager.
  • the Buffer manager When the target task is a Buffer release task, the Buffer entry obtained in step 304, the Buffer manager will release the device memory corresponding to the corresponding Buffer memory address in the Buffer entry. For example, the buffer memory address in Table 2 is 0x10001, then the buffer manager can release the device memory corresponding to 0x10001.
  • the computer device deletes the Buffer entry from the Buffer resource pool in the computer device through the Buffer manager.
  • the buffer manager After the buffer manager releases the device memory corresponding to the buffer memory address, the buffer manager deletes the buffer entry from the buffer resource pool. For example, the Buffer manager determines that the Buffer entry corresponding to the memory ID is Table 2. After releasing the device memory corresponding to the Buffer memory address, the Buffer manager can delete Table 2 from the Buffer resource pool.
  • 312 The second notification message sent by the computer device to the task scheduler in the computer device through the Buffer manager.
  • the Buffer manager may send a second notification message to the task scheduler, where the second notification message is used to instruct the Buffer manager to execute and complete the Buffer release task.
  • the computer device releases the dependency relationship between the task that depends on the Buffer release task and the Buffer release task in the task cache pool in the computer device through the task scheduler.
  • the task scheduler may release the dependency relationship between the task that depends on the Buffer release task and the Buffer release task in the task buffer pool.
  • the computer device receives the target task sent by the task scheduler in the computer device through the Buffer manager.
  • the target task is a successor task of the first task and a successor task of the second task.
  • the first task And the second task is a pending task that has a sequential dependency relationship, wherein when the target task is the Buffer application task, the second task uses the Buffer corresponding to the Buffer application task when the second task is executed, and when the target task is the Buffer
  • the Buffer corresponding to the task is used to release the Buffer corresponding to the task when the first task is executed.
  • the computer device can pass the Buffer Manager.
  • the Buffer entry corresponding to the task is obtained from the Buffer resource pool in the computer device according to the target task, where the Buffer resource pool in the computer device stores the Buffer entry for each Buffer, and the computer device can then use the Buffer manager to Execute the target task according to the Buffer entry to apply or release the target task Should the Buffer. Therefore, before the computer equipment applies for the Buffer or releases the Buffer, the computer equipment can determine that the predecessor task of the target task is completed, and the predecessor task of the target task is executed before the computer device executes the target task.
  • the buffer application can be truly postponed to the completion of the predecessor task of the target task, and the predecessor task of the target task can be executed, and the release of the buffer by the computer device can be executed as soon as the predecessor task of the target task is completed, thus Improved the turnover efficiency of device memory corresponding to Buffer.
  • the computer device may use the Buffer Manager to obtain the corresponding Buffer entry from the Buffer resource pool in the computer device according to the dependent task group ID carried in the target task sent by the task scheduler in the computer device.
  • the Buffer entry is used to execute the target task to request or release the Buffer corresponding to the target task, where the target task is a Buffer application task or a Buffer release task, and the target task is a task in the dependent task group.
  • the computer device obtains the corresponding Buffer entry from the Buffer resource pool according to the dependent task group ID through the Buffer manager, and then the Buffer manager executes the target according to the Buffer entry.
  • the task is to apply or release the Buffer corresponding to the target task.
  • Another embodiment of the data processing method in the embodiment of the present application includes:
  • a computer device obtains a target task from a task buffer pool in the computer device through a task scheduler.
  • the computer device determines a task type of the target task through a task scheduler.
  • the computer device sends the target task to the Buffer manager in the computer device through the task scheduler.
  • Steps 401 to 403 are similar to steps 301 to 303 in FIG. 3 described above, and details are not described herein again.
  • the specific process for the computer device to create a Buffer application task through the task generating device is: an application programming interface input when the task generating device calls an application program interface of the task generating device according to an application routine module Fill the parameters with the Buffer entry corresponding to the ID of the dependent task group, and set the memory address in the Buffer entry to an empty address, and then the task generating device creates a Buffer application task based on the Buffer entry, and the Buffer application task carries the dependent task group ID, and then put the task into the task buffer pool in the computer equipment.
  • the process of the task generating device creating a buffer release task is specifically: the task generating device creates a buffer release task according to the parameters of the application programming interface, and the buffer release task carries Rely on the task group ID and place the task in the task cache pool in the computer device.
  • the computer device obtains, through the buffer manager, a buffer entry corresponding to the target task according to the dependent task group ID carried in the target task.
  • the Buffer manager can obtain the Buffer entry corresponding to the target task from the Buffer resource pool in the computer device according to the dependent task group ID carried in the target task, where:
  • the Buffer resource pool in the computer device stores related information of each Buffer, and the Buffer entry is an entry containing related information of the Buffer corresponding to the target task, and the Buffer entry may include the corresponding target task.
  • the Buffer memory size, memory address, and memory location are not limited in this application.
  • the Buffer resource pool is a data table with a dependent task group as a dimension, for example, the data table shown in Table 4, in Table 4, the dependent task is displayed in the Buffer entry corresponding to the dependent task group 1.
  • the buffer size corresponding to group 1 is 500, the memory location is local 1, and the memory address is 0x10001.
  • the entry corresponding to the dependent task group ID carried in the target task is the Buffer entry corresponding to dependent task group 3 in Table 4, then the computer device can obtain the buffer item from the buffer resource pool in the computer device through the Buffer manager.
  • the buffer entry corresponding to the dependent task group 3, that is, Table 5 is a buffer entry obtained by the buffer manager according to the dependent task group ID carried in the target task.
  • the computer device determines the task type of the target task through the Buffer manager. If the task type of the target task is a Buffer application task, step 406 is performed; if the task type of the target task is a Buffer release task, step 415 is performed.
  • the Buffer Manager After the Buffer Manager obtains the target task, it can determine the task type of the target task. If the task type of the target task is a Buffer application task, step 406 is performed; if the task type of the target task is a Buffer release task, then step is performed. 415.
  • the Buffer Manager determines the task type of the target task.
  • the Buffer Manager determines the task type of the target task according to the fields in the target task, or the Buffer Manager determines the target by other methods.
  • the task type of the task is not limited here.
  • the computer device determines whether the buffer memory location is local memory through the Buffer manager, and if yes, executes step 407; if not, executes step 411.
  • the Buffer Manager can determine whether the Buffer memory location corresponding to the target task is local memory. If the Buffer memory location corresponding to the target task is local memory, then Step 407 is performed; if the buffer memory location corresponding to the target task is not local memory, step 411 is performed.
  • the buffer entry corresponding to the target task is Table 5. In Table 5, the memory location of the buffer is local memory 2. Therefore, the buffer manager can determine that the memory location of the buffer is local memory.
  • the dependent task group includes A task, B task, C task, and D task.
  • a task has a dependency relationship with B task
  • C task has a dependency relationship with D task
  • a task and B task share Buffer D1, C task.
  • Buffer D2 is shared with D task.
  • the Buffer The manager When the execution of the A task and B task is completed, the Buffer The manager will release the buffer D1, that is, delete the relevant information of the buffer D1 in the buffer entry, and then the buffer manager will apply for the buffer D2 corresponding to the task information sent by the task scheduler. At this time, the buffer entry There is relevant information of Buffer D2, and the corresponding module can perform C task and D task.
  • the heterogeneous computing runtime module when the asynchronous data exchange buffer management is performed by the computer device through the heterogeneous computing runtime module, the heterogeneous computing runtime module can grasp the dependency relationship between the buffer and the heterogeneous computing task. Therefore, the computer device passes the task scheduler Buffer affinity scheduling of this heterogeneous computing task can be supported.
  • the task scheduler can support the buffer allocation management of the local memory of the device, and improve the memory access performance during the execution of heterogeneous computing tasks to meet the needs of different application scenarios. Because the memory access performance of global memory is worse than that of local memory, when heterogeneous computing tasks with higher memory access performance are required to perform data exchange, the heterogeneous computing task can be performed by applying for local memory of the device.
  • the routine module determines whether the data is copied or used most frequently during the execution of the heterogeneous computing task. At this time, the application routine can apply for a buffer of local memory, and then copy the data to the corresponding buffer. Local memory, so performing heterogeneous computing tasks The read and write access to this data is more efficient and fully utilizes the performance of higher local memory access performance; the data processing method of this application can support data exchange buffers to apply for corresponding memory at any level of memory in the device memory, so it can meet diversification Device memory scenarios to meet the needs of different application scenarios.
  • the computer device determines the target local memory through the Buffer manager.
  • the buffer manager may determine the target local memory according to the load of the computing unit and the idle state of the local memory.
  • the Buffer Manager determines that the local memory is idle due to insufficient memory, the Buffer Manager can wait until the local memory is sufficient before applying for the corresponding memory for the Buffer, or it can be the Buffer
  • the manager uses the global memory as the target memory, and then applies the device memory corresponding to the global memory for the buffer, which is not limited in this application.
  • the computer device updates the buffer memory address and the buffer memory location through the buffer manager.
  • the Buffer Manager can update the Buffer memory address and the Buffer memory location in the Buffer table entry according to the target local memory. For example, in step 404, the Buffer manager determines that the Buffer entry corresponding to the target task is Table 5, and then the Buffer manager updates the memory address and memory location in Table 5 according to the determined local memory.
  • the computer device sends a first notification message to the task scheduler through the Buffer manager.
  • the computer device releases the dependency relationship between the task that depends on the Buffer application task and the Buffer application task through the task scheduler.
  • Steps 409 to 410 are similar to steps 308 to 309 in FIG. 3 described above, and details are not described herein again.
  • the computer device sets the global memory as the target memory location through the Buffer manager.
  • the Buffer Manager After the Buffer Manager determines that the memory location of the Buffer is not local memory, the Buffer Manager can set the global memory as the target memory location of the Buffer corresponding to the target task. For example, the Buffer manager obtains the corresponding Buffer entry from the Buffer resource pool according to the task information, and determines that the memory location of the Buffer is global memory through the Buffer entry.
  • the computer device updates the buffer memory address and the buffer memory location through the buffer manager.
  • the Buffer Manager determines that the Buffer corresponding to the target task is located in global memory, and then the Buffer Manager can update the Buffer memory address and Buffer memory location in the Buffer table entry according to the global memory; for example, the Buffer Manager determines the corresponding global memory, then The buffer manager can fill the memory address corresponding to the global memory and the memory location of the global memory into the buffer's Buffer entry.
  • the computer device sends a second notification message to the task scheduler through the Buffer manager.
  • the computer device releases the dependency relationship between the task that depends on the Buffer application task and the Buffer application task through the task scheduler.
  • Steps 413 to 414 are similar to steps 308 to 309 in FIG. 3 described above, and details are not described herein again.
  • the computer device determines the buffer memory address in the buffer entry through the buffer manager.
  • the Buffer manager can determine the Buffer memory address in the Buffer entry; for example, the Buffer entry corresponding to the task group ID carried by the target task It is the Buffer entry corresponding to task group 1 in Table 1, that is, the Buffer entry shown in Table 7, and the memory address is 0x10001.
  • the computer device releases the device memory corresponding to the buffer memory address through the buffer manager.
  • the buffer manager can release the device memory corresponding to the buffer memory address. For example, in step 415, the buffer manager determines that the buffer memory address is 0x10001, and then the buffer manager can release the device memory corresponding to 0x10001.
  • the computer device sets the buffer memory address to an empty address through the buffer manager.
  • the buffer memory address in the buffer entry can be set to an empty address. For example, in Table 7, set 0x10001 to null, as shown in Table 8:
  • the Buffer manager may delete the corresponding Buffer entry of the dependent task group in the Buffer resource pool when the corresponding Buffer is released.
  • the computer device sends a third notification message to the task scheduler through the Buffer manager.
  • the computer device releases the dependency relationship between the task that depends on the Buffer release task and the Buffer release task through the task scheduler.
  • Steps 418 to 419 are similar to steps 312 to 313 in FIG. 3 described above, and details are not described herein again.
  • the computer device receives the target task sent by the task scheduler in the computer device through the Buffer manager.
  • the target task is a successor task of the first task and a successor task of the second task.
  • the first task And the second task is a pending task that has a sequential dependency relationship, wherein when the target task is the Buffer application task, the second task uses the Buffer corresponding to the Buffer application task when the second task is executed, and when the target task is the Buffer
  • the Buffer corresponding to the task is used to release the Buffer corresponding to the task when the first task is executed.
  • the computer device can pass the Buffer Manager.
  • the Buffer entry corresponding to the task is obtained from the Buffer resource pool in the computer device according to the target task, where the Buffer resource pool in the computer device stores the Buffer entry for each Buffer, and the computer device can then use the Buffer manager to Execute the target task according to the Buffer entry to apply or release the target task Corresponding Buffer.
  • the computer device can determine that the target task's predecessor task is completed and the target task's successor task is executed before the computer device executes the target task, so the computer device
  • the application for the buffer can be truly postponed until the execution of the predecessor of the target task is completed, and the predecessor of the target task is executed, and the release of the buffer by the computer device can be executed immediately before the predecessor of the target task is completed. , Thereby improving the turnover efficiency of the device memory corresponding to the Buffer.
  • the computer device can call the corresponding module in the computer device to execute the target task according to the memory ID carried in the target task and the task type of the target task through the task scheduler, which will be described in detail below with reference to FIG. 5:
  • the computer device calls the corresponding module in the computer device to execute the target task according to the memory ID carried by the target task and the task type of the target task through the task scheduler.
  • Another embodiment of the data processing method in the example includes:
  • a computer device obtains a target task from a task buffer pool in the computer device through a task scheduler.
  • the application routine module will call the application programming interface of the task generating device of the heterogeneous computing runtime module in the computer equipment, and then input the corresponding application programming interface parameters Go to the task generating device, and then the task generating device generates a task according to the parameters of the application programming interface, and then puts the generated task into a task buffer pool in the computer device.
  • the computer device can obtain the target task from the task buffer pool in the computer device through the task scheduler.
  • the target task is a task whose predecessor task has been completed and a successor task of the target task is to be executed.
  • the predecessor task is related to the successor task. Tasks logically have an order dependency relationship, and the target task carries a buffer memory ID corresponding to the target task.
  • the computer device determines the task type of the target task through the task scheduler. If the task type of the target task is a memory copy task, step 503 is performed; if the task type of the target task is a heterogeneous computing task, step 512 is performed; If the task type of the target task is a Buffer application task or a Buffer release task, step 524 is performed.
  • the computer device can perform the task scheduler according to the task type of the target task, if the task type of the target task is a memory copy task, then execute step 503; if the task type of the target task is a heterogeneous computing task, then execute step 512; if If the task type of the target task is a Buffer application task or a Buffer release task, step 524 is performed.
  • the task adjuster may determine a task type of the target task according to a field in the target task.
  • the computer device determines, through the task scheduler, whether the source address of the data copy is a valid memory ID and / or whether the destination address of the data copy is a valid memory ID. If the source address is a valid memory ID and / or the destination If the address is a valid memory ID, step 504 is performed; if the source address and the destination address are not valid memory IDs, step 509 is performed.
  • the computer device can determine whether the data copy source address corresponding to the memory copy task is a valid memory ID and / or the data copy destination address is a valid memory ID through the task scheduler. If the source address is a valid memory ID and / Or the destination address is a valid memory ID, step 504 is performed; if the source address and the destination address are not legal memory IDs, step 509 is performed. For example, the source address of the memory copy data is 101.
  • the memory 101 is a valid memory ID, that is, the device memory corresponding to the memory address 0x10001
  • the data in the memory is copied to the destination address; for example, if the destination address of the data copied in the memory is 101, then the data of the source address is copied to the device memory corresponding to 0x10001.
  • the legal memory ID is the memory ID of the buffer that the computer device has applied for through the Buffer Manager. If the data copy source address or destination address of the memory copy task contains the memory ID of the applied buffer, then it can be determined The memory ID is a valid memory ID.
  • the computer device obtains a corresponding buffer memory address in the Buffer resource pool in the computer device according to the memory ID through the task scheduler.
  • the task scheduler After the task scheduler determines that the task type of the target task is a memory copy task, the task scheduler can obtain the corresponding buffer memory address in the Buffer resource pool according to the memory ID carried in the target task; for example, if the memory ID is 101, then As shown in Table 1, the buffer entry corresponding to the memory ID is Table 2, and the buffer memory address is 0x10001.
  • the computer device replaces the memory ID carried in the target task with the buffer memory address through the task scheduler.
  • the task scheduler can replace the memory ID carried in the target task with the memory address of the buffer. For example, if the source address of the data copy task is 101, the task scheduler can replace the source address with 0x10001.
  • the computer device sends the target task to the DMA in the computer device through the data transfer transmitter in the computer device through the task scheduler.
  • the computer device can send the target task to the DMA through the data transfer transmitter through the task scheduler, and the target task carries a memory address of the buffer. For example, after the task scheduler replaces the memory ID in the target task with 0x10001, the task scheduler can send the target task to the DMA. After receiving the target task, the DMA will The memory address executes the target task and copies the target data to the target address.
  • the computer device sends a first notification message to the task scheduler in the computer device through DMA.
  • the DMA may send a first notification message to the task scheduler, where the first notification message is used to instruct the DMA execution to complete the target task.
  • the computer device releases the dependency relationship between the dependent task and the target task through the task scheduler.
  • the task scheduler may release the dependency relationship between the task that depends on the target task and the target task in the task cache pool.
  • the computer device sends the target task to the DMA in the computer device through the task scheduler.
  • the task scheduler can send the target task to the DMA through the data transfer transmitter, and let the DMA directly execute the target task; for example, If the source address of the data copy and the destination address of the data copy in the memory copy task are not the memory IDs corresponding to the buffers that have been applied for in the Buffer resource pool, the task scheduling directly schedules the DMA to execute the data copy.
  • the computer device sends a second notification message to the task scheduler in the computer device through the DMA.
  • the computer device releases the dependency relationship between the dependent task and the memory copy task through the task scheduler.
  • Steps 510 to 511 are similar to steps 507 to 508, and details are not described herein again.
  • the computer device determines whether a valid memory ID exists in the input parameters of the heterogeneous computing task through the task scheduler, and if yes, executes step 513; if not, executes step 522.
  • the task scheduler can determine whether a valid memory ID exists in the input parameters of the heterogeneous computing task. If a valid memory ID exists, step 513 is performed; if a valid memory ID does not exist in the input parameters of the heterogeneous computing task, step 522 is performed. For example, the buffer memory ID that the Buffer manager has applied for is 101. If the input parameters of the heterogeneous computing task exist 101, the task scheduler can determine that the input parameters of the heterogeneous computing task have a valid memory ID.
  • the computer device obtains the corresponding buffer memory address in the Buffer resource pool according to the memory ID through the task scheduler.
  • the task scheduler can obtain the Buffer entry corresponding to the memory ID in the Buffer resource pool according to the memory ID, and then the task scheduler can determine the memory address of the buffer from the Buffer entry; for example, if the memory ID is 101, then the memory ID corresponds to The Buffer entry is Table 2. Then we know that the memory address of the Buffer is 0x10001.
  • the computer device replaces the memory ID in the input parameters of the heterogeneous computing task with the buffer memory address through the task scheduler.
  • the task scheduler After the task scheduler determines that a valid memory ID exists in the input parameters of the heterogeneous computing task, the task scheduler can replace the memory ID in the input parameters of the heterogeneous computing task with the buffer memory address; for example, the task scheduling The processor determines that the memory ID is 101, then the corresponding buffer memory address is 0x10001, and then the task scheduler may replace the memory ID of the input parameter of the heterogeneous computing task with the buffer memory address.
  • the computer device determines whether the Buffer memory location corresponding to the memory ID is a local memory through the task scheduler. If so, step 516 is performed; if not, step 519 is performed.
  • the task scheduler can determine whether the buffer memory location corresponding to the memory ID is local memory. If the buffer memory location corresponding to the memory ID is local memory, step 516 is performed; if the buffer memory location corresponding to the memory ID is not local memory, Then go to step 519. For example, if the memory ID is 101, it can be determined from Table 2 that the memory location of the buffer is local memory 1. If the memory ID is 102, then from Table 1, it can be determined that the memory location of the buffer is global memory.
  • the computer device sends the target task to the computing unit corresponding to the Buffer local memory in the computer device through the task scheduler.
  • the task scheduler may send the target task to a computing unit corresponding to the buffer local memory. For example, if the memory ID is 101, the buffer memory location is local memory 1, and the buffer memory address is 0x10001, then the calculation unit corresponding to the buffer local memory is the calculation unit corresponding to 0x10001, and the task scheduler can send the calculation unit corresponding to 0x10001. The target task.
  • the computer device can support the buffer allocation management of the local memory of the device through the task scheduler. Because the global memory access performance is worse than the local memory, when the heterogeneous computing tasks that require higher access performance perform data exchange, you can apply for the device local Memory to perform the heterogeneous computing task. For example, the computer equipment determines through application routine modules that the data is the most frequently copied or frequently used data during the execution of the heterogeneous computing task, then the application routine module is the heterogeneous The computing task applies for a buffer of local memory, so that the data is subsequently copied to the local memory corresponding to the buffer. Therefore, it is more efficient to read and write access to this data when performing heterogeneous computing tasks, making full use of the performance of local memory access. High performance; the data processing method of the present application can support the data exchange Buffer to apply for corresponding memory at any level of memory in the device memory, so it can meet a variety of device memory scenarios, thereby meeting the needs of different application scenarios.
  • the computer device sends a third notification message to the task scheduler in the computer device through a computing unit corresponding to the local memory of the buffer.
  • the computing unit corresponding to the Buffer local memory may send a third notification message to the task scheduler, and the third notification message is used to indicate the computing unit corresponding to the Buffer local memory. Perform this task.
  • the computer device releases the dependency relationship of the dependent task on the target task through the task scheduler.
  • the task scheduler After the task scheduler receives the third notification message, the task scheduler can release the dependency of the dependent task on the target task.
  • the computer device sends the target task to the computing unit with the smallest load through the task scheduler.
  • the task scheduler can send the target task to the computing unit with the least load, for example, if the memory ID is 102, then the memory ID corresponds to The buffer memory location is global memory, so the task scheduler can send the target task to the computing unit with the smallest load.
  • the computer device sends a fourth notification message to the task scheduler in the computer device through the computing unit with the smallest load.
  • the computing unit with the smallest load can execute the target task.
  • the computing unit with the smallest load executes and completes the target task, the computing unit can report to the task scheduler. Send the fourth notification message, which is used to notify the task scheduler that the target task execution is completed.
  • the computer device releases the dependency relationship of the dependent task on the target task through the task scheduler.
  • Step 521 is similar to step 518, and details are not described herein again.
  • the computer device sends the target task to the computing unit with the smallest load in the computer device through the task scheduler.
  • the task scheduler determines that there are no valid memory IDs in the input parameters of the heterogeneous computing task, it means that the heterogeneous computing task does not depend on the buffers that have been applied for in the Buffer resource pool, then the task scheduler can report to the computing unit with the smallest load. Send target task.
  • the computer device sends a fifth notification message to the task scheduler in the computer device through the computing unit with the smallest load.
  • the computer device releases the dependency relationship of the dependent task on the target task through the task scheduler.
  • Steps 523 and 524 are similar to steps 517 and 518, and details are not described herein again.
  • the computer device sends the target task to the Buffer manager in the computer device through the task scheduler.
  • the task scheduler may send the target task to the Buffer manager.
  • the computer device sends a sixth notification message to the task scheduler in the computer device through the Buffer manager.
  • the Buffer manager can execute the target task.
  • the Buffer manager may send a sixth notification message to the task scheduler, and the sixth notification message is used to notify the task scheduler to execute and complete the target task.
  • the computer device releases the dependency relationship of the dependent task on the target task through the task scheduler.
  • Step 527 is similar to step 518, and details are not described herein again.
  • the computer device obtains a target task from a task buffer pool in the computer device through a task scheduler, and the target task is a task whose predecessor task has been completed and a successor task of the target task to be executed.
  • the successor task and the successor task logically have an order dependency relationship.
  • the computer device determines the task type of the target task through the task scheduler, and the task scheduler can call the computer device according to the task type of the target task and the target task.
  • the corresponding module performs the target task. Therefore, the task scheduler obtains the target task from the task cache pool, and the target task is a task whose predecessor task has been completed and a successor task of the target task is to be executed.
  • the predecessor task task and the successor task are in logic.
  • the target task is a Buffer application task or a Buffer release task
  • the application of the Buffer can be truly postponed to the completion of the execution of the predecessor task of the Buffer application task, and then the computer device passes the task scheduler.
  • the computer device can immediately dispatch the Buffer manager to the Buffer manager in the computer device through the task scheduler when the predecessor task of the Buffer release task is completed. Buffer releases tasks, thereby improving the turnover efficiency of the device memory corresponding to the buffer.
  • the computer device can call a corresponding module in the computer device to execute the target task according to the task group ID and the task type of the target task carried by the task scheduler through the task scheduler, which will be described in detail below with reference to FIG. 6. :
  • the computer device calls a corresponding module in the computer device to execute the target task according to the task group ID carried in the target task and the task type of the target task through the task scheduler.
  • Another embodiment of the data processing method in the embodiment of the present application includes:
  • a computer device obtains a target task from a task buffer pool in the computer device through a task scheduler.
  • the application routine module will call the application programming interface of the task generating device of the heterogeneous computing runtime module in the computer equipment, and then input the corresponding application programming interface parameters Go to the task generating device, and then the task generating device generates a task according to the parameters of the application programming interface, and then puts the generated task into a task buffer pool in the computer device.
  • the computer device can obtain the target task from the task buffer pool in the computer device through the task scheduler.
  • the target task is a task whose predecessor task has been completed and a successor task of the target task to be executed.
  • the predecessor task and the successor task Tasks have a logical order dependency relationship, and the target task carries a dependent task group ID.
  • the computer device determines a task type of the target task through a task scheduler.
  • Step 602 is similar to step 502 of FIG. 5 described above, and details are not described herein again.
  • the computer device sends the target task to the DMA in the computer device through the task scheduler.
  • the computer device determines, through the task scheduler, that the task type of the target task is a memory copy task. Then the computer can send the target task to the DMA in the computer device through the task scheduler, and the DMA can execute the memory copy task.
  • the computer device sends a first notification message to the task scheduler in the computer device through DMA.
  • the computer device releases the dependency relationship of the dependent task on the target task through the task scheduler.
  • Steps 604 and 605 are similar to steps 510 and 511 in FIG. 5 described above, and details are not described herein again.
  • the computer device determines whether there is pre-stored data through the task scheduler, and if yes, executes step 607; if not, executes step 612.
  • the task scheduler can determine whether there is pre-stored data, and if so, execute step 607; if not, execute step 612. It should be noted that the pre-stored data can be data that needs to be read and written after performing heterogeneous computing tasks or data copy tasks. Therefore, before the buffer is released, the task scheduler can determine the pre-stored data, and then The pre-stored data is copied to the target memory.
  • the computer device sends a task for copying the pre-stored data to the DMA in the computer device through the task scheduler.
  • the computer device may generate a task for copying the pre-stored data through the task generating device, and then the task scheduler may send a task for copying the pre-stored data to the DMA through the data transfer transmitter, where the copy
  • the task of pre-stored data carries a storage address of the pre-stored data, a length of the stored data, and an offset of the stored data in a buffer corresponding to the buffer release task. As shown in FIG. 7, FIG. 7 is a buffer offset of the prestored prestore data in the Buffer, a length of the prestore data, and a destination address of the prestore data.
  • the computer device sends a second notification message to the task scheduler in the computer device through the DMA.
  • the DMA may send the second notification message to the task scheduler, where the second notification message is used to instruct the DMA to execute the task of copying the pre-stored data.
  • the computer device sends the target task by using a task scheduler to a buffer manager in the computer device.
  • the task scheduler After the task scheduler receives the second notification message, since the task scheduler can determine at this time that the pre-stored data in the Buffer corresponding to the Buffer release task has been copied to the destination address of the pre-stored data, the task scheduler can report to the Buffer Manager. Send the target task, then the Buffer Manager can release the device memory corresponding to the Buffer in time.
  • the Buffer Manager's Buffer release process please refer to the Buffer Release Process in Figure 4 above. The device memory corresponding to the buffer is released, thereby improving the turnover efficiency of the device memory corresponding to the buffer.
  • the computer device sends a third notification message to the task scheduler in the computer device through the Buffer manager.
  • the computer device releases the dependency relationship of the dependent task on the target task through the task scheduler.
  • Steps 610 to 611 are similar to the foregoing steps 418 to 419 in FIG. 4, and details are not described herein again.
  • the computer device sends the target task to a Buffer manager in the computer device through a task scheduler.
  • the task scheduler can send the target task to the Buffer manager. After receiving the task release information from the Buffer manager, the task scheduler releases the buffer according to the aforementioned process in Figure 4. Execute the Buffer release task.
  • the computer device sends a fourth notification message to the task scheduler in the computer device through the Buffer manager.
  • the computer device releases the dependency relationship between the dependent task and the target task through the task scheduler.
  • Steps 613 to 614 are similar to the foregoing steps 418 to 419 in FIG. 4, and details are not described herein again.
  • the computer device sends a task scheduler to the Buffer manager in the computer device to the target task.
  • the task scheduler may send the target task to the Buffer manager, and then the Buffer manager may perform the Buffer application according to the foregoing Buffer application process in FIG. 4 Application.
  • the computer device sends a fifth notification message to the task scheduler in the computer device through the Buffer manager.
  • the Buffer manager may send a fifth notification message to the task scheduler, where the fifth notification message is used to notify the task scheduler that Buffer has been applied for.
  • the computer device determines whether there is preloaded data through the task scheduler, and if yes, executes step 618; if not, executes step 619.
  • the task scheduler may determine that the Buffer has been successfully applied, and then the task scheduler may determine whether there is preloaded data, and if so, execute step 618; if not, execute step 619. For example, when a subsequent heterogeneous computing task that relies on the buffer needs to read and write data in the device memory corresponding to the buffer, and the data needs to be preloaded into the device memory corresponding to the buffer, then the task scheduler can determine through judgment The pre-loaded data exists to make a data copy for the subsequent corresponding computing unit to perform the heterogeneous computing task.
  • the computer device sends a copy preloaded data task to the Buffer manager in the computer device through the task scheduler.
  • the task scheduler determines that there is preloaded data. At this time, the task scheduler can send a task to the buffer manager to copy the preloaded data, as shown in FIG. 8.
  • the copy preloaded data task includes the source of the preloaded preloaded data. The address, the length of the preloaded preload data, and the offset of the preloaded preload data in the buffer.
  • the computer device releases the dependency relationship of the dependent task on the target task through the task scheduler.
  • the task scheduler can release the dependency relationship between the task that depends on the Buffer application task and the Buffer application task.
  • the computer device sends a sixth notification message to the task scheduler in the computer device through the Buffer manager.
  • the Buffer manager may send a sixth notification message to the task scheduler, where the sixth notification message is used to notify the task scheduler that the copy preload data task is completed.
  • the computer device releases the dependency relationship between the dependent task and the target task through the task scheduler.
  • the task scheduler After the task scheduler receives the sixth notification message, it can determine that the preloaded data copy task is completed, and then the task scheduler can release the dependency relationship between the task that depends on the Buffer application task and the Buffer application task.
  • the computer device obtains the corresponding Buffer entry from the Buffer resource pool in the computer device through the task scheduler according to the dependent task group ID carried by the target task.
  • the task scheduler may obtain a corresponding entry from the Buffer resource pool according to the dependent task group ID carried in the target task. For example, as shown in Table 4, for example, if the dependent task group ID carried in the target task is the ID corresponding to dependent task group 1, then the Buffer entry corresponding to the dependent task group 1 can be determined to be Table 7; or, for example, when the target The ID of the dependent task group carried in the task is the ID corresponding to dependent task group 2, then it can be determined that the Buffer entry corresponding to this dependent task group 2 is shown in Table 9:
  • step 623 The computer device determines whether the buffer memory location corresponding to the target task is local memory through the task scheduler. If so, step 624 is performed; if not, step 627 is performed.
  • the task scheduler may determine whether the buffer memory location corresponding to the target task is local memory. If the buffer memory location is local memory, step 624 is performed; if the buffer memory location is not local memory, step 627 is performed. For example, when the task scheduler determines that the buffer entry corresponding to the dependent task group ID is Table 7, then it can be known that the memory location corresponding to the buffer is local memory 1, so the task scheduler can determine the buffer memory location as local memory.
  • the computer device sends the target task to the computing unit corresponding to the Buffer local memory in the computer device through the task scheduler.
  • the task scheduler determines that the memory location corresponding to the buffer is local memory, then the task scheduler may send the target task to a computing unit corresponding to the buffer local memory, and then, after the computing unit receives the target task, the computing unit may send the target task from The target task obtains the corresponding buffer memory address, and then the computing unit sets the buffer memory address as an implicit parameter of the target task. After the computing unit has set the input parameters of the heterogeneous computing task, it can start executing the Heterogeneous computing tasks.
  • the calculation unit sets the buffer memory address as an implicit parameter of the target task.
  • the implicit parameter may be stored in a preset register address or a preset device memory address.
  • the calculation unit reads the The preset register address or the preset device memory address determines the buffer memory address.
  • the task scheduler can support the buffer allocation management of the local memory of the device. Since the global memory access performance is worse than the local memory, when a heterogeneous computing task requiring higher memory access performance is used for data exchange, it can be applied through The local memory of the device is used to perform the heterogeneous computing task, making full use of the high performance of local memory access performance; the data processing method of this application can support the data exchange buffer to apply for the corresponding memory at any level of memory in the device memory, so it can meet a variety of requirements Device memory scenarios to meet the needs of different application scenarios.
  • the computer device sends a seventh notification message to the task scheduler in the computer device through the buffer local memory corresponding computing unit.
  • the computer device releases the dependency relationship between the dependent task and the target task through the task scheduler.
  • Steps 625 to 626 are similar to steps 517 to 518 in FIG. 5 described above. For details, refer to steps 517 to 518 in FIG. 5, and details are not described herein again.
  • the computer device sends the target task to the computing unit with the smallest load in the computer device through the task scheduler.
  • the task scheduler may determine the computing unit with the smallest current load from the computing units corresponding to the global memory, and then send the target task to the computing unit with the smallest load. Then the computing unit with the smallest load will obtain the corresponding buffer memory address from the target task, and then set the buffer memory address as an implicit parameter of the heterogeneous computing task, and then the heterogeneous computing task can be executed.
  • the computer device sends an eighth notification message to the task scheduler in the computer device through the computing unit with the smallest load.
  • the computer device releases the dependency relationship between the dependent task and the target task through the task scheduler.
  • Steps 628 to 629 are similar to steps 520 to 521 in FIG. 5 described above, and details are not described herein again.
  • the computer device obtains a target task from a task buffer pool in the computer device through a task scheduler, and the target task is a task whose predecessor task has been completed and a successor task of the target task to be executed.
  • the successor task and the successor task logically have an order dependency relationship.
  • the computer device determines the task type of the target task through the task scheduler, and the task scheduler can call the corresponding module according to the task type of the target task and the target task. Perform the target task. Therefore, the task scheduler obtains the target task from the task cache pool, and the target task is a task whose predecessor task has been completed and a successor task of the target task is to be executed.
  • the predecessor task task and the successor task are in logic.
  • the application for the Buffer can be truly postponed until the execution of the predecessor task of the Buffer application task is completed, and the computer device passes the task.
  • the scheduler then calls the Buffer manager in the computer device to execute the Buffer application task; for the release of the Buffer, the computer device can forward to the Buffer manager in the computer device through the task scheduler when the predecessor task of the Buffer release task is completed.
  • the buffer release task is dispatched immediately, thereby improving the turnover efficiency of the device memory corresponding to the buffer.
  • the computer device when the task type of the target task is only a heterogeneous computing task, at this time, the computer device can only create a heterogeneous computing task through the task generating device, and the heterogeneous computing task can carry the relevant information of the buffer. It can carry information about pre-stored data and / or pre-loaded data. Then, the computer device can call the corresponding module in the computer device to perform the corresponding task according to the information carried by the heterogeneous computing task through the task scheduler. The details are described below through the embodiment of FIG. 9.
  • the computer device uses the task scheduler to call the corresponding module in the computer device to perform the task according to the ID of the heterogeneous computing task carried in the heterogeneous computing task.
  • Another embodiment of the processing method includes:
  • the computer device obtains a heterogeneous computing task from a task buffer pool in the computer device through a task scheduler.
  • the application routine module will call the application programming interface of the task generating device of the heterogeneous computing runtime module in the computer equipment, and then input the corresponding application programming interface parameters Go to the task generating device, and then the task generating device generates a heterogeneous computing task according to the parameters of the application programming interface.
  • the Buffer resource pool in the computer device may be a data table with the heterogeneous computing task as a dimension, for example, the Buffer resource pool shown in Table 10 may be used.
  • the task generating device may fill in the Buffer entries of the heterogeneous computing task according to the parameters of the application programming interface, and then create the heterogeneous computing task.
  • the heterogeneous computing task may carry the relevant information of the buffer and may also carry the preloaded data. Relevant information and related information of pre-stored data, where the relevant information of the Buffer may include the memory size of the Buffer and the memory location of the Buffer, etc.
  • the relevant information of the pre-loaded data may include the source address of the pre-loaded data, the length of the pre-loaded data, The offset address of the pre-loaded data in the buffer, etc.
  • the related information of the pre-stored data may include the pre-stored data storage address, the length of the pre-stored data, and the offset address of the pre-stored data in the buffer.
  • the buffer corresponding to heterogeneous computing task 3 has a memory size of 30, a local memory location of 2, and a null address. It should be noted that when the execution of the heterogeneous computing task does not depend on Buffer, then the task generating device does not need to apply for the Buffer entry corresponding to the heterogeneous computing task from the Buffer resource pool in the computer equipment. You need to create the heterogeneous computing task, and then call the corresponding computing unit to execute the heterogeneous computing task.
  • the task scheduler obtains a heterogeneous computing task from a task buffer pool in a computer device.
  • the heterogeneous computing task is a task whose predecessor task has been completed and whose subsequent task is to be executed.
  • the predecessor task and the subsequent task exist in a logical order. Dependencies.
  • the computer device determines whether a buffer needs to be applied through the task scheduler. If yes, execute step 905; if not, execute step 903.
  • the task scheduler When the task scheduler obtains the heterogeneous computing task, it determines whether it is necessary to apply for a buffer. If not, step 905 is performed, and if necessary, step 903 is performed. Specifically, the task scheduler may determine whether there is a corresponding buffer entry according to the ID of the heterogeneous computing task, and the memory address of the buffer entry is a null address.
  • the computer device sends a heterogeneous computing task to the computing unit with the smallest load in the computer device through the task scheduler.
  • the task scheduler After the task scheduler determines that it is not necessary to apply for a buffer, the task scheduler can directly schedule a computing unit with the smallest load to execute the heterogeneous computing task. Therefore, when the task type is only a heterogeneous computing task, the task scheduler does not need to determine the task type, and directly calls the corresponding computing unit to execute the heterogeneous computing task. Therefore, in this application scenario, the task scheduler executes the heterogeneous computing task.
  • the data exchange process is simpler and the processing overhead is smaller.
  • the computer device sends the first notification message to the task scheduler in the computer device through the computing unit with the smallest load.
  • the computing unit with the smallest load After the computing unit with the smallest load finishes executing the heterogeneous computing task, it may send a first notification message to the task scheduler to notify the task scheduler to execute and complete the heterogeneous computing task.
  • the computer device sends a Buffer application task to the Buffer manager in the computer device through the task scheduler.
  • the task generation device in the computer device After the task scheduler determines that it is necessary to apply for a buffer, the task generation device in the computer device generates a buffer application task according to the relevant information of the buffer carried by the heterogeneous computing task, and the buffer application task carries the ID of the heterogeneous computing task, and then The buffer manager in the computer device sends the buffer request task.
  • the computer device executes the buffer application task through the buffer manager.
  • the buffer manager can execute the buffer request task.
  • the specific Buffer application task process is similar to the Buffer application process in FIG. 4 described above, except that in this embodiment, the corresponding Buffer entry is obtained by the ID of the heterogeneous computing task, and the rest of the process is the same as the Buffer in FIG. 4
  • the procedure for the manager to apply for a buffer is similar, and details are not described here again.
  • the computer device sends a second notification message to the task scheduler in the computer device through the Buffer manager.
  • the Buffer manager may send a second notification message to the task scheduler to notify the task scheduler that the Buffer application task execution is completed.
  • the computer device determines whether there is preloaded data through the task scheduler, and if yes, executes step 911; if not, executes step 909.
  • the task scheduler After the task scheduler obtains the heterogeneous computing task, it determines whether there is preloaded data according to the related information of the preloaded data carried by the heterogeneous computing task. If so, step 911 is performed, and if not, step 909 is performed.
  • the preloaded data related information carried by the heterogeneous computing task may include information such as the source address of the preloaded preload data, the length of the preloaded preload data, and the offset of the preloaded preload data in the buffer. For details, see FIG. 8 As shown, FIG. 8 is a schematic diagram of related information of preloaded data.
  • the computer device sends a heterogeneous computing task to the computing unit with the smallest load in the computer device through the task scheduler.
  • the task scheduler can send heterogeneous computing tasks to the computing unit with the least load.
  • the computer device sends a third notification message to the task scheduler in the computer device through the computing unit with the smallest load.
  • Step 910 is similar to the foregoing step 904, and details are not described herein again.
  • the computer device sends the task of copying the preloaded data to the DMA in the computer device through the data transfer transmitter in the computer device through the task scheduler.
  • Step 911 is similar to step 618 in FIG. 6 described above, and details are not described herein again.
  • the computer device receives a fourth notification message sent by the DMA in the computer device through the task scheduler.
  • Step 912 is similar to step 620 in FIG. 6 described above, and details are not described herein again.
  • the computer device determines whether the device memory corresponding to the Buffer in the computer device is a local memory by using the task scheduler. If so, step 914 is performed; if not, step 916 is performed.
  • the computer device sends a heterogeneous computing task to the computing unit corresponding to the local memory in the computer device through the task scheduler.
  • the computer device receives, via the task scheduler, a fifth notification message sent by a computing unit corresponding to the local memory in the computer device.
  • Steps 913 to 915 are similar to steps 623 to 625 in FIG. 6 described above, and details are not described herein again.
  • the computer device sends a heterogeneous computing task to the computing unit with the smallest load in the computer device through the task scheduler.
  • the computer device receives, via the task scheduler, a sixth notification message sent by the computing unit with the smallest load in the computer device.
  • Steps 916 to 917 are similar to steps 627 to 628 in FIG. 6 described above, and details are not described herein again.
  • the computer device determines that there is pre-stored data through the task scheduler, and if yes, executes step 922; if not, executes step 919.
  • the task scheduler determines whether there is pre-stored data according to the heterogeneous computing task. If it exists, it executes step 922, and if it does not exist, executes step 919. Specifically, if the heterogeneous computing task carries relevant information of the pre-stored data, it indicates that it exists. Pre-stored data, then the related information of the pre-stored data may include the storage address of the pre-stored data, the length of the stored data, and the offset of the stored data in the buffer corresponding to the Buffer release task, as shown in FIG. 7 and FIG. 7 is the pre-stored prestore. Buffer offset of the data in the Buffer, the length of the prestore data, and the destination address of the prestore data. If the heterogeneous computing task does not carry the relevant information of the prestored data, it means that there is no prestored data.
  • the computer device sends a Buffer release task to the Buffer manager in the computer device through the task scheduler.
  • the computer device After the task scheduler determines that there is no pre-stored data, the computer device generates a Buffer release task according to the relevant information of the Buffer of the heterogeneous computing task through the task generating device.
  • the Buffer release task carries the ID of the heterogeneous computing task, and then the computer device Send the Buffer release task to the Buffer manager in the computer device through the task scheduler.
  • the computer device executes the buffer release task through the buffer manager.
  • the Buffer manager can obtain the corresponding Buffer entry according to the ID of the heterogeneous computing task, and then the corresponding Buffer release process is similar to the aforementioned Buffer release process in Figure 6, specifically not here More details.
  • the computer device sends a seventh notification message to the task scheduler in the computer device through the Buffer manager.
  • Step 921 is similar to step 613 in FIG. 6 described above, and details are not described herein again.
  • the computer device sends the task of copying the pre-stored data to the DMA in the computer device through the data transfer transmitter in the computer device through the task scheduler.
  • the computer device receives the eighth notification message sent by the DMA in the computer device through the task scheduler.
  • the computer device sends a Buffer release task to the Buffer manager in the computer device through the task scheduler.
  • the computer device sends a ninth notification message to the task scheduler in the computer device through the Buffer manager.
  • Steps 922 to 925 are similar to steps 607 to 610 in FIG. 6 described above, and details are not described herein again.
  • the computer device obtains a heterogeneous computing task from a task buffer pool in the computer device through a task scheduler.
  • the heterogeneous computing task is a task whose predecessor task has been completed and whose subsequent task is to be executed.
  • the heterogeneous computing task and the predecessor task have a logical order dependency relationship.
  • the computer device determines whether to apply for a buffer according to the heterogeneous computing task through the task scheduler.
  • the task scheduler sends a request to the computer device.
  • the Buffer manager in the server sends a Buffer application task; when the heterogeneous computing task execution is completed, the task scheduler sends a Buffer release task to the Buffer manager.
  • a Buffer application it can be truly postponed to the completion of the predecessor task of the Buffer application task, and the computer device can then use the task scheduler to call the Buffer manager in the computer device to execute the Buffer application task; for the Buffer application, The release of the buffer can be advanced to the completion of the predecessor task of the buffer release task.
  • the computer device immediately dispatches the buffer release task to the buffer manager in the computer device through the task scheduler, thereby improving the turnover efficiency of the device memory corresponding to the buffer.
  • the data processing method in the embodiment of the present application is described above, and the computer equipment in the embodiment of the present application is described below. Please refer to FIG. 10, where the first determining unit 1004, the second determining unit 1005, and the first replacing unit 1006
  • the second replacement unit 1007, the judgment unit 1008, the third determination unit 1009, the setting unit 1010, the canceling unit 1011, and the filling unit 1012 are optional units.
  • An embodiment of the computer equipment in this embodiment of the present application includes:
  • a generating unit 1001 is configured to generate a target task, which includes a Buffer application task or a Buffer release task.
  • the target task is a successor task of the first task and a successor task of the second task.
  • the first task and the first task The second task is a to-be-executed task with a sequential dependency relationship.
  • the target task is the Buffer application task
  • the second task uses the Buffer corresponding to the Buffer application task when the second task is executed, and when the target task releases the task for the Buffer.
  • the buffer corresponding to the task is released using the Buffer;
  • An obtaining unit 1002 is configured to obtain a Buffer entry corresponding to the target task according to the target task after the predecessor task of the target task has been completed and before the subsequent task of the target task is executed, and the Buffer entry contains the target task.
  • the execution unit 1003 is configured to execute the target task to request or release a buffer corresponding to the target task.
  • the target task includes the ID of the Buffer corresponding to the target task; the obtaining unit 1002 is specifically configured to:
  • the target task is a Buffer application task
  • the execution unit 1003 is specifically configured to:
  • the target task is a Buffer release task; the execution unit 1003 is specifically configured to:
  • the target task includes a dependent task group ID; the obtaining unit 1002 is specifically configured to:
  • the target task is a Buffer application task; the execution unit 1003 is specifically configured to:
  • the target local memory is determined according to a preset strategy
  • the memory location of the Buffer is set to global memory
  • the target task is a Buffer release task; the execution unit 1003 is specifically configured to:
  • the target task is a Buffer application task; the computer device further includes:
  • a first determining unit 1004 configured to determine that preloaded data exists
  • the generating unit 1001 is further configured to:
  • the execution unit 1003 is further used for:
  • the task of copying the preloaded data is performed.
  • the target task is a Buffer release task; the computer device further includes:
  • the generating unit 1001 is further configured to:
  • the execution unit 1003 is further used for:
  • the task of copying the pre-stored data is performed.
  • the target task is a memory copy task
  • the source address of the data copy corresponding to the memory copy task carried in the target task is a valid memory ID and / or the destination address of the data copy corresponding to the memory copy task is Legal memory ID; the obtaining unit 1002 is also used for:
  • the computer equipment also includes:
  • a first replacement unit 1006, configured to replace a memory ID carried in the target task with a memory address of the buffer in the buffer entry;
  • the execution unit 1003 is further used for:
  • the obtaining unit 1002 is further configured to:
  • the computer equipment also includes:
  • a second replacement unit 1007 configured to replace the memory ID in the input parameter with a memory address of the buffer in the buffer entry
  • a judging unit 1008 configured to judge whether a buffer memory position corresponding to the memory ID is located in a local memory
  • the execution unit 1003 is specifically used for:
  • the heterogeneous computing task is executed according to the local memory.
  • the obtaining unit 1002 is specifically configured to:
  • the computer equipment also includes:
  • a third determining unit 1009 configured to determine that a buffer memory position in the Buffer entry is located in local memory
  • a setting unit 1010 configured to set a buffer memory address in the Buffer entry as an implicit parameter of the heterogeneous computing task
  • the execution unit 1003 is further used for:
  • the heterogeneous computing task is executed according to the local memory.
  • the computer device further includes:
  • a releasing unit 1011 is configured to release a dependency relationship between a task that depends on the target task and the target task.
  • the target task is a Buffer application task; the generating unit 1001 is specifically configured to:
  • the parameters of the application programming interface are parameters generated by the computer device calling the application programming interface of the computer device.
  • the buffer memory address in the buffer entry is an empty address.
  • a buffer application task is generated according to the buffer entry, and the buffer application task includes a memory ID corresponding to the buffer entry.
  • the target task is a Buffer application task; the generating unit 1001 is specifically configured to:
  • the parameters of the application programming interface are parameters generated by the computer device calling the application programming interface of the computer device. Address is empty;
  • the buffer application task is generated according to the buffer entry, and the buffer application task includes a dependent task group ID.
  • the target task is a Buffer release task; the Buffer release task includes a memory ID of a Buffer corresponding to the Buffer release task.
  • the target task is a buffer release task
  • the buffer release task includes a dependent task group ID of a buffer corresponding to the buffer release task.
  • the target task is a Buffer application task; the generating unit 1001 is specifically configured to:
  • the heterogeneous computing task carries relevant information of the buffer corresponding to the target task
  • the heterogeneous computing task is a task generated by the computer device
  • the heterogeneous computing task is a predecessor task of the heterogeneous computing task has been completed
  • the task to be executed subsequent to the heterogeneous computing task the relevant information of the buffer includes the memory size of the buffer corresponding to the heterogeneous computing task, the memory address of the buffer and the memory location of the buffer;
  • the heterogeneous computing task carries relevant information of the buffer corresponding to the target task
  • the heterogeneous computing task is a task generated by the computer device
  • the heterogeneous computing task is a predecessor task of the heterogeneous computing task has been completed
  • the task to be executed subsequent to the heterogeneous computing task the relevant information of the buffer includes the memory size of the buffer corresponding to the heterogeneous computing task, the memory address of the buffer and the memory location of the buffer;
  • the heterogeneous computing task further includes related information of preloaded data, and the related information of the preloaded data includes a source address of the preloaded data, a length of the preloaded data, and a bias of the preloaded data in the buffer. Shift address; the generating unit 1001 is further used for:
  • the execution unit 1003 is further used for:
  • the heterogeneous computing task further includes related information of pre-stored data, and the related information of the pre-stored data includes a storage address of the pre-stored data, a length of the pre-stored data, and an offset address of the pre-stored data in a buffer;
  • the generation Unit 1001 is also used for:
  • the execution unit 1003 is further used for:
  • the computer device further includes:
  • a filling unit 1012 is configured to fill a Buffer entry corresponding to the heterogeneous computing task according to an application programming interface parameter, where the application programming interface parameter is a parameter generated when the computer equipment device calls an application programming interface of the computer equipment;
  • the generating unit 1001 is further configured to:
  • the heterogeneous computing task is generated according to the Buffer entry, and the heterogeneous computing task includes information about the buffer corresponding to the heterogeneous computing task.
  • the generating unit 1001 generates a target task, where the target task includes a Buffer application task or a Buffer release task, and the target task is a successor task of the first task and a successor task of the second task.
  • a task and a second task are to-be-executed tasks that have a sequential dependency relationship.
  • the target task is the Buffer application task
  • the second task uses the Buffer corresponding to the Buffer application task when the second task is executed.
  • the Buffer corresponding to the task is used to release the Buffer corresponding to the task when the first task is executed.
  • the acquisition unit 1002 may The target task obtains a Buffer entry corresponding to the target task, where the Buffer entry is an entry containing the memory size of the buffer corresponding to the target task, the memory location of the Buffer, and the memory address of the Buffer, and then the execution unit 1003 Execute the target task to request or release a buffer corresponding to the target task.
  • the computer device can determine that the execution of the target task is performed by the execution unit 1003 after the execution of the predecessor task of the target task is completed and before the execution of the successor task of the target task, so the execution unit 1003
  • the application for the Buffer can be truly postponed to the completion of the predecessor task of the target task, and before the successor task of the target task is executed, and the release of the buffer by the execution unit 1003 can be advanced to the immediate completion of the predecessor task of the target task. Execution, thereby improving the turnover efficiency of the device memory corresponding to the Buffer.
  • This application also provides a computer device 1100. Please refer to FIG. 11.
  • An embodiment of the computer device in the embodiment of this application includes:
  • the processor 1101, the memory 1102, and the input-output device 1103 are respectively connected to the bus 1104, and the memory stores computer instructions;
  • the processor 1101 is configured to generate a target task, which includes a Buffer application task or a Buffer release task.
  • the target task is a successor task of the first task and a successor task of the second task.
  • the first task and the first task The second task is a to-be-executed task with a sequential dependency relationship.
  • the target task is the Buffer application task
  • the second task uses the Buffer corresponding to the Buffer application task when the second task is executed, and when the target task releases the task for the Buffer.
  • the buffer corresponding to the task is released using the Buffer;
  • the input-output device 1103 is used to obtain a Buffer entry corresponding to the target task according to the target task after the predecessor task of the target task has been completed and before the subsequent task of the target task is executed.
  • the Buffer entry contains the target Entries corresponding to the task's buffer memory size, the memory location of the buffer, and the memory address of the buffer;
  • the processor 1101 is configured to execute the target task to request or release a buffer corresponding to the target task.
  • the target task includes an ID of a Buffer corresponding to the target task; the input / output device 1103 is specifically configured to:
  • the target task is a Buffer application task
  • the processor 1101 is specifically configured to:
  • the target task is a Buffer release task; the processor 1101 is specifically configured to:
  • the target task includes a dependent task group ID; the input / output device 1103 is specifically configured to:
  • the target task is a Buffer application task; the processor 1101 is specifically configured to:
  • the target local memory is determined according to a preset strategy
  • the memory location of the Buffer is set to global memory
  • the target task is a Buffer release task; the processor 1101 is specifically configured to:
  • the target task is a Buffer application task; the processor 1101 is further configured to:
  • the task of copying the preloaded data is performed.
  • the target task is a Buffer release task; the processor 1101 is further configured to:
  • the task of copying the pre-stored data is performed.
  • the source address of the data copy corresponding to the memory copy task carried in the target task is a valid memory ID and / or the data copy corresponding to the memory copy task
  • the destination address is a legal memory ID; the input-output device 1103 is also used for:
  • the processor 1101 is also used for:
  • the input / output device 1103 is further configured to:
  • the processor 1101 is also used for:
  • the heterogeneous computing task is executed according to the local memory.
  • the input / output device 1103 is further configured to:
  • the processor 1101 is also used for:
  • the heterogeneous computing task is executed according to the local memory.
  • processor 1101 is further configured to:
  • the target task is a Buffer application task; the processor 1101 is specifically configured to:
  • the parameters of the application programming interface are parameters generated by the computer device calling the application programming interface of the computer device.
  • the buffer memory address in the buffer entry is an empty address.
  • a buffer application task is generated according to the buffer entry, and the buffer application task includes a memory ID corresponding to the buffer entry.
  • the target task is a Buffer application task; the processor 1101 is specifically configured to:
  • the parameters of the application programming interface are parameters generated by the computer device calling the application programming interface of the computer device. Address is empty;
  • the buffer application task is generated according to the buffer entry, and the buffer application task includes a dependent task group ID.
  • the target task is a Buffer release task; the Buffer release task includes a memory ID of a buffer corresponding to the Buffer release task.
  • the target task is a Buffer release task
  • the Buffer release task includes a dependent task group ID of a Buffer corresponding to the Buffer release task.
  • the target task is a Buffer application task; the processor 1101 is specifically configured to:
  • the heterogeneous computing task carries relevant information of the buffer corresponding to the target task
  • the heterogeneous computing task is a task generated by the computer device
  • the heterogeneous computing task is a predecessor task of the heterogeneous computing task has been completed
  • the task to be executed subsequent to the heterogeneous computing task the relevant information of the buffer includes the memory size of the buffer corresponding to the heterogeneous computing task, the memory address of the buffer and the memory location of the buffer;
  • the target task is a Buffer release task; the processor 1101 is specifically configured to:
  • the heterogeneous computing task carries relevant information of the buffer corresponding to the target task
  • the heterogeneous computing task is a task generated by the computer device
  • the heterogeneous computing task is a predecessor task of the heterogeneous computing task has been completed
  • the task to be executed subsequent to the heterogeneous computing task the relevant information of the buffer includes the memory size of the buffer corresponding to the heterogeneous computing task, the memory address of the buffer and the memory location of the buffer;
  • the heterogeneous computing task further includes related information of preloaded data, and the related information of the preloaded data includes a source address of the preloaded data, a length of the preloaded data, and the preloaded data in the Offset address in Buffer; the processor 1101 is also used for:
  • the heterogeneous computing task further includes related information of pre-stored data, and the related information of the pre-stored data includes a storage address of the pre-stored data, a length of the pre-stored data, and an offset of the pre-stored data in a buffer. Address; the processor 1101 is also used for:
  • processor 1101 is further configured to:
  • the parameters of the application programming interface are parameters generated when the computer equipment device calls the application programming interface of the computer equipment;
  • the heterogeneous computing task is generated according to the Buffer entry, and the heterogeneous computing task includes information about the buffer corresponding to the heterogeneous computing task.
  • the chip when the computer device is a chip in a terminal, the chip includes a processing unit and a communication unit.
  • the processing unit may be a processor, for example, and the communication unit may be an input / output interface. , Pins, or circuits.
  • the processing unit may execute computer execution instructions stored in the storage unit, so that a chip in the terminal executes the data processing method of any one of the first aspects.
  • the storage unit is a storage unit in the chip, such as a register, a cache, etc., and the storage unit may also be a storage unit located outside the chip in the terminal, such as a read-only memory (read -memory (ROM) or other types of static storage devices that can store static information and instructions, random access memory (RAM), etc.
  • ROM read-only memory
  • RAM random access memory
  • the processor mentioned above may be a general-purpose central processing unit (CPU), a microprocessor, an application-specific integrated circuit (ASIC), or one or more for controlling the above.
  • the data processing method of the first aspect is a program executed by an integrated circuit.
  • the computer program product includes one or more computer instructions.
  • the computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices.
  • the computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be from a website site, a computer, a server, or a data center. Transmission via wired (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (such as infrared, wireless, microwave, etc.) to another website site, computer, server, or data center.
  • wired such as coaxial cable, optical fiber, digital subscriber line (DSL)
  • wireless such as infrared, wireless, microwave, etc.
  • the computer-readable storage medium may be any available medium that can be stored by a computer or a data storage device such as a server, a data center, and the like that includes one or more available medium integration.
  • the available medium may be a magnetic medium (for example, a floppy disk, a hard disk, a magnetic tape), an optical medium (for example, a DVD), or a semiconductor medium (for example, a solid state disk (Solid State Disk (SSD)), and the like.
  • the disclosed systems, devices, and methods may be implemented in other ways.
  • the device embodiments described above are only schematic.
  • the division of the unit is only a logical function division.
  • multiple units or components may be combined or Can be integrated into another system, or some features can be ignored or not implemented.
  • the displayed or discussed mutual coupling or direct coupling or communication connection may be indirect coupling or communication connection through some interfaces, devices or units, which may be electrical, mechanical or other forms.
  • the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the objective of the solution of this embodiment.
  • each functional unit in each embodiment of the present application may be integrated into one processing unit, or each of the units may exist separately physically, or two or more units may be integrated into one unit.
  • the above integrated unit may be implemented in the form of hardware or in the form of software functional unit.
  • the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it may be stored in a computer-readable storage medium.
  • the technical solution of the present application is essentially a part that contributes to the existing technology or all or part of the technical solution can be embodied in the form of a software product, which is stored in a storage medium , Including a number of instructions to enable a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present application.
  • the foregoing storage media include: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), magnetic disks or optical disks and other media that can store program codes .

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Abstract

本申请实施例公开了一种数据处理方法。本申请实施例方法包括：计算机设备生成目标任务，目标任务包括Buffer申请任务或者Buffer释放任务，目标任务为第一任务的后继任务，且为第二任务的前继任务，第一任务和第二任务为存在顺序依赖关系的待执行任务，其中，当目标任务为Buffer申请任务时，第二任务执行时使用Buffer申请任务所对应的Buffer，当目标任务为Buffer释放任务时，第一任务执行时使用Buffer释放任务所对应的Buffer；当目标任务的前继任务已完成后且目标任务的后继任务执行前，所述计算机设备根据目标任务获取目标任务对应的Buffer表项，Buffer表项为包含目标任务对应的Buffer的内存大小、Buffer的内存位置以及Buffer的内存地址的表项，并执行目标任务以申请或者释放目标任务所对应的Buffer。

Description

数据处理方法以及计算机设备
本申请要求于2018年5月29日提交中国专利局、申请号为201810571788.X、发明名称为“数据处理方法以及计算机设备”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及通信技术领域，尤其涉及一种数据处理方法以及计算机设备。
背景技术
存储***是指计算机中由存放程序和数据的各种存储设备、控制部件以及管理信息调度的硬件和软件所组成的***，在应用程序运行过程中，会不断涉及到内存分配和释放。
目前，随着人工智能以及大视频等数据密集型的发展，以图形处理为代表的异构计算获得广泛的应用和关注，而在异构计算的过程中涉及到内存的分配和释放，目前异构任务数据交换方式主要是基于设备内存进行数据交换的方式以及通过计算机设备中的缓存管理模块对设备内存的交换数据进行管理，具体的过程为：计算机设备通过应用例程模块申请缓存寄存器Buffer请求，然后Buffer管理模块会同步为该Buffer申请对应的设备内存，然后计算机设备通过应用例程模块再发起依赖于该Buffer的依赖任务，然后计算机设备通过任务调度器再根据该依赖任务调用计算机设备中相应的模块，以使得该相应的模块执行该依赖任务，应用例程模块同步等待该依赖任务执行完成之后，应用例程模块向Buffer管理模块发送释放该Buffer的请求，然后Buffer管理器模块根据该请求释放该Buffer对应的设备内存。
但是，基于设备内存进行数据交换以及计算机设备通过Buffer管理模块对设备内存中的交换数据进行管理的数据交换方式，Buffer在被依赖任务发起前提前申请，那么在计算机设备通过应用例程模块发起该被依赖任务至该被依赖任务执行的过程中，该计算机设备通过Buffer管理模块申请的Buffer处于闲置状态；并且，Buffer的释放只能是在应用例程模块同步等待被依赖任务执行完成之后，从被依赖任务完成至计算机设备中的应用例程模块同步返回之间，该计算机设备通过Buffer管理模块申请的Buffer处于闲置状态，因此，导致了申请的Buffer对应的设备内存的周转效率较低。
发明内容
本申请实施例提供了一种数据处理方法以及计算机设备，用于提高Buffer对应的设备内存的周转效率。
本申请实施例第一方面提供了一种数据处理方法，包括：
当计算机设备在运行过程中，会调用计算机设备的应用程序编程接口，然后根据计算机设备调用该应用程序编程接口产生的参数来生成目标任务，其中，该目标任务可以包括Buffer申请任务或者Buffer释放任务，该目标任务为第一任务的后继任务，且为第二任 务的前继任务，该第一任务与该第二任务为存在顺序依赖关系的待执行任务，其中，当该目标任务为Buffer申请任务时，该第二任务执行时可以使用该Buffer申请任务所对应的Buffer，当该目标任务为Buffer释放任务时，该第一任务执行时可以使用该Buffer释放任务所对应的Buffer；然后，当该目标任务的前继任务已完成且该目标任务的后继任务执行前，该计算机设备可以根据该目标任务获取该目标任务所对应的Buffer表项，其中，该Buffer表项包含有该目标任务所对应的Buffer的内存大小、该Buffer的内存位置以及该Buffer的内存地址的表项，然后，该计算机设备可以执行该目标任务实现申请或者释放该目标任务所对应的Buffer。
本实施例中，计算机设备在对Buffer申请或者Buffer释放之前，计算机设备可以确定目标任务的前继任务执行完成之后，且目标任务的后继任务执行前，计算机设备才会执行该目标任务，所以计算机设备对该Buffer申请可以真正延后至目标任务的前继任务执行完成之后，且目标任务的后继任务执行前，以及计算机设备对该Buffer的释放可以提前至该目标任务的前继任务完成后立即执行，从而提高了Buffer对应的设备内存的周转效率。
一种可能的实现方式中，该目标任务可以包含有该目标任务所对应的Buffer的内存身份标识(identity，ID)；该计算机设备根据该目标任务获取该目标任务对应的Buffer表项可以包括：该计算机设备根据该内存ID获取该目标任务所对应的Buffer表项。在该可能的实现方式中，提供了一种具体的该计算机设备获取该目标任务所对应的Buffer表项的具体获取方式，在实际应用当中，提升了方案的可实现性和实用性。
另一种可能的实现方式中，该目标任务可以为Buffer申请任务；该计算机设备执行该目标任务以申请或者释放该目标任务的Buffer可以包括：首先，该计算机设备可以从该Buffer表项当中确定该Buffer的内存大小以及该Buffer的内存位置；然后，计算机设备可以根据该Buffer的内存大小和该Buffer的内存位置为该Buffer确定对应的设备内存；计算机设备可以根据该设备内存更新该Buffer表项中的Buffer的内存地址。在该可能的实现方式中，提供了一种具体的计算机设备执行Buffer申请任务的具体执行方式，在实际应用中，提高了方案的可执行性。
另一种可能的实现方式中，该目标任务可以为Buffer释放任务；该计算机设备执行该目标任务以申请或者释放该目标任务的Buffer可以包括：首先，该计算机设备可以从Buffer表项中确定该目标任务所对应的Buffer的内存地址，然后，该计算机设备可以释放该Buffer的内存地址对应的设备内存，再将该Buffer表项删除。在该可能的实现方式中，提供了一种具体的该计算机设备执行Buffer释放任务的具体执行方式，在实际应用中，提升了方案的可操作性和完整性。
另一种可能的实现方式中，该目标任务可以包含有依赖任务组ID；该计算机设备根据该目标任务获取该目标任务所对应的Buffer表项可以包括：该计算机设备根据该依赖任务组ID获取该目标任务所对应的Buffer表项。在该可能的实现方式中，提供了另一种计算机设备获取该目标任务所对应的Buffer表项的获取方式，在实际应用中，提升了方案的可实现性，增加了方案的多样性。
另一种可能的实现方式中，该目标任务可以为Buffer申请任务；该计算机设备执行该 目标任务以申请或者释放该目标任务所对应的Buffer可以包括：首先，该计算机设备可以判断该Buffer表项中的该目标任务对应的Buffer的内存位置是否位于局部内存；如果该Buffer的内存位置位于局部内存，那么该计算机设备可以根据预设的策略确定目标局部内存；然后该计算机设备可以根据目标局部内存更新该Buffer表项中的该Buffer的内存地址以及该Buffer的内存位置；如果该Buffer的内存位置不位于局部内存，那么该计算机设备可以将该Buffer的内存位置设置为全局内存，然后计算机设备可以根据该全局内存更新该Buffer表项中的该Buffer的内存地址以及该Buffer的内存位置。在该可能的实现方式中，提供了另一种计算机设备执行Buffer申请任务的执行方式，在实际应用中，增加了方案的多样性和实用性。
另一种可能的实现方式中，该目标任务可以为Buffer释放任务；该计算机设备执行该目标任务以申请或者释放该目标任务所对应的Buffer可以包括：首先，该计算机设备可以确定该Buffer表项中该目标任务对应的Buffer的内存地址；然后该计算机设备可以释放该Buffer的内存地址对应的设备内存，再将该Buffer表项中的Buffer的内存地址设置为空地址。在该可能的实现方式中，提供了另一种计算机设备执行Buffer释放任务的执行方式，在实际应用过程中，提升了方案的多样性和实用性。
另一种可能的实现方式中，该目标任务可以为Buffer申请任务；在该计算机设备根据该目标任务获取该目标任务所对应的Buffer表项，并执行该目标任务以申请或者释放该目标任务所对应的Buffer之后，该方法还可以包括：首先，该计算机设备可以确定存在预加载数据，然后该计算机设备可以生成拷贝该预加载数据的任务，再执行该拷贝该预加载数据的任务。在该可能的实现方式中，计算机设备执行完成该Buffer申请任务之后，还可以通过确定存在预加载数据，再将预加载数据拷贝至目标位置中，因此，在实际应用过程中，提升了方案的完善度以及可操作性。
另一种可能的实现方式中，该目标任务可以为Buffer释放任务；在该计算机设备根据该目标任务获取该目标任务所对应的Buffer表项，并执行该目标任务以申请或者释放该目标任务所对应的Buffer之后，该方法还可以包括：首先，该计算机设备可以确定存在预存数据，然后，该计算机设备可以生成拷贝该预存数据的任务，再执行该拷贝预存数据的任务。在该可能的实现方式中，该计算机设备执行Buffer释放任务之前，可以确定存在预存数据，然后将预存数据拷贝至目标位置，因此，在实际应用过程中，提升了方案的完整性和实用性。
另一种可能的实现方式中，如果该目标任务为内存拷贝任务，该目标任务中携带有该内存拷贝任务对应的数据拷贝的源地址为合法的内存ID和/或该内存拷贝任务对应的数据拷贝的目的地址为合法的内存ID，那么该方法还可以包括：首先，该计算机设备可以根据该内存ID获取该内存ID对应的Buffer表项，然后，该计算机设备可以将该目标任务中携带的内存ID更换为该Buffer表项中的该Buffer的内存地址，再执行该内存拷贝任务。在该可能的实现方式中，当该目标任务为内存拷贝任务，且该内存拷贝任务中携带有合法的内存ID，提供了一种具体的计算机设备执行该内存拷贝任务的具体执行方式，在实际应用过程中，提升了方案的可实现性和完整性。
另一种可能的实现方式中，如果该目标任务为异构计算任务，并且该目标任务的输入参数中包含有合法的内存ID；该方法可以包括：首先，该计算机设备可以根据该内存ID获取该内存ID对应的Buffer表项；然后，该计算机设备可以将该输入参数中的内存ID更换为该Buffer表项中的该Buffer的内存地址；然后计算机设备可以判断该内存ID对应的Buffer内存位置是否位于局部内存，如果该内存ID对应的Buffer内存位置位于局部内存，那么计算机设备可以根据该局部内存执行该异构计算任务。在该可能的实现方式中，当该目标任务为异构计算任务时，且该异构计算任务中包含有合法的内存ID，提供了一种具体的计算机设备执行该异构计算任务的执行过程，并且，该计算机设备通过任务调度器可以根据局部内存来执行该异构计算任务，由于局部内存的访存性能要优于全局内存，因此计算机设备执行异构计算任务读写访问数据的效率更高，通过本申请的数据处理方法，充分利用了局部内存的访问性能较高的性能，满足了多样化的设备内存应用场景，在实际应用过程中，提升了方案的可实现性以及实用性。
另一种可能的实现方式中，如果该目标任务为异构计算任务，并且该目标任务中包含有依赖任务组ID；该方法还可以包括：首先，该计算机设备可以获取该依赖任务组ID对应的Buffer表项；然后，该计算机设备可以确定该Buffer表项中的Buffer内存位置位于局部内存；计算机设备将该Buffer表项中的Buffer内存地址设置为该异构计算任务的隐式参数，然后再根据该局部内存执行该异构计算任务。在该可能的实现方式中，当该目标任务为异构计算任务，且该异构计算任务携带有依赖任务组ID时，提供了另一种具体的计算机设备执行异构计算任务的执行过程，该计算机设备通过任务调度器可以根据局部内存来执行该异构计算任务，由于局部内存的访存性能要优于全局内存，因此计算机设备执行异构计算任务读写访问数据的效率更高，通过本申请的数据处理方法，充分利用了局部内存的访问性能较高的性能，满足了多样化的设备内存应用场景，在实际应用的过程中，提升了方案的多样性和实用性。
另一种可能的实现方式中，在该计算机设备根据该目标任务获取该目标任务对应的Buffer表项，并执行该目标任务以申请或者释放该目标任务所对应的Buffer之后，该方法还可以包括：该计算机设备可以解除依赖于该目标任务的任务与该目标任务的依赖关系。在该可能的实现方式中，计算机设备执行完成该目标任务之后，可以解除被依赖任务与目标任务的依赖关系，在实际应用中，提供了一种具体的计算机设备如何确定目标任务的前继任务与后继任务的执行情况的方式，提升了方案的可实现性。
另一种可能的实现方式中，该目标任务可以为Buffer申请任务；该计算机设备生成该目标任务可以包括：首先，该计算机设备可以为该目标任务所对应的Buffer申请Buffer表项以及该Buffer表项对应的内存ID；然后，该计算机设备可以根据该应用程序编程接口参数填写该Buffer表项，其中，该应用程序编程接口参数为该计算机设备调用该计算机设备的应用程序编程接口产生的参数，其中，该Buffer表项中的Buffer内存地址为空地址；然后，该计算机设备可以根据该Buffer表项生成Buffer申请任务，其中，该Buffer申请任务包含有该Buffer表项对应的内存ID。在该可能的实现方式中，提供了一种具体的计算机设备生成目标任务的具体方式，在实际应用当中，提升了方案的可实现性。
另一种可能的实现方式中，该目标任务可以为Buffer申请任务；该计算机设备生成该目标任务可以包括：首先，该计算机设备可以根据应用程序编程接口参数填写依赖任务组ID对应的Buffer表项，该应用程序编程接口参数为该计算机设备调用该计算机设备的应用程序编程接口产生的参数，其中，该Buffer表项中Buffer的内存地址为空地址；然后，该计算机设备可以根据该Buffer表项生成Buffer申请任务，该Buffer申请任务包含有依赖任务组ID。在该可能的实现方式中，提供了另一种具体的计算机设备生成目标任务的具体方式，在实际应用当中，提升了方案的多样性和实用性。
另一种可能的实现方式中，该目标任务可以为Buffer释放任务；该Buffer释放任务包含有该Buffer释放任务对应的Buffer的内存ID。在该可能的实现方式中，该Buffer释放任务携带有该Buffer释放任务对应的Buffer的内存ID，用于后续计算机设备根据该内存ID来执行该Buffer释放任务，在实际应用过程中，提升了方案的可实现性。
另一种可能的实现方式中，该目标任务可以为Buffer释放任务；该Buffer释放任务包含有该Buffer释放任务对应的Buffer的依赖任务组ID。在该可能的实现方式中，该Buffer释放任务携带有该Buffer释放任务对应的Buffer的依赖任务组ID，用于后续计算机设备根据该依赖任务组ID来执行该Buffer释放任务，在实际应用过程中，提升了方案的多样性和可实现性。
另一种可能的实现方式中，该目标任务为Buffer申请任务；该计算机设备生成该目标任务可以包括：首先，该计算机设备可以确定该异构计算任务中携带有该目标任务所对应的Buffer的相关信息，其中，该异构计算任务为该计算机设备生成的任务，该异构计算任务为异构计算任务的前继任务已完成，且该异构计算任务的后继任务待执行的任务，该Buffer的相关信息包括该异构计算任务所对应的Buffer的内存大小、该Buffer的内存地址以及该Buffer的内存位置；然后，该计算机设备可以根据该Buffer的相关信息填写该异构计算任务所对应的Buffer表项，再根据该Buffer表项生成Buffer申请任务。在该可能的实现方式中，该计算机设备可以根据异构计算任务中携带的信息来生成Buffer申请任务，提供了另一种计算机设备生成Buffer申请任务的生成方式，在实际应用过程中，提升了方案的多样性。
另一种可能的实现方式中，该目标任务可以为Buffer释放任务；该计算机设备生成该目标任务可以包括：首先，该计算机设备可以确定该异构计算任务中携带有该目标任务所对应的Buffer的相关信息，该异构计算任务为该计算机设备生成的任务，该异构计算任务为异构计算任务的前继任务已完成，且该异构计算任务的后继任务待执行的任务，该Buffer的相关信息可以包括异构计算任务所对应的Buffer的内存大小、该Buffer的内存地址以及该Buffer的内存位置；然后，该计算机设备可以获取该目标任务所对应的Buffer表项，再根据该Buffer表项生成Buffer释放任务。在该可能的实现方式中，提供了另一种计算机设备生成Buffer释放任务的生成方式，在实际应用中，提升了方案的多样性。
另一种可能的实现方式中，该异构计算任务该可以包含有预加载数据的相关信息，该预加载数据的相关信息可以包括预加载数据的源地址、预加载数据数据长度以及预加载数据在该Buffer中的偏移地址；在该计算机设备根据该目标任务获取该目标任务对应的 Buffer表项，并执行该目标任务以申请或者释放该目标任务所对应的Buffer之后，该方法还可以包括：计算机设备可以根据该预加载数据的相关信息生成拷贝该预加载数据的任务，然后再执行该拷贝该预加载数据的任务。在该可能的实现方式中，提供了另一种计算机设备确定预加载数据以及执行拷贝预加载数据至目标位置的方法，在实际应用中，提升了方案的多样性。
另一种可能的实现方式中，该异构计算任务还可以包含有预存数据的相关信息，该预存数据的相关信息可以包括该预存数据的保存地址、预存数据长度以及该预存数据在Buffer中的偏移地址；在该计算机设备根据该目标任务获取该目标任务对应的Buffer表项，并执行该目标任务以申请或者释放该目标任务所对应的Buffer之后，该方法还可以包括：首先，该计算机设备可以根据该预存数据的相关信息生成拷贝该预存数据的任务；然后，该计算机设备执行拷贝该预存数据的任务。在该可能的实现方式中，提供了另一种计算机设备确定预存数据以及执行拷贝预存数据至目标位置的方法，在实际应用中，提升了方案的多样性和实用性。
另一种可能的实现方式中，该计算机设备确定异构计算任务中携带有该目标任务所对应的Buffer的相关信息之前，该方法还可以包括：该计算机设备可以根据应用程序编程接口参数填写该异构计算任务所对应的Buffer表项，其中，该应用程序编程接口参数为该计算机设备调用该计算机设备的应用程序编程接口时产生的参数；然后，该计算机设备可以根据该Buffer表项生成该异构计算任务，其中，该异构计算任务包含有该异构计算任务所对应的Buffer的相关信息。在该可能的实现方式中，提供了一种具体的计算机设备生成异构计算任务的具体生成方式，在实际应用的过程中，提升了方案的可实现性和完整性。
本申请实施例第二方面提供了一种计算机设备，该计算机设备具有实现上述第一方面计算机设备行为的功能，该功能可以通过硬件实现，也可以通过硬件执行相应的软件实现。该硬件或软件包括一个或多个与上述功能对应的模块。
本申请实施例中第三方面提供了一种计算机设备，该计算机设备包括：处理器、存储器、输入输出设备以及总线；该处理器、存储器、输入输出设备分别与该总线相连，该存储器中存储有计算机指令；该处理器在执行该存储器中的计算机指令时，该存储器中存储有计算机指令；该处理器在执行该存储器中的计算机指令时，用于实现如第一方面任意一种实现方式。
本申请实施例第四方面提供了一种芯片***，该芯片***包括处理器，用于支持网络设备实现上述第一方面中所涉及的功能，例如，例如发送或处理上述方法中所涉及的数据和/或信息。在一种可能的设计中，所述芯片***还包括存储器，所述存储器，用于保存网络设备必要的程序指令和数据。该芯片***，可以由芯片构成，也可以包括芯片和其他分立器件。
本申请实施例第五方面提供了一种包括指令的计算机程序产品，其特征在于，当其在计算机上运行时，使得该计算机执行如第一方面中任一种的实现方式。
本申请实施例第六方面提供了一种计算机可读存储介质，其特征在于，包括指令，当该指令在计算机上运行时，使得计算机执行如第一方面中任一种实现方式。
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图1-A为本申请实施例中的一种应用场景***框架示意图；
图1-B为本申请实施例中数据处理方法一种应用场景示意图；
图2为本申请实施例中数据处理方法的一种实施例示意图；
图3为本申请实施例中数据处理方法的另一种实施例示意图；
图4为本申请实施例中数据处理方法的另一种实施例示意图；
图5为本申请实施例中数据处理方法的另一种实施例示意图；
图6为本申请实施例中数据处理方法的另一种实施例示意图；
图7为本申请实施例中数据处理方法的另一种应用场景示意图；
图8为本申请实施例中数据处理方法的另一种应用场景示意图；
图9为本申请实施例中数据处理方法的另一种实施例示意图；
图10为本申请实施例中计算机设备的一种结构示意图；
图11为本申请实施例中计算机设备的另一种结构示意图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。
本发明的说明书和权利要求书及上述附图中的术语“第一”、“第二”、“第三”、“第四”等(如果存在)是用于区别类似的对象，而不必用于描述特定的顺序或先后次序。应该理解这样使用的数据在适当情况下可以互换，以便这里描述的实施例能够以除了在这里图示或描述的内容以外的顺序实施。此外，术语“包括”和“具有”以及他们的任何变形，意图在于覆盖不排他的包含，例如，包含了一系列步骤或单元的过程、方法、***、产品或设备不必限于清楚地列出的那些步骤或单元，而是可包括没有清楚地列出的或对于这些过程、方法、产品或设备固有的其它步骤或单元。
本申请实施例提供了一种数据处理方法以及计算机设备，用于提高Buffer对应的设备内存的周转效率。
请参阅图1-A，图1-A为本申请实施例提供的一个应用场景***框架示意图，其中，在图1-A为本申请实施例中计算机设备的一种***架构，其中计算机设备可以为异构计算***架构，也可以为同构计算***架构，具体本申请不做限定。下面仅以图1-A的异构计算***架构为例进行介绍，其中，该计算机设备包括主机Host***和从机***，该主机***和从机***之间通过总线Bus连接，该总线Bus用于连接主机***和从机***，支持主机***和从机***直接进行数据访问等功能。其中，该Host***中包括中央处理器(central processing unit，CPU)、主机内存、直接内存访问(direct memory access，DMA)等硬件模块以及异构计算运算时模块和应用例程模块等软件模块。其中，该CPU用于执行异构计算运行时模块以及应用例程模块的程序；该主机内存用于存储CPU中执行的程 序代码等；DMA用于在该异构计算***中进行数据交换时对数据拷贝；该从机***包括设备计算单元以及内存装置，其中，内存单元分包括设备局部内存和设备全局内存。该计算单元用于执行异构计算任务；该设备局部内存为该局部内存对应的计算单元读写访问的内存区域；该设备全局内存为该从机***中所有计算单元都可以读写访问的内存区域。该异构计算运行时模块用于提供对设备异构计算以及相关功能的软件编程控制接口，比如主机内存与设备全局内存之间的数拷贝、异构任务的发起等。应用例程模块用于调用异构计算运行时模块的应用程序编程接口进行异构编程，以实现特定领域的计算需求。
在异构计算***架构中，目前是基于设备全局内存进行异构任务数据交换，由于现有当中采用Buffer同步申请以及Buffer异步使用的机制，导致了Buffer对应的设备内存周转效率低下的问题，对此本申请提供了一种数据处理方法，用于提高Buffer对应的设备内存的周转效率。
其中，该计算机设备中的异构计算运行时模块与计算机设备中的应用例程模块相连接，该计算机设备中的异构计算运行时模块包括多个子模块，具体请参阅图1-B，图1-B为异构计算运行时模块中包括任务生成装置、任务缓存池、任务调度器、数据拷贝发射器、异构计算发射器、Buffer管理器以及Buffer资源池。
其中，任务生成装置用于通过应用例程模块调用返回的应用程序编程接口参数来生成相应的任务，然后将生成的任务放入任务缓存池中。任务缓存池用于接收并缓存任务生成装置根据应用例程模块输入的应用程序编程接口参数生成的任务，可以包括数据拷贝任务、异构计算任务、Buffer申请任务或者Buffer释放任务等，每个任务包含有对其他任务的依赖信息。
任务调度器用于从任务缓存池选择已解除与其他任务的依赖关系的任务，并调度提交给相应的模块执行该任务等功能。该数据拷贝发射器用于接收任务调度器派发的数据拷贝任务，并通过相应的硬件驱动提交给DMA进行数据的搬移。该异构计算发射器用于接收任务调度器派发的异构计算任务，并通过该异构计算发射器调用相应的计算单元执行该异构计算任务。
Buffer管理器用于接收任务调度器派发的Buffer申请任务或者Buffer释放任务，其中，该Buffer申请任务或者Buffer释放任务的前继任务已完成，且其后继任务待执行，该前继任务与该后继任务在逻辑上存在顺序依赖关系，实现对用于数据交换的Buffer的申请或者释放，并更新Buffer资源池；该Buffer资源池用于存储每个Buffer的相关信息，以供任务调度器查询每个Buffer的相关信息。通过任务调度器向Buffer管理器派发Buffer申请任务或者Buffer释放任务，而且是在任务调度器确定该Buffer申请任务或者该Buffer释放任务的前继任务已完成且后继任务待执行的情况下，任务调度器才会向Buffer管理器派发该Buffer申请任务或者Buffer释放任务，从而提高Buffer对应的设备内存的周转效率。
下面对本申请实施例中的“关键词”进行解释说明，方便读者理解：
前继任务：对于某一任务或者某些任务，只有在该任务执行完成后，该某一任务或者某些任务才能执行，两者在逻辑上存在顺序依赖关系，该任务为该某一任务的前继任务； 比如，前继任务为拷贝数据任务，该某一任务为异构计算任务，且该异构计算任务执行时需要用户该拷贝数据任务拷贝至目标地址的数据，所以该拷贝数据任务为该异构计算任务的前继任务。再举例说明，某一任务为Buffer释放任务，异构计算任务的执行需要使用该Buffer释放任务所对应的Buffer，那么可知该异构计算任务为该Buffer释放任务的前继任务。
后继任务：假设第一任务，只有在该第二任务执行完成后，该第一任务才能执行，两者在逻辑上存在顺序依赖关系，则该第一任务为该第二任务的后继任务。例如：第一任务为Buffer释放任务，第一任务为异构计算任务，该异构计算任务执行时依赖于该Buffer释放任务所对应的Buffer，所以可知，该只有该异构计算任务执行完成后，该Buffer释放任务才能执行，所以该异构计算任务为该Buffer释放任务的后继任务。
顺序依赖关系：指任务与任务之间在执行过程中存在逻辑上的先后执行顺序的关系，比如，异构计算任务执行时依赖于Buffer申请的内存，那么该Buffer申请任务与该异构计算任务存在顺序依赖关系。
目标任务：该任务为其前继任务已完成，且该任务的后继任务执行前的任务，该前继任务与该后继任务存在顺序依赖关系；比如，该目标任务为Buffer申请任务，该目标任务的后继任务为异构计算任务，该目标任务的前继任务为内存拷贝任务，该异构计算任务的执行需要使用该Buffer对应的内存，该Buffer申请任务需要在执行该内存拷贝任务之后才能执行，因此该内存拷贝任务为该Buffer申请任务的前继任务，所以该异构计算任务要执行时，必须要在该Buffer已经申请好后才能执行。
Buffer资源池：用于存储每个Buffer的相关信息的数据表，Buffer的相关信息包括Buffer的内存大小、该Buffer的内存地址以及该Buffer的内存位置等。
依赖任务组：应用例程模块指定的逻辑上存在顺序依赖关系的若干个任务。
下面从计算机设备的角度来对本申请实施例中数据处理方法进行介绍，请参阅图2，本申请实施例中数据处理方法的一个实施例包括：
201、计算机设备生成目标任务。
当计算机设备通过应用例程模块运行代码的过程中，会调用计算机设备的应用程序编程接口，然后通过该应用例程模块向该计算机设备中的该应用程序编程接口输入相应的参数，那么该计算机设备可以根据该参数生成目标任务，其中，该目标任务可以包括Buffer申请任务或者Buffer释放任务，该目标任务为第一任务的后继任务，且为第二任务的前继任务，该第一任务和第二任务为存在顺序依赖关系的待执行任务，其中，当该目标任务为Buffer申请任务的时候，该第二任务执行时使用该Buffer申请任务所对应的Buffer，当该目标任务为该Buffer释放任务时，该第一任务执行时使用该Buffer释放任务所对应的Buffer。
需要说明的是，该计算机设备生成目标任务可以是计算机设备根据计算机设备中的应用例程模块调用计算机设备的应用程序编程接口时输入的参数来生成目标任务，也可以是计算机设备获取到已生成的异构计算任务，且该异构计算任务的前继任务已完成，其后继任务待执行，那么计算机设备可以根据该异构计算任务中携带的Buffer的相关信息来生成 目标任务，本申请对此不做限定。
202、当该目标任务的前继任务已完成且该目标任务的后继任务执行前，该计算机设备根据该目标任务获取该目标任务所对应的Buffer表项。
计算机设备在生成该目标任务之后，当该目标任务的前继任务已完成，并且该目标任务的后继任务执行前，该计算机设备可以根据该目标任务来获取该目标任务所对应的Buffer表项。具体的，该计算机设备可以根据该目标任务中携带的Buffer的内存ID从计算机设备中的Buffer资源池中获取该内存ID的Buffer表项，也可以是该计算机设备根据该目标任务中携带的依赖任务组ID从计算机设备中的Buffer资源池中获取该依赖任务组ID的Buffer表项，还可以是计算机设备根据异构计算任务从该计算机设备的Buffer资源池中获取该异构计算任务所对应的Buffer表项，具体本申请对此不做限定。
203、计算机设备执行该目标任务以申请或者释放该目标任务所对应的Buffer。
计算机设备获取到该Buffer表项之后，可以执行该目标任务，从而实现申请或者释放该目标任务所对应的Buffer。具体可以是当该目标任务为Buffer申请任务时，该计算机设备可以根据该Buffer表项确定Buffer的内存大小以及内存位置，然后根据该内存大小以及内存位置为该Buffer申请对应的设备内存，然后将该设备内存的内存地址填写到该Buffer表项中；当Buffer释放任务时，该计算机设备可以根据该Buffer表项确定该Buffer的设备内存，然后将该Buffer对应的设备内存释放，在该计算机设备将该Buffer所对应的设备内存释放完成后，该计算机设备可以将该Buffer表项删除，而当该目标任务为依赖任务组中的一个任务时，则计算机设备可以将该Buffer表项中的内存地址设置为空地址，具体可以根据Buffer资源池的结构所决定后续执行目标任务的过程。
本申请实施例中，计算机设备生成目标任务，其中，该目标任务包括Buffer申请任务或者Buffer释放任务，该目标任务为第一任务的后继任务，且为第二任务的前继任务，该第一任务和第二任务为存在顺序依赖关系的待执行任务，其中，当该目标任务为该Buffer申请任务的时候，该第二任务执行时使用该Buffer申请任务所对应的Buffer，当该目标任务为该Buffer释放任务时，该第一任务执行时使用该Buffer释放任务所对应的Buffer，当该目标任务的前继任务已完成后且该目标任务的后继任务执行前，该计算机设备可以根据该目标任务获取该目标任务对应的Buffer表项，其中，该Buffer表项为包含该目标任务对应的Buffer的内存大小、该Buffer的内存位置以及该Buffer的内存地址的表项，然后该计算机设备执行该目标任务以申请或者释放该目标任务所对应的Buffer。因此，计算机设备在对Buffer申请或者Buffer释放之前，计算机设备可以确定目标任务的前继任务执行完成之后，且目标任务的后继任务执行前，计算机设备才会执行该目标任务，所以计算机设备对该Buffer申请可以真正延后至目标任务的前继任务执行完成之后，且目标任务的后继任务执行前，以及计算机设备对该Buffer的释放可以提前至该目标任务的前继任务完成后立即执行，从而提高了Buffer对应的设备内存的周转效率。
下面结合图1-B中该计算机设备中的异构运行时模块中的每个模块来具体介绍本申请实施例的数据处理方法，将计算机设备执行的具体过程细致到具体的模块的执行过程。
本申请实施例中，在Buffer的申请过程中，该计算机设备中的Buffer管理器在确定 所需要申请的Buffer的内存位置位于局部内存时，该Buffer管理器可以根据预设的策略确定目标局部内存，具体可以是Buffer管理器可以直接对应的局部内存作为该Buffer的内存地址，也可以是Buffer管理器根据该局部内存对应的计算单元的负载情况或者局部内存的空闲情况来确定目标局部内存，具体此处不做限定。在后续的实施例中，仅以该Buffer管理器根据计算单元的负载情况以及局部内存的空闲情况来确定目标局部内存为例进行说明。
在本申请实施例中，计算机设备中的任务调度器获取到异构计算任务之后，当该任务调度器根据该异构计算任务确定该异构计算任务对应的Buffer的内存位置不位于局部内存时，此时任务调度器可以从全局内存对应的计算单元中选取一个目标计算单元来执行该异构计算任务，具体可以是任务调度器根据计算单元的负载量情况选取一个负载量最小的计算单元来执行该异构计算任务，任务调度器还可以根据其他策略选择目标计算单元，具体此处不做限定，在后续实施例中，仅以任务调度器选取负载量最小的计算单元来执行该异构计算任务为例进行说明。
本申请实施例中，计算机设备中的Buffer资源池中Buffer表项可以是以Buffer为维度的数据表，计算机设备中的应用例程模块调用计算机设备中的任务生成装置中的应用程序接口，然后将相应的应用程序编程接口参数输入该任务生成装置，比如当应用例程模块调用任务生成装置发起申请Buffer任务，此时该应用例程模块会将该申请Buffer任务的参数输入到任务生成装置中，然后任务生成装置可以在Buffer资源池中申请Buffer表项，然后根据应用程序接口参数填写该Buffer表项，并创建Buffer申请任务，并且该Buffer申请任务中携带有该Buffer的内存ID，然后任务生成装置将创建的Buffer申请任务放入计算机设备中的任务缓存池当中，并返回内存ID至应用例程模块；或者任务生成装置在Buffer资源池中创建Buffer释放任务，并将该Buffer释放任务放入该任务缓存池中，该Buffer释放任务包含有该对应Buffer的内存ID；因此，后续Buffer管理器可以根据该Buffer申请任务信息中的内存ID来对执行该Buffer申请任务或者该Buffer释放任务。另外，Buffer资源池中的Buffer表项可以是以依赖任务组为维度的数据表，任务生成装置在Buffer资源池中申请Buffer表项，然后根据应用例程模块调用任务生成装置时输入的应用程序接口参数填写该Buffer表项，并创建Buffer申请任务，该Buffer申请任务中携带有依赖任务组ID，任务生成装置将创建的Buffer申请任务放入任务缓存池当中；或者任务生成装置在Buffer资源池中创建Buffer释放任务，并将该Buffer释放任务加入该任务缓存池中，该Buffer释放任务包含有该依赖任务组ID；因此，后续Buffer管理器可以根据该Buffer申请任务中的依赖任务组ID来执行该Buffer申请任务或者该Buffer释放任务。
在本申请实施例中，顺序依赖关系可以是以多种方式体现，例如，第一种方式：在计算机设备中的任务生成装置生成目标任务时，在该目标任务当中携带有任务与任务的依赖关系，与现有技术当中任务与任务之间的依赖关系一致的原理；第二种方式：计算机设备中的任务生成装置生成目标任务，该目标任务中携带有相应的标识，通过标识的类型来确定与哪个任务有关，例如，异构计算任务中携带标识1，而Buffer申请任务携带标识2， 此时，在该计算机设备预设机制为携带标识1的任务与携带标识2的任务存在逻辑上先后执行顺序。对此本申请不做限定，在后续的实施例中，仅以该第一种方式为例进行说明。
本申请实施例中，计算机设备通过Buffer管理器可以根据计算机设备中的任务调度器发送的目标任务对应的Buffer的内存ID从计算机设备中的Buffer资源池中获取对应的Buffer表项，并根据该目标任务以及该Buffer表项来执行目标任务，其中，该目标任务为Buffer申请任务或者Buffer释放任务，下面通过图3进行详细描述：
请参阅图3，在图3的实施例中，计算机设备通过Buffer管理器根据该内存ID从计算机设备中的Buffer资源池中获取对应的Buffer表项，然后该Buffer管理器根据该目标任务的任务类型以及该Buffer表项来执行目标任务，本申请实施例中数据处理方法的另一个实施例包括：
301、计算机设备通过任务调度器从计算机设备中的任务缓存池获取目标任务。
计算机设备中的应用例程模块在运行过程中，会调用计算机设备中的异构计算运行时模块中的任务生成装置的应用程序接口，然后将相应的应用程序编程接口参数输入到任务生成装置中，然后任务生成装置根据应用程序编程接口参数生成任务，然后将生成的任务放入计算机设备中的任务缓存池中。在本实施例中，该目标任务为Buffer申请任务或者为Buffer释放任务；当该目标任务的前继任务已完成，且该目标任务的后继任务执行前后，该任务调度器会从任务缓存池中获取该目标任务，其中，该前继任务与该后继任务在逻辑上存在顺序依赖关系，其中，该目标任务中携带有该目标任务对应的Buffer的内存ID。
比如，当该目标任务为Buffer申请任务，计算机设备中的任务生成装置前期的创建该Buffer申请任务的过程为：计算机设备通过应用例程模块调用任务生成装置的应用程序编程接口发起Buffer申请任务，然后将相应的Buffer申请任务的相关参数输入到该应用程序编程接口中，然后任务生成装置可以在计算机设备中的Buffer资源池中申请Buffer表项以及该Buffer对应的内存ID，任务生成装置根据该相关参数填写该Buffer表项，将该Buffer表项中的内存地址设置为空地址，再根据该Buffer表项申请Buffer申请任务，并且该Buffer申请任务携带有内存ID，将该Buffer申请任务放入计算机设备中的任务缓存池中，然后任务生成装置的应用程序编程接口返回内存ID至该应用例程模块；当该目标任务为Buffer释放任务时，该任务生成装置创建Buffer释放任务的过程具体为：任务生成装置根据该应用例程模块输入的相关参数创建Buffer释放任务，并且该Buffer释放任务携带该Buffer的内存ID，然后将该Buffer释放任务放入任务缓存池中。
本实施例中，该目标任务携带有该目标任务对应的Buffer的内存ID，请参阅表1，表1为以Buffer为维度的Buffer资源池，其中，Buffer1、Buffer2、和Buffer3代表三个Buffer表项，每个表项中包含有内存ID、内存大小、内存位置以及内存地址等信息。比如该目标任务为Buffer申请任务，其内存ID为101，该目标任务对应的Buffer表项为内存ID为101对应的表项，该目标任务对应的Buffer内存大小为500，内存位置为局部1，内存地址为0x1001。
表1
Figure PCTCN2019087923-appb-000001
302、计算机设备通过任务调度器确定该目标任务的任务类型。
任务调度器获取到该目标任务之后，计算机设备通过任务调度器可以根据该目标任务中的字段来确定该目标任务的任务类型。比如，当第一任务为Buffer申请任务时，该目标任务会携带对应的字段来指示该Buffer申请任务。
303、若该目标任务的任务类型为Buffer申请任务或者Buffer释放任务，计算机设备通过任务调度器向计算机设备中的Buffer管理器发送目标任务。
任务调度器确定了该目标任务的任务类型为Buffer申请任务或者Buffer释放任务之后，任务调度器可以向计算机设备中的Buffer管理器发送目标任务，该目标任务中携带有该目标任务对应的Buffer的内存ID。
304、计算机设备通过Buffer管理器根据该目标任务携带的Buffer的内存ID从计算机设备中的Buffer资源池中获取该内存ID对应的Buffer表项。
计算机设备可以通过Buffer管理器可以从该目标任务中携带的该内存ID从计算机设备中的Buffer资源池中获取对应的Buffer表项。比如，如表1中，假设该内存ID为101，那么Buffer管理器就可以获取该内存ID对应的Buffer表项，如表2为内存ID对应的Buffer表项。
表2
内存ID 内存大小 内存位置 内存地址
101 500 局部1 0x10001
比如，该内存ID为201，那么计算机设备通过Buffer管理器就可以获取该内存ID对应的Buffer表项，表3为内存ID为201对应的Buffer表项。
表3
内存ID 内存大小 内存位置 内存地址
201 30 局部2 null
305、计算机设备通过Buffer管理器确定该目标任务的任务类型，若该目标任务的任务类型为Buffer申请任务，则执行步骤306；若该目标任务的任务类型为Buffer释放任务，则执行步骤310。
计算机设备Buffer管理器可以通过该目标任务来确定该目标任务的任务类型，当该目标任务的任务类型为Buffer申请任务时，那么执行步骤306；当该目标任务的任务类型为 Buffer释放任务时，那么执行步骤310。
306、计算机设备通过Buffer管理器确定Buffer内存位置中的空闲内存大小大于该Buffer内存大小。
当目标任务为Buffer申请任务时，计算机设备中的Buffer管理器会从步骤304中获取到Buffer表项中查询该Buffer的内存位置，然后该Buffer管理器可以判断该内存位置中的空闲内存大小是否大于该Buffer表项中的Buffer内存大小，若大于，那么Buffer管理器可以确定该Buffer内存位置中存在足够的空闲内存。比如，在步骤304中Buffer管理器获取到的Buffer表项为表3，那么从表3中可知，该Buffer申请任务所申请的Buffer的内存位置为局部内存2，内存大小为30，那么该Buffer管理器就会判断局部内存2当中的空闲内存大小是否大于30，如果大于，那么Buffer管理器确定局部内存2中有足够的内存。
需要说明的是，当该Buffer管理器通过判断确定该Buffer的内存位置中空闲内存不足，那么Buffer管理器可以等待至该内存位置中有空闲内存再确定为该Buffer表项分配内存，也可以是该Buffer管理器可以使用全局内存来代替该局部内存，然后为该Buffer表项分配全局内存，具体此处不做限定；当全局内存也出现内存不足时，此时Buffer管理器可以等待至全局内存空闲时再给Buffer分配内存，具体此处不做限定。
本实施例中，计算机设备通过异构计算运行时模块在进行异步数据交换Buffer管理时，该异构计算运行时模块能够掌握Buffer与该异构计算任务的依赖关系，因此，计算机设备通过任务调度器可以对该异构计算任务进行Buffer的亲和性调度，该任务调度器能够支持设备局部内存的Buffer分配管理，并且提升了异构计算任务执行时的访存性能，满足了不同的应用场景需求，由于全局内存的访存性能差于局部内存，所以当要求访存性能较高的异构计算任务进行数据交换时可以通过申请设备局部内存来执行该异构计算任务，比如，计算机设备通过应用例程模块通过判断确定数据是在异构计算任务执行过程中拷贝频率或者使用频率最高的数据，那么此时应用例程模块可以申请局部内存的Buffer，从而在后续将该数据拷贝至该Buffer对应的局部内存中，所以在执行异构计算任务时读写访问该数据的效率更高，充分利用了局部内存访问性能较高的性能，从而满足不同应用场景需求。
307、计算机设备通过Buffer管理器更新该Buffer表项中的Buffer内存地址。
Buffer管理器确定了该Buffer内存位置中的空闲内存之后，该Buffer管理器会对Buffer表项中的内存地址进行更新。比如，Buffer管理器根据内存ID从Buffer资源池中获取的Buffer表项为表3，Buffer管理器通过确定空闲内存之后，会将该空闲内存对应的内存地址填写到表3中内存地址的空格中，即将表3中内存地址为空地址的状态更新为空闲内存对应的内存地址。
308、计算机设备通过Buffer管理器向计算机设备中的任务调度器发送第一通知消息。
Buffer管理器对该Buffer表项中的Buffer内存地址进行更新之后，Buffer管理器会向该任务调度器发送第一通知消息，该第一通知消息用于指示该Buffer管理器执行完成该目标任务。
309、计算机设备通过任务调度器解除计算机设备的任务缓存池中依赖该Buffer申请 任务的任务与该Buffer申请任务的依赖关系。
任务调度器接收到该第一通知消息之后，该任务调度器会解除该任务缓存池中与依赖该Buffer申请任务的任务与该Buffer申请任务的依赖关系，用于后续任务调度器调度解除依赖关系的任务。
310、计算机设备通过Buffer管理器释放该Buffer表项中的Buffer内存地址对应的设备内存。
当该目标任务为Buffer释放任务时，在步骤304中获取到的Buffer表项，该Buffer管理器会将该Buffer表项中对应的Buffer内存地址对应的设备内存释放。比如，表2中的Buffer内存地址为0x10001，那么Buffer管理器就可以将0x10001对应的设备内存释放。
311、计算机设备通过Buffer管理器从计算机设备中的Buffer资源池中删除该Buffer表项。
Buffer管理器释放了Buffer内存地址对应的设备内存之后，该Buffer管理器会从Buffer资源池中删除该Buffer表项。比如，Buffer管理器确定内存ID对应的Buffer表项为表2，那么释放了该Buffer内存地址对应的设备内存之后，该Buffer管理器可以将表2从Buffer资源池中删除。
312、计算机设备通过Buffer管理器向计算机设备中的任务调度器发送的第二通知消息。
Buffer管理器删除该Buffer表项之后，该Buffer管理器可以向任务调度器发送第二通知消息，该第二通知消息用于指示该Buffer管理器执行完成该Buffer释放任务。
313、计算机设备通过任务调度器解除计算机设备中的任务缓存池中依赖该Buffer释放任务的任务与该Buffer释放任务的依赖关系。
计算机设备通过任务调度器接收到该第二通知消息之后，该任务调度器可以解除任务缓存池中依赖该Buffer释放任务的任务与该Buffer释放任务的依赖关系。
本申请实施例中，计算机设备通过Buffer管理器接收计算机设备中的任务调度器发送的目标任务，该目标任务为第一任务的后继任务，且为第二任务的前继任务，该第一任务和第二任务为存在顺序依赖关系的待执行任务，其中，当该目标任务为该Buffer申请任务的时候，该第二任务执行时使用该Buffer申请任务所对应的Buffer，当该目标任务为该Buffer释放任务时，该第一任务执行时使用该Buffer释放任务所对应的Buffer，当该目标任务的前继任务已完成后且该目标任务的后继任务执行前，该计算机设备可以通过Buffer管理器根据目标任务在计算机设备中的Buffer资源池当中获取该任务对应的Buffer表项，其中，该计算机设备中的该Buffer资源池存储有每个Buffer的Buffer表项，然后计算机设备通过Buffer管理器可以根据该Buffer表项执行该目标任务以申请或者释放该目标任务所对应的Buffer。因此，计算机设备在对Buffer申请或者Buffer释放之前，计算机设备可以确定目标任务的前继任务执行完成之后，且目标任务的后继任务执行前，计算机设备才会执行该目标任务，所以计算机设备对该Buffer申请可以真正延后至目标任务的前继任务执行完成之后，且目标任务的后继任务执行前，以及计算机设备对该 Buffer的释放可以提前至该目标任务的前继任务完成后立即执行，从而提高了Buffer对应的设备内存的周转效率。
本申请实施例中，计算机设备通过Buffer管理器可以根据计算机设备中的任务调度器发送的目标任务中携带的依赖任务组ID从计算机设备中的Buffer资源池中获取对应的Buffer表项，并根据该Buffer表项来执行目标任务以申请或者释放该目标任务所对应的Buffer，其中，该目标任务为Buffer申请任务或者Buffer释放任务，该目标任务为该依赖任务组中的任务，下面通过图4进行详细描述：
请参阅图4，在图4的实施例中，计算机设备通过Buffer管理器根据该依赖任务组ID从Buffer资源池中获取对应的Buffer表项，然后该Buffer管理器根据该Buffer表项来执行目标任务以申请或者释放该目标任务所对应的Buffer，本申请实施例中数据处理方法的另一个实施例包括：
401、计算机设备通过任务调度器从计算机设备中的任务缓存池中获取目标任务。
402、计算机设备通过任务调度器确定该目标任务的任务类型。
403、若该目标任务的任务类型为Buffer申请任务或者Buffer释放任务，计算机设备通过任务调度器向计算机设备中的Buffer管理器发送目标任务。
步骤401至步骤403与前述图3中步骤301至步骤303类似，具体此处不再赘述。
需要说明的是，在本实施例中，计算机设备通过任务生成装置创建Buffer申请任务的具体过程为：任务生成装置根据应用例程模块调用该任务生成装置的应用程序接口时输入的应用程序编程接口参数填写依赖任务组ID对应的Buffer表项，并将该Buffer表项中的内存地址设置为空地址，然后任务生成装置根据该Buffer表项创建Buffer申请任务，且该Buffer申请任务携带依赖任务组ID，然后将该任务放入计算机设备中的任务缓存池；另外，任务生成装置创建Buffer释放任务的过程具体为：任务生成装置根据应用程序编程接口参数创建Buffer释放任务，该Buffer释放任务携带有依赖任务组ID，然后将该任务放入计算机设备中的任务缓存池中。
404、计算机设备通过Buffer管理器根据该目标任务中携带的依赖任务组ID获取获取该目标任务对应的Buffer表项。
Buffer管理器接收到任务调度器发送的目标任务之后，该Buffer管理器可以根据该目标任务中携带的依赖任务组ID从计算机设备中的Buffer资源池获取该目标任务对应的Buffer表项，其中，该计算机设备中的Buffer资源池中存储有每个Buffer的相关信息，该Buffer表项为包含该目标任务对应的Buffer的相关信息的表项，其中，该Buffer表项中可以包括该目标任务对应的Buffer内存大小、内存地址以及内存位置等，本申请对此不做限定。在本实施中，该Buffer资源池是以依赖任务组为维度的数据表，比如，如表4所示的数据表，在表4中，依赖任务组1对应的Buffer表项中显示该依赖任务组1对应的Buffer的内存大小为500、内存位置为局部1以及内存地址为0x10001。
表4
Figure PCTCN2019087923-appb-000002
比如，该目标任务中携带的依赖任务组ID对应的表项为表4中依赖任务组3对应的Buffer表项，那么计算机设备可以通过Buffer管理器从该计算机设备中的Buffer资源池中获取该依赖任务组3对应的Buffer表项，即如表5为该Buffer管理器根据目标任务中携带的依赖任务组ID获取到的Buffer表项。
表5
内存大小 内存位置 内存地址
30 局部2 null
405、计算机设备通过Buffer管理器确定该目标任务的任务类型，若该目标任务的任务类型为Buffer申请任务，则执行步骤406；若该目标任务的任务类型为Buffer释放任务，则执行步骤415。
Buffer管理器获取到该目标任务之后，可以确定目标任务的任务类型，若该目标任务的任务类型为Buffer申请任务，那么执行步骤406；若该目标任务的任务类型为Buffer释放任务，那么执行步骤415。
需要说明的时，Buffer管理器确定该目标任务的任务类型可以是该Buffer管理器根据该目标任务中的字段来确定该目标任务的任务类型，也可以是Buffer管理器通过其他方式来确定该目标任务的任务类型，具体此处不做限定。
406、计算机设备通过Buffer管理器判断Buffer内存位置是否为局部内存，若是，则执行步骤407；若否，则执行步骤411。
当Buffer管理器确定该目标任务的任务类型为Buffer申请任务时，该Buffer管理器可以判断该目标任务对应的Buffer内存位置是否为局部内存，若该目标任务对应的Buffer内存位置为局部内存，那么执行步骤407；若该目标任务对应的Buffer内存位置不为局部内存，那么执行步骤411。比如，该目标任务对应的Buffer表项为表5，在表5中该Buffer的内存位置为局部内存2，所以该Buffer管理器可以确定该Buffer的内存位置为局部内存。
需要说明的是，在以依赖任务组为维度的Buffer资源池中，当一个依赖任务组中的任务所依赖的Buffer有多个时，那么该Buffer表项中的Buffer的相关信息是变化的，比如，依赖任务组中包括A任务、B任务、C任务以及D任务，其中，A任务与B任务存在依赖关系，C任务与D任务存在依赖关系，A任务与B任务共用Buffer D1，C任务与D任务共用Buffer D2，那么当执行A任务和B任务时，此时该依赖任务组对应的Buffer表项中有Buffer  D1的相关信息，当执行完成该A任务和B任务时，此时Buffer管理器会将该Buffer D1释放，即将该Buffer表项中的该Buffer D1的相关信息删除，然后该Buffer管理器会根据任务调度器发送的任务信息对应申请Buffer D2，此时该Buffer表项中就存在Buffer D2的相关信息，那么相应的模块就可以执行C任务和D任务。
本实施例中，计算机设备通过异构计算运行时模块在进行异步数据交换Buffer管理时，异构计算运行时模块能够掌握Buffer与该异构计算任务的依赖关系，因此，计算机设备通过任务调度器可以对该异构计算任务进行Buffer的亲和性调度，该任务调度器能够支持设备局部内存的Buffer分配管理，并且提升了异构计算任务执行时的访存性能，满足了不同的应用场景需求，由于全局内存的访存性能差于局部内存，所以当要求访存性能较高的异构计算任务进行数据交换时可以通过申请设备局部内存来执行该异构计算任务，比如，计算机设备通过应用例程模块通过判断确定数据是在异构计算任务执行过程中拷贝频率或者使用频率最高的数据，那么此时应用例程可以申请局部内存的Buffer，从而在后续将该数据拷贝至该Buffer对应的局部内存中，所以在执行异构计算任务时读写访问该数据的效率更高，充分利用了局部内存访问性能较高的性能；本申请的数据处理方法能够支持数据交换的Buffer在设备内存任何层级内存申请对应的内存，因此能够满足多样化的设备内存场景，从而满足不同应用场景需求。
407、计算机设备通过Buffer管理器确定目标局部内存。
Buffer管理器确定该目标任务对应的Buffer内存位置为局部内存之后，该Buffer管理器可以根据该计算单元负载情况以及局部内存的空闲情况来确定目标局部内存。
需要说明的是，当Buffer管理器通过判断确定该局部内存的空闲情况为内存不足时，此时Buffer管理器可以等待至该局部内存足够时再为该Buffer申请对应的内存，也可以是该Buffer管理器将全局内存来作为目标内存，然后为该Buffer申请全局内存对应的设备内存，本申请对此不做限定。
408、计算机设备通过Buffer管理器更新Buffer内存地址以及Buffer内存位置。
Buffer管理器确定了目标局部内存之后，该Buffer管理器可以根据该目标局部内存更新该Buffer表项中Buffer内存地址以及Buffer内存位置。比如，在步骤404中，Buffer管理器确定该目标任务对应的Buffer表项为表5，那么Buffer管理器会根据确定目标局部内存来更新表5中的内存地址和内存位置。
409、计算机设备通过Buffer管理器向任务调度器发送第一通知消息。
410、计算机设备通过任务调度器解除依赖于该Buffer申请任务的任务与该Buffer申请任务的依赖关系。
步骤409至步骤410与前述图3中的步骤308至步骤309类似，具体此处不再赘述。
411、计算机设备通过Buffer管理器将全局内存设置为目标内存位置。
该Buffer管理器通过判断确定该Buffer的内存位置不为局部内存之后，那么Buffer管理器可以将全局内存设置为该目标任务对应的Buffer的目标内存位置。比如，Buffer管理器根据该任务信息从Buffer资源池获取对应的Buffer表项，通过该Buffer表项中确定该Buffer的内存位置为全局内存。
412、计算机设备通过Buffer管理器更新该Buffer内存地址以及Buffer内存位置。
Buffer管理器确定目标任务对应的Buffer位于全局内存，那么Buffer管理器可以根据该全局内存更新该Buffer表项中的Buffer内存地址以及Buffer内存位置；比如，Buffer管理器确定了对应的全局内存，那么该Buffer管理器可以将该全局内存对应的内存地址以及该全局内存的内存位置填写至该Buffer的Buffer表项。
413、计算机设备通过Buffer管理器向任务调度器发送第二通知消息。
414、计算机设备通过任务调度器解除依赖于该Buffer申请任务的任务与该Buffer申请任务的依赖关系。
步骤413至步骤414与前述图3中的步骤308至步骤309类似，具体此处不再赘述。
415、计算机设备通过Buffer管理器确定该Buffer表项中的Buffer内存地址。
当该Buffer管理器确定该目标任务的任务类型为Buffer释放任务时，该Buffer管理器可以确定该Buffer表项中与的Buffer内存地址；比如，目标任务携带的依赖任务组ID对应的Buffer表项为表1中依赖任务组1对应的Buffer表项，即如表7所示的Buffer表项，该内存地址为0x10001。
表7
内存大小 内存位置 内存地址
500 局部1 0x10001
416、计算机设备通过Buffer管理器释放该Buffer内存地址对应的设备内存。
Buffer管理器确定了该Buffer内存地址之后，该Buffer管理器可以释放该Buffer内存地址对应的设备内存。比如，在步骤415中，该Buffer管理器确定该Buffer内存地址为0x10001，那么该Buffer管理器可以释放0x10001对应的设备内存。
417、计算机设备通过Buffer管理器将该Buffer内存地址设置为空地址。
Buffer管理器释放了该Buffer内存地址对应的设备内存后，可以将该Buffer表项中的Buffer内存地址设置为空地址。比如，在表7中，将0x10001设置为为null，即如表8所示：
表8
内存大小 内存位置 内存地址
500 局部1 null
需要说明的是，当该依赖任务组的所有任务都执行完成时，此时该Buffer管理器在释放对应的Buffer时可以将Buffer资源池中的该依赖任务组对应的Buffer表项删除。
418、计算机设备通过Buffer管理器向该任务调度器发送第三通知消息。
419、计算机设备通过任务调度器解除依赖于该Buffer释放任务的任务与该Buffer释放任务的依赖关系。
步骤418至步骤419与前述图3中的步骤312至步骤313类似，具体此处不再赘述。
本申请实施例中，计算机设备通过Buffer管理器接收计算机设备中的任务调度器发送的目标任务，该目标任务为第一任务的后继任务，且为第二任务的前继任务，该第一任务 和第二任务为存在顺序依赖关系的待执行任务，其中，当该目标任务为该Buffer申请任务的时候，该第二任务执行时使用该Buffer申请任务所对应的Buffer，当该目标任务为该Buffer释放任务时，该第一任务执行时使用该Buffer释放任务所对应的Buffer，当该目标任务的前继任务已完成后且该目标任务的后继任务执行前，该计算机设备可以通过Buffer管理器根据目标任务在计算机设备中的Buffer资源池当中获取该任务对应的Buffer表项，其中，该计算机设备中的该Buffer资源池存储有每个Buffer的Buffer表项，然后计算机设备通过Buffer管理器可以根据该Buffer表项执行该目标任务以申请或者释放该目标任务所对应的Buffer。因此，因此，计算机设备在对Buffer申请或者Buffer释放之前，计算机设备可以确定目标任务的前继任务执行完成之后，且目标任务的后继任务执行前，计算机设备才会执行该目标任务，所以计算机设备对该Buffer申请可以真正延后至目标任务的前继任务执行完成之后，且目标任务的后继任务执行前，以及计算机设备对该Buffer的释放可以提前至该目标任务的前继任务完成后立即执行，从而提高了Buffer对应的设备内存的周转效率。
本申请实施例中，计算机设备通过任务调度器可以根据目标任务中携带的内存ID以及该目标任务的任务类型调用计算机设备中相应的模块执行目标任务，下面通过图5进行详细描述：
请参阅图5，在图5的实施例中，计算机设备通过任务调度器根据该目标任务的携带的内存ID以及该目标任务的任务类型调用计算机设备中相应的模块执行该目标任务，本申请实施例中数据处理方法的另一个实施例包括：
501、计算机设备通过任务调度器从计算机设备中的任务缓存池中获取目标任务。
计算机设备通过应用例程模块运行代码的运行过程中，应用例程模块会调用计算机设备中的异构计算运行时模块的任务生成装置的应用程序编程接口，然后将相应的应用程序编程接口参数输入到任务生成装置中，然后任务生成装置根据应用程序编程接口参数来生成任务，然后将生成的任务放入计算机设备中的任务缓存池中。计算机设备通过任务调度器可以从计算机设备中的任务缓存池中获取目标任务，该目标任务为其前继任务已完成，且该目标任务的后继任务待执行的任务，该前继任务与该后继任务在逻辑上存在顺序依赖关系，该目标任务中携带有该目标任务对应的Buffer内存ID。
502、计算机设备通过任务调度器确定目标任务的任务类型，若该目标任务的任务类型为内存拷贝任务，则执行步骤503；若该目标任务的任务类型为异构计算任务，则执行步骤512；若该目标任务的任务类型为Buffer申请任务或者Buffer释放任务，则执行步骤524。
计算机设备通过任务调度器可以根据目标任务的任务类型，若该目标任务的任务类型为内存拷贝任务，那么执行步骤503；若该目标任务的任务类型为异构计算任务，那么执行步骤512；若目标任务的任务类型为Buffer申请任务或者Buffer释放任务，那么执行步骤524。具体可以是任务调动器根据该目标任务中的字段来确定该目标任务的任务类型。
503、计算机设备通过任务调度器判断该数据拷贝源地址是否为合法的内存ID和/或该数据拷贝的目的地址是否为合法的内存ID，若该源地址为合法的内存ID和/或该目的地址 为合法的内存ID，则执行步骤504；若该源地址以及该目的地址都不为合法的内存ID，则执行步骤509。
计算机设备通过任务调度器可以判断该内存拷贝任务对应的数据拷贝源地址是否为合法的内存ID和/或该数据拷贝的目的地址是否为合法的内存ID，如果该源地址为合法的内存ID和/或该目的地址为合法的内存ID，则执行步骤504；如果该源地址以及该目的地址都不为合法的内存ID，则执行步骤509。比如，该内存拷贝数据的源地址为101，如果在Buffer资源池中存在内存ID为101对应的Buffer，则说明该内存101为合法的内存ID，那么即是将内存地址为0x10001对应的设备内存中的数据拷贝至目的地址；比如该内存拷贝数据的目的地址为101，那么即是将源地址的数据拷贝至0x10001对应的设备内存中。
需要说明的是，合法的内存ID为计算机设备通过Buffer管理器已申请的Buffer的内存ID，如果在该内存拷贝任务的数据拷贝源地址或目标地址包含已申请的Buffer的内存ID，那么可以确定该内存ID为合法的内存ID。
504、计算机设备通过任务调度器根据内存ID在计算机设备中的Buffer资源池中获取对应的Buffer内存地址。
任务调度器确定该目标任务的任务类型为内存拷贝任务之后，任务调度器可以根据该目标任务中携带的内存ID在Buffer资源池中获取对应的Buffer内存地址；比如，该内存ID为101，那么如表1所示，该内存ID对应的Buffer表项为表2，该Buffer内存地址为0x10001。
505、计算机设备通过任务调度器将目标任务中携带的内存ID更换为该Buffer内存地址。
任务调度器可以将目标任务中携带的内存ID更换为该Buffer的内存地址，比如，数据拷贝任务的源地址为101，那么任务调度器可以将该源地址更换为0x10001。
506、计算机设备通过任务调度器通过计算机设备中的数据搬移发射器向计算机设备中的DMA发送该目标任务。
计算机设备通过任务调度器可以通过该数据搬移发射器向DMA发送该目标任务，该目标任务携带有该Buffer的内存地址。比如，该任务调度器将该目标任务中的内存ID更换为0x10001之后，那么该任务调度器可以将该目标任务发送至DMA，那么DMA接收到该目标任务之后，会根据该目标任务中携带的内存地址执行该目标任务，将目标数据拷贝至目标地址。
507、计算机设备通过DMA向该计算机设备中的任务调度器发送第一通知消息。
在该DMA执行完成该目标任务之后，该DMA可以向任务调度器发送第一通知消息，该第一通知消息用于指示该DMA执行完成该目标任务。
508、计算机设备通过任务调度器解除被依赖任务与该目标任务的依赖关系。
任务调度器接收到该第一通知消息之后，该任务调度器可以解除任务缓存池中依赖于该目标任务的任务与该目标任务的依赖关系。
509、计算机设备通过任务调度器向计算机设备中的DMA发送目标任务。
当该任务调度器确定该数据拷贝的源地址以及该数据拷贝的目的地址为具体的内存地 址时，任务调度器可以通过数据搬移发射器向DMA发送目标任务，直接让该DMA执行目标任务；比如，该内存拷贝任务中数据拷贝的源地址以及该数据拷贝的目的地址不为Buffer资源池中已申请的Buffer对应的内存ID，那么任务调度直接调度让DMA执行该数据的拷贝。
510、计算机设备通过DMA向计算机设备中的任务调度器发送第二通知消息。
511、计算机设备通过任务调度器解除被依赖任务与该内存拷贝任务的依赖关系。
步骤510至步骤511与步骤507至步骤508类似，具体此处不做赘述。
512、计算机设备通过任务调度器判断该异构计算任务的输入参数中是否存在合法的内存ID，若是，则执行步骤513；若否，则执行步骤522。
当该任务调度器确定该目标任务的任务类型为异构计算任务，那么任务调度器可以判断该异构计算任务的输入参数中是否存在合法的内存ID，如果该异构计算任务的输入参数中存在合法的内存ID，那么执行步骤513；如果该异构计算任务的输入参数中不存在合法的内存ID，那么执行步骤522。比如，Buffer管理器已申请的Buffer内存ID为101，那么如果异构计算任务的输入参数存在101，那么任务调度器可以确定该异构计算任务的输入参数存在合法的内存ID。
513、计算机设备通过任务调度器根据内存ID在Buffer资源池当中获取对应的Buffer内存地址。
任务调度器可以根据该内存ID在Buffer资源池中获取该内存ID对应的Buffer表项，然后任务调度器可以从Buffer表项确定该Buffer的内存地址；比如内存ID为101，那么该内存ID对应的Buffer表项为表2，那么可知该Buffer的内存地址为0x10001。
514、计算机设备通过任务调度器将该异构计算任务的输入参数中的内存ID更换为该Buffer内存地址。
任务调度器确定该异构计算任务的输入参数中存在合法的内存ID之后，该任务调度器可以将该异构计算任务的输入参数中的内存ID更换为该Buffer内存地址；比如，该任务调度器确定该内存ID为101，那么该对应的Buffer内存地址为0x10001，那么该任务调度器可以将异构计算任务的输入参数的内存ID更换为该Buffer内存地址。
515、计算机设备通过任务调度器判断该内存ID对应的Buffer内存位置是否为局部内存，若是，则执行步骤516；若否，则执行步骤519。
任务调度器可以判断该内存ID对应的Buffer内存位置是否为局部内存，如果该内存ID对应的Buffer内存位置为局部内存，那么执行步骤516；如果该内存ID对应的Buffer内存位置不为局部内存，那么执行步骤519。比如，该内存ID为101，那么从表2中可以确定该Buffer的内存位置为局部内存1；如果该内存ID为102，那么从表1中可以确定该Buffer的内存位置为全局内存。
516、计算机设备通过任务调度器向该计算机设备中的Buffer局部内存对应的计算单元发送目标任务。
任务调度器确定该内存ID对应的Buffer内存位置为局部内存之后，该任务调度器可以向该Buffer局部内存对应的计算单元发送该目标任务。比如，该内存ID为101，该Buffer 内存位置为局部内存1，Buffer内存地址为0x10001，那么Buffer局部内存对应的计算单元即为0x10001对应的计算单元，任务调度器可以向0x10001对应的计算单元发送该目标任务。
计算机设备通过任务调度器能够支持设备局部内存的Buffer分配管理，由于全局内存的访存性能差于局部内存，所以当要求访存性能较高的异构计算任务进行数据交换时可以通过申请设备局部内存来执行该异构计算任务，比如，计算机设备通过应用例程模块判断确定数据是在异构计算任务执行过程中拷贝频率或者使用频率最高的数据，那么此时应用例程模块为该异构计算任务申请局部内存的Buffer，从而在后续将该数据拷贝至该Buffer对应的局部内存中，所以在执行异构计算任务时读写访问该数据的效率更高，充分利用了局部内存访问性能较高的性能；本申请的数据处理方法能够支持数据交换的Buffer在设备内存任何层级内存申请对应的内存，因此能够满足多样化的设备内存场景，从而满足不同应用场景需求。
517、该计算机设备通过Buffer局部内存对应的计算单元向该计算机设备中的任务调度器发送第三通知消息。
该Buffer局部内存对应的计算单元执行完成该目标任务之后，该Buffer局部内存对应的计算单元可以向任务调度器发送第三通知消息，该第三通知消息用于指示该Buffer局部内存对应的计算单元执行完成该目标任务。
518、计算机设备通过任务调度器解除被依赖任务对该目标任务的依赖关系。
任务调度器接收到第三通知消息之后，任务调度器可以解除被依赖任务对该目标任务的依赖关系。
519、计算机设备通过任务调度器向负载最小的计算单元发送目标任务。
当任务调度器确定该内存ID对应的Buffer内存位置不为局部内存时，该任务调度器可以向负载量最小的计算单元发送该目标任务，比如，该内存ID为102，那么该内存ID对应的该Buffer内存位置为全局内存，所以任务调度器可以向负载量最小的计算单元发送该目标任务。
520、计算机设备通过负载量最小的计算单元向计算机设备中的任务调度器发送第四通知消息。
负载量最小的计算单元接收到该目标任务之后，该负载量最小的计算单元可以执行该目标任务，当该负载量最小的计算单元执行完成该目标任务时，该计算单元可以向该任务调度器发送该第四通知消息，该第四通知消息用于通知该任务调度器该目标任务执行完成。
521、计算机设备通过任务调度器解除被依赖任务对该目标任务的依赖关系。
步骤521与步骤518类似，具体此处不再赘述。
522、计算机设备通过任务调度器向计算机设备中的负载量最小的计算单元发送目标任务。
当任务调度器确定该异构计算任务的输入参数中不存在合法的内存ID，说明该异构计算任务不依赖Buffer资源池中已申请的Buffer，那么任务调度器可以向负载量最小的计算单元发送目标任务。
523、计算机设备通过负载量最小的计算单元向计算机设备中的任务调度器发送第五通知消息。
524、计算机设备通过任务调度器解除被依赖任务对该目标任务的依赖关系。
步骤523和步骤524与步骤517和步骤518类似，具体此处不再赘述。
525、计算机设备通过任务调度器向计算机设备中的Buffer管理器发送目标任务。
当该任务调度器确定该目标任务的任务类型为Buffer申请任务或者Buffer释放任务时，该任务调度器可以向Buffer管理器发送该目标任务。
526、计算机设备通过Buffer管理器向计算机设备中的任务调度器发送第六通知消息。
Buffer管理器接收到该目标任务之后，Buffer管理器可以执行该目标任务，Buffer执行该目标任务的具体过程请参见前述图3中Buffer管理器执行Buffer申请任务或者Buffer释放任务的过程，当Buffer管理器执行完成该目标任务时，该Buffer管理器可以向任务调度器发送第六通知消息，该第六通知消息用于通知该任务调度器执行完成该目标任务。
527、计算机设备通过任务调度器解除被依赖任务对该目标任务的依赖关系。
步骤527与步骤518类似，具体此处不再赘述。
本申请实施例中，计算机设备通过任务调度器从计算机设备中的任务缓存池中获取目标任务，该目标任务为其前继任务已完成，且该目标任务的后继任务待执行的任务，该前继任务任务与该后继任务在逻辑上存在顺序依赖关系；然后，计算机设备通过任务调度器确定该目标任务的任务类型，任务调度器可以根据该目标任务的任务类型以及该目标任务调用计算机设备中的相应的模块执行该目标任务。因此，该任务调度器从任务缓存池中获取的目标任务，该目标任务为其前继任务已完成，且该目标任务的后继任务待执行的任务，该前继任务任务与该后继任务在逻辑上存在顺序依赖关系；当该目标任务为Buffer申请任务或者Buffer释放任务时，那么对于Buffer的申请，可以真正延后至该Buffer申请任务的前继任务执行完成后，计算机设备通过任务调度器再调用计算机设备中的Buffer管理器来执行该Buffer申请任务；对于Buffer的释放，可以提前至该Buffer释放任务的前继任务完成时计算机设备通过任务调度器向计算机设备中的Buffer管理器立即派发该Buffer释放任务，从而提高了Buffer对应的设备内存的周转效率。
本申请实施例中，计算机设备通过任务调度器可以根据该目标任务携带的依赖任务组ID以及该目标任务的任务类型调用计算机设备中的相应的模块执行该目标任务，下面通过图6进行详细描述：
请参阅图6，在图6的实施例中，计算机设备通过任务调度器根据该目标任务中携带的依赖任务组ID以及该目标任务的任务类型调用计算机设备中的相应的模块执行该目标任务，本申请实施例中数据处理方法的另一个实施例包括：
601、计算机设备通过任务调度器从计算机设备中的任务缓存池中获取目标任务。
计算机设备通过应用例程模块运行代码的运行过程中，应用例程模块会调用计算机设备中的异构计算运行时模块的任务生成装置的应用程序编程接口，然后将相应的应用程序编程接口参数输入到任务生成装置中，然后任务生成装置根据应用程序编程接口参数来生 成任务，然后将生成的任务放入计算机设备中的任务缓存池中。计算机设备通过任务调度器可以从计算机设备中的任务缓存池中获取目标任务，该目标任务为其前继任务已完成，且该目标任务的后继任务待执行的任务，该前继任务与该后继任务在逻辑上存在顺序依赖关系，该目标任务中携带有依赖任务组ID。
602、计算机设备通过任务调度器确定该目标任务的任务类型。
步骤602与前述图5的步骤502类似，具体此处不再赘述。
603、若该目标任务的任务类型为内存拷贝任务，则计算机设备通过任务调度器向计算机设备中的DMA发送目标任务。
计算机设备通过任务调度器确定该目标任务的任务类型为内存拷贝任务，那么计算机可以通过任务调度器向计算机设备中的DMA发送该目标任务，那么DMA就可以执行该内存拷贝任务。
604、计算机设备通过DMA向计算机设备中的任务调度器发送第一通知消息。
605、计算机设备通过任务调度器解除被依赖任务对该目标任务的依赖关系。
步骤604和步骤605与前述图5中的步骤510和步骤511类似，具体此处不再赘述。
606、若该目标任务的任务类型为Buffer释放任务，则计算机设备通过任务调度器判断是否存在预存数据，若是，则执行步骤607；若否，则执行步骤612。
当该任务调度器确定该目标任务的任务类型为Buffer释放任务时，该任务调度器可以判断是否存在预存数据，如果存在，那么执行步骤607；如果不存在，那么执行步骤612。需要说明的是，该预存数据可以是后续在执行异构计算任务之后或者数据拷贝任务之后所需读写访问的数据，因此，在Buffer释放之前，该任务调度器可以确定该预存数据，然后将该预存数据拷贝至目标内存。
607、计算机设备通过任务调度器向计算机设备中的DMA发送拷贝该预存数据的任务。
计算机设备通过任务调度器确定存在预存数据之后，计算机设备可以通过任务生成装置生成拷贝预存数据的任务，然后任务调度器可以通过数据搬移发射器向DMA发送拷贝该预存数据的任务，其中，该拷贝预存数据的任务携带有该预存数据的保存地址、保存数据长度以及保存数据在该Buffer释放任务对应的Buffer中的偏移量。如图7所示，图7为预存prestore数据在Buffer中的Buffer偏移量、prestore数据长度以及prestore数据目标地址。
608、计算机设备通过DMA向计算机设备中的任务调度器发送第二通知消息。
DMA将该预存数据拷贝至预存数据的目标地址之后，该DMA可以向任务调度器发送该第二通知消息，该第二通知消息用于指示该DMA执行完成该拷贝该预存数据的任务。
609、计算机设备通过任务调度器发送计算机设备中的Buffer管理器发送目标任务。
任务调度器接收到该第二通知消息之后，由于此时任务调度器可以确定该Buffer释放任务对应的Buffer中的预存数据已经拷贝至预存数据的目标地址，所以该任务调度器可以向Buffer管理器发送目标任务，那么Buffer管理器就可以将该Buffer对应的设备内存及时释放，具体Buffer管理器对Buffer释放过程详细请参阅前述图4中的Buffer释放过程，这里不再赘述，通过Buffer管理器及时将Buffer对应的设备内存释放，从而提高Buffer 对应的设备内存的周转效率。
610、计算机设备通过Buffer管理器向计算机设备中的任务调度器发送第三通知消息。
611、计算机设备通过任务调度器解除被依赖任务对该目标任务的依赖关系。
步骤610至步骤611与前述图4中的步骤418至步骤419类似，具体此处不再赘述。
612、计算机设备通过任务调度器向计算机设备中的Buffer管理器发送该目标任务。
当该任务调度器通过判断确定不存在预存数据，那么任务调度器可以向Buffer管理器发送该目标任务，那么Buffer管理器接收到该Buffer释放任务信息后，会按照前述图4中释放Buffer的过程执行该Buffer释放任务。
613、计算机设备通过Buffer管理器向计算机设备中的任务调度器发送第四通知消息。
614、计算机设备通过任务调度器解除被依赖任务与该目标任务的依赖关系。
步骤613至步骤614与前述图4中的步骤418至步骤419类似，具体此处不再赘述。
615、若目标任务的任务类型为Buffer申请任务，计算机设备通过任务调度器向计算机设备中的Buffer管理器向目标任务。
当任务调度器确定该目标任务的任务类型为Buffer申请任务时，该任务调度器可以向Buffer管理器发送该目标任务，然后该Buffer管理器可以按照前述图4中Buffer申请的过程对该Buffer进行申请。
616、计算机设备通过Buffer管理器向计算机设备中的任务调度器发送第五通知消息。
当该Buffer管理器按照前述图4的Buffer申请的过程对该Buffer进行申请完成后，该Buffer管理器可以向任务调度器发送第五通知消息，该第五通知消息用于通知该任务调度器该Buffer已经申请完成。
617、计算机设备通过任务调度器判断是否存在预加载数据，若是，则执行步骤618；若否，则执行步骤619。
任务调度器接收到第五通知消息之后，可以确定该Buffer已经申请成功，那么任务调度器可以判断是否存在预加载数据，如果存在，那么执行步骤618；如果不存在，那么执行步骤619。比如，当在后续依赖该Buffer的异构计算任务需要读写该Buffer对应的设备内存中的数据，该数据需要先预加载至该Buffer对应的设备内存中，那么该任务调度器可以通过判断确定存在该预加载数据，为后续对应的计算单元执行该异构计算任务做好数据拷贝。
618、计算机设备通过任务调度器向计算机设备中的Buffer管理器发送拷贝预加载数据任务。
任务调度器确定存在预加载数据，那么此时任务调度器可以向Buffer管理器发送拷贝该预加载数据的任务，如图8所示，该拷贝预加载数据任务中包含该预加载preload数据的源地址、预加载preload数据长度、该预加载preload数据在Buffer中的偏移量等信息。
619、计算机设备通过任务调度器解除被依赖任务对该目标任务的依赖关系。
当任务调度器通过判断确定不存在预加载数据时，任务调度器可以解除该依赖该Buffer申请任务的任务与该Buffer申请任务的依赖关系。
620、计算机设备通过Buffer管理器向计算机设备中的任务调度器发送第六通知消息。
当该DMA执行完成该拷贝预加载数据任务之后，该Buffer管理器可以向任务调度器发送第六通知消息，该第六通知消息用于通知该任务调度器执行该拷贝预加载数据任务完成。
621、计算机设备通过任务调度器解除被依赖任务与目标任务的依赖关系。
任务调度器接收到第六通知消息之后，可以确定该预加载数据拷贝任务完成，那么任务调度器可以解除该依赖该Buffer申请任务的任务与该Buffer申请任务的依赖关系。
622、若该目标任务的任务类型为异构计算任务，计算机设备通过任务调度器根据该目标任务携带的依赖任务组ID在计算机设备中的Buffer资源池中获取对应的Buffer表项。
当该目标任务的任务类型为异构计算任务时，任务调度器可以根据该目标任务中携带的依赖任务组ID从Buffer资源池中获取对应的表项。比如，如表4所示，比如该目标任务中携带的依赖任务组ID为依赖任务组1对应的ID，那么可以确定该依赖任务组1对应的Buffer表项为表7；或者比如当该目标任务中携带的依赖任务组ID为依赖任务组2对应的ID，那么可以确定该依赖任务组2对应的Buffer表项为表9所示：
表9
内存大小 内存位置 内存地址
1000 全局 0x2014a
623、计算机设备通过任务调度器判断该目标任务对应的Buffer内存位置是否为局部内存，若是，则执行步骤624；若否，则执行步骤627。
任务调度器可以判断该目标任务对应的Buffer内存位置是否为局部内存，如果该Buffer内存位置为局部内存，那么执行步骤624；如果该Buffer内存位置不为局部内存，那么执行步骤627。比如，在任务调度器确定该依赖任务组ID对应的Buffer表项为表7，那么可知，该Buffer对应的内存位置为局部内存1，所以任务调度器可以确定该Buffer内存位置为局部内存。
624、计算机设备通过任务调度器向该计算机设备中的Buffer局部内存对应的计算单元发送目标任务。
任务调度器确定该Buffer对应的内存位置为局部内存，那么任务调度器可以向该Buffer局部内存对应的计算单元发送该目标任务，然后，该计算单元接收到该目标任务之后，该计算单元可以从该目标任务中获取对应的Buffer内存地址，然后该计算单元将该Buffer内存地址设置为该目标任务的一个隐式参数，计算单元设置完该异构计算任务的输入参数之后，就可以启动执行该异构计算任务。
具体的，该计算单元将该Buffer内存地址设置为该目标任务的一个隐式参数，该隐式参数可以存储于预设的寄存器地址中或者预设的设备内存地址中，计算单元通过读取该预设的寄存器地址或者该预设的设备内存地址来确定Buffer内存地址。
本实施例中，任务调度器能够支持设备局部内存的Buffer分配管理，由于全局内存的访存性能差于局部内存，所以当要求访存性能较高的异构计算任务进行数据交换时可以通过申请设备局部内存来执行该异构计算任务，充分利用了局部内存访问性能较高的性能；本申请的数据处理方法能够支持数据交换的Buffer在设备内存任何层级内存申请对应的内存，因此能够满足多样化的设备内存场景，从而满足不同应用场景需求。
625、计算机设备通过Buffer局部内存对应计算单元向计算机设备中的任务调度器发送第七通知消息。
626、计算机设备通过任务调度器解除被依赖任务与该目标任务的依赖关系。
步骤625至步骤626与前述图5中步骤517至步骤518类似，具体请参照图5中步骤517至步骤518，具体此处不再赘述。
627、计算机设备通过任务调度器向计算机设备中负载量最小的计算单元发送目标任务。
当该目标任务对应的Buffer内存位置不为局部内存，那么任务调度器可以从全局内存对应的计算单元中确定当前负载量最小的计算单元，然后向该负载量最小的计算单元发送该目标任务，然后该负载量最小的计算单元会从该目标任务中获取对应的Buffer内存地址，然后将该Buffer内存地址设置为该异构计算任务的一个隐式参数，然后可以执行该异构计算任务。
628、计算机设备通过负载量最小的计算单元向计算机设备中的任务调度器发送第八通知消息。
629、计算机设备通过任务调度器解除被依赖任务与该目标任务的依赖关系。
步骤628至步骤629与前述图5中步骤520至步骤521类似，具体此处不再赘述。
本申请实施例中，计算机设备通过任务调度器从计算机设备中的任务缓存池中获取目标任务，该目标任务为其前继任务已完成，且该目标任务的后继任务待执行的任务，该前继任务任务与该后继任务在逻辑上存在顺序依赖关系；然后，计算机设备通过任务调度器确定该目标任务的任务类型，任务调度器可以根据该目标任务的任务类型以及该目标任务调用相应的模块执行该目标任务。因此，该任务调度器从任务缓存池中获取的目标任务，该目标任务为其前继任务已完成，且该目标任务的后继任务待执行的任务，该前继任务任务与该后继任务在逻辑上存在顺序依赖关系；当该目标任务的任务类型为Buffer申请任务或者Buffer释放任务时，那么对于Buffer的申请，可以真正延后至该Buffer申请任务的前继任务执行完成后，计算机设备通过任务调度器再调用计算机设备中的Buffer管理器来执行该Buffer申请任务；对于Buffer的释放，可以提前至该Buffer释放任务的前继任务完成时计算机设备通过任务调度器向计算机设备中的Buffer管理器立即派发该Buffer释放任务，从而提高了Buffer对应的设备内存的周转效率。
本申请实施例中，当目标任务的任务类型只有异构计算任务时，此时计算机设备通过任务生成装置只会创建异构计算任务，且该异构计算任务可以携带有Buffer的相关信息，还可以携带有预存数据和/或预加载数据的相关信息。那么计算机设备可以通过任务调度器器根据异构计算任务携带的信息调用计算机设备中相应的模块执行相应的任务，下面通过图9的实施例进行详细说明。
请参阅图9，在图9的实施例中，计算机设备通过任务调度器根据异构计算任务中携带的异构计算任务的ID来调用计算机设备中相应的模块来执行任务，本申请实施例数据处理方法的另一个实施例包括：
901、计算机设备通过任务调度器从计算机设备中任务缓存池中获取异构计算任务。
计算机设备通过应用例程模块运行代码的运行过程中，应用例程模块会调用计算机设备中的异构计算运行时模块的任务生成装置的应用程序编程接口，然后将相应的应用程序编程接口参数输入到任务生成装置中，然后任务生成装置根据应用程序编程接口参数来生成异构计算任务。其中，在任务类型只有异构计算任务时，该计算机设备中的Buffer资源池可以是以异构计算任务为维度的数据表，例如可以如表10所示的Buffer资源池。任务生成装置可以是根据应用程序编程接口参数来填写异构计算任务的Buffer表项，然后再创建该异构计算任务，该异构计算任务可以携带Buffer的相关信息，还可以携带预加载数据的相关信息与预存数据的相关信息，其中，该Buffer的相关信息可以包括Buffer的内存大小以及Buffer的内存位置等，该预加载数据的相关信息可以包括预加载数据的源地址、预加载数据长度以及预加载数据在Buffer中的偏移地址等，该预存数据的相关信息可以包括预存数据保存地址、预存数据长度以及预存数据在Buffer中的偏移地址等。比如，如表10中异构计算任务3对应的Buffer，其内存大小为30，内存位置为局部2，内存地址为null空地址。需要说明的是，当该异构计算任务的执行不需要依赖于Buffer时，那么此时任务生成装置则不需要从计算机设备中的Buffer资源池申请该异构计算任务对应的Buffer表项，只需要创建该异构计算任务，然后调用相应的计算单元执行该异构计算任务即可。任务调度器从计算机设备中的任务缓存池中获取异构计算任务，该异构计算任务为前继任务已完成且其后继任务待执行的任务，该前继任务与该后继任务存在逻辑上顺序依赖关系。
表10
Figure PCTCN2019087923-appb-000003
902、计算机设备通过任务调度器判断是否需要申请Buffer，若是，则执行步骤905；若否，则执行步骤903。
任务调度器获取到该异构计算任务时，判断是否需要申请Buffer，若不需要，那么执行步骤905，若需要，那么执行步骤903。具体可以是任务调度器根据该异构计算任务的ID确定是否有对应的Buffer表项，且该Buffer表项的内存地址为空地址。
903、计算机设备通过任务调度器向计算机设备中的负载量最小的计算单元发送异构计算任务。
任务调度器确定不需要申请Buffer之后，任务调度器可以直接调度用负载量最小的计算单元执行该异构计算任务。因此，在任务类型只有异构计算任务时，任务调度器无需判断任务类型，直接调用相应的计算单元执行该异构计算任务，所以在这种应用场景中，任务调度器执行该异构计算任务数据交换的过程更为简易，处理过程开销更小。
904、计算机设备通过负载量最小的计算单元发送第一通知消息至计算机设备中的任务 调度器。
该负载量最小的计算单元执行完成该异构计算任务之后，可以向任务调度器发送第一通知消息，以通知任务调度器执行完成该异构计算任务。
905、计算机设备通过任务调度器向计算机设备中的Buffer管理器发送Buffer申请任务。
任务调度器确定需要申请Buffer之后，计算机设备中的任务生成装置会根据异构计算任务携带的Buffer的相关信息生成Buffer申请任务，且该Buffer申请任务携带有该异构计算任务的ID，然后向计算机设备中的Buffer管理器发送该Buffer申请任务。
906、计算机设备通过Buffer管理器执行该Buffer申请任务。
Buffer管理器接收到该Buffer申请任务之后，该Buffer管理器可以执行该Buffer申请任务。具体的Buffer申请任务过程与前述图4中Buffer的申请过程类似，区别只在于在本实施例中，是通过异构计算任务的ID来获取到对应的Buffer表项，其余流程与图4中Buffer管理器申请Buffer流程类似，具体此处不再赘述。
907、计算机设备通过Buffer管理器向计算机设备中的任务调度器发送第二通知消息。
Buffer管理器执行完成该Buffer申请任务之后，Buffer管理器可以向任务调度器发送第二通知消息，以通知该任务调度器该Buffer申请任务执行完成。
908、计算机设备通过任务调度器判断是否存在预加载数据，若是，则执行步骤911；若否，则执行步骤909。
任务调度器获取到异构计算任务之后，根据该异构计算任务携带的预加载数据的相关信息判断是否存在预加载数据，如果存在，那么执行步骤911，如果不存在，那么执行步骤909。其中，异构计算任务携带的预加载数据相关信息可以包括该预加载preload数据的源地址、预加载preload数据长度、该预加载preload数据在Buffer中的偏移量等信息，具体请参阅图8所示，图8为预加载数据的相关信息的示意图。
909、计算机设备通过任务调度器发送异构计算任务至计算机设备中负载量最小的计算单元。
如果不存在预加载数据，任务调度器可以向负载量最小的计算单元发送异构计算任务。
910、计算机设备通过负载量最小的计算单元发送第三通知消息至计算机设备中的任务调度器。
步骤910与前述步骤904类似，具体此处不再赘述。
911、计算机设备通过任务调度器通过计算机设备中的数据搬移发射器向计算机设备中的DMA发送拷贝预加载数据的任务。
步骤911与前述图6中的步骤618类似，具体此处不再赘述。
912、计算机设备通过任务调度器接收计算机设备中的DMA发送的第四通知消息。
步骤912与前述图6中的步骤620类似，具体此处不再赘述。
913、计算机设备通过任务调度器判断计算机设备中的Buffer对应的设备内存是否局部内存，若是，则执行步骤914；若否，则执行步骤916。
914、计算机设备通过任务调度器向计算机设备中的局部内存对应的计算单元发送异构 计算任务。
915、计算机设备通过任务调度器接收计算机设备中的局部内存对应的计算单元发送的第五通知消息。
步骤913至步骤915与前述图6中的步骤623至步骤625类似，具体此处不再赘述。
916、计算机设备通过任务调度器向计算机设备中的负载量最小的计算单元发送异构计算任务。
917、计算机设备通过任务调度器接收计算机设备中的负载量最小的计算单元发送的第六通知消息。
步骤916至步骤917与前述图6中的步骤627至步骤628类似，具体此处不再赘述。
918、计算机设备通过任务调度器判断存在预存数据，若是，则执行步骤922；若否，则执行步骤919。
任务调度器根据异构计算任务确定是否存在预存数据，若存在，则执行步骤922，若不存在，则执行步骤919，具体的，该异构计算任务如果携带预存数据的相关信息，则说明存在预存数据，那么该预存数据的相关信息可以包括预存数据的保存地址、保存数据长度以及保存数据在该Buffer释放任务对应的Buffer中的偏移量，具体如图7所示，图7为预存prestore数据在Buffer中的Buffer偏移量、prestore数据长度以及prestore数据目标地址；如果该异构计算任务没有携带预存数据的相关信息，那么说明不存在预存数据。
919、计算机设备通过任务调度器向该计算机设备中的Buffer管理器发送Buffer释放任务。
任务调度器确定不存在预存数据之后，该计算机设备通过任务生成装置根据异构计算任务的Buffer的相关信息生成Buffer释放任务，其中，该Buffer释放任务携带该异构计算任务的ID，然后计算机设备通过任务调度器将该Buffer释放任务发送至该计算机设备中的Buffer管理器。
920、计算机设备通过Buffer管理器执行该Buffer释放任务。
Buffer管理器接收到Buffer释放任务之后，Buffer管理器可以根据异构计算任务的ID获取到对应的Buffer表项，然后对应的Buffer释放过程与前述图6中的Buffer释放过程类似，具体此处不再赘述。
921、计算机设备通过Buffer管理器向计算机设备中的任务调度器发送第七通知消息。
步骤921与前述图6中的步骤613类似，具体此处不再赘述。
922、计算机设备通过任务调度器通过计算机设备中的数据搬移发射器向计算机设备中的DMA发送拷贝预存数据的任务。
923、计算机设备通过任务调度器接收计算机设备中的DMA发送的第八通知消息。
924、计算机设备通过任务调度器向计算机设备中的Buffer管理器发送Buffer释放任务。
925、计算机设备通过Buffer管理器向计算机设备中的任务调度器发送第九通知消息。
步骤922至步骤925与前述图6中的步骤607至步骤610类似，具体此处不再赘述。
本申请实施例中，计算机设备通过任务调度器从计算机设备中的任务缓存池中获取异构计算任务，该异构计算任务为其前继任务已完成，且其后继任务待执行的任务，该异构计算任务与该前继任务在逻辑上存在顺序依赖关系；然后计算机设备通过任务调度器根据该异构计算任务确定是否要申请Buffer，确定要申请Buffer的时候，任务调度器会向计算机设备中的Buffer管理器发送Buffer申请任务；当该异构计算任务执行完成时，该任务调度器会向Buffer管理器发送Buffer释放任务。因此，那么对于Buffer的申请，可以真正延后至该Buffer申请任务的前继任务执行完成后，计算机设备可以通过任务调度器再调用计算机设备中的Buffer管理器来执行该Buffer申请任务；对于Buffer的释放，可以提前至该Buffer释放任务的前继任务完成时计算机设备通过任务调度器向计算机设备中的Buffer管理器立即派发该Buffer释放任务，从而提高了Buffer对应的设备内存的周转效率。
上面对本申请实施例中的数据处理方法进行了描述，下面对本申请实施例中的计算机设备进行描述，请参阅图10，其中，第一确定单元1004、第二确定单元1005、第一更换单元1006、第二更换单元1007、判断单元1008、第三确定单元1009、设置单元1010、解除单元1011以及填写单元1012为可选单元，本申请实施例中计算机设备的一个实施例包括：
生成单元1001，用于生成目标任务，该目标任务包括Buffer申请任务或者Buffer释放任务，该目标任务为第一任务的后继任务，且为第二任务的前继任务，该第一任务和该第二任务为存在顺序依赖关系的待执行任务，其中，当该目标任务为该Buffer申请任务时，该第二任务执行时使用该Buffer申请任务所对应的Buffer，当该目标任务为该Buffer释放任务时，该第一任务执行时使用该Buffer释放任务所对应的Buffer；
获取单元1002，用于当该目标任务的前继任务已完成后且该目标任务的后继任务执行前，根据该目标任务获取该目标任务对应的Buffer表项，该Buffer表项为包含该目标任务对应的Buffer内存大小、该Buffer的内存位置以及该Buffer的内存地址的表项；
执行单元1003，用于执行该目标任务以申请或者释放该目标任务所对应的Buffer。
本实施例中，该目标任务包含该目标任务对应的Buffer的ID；该获取单元1002具体用于：
根据该内存ID获取该目标任务对应的Buffer表项。
本实施例中，该目标任务为Buffer申请任务，该执行单元1003具体用于：
从该Buffer表项中确定该Buffer的内存大小以及该Buffer的内存位置；
根据该Buffer的内存大小和该Buffer的内存位置为该Buffer确定对应的设备内存；
根据该设备内存更新该Buffer表项中的Buffer的内存地址。
本实施例中，该目标任务为Buffer释放任务；该执行单元1003具体用于：
从该Buffer表项中确定该目标任务对应的Buffer的内存地址；
释放该Buffer的内存地址对应的设备内存；
删除该Buffer表项。
本实施例中，该目标任务包含依赖任务组ID；该获取单元1002具体用于：
根据该依赖任务组ID获取该目标任务对应的Buffer表项。
本实施例中，该目标任务为Buffer申请任务；该执行单元1003具体用于：
判断该Buffer表项中的该目标任务对应的Buffer的内存位置是否位于局部内存；
若该Buffer的内存位置位于局部内存，则根据预设的策略确定目标局部内存；
根据该目标局部内存更新该Buffer表项中的该Buffer的内存地址以及该Buffer的内存位置；
若该Buffer的内存位置不位于局部内存，则将该Buffer内存位置设置为全局内存；
根据该全局内存更新该Buffer表项中的该Buffer的内存地址以及该Buffer的内存位置。
本实施例中，该目标任务为Buffer释放任务；该执行单元1003具体用于：
确定该Buffer表项中该目标任务对应的Buffer的内存地址；
释放该Buffer的内存地址对应的设备内存；
设置该Buffer表项中的该Buffer的内存地址为空地址。
本实施例中，该目标任务为Buffer申请任务；该计算机设备还包括：
第一确定单元1004，用于确定存在预加载数据；
该生成单元1001还用于：
生成拷贝该预加载数据的任务；
该执行单元1003还用于：
执行该拷贝所述预加载数据的任务。
本实施例中，该目标任务为Buffer释放任务；该计算机设备还包括：
第二确定单元1005，用于确定存在预存数据；
该生成单元1001还用于：
生成拷贝该预存数据的任务；
该执行单元1003还用于：
执行该拷贝所述预存数据的任务。
本实施例中，若该目标任务为内存拷贝任务，该目标任务中携带该内存拷贝任务对应的数据拷贝的源地址为合法的内存ID和/或该内存拷贝任务对应的数据拷贝的目的地址为合法的内存ID；该获取单元1002还用于：
根据该内存ID获取该内存ID对应的Buffer表项；
该计算机设备还包括：
第一更换单元1006，用于将该目标任务中携带的内存ID更换为该Buffer表项中该Buffer的内存地址；
该执行单元1003还用于：
执行内存拷贝任务。
本实施例中，若该目标任务为异构计算任务，且该目标任务的输入参数中包含合法的内存ID；该获取单元1002还用于：
根据该内存ID获取该内存ID对应的Buffer表项；
该计算机设备还包括：
第二更换单元1007，用于将该输入参数中的所述内存ID更换为该Buffer表项中的该Buffer的内存地址；
判断单元1008，用于判断该内存ID对应的Buffer内存位置是否位于局部内存；
该执行单元1003具体用于：
若该内存ID对应的Buffer内存位置位于局部内存，则根据该局部内存执行该异构计算任务。
本实施例中，若该目标任务为异构计算任务，且该目标任务包含依赖任务组ID，该获取单元1002具体用于：
获取该依赖任务组ID对应的Buffer表项；
该计算机设备还包括：
第三确定单元1009，用于确定该Buffer表项中的Buffer内存位置位于局部内存；
设置单元1010，用于将该Buffer表项中的Buffer内存地址设置为该异构计算任务的隐式参数；
该执行单元1003还用于：
根据该局部内存执行该异构计算任务。
本实施例中，该计算机设备还包括：
解除单元1011，用于解除依赖于该目标任务的任务与该目标任务的依赖关系。
本实施例中，该目标任务为Buffer申请任务；该生成单元1001具体用于：
为该目标任务所对应的Buffer申请Buffer表项以及该Buffer表项对应的内存ID；
根据应用程序编程接口参数填写该Buffer表项，该应用程序编程接口参数为该计算机设备调用该计算机设备的应用程序编程接口产生的参数，其中，该Buffer表项中Buffer内存地址为空地址；
根据该Buffer表项生成Buffer申请任务，该Buffer申请任务包含该Buffer表项对应的内存ID。
本实施例中，该目标任务为Buffer申请任务；该生成单元1001具体用于：
根据应用程序编程接口参数填写依赖任务组ID对应的Buffer表项，该应用程序编程接口参数为该计算机设备调用该计算机设备的应用程序编程接口产生的参数，其中，该Buffer表项中Buffer的内存地址为空地址；
根据该Buffer表项生成该Buffer申请任务，该Buffer申请任务包含依赖任务组ID。
本实施例中，该目标任务为Buffer释放任务；该Buffer释放任务包含有该Buffer释放任务对应的Buffer的内存ID。
本实施例中，该目标任务为Buffer释放任务，该Buffer释放任务包含该Buffer释放任务对应的Buffer的依赖任务组ID。
本实施例中，该目标任务为Buffer申请任务；该生成单元1001具体用于：
确定异构计算任务中携带有该目标任务所对应的Buffer的相关信息，该异构计算任务为该计算机设备生成的任务，该异构计算任务为该异构计算任务的前继任务已完成，且该 异构计算任务的后继任务待执行的任务，该Buffer的相关信息包括该异构计算任务所对应的Buffer的内存大小、该Buffer的内存地址以及该Buffer的内存位置；
根据该Buffer的相关信息填写该异构计算任务所对应的Buffer表项；
根据该Buffer表项生成Buffer申请任务。
本实施例中，该目标任务为Buffer释放任务；该生成单元1001具体用于：
确定异构计算任务中携带有该目标任务所对应的Buffer的相关信息，该异构计算任务为该计算机设备生成的任务，该异构计算任务为该异构计算任务的前继任务已完成，且该异构计算任务的后继任务待执行的任务，该Buffer的相关信息包括该异构计算任务所对应的Buffer的内存大小、该Buffer的内存地址以及该Buffer的内存位置；
获取该目标任务所对应的Buffer表项；
根据该Buffer表项生成Buffer释放任务。
本实施例中，该异构计算任务还包含有预加载数据的相关信息，该预加载数据的相关信息包括预加载数据的源地址、预加载数据长度以及预加载数据在所述Buffer中的偏移地址；该生成单元1001还用于：
根据该预加载数据的相关信息生成拷贝该预加载数据的任务；
该执行单元1003还用于：
执行该预加载数据的任务。
本实施例中，该异构计算任务还包含有预存数据的相关信息，该预存数据的相关信息包括该预存数据的保存地址、预存数据长度以及该预存数据在Buffer中的偏移地址；该生成单元1001还用于：
根据该预存数据的相关信息生成拷贝该预存数据的任务；
该执行单元1003还用于：
执行该拷贝该预存数据的任务。
本实施例中，该计算机设备还包括：
填写单元1012，用于根据应用程序编程接口参数填写该异构计算任务所对应的Buffer表项，该应用程序编程接口参数为该计算机设备设备调用该计算机设备的应用程序编程接口时产生的参数；
该生成单元1001还用于：
根据该Buffer表项生成该异构计算任务，该异构计算任务包含有该异构计算任务所对应的Buffer的相关信息。
本申请实施例中，生成单元1001生成目标任务，其中，该目标任务包括Buffer申请任务或者Buffer释放任务，该目标任务为第一任务的后继任务，且为第二任务的前继任务，该第一任务和第二任务为存在顺序依赖关系的待执行任务，其中，当该目标任务为该Buffer申请任务的时候，该第二任务执行时使用该Buffer申请任务所对应的Buffer，当该目标任务为该Buffer释放任务时，该第一任务执行时使用该Buffer释放任务所对应的Buffer，当该目标任务的前继任务已完成后且该目标任务的后继任务执行前，该获取单元1002可以根据该目标任务获取该目标任务对应的Buffer表项，其中，该Buffer表项为包含该目标 任务对应的Buffer的内存大小、该Buffer的内存位置以及该Buffer的内存地址的表项，然后该执行单元1003执行该目标任务以申请或者释放该目标任务所对应的Buffer。因此，计算机设备在对Buffer申请或者Buffer释放之前，计算机设备可以确定目标任务的前继任务执行完成之后，且目标任务的后继任务执行前，执行单元1003才会执行该目标任务，所以执行单元1003对该Buffer申请可以真正延后至目标任务的前继任务执行完成之后，且目标任务的后继任务执行前，以及执行单元1003对该Buffer的释放可以提前至该目标任务的前继任务完成后立即执行，从而提高了Buffer对应的设备内存的周转效率。
本申请还提供一种计算机设备1100，请参阅图11，本申请实施例中计算机设备一个实施例包括：
处理器1101、存储器1102、输入输出设备1103以及总线1104；
处理器1101、存储器1102、输入输出设备1103分别与总线1104相连，该存储器中存储有计算机指令；
该处理器1101用于生成目标任务，该目标任务包括Buffer申请任务或者Buffer释放任务，该目标任务为第一任务的后继任务，且为第二任务的前继任务，该第一任务和该第二任务为存在顺序依赖关系的待执行任务，其中，当该目标任务为该Buffer申请任务时，该第二任务执行时使用该Buffer申请任务所对应的Buffer，当该目标任务为该Buffer释放任务时，该第一任务执行时使用该Buffer释放任务所对应的Buffer；
该输入输出设备1103用于当该目标任务的前继任务已完成后且该目标任务的后继任务执行前，根据该目标任务获取该目标任务对应的Buffer表项，该Buffer表项为包含该目标任务对应的Buffer内存大小、该Buffer的内存位置以及该Buffer的内存地址的表项；
该处理器1101用于执行该目标任务以申请或者释放该目标任务所对应的Buffer。
一种可能的实现方式中，该目标任务包含该目标任务对应的Buffer的ID；该输入输出设备1103具体用于：
根据该内存ID获取该目标任务对应的Buffer表项。
另一种可能的实现方式中，该目标任务为Buffer申请任务，该处理器1101具体用于：
从该Buffer表项中确定该Buffer的内存大小以及该Buffer的内存位置；
根据该Buffer的内存大小和该Buffer的内存位置为该Buffer确定对应的设备内存；
根据该设备内存更新该Buffer表项中的Buffer的内存地址。
另一种可能的实现方式中，该目标任务为Buffer释放任务；该处理器1101具体用于：
从该Buffer表项中确定该目标任务对应的Buffer的内存地址；
释放该Buffer的内存地址对应的设备内存；
删除该Buffer表项。
另一种可能的实现方式中，该目标任务包含依赖任务组ID；该输入输出设备1103具体用于：
根据该依赖任务组ID获取该目标任务对应的Buffer表项。
另一种可能的实现方式中，该目标任务为Buffer申请任务；该处理器1101具体用于：
判断该Buffer表项中的该目标任务对应的Buffer的内存位置是否位于局部内存；
若该Buffer的内存位置位于局部内存，则根据预设的策略确定目标局部内存；
根据该目标局部内存更新该Buffer表项中的该Buffer的内存地址以及该Buffer的内存位置；
若该Buffer的内存位置不位于局部内存，则将该Buffer内存位置设置为全局内存；
根据该全局内存更新该Buffer表项中的该Buffer的内存地址以及该Buffer的内存位置。
另一种可能的实现方式中，该目标任务为Buffer释放任务；该处理器1101具体用于：
确定该Buffer表项中该目标任务对应的Buffer的内存地址；
释放该Buffer的内存地址对应的设备内存；
设置该Buffer表项中的该Buffer的内存地址为空地址。
另一种可能的实现方式中，该目标任务为Buffer申请任务；该处理器1101还用于：
确定存在预加载数据；
生成拷贝该预加载数据的任务；
执行该拷贝所述预加载数据的任务。
另一种可能的实现方式中，该目标任务为Buffer释放任务；该处理器1101还用于：
确定存在预存数据；
生成拷贝该预存数据的任务；
执行该拷贝所述预存数据的任务。
另一种可能的实现方式中，若该目标任务为内存拷贝任务，该目标任务中携带该内存拷贝任务对应的数据拷贝的源地址为合法的内存ID和/或该内存拷贝任务对应的数据拷贝的目的地址为合法的内存ID；该输入输出设备1103还用于：
根据该内存ID获取该内存ID对应的Buffer表项；
该处理器1101还用于：
将该目标任务中携带的内存ID更换为该Buffer表项中该Buffer的内存地址；
执行内存拷贝任务。
另一种可能的实现方式中，若该目标任务为异构计算任务，且该目标任务的输入参数中包含合法的内存ID；该输入输出设备1103还用于：
根据该内存ID获取该内存ID对应的Buffer表项；
该处理器1101还用于：
将该输入参数中的所述内存ID更换为该Buffer表项中的该Buffer的内存地址；
判断该内存ID对应的Buffer内存位置是否位于局部内存；
若该内存ID对应的Buffer内存位置位于局部内存，则根据该局部内存执行该异构计算任务。
另一种可能的实现方式中，若该目标任务为异构计算任务，且该目标任务包含依赖任务组ID，该输入输出设备1103还用于：
获取该依赖任务组ID对应的Buffer表项；
该处理器1101还用于：
确定该Buffer表项中的Buffer内存位置位于局部内存；
将该Buffer表项中的Buffer内存地址设置为该异构计算任务的隐式参数；
根据该局部内存执行该异构计算任务。
另一种可能的实现方式中，该处理器1101还用于：
解除依赖于该目标任务的任务与该目标任务的依赖关系。
另一种可能的实现方式中，该目标任务为Buffer申请任务；该处理器1101具体用于：
为该目标任务所对应的Buffer申请Buffer表项以及该Buffer表项对应的内存ID；
根据应用程序编程接口参数填写该Buffer表项，该应用程序编程接口参数为该计算机设备调用该计算机设备的应用程序编程接口产生的参数，其中，该Buffer表项中Buffer内存地址为空地址；
根据该Buffer表项生成Buffer申请任务，该Buffer申请任务包含该Buffer表项对应的内存ID。
另一种可能的实现方式中，该目标任务为Buffer申请任务；该处理器1101具体用于：
根据应用程序编程接口参数填写依赖任务组ID对应的Buffer表项，该应用程序编程接口参数为该计算机设备调用该计算机设备的应用程序编程接口产生的参数，其中，该Buffer表项中Buffer的内存地址为空地址；
根据该Buffer表项生成该Buffer申请任务，该Buffer申请任务包含依赖任务组ID。
另一种可能的实现方式中，该目标任务为Buffer释放任务；该Buffer释放任务包含有该Buffer释放任务对应的Buffer的内存ID。
另一种可能的实现方式中，该目标任务为Buffer释放任务，该Buffer释放任务包含该Buffer释放任务对应的Buffer的依赖任务组ID。
另一种可能的实现方式中，该目标任务为Buffer申请任务；该处理器1101具体用于：
确定异构计算任务中携带有该目标任务所对应的Buffer的相关信息，该异构计算任务为该计算机设备生成的任务，该异构计算任务为该异构计算任务的前继任务已完成，且该异构计算任务的后继任务待执行的任务，该Buffer的相关信息包括该异构计算任务所对应的Buffer的内存大小、该Buffer的内存地址以及该Buffer的内存位置；
根据该Buffer的相关信息填写该异构计算任务所对应的Buffer表项；
根据该Buffer表项生成Buffer申请任务。
另一种可能的实现方式中，该目标任务为Buffer释放任务；该处理器1101具体用于：
确定异构计算任务中携带有该目标任务所对应的Buffer的相关信息，该异构计算任务为该计算机设备生成的任务，该异构计算任务为该异构计算任务的前继任务已完成，且该异构计算任务的后继任务待执行的任务，该Buffer的相关信息包括该异构计算任务所对应的Buffer的内存大小、该Buffer的内存地址以及该Buffer的内存位置；
获取该目标任务所对应的Buffer表项；
根据该Buffer表项生成该Buffer释放任务。
另一种可能的实现方式中，该异构计算任务还包含有预加载数据的相关信息，该预加载数据的相关信息包括预加载数据的源地址、预加载数据长度以及预加载数据在所述 Buffer中的偏移地址；该处理器1101还用于：
根据该预加载数据的相关信息生成拷贝该预加载数据的任务；
执行该预加载数据的任务。
另一种可能的实现方式中，该异构计算任务还包含有预存数据的相关信息，该预存数据的相关信息包括该预存数据的保存地址、预存数据长度以及该预存数据在Buffer中的偏移地址；该处理器1101还用于：
根据该预存数据的相关信息生成拷贝该预存数据的任务；
执行该拷贝该预存数据的任务。
另一种可能的实现方式中，该处理器1101还用于：
根据应用程序编程接口参数填写该异构计算任务所对应的Buffer表项，该应用程序编程接口参数为该计算机设备设备调用该计算机设备的应用程序编程接口时产生的参数；
根据该Buffer表项生成该异构计算任务，该异构计算任务包含有该异构计算任务所对应的Buffer的相关信息。
所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，上述描述的***，装置和单元的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
在另一种可能的设计中，当该计算机设备为终端内的芯片时，芯片包括：处理单元和通信单元，所述处理单元例如可以是处理器，所述通信单元例如可以是输入/输出接口、管脚或电路等。该处理单元可执行存储单元存储的计算机执行指令，以使该终端内的芯片执行上述第一方面任意一项的数据处理方法。可选地，所述存储单元为所述芯片内的存储单元，如寄存器、缓存等，所述存储单元还可以是所述终端内的位于所述芯片外部的存储单元，如只读存储器(read-only memory，ROM)或可存储静态信息和指令的其他类型的静态存储设备，随机存取存储器(random access memory，RAM)等。
其中，上述任一处提到的处理器，可以是一个通用中央处理器(CPU)，微处理器，特定应用集成电路(application-specific integrated circuit，ASIC)，或一个或多个用于控制上述第一方面的数据处理方法的程序执行的集成电路。
在上述实施例中，可以全部或部分地通过软件、硬件、固件或者其任意组合来实现。当使用软件实现时，可以全部或部分地以计算机程序产品的形式实现。
所述计算机程序产品包括一个或多个计算机指令。在计算机上加载和执行所述计算机程序指令时，全部或部分地产生按照本发明实施例所述的流程或功能。所述计算机可以是通用计算机、专用计算机、计算机网络、或者其他可编程装置。所述计算机指令可以存储在计算机可读存储介质中，或者从一个计算机可读存储介质向另一计算机可读存储介质传输，例如，所述计算机指令可以从一个网站站点、计算机、服务器或数据中心通过有线(例如同轴电缆、光纤、数字用户线(DSL))或无线(例如红外、无线、微波等)方式向另一个网站站点、计算机、服务器或数据中心进行传输。所述计算机可读存储介质可以是计算机能够存储的任何可用介质或者是包含一个或多个可用介质集成的服务器、数据中心等数据存储设备。所述可用介质可以是磁性介质(例如，软盘、硬盘、磁带)、光介质(例如，DVD)、或者半导体介质(例如固态硬盘Solid State Disk(SSD))等。
在本申请所提供的几个实施例中，应该理解到，所揭露的***，装置和方法，可以通过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如，所述单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个***，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外，在本申请各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。上述集成的单元既可以采用硬件的形式实现，也可以采用软件功能单元的形式实现。
所述集成的单元如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本申请的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的全部或部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本申请各个实施例所述方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(ROM，Read-Only Memory)、随机存取存储器(RAM，Random Access Memory)、磁碟或者光盘等各种可以存储程序代码的介质。
以上所述，以上实施例仅用以说明本申请的技术方案，而非对其限制；尽管参照前述实施例对本申请进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施例技术方案的精神和范围。

Claims (47)

  1. 一种数据处理方法，其特征在于，所述方法包括：
    计算机设备生成目标任务，所述目标任务包括缓冲寄存器Buffer申请任务或者Buffer释放任务，所述目标任务为第一任务的后继任务，且为第二任务的前继任务，所述第一任务和所述第二任务为存在顺序依赖关系的待执行任务，其中，当所述目标任务为所述Buffer申请任务时，所述第二任务执行时使用所述Buffer申请任务所对应的Buffer，当所述目标任务为所述Buffer释放任务时，所述第一任务执行时使用所述Buffer释放任务所对应的Buffer；
    当所述目标任务的前继任务已完成后且所述目标任务的后继任务执行前，所述计算机设备根据所述目标任务获取所述目标任务对应的Buffer表项，所述Buffer表项为包含所述目标任务对应的Buffer的内存大小、所述Buffer的内存位置以及所述Buffer的内存地址的表项，并执行所述目标任务以申请或者释放所述目标任务所对应的Buffer。
  2. 根据权利要求1所述的方法，其特征在于，所述目标任务包含所述目标任务对应的Buffer的内存身份标识ID；所述计算机设备根据所述目标任务获取所述目标任务对应的Buffer表项包括：
    所述计算机设备根据所述内存ID获取所述目标任务对应的Buffer表项。
  3. 根据权利要求2所述的方法，其特征在于，所述目标任务为Buffer申请任务；所述并执行所述目标任务以申请或者释放所述目标任务的Buffer包括：
    所述计算机设备从所述Buffer表项中确定所述Buffer的内存大小以及所述Buffer的内存位置；
    所述计算机设备根据所述Buffer的内存大小和所述Buffer的内存位置为所述Buffer确定对应的设备内存；
    所述计算机设备根据所述设备内存更新所述Buffer表项中的Buffer的内存地址。
  4. 根据权利要求2所述的方法，其特征在于，所述目标任务为Buffer释放任务；所述并执行所述目标任务以申请或者释放所述目标任务的Buffer包括：
    所述计算机设备从所述Buffer表项中确定所述目标任务对应的Buffer的内存地址；
    所述计算机设备释放所述Buffer的内存地址对应的设备内存；
    所述计算机设备删除所述Buffer表项。
  5. 根据权利要求1所述的方法，其特征在于，所述目标任务包含依赖任务组ID；所述计算机设备根据所述目标任务获取所述目标任务对应的Buffer表项包括：
    所述计算机设备根据所述依赖任务组ID获取所述目标任务对应的Buffer表项。
  6. 根据权利要求5所述的方法，其特征在于，所述目标任务为Buffer申请任务；所述并执行所述目标任务以申请或者释放所述目标任务所对应的Buffer包括：
    所述计算机设备判断所述Buffer表项中的所述目标任务对应的Buffer的内存位置是否位于局部内存；
    若所述Buffer的内存位置位于局部内存，则所述计算机设备根据预设的策略确定目标局部内存；
    所述计算机设备根据所述目标局部内存更新所述Buffer表项中的所述Buffer的内存地址以及所述Buffer的内存位置；
    若所述Buffer的内存位置不位于局部内存，则所述计算机设备将所述Buffer内存位置设置为全局内存；
    所述计算机设备根据所述全局内存更新所述Buffer表项中的所述Buffer的内存地址以及所述Buffer的内存位置。
  7. 根据权利要求5所述的方法，其特征在于，所述目标任务为Buffer释放任务；所述并执行所述目标任务以申请或者释放所述目标任务所对应的Buffer包括：
    所述计算机设备确定所述Buffer表项中所述目标任务对应的Buffer的内存地址；
    所述计算机设备释放所述Buffer的内存地址对应的设备内存；
    所述计算机设备设置所述Buffer表项中的所述Buffer的内存地址为空地址。
  8. 根据权利要求1至3、5或6中的任一项所述的方法，其特征在于，所述目标任务为Buffer申请任务；所述计算机设备根据所述目标任务获取所述目标任务对应的Buffer表项，并执行所述目标任务以申请或者释放所述目标任务所对应的Buffer之后，所述方法还包括：
    所述计算机设备确定存在预加载数据；
    所述计算机设备生成拷贝所述预加载数据的任务；
    所述计算机设备执行所述拷贝所述预加载数据的任务。
  9. 根据权利要求1、2、4、5或7中的任一项所述的方法，其特征在于，所述目标任务为Buffer释放任务；所述计算机设备根据所述目标任务获取所述目标任务对应的Buffer表项，并执行所述目标任务以申请或者释放所述目标任务所对应的Buffer之前，所述方法还包括：
    所述计算机设备确定存在预存数据；
    所述计算机设备生成拷贝所述预存数据的任务；
    所述计算机设备执行所述拷贝所述预存数据的任务。
  10. 根据权利要求1所述的方法，其特征在于，若所述目标任务为内存拷贝任务，所述目标任务中携带所述内存拷贝任务对应的数据拷贝的源地址为合法的内存ID和/或所述内存拷贝任务对应的数据拷贝的目的地址为合法的内存ID；所述方法还包括：
    所述计算机设备根据所述内存ID获取所述内存ID对应的Buffer表项；
    所述计算机设备将所述目标任务中携带的内存ID更换为所述Buffer表项中所述Buffer的内存地址；
    所述计算机设备执行所述内存拷贝任务。
  11. 根据权利要求1所述的方法，其特征在于，若所述目标任务为异构计算任务，且所述目标任务的输入参数中包含合法的内存ID；所述方法还包括：
    所述计算机设备根据所述内存ID获取所述内存ID对应的Buffer表项；
    所述计算机设备将所述输入参数中的所述内存ID更换为所述Buffer表项中的所述Buffer的内存地址；
    所述计算机设备判断所述内存ID对应的Buffer内存位置是否位于局部内存；
    若所述内存ID对应的Buffer内存位置位于局部内存，则所述计算机设备根据所述局部内存执行所述异构计算任务。
  12. 根据权利要求1所述的方法，其特征在于，若所述目标任务为异构计算任务，且所述目标任务包含依赖任务组ID；所述方法还包括：
    所述计算机设备获取所述依赖任务组ID对应的Buffer表项；
    所述计算机设备确定所述Buffer表项中的Buffer内存位置位于局部内存；
    所述计算机设备将所述Buffer表项中的Buffer内存地址设置为所述异构计算任务的隐式参数；
    所述计算机设备根据所述局部内存执行所述异构计算任务。
  13. 根据权利要求1至12中的任一项所述的方法，其特征在于，所述计算机设备根据所述目标任务获取所述目标任务对应的Buffer表项，并执行所述目标任务以申请或者释放所述目标任务所对应的Buffer之后，所述方法还包括：
    所述计算机设备解除依赖于所述目标任务的任务与所述目标任务的依赖关系。
  14. 根据权利要求1至3中的任一项所述的方法，其特征在于，所述目标任务为Buffer申请任务；所述计算机设备生成所述目标任务包括：
    所述计算机设备为所述目标任务所对应的Buffer申请Buffer表项以及所述Buffer表项对应的内存ID；
    所述计算机设备根据应用程序编程接口参数填写所述Buffer表项，所述应用程序编程接口参数为所述计算机设备调用所述计算机设备的应用程序编程接口产生的参数，其中，所述Buffer表项中Buffer内存地址为空地址；
    所述计算机设备根据所述Buffer表项生成Buffer申请任务，所述Buffer申请任务包含所述Buffer表项对应的内存ID。
  15. 根据权利要求1、5或6中的任一项所述的方法，其特征在于，所述目标任务为Buffer申请任务；所述计算机设备生成所述目标任务包括：
    所述计算机设备根据应用程序编程接口参数填写依赖任务组ID对应的Buffer表项，所述应用程序编程接口参数为所述计算机设备调用所述计算机设备的应用程序编程接口产生的参数，其中，所述Buffer表项中Buffer的内存地址为空地址；
    所述计算机设备根据所述Buffer表项生成所述Buffer申请任务，所述Buffer申请任务包含依赖任务组ID。
  16. 根据权利要求1、2或4中的任一项所述的方法，其特征在于，所述目标任务为Buffer释放任务；所述Buffer释放任务包含有所述Buffer释放任务对应的Buffer的内存ID。
  17. 根据权利要求1、5或7中的任一项所述的方法，其特征在于，所述目标任务为Buffer释放任务，所述Buffer释放任务包含所述Buffer释放任务对应的Buffer的依赖任务组ID。
  18. 根据权利要求1所述的方法，其特征在于，所述目标任务为Buffer申请任务；所 述计算机设备生成所述目标任务包括：
    所述计算机设备确定异构计算任务中携带有所述目标任务所对应的Buffer的相关信息，所述异构计算任务为所述计算机设备生成的任务，所述异构计算任务为所述异构计算任务的前继任务已完成，且所述异构计算任务的后继任务待执行的任务，所述Buffer的相关信息包括所述异构计算任务所对应的Buffer的内存大小、所述Buffer的内存地址以及所述Buffer的内存位置；
    所述计算机设备根据所述Buffer的相关信息填写所述异构计算任务所对应的Buffer表项；
    所述计算机设备根据所述Buffer表项生成Buffer申请任务。
  19. 根据权利要求1所述的方法，其特征在于，所述目标任务为Buffer释放任务；所述计算机设备生成所述目标任务包括：
    所述计算机设备确定异构计算任务中携带有所述目标任务所对应的Buffer的相关信息，所述异构计算任务为所述计算机设备生成的任务，所述异构计算任务为所述异构计算任务的前继任务已完成，且所述异构计算任务的后继任务待执行的任务，所述Buffer的相关信息包括所述异构计算任务所对应的Buffer的内存大小、所述Buffer的内存地址以及所述Buffer的内存位置；
    所述计算机设备获取所述目标任务所对应的Buffer表项；
    所述计算机设备根据所述Buffer表项生成所述Buffer释放任务。
  20. 根据权利要求18所述的方法，其特征在于，所述异构计算任务还包含有预加载数据的相关信息，所述预加载数据的相关信息包括预加载数据的源地址、预加载数据长度以及预加载数据在所述Buffer中的偏移地址；所述计算机设备根据所述目标任务获取所述目标任务对应的Buffer表项，并执行所述目标任务以申请或者释放所述目标任务所对应的Buffer之后，所述方法还包括：
    所述计算机设备根据所述预加载数据的相关信息生成拷贝所述预加载数据的任务；
    所述计算机设备执行拷贝所述预加载数据的任务。
  21. 根据权利要求19所述的方法，其特征在于，所述异构计算任务还包含有预存数据的相关信息，所述预存数据的相关信息包括所述预存数据的保存地址、预存数据长度以及所述预存数据在Buffer中的偏移地址；所述计算机设备根据所述目标任务获取所述目标任务对应的Buffer表项，并执行所述目标任务以申请或者释放所述目标任务所对应的Buffer之前，所述方法还包括：
    所述计算机设备根据所述预存数据的相关信息生成拷贝所述预存数据的任务；
    所述计算机设备执行所述拷贝所述预存数据的任务。
  22. 根据权利要求18或19所述的方法，其特征在于，所述计算机设备确定异构计算任务中携带有所述目标任务所对应的Buffer的相关信息之前，所述方法还包括：
    所述计算机设备根据应用程序编程接口参数填写所述异构计算任务所对应的Buffer表项，所述应用程序编程接口参数为所述计算机设备调用所述计算机设备的应用程序编程接口时产生的参数；
    所述计算机设备根据所述Buffer表项生成所述异构计算任务，所述异构计算任务包含有所述异构计算任务所对应的Buffer的相关信息。
  23. 一种计算机设备，其特征在于，所述计算机设备包括：
    生成单元，用于生成目标任务，所述目标任务包括Buffer申请任务或者Buffer释放任务，所述目标任务为第一任务的后继任务，且为第二任务的前继任务，所述第一任务和所述第二任务为存在顺序依赖关系的待执行任务，其中，当所述目标任务为所述Buffer申请任务时，所述第二任务执行时使用所述Buffer申请任务所对应的Buffer，当所述目标任务为所述Buffer释放任务时，所述第一任务执行时使用所述Buffer释放任务所对应的Buffer；
    获取单元，用于当所述目标任务的前继任务已完成后且所述目标任务的后继任务执行前，根据所述目标任务获取所述目标任务对应的Buffer表项，所述Buffer表项为包含所述目标任务对应的Buffer内存大小、所述Buffer的内存位置以及所述Buffer的内存地址的表项；
    执行单元，用于执行所述目标任务以申请或者释放所述目标任务所对应的Buffer。
  24. 根据权利要求23所述的计算机设备，其特征在于，所述目标任务包含所述目标任务对应的Buffer的ID；所述获取单元具体用于：
    根据所述内存ID获取所述目标任务对应的Buffer表项。
  25. 根据权利要求24所述的计算机设备，其特征在于，所述目标任务为Buffer申请任务，所述执行单元具体用于：
    从所述Buffer表项中确定所述Buffer的内存大小以及所述Buffer的内存位置；
    根据所述Buffer的内存大小和所述Buffer的内存位置为所述Buffer确定对应的设备内存；
    根据所述设备内存更新所述Buffer表项中的Buffer的内存地址。
  26. 根据权利要求24所述的计算机设备，其特征在于，所述目标任务为Buffer释放任务；所述执行单元具体用于：
    从所述Buffer表项中确定所述目标任务对应的Buffer的内存地址；
    释放所述Buffer的内存地址对应的设备内存；
    删除所述Buffer表项。
  27. 根据权利要求23所述的计算机设备，其特征在于，所述目标任务包含依赖任务组ID；所述执行单元具体用于：
    根据所述依赖任务组ID获取所述目标任务对应的Buffer表项。
  28. 根据权利要求27所述的计算机设备，其特征在于，所述目标任务为Buffer申请任务；所述执行单元具体用于：
    判断所述Buffer表项中的所述目标任务对应的Buffer的内存位置是否位于局部内存；
    若所述Buffer的内存位置位于局部内存，则根据预设的策略确定目标局部内存；
    根据所述目标局部内存更新所述Buffer表项中的所述Buffer的内存地址以及所述Buffer的内存位置；
    若所述Buffer的内存位置不位于局部内存，则将所述Buffer内存位置设置为全局内存；
    根据所述全局内存更新所述Buffer表项中的所述Buffer的内存地址以及所述Buffer的内存位置。
  29. 根据权利要求27所述的计算机设备，其特征在于，所述目标任务为Buffer释放任务；所述执行单元具体用于：
    确定所述Buffer表项中所述目标任务对应的Buffer的内存地址；
    释放所述Buffer的内存地址对应的设备内存；
    设置所述Buffer表项中的所述Buffer的内存地址为空地址。
  30. 根据权利要求23至25、27或28中的任一项所述的计算机设备，其特征在于，所述目标任务为Buffer申请任务；所述计算机设备还包括：
    第一确定单元，用于确定存在预加载数据；
    所述生成单元还用于：
    生成拷贝所述预加载数据的任务；
    所述执行单元还用于：
    执行所述拷贝所述预加载数据的任务。
  31. 根据权利要求23、24、26、27或29中的任一项所述的计算机设备，其特征在于，所述目标任务为Buffer释放任务；所述计算机设备还包括：
    第二确定单元，用于确定存在预存数据；
    所述生成单元还用于：
    生成拷贝所述预存数据的任务；
    所述执行单元还用于：
    执行所述拷贝所述预存数据的任务。
  32. 根据权利要求23所述的计算机设备，其特征在于，若所述目标任务为内存拷贝任务，所述目标任务中携带所述内存拷贝任务对应的数据拷贝的源地址为合法的内存ID和/或所述内存拷贝任务对应的数据拷贝的目的地址为合法的内存ID；所述获取单元还用于：
    根据所述内存ID获取所述内存ID对应的Buffer表项；
    所述计算机设备还包括：
    第一更换单元，用于将所述目标任务中携带的内存ID更换为所述Buffer表项中所述Buffer的内存地址；
    所述执行单元还用于：
    执行所述内存拷贝任务。
  33. 根据权利要求23所述的计算机设备，其特征在于，若所述目标任务为异构计算任务，且所述目标任务的输入参数中包含合法的内存ID；所述获取单元还用于：
    根据所述内存ID获取所述内存ID对应的Buffer表项；
    所述计算机设备还包括：
    第二更换单元，用于将所述输入参数中的所述内存ID更换为所述Buffer表项中的所 述Buffer的内存地址；
    判断单元，用于判断所述内存ID对应的Buffer内存位置是否位于局部内存；
    所述执行单元具体用于：
    若所述内存ID对应的Buffer内存位置位于局部内存，则根据所述局部内存执行所述异构计算任务。
  34. 根据权利要求23所述的计算机设备，其特征在于，若所述目标任务为异构计算任务，且所述目标任务包含依赖任务组ID，所述获取单元具体用于：
    获取所述依赖任务组ID对应的Buffer表项；
    所述计算机设备还包括：
    第三确定单元，用于确定所述Buffer表项中的Buffer内存位置位于局部内存；
    设置单元，用于将所述Buffer表项中的Buffer内存地址设置为所述异构计算任务的隐式参数；
    所述执行单元还用于：
    根据所述局部内存执行所述异构计算任务。
  35. 根据权利要求23至34中的任一项所述的计算机设备，其特征在于，所述计算机设备还包括：
    解除单元，用于解除依赖于所述目标任务的任务与所述目标任务的依赖关系。
  36. 根据权利要求23至25中的任一项所述的计算机设备，其特征在于，所述目标任务为Buffer申请任务；所述生成单元具体用于：
    为所述目标任务所对应的Buffer申请Buffer表项以及所述Buffer表项对应的内存ID；
    根据应用程序编程接口参数填写所述Buffer表项，所述应用程序编程接口参数为所述计算机设备调用所述计算机设备的应用程序编程接口产生的参数，其中，所述Buffer表项中Buffer内存地址为空地址；
    根据所述Buffer表项生成Buffer申请任务，所述Buffer申请任务包含所述Buffer表项对应的内存ID。
  37. 根据权利要求23、27或28中的任一项所述的计算机设备，其特征在于，所述目标任务为Buffer申请任务；所述生成单元具体用于：
    根据应用程序编程接口参数填写依赖任务组ID对应的Buffer表项，所述应用程序编程接口参数为所述计算机设备调用所述计算机设备的应用程序编程接口产生的参数，其中，所述Buffer表项中Buffer的内存地址为空地址；
    根据所述Buffer表项生成所述Buffer申请任务，所述Buffer申请任务包含依赖任务组ID。
  38. 根据权利要求23、24或26中的任一项所述的计算机设备，其特征在于，所述目标任务为Buffer释放任务；所述Buffer释放任务包含有所述Buffer释放任务对应的Buffer的内存ID。
  39. 根据权利要求23、27或29中的任一项所述的计算机设备，其特征在于，所述目 标任务为Buffer释放任务，所述Buffer释放任务包含所述Buffer释放任务对应的Buffer的依赖任务组ID。
  40. 根据权利要求23所述的计算机设备，其特征在于，所述目标任务为Buffer申请任务；所述生成单元具体用于：
    确定异构计算任务中携带有所述目标任务所对应的Buffer的相关信息，所述异构计算任务为所述计算机设备生成的任务，所述异构计算任务为所述异构计算任务的前继任务已完成，且所述异构计算任务的后继任务待执行的任务，所述Buffer的相关信息包括所述异构计算任务所对应的Buffer的内存大小、所述Buffer的内存地址以及所述Buffer的内存位置；
    根据所述Buffer的相关信息填写所述异构计算任务所对应的Buffer表项；
    根据所述Buffer表项生成Buffer申请任务。
  41. 根据权利要求23所述的计算机设备，其特征在于，所述目标任务为Buffer释放任务；所述生成单元具体用于：
    确定异构计算任务中携带有所述目标任务所对应的Buffer的相关信息，所述异构计算任务为所述计算机设备生成的任务，所述异构计算任务为所述异构计算任务的前继任务已完成，且所述异构计算任务的后继任务待执行的任务，所述Buffer的相关信息包括所述异构计算任务所对应的Buffer的内存大小、所述Buffer的内存地址以及所述Buffer的内存位置；
    获取所述目标任务所对应的Buffer表项；
    根据所述Buffer表项生成所述Buffer释放任务。
  42. 根据权利要求40所述的计算机设备，其特征在于，所述异构计算任务还包含有预加载数据的相关信息，所述预加载数据的相关信息包括预加载数据的源地址、预加载数据长度以及预加载数据在所述Buffer中的偏移地址；所述生成单元还用于：
    根据所述预加载数据的相关信息生成拷贝所述预加载数据的任务；
    所述执行单元还用于：
    执行所述预加载数据的任务。
  43. 根据权利要求41所述的计算机设备，其特征在于，所述异构计算任务还包含有预存数据的相关信息，所述预存数据的相关信息包括所述预存数据的保存地址、预存数据长度以及所述预存数据在Buffer中的偏移地址；所述生成单元还用于：
    根据所述预存数据的相关信息生成拷贝所述预存数据的任务；
    所述执行单元还用于：
    执行所述拷贝所述预存数据的任务。
  44. 根据权利要求40或41所述的计算机设备，其特征在于，所述计算机设备还包括：
    填写单元，用于根据应用程序编程接口参数填写所述异构计算任务所对应的Buffer表项，所述应用程序编程接口参数为所述计算机设备设备调用所述计算机设备的应用程序编程接口时产生的参数；
    所述生成单元还用于：
    根据所述Buffer表项生成所述异构计算任务，所述异构计算任务包含有所述异构计算任务所对应的Buffer的相关信息。
  45. 一种计算机设备，其特征在于，所述计算机设备包括：处理器、存储器、收发器，所述处理器、存储器以及收发器通过总线连接，所述存储器存储有计算机指令，所述处理器通过执行所述计算机指令用于实现如权1至权22任意一项所述的数据处理方法。
  46. 一种包含指令的计算机程序产品，其特征在于，当其在计算机上运行时，使得所述计算机执行如权利要求1至22中任一项所述的方法。
  47. 一种计算机可读存储介质，其特征在于，包括指令，当所述指令在计算机上运行时，使得计算机执行如权利要求1至22中任一项所述的方法。
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CN110543351A (zh) 2019-12-06
CN110543351B (zh) 2023-11-17
EP3783484A4 (en) 2021-06-16
EP3783484A1 (en) 2021-02-24
US20210081249A1 (en) 2021-03-18
EP4372572A3 (en) 2024-07-17
EP4372572A2 (en) 2024-05-22

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