WO2019214266A1

WO2019214266A1 - Method and device for calculating crc code

Info

Publication number: WO2019214266A1
Application number: PCT/CN2018/125888
Authority: WO
Inventors: 林宪正; 张进毅; 王工艺; 沈建强
Original assignee: 华为技术有限公司; 中国科学技术大学
Priority date: 2018-05-08
Filing date: 2018-12-29
Publication date: 2019-11-14
Also published as: CN108628698A; CN108628698B

Abstract

The present application provides a method for calculating a CRC code, including: acquiring a first sequence to be coded; using at least one polynomial to code said first sequence, to generate a second sequence; using a primitive polynomial to code the second sequence, to generate a check sequence for said first sequence, each of said at least one polynomial being a multiple of the primitive polynomial, the number of terms of each polynomial of said at least one polynomial being less than the number of terms of the primitive polynomial. The method can reduce the complexity of calculating a CRC code, and improve the efficiency and performance of CRC coding.

Description

计算CRC编码的方法和装置Method and apparatus for calculating CRC coding

技术领域Technical field

本申请涉及信息技术领域，并且更具体地，涉及计算CRC编码的方法和装置。The present application relates to the field of information technology and, more particularly, to a method and apparatus for calculating CRC encoding.

背景技术Background technique

在存储***中，循环冗余校验(Cyclic Redundancy Check,CRC)编码是一种循环码，在存储***中的CRC编码通常使用基于伽罗华域GF(2)的本原多项式设计CRC编码方案。In the storage system, Cyclic Redundancy Check (CRC) coding is a cyclic code. The CRC coding in the storage system usually uses a primitive polynomial based on the Galois field GF(2) to design a CRC coding scheme. .

CRC编码原理：假设一个L比特的信息序列(信息取值为0或1)，a _L-1,a _L-2,…,a ₀，其中信息序列可以为待处理的数据，比如待存储或发送的数据，L比特的信息序列能够表示为一个多项式： Principle of CRC coding: Assume an L-bit information sequence (information value is 0 or 1), a _L-1 , a _L-2 ,..., a ₀ , where the information sequence can be data to be processed, such as to be stored or The transmitted data, the L-bit information sequence can be represented as a polynomial:

C(x)＝a _L-1x^(L-1)+a _L-2x ^{^}(L-2)+a _L-3x ^{^}(L-3)+…+a ₀ C(x)=a _L-1 x^(L-1)+a _L-2 x ^{^} (L-2)+a _L-3 x ^{^} (L-3)+...+a ₀

其中，a _L-1是信息序列的最高有效位(Most Significant Bit，MSB)，a ₀是信息序列的最低有效位(Least Significant Bit,LSB)，x^(L-1)表示X的L-1次幂或X的L-1次方。 Where a _L-1 is the Most Significant Bit (MSB) of the information sequence, a ₀ is the Least Significant Bit (LSB) of the information sequence, and x^(L-1) is the L- of X. 1 power or X L-1 power.

另外，m阶本原多项式G(m)满足：In addition, the m-th order primitive polynomial G(m) satisfies:

G(x)＝g _mx^m+g _m-1x^(m-1)+g _m-2x^(m-2)+…+g ₀ G(x)=g _m x^m+g _m-1 x^(m-1)+g _m-2 x^(m-2)+...+g ₀

则，计算C(x)的CRC编码可以表示为CRC(C(x))＝C(x)*x^m mod G(x)Then, the CRC code for calculating C(x) can be expressed as CRC(C(x))=C(x)*x^m mod G(x)

从上面的式子可以看出，CRC编码表示的是C(x)*x^m除以另一个固定的数G(x)之后的余数，其中“*”表示乘。As can be seen from the above equation, the CRC code represents the remainder after C(x)*x^m divided by another fixed number G(x), where "*" denotes multiplication.

在存储***中，为了对有效数据进行检错，存储***会对数据进行CRC编码，从而数据在存储或传输过程中发生错误后，存储***能快速的进行数据一致性校验，因此CRC编码是存储***中的必备特性。In the storage system, in order to perform error detection on valid data, the storage system CRC-encodes the data, so that after the data is stored or transmitted, the storage system can quickly perform data consistency check, so the CRC code is A must-have feature in the storage system.

已知一种现有的CRC编码方法，该方法在进行CRC编码操作时需要大量的移位操作和异或运算，增加了计算的复杂度，需要消耗大量的计算资原，从而影响了CRC编码的效率与性能。An existing CRC encoding method is known, which requires a large number of shift operations and exclusive OR operations in performing CRC encoding operations, which increases computational complexity and requires a large amount of computational resources, thereby affecting CRC encoding. Efficiency and performance.

发明内容Summary of the invention

本申请提供一种计算CRC编码的方法，能够降低计算CRC编码的复杂度，提高CRC编码的效率和性能。The present application provides a method for calculating CRC coding, which can reduce the complexity of calculating CRC coding and improve the efficiency and performance of CRC coding.

第一方面，提供了一种计算CRC编码的方法，包括：获取待编码的第一序列；使用至少一个多项式对所述待编码的第一序列进行编码，生成第二序列；使用本原多项式对所述第二序列进行编码，生成针对第一序列的校验序列，所述至少一个多项中每个多项式为所述本原多项式的倍式，所述至少一个多项式中每个多项式的项数少于所述本原多项式的项数。a first aspect, a method for calculating a CRC code, comprising: obtaining a first sequence to be encoded; encoding the first sequence to be encoded using at least one polynomial to generate a second sequence; using a primitive polynomial pair The second sequence is encoded to generate a check sequence for the first sequence, each of the at least one polynomial being a multiple of the primitive polynomial, and the number of terms of each polynomial of the at least one polynomial Less than the number of terms of the primitive polynomial.

在使用本原多项式计算待编码的数据(例如，第一序列)的CRC编码之前，通过本原多项式的至少一个倍式计算待编码的数据的CRC编码，获得中间序列(例如，第二序列)，再对该中间序列使用本原多项式计算该中间序列的CRC编码，从而避免仅使用本原多项式计算待编码的数据的CRC编码时，由于循环移位操作与异或运算的次数较多导致的CRC编码的计算复杂度较高的问题。Before calculating the CRC encoding of the data to be encoded (eg, the first sequence) using the primitive polynomial, calculating the CRC encoding of the data to be encoded by at least one multiple of the primitive polynomial to obtain an intermediate sequence (eg, the second sequence) And calculating, by using the primitive polynomial, the CRC encoding of the intermediate sequence, thereby avoiding using the primitive polynomial to calculate the CRC encoding of the data to be encoded, due to the number of times of the cyclic shift operation and the exclusive OR operation The computational complexity of CRC coding is high.

作为一种可选的实现方式，所述至少一个多项式包括第一多项式，所述第一多项式Q ₁(x)满足： As an optional implementation manner, the at least one polynomial includes a first polynomial, and the first polynomial Q ₁ (x) satisfies:

Q ₁(x)＝(x ³⁶⁹+x ³¹+1)·x ^a Q ₁ (x)=(x ³⁶⁹ +x ³¹ +1)·x ^a

其中，x ^a为调整系数，a是根据寄存器的容量确定的，且a为大于或等于0的整数，所述寄存器用于存储所述第一序列。 Where x ^a is an adjustment coefficient, a is determined according to the capacity of the register, and a is an integer greater than or equal to 0, and the register is used to store the first sequence.

具体地，作为示例而非限定，对于长度为4096的第一序列，在计算其CRC编码时，可以先使用本原多项式的倍式Q ₁(x)对其进行编码，获得第二序列(例如，该第二序列的长度为394或422)，再对该第二序列使用本原多项式进行编码，最终获得该第一序列的CRC编码。从而减少计算该第一序列时的循环移位操作与异或运算的次数，提高CRC编码的效率和性能。 Specifically, by way of example and not limitation, for the first sequence of length 4096, when calculating its CRC encoding, it may first be encoded using the polynomial Q ₁ (x) of the primitive polynomial to obtain a second sequence (eg, The length of the second sequence is 394 or 422), and the second sequence is encoded using a primitive polynomial, and finally the CRC code of the first sequence is obtained. Thereby reducing the number of cyclic shift operations and exclusive OR operations when calculating the first sequence, and improving the efficiency and performance of CRC coding.

作为另一种可选的实现方式，所述至少一个多项式包括第二多项式，所述第二多项式Q ₂(x)满足： As another optional implementation manner, the at least one polynomial includes a second polynomial, and the second polynomial Q ₂ (x) satisfies:

Q ₂(x)＝(x ⁶⁵⁵³⁵+1)·x ^b Q ₂ (x)=(x ⁶⁵⁵³⁵ +1)·x ^b

其中，x ^b为调整系数，b是根据寄存器的容量确定的，且b为大于或等于0的整数，所述寄存器用于存储所述第一序列。 Where x ^b is an adjustment coefficient, b is determined according to the capacity of the register, and b is an integer greater than or equal to 0, and the register is used to store the first sequence.

具体地，作为示例而非限定，对于长度为4194304的第一序列，在计算其CRC编码时，可以先使用本原多项式的倍式Q ₂(x)对其进行编码，获得第二序列，再对该第二序列使用本原多项式进行编码，最终获得该第一序列的CRC编码，从而减少计算该第一序列时的循环移位操作与异或运算的次数，提高CRC编码的效率和性能。 Specifically, by way of example and not limitation, for the first sequence of length 4194304, when calculating its CRC code, it may first encode the original polynomial by using the multiplet Q ₂ (x) to obtain the second sequence, and then The second sequence is encoded by using a primitive polynomial, and finally the CRC encoding of the first sequence is obtained, thereby reducing the number of cyclic shift operations and exclusive OR operations when calculating the first sequence, and improving the efficiency and performance of the CRC encoding.

此外，通过调整系数对该本原多项式的倍式(例如，Q ₁(x)或Q ₂(x))进行调整(例如，经过调整，使得根据本原多项式的倍式对第一序列划分后获得的每个数据段均能够占满整数个寄存器)，使得利用调整后的本原多项式的倍式计算第一序列的CRC编码时能够充分利用寄存器的硬件资源。 Furthermore, the multiple of the primitive polynomial (eg, Q ₁ (x) or Q ₂ (x)) is adjusted by an adjustment factor (eg, adjusted such that the first sequence is divided according to the ploidy of the primitive polynomial Each of the obtained data segments can occupy an integer number of registers, so that the hardware resources of the registers can be fully utilized when calculating the CRC encoding of the first sequence by using the multiple of the adjusted primitive polynomial.

作为示例而非限定，所述对待编码的第一序列使用至少一个多项式进行编码，生成第二序列，包括：对所述待编码的第一序列使用所述第二多项式进行编码，生成第三序列；对所述第三序列使用所述第一多项式进行编码，生成所述第二序列。By way of example and not limitation, the first sequence to be encoded is encoded using at least one polynomial, and the second sequence is generated, including: encoding, by using the second polynomial, the first sequence to be encoded, generating a third sequence; encoding the third sequence using the first polynomial to generate the second sequence.

具体地，对于较长的第一序列(例如，第一序列的长度为4194304)，在计算该第一序列的CRC编码时，可以先使用本原多项式的一个倍式(例如，Q ₂(x))对该第一序列进行编码，获得一个中间序列(例如，第三序列)，再使用本原多项式的另一个倍式(例如，Q ₁(x))对该第三序列进行编码，获得另一个中间序列(例如，第二序列)，再对该第二序列使用本原多项式进行编码，最终获得该第一序列的CRC编码，从而减少计算该第一序列时的循环移位操作与异或运算的次数，提高CRC编码的效率和性能。 Specifically, for a longer first sequence (eg, the length of the first sequence is 4194304), when calculating the CRC encoding of the first sequence, a doubling of the primitive polynomial may be used first (eg, Q ₂ (x )) encoding the first sequence to obtain an intermediate sequence (eg, a third sequence), and encoding the third sequence using another multiple of the primitive polynomial (eg, Q ₁ (x)) Another intermediate sequence (for example, the second sequence) is further encoded by using the primitive polynomial for the second sequence, and finally the CRC encoding of the first sequence is obtained, thereby reducing the cyclic shift operation and the difference when calculating the first sequence. The number of OR operations increases the efficiency and performance of CRC encoding.

对于本原多项式而言，一个本原多项式通常会存在多个该本原多项式的倍式，对于待编码的第一序列，需要从该本原多项式的多个倍式中确定用于计算该第一序列的CRC编码的倍式。For a primitive polynomial, a primitive polynomial usually has a plurality of multiples of the primitive polynomial, and for the first sequence to be encoded, it is determined from a plurality of multiples of the primitive polynomial for calculating the first A sequence of CRC encoded octaves.

作为示例而非限定，可以根据该第一序列的长度，从该本原多项式的多个倍式中确定用于计算该第一序列的CRC编码的倍式。By way of example and not limitation, a octet for calculating the CRC encoding of the first sequence may be determined from a plurality of multiples of the primitive polynomial based on the length of the first sequence.

例如，当该第一序列的长度为4096时，从该本原多项式的多个倍式中将Q ₁(x)确定为用于计算该第一序列的CRC编码的倍式。 For example, when the length of the first sequence is 4096, Q ₁ (x) is determined from a plurality of multiples of the primitive polynomial as a ploid for calculating the CRC encoding of the first sequence.

此外，在确定用于计算该第一序列的CRC编码的倍式时，还可以进一步遵循以下原则：Furthermore, in determining the octave used to calculate the CRC encoding of the first sequence, the following principles can be further followed:

本原多项式的倍式的有效项的项数较少，和/或本原多项式的倍式的最高项的指数与次高项的指数的差值较大。The number of items of the valid term of the polynomial of the primitive polynomial is small, and/or the difference between the index of the highest term of the multiplet of the primitive polynomial and the index of the next highest term is larger.

第二方面，提供一种计算CRC编码的装置，所述装置用于执行上述第一方面或第一方面的任一可能的实现方式中的方法。具体地，所述装置可以包括用于执行第一方面或第一方面的任一可能的实现方式中的方法的模块。In a second aspect, there is provided apparatus for calculating a CRC code, the apparatus for performing the method of any of the first aspect or the first aspect of the first aspect. In particular, the apparatus may comprise means for performing the method of the first aspect or any of the possible implementations of the first aspect.

第三方面，提供一种计算CRC编码的装置，所述装置包括接口、存储器和处理器，所述存储器用于存储指令，所述处理器用于执行所述存储器存储的指令，并且对所述存储器中存储的指令的执行使得所述处理器执行第一方面或第一方面的任一可能的实现方式中的方法。In a third aspect, an apparatus for calculating a CRC code is provided, the apparatus comprising an interface for storing instructions, the processor for executing the instructions stored by the memory, and to the memory Execution of the instructions stored in the processor causes the processor to perform the method of the first aspect or any of the possible implementations of the first aspect.

第四方面，提供一种芯片，所述芯片包括接口、存储器和处理器，所述存储器用于存储指令，所述处理器用于执行所述存储器存储的指令，并且对所述存储器中存储的指令的执行使得所述处理器执行第一方面或第一方面的任一可能的实现方式中的方法。In a fourth aspect, a chip is provided, the chip comprising an interface for storing instructions, the processor for executing the instructions stored by the memory, and instructions stored in the memory Execution of the processor causes the processor to perform the method of the first aspect or any of the possible implementations of the first aspect.

第五方面，提供一种计算机可读存储介质，所述计算机可读存储介质中存储有指令，当所述指令在计算机上运行时，使得计算机执行第一方面或第一方面的任一可能的实现方式中的方法。In a fifth aspect, a computer readable storage medium is provided, wherein the computer readable storage medium stores instructions that, when executed on a computer, cause the computer to perform any of the first aspect or the first aspect The method in the implementation.

第六方面，提供一种包含指令的计算机程序产品，当该计算机程序产品在计算机上运行时，使得计算机执行第一方面或第一方面的任一可能的实现方式中的方法。In a sixth aspect, a computer program product comprising instructions for causing a computer to perform the method of any of the first aspect or the first aspect of the first aspect when the computer program product is run on a computer.

附图说明DRAWINGS

图1是本申请实施例的存储阵列架构示意图。FIG. 1 is a schematic diagram of a storage array architecture of an embodiment of the present application.

图2是本申请实施例的存储阵列的控制器的示意图。2 is a schematic diagram of a controller of a memory array in accordance with an embodiment of the present application.

图3是本申请实施例的分布式块存储***的示意图。3 is a schematic diagram of a distributed block storage system in accordance with an embodiment of the present application.

图4是分布式块存储***的服务器的示意性结构框图。4 is a schematic structural block diagram of a server of a distributed block storage system.

图5是现有技术的CRC编码示意图。Figure 5 is a schematic diagram of a prior art CRC encoding.

图6是本申请实施例提供的计算CRC编码的方法的示意性流程图。FIG. 6 is a schematic flowchart of a method for calculating CRC coding provided by an embodiment of the present application.

图7是本申请实施例提供的划分第一序列的示意图。FIG. 7 is a schematic diagram of dividing a first sequence provided by an embodiment of the present application.

图8是本申请实施例提供的计算CRC编码的原理性示意图。FIG. 8 is a schematic diagram of the principle of calculating CRC coding provided by an embodiment of the present application.

图9是本申请实施例提供的计算CRC编码的另一原理性示意图。FIG. 9 is another schematic diagram of calculating a CRC code provided by an embodiment of the present application.

图10是本申请实施例提供的划分第一序列的另一示意图。FIG. 10 is another schematic diagram of dividing a first sequence according to an embodiment of the present application.

图11是本申请实施例提供的计算CRC编码的另一原理性示意图。FIG. 11 is another schematic diagram of calculating a CRC code provided by an embodiment of the present application.

图12为本申请实施例提供的计算CRC编码的装置的示意性框图。FIG. 12 is a schematic block diagram of an apparatus for calculating a CRC code according to an embodiment of the present application.

图13为本申请实施例提供的计算CRC编码的装置的另一示意性框图。FIG. 13 is another schematic block diagram of an apparatus for calculating a CRC code according to an embodiment of the present application.

具体实施方式detailed description

下面将结合附图，对本申请实施例中的技术方案进行描述。The technical solutions in the embodiments of the present application will be described below with reference to the accompanying drawings.

首先对适用于本申请实施例的存储***进行介绍。First, a storage system suitable for the embodiment of the present application will be introduced.

如图1所示，本申请实施例中的存储***，可以为存储阵列(如

的

系列，

V3系列)。存储阵列包括存储控制器101和多块硬盘，其中，硬盘包含固态硬盘(Solid State Disk,SSD)、机械硬盘或者混合硬盘等。机械硬盘如HDD(Hard Disk Drive)。如图2所示，控制器101包含中央处理单元(Central Processing Unit,CPU)201、存储器202和接口203，存储器202中存储计算机指令，CPU201执行存储器202中的计算机指令对存储***进行管理及数据访问操作。另外，为节省CPU201的计算资原，现场可编程门阵列(Field Programmable Gate Array,FPGA)或其他硬件也可以用于执行本申请实施例中CPU201全部操作，或者，FPGA或其他硬件与CPU201分别用于执行本申请实施例CPU201的部分操作。为方便描述，本申请实施例统一用处理器来指CPU201和存储器202的组合，以及上述各种实现，处理器与接口203通信。接口203可以为网络接口卡(Networking Interface Card,NIC)、主机总线适配器(Host Bus Adaptor,HBA)，天线等。 As shown in FIG. 1, the storage system in the embodiment of the present application may be a storage array (such as

of

series,

V3 series). The storage array includes a storage controller 101 and a plurality of hard disks, wherein the hard disks include a solid state disk (SSD), a mechanical hard disk, or a hybrid hard disk. Mechanical hard drives such as HDD (Hard Disk Drive). As shown in FIG. 2, the controller 101 includes a central processing unit (CPU) 201, a memory 202 and an interface 203. The memory 202 stores computer instructions. The CPU 201 executes computer instructions in the memory 202 to manage and store the storage system. Access operation. In addition, in order to save the computing resources of the CPU 201, a Field Programmable Gate Array (FPGA) or other hardware may be used to perform all operations of the CPU 201 in the embodiment of the present application, or the FPGA or other hardware and the CPU 201 respectively use Part of the operation of the CPU 201 of the embodiment of the present application is performed. For convenience of description, the embodiment of the present application uniformly refers to a combination of the CPU 201 and the memory 202, and various implementations described above, and the processor communicates with the interface 203. The interface 203 can be a Network Interface Card (NIC), a Host Bus Adaptor (HBA), an antenna, or the like.

如图1和图2所描述的存储阵列，控制器101用于获取数据，如接收主机或客户端发送的数据，使用本申请实施例提供的计算CRC编码的方法计算数据的CRC编码。As shown in FIG. 1 and FIG. 2, the controller 101 is configured to acquire data, such as receiving data sent by the host or the client, and calculate a CRC code of the data by using a method for calculating CRC encoding provided by the embodiment of the present application.

进一步的，本申请实施例的存储***还可以为分布式文件存储***(如

的

9000系列)，分布式块存储***(如

的

系列)等。以

的

系列。示例性的如图3所示，分布式块存储***包括多台服务器，如服务器1、服务器2、服务器3、服务器4、服务器5和服务器6，服务器间通过InfiniBand或以太网络等互相通信。在实际应用当中，分布式块存储***中服务器的数量可以根据实际需求增加，本申请实施例对此不作限定。 Further, the storage system of the embodiment of the present application may also be a distributed file storage system (such as

of

9000 series), distributed block storage systems (eg

of

Series) and so on. Take

of

series. Illustratively, as shown in FIG. 3, the distributed block storage system includes a plurality of servers, such as a server 1, a server 2, a server 3, a server 4, a server 5, and a server 6, and the servers communicate with each other through InfiniBand or an Ethernet network. In practical applications, the number of servers in the distributed block storage system may be increased according to actual requirements, which is not limited by the embodiment of the present application.

分布式块存储***的服务器中包含如图4所示的结构。如图4所示，分布式块存储***中的每台服务器包含中央处理单元(Central Processing Unit,CPU)401、内存402、接口403、硬盘1、硬盘2和硬盘3，内存402中存储计算机指令，CPU401执行内存402中的程序指令执行相应的操作。接口403可以为硬件接口，如网络接口卡(Network Interface Card,NIC)或主机总线适配器(Host Bus Adaptor,HBA)等，也可以为程序接口模块等。硬盘包含固态硬盘(Solid State Disk,SSD)、机械硬盘或者混合硬盘。机械硬盘如HDD(Hard Disk Drive)。另外，为节省CPU401的计算资原，现场可编程门阵列(Field Programmable Gate Array,FPGA)或其他硬件也可以代替CPU401执行上述相应的操作，或者，FPGA或其他硬件与CPU401共同执行上述相应的操作。为方便描述，本申请实施例将CPU401与内存402、FPGA及其他替代CPU401的硬件或FPGA及其他替代CPU401的硬件与CPU401的组合统称为处理器。接口403可以为网络接口卡(Networking Interface Card,NIC)、主机总线适配器(Host Bus Adaptor,HBA)，天线等。The server of the distributed block storage system includes the structure as shown in FIG. As shown in FIG. 4, each server in the distributed block storage system includes a central processing unit (CPU) 401, a memory 402, an interface 403, a hard disk 1, a hard disk 2, and a hard disk 3. The computer 402 stores computer instructions. The CPU 401 executes program instructions in the memory 402 to perform corresponding operations. The interface 403 can be a hardware interface, such as a network interface card (NIC) or a host bus adapter (HBA), or a program interface module. The hard disk contains a Solid State Disk (SSD), a mechanical hard disk, or a hybrid hard disk. Mechanical hard drives such as HDD (Hard Disk Drive). In addition, in order to save the calculation resources of the CPU 401, a Field Programmable Gate Array (FPGA) or other hardware may also perform the above-mentioned corresponding operations instead of the CPU 401, or the FPGA or other hardware and the CPU 401 perform the above-mentioned corresponding operations together. . For convenience of description, the embodiment of the present application collectively refers to the combination of the CPU 401 and the memory 402, the FPGA and other hardware or FPGA replacing the CPU 401 and other hardware replacing the CPU 401 and the CPU 401 as a processor. The interface 403 can be a Network Interface Card (NIC), a Host Bus Adaptor (HBA), an antenna, or the like.

如图3和图4所描述的分布式块存储***，服务器的处理器用于获取数据，如接收主机或客户端发送的数据，使用本申请实施例提供的计算CRC编码的方法计算数据的CRC编码。As shown in FIG. 3 and FIG. 4, the processor of the server is configured to acquire data, such as receiving data sent by the host or the client, and calculate the CRC code of the data by using the method for calculating CRC encoding provided by the embodiment of the present application. .

除图1-4所示的场景外，本申请实施例还可以应用到数据传输场景，为了保证数据传输的可靠性，如计算机网络、各种通信网络中传输数据时使用本申请实施例所提供的计算数据CRC编码方法。如计算机获取数据，如计算机上应用程序产生的数据，计算数据的CRC编码。In addition to the scenarios shown in FIG. 1-4, the embodiment of the present application can be applied to a data transmission scenario. To ensure the reliability of data transmission, such as a computer network or various communication networks, data is used in the embodiments of the present application. Calculated data CRC encoding method. For example, a computer acquires data, such as data generated by an application on a computer, and calculates a CRC code of the data.

下面对计算待编码数据的CRC编码的一般方法做简单介绍。The following is a brief introduction to the general method of calculating the CRC encoding of the data to be encoded.

通常采用流水线(pipeline)的方式结合查表法进行CRC编码，如图5所示：Usually, the pipeline is combined with the look-up table method for CRC encoding, as shown in Figure 5:

a)把数据分成若干个片段(Segment)，如Segment 0至Segment N，其中N为不小于1的自然数。a) Divide the data into segments, such as Segment 0 to Segment N, where N is a natural number not less than one.

b)对每个段单独进行CRC编码，分别得到crc 0至crc N。b) Perform CRC encoding on each segment separately, and get crc 0 to crc N respectively.

c)将每个段编码得到的crc和特定的常量系数(Constant)进行无进位乘法(Carry-less Multiplication,CLMUL)。例如，将crc0与Constant 0进行CLMUL，将crc 1与Constant 1进行CLMUL，……，将crc N与Constant N进行CLMUL，分别得到CLMUL 0，CLMUL 1，CLMUL 2，……，CLMUL N。c) Perform the carry-less multiplication (CLMUL) of the crc obtained by encoding each segment and the specific constant coefficient (Constant). For example, CrcUL is performed by crc0 and Constant 0, CLMUL is performed by crc 1 and Constant 1, ..., CrcUL is performed by crc N and Constant N, and CLMUL 0, CLMUL 1, CLMUL 2, ..., CLMUL N are obtained, respectively.

d)将每段CLMUL的结果进行CRC编码，分别得到C0，C1，C2，……，CN。d) The results of each segment of CLMUL are CRC encoded to obtain C0, C1, C2, ..., CN, respectively.

e)将C0，C1，C2，……，CN进行异或(Exclusive OR,XOR)运算，得到最终的CRC编码结果CRC F。e) Perform exclusive OR (XOR) operation on C0, C1, C2, ..., CN to obtain the final CRC coding result CRC F.

然而，该CRC编码方法中的步骤b和d中的CRC编码操作需要大量的移位操作和异或运算，增加了计算的复杂度，需要消耗大量的计算资原，从而影响了CRC编码的效率与性能。However, the CRC encoding operation in steps b and d of the CRC encoding method requires a large number of shift operations and exclusive OR operations, which increases the computational complexity and requires a large amount of computational resources, thereby affecting the efficiency of CRC encoding. With performance.

针对该问题，本申请提出一种计算CRC编码的方法，该方法使用本原多项式的倍式对待编码的数据进行编码，获得中间序列，对该中间序列使用本原多项式计算其CRC编码，该方法能够减少CRC编码时需要的移位操作与异或运算的次数，从而降低计算CRC编码的复杂度，提高CRC编码的效率和性能。In response to this problem, the present application proposes a method for calculating CRC coding, which uses the doubling of the original polynomial to encode the data to obtain an intermediate sequence, and uses the primitive polynomial to calculate the CRC code for the intermediate sequence. The number of shift operations and XOR operations required for CRC encoding can be reduced, thereby reducing the complexity of calculating CRC encoding and improving the efficiency and performance of CRC encoding.

为更好的理解本申请实施例，首先本申请实施例结合图1所示的存储***介绍CRC编码的基本原理是：控制器101接收数据后，例如K位数据，将K位数据作为信息序列，在K位信息序列后再拼接N位的校验码，整个编码长度为R位。因此，这种编码也叫(R，K)码。对于一个给定的(R，K)码，可以证明存在一个最高次幂为R-K＝N的多项式G(x)，根据G(x)可以生成K位序列的CRC编码，而G(x)叫做这个CRC编码的生成多项式。N位校验码的具体生成过程为：假设要存储的数据称为信息序列，一个信息序列可以用多项式C(X)表示，将C(x)左移N位(可表示成C(x)*X^N)，这样C(x)的右边就会空出N位，这就是CRC编码的位置。本申请实施例基于用C(x)*X^N和生成多项式G(x)得到校验码，即用C(x)*X^N除以G(x)得到的余数作为N位CRC编码。其中，任意一个由二进制位串组成的数据都可以和一个系数仅为‘0’和‘1’取值的多项式一一对应。例如：数据为1010111对应的多项式为X^6+X^4+X^2+X+1，其中，X^6表示X的6次幂或x的6次方，x为伪变量，幂指数(也称为指数)用于指示各位间的排列位置，“+”表示异或。多项式为X^5+X^3+X^2+X+1对应的数据为101111。在T10技术委员会制定的CRC16的本源多项式为0x18BB7，写成二进制为0001 1000 1011 1011 0111，对应的多项式为X^16+X^15+X^11+X^9+X^8+X^7+X^5+X^4+X^2+X^1+1。按照现有的CRC16编码方法，需要将信息序列划分为大小为16位的数据段，信息序列划分出来的数据段从最高位(从左到右)分别为第1数据段、第2数据段、……、第N数据段。其中，N为不小于2的自然数。首先，第1数据段要分别左移15位，左移11位，左移9位，左移8位，左移7位t，左移5位，左移4位，左移2位，左移1位，左移0位，将第1数据段进行上述移位后的得到的数据段进行异或，将异或结果与第2数据段进行异或得到的异或结果，再与第3数据段及第N数据段重新构成数据序列，然后将新的数据序列按照16位划分得到新的数据段，再执行上述移位及异或操作，直到最后信息序列长度等于16位。For a better understanding of the embodiments of the present application, firstly, the basic principle of the CRC encoding is introduced in the embodiment of the present application in conjunction with the storage system shown in FIG. 1 : after the controller 101 receives the data, for example, K-bit data, the K-bit data is used as the information sequence. After the K-bit information sequence, the N-bit check code is spliced, and the entire code length is R bits. Therefore, this encoding is also called the (R, K) code. For a given (R, K) code, it can be proved that there is a polynomial G(x) with the highest power RK=N. According to G(x), the CRC encoding of the K-bit sequence can be generated, and G(x) is called The generator polynomial of this CRC code. The specific generation process of the N-bit check code is as follows: assuming that the data to be stored is called an information sequence, an information sequence can be represented by a polynomial C(X), and C(x) is shifted to the left by N bits (which can be expressed as C(x) *X^N), so that the right side of C(x) will be N bits, which is the location of the CRC encoding. The embodiment of the present application is based on using C(x)*X^N and the generator polynomial G(x) to obtain a check code, that is, the remainder obtained by dividing C(x)*X^N by G(x) as the N-bit CRC code. . Among them, any one of the data consisting of binary bit strings can be in one-to-one correspondence with a polynomial whose coefficients are only '0' and '1'. For example, the polynomial corresponding to the data 1010111 is X^6+X^4+X^2+X+1, where X^6 represents the 6th power of X or the 6th power of x, x is a pseudo variable, and the power index (also called index) is used to indicate the arrangement position between the people, and "+" means the exclusive OR. The data corresponding to the polynomial X^5+X^3+X^2+X+1 is 101111. The original polynomial of CRC16 developed by the T10 Technical Committee is 0x18BB7, written as binary 0001 1000 1011 1011 0111, and the corresponding polynomial is X^16+X^15+X^11+X^9+X^8+X^7+ X^5+X^4+X^2+X^1+1. According to the existing CRC16 coding method, the information sequence needs to be divided into data segments of size 16 bits, and the data segments divided by the information sequence are the first data segment and the second data segment from the highest bit (from left to right). ..., the Nth data segment. Where N is a natural number not less than 2. First, the first data segment should be shifted left by 15 bits, left by 11 bits, left by 9 bits, left by 8 bits, left by 7 bits, left by 5 bits, left by 4 bits, left by 2 bits, left. Shift 1 bit, shift 0 bit to the left, XOR the data segment obtained by shifting the first data segment, and XOR the XOR result with the second data segment, and then 3 The data segment and the Nth data segment are reconstructed into a data sequence, and then the new data sequence is divided into 16 bits to obtain a new data segment, and then the above shift and XOR operations are performed until the last information sequence length is equal to 16 bits.

因此，得到如下公式(1)CRC(C(x))＝(xdeg(G(x))C(x))(mod(G(x))；其中，CRC(C(x))表示信息序列C(x)的CRC编码；G(x)表示本原多项式，如T10的CRC16的本原多项式为X^16+X^15+X^11+X^9+X^8+X^7+X^5+X^4+X^2+X^1+1；deg(G(x))表示本原多项式的最高项的指数，如T10的CRC16的本原多项式的最高项的指数为16，即最高位的指数；xdeg(G(x))C(x)表示将信息序列C(x)左移本原多项式的最高项的指数位，mod表示取模。Therefore, the following formula (1) is obtained: CRC(C(x))=(xdeg(G(x))C(x))(mod(G(x)); where CRC(C(x)) represents a sequence of information CRC encoding of C(x); G(x) represents the primitive polynomial, such as the primitive polynomial of CRC16 of T10 is X^16+X^15+X^11+X^9+X^8+X^7+ X^5+X^4+X^2+X^1+1; deg(G(x)) represents the index of the highest term of the primitive polynomial, such as the index of the highest term of the primitive polynomial of CRC16 of T10 is 16 , that is, the highest-order index; xdeg(G(x))C(x) represents an exponent bit that shifts the information sequence C(x) to the left of the highest term of the primitive polynomial, and mod denotes modulo.

结合公式(1),令Q(x)＝G(x)T(x)，则CRC(C(x))＝R(x)(mod(G(x)))；其中，R(x)＝(xdeg(G(x))C(x))(mod(Q(x)))，Q(x)表示G(x)的倍式，T(x)表示某一个多项式，用于表示Q(x)是G(x)的倍式，R(x)表示信息序列C(x)左移16bit得到的多项式除以Q(x)的余数。其中，Q(x)所含的有效的最高项的指数和有效的次最高项的指数之差大于1，从而相对G(x)可以减少循环移位操作次数，进一步的，可以选择含有效的项数的个数少的Q(x)可以进一步减少异或运算的次数，从而大幅降低了CRC编码复杂度，例如选择有效的项数最少的倍式。本申请实施例中，多项式的有效项是指系数为1的项，例如，如T10的CRC16的本原多项式中X^16、X^15、X^11、X^9、X^8、X^7、X^5、X^4、X^2、X^1、1的系数均为1，为有效的项。Combining equation (1), let Q(x)=G(x)T(x), then CRC(C(x))=R(x)(mod(G(x))); where R(x) = (xdeg(G(x))C(x))(mod(Q(x))), Q(x) represents a multiple of G(x), and T(x) represents a polynomial used to represent Q (x) is a multiple of G(x), and R(x) represents the remainder of the polynomial obtained by shifting the information sequence C(x) by 16 bits to the left by Q(x). Wherein, the difference between the index of the effective highest term contained in Q(x) and the index of the effective second highest term is greater than 1, so that the number of cyclic shift operations can be reduced relative to G(x), and further, it can be selected to be effective. Q(x) with a small number of items can further reduce the number of XOR operations, thereby greatly reducing the complexity of CRC coding, for example, selecting the least number of valid terms. In the embodiment of the present application, the valid term of the polynomial refers to an item having a coefficient of 1, for example, X^16, X^15, X^11, X^9, X^8, X in the primitive polynomial of CRC16 such as T10. The coefficients of ^7, X^5, X^4, X^2, X^1, and 1 are all 1, which are valid items.

下面，结合图6至图11对本申请实施例提供的计算CRC编码的方法进行说明。The method for calculating the CRC coding provided by the embodiment of the present application is described below with reference to FIG. 6 to FIG.

图6为本申请实施例提供的计算CRC编码的方法600的示意性流程图。该方法600可以由图1和图2中的控制器或图4和图5中的服务器的处理器执行。该方法至少包括以下步骤。FIG. 6 is a schematic flowchart of a method 600 for calculating CRC coding according to an embodiment of the present application. The method 600 can be performed by the controller of Figures 1 and 2 or the processor of the servers of Figures 4 and 5. The method includes at least the following steps.

601，获取待编码的第一序列。601. Acquire a first sequence to be encoded.

具体地，控制器或服务器的处理器获取待编码的数据(例如，待编码的第一序列)。In particular, the processor or processor of the server obtains the data to be encoded (eg, the first sequence to be encoded).

作为一种可选的实现方式，控制器或服务器的处理器接收主机或客户端发送的待编码的第一序列，进而计算该待编码的第一序列的CRC编码。As an optional implementation manner, the processor of the controller or the server receives the first sequence to be encoded sent by the host or the client, and then calculates the CRC code of the first sequence to be encoded.

602，使用至少一个多项式对待编码的第一序列进行编码，生成第二序列，该至少一个多项式中的每个多项式为本原多项式的倍式。602. Encode the first sequence to be encoded using at least one polynomial to generate a second sequence, each of the at least one polynomial being a multiple of the original polynomial.

下面以该本原多项式为T10的CRC16的本原多项式为例对本申请实施例的计算CRC编码的方法进行说明。The method for calculating the CRC encoding in the embodiment of the present application will be described below by taking the primitive polynomial of the CRC 16 whose original polynomial is T10 as an example.

具体地，对获取的待编码的第一序列使用至少一个多项式进行编码，生成中间序列(例如，第二序列)，其中，该至少一个多项式为本原多项式的倍式。Specifically, the acquired first sequence to be encoded is encoded using at least one polynomial to generate an intermediate sequence (eg, a second sequence), wherein the at least one polynomial is a multiple of the original polynomial.

例如，将待编码的第一序列使用多项式C(x)进行表示，将至少一个多项式记为Q(x)，将本原多项式记为G(x)，Q(x)为G(x)的倍式，即Q(x)＝G(x)T(x)，T(x)表示某一个多项式，用于表示Q(x)是G(x)的倍式，即，通过C(x)对Q(x)进行取模，将取模获得的余数(即，中间序列)表示为多项式R(x)，则R(x)＝(x ^deg(G(x))C(x))(mod(Q(x)))。 For example, the first sequence to be encoded is represented by a polynomial C(x), at least one polynomial is denoted by Q(x), the primitive polynomial is denoted by G(x), and Q(x) is G(x) The doubling, ie Q(x)=G(x)T(x), T(x) denotes a polynomial for indicating that Q(x) is a multiple of G(x), ie, by C(x) To modulo Q(x), the remainder obtained by modulo (ie, the intermediate sequence) is represented as a polynomial R(x), then R(x)=(x ^deg(G(x)) C(x))( Mod(Q(x))).

603，使用本原多项式对该第二序列进行编码，生成针对第一序列的校验序列，该至少一个多项式中每个多项式的项数少于该本原多项式的项数。603. Encode the second sequence using a primitive polynomial to generate a check sequence for the first sequence, wherein the number of terms of each polynomial in the at least one polynomial is less than the number of terms of the primitive polynomial.

具体地，对601中生成的第二序列使用本原多项式进行编码，生成针对第一序列的校验序列，其中，该至少一个多项式中每个多项式的项数少于该本原多项式的项数。Specifically, the second sequence generated in 601 is encoded using a primitive polynomial to generate a check sequence for the first sequence, wherein the number of terms of each polynomial in the at least one polynomial is less than the number of terms of the primitive polynomial .

例如，使用第二序列对应的多项式R(x)对本原多项式G(x)进行取摸，取模获得的余数为针对该待编码的第一序列生成的校验序列，该校验序列即为针对该第一序列计算的CRC编码，将针对该第一序列计算的CRC编码记为CRC(C(x))，则CRC(C(x))＝R(x)(mod(G(x)))。For example, the primitive polynomial G(x) is obtained by using the polynomial R(x) corresponding to the second sequence, and the remainder obtained by the modulo is a check sequence generated for the first sequence to be encoded, and the check sequence is For the CRC encoding calculated by the first sequence, the CRC code calculated for the first sequence is recorded as CRC(C(x)), then CRC(C(x))=R(x)(mod(G(x)) )).

因此，在使用本原多项式计算待编码的数据(例如，第一序列)的CRC编码之前，通过本原多项式的至少一个倍式计算待编码的数据的CRC编码，获得中间序列(例如，第二序列)，再对该中间序列使用本原多项式计算该中间序列的CRC编码，从而避免仅使用本原多项式计算待编码的数据的CRC编码时，由于循环移位操作与异或运算的次数较多导致的CRC编码的计算复杂度较高的问题。Therefore, before calculating the CRC encoding of the data to be encoded (eg, the first sequence) using the primitive polynomial, the CRC encoding of the data to be encoded is calculated by at least one multiplication of the primitive polynomial to obtain an intermediate sequence (eg, second Sequence), and then calculating the CRC encoding of the intermediate sequence using the primitive polynomial, thereby avoiding the CRC encoding of the data to be encoded using only the primitive polynomial, since the number of cyclic shift operations and XOR operations is more The resulting computational complexity of CRC coding is high.

下面同样以本原多项式为T10的CRC16的本原多项式为例对计算待编码数据的CRC编码的几个实施例进行说明。The following also describes several embodiments for calculating the CRC encoding of the data to be encoded by taking the primitive polynomial of the CRC 16 whose original polynomial is T10 as an example.

实施例1Example 1

作为示例而非限定，该至少一个多项式包括第一多项式，该第一多项式Q ₁(x)满足： By way of example and not limitation, the at least one polynomial includes a first polynomial, the first polynomial Q ₁ (x) satisfying:

Q ₁(x)＝(x ^{^}369+x ^{^}31+1)·x ^{^}a (2) Q ₁ (x)=(x ^{^} 369+x ^{^} 31+1)·x ^{^} a (2)

其中，x ^{^}a为调整系数，a是根据寄存器的容量确定的，且a为大于或等于0的整数，该寄存器用于存储该第一序列。 Where x ^{^} a is an adjustment coefficient, a is determined according to the capacity of the register, and a is an integer greater than or equal to 0, and the register is used to store the first sequence.

具体地，例如，该第一序列的长度为4096，该本原多项式的倍式(例如，第一多项式)Q ₁(x)满足： Specifically, for example, the length of the first sequence is 4096, and the multiple of the primitive polynomial (eg, the first polynomial) Q ₁ (x) satisfies:

Q ₁(x)＝(x ^{^}369+x ^{^}31+1) (3) Q ₁ (x)=(x ^{^} 369+x ^{^} 31+1) (3)

此时，式(2)中的a的取值为0。At this time, the value of a in the formula (2) is 0.

在计算该第一序列的CRC编码时，主要包括以下步骤：When calculating the CRC encoding of the first sequence, the method mainly includes the following steps:

a，在计算该第一序列的CRC编码时，在该第一序列后补入16个的比特“0”，即，补“0”后的第一序列的长度为4112；a, in calculating the CRC encoding of the first sequence, after the first sequence is added 16 bits "0", that is, the length of the first sequence after "0" is 4112;

b，将补“0”后的第一序列划分为多个数据段，如图7所示，划分得到的数据段从最高位(从左至右)开始分别为：第1数据段、第2数据段、第3数据段…第11数据段、第12数据段，其中，第1数据段至第11数据段中每个数据段均包含369比特的数据，第12数据段包含53比特的数据，该53比特的数据中包含补入的16个取值为0的比特；b. The first sequence after the "0" is divided into a plurality of data segments. As shown in FIG. 7, the divided data segments start from the highest bit (from left to right): the first data segment and the second data segment respectively. Data segment, third data segment...11th data segment, 12th data segment, wherein each data segment from the first data segment to the eleventh data segment contains 369 bits of data, and the 12th data segment contains 53 bits of data The 53-bit data includes the complemented 16 bits having a value of 0;

c，如图8所示，将第1数据段分别左移31位、左移0位，将第1数据段左移31位得到的数据段与左移0位得到的数据段进行异或运算，将异或运算得到的数据段A与第2数据段进行异或运算，再将数据段A与第2数据段进行异或运算后得到的数据段B与第3数据段至第12数据段重新构造新的数据序列；c, as shown in FIG. 8, the first data segment is shifted left by 31 bits and left by 0 bits, and the data segment obtained by shifting the first data segment to the left by 31 bits is XORed with the data segment obtained by shifting the left bit by 0 bits. , the data segment A obtained by the exclusive OR operation is XORed with the second data segment, and the data segment B and the third data segment to the twelfth data segment obtained by performing an exclusive OR operation on the data segment A and the second data segment are performed. Reconstruct a new data sequence;

d，对该重新构造的数据序列重复步骤b、c，生成第二序列；d, repeating steps b, c for the reconstructed data sequence to generate a second sequence;

可选地，该第二序列的长度可以为394；Optionally, the second sequence may have a length of 394;

e，对该长度为394的第二序列使用T10的CRC16的本原多项式计算CRC编码，最终得到针对第一序列的CRC编码。e. Calculate the CRC encoding for the second sequence of length 394 using the primitive polynomial of CRC16 of T10, and finally obtain the CRC encoding for the first sequence.

关于使用T10的CRC16的本原多项式计算CRC编码的方法请参照上述相关描述，为了简洁，此处不再赘述。For the method of calculating the CRC code by using the primitive polynomial of the CRC16 of T10, please refer to the above related description, and for brevity, it will not be repeated here.

在实施例1中，式(2)中的x ^a为调整系数，在计算待编码序列的CRC编码时，可以根据用于存储该第一序列的寄存器的容量，通过该调整系数x ^a对本原多项式的倍式进行调整。 In Embodiment 1, x ^a in the formula (2) is an adjustment coefficient. When calculating the CRC code of the sequence to be encoded, the original value can be used by the adjustment coefficient x ^a according to the capacity of the register for storing the first sequence. The polynomial is adjusted.

例如，当寄存器的容量为128比特时，对于第一序列而言，为了使得对第一序列划分得到的某一个数据段占用完整的3个容量为128比特的寄存器，通过调整系数x ¹⁵对该式(3)进行调整，调整后的本原多项式的倍式满足： For example, when the capacity of the register is 128 bits, for the first sequence, in order to make a certain data segment obtained by dividing the first sequence occupy a complete three registers with a capacity of 128 bits, the adjustment coefficient x ^{15 is used} to Equation (3) is adjusted, and the adjusted multiplicity of the primitive polynomial satisfies:

Q ₁(x)＝(x ^{^}369+x ^{^}31+1)·x ^{^}15＝x ^{^}384+x ^{^}46+x ^{^}15 (4) Q ₁ (x)=(x ^{^} 369+x ^{^} 31+1)·x ^{^} 15=x ^{^} 384+x ^{^} 46+x ^{^} 15 (4)

通过调整系数对该本原多项式的倍式进行调整(例如，经过调整，使得根据本原多项式的倍式对第一序列划分后获得的每个数据段均能够占满整数个寄存器)，使得利用调整后的本原多项式的倍式计算第一序列的CRC编码时能够充分利用寄存器的硬件资源。Adjusting the multiple of the primitive polynomial by adjusting the coefficient (for example, adjusting so that each data segment obtained by dividing the first sequence according to the multiple of the primitive polynomial can occupy an integer number of registers), so that the use The multiplier of the adjusted primitive polynomial can fully utilize the hardware resources of the register when calculating the CRC encoding of the first sequence.

实施例2Example 2

实施例2与实施例1的不同之处在于步骤c至步骤e，在实施例2中，步骤c为： Embodiment 2 differs from Embodiment 1 in steps c to e. In Embodiment 2, step c is:

如图9所示，将第1数据段分别左移31位、左移0位，将第1数据段左移31位得到的数据段与左移0位得到的数据段进行异或运算，将异或运算得到的数据段分为两部分，分别为数据段C与数据段D，数据段C包含高位的31比特，数据段D包含处高位的31比特外的369比特。As shown in FIG. 9, the first data segment is shifted left by 31 bits and left by 0 bits, and the data segment obtained by shifting the first data segment to the left by 31 bits is XORed with the data segment obtained by shifting the left bit by 0 bits. The data segment obtained by the exclusive OR operation is divided into two parts, namely data segment C and data segment D, data segment C contains the upper 31 bits, and data segment D contains 369 bits beyond the upper 31 bits.

将数据段C分别左移31位、左移0位，将左移31位得到的数据段与左移0位得到的数据段进行异或运算，并将该异或运算得到的数据段E与数据段D和第2数据段进行异或运算后得到的数据段F进行异或运算，将该异或运算得到的数据段G与第3数据段至第12数据段重新构造新的数据序列。The data segment C is shifted to the left by 31 bits and shifted to the left by 0 bits, and the data segment obtained by shifting the left 31 bits is XORed with the data segment obtained by shifting the left bit by 0, and the data segment E obtained by the exclusive OR operation is The data segment F obtained by performing the exclusive OR operation on the data segment D and the second data segment is XORed, and the data segment G obtained by the exclusive OR operation and the third data segment to the twelfth data segment are reconstructed into a new data sequence.

在实施例2中，步骤d为：In Embodiment 2, step d is:

对该重新构造的数据序列重复实施例1中的步骤b与实施例2中的步骤c，生成第二序列。The step b in the first embodiment and the step c in the second embodiment are repeated for the reconstructed data sequence to generate a second sequence.

可选地，该第二序列的长度为369+53＝422。Optionally, the second sequence has a length of 369+53=422.

在实施例2中，步骤e为：In Embodiment 2, step e is:

对该长度为422的第二序列使用T10的CRC16的本原多项式计算CRC编码，最终得到针对第一序列的CRC编码。The CRC encoding is calculated for the second sequence of length 422 using the primitive polynomial of CRC16 of T10, and finally the CRC encoding for the first sequence is obtained.

实施例3Example 3

作为示例而非限定，该至少一个多项式包括第二多项式，该第二多项式Q ₂(x)满足： By way of example and not limitation, the at least one polynomial includes a second polynomial, the second polynomial Q ₂ (x) satisfying:

Q ₂(x)＝(x ⁶⁵⁵³⁵+1)·x ^b (5) Q ₂ (x)=(x ⁶⁵⁵³⁵ +1)·x ^b (5)

其中，x ^b为调整系数，b是根据寄存器的容量确定的，且b为大于或等于0的整数，该寄存器用于存储该第一序列。 Where x ^b is an adjustment coefficient, b is determined according to the capacity of the register, and b is an integer greater than or equal to 0, and the register is used to store the first sequence.

具体地，例如，该第一序列的长度为4194304，该本原多项式的倍式(例如，第一多项式)Q ₁(x)满足： Specifically, for example, the length of the first sequence is 4194304, and the multiple of the primitive polynomial (eg, the first polynomial) Q ₁ (x) satisfies:

Q ₂(x)＝(x ⁶⁵⁵³⁵+1) (6) Q ₂ (x)=(x ⁶⁵⁵³⁵ +1) (6)

此时，式(5)中的b的取值为0。At this time, the value of b in the formula (5) is 0.

a，在计算该第一序列的CRC编码时，在该第一序列后补入16个的比特“0”，即，补“0”后的第一序列的长度为4194320；a, in calculating the CRC encoding of the first sequence, after the first sequence is filled with 16 bits "0", that is, the length of the first sequence after "0" is 4194320;

b，将补“0”后的第一序列划分为多个数据段，如图10所示，划分得到的数据段从最高位(从左至右)开始分别为：第1数据段、第2数据段、第3数据段…第64数据段、第65数据段，其中，第1数据段至第64数据段中每个数据段均包含65536比特的数据，第65数据段包含80比特的数据，该80比特的数据中包含补入的16个取值为0的比特；b, the first sequence after the "0" is divided into a plurality of data segments, as shown in FIG. 10, the divided data segments start from the highest bit (from left to right): the first data segment, the second data segment Data segment, third data segment... 64th data segment, 65th data segment, wherein each data segment from the first data segment to the 64th data segment contains 65536 bits of data, and the 65th data segment contains 80 bits of data. The 80-bit data includes the complemented 16 bits having a value of 0;

c，如图11所示，将第1数据段与第2数据段进行异或运算，将异或运算得到的数据段H与第3数据段值第65数据段重新构造新的数据序列；c, as shown in FIG. 11, the XOR operation is performed on the first data segment and the second data segment, and the data segment H obtained by the exclusive OR operation and the 65th data segment of the third data segment value are reconstructed into a new data sequence;

d，对该新的数据序列重复步骤b、c，生成第二序列；d, repeating steps b, c for the new data sequence to generate a second sequence;

可选地，该第二序列的长度可以为65535+80＝65615；Optionally, the second sequence may have a length of 65535+80=65615;

e，对该长度为65615的第二序列使用T10的CRC16的本原多项式计算CRC编码，最终得到针对第一序列的CRC编码。e. Calculate the CRC encoding for the second sequence of length 65615 using the primitive polynomial of CRC16 of T10, and finally obtain the CRC encoding for the first sequence.

在实施例3中，式(5)中的x ^b为调整系数，在计算待编码序列的CRC编码时，可以根据用于存储该第一序列的寄存器的容量，通过该调整系数x ^b对本原多项式的倍式进行调整。 In Embodiment 3, x ^b in the equation (5) is an adjustment coefficient. When calculating the CRC encoding of the sequence to be encoded, the original value may be used by the adjustment coefficient x ^b according to the capacity of the register for storing the first sequence. The polynomial is adjusted.

在实施例3中，作为另一种可选的实现方式，对待编码的第一序列使用至少一个多项式进行编码，生成第二序列，包括：对该待编码的第一序列使用该第二多项式进行编码，生成第三序列；对该第三序列使用该第一多项式进行编码，生成该第二序列。In the third embodiment, as another optional implementation, the first sequence to be encoded is encoded by using at least one polynomial to generate a second sequence, including: using the second multiple to the first sequence to be encoded. Encoding is performed to generate a third sequence; the third sequence is encoded using the first polynomial to generate the second sequence.

具体地，对于待编码的第一序列，在使用本原多项式对该第一序列编码之前，使用两个该本原多项式的倍式(例如，第一多项式与第二多项式)对该第一序列进行编码。Specifically, for the first sequence to be encoded, two pairs of the primitive polynomial (eg, the first polynomial and the second polynomial) are used before the first sequence is encoded using the primitive polynomial. The first sequence is encoded.

例如，在实施例3中，再使用第二多项式(式6)对该第一序列进行编码后，生成长度为65615的数据序列，再使用第一多项式(式3)对该长度为65615的数据序列进行编码，生成该第二序列，最终对该第二序列使用T10的CRC16的本原多项式计算CRC编码，最终得到针对第一序列的CRC编码。For example, in the third embodiment, after the first sequence is encoded using the second polynomial (formula 6), a data sequence of length 65615 is generated, and the length is further calculated using the first polynomial (formula 3). The data sequence of 65615 is encoded to generate the second sequence, and finally the CRC encoding is calculated for the second sequence using the primitive polynomial of CRC16 of T10, and finally the CRC encoding for the first sequence is obtained.

关于使用式(3)对长度为65615的数据序列进行编码，生成该第二序列的先关描述请参照实施例1与实施例2中的相关描述，为了简洁，此处不再赘述。For the description of the data sequence of the length of 65615 by using the formula (3), the related description of the second sequence is described. For the sake of brevity, details are not described herein again.

需要说明的式，上述图8、图9与图11中的“+”代表异或运算。In the equation to be described, "+" in the above-mentioned Figs. 8, 9, and 11 represents an exclusive OR operation.

需要说明的是，实施例3仅以使用两个该本原多项式的倍式对该第一序列进行编码，生成第二序列为例进行说明，但本申请并不限定于此。例如，还可以使用三个或三个以上的本原多项式的倍式对该第一序列进行编码，生成第二序列。Incidentally, in the third embodiment, the first sequence is encoded by using a multiple of the primitive polynomial, and the second sequence is generated as an example. However, the present application is not limited thereto. For example, the first sequence can also be encoded using a multiple of three or more primitive polynomials to generate a second sequence.

还需要说明的是，实施例1至实施例3中列举的本原多项式的倍式仅为示例性说明，并不对本申请构成任何限定。例如，在对实施例1中的长度为4096的第一序列编码时，使用的本原多项式的倍式除实施例1中列举的式(3)外，还可以为其他形式的本原多项式的倍式。It should be noted that the multiples of the primitive polynomials enumerated in Embodiments 1 to 3 are merely illustrative and are not intended to limit the application. For example, when encoding the first sequence of length 4096 in Embodiment 1, the multiple of the primitive polynomial used may be other than the equation (3) enumerated in Embodiment 1, and may be other forms of the primitive polynomial. Double type.

本申请还提供了一种确定本原多项式的倍式的方法，下面对该方法进行详细说明。The present application also provides a method of determining a ploidy of a primitive polynomial, which is described in detail below.

假定本原多项式的倍式满足：Assume that the multiple of the primitive polynomial satisfies:

Q(x)＝x ^{^}i+x ^{^}j (7) Q(x)=x ^{^} i+x ^{^} j (7)

其中，j为大于或等于0的整数，且j＜i。Where j is an integer greater than or equal to 0, and j < i.

对于式(7)，确定了i、j的取值，即确定了本原多项式的倍式。该方法具体为：For equation (7), the values of i and j are determined, that is, the multiple of the primitive polynomial is determined. The method is specifically:

a，将长度为n的序列中的每个比特取值初始化为0，例如，n的取值可以为524288；a, the value of each bit in the sequence of length n is initialized to 0, for example, the value of n can be 524288;

b，对于长度为n的序列，设置该序列中的索引号为i与索引号为j的比特的取值为1，其余比特的取值为0，其中，1≤i≤n-1，0≤j＜i，对于i的每个取值，j均需要从0遍历到i-1；b. For a sequence of length n, set the index of the index with the index number i and the index number j to 1 and the remaining bits to 0, where 1≤i≤n-1,0 ≤ j < i, for each value of i, j needs to traverse from 0 to i-1;

c，使用本原多项式(例如，T10的CRC16的本原多项式)计算步骤b中获得的长度为n的序列的CRC编码；c, using the primitive polynomial (eg, the primitive polynomial of CRC16 of T10) to calculate the CRC encoding of the sequence of length n obtained in step b;

d，若步骤c中计算获得的该长度为n的序列的CRC编码结果为0，则步骤b中的索引号i与索引号j分别为该本原多项式的倍式(式7)的最高项的指数与次高项的指数。d, if the CRC encoding result of the sequence of length n obtained in step c is 0, the index number i and the index number j in step b are the highest terms of the multiplier (formula 7) of the primitive polynomial, respectively. The index of the index and the second highest item.

例如，对于该长度为n的序列，设置该序列中的索引号为200与索引号为50的比特的取值为1，其余比特的取值被设置为0，当使用本原多项式计算该序列的CRC编码的结果为0时，说明该长度为n的序列对应的多项式为该本原多项式的倍式，该索引号200与该索引号50分别为该倍式的最高项的指数与次高项的指数，即该本原多项式的倍式满足：For example, for the sequence of length n, the value of the index with the index number of 200 and the index number of 50 in the sequence is set to 1, and the value of the remaining bits is set to 0. When the sequence is calculated using the primitive polynomial, When the result of the CRC encoding is 0, it is indicated that the polynomial corresponding to the sequence of length n is a multiple of the primitive polynomial, and the index number 200 and the index number 50 are respectively the index of the highest term of the doubling and the second highest. The index of the term, that is, the multiple of the primitive polynomial satisfies:

Q(x)＝(x ^{^}200+x ^{^}50) (8) Q(x)=(x ^{^} 200+x ^{^} 50) (8)

对于本原多项式而言，根据上述方法能够确定多个该本原多项式的倍式，对于待编码的第一序列，需要从该本原多项式的多个倍式中确定用于计算该第一序列的CRC编码的倍式。For the primitive polynomial, a plurality of doublings of the primitive polynomial can be determined according to the above method, and for the first sequence to be encoded, it is required to determine from the multiples of the primitive polynomial for calculating the first sequence The CRC coded multiple.

作为示例而非限定，可以根据该第一序列的长度，从该本原多项式的多个倍式中确定用于计算该第一序列的CRC编码的倍式。By way of example and not limitation, a octade for calculating the CRC encoding of the first sequence may be determined from a plurality of multiples of the primitive polynomial based on the length of the first sequence.

例如，当该第一序列的长度为4096时，从该本原多项式的多个倍式中将式3确定为用于计算该第一序列的CRC编码的倍式。For example, when the length of the first sequence is 4096, Equation 3 is determined from a plurality of multiples of the primitive polynomial as a ploid for calculating the CRC encoding of the first sequence.

本原多项式的倍式的有效项的项数尽可能少，和/或本原多项式的倍式的最高项的指数与次高项的指数的差值尽可能大。The number of terms of the effective term of the polynomial of the primitive polynomial is as small as possible, and/or the difference between the index of the highest term of the multiple of the primitive polynomial and the index of the next highest term is as large as possible.

需要说明的是，上述仅以本原多项式的倍式满足式7为例进行说明，但本申请并不限定于此，例如，本原多项式的倍式还可以满足：It should be noted that the above formula only satisfies Equation 7 as an example of the original polynomial. However, the present application is not limited thereto. For example, the multiple of the original polynomial can also satisfy:

Q(x)＝x ^{^}i+x ^{^}j+x ^{^}k (9) Q(x)=x ^{^} i+x ^{^} j+x ^{^} k (9)

其中，k为大于或等于0的整数，且k＜j＜i。Where k is an integer greater than or equal to 0, and k < j < i.

还需要说明的是，本申请仅以本原多项式为T10的CRC16的本原多项式为例对本申请的计算CRC编码的方法进行说明，但本申请提供的计算CRC编码的方法并不限定于此。例如，本申请提供的计算CRC编码的方法还可以适用于使用基于其他标准制定的本原多项式计算待编码序列的CRC编码的方法中。It should be noted that the method for calculating the CRC coding in the present application is described by using the primitive polynomial of the CRC 16 whose original polynomial is T10 as an example. However, the method for calculating the CRC coding provided by the present application is not limited thereto. For example, the method for calculating CRC coding provided by the present application can also be applied to a method of calculating CRC coding of a sequence to be coded using a primitive polynomial based on other standards.

上文结合图6至图11，描述了本申请实施例提供的计算CRC编码的方法，下面结合图12至图13描述本申请实施例提供的计算CRC编码的装置。The method for calculating the CRC code provided by the embodiment of the present application is described above with reference to FIG. 6 to FIG. 11. The apparatus for calculating the CRC code provided by the embodiment of the present application is described below with reference to FIG. 12 to FIG.

图12为本申请实施例提供的计算CRC编码的装置700的示意性框图，该计算CRC编码的装置包括获取模块701与处理模块702。FIG. 12 is a schematic block diagram of an apparatus 700 for calculating CRC coding according to an embodiment of the present disclosure. The apparatus for calculating CRC coding includes an obtaining module 701 and a processing module 702.

获取模块701，用于获取待编码的第一序列。The obtaining module 701 is configured to obtain a first sequence to be encoded.

处理模块702，用于使用至少一个多项式对该待编码的第一序列进行编码，生成第二序列。The processing module 702 is configured to encode the first sequence to be encoded using at least one polynomial to generate a second sequence.

该处理模块702还用于，使用本原多项式对该第二序列进行编码，生成针对第一序列的校验序列，该至少一个多项中每个多项式为该本原多项式的倍式，该至少一个多项式中每个多项式的项数少于该本原多项式的项数。The processing module 702 is further configured to: encode the second sequence by using a primitive polynomial to generate a check sequence for the first sequence, where each polynomial of the at least one multiple is a multiple of the primitive polynomial, the at least The number of terms for each polynomial in a polynomial is less than the number of terms of the primitive polynomial.

可选地，该至少一个多项式包括第一多项式，该第一多项式Q ₁(x)满足： Optionally, the at least one polynomial comprises a first polynomial, the first polynomial Q ₁ (x) satisfying:

Q ₁(x)＝(x ³⁶⁹+x ³¹+1)·x ^a Q ₁ (x)=(x ³⁶⁹ +x ³¹ +1)·x ^a

其中，x ^a为调整系数，a是根据寄存器的容量确定的，且a为大于或等于0的整数，该寄存器用于存储该第一序列。 Where x ^a is an adjustment coefficient, a is determined according to the capacity of the register, and a is an integer greater than or equal to 0, and the register is used to store the first sequence.

可选地，该至少一个多项式包括第二多项式，该第二多项式Q ₂(x)满足： Optionally, the at least one polynomial comprises a second polynomial, the second polynomial Q ₂ (x) satisfying:

Q ₂(x)＝(x ⁶⁵⁵³⁵+1)·x ^b Q ₂ (x)=(x ⁶⁵⁵³⁵ +1)·x ^b

可选地，该处理模块702还用于，对该待编码的第一序列使用该第二多项式进行编码，生成第三序列；对该第三序列使用该第一多项式进行编码，生成该第二序列。Optionally, the processing module 702 is further configured to: encode the first sequence to be encoded by using the second polynomial to generate a third sequence, and encode the third sequence by using the first polynomial, This second sequence is generated.

可选地，该处理模块702还用于，根据该第一序列的长度，确定该至少一个多项式。Optionally, the processing module 702 is further configured to determine the at least one polynomial according to the length of the first sequence.

可选地，该第一序列的长度为4096。Optionally, the first sequence has a length of 4096.

可选地，该第二序列的长度为394或422。Optionally, the second sequence has a length of 394 or 422.

可选地，该第一序列的长度为4194304。Optionally, the length of the first sequence is 4194304.

图13为本申请实施例提供的计算CRC编码的装置800的示意性框图，该计算CRC编码的装置包括接口801、存储器802与处理器803。FIG. 13 is a schematic block diagram of an apparatus 800 for calculating CRC coding according to an embodiment of the present disclosure. The apparatus for calculating CRC coding includes an interface 801, a memory 802, and a processor 803.

接口801，用于获取待编码的第一序列。The interface 801 is configured to obtain a first sequence to be encoded.

存储器802，用于存储程序。The memory 802 is configured to store a program.

处理器803，用于执行该存储器中存储的程序，当该存储器中的程序被执行时，该处理器803用于，通过该接口801获取待编码的第一序列；使用至少一个多项式对该待编码的第一序列进行编码，生成第二序列；使用本原多项式对该第二序列进行编码，生成针对第一序列的校验序列，该至少一个多项中每个多项式为该本原多项式的倍式，该至少一个多项式中每个多项式的项数少于该本原多项式的项数。a processor 803, configured to execute a program stored in the memory, when the program in the memory is executed, the processor 803 is configured to acquire, by using the interface 801, a first sequence to be encoded; using at least one polynomial to treat the Encoding the first sequence to generate a second sequence; encoding the second sequence using a primitive polynomial to generate a check sequence for the first sequence, each polynomial of the at least one polynomial being the primitive polynomial In the doubling, the number of terms of each polynomial in the at least one polynomial is less than the number of terms of the primitive polynomial.

Q ₁(x)＝(x ³⁶⁹+x ³¹+1)·x ^a Q ₁ (x)=(x ³⁶⁹ +x ³¹ +1)·x ^a

Q ₂(x)＝(x ⁶⁵⁵³⁵+1)·x ^b Q ₂ (x)=(x ⁶⁵⁵³⁵ +1)·x ^b

可选地，该处理器803还用于，对该待编码的第一序列使用该第二多项式进行编码，生成第三序列；对该第三序列使用该第一多项式进行编码，生成该第二序列。Optionally, the processor 803 is further configured to: encode the first sequence to be encoded by using the second polynomial to generate a third sequence; and encode the third sequence by using the first polynomial, This second sequence is generated.

可选地，该处理器803还用于，根据该第一序列的长度，确定该至少一个多项式。Optionally, the processor 803 is further configured to determine the at least one polynomial according to the length of the first sequence.

本申请提供了一种芯片，该芯片包括接口、存储器和处理器，该存储器用于存储指令，该处理器用于执行该存储器存储的指令，并且对该存储器中存储的指令的执行使得该处理器执行本申请实施例的计算CRC编码的方法。The present application provides a chip including an interface, a memory, and a processor for storing instructions for executing instructions stored in the memory, and performing execution of instructions stored in the memory such that the processor The method for calculating CRC coding in the embodiment of the present application is performed.

本申请提供了一种计算机可读存储介质，该计算机可读存储介质中存储有指令，当该指令在计算机上运行时，使得计算机执行本申请实施例的计算CRC编码的方法。The present application provides a computer readable storage medium having instructions stored therein that, when executed on a computer, cause the computer to perform the method of calculating CRC encoding in embodiments of the present application.

本申请提供了一种包含指令的计算机程序产品，当该计算机程序产品在计算机上运行时，使得计算机执行本申请实施例的计算CRC编码的方法。The present application provides a computer program product comprising instructions for causing a computer to perform the method of calculating CRC encoding in embodiments of the present application when the computer program product is run on a computer.

应理解，本申请实施例中提及的处理器可以是中央处理单元(Central Processing Unit，CPU)，还可以是其他通用处理器、数字信号处理器(Digital Signal Processor，DSP)、专用集成电路(Application Specific Integrated Circuit，ASIC)、现成可编程门阵列(Field Programmable Gate Array，FPGA)或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件等。通用处理器可以是微处理器或者该处理器也可以是任何常规的处理器等。It should be understood that the processor mentioned in the embodiment of the present application may be a central processing unit (CPU), and may also be other general-purpose processors, digital signal processors (DSPs), and application specific integrated circuits ( Application Specific Integrated Circuit (ASIC), Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic device, discrete hardware component, etc. The general purpose processor may be a microprocessor or the processor or any conventional processor or the like.

还应理解，本申请实施例中提及的存储器可以是易失性存储器或非易失性存储器，或可包括易失性和非易失性存储器两者。其中，非易失性存储器可以是只读存储器(Read-Only Memory，ROM)、可编程只读存储器(Programmable ROM，PROM)、可擦除可编程只读存储器(Erasable PROM，EPROM)、电可擦除可编程只读存储器(Electrically EPROM，EEPROM)或闪存。易失性存储器可以是随机存取存储器(Random Access Memory，RAM)，其用作外部高速缓存。通过示例性但不是限制性说明，许多形式的RAM可用，例如静态随机存取存储器(Static RAM，SRAM)、动态随机存取存储器(Dynamic RAM，DRAM)、同步动态随机存取存储器(Synchronous DRAM，SDRAM)、双倍数据速率同步动态随机存取存储器(Double Data Rate SDRAM，DDR SDRAM)、增强型同步动态随机存取存储器(Enhanced SDRAM，ESDRAM)、同步连接动态随机存取存储器(Synchlink DRAM，SLDRAM)和直接内存总线随机存取存储器(Direct Rambus RAM，DR RAM)。It should also be understood that the memory referred to in the embodiments of the present application may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memory. The non-volatile memory may be a read-only memory (ROM), a programmable read only memory (PROM), an erasable programmable read only memory (Erasable PROM, EPROM), or an electric Erase programmable read only memory (EEPROM) or flash memory. The volatile memory can be a Random Access Memory (RAM) that acts as an external cache. By way of example and not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (Synchronous DRAM). SDRAM), Double Data Rate SDRAM (DDR SDRAM), Enhanced Synchronous Dynamic Random Access Memory (ESDRAM), Synchronous Connection Dynamic Random Access Memory (Synchlink DRAM, SLDRAM) ) and direct memory bus random access memory (DR RAM).

需要说明的是，当处理器为通用处理器、DSP、ASIC、FPGA或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件时，存储器(存储模块)集成在处理器中。It should be noted that when the processor is a general-purpose processor, DSP, ASIC, FPGA or other programmable logic device, discrete gate or transistor logic device, discrete hardware component, the memory (storage module) is integrated in the processor.

应注意，本文描述的存储器旨在包括但不限于这些和任意其它适合类型的存储器。It should be noted that the memories described herein are intended to comprise, without being limited to, these and any other suitable types of memory.

本领域普通技术人员可以意识到，结合本文中所公开的实施例描述的各示例的单元及算法步骤，能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究竟以硬件还是软件方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本申请的范围。Those of ordinary skill in the art will appreciate that the elements and algorithm steps of the various examples described in connection with the embodiments disclosed herein can be implemented in electronic hardware or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the solution. A person skilled in the art can use different methods to implement the described functions for each particular application, but such implementation should not be considered to be beyond the scope of the present application.

所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，上述描述的***、装置和单元的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。A person skilled in the art can clearly understand that for the convenience and brevity of the description, the specific working process of the system, the device and the unit described above can refer to the corresponding process in the foregoing method embodiment, and details are not described herein again.

在本申请所提供的几个实施例中，应该理解到，所揭露的***、装置和方法，可以通过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如，所述单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个***，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。In the several embodiments provided herein, it should be understood that the disclosed systems, devices, and methods may be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the unit is only a logical function division. In actual implementation, there may be another division manner, for example, multiple units or components may be combined or Can be integrated into another system, or some features can be ignored or not executed. In addition, the mutual coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interface, device or unit, and may be in an electrical, mechanical or other form.

所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。The units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of the embodiment.

另外，在本申请各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

所述功能如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本申请的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本申请各个实施例所述方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(Read-Only Memory，ROM)、随机存取存储器(Random Access Memory，RAM)、磁碟或者光盘等各种可以存储程序代码的介质。The functions may be stored in a computer readable storage medium if implemented in the form of a software functional unit and sold or used as a standalone product. Based on such understanding, the technical solution of the present application, which is essential or contributes to the prior art, or a part of the technical solution, may be embodied in the form of a software product, which is stored in a storage medium, including The instructions are used to cause a computer device (which may be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods described in various embodiments of the present application. The foregoing storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, and the like, which can store program codes. .

以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以所述权利要求的保护范围为准。The foregoing is only a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto, and any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed in the present application. It should be covered by the scope of protection of this application. Therefore, the scope of protection of the present application should be determined by the scope of the claims.

Claims

一种计算CRC编码的方法，其特征在于，包括：A method for calculating CRC coding, comprising:

获取待编码的第一序列；Obtaining a first sequence to be encoded;

使用至少一个多项式对所述待编码的第一序列进行编码，生成第二序列；Encoding the first sequence to be encoded using at least one polynomial to generate a second sequence;

使用本原多项式对所述第二序列进行编码，生成针对第一序列的校验序列，所述至少一个多项中每个多项式为所述本原多项式的倍式，所述至少一个多项式中每个多项式的项数少于所述本原多项式的项数。Encoding the second sequence using a primitive polynomial to generate a check sequence for the first sequence, each of the at least one polynomial being a multiple of the primitive polynomial, each of the at least one polynomial The number of terms of the polynomial is less than the number of terms of the primitive polynomial.
根据权利要求1所述的方法，其特征在于，所述至少一个多项式包括第一多项式，所述第一多项式Q ₁(x)满足： The method of claim 1 wherein said at least one polynomial comprises a first polynomial, said first polynomial Q ₁ (x) satisfying:

Q ₁(x)＝(x ³⁶⁹+x ³¹+1)·x ^a Q ₁ (x)=(x ³⁶⁹ +x ³¹ +1)·x ^a

其中，x ^a为调整系数，a是根据寄存器的容量确定的，且a为大于或等于0的整数，所述寄存器用于存储所述第一序列。 Where x ^a is an adjustment coefficient, a is determined according to the capacity of the register, and a is an integer greater than or equal to 0, and the register is used to store the first sequence.
根据权利要求1或2所述的方法，其特征在于，所述至少一个多项式包括第二多项式，所述第二多项式Q ₂(x)满足： The method according to claim 1 or 2, wherein said at least one polynomial comprises a second polynomial, said second polynomial Q ₂ (x) satisfying:

Q ₂(x)＝(x ⁶⁵⁵³⁵+1)·x ^b Q ₂ (x)=(x ⁶⁵⁵³⁵ +1)·x ^b

其中，x ^b为调整系数，b是根据寄存器的容量确定的，且b为大于或等于0的整数，所述寄存器用于存储所述第一序列。 Where x ^b is an adjustment coefficient, b is determined according to the capacity of the register, and b is an integer greater than or equal to 0, and the register is used to store the first sequence.
根据权利要求3所述的方法，其特征在于，所述对待编码的第一序列使用至少一个多项式进行编码，生成第二序列，包括：The method according to claim 3, wherein the first sequence to be encoded is encoded using at least one polynomial to generate a second sequence, comprising:

对所述待编码的第一序列使用所述第二多项式进行编码，生成第三序列；Encoding the first sequence to be encoded using the second polynomial to generate a third sequence;

对所述第三序列使用所述第一多项式进行编码，生成所述第二序列。The third sequence is encoded using the first polynomial to generate the second sequence.
根据权利要求1至4中任一项所述的方法，其特征在于，所述方法还包括：The method according to any one of claims 1 to 4, further comprising:

根据所述第一序列的长度，确定所述至少一个多项式。The at least one polynomial is determined based on the length of the first sequence.
根据权利要求2所述的方法，所述第一序列的长度为4096。The method of claim 2, the first sequence having a length of 4096.
根据权利要求6所述的方法，其特征在于，所述第二序列的长度为394或422。The method of claim 6 wherein said second sequence has a length of 394 or 422.
根据权利要求3所述的方法，其特征在于，所述第一序列的长度为4194304。The method of claim 3 wherein said first sequence has a length of 4194304.
一种计算CRC编码的装置，其特征在于，包括：An apparatus for calculating a CRC code, comprising:

获取模块，用于获取待编码的第一序列；An obtaining module, configured to obtain a first sequence to be encoded;

处理模块，用于使用至少一个多项式对所述待编码的第一序列进行编码，生成第二序列；a processing module, configured to encode the first sequence to be encoded using at least one polynomial to generate a second sequence;

所述处理模块还用于，使用本原多项式对所述第二序列进行编码，生成针对第一序列的校验序列，所述至少一个多项中每个多项式为所述本原多项式的倍式，所述至少一个多项式中每个多项式的项数少于所述本原多项式的项数。The processing module is further configured to encode the second sequence by using a primitive polynomial to generate a check sequence for the first sequence, where each polynomial of the at least one multiple is a multiple of the primitive polynomial The number of terms of each polynomial in the at least one polynomial is less than the number of terms of the primitive polynomial.
根据权利要求9所述的装置，其特征在于，所述至少一个多项式包括第一多项式，所述第一多项式Q ₁(x)满足： The apparatus of claim 9 wherein said at least one polynomial comprises a first polynomial, said first polynomial Q ₁ (x) satisfying:

Q ₁(x)＝(x ³⁶⁹+x ³¹+1)·x ^a Q ₁ (x)=(x ³⁶⁹ +x ³¹ +1)·x ^a

其中，x ^a为调整系数，a是根据寄存器的容量确定的，且a为大于或等于0的整数，所述寄存器用于存储所述第一序列。 Where x ^a is an adjustment coefficient, a is determined according to the capacity of the register, and a is an integer greater than or equal to 0, and the register is used to store the first sequence.
根据权利要求9或10所述的装置，其特征在于，所述至少一个多项式包括第二多项式，所述第二多项式Q ₂(x)满足： The apparatus according to claim 9 or 10, wherein said at least one polynomial comprises a second polynomial, said second polynomial Q ₂ (x) satisfying:

Q ₂(x)＝(x ⁶⁵⁵³⁵+1)·x ^b Q ₂ (x)=(x ⁶⁵⁵³⁵ +1)·x ^b

其中，x ^b为调整系数，b是根据寄存器的容量确定的，且b为大于或等于0的整数，所述寄存器用于存储所述第一序列。 Where x ^b is an adjustment coefficient, b is determined according to the capacity of the register, and b is an integer greater than or equal to 0, and the register is used to store the first sequence.
根据权利要求11所述的装置，其特征在于，所述处理模块还用于，对所述待编码的第一序列使用所述第二多项式进行编码，生成第三序列；对所述第三序列使用所述第一多项式进行编码，生成所述第二序列。The apparatus according to claim 11, wherein the processing module is further configured to: encode the first sequence to be encoded using the second polynomial to generate a third sequence; The three sequences are encoded using the first polynomial to generate the second sequence.
根据权利要求9至12中任一项所述的装置，其特征在于，所述处理模块还用于，根据所述第一序列的长度，确定所述至少一个多项式。The apparatus according to any one of claims 9 to 12, wherein the processing module is further configured to determine the at least one polynomial according to a length of the first sequence.
根据权利要求10所述的装置，所述第一序列的长度为4096。The apparatus of claim 10, the first sequence having a length of 4096.
根据权利要求14所述的装置，其特征在于，所述第二序列的长度为394或422。The apparatus of claim 14 wherein said second sequence has a length of 394 or 422.
根据权利要求11所述的装置，其特征在于，所述第一序列的长度为4194304。The apparatus of claim 11 wherein said first sequence has a length of 4194304.
一种计算CRC编码的装置，其特征在于，包括：An apparatus for calculating a CRC code, comprising:

接口，用于获取待编码的第一序列；An interface, configured to obtain a first sequence to be encoded;

存储器，用于存储程序；Memory for storing programs;

处理器，用于执行所述存储器中存储的程序，当所述存储器中的程序被执行时，所述处理器用于：通过所述接口获取待编码的第一序列；使用至少一个多项式对所述待编码的第一序列进行编码，生成第二序列；使用本原多项式对所述第二序列进行编码，生成针对第一序列的校验序列，所述至少一个多项中每个多项式为所述本原多项式的倍式，所述至少一个多项式中每个多项式的项数少于所述本原多项式的项数。a processor, configured to execute a program stored in the memory, when the program in the memory is executed, the processor is configured to: acquire a first sequence to be encoded through the interface; use the at least one polynomial to Coding the first sequence to be encoded to generate a second sequence; encoding the second sequence using a primitive polynomial to generate a check sequence for the first sequence, each of the at least one polynomial being A multiple of the primitive polynomial, the number of terms of each of the at least one polynomial being less than the number of terms of the primitive polynomial.
根据权利要求17所述的装置，其特征在于，所述至少一个多项式包括第一多项式，所述第一多项式Q ₁(x)满足： The apparatus of claim 17, wherein said at least one polynomial comprises a first polynomial, said first polynomial Q ₁ (x) satisfying:

Q ₁(x)＝(x ³⁶⁹+x ³¹+1)·x ^a Q ₁ (x)=(x ³⁶⁹ +x ³¹ +1)·x ^a

其中，x ^a为调整系数，a是根据寄存器的容量确定的，且a为大于或等于0的整数，所述寄存器用于存储所述第一序列。 Where x ^a is an adjustment coefficient, a is determined according to the capacity of the register, and a is an integer greater than or equal to 0, and the register is used to store the first sequence.
根据权利要求17或18所述的装置，其特征在于，所述至少一个多项式包括第二多项式，所述第二多项式Q ₂(x)满足： The apparatus according to claim 17 or 18, wherein said at least one polynomial comprises a second polynomial, said second polynomial Q ₂ (x) satisfying:

Q ₂(x)＝(x ⁶⁵⁵³⁵+1)·x ^b Q ₂ (x)=(x ⁶⁵⁵³⁵ +1)·x ^b

其中，x ^b为调整系数，b是根据寄存器的容量确定的，且b为大于或等于0的整数，所述寄存器用于存储所述第一序列。 Where x ^b is an adjustment coefficient, b is determined according to the capacity of the register, and b is an integer greater than or equal to 0, and the register is used to store the first sequence.
根据权利要求19所述的装置，其特征在于，所述处理器还用于，对所述待编码的第一序列使用所述第二多项式进行编码，生成第三序列；对所述第三序列使用所述第一多项式进行编码，生成所述第二序列。The apparatus according to claim 19, wherein the processor is further configured to: encode the first sequence to be encoded using the second polynomial to generate a third sequence; The three sequences are encoded using the first polynomial to generate the second sequence.
根据权利要求17至20中任一项所述的装置，其特征在于，所述处理器还用于，根据所述第一序列的长度，确定所述至少一个多项式。The apparatus according to any one of claims 17 to 20, wherein the processor is further configured to determine the at least one polynomial according to a length of the first sequence.
根据权利要求18所述的装置，所述第一序列的长度为4096。The apparatus of claim 18, the first sequence having a length of 4096.
根据权利要求22所述的装置，其特征在于，所述第二序列的长度为394或422。The apparatus of claim 22 wherein said second sequence has a length of 394 or 422.
根据权利要求19所述的装置，其特征在于，所述第一序列的长度为4194304。The apparatus of claim 19 wherein said first sequence has a length of 4194304.