WO2019210702A1 - 阵列基板及其制备方法、显示面板、显示装置 - Google Patents

阵列基板及其制备方法、显示面板、显示装置 Download PDF

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Publication number
WO2019210702A1
WO2019210702A1 PCT/CN2019/070061 CN2019070061W WO2019210702A1 WO 2019210702 A1 WO2019210702 A1 WO 2019210702A1 CN 2019070061 W CN2019070061 W CN 2019070061W WO 2019210702 A1 WO2019210702 A1 WO 2019210702A1
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WIPO (PCT)
Prior art keywords
touch
substrate
leads
dummy
lead
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PCT/CN2019/070061
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English (en)
French (fr)
Inventor
张大伟
尚建兴
严帅
阮嵩
李森
Original Assignee
京东方科技集团股份有限公司
北京京东方光电科技有限公司
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Priority to US16/489,878 priority Critical patent/US11538835B2/en
Publication of WO2019210702A1 publication Critical patent/WO2019210702A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H01L27/1244—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • G06F3/04164—Connections between sensors and controllers, e.g. routing lines between electrodes and connection pads
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412—Digitisers structurally integrated in a display
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00—Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041—Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04103—Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G06F3/0443—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using a single layer of sensing electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits

Definitions

  • the present disclosure relates to the field of display technologies, and in particular, to an array substrate, a method for fabricating the same, a display panel, and a display device.
  • touch-related leads include leads that are routed in the same layer as the data lines, and the leads are easily shorted to the data lines.
  • the lead wires in the same layer as the data lines are easily short-circuited with the data lines, the voltage on the data lines is pulled low, and dark lines are displayed, which affects the quality of the display screen and affects the user experience.
  • the plurality of data lines and the plurality of dummy leads are located on the same film layer on the base substrate, and the plurality of data lines and the plurality of dummy lead edges Extending in the first direction;
  • At least one of the dummy leads includes: a plurality of wires extending in the first direction and disconnected from each other.
  • the method further includes: a plurality of touch electrodes located on the substrate and located on different layers of the data line;
  • the plurality of touch electrodes are arranged in an array, and the plurality of touch electrodes comprise a plurality of touch electrode columns, wherein the direction of the touch electrode columns is the first direction, and each of the dummy leads The number of the wires is equal to the number of the touch electrodes in one of the touch electrode columns.
  • an orthographic projection of each touch electrode column on the substrate substrate and an orthographic projection of at least one of the dummy leads on the substrate substrate have overlapping regions.
  • an orthographic projection of an interval region between two adjacent wires on the substrate substrate falls into each touch electrode.
  • a spacer region between two adjacent touch electrodes in the column is in an orthographic projection on the base substrate.
  • different lengths of the wires are equal.
  • the method further includes: a plurality of touch leads extending along the first direction and arranged along the second direction on the substrate, and arranged in an array Multiple pixels;
  • Each of the touch electrodes is connected to at least one of the touch leads;
  • the plurality of pixels includes a plurality of pixel columns, the direction of the pixel columns being the first direction;
  • the sum of the number of dummy leads and the number of touch leads is equal to the number of the pixel columns.
  • the touch lead includes: a first sub-touch lead and a second sub-touch lead that are located in different layers and connected through via holes;
  • the second sub-touch lead is disposed in the same layer as the data line.
  • the method further includes: a touch virtual lead located on the base substrate and located on the same film layer as the first sub-touch lead;
  • An orthographic projection of the touch virtual lead on the base substrate and an orthographic projection of the dummy lead on the base substrate have an overlapping area
  • the touch virtual lead includes: a plurality of sub-leads extending along the first direction and disconnected from each other.
  • a display panel provided by the embodiment of the present disclosure includes the above array substrate.
  • a display device provided by the embodiment of the present disclosure includes the above display panel.
  • the method for fabricating the above array substrate includes: forming a pattern of dummy leads and a pattern of data lines on the same substrate layer on the base substrate;
  • the forming the pattern of the dummy leads comprises: forming a plurality of patterns of wires extending in the first direction and disconnected from each other by using a mask comprising a plurality of openings extending in the first direction and disconnected from each other.
  • FIG. 1 is a schematic structural diagram of an array substrate according to an embodiment of the present disclosure
  • FIG. 2 is a schematic diagram of relationship between a pixel unit and a lead position according to an embodiment of the present disclosure
  • Figure 3 is a cross-sectional view along line AA' of Figure 2 provided by an embodiment of the present disclosure
  • Figure 4 is a cross-sectional view along line BB' of Figure 2, in accordance with an embodiment of the present disclosure
  • FIG. 5 is a schematic diagram of a mask used in preparing an array substrate according to an embodiment of the present disclosure.
  • An embodiment of the present disclosure provides an array substrate, as shown in FIG. 1 , including:
  • Substrate substrate (not shown in Figure 1);
  • the plurality of data lines and the plurality of dummy leads 3 are located on the same film layer on the base substrate, and the plurality of data lines and the plurality of lines
  • the dummy lead 3 extends in the first direction Y;
  • At least one dummy lead 3 includes: a plurality of wires 4 extending in the first direction Y and disconnected from each other.
  • the data line and the dummy lead are prone to short circuit.
  • the dummy lead includes a plurality of wires extending in the first direction and disconnected from each other, the length of the wire short-circuited with the data line when the dummy lead in the same layer is short-circuited with the data line is compared with when the entire dummy lead is disposed When the voltage is reduced, the voltage drop of the data line is reduced, thereby preventing display dark lines, improving the display effect, and improving the user experience.
  • the plurality of data lines and the plurality of dummy leads extend along the first direction Y, and the arrangement of the plurality of data lines and the plurality of dummy leads in the second direction X may be determined according to actual needs, wherein the second The direction X is intersected with the first direction Y, for example, may be vertically intersected or may be crossed at other angles, which is not limited herein.
  • each dummy lead 3 is on the same straight line extending along the first direction Y. It can ensure that the dummy leads are evenly arranged in the area where the array substrate is located, thereby further ensuring display uniformity of the product.
  • the lengths of the different wires 4 are equal. This ensures that the data line voltage is reduced to the same extent.
  • all the wires 4 on the array substrate can be set to the same length.
  • the length of the wires 4 can also be set in regions, for example, the lengths of the wires 4 belonging to the same dummy lead 3 can be set.
  • the lengths of the wires 4 in the middle of the display area are the same, and the lengths of the wires 4 located at the edge of the display area are the same, which can be set according to actual needs, which is not limited herein.
  • the array substrate provided by the embodiment of the present disclosure may further include: a plurality of touch electrodes 5 on the substrate substrate and different from the data lines;
  • the plurality of touch electrodes 5 are arranged in an array, and the plurality of touch electrodes 5 include a plurality of touch electrode columns 6.
  • the column direction of the touch electrode columns 6 is a first direction Y, and the strips of the wires 4 in each dummy lead 3
  • the number is equal to the number of the touch electrodes 5 in the touch electrode array 6. In this way, the structural design of the array substrate is facilitated, and at the same time, the process of forming a plurality of segments of wires is easy to implement.
  • the number of the wires 4 in each of the dummy leads 3 is equal to the number of the touch electrodes 5 in the touch electrode row 6 , thereby facilitating the structural design of the array substrate.
  • the process of forming a plurality of segments of wires is easy to implement.
  • the lengths of the different wires 4 in each of the dummy leads 3 are equal, thereby ensuring the shortest length of each wire and minimizing the voltage drop of the data line.
  • each touch electrode column on the substrate substrate there is an overlapping area between the orthographic projection of each touch electrode column on the substrate substrate and the orthographic projection of the at least one dummy lead on the substrate substrate, such that each touch electrode column
  • Each of the dummy leads corresponds to at least one dummy lead, so that the dummy leads can be distributed substantially evenly on the substrate.
  • each touch electrode corresponds to at least one wire, so that the position of the wire corresponds to the position of the touch electrode, so that the wire of the wire is more uniform, and the display uniformity is further improved.
  • the array substrate provided by the embodiment of the present disclosure may further include: a plurality of touch leads extending along the first direction and arranged in the second direction on the substrate, and arranged in an array Pixels
  • Each touch electrode is connected to at least one touch lead
  • the plurality of pixel units includes a plurality of pixel unit columns, and the direction of the pixel unit columns is the first direction;
  • the sum of the number of dummy leads and the number of touch leads is equal to the number of columns of pixel cells.
  • the array substrate includes a touch lead 2 connected to the touch electrode 5 , and further includes a driving circuit 7 connected to the touch lead 2 and the dummy lead 3 , and the driving circuit 7 provides a common voltage signal for the touch lead 2 .
  • the touch signal in addition, the driving circuit 7 can also provide a common voltage signal for the dummy lead 3 to improve display uniformity.
  • the electrical connection position between the touch lead 2 and the touch electrode 5 is the connection area A, and specifically, can be connected.
  • the electrical connection between the touch lead 2 and the touch electrode 5 is realized through the via hole at the position of the area A. In FIG. 1 , each touch lead and the touch electrode are electrically connected through two connection areas A.
  • each pixel 8 includes three sub-pixels 9.
  • each pixel 5 may include a red sub-pixel, a blue sub-pixel, and a green sub-pixel, and may also include more Sub-pixels, not limited here.
  • Each of the sub-pixels is divided by a gate line L1 and a data line L2 that intersect each other, and each of the sub-pixel units 9 includes a thin film transistor (TFT) 10 connected to the gate line L1 and the data line L2, and a thin film transistor.
  • TFT thin film transistor
  • the pixel electrode 11 connected to each pixel 8 corresponds to a dummy lead 3 or a touch lead 2, so that the number of leads (touch leads or dummy leads) is equal to the number of pixel columns, thereby ensuring products. Show uniformity.
  • the different wires in each dummy lead do not overlap in the first direction, it is ensured that the leads are evenly arranged in the area where the array substrate is located, thereby further ensuring display uniformity of the product.
  • each touch electrode column corresponds to N pixel columns, and each touch electrode column includes M touch electrodes.
  • each touch electrode column 6 needs to correspond to M touches.
  • Lead 2 when M ⁇ N, and each touch electrode is connected to one touch lead, in order to ensure display uniformity, that is, in order to make the number of pixel columns and the number of leads the same, each touch electrode column coverage area Need to set the NM strip dummy lead.
  • FIG. 1 is only an example of an orthographic projection of a dummy lead covering each of the touch electrode columns as an example.
  • the number of leads of the electrodes is connected to determine how many dummy leads are required for each touch electrode column.
  • the touch electrodes in FIG. 1 are rectangular.
  • the touch electrodes may have other shapes.
  • the shape of the touch electrodes of the array substrate and the lead arrangement may be selected according to actual needs.
  • the touch lead includes: a first sub-touch lead and a second sub-touch lead that are located in different layers and connected through the via;
  • the second sub-touch lead is disposed in the same layer as the data line.
  • the dummy lead is disposed in the same layer as the second sub-touch lead, and the orthographic projection of the first sub-touch electrode on the base substrate and the orthographic projection of the second sub-touch electrode on the base substrate have overlapping regions, and thus are located differently
  • the first sub-touch electrode and the second sub-touch electrode of the layer can be connected through the via hole, so that the resistance of the touch lead can be reduced, and the second sub-touch lead is disposed in the same layer as the data line to simplify the process of fabricating the array substrate.
  • FIG. 3 is a cross-sectional view along AA' in FIG. 2, and FIG. 2, the cross-sectional view along BB', as shown in FIG. 3, the upper array substrate includes: a substrate 12, a gate 13, a gate insulating layer 14, an active layer 15, a source 16, a drain 17, and a pixel electrode 11 connected to the drain 17 , a data line 18 and a second sub-touch lead 19 disposed in the same layer as the source 16 and the drain 17 , and a first insulating layer 20 are disposed on the first insulating layer 20 .
  • the first sub-touch lead 22 connected to the second sub-touch lead 19, the second insulating layer 23, and the via 21 disposed on the second insulating layer 23 are connected to the first sub-touch lead 22 Touch electrode 5.
  • the second sub-touch lead 19 may be referred to as an SDT (Source Data Metal) line
  • the first sub-touch lead 22 may be referred to as a TPM (Touch Panel Metal) line, which is disposed in the same layer as the SDT line in the embodiment of the present disclosure.
  • a dummy lead can be called a dummy SDT line.
  • the touch dummy lead located on the base substrate 12 and located on the same film layer as the first sub-touch lead 22 may be further included. twenty four;
  • the front projection of the touch dummy lead 24 on the base substrate 12 has an overlapping area with the orthographic projection of the dummy lead 3 on the base substrate 12;
  • the touch virtual lead includes: a plurality of sub-leads (not shown) extending in the first direction Y and disconnected from each other.
  • the touch virtual lead can be represented as a dummy TPM line, and the touch virtual lead is also set as a plurality of sub-leads extending in the first direction and disconnected from each other, so that the touch virtual lead and the dummy lead are aligned, which is advantageous.
  • the uniformity of the wiring is favorable for display uniformity.
  • the setting manner of each sub-lead in the touch virtual lead can refer to the setting of each wire in the dummy lead, and details are not described herein again.
  • the array substrate shown in FIG. 4 includes a base substrate 12, a gate electrode 13, a gate insulating layer 14, an active layer 15, a source electrode 16, a drain electrode 17, and a pixel electrode 11 connected to the drain electrode 17.
  • the data line 18 and the dummy lead 3, the first insulating layer 20, the touch dummy lead 24, the second insulating layer 23, and the touch electrode 5 are disposed in the same layer as the source 16 and the drain 17.
  • an embodiment of the present disclosure provides a display panel including the above array substrate provided by the embodiments of the present disclosure.
  • the display panel provided by the embodiment of the present disclosure may be, for example, a touch and display driver integration (TDDI) type display panel, and may be a liquid crystal display panel or an organic light emitting diode display panel. Since the principle of solving the problem of the display panel is similar to that of the foregoing array substrate, the implementation of the display panel can be referred to the implementation of the array substrate, and the repeated description is omitted.
  • TDDI touch and display driver integration
  • an embodiment of the present disclosure provides a display device including a display panel provided by an embodiment of the present disclosure.
  • the display device provided by the embodiment of the present disclosure may be, for example, a device such as a mobile phone or a tablet computer.
  • the implementation of the display device can be referred to the implementation of the display panel, and the repeated description is omitted.
  • an embodiment of the present disclosure further provides a method for fabricating an array substrate.
  • the principle of solving the problem is similar to that of the array substrate. Therefore, the implementation of the preparation method can be referred to the implementation of the array substrate, and the repetition is not Let me repeat.
  • the method includes: forming a pattern of dummy leads and a pattern of data lines on the same film layer on a base substrate;
  • forming the pattern of the dummy leads comprises: adopting a mask comprising a plurality of openings extending in the first direction and disconnecting from each other, a plurality of patterns of wires extending in the first direction and disconnected from each other.
  • the mask plate 25 used in the method for fabricating the array substrate provided by the embodiment of the present disclosure is exemplified.
  • the mask plate 25 includes a plurality of openings 26 extending in the first direction Y and disconnected from each other, and The partial openings overlap in the first direction.
  • the plurality of openings in the region 27 coincide in the first direction Y.
  • a wire that is coincident and disconnected in one direction constitutes a dummy lead.
  • a pattern of touch leads and a pattern of data lines may be formed on the substrate; and then a pattern of dummy leads is formed using a mask as shown in FIG. 5.
  • the array substrate and the preparation method thereof, the display panel, and the display device provided by the embodiments of the present disclosure, because the dummy leads include a plurality of wires extending in the first direction and disconnected from each other, when the dummy leads and the data lines are located in the same layer
  • the dummy leads and the data lines are located in the same layer
  • the length of the wire shorted to the data line is reduced, and the voltage drop of the data line is reduced, thereby preventing display dark lines, improving the display effect, and improving the user experience.
  • the number of the wires in each of the dummy leads can be set to be equal to the number of the touch electrodes in the touch electrode column, thereby facilitating the structural design of the array substrate and making the process of forming the multi-segment wires easy to implement.
  • the lengths of the different wires in each dummy lead are equal, so that the length of each wire can be minimized, and the voltage drop of the data line is minimized.
  • the sum of the number of dummy leads and the number of touch leads is equal to the number of columns of pixel cells, so that display uniformity of the product can be ensured.
  • the leads are evenly arranged in the area where the array substrate is located, thereby further ensuring display uniformity of the product.

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Abstract

本公开公开了一种阵列基板及其制备方法、显示面板、显示装置，该阵列基板，包括：衬底基板；多条数据线和多条虚设引线，多条数据线和多条虚设引线位于衬底基板上的同一膜层，且多条数据线和多条虚设引线沿第一方向延伸且；至少一条虚设引线，包括：多条沿第一方向延伸且相互断开的导线。

Description

阵列基板及其制备方法、显示面板、显示装置
本公开要求在2018年5月2日提交中国专利局、申请号为201810410453.X、公开名称为“一种阵列基板及其制备方法、显示面板、显示装置”的中国专利申请的优先权，其全部内容以引入的方式并入本公开中。
技术领域
本公开涉及显示技术领域，尤其涉及一种阵列基板及其制备方法、显示面板、显示装置。
背景技术
随着显示技术的飞速发展，触控显示产品已经逐渐遍及我们的生活中。目前，涉及触控的引线中包括与数据线同层布线的引线，该部分引线很容易与数据线发生短路(short)。综上，现有技术中由于与数据线同层布线的引线容易与数据线发生短路，从而会将数据线上的电压拉低，出现显示暗纹，影响显示画面的品质，影响用户体验。
发明内容
本公开实施例提供的一种阵列基板，其中，包括：
衬底基板；
多条数据线和多条虚设引线，所述多条数据线和所述多条虚设引线位于所述衬底基板上的同一膜层，且所述多条数据线和所述多条虚设引线沿第一方向延伸；
至少一条所述虚设引线，包括：多条沿所述第一方向延伸且相互断开的导线。
可选地，在本公开实施例中，还包括：位于所述衬底基板上与所述数据线位于不同膜层的多个触控电极；
多个所述触控电极呈阵列分布，多个所述触控电极包括多个触控电极列，所述触控电极列的方向为所述第一方向，每一所述虚设引线中的所述导线的条数与一所述触控电极列中触控电极的个数相等。
可选地，在本公开实施例中，每一触控电极列在所述衬底基板上的正投影与至少一条所述虚设引线在所述衬底基板上的正投影存在重叠区域。
可选地，在本公开实施例中，每一所述虚设引线中，相邻两条所述导线之间的间隔区域在所述衬底基板上的的正投影，落入每一触控电极列中相邻两个所述触控电极之间的间隔区域在所述衬底基板上的正投影中。
可选地，在本公开实施例中，每一所述虚设引线中，不同所述导线在沿所述第一方向延伸的同一直线上。
可选地，在本公开实施例中，不同所述导线的长度相等。
可选地，在本公开实施例中，还包括：位于所述衬底基板上的多条沿所述第一方向延伸且沿所述第二方向排列的触控引线，以及呈阵列排布的多个像素；
每一个所述触控电极至少与一条所述触控引线连接；
多个所述像素包括多个像素列，所述像素列的方向为所述第一方向；
所述虚设引线的数量和所述触控引线的数量之和等于所述像素列的数量。
可选地，在本公开实施例中，所述触控引线，包括：位于不同层且通过过孔连接的第一子触控引线和第二子触控引线；
所述第二子触控引线与所述数据线同层设置。
可选地，在本公开实施例中，还包括：位于所述衬底基板上且与所述第一子触控引线位于同一膜层的触控虚拟引线；
所述触控虚拟引线在所述衬底基板上的正投影与所述虚设引线在所述衬底基板上的正投影具有重叠区域；
所述触控虚拟引线，包括：多条沿所述第一方向延伸且相互断开的子引线。
相应地，本公开实施例提供的一种显示面板，其中，包括上述阵列基板。
相应地，本公开实施例提供的一种显示装置，其中，包括上述显示面板。
相应地，本公开实施例提供的上述阵列基板的制备方法，其中，包括：在衬底基板上形成位于同一膜层的虚设引线的图案和数据线的图案；
其中，所述形成所述虚设引线的图案包括：采用包括多个沿第一方向延伸且相互断开的开口的掩膜板，形成多条沿第一方向延伸且相互断开的导线的图案。
附图说明
图1为本公开实施例提供的一种阵列基板结构示意图；
图2为本公开实施例提供的一种像素单元与引线位置关系示意图；
图3为本公开实施例提供的图2中沿AA’的剖面图；
图4为本公开实施例提供的图2中沿BB’的剖面图；
图5为本公开实施例提供的制备阵列基板采用的掩膜板的示意图。
具体实施方式
为了使本公开的目的、技术方案和优点更加清楚，下面将结合附图对本公开作进一步地详细描述，显然，所描述的实施例仅是本公开一部分实施例，而不是全部的实施例。基于本公开中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其它实施例，都属于本公开保护的范围。
附图中各部件的形状和大小不反映真实比例，目的只是示意说明本公开内容。
本公开实施例提供了一种阵列基板，如图1所示，包括：
衬底基板(图1中未示出)；
多条数据线(图1中未示出)和多条虚设引线(dummy)3，多条数据线和多条虚设引线3位于衬底基板上的同一膜层，且多条数据线和多条虚设引线3沿第一方向Y延伸；
至少一条虚设引线3，包括：多条沿第一方向Y延伸且相互断开的导线4。
本公开实施例提供的阵列基板，由于存在在数据线与虚设引线的距离较近的情况，例如同一个像素间隙处同时具有数据线和虚设引线的情况，因而数据线与虚设引线容易出现短路，由于虚设引线包括多条沿第一方向延伸且相互断开的导线，与设置一整根虚设引线相比，当位于同层的虚设引线与数据线发生短路时，与数据线短路的导线的长度减小，数据线的电压降低程度减小，从而可以避免出现显示暗纹，提高显示效果，提升用户体验。
在具体实施时，上述多条数据线和多条虚设引线沿第一方向Y延伸，可以根据实际需要来确定多条数据线和多条虚设引线在第二方向X的排列情况，其中，第二方向X与第一方向Y交叉设置，例如可以垂直交叉，也可以按其他角度交叉，此处不做限定。
可选地，本公开实施例提供的上述阵列基板中，如图1所示，每一虚设引线3中不同导线4在沿第一方向Y延伸的同一直线上。可以保证虚设引线在阵列基板所在区域均匀排列，进一步保证产品的显示均一性。
可选地，如图1所示，不同导线4的长度相等。从而可以保证数据线电压降低的程度相同。本公开实施例中，可以将阵列基板上所有的导线4均设置为相同的长度，此外，还可以分区域地设置导线4的长度，例如可以设置为属于同一虚设引线3的各导线4的长度相同，或者可以设置为位于显示区域中间位置的各导线4的长度相同，位于显示区域边缘位置的各导线4的长度相同，可以根据实际需要来设置，此处不做限定。
可选地，本公开实施例提供的阵列基板中，如图1所示，还可以包括：位于衬底基板上与数据线位于不同膜层的多个触控电极5；
多个触控电极5呈阵列分布，多个触控电极5包括多个触控电极列6，触控电极列6的列方向为第一方向Y，每一虚设引线3中的导线4的条数与一触控电极列6中触控电极5的个数相等。这样，便于阵列基板的结构设计，同时使得形成多段导线的工艺易于实现。
本公开实施例提供的上述阵列基板中，参照图1，每一条虚设引线3中导 线4的条数与触控电极列6中触控电极5的个数相等，这样，便于阵列基板的结构设计，同时使得形成多段导线的工艺易于实现，在此基础上，每一条虚设引线3中不同导线4的长度相等，从而可以保证每一导线的长度最短，最大程度减小数据线电压降低。
可选地，在阵列基板所在的平面内，每一触控电极列在衬底基板上的正投影与至少一条虚设引线在衬底基板上的正投影存在重叠区域，这样每一个触控电极列均对应至少一条虚设引线，从而可以使虚设引线大致均匀的分布与衬底基板上。
可选地，本公开实施例提供的上述阵列基板中，如图1所示，每一虚设引线3中，相邻两条导线4之间的间隔区域在衬底基板上的正投影，落入每一触控电极列6中相邻两个触控电极5之间的间隔区域在衬底基板上的正投影中。也就是每一个触控电极至少对应一个导线，从而使导线的位置与触控电极的位置相对应，使导线的布线更加均匀，进一步提高显示均一性。
可选地，本公开实施例提供的上述阵列基板中，还可以包括：位于衬底基板上的多条沿第一方向延伸且沿第二方向排列的触控引线，以及呈阵列排布的多个像素；
每一个触控电极至少与一条触控引线连接；
多个像素单元包括多个像素单元列，像素单元列的方向为第一方向；
虚设引线的数量和触控引线的数量之和等于像素单元列的数量。
如图1所示，阵列基板包括与触控电极5连接的触控引线2，还包括与触控引线2和虚设引线3连接的驱动电路7，驱动电路7为触控引线2提供公共电压信号和触控信号，此外，驱动电路7也可以为虚设引线3提供公共电压信号，以提高显示均一性，触控引线2与触控电极5电连接位置为连接区A，具体地，可以在连接区A的位置处通过过孔实现触控引线2与触控电极5的电连接。图1中以每一个触控引线与触控电极通过两个连接区A电连接为例进行说明，在具体实施时，触控引线与触控电极也可以只有一个连接区或更多的连接区，本公开不进行限制。图2为部分像素与引线关系示意图，在图2 中，每一个像素8包括三个子像素9，例如每一个像素5可以包括红色子像素、蓝色子像素和绿色子像素，也可以包括更多个子像素，此处不做限定。每一个子像素由相互交叉的栅线L1和数据线L2划分而成，每一个子像素单元9包括与栅线L1和数据线L2连接的薄膜晶体管(Thin Film Transistor，TFT)10以及与薄膜晶体管连接的像素电极11，每一个像素8组成的像素列对应一条虚设引线3或触控引线2，这样可以保证引线(触控引线或虚设引线)的数量与像素列的数量相等，从而可以保证产品的显示均一性。此外，当每一虚设引线中不同导线沿第一方向不重合，可以保证引线在阵列基板所在区域均匀排列，进一步保证产品的显示均一性。
在具体实施时，每一触控电极列对应N个像素列，每一个触控电极列包括M个触控电极，从图1可以看出，需要每一个触控电极列6对应M条触控引线2，当M<N，且每一触控电极连接1条触控引线时，为了保证显示均一性，也就是为了使像素列的数量与引线的数量相同，每一触控电极列覆盖区域需要设置N-M条虚设引线。图1只是以每一个触控电极列的正投影覆盖1条虚设引线的正投影为例进行说明，在实际设计阵列基板结构时，为了保证显示均一性，需要根据M、N以及每一个触控电极连接的引线的条数来确定每一个触控电极列需要对应多少条虚设引线。此外，图1中的触控电极为矩形，当然触控电极也可以是其他形状，阵列基板触控电极的形状以及引线设置可以根据实际需要进行选择。
可选地，在本公开实施例中的上述阵列基板中，触控引线，包括：位于不同层且通过过孔连接的第一子触控引线和第二子触控引线；
第二子触控引线与数据线同层设置。
即虚设引线与第二子触控引线同层设置，第一子触控电极在衬底基板上的正投影与第二子触控电极在衬底基板上的正投影具有重叠区域，因而位于不同层的第一子触控电极和第二子触控电极可以通过过孔连接，从而能够降低触控引线的电阻，将第二子触控引线与数据线同层设置可以简化阵列基板制作工艺。
接下来分别以图2中沿AA’、BB’的截面图为例，对本公开实施例提供的阵列基板的结构进行举例说明，图3为图2中沿AA’处的截面图，图4为图2中沿BB’处的截面图，如图3所示，上阵列基板包括：衬底基板12、栅极13、栅绝缘层14、有源层15、源极16、漏极17、与漏极17连接的像素电极11、与源极16和漏极17同层设置的数据线18和第二子触控引线19、第一绝缘层20、通过设置在第一绝缘层20上的过孔21与第二子触控引线19连接的第一子触控引线22、第二绝缘层23、以及通过设置在第二绝缘层23上的过孔21与第一子触控引线22连接的触控电极5。其中，第二子触控引线19可以称为SDT(Source Data Metal)线，第一子触控引线22可以称为TPM(Touch Panel Metal)线，本公开实施例中与SDT线同层设置的虚设引线可以称为dummy SDT线。
此外，在本公开实施例提供的上述阵列基板中，如图3和4所示，还可以包括：位于衬底基板12上且与第一子触控引线22位于同一膜层的触控虚拟引线24；
触控虚拟引线24在衬底基板12上的正投影与虚设引线3在衬底基板12上的正投影具有重叠区域；
触控虚拟引线，包括：多条沿第一方向Y延伸且相互断开的子引线(图中未示出)。
上述触控虚拟引线可以表示为dummy TPM线，将触控虚拟引线也设置为多条沿第一方向延伸且相互断开的子引线，从而使触控虚拟引线与虚设引线的布线一致，有利于布线均一性，从而有利于显示均一性，触控虚拟引线中各子引线的设置方式可以参照虚设引线中各导线的设置，此处不再赘述。与图3类似，图4所示的阵列基板包括：衬底基板12、栅极13、栅绝缘层14、有源层15、源极16、漏极17、与漏极17连接的像素电极11、与源极16和漏极17同层设置的数据线18和虚设引线3、第一绝缘层20、触控虚拟引线24、第二绝缘层23、以及触控电极5。
基于同一发明构思，本公开实施例提供了一种显示面板，包括本公开实 施例提供的上述的阵列基板。本公开实施例提供的显示面板例如可以是触控与显示驱动器集成(Touch and Display Driver Integration，TDDI)型显示面板，可以是液晶显示面板，也可以是有机发光二极管显示面板。由于该显示面板解决问题的原理与前述阵列基板相似，因此该显示面板的实施可以参见阵列基板的实施，重复之处不再赘述。
基于同一发明构思，本公开实施例提供了一种显示装置，包括本公开实施例提供的显示面板。
本公开实施例提供的显示装置例如可以是手机、平板电脑等装置。
由于该显示装置解决问题的原理与前述显示面板相似，因此该显示装置的实施可以参见显示面板的实施，重复之处不再赘述。
基于同一发明构思，本公开实施例还提供一种阵列基板的制备方法，由于该制备方法解决问题的原理与前述阵列基板相似，因此该制备方法的实施可以参见阵列基板的实施，重复之处不再赘述。
该方法包括：在衬底基板上形成位于同一膜层的虚设引线的图案和数据线的图案；
其中，形成虚设引线的图案包括：采用包括多个沿第一方向延伸且相互断开的开口的掩膜板，多条沿第一方向延伸且相互断开的导线的图案。
接下来对本公开实施例提供的阵列基板制备方法中采用的掩膜板进行举例说明，如图5所示，掩膜板25包括多个沿第一方向Y延伸且相互断开的开口26，且部分开口沿第一方向重合，例如区域27中的多个开口沿第一方向Y重合，在利用该掩膜板蒸镀金属材料，便可在衬底上区域27对应的部分形成多条沿第一方向重合且断开的导线，构成一条虚设引线。具体的，例如可以在衬底上形成触控引线的图案以及数据线的图案；之后再利用如图5所示的掩膜板形成虚设引线的图案。
综上，本公开实施例提供的阵列基板及其制备方法、显示面板、显示装置，由于虚设引线包括多条沿第一方向延伸且相互断开的导线，当位于同层的虚设引线与数据线发生短路时，与数据线短路的导线的长度减小，数据线 的电压降低程度减小，从而可以避免出现显示暗纹，提高显示效果，提升用户体验。在具体实施时，可以将每一条虚设引线中导线的条数设置为与触控电极列中触控电极的个数相等，这样，便于阵列基板的结构设计，同时使得形成多段导线的工艺易于实现，在此基础上，每一条虚设引线中不同导线的长度相等，从而可以保证每一导线的长度最短，最大程度减小数据线电压降低。具体地，可以设置为虚设引线的数量和触控引线的数量之和等于像素单元列的数量，从而可以保证产品的显示均一性。此外，当每一虚设引线中不同导线沿第一方向重合，可以保证引线在阵列基板所在区域均匀排列，进一步保证产品的显示均一性。
尽管已描述了本公开的优选实施例，但本领域内的技术人员一旦得知了基本创造性概念，则可对这些实施例作出另外的变更和修改。所以，所附权利要求意欲解释为包括优选实施例以及落入本公开范围的所有变更和修改。
显然，本领域的技术人员可以对本公开实施例进行各种改动和变型而不脱离本公开实施例的精神和范围。这样，倘若本公开实施例的这些修改和变型属于本公开权利要求及其等同技术的范围之内，则本公开也意图包含这些改动和变型在内。

Claims (12)

  1. 一种阵列基板，其中，包括：
    衬底基板；
    多条数据线和多条虚设引线，所述多条数据线和所述多条虚设引线位于所述衬底基板上的同一膜层，且所述多条数据线和所述多条虚设引线沿第一方向延伸；
    至少一条所述虚设引线，包括：多条沿所述第一方向延伸且相互断开的导线。
  2. 根据权利要求1所述的阵列基板，其中，还包括：位于所述衬底基板上与所述数据线位于不同膜层的多个触控电极；
    多个所述触控电极呈阵列分布，多个所述触控电极包括多个触控电极列，所述触控电极列的方向为所述第一方向，每一所述虚设引线中的所述导线的条数与一所述触控电极列中触控电极的个数相等。
  3. 根据权利要求2所述的阵列基板，其中，每一触控电极列在所述衬底基板上的正投影与至少一条所述虚设引线在所述衬底基板上的正投影存在重叠区域。
  4. 根据权利要求3所述的阵列基板，其中，每一所述虚设引线中，相邻两条所述导线之间的间隔区域在所述衬底基板上的的正投影，落入每一触控电极列中相邻两个所述触控电极之间的间隔区域在所述衬底基板上的正投影中。
  5. 根据权利要求1～4任一项所述的阵列基板，其中，每一所述虚设引线中，不同所述导线在沿所述第一方向延伸的同一直线上。
  6. 根据权利要求1～4任一项所述的阵列基板，其中，不同所述导线的长度相等。
  7. 根据权利要求2所述的阵列基板，其中，还包括：位于所述衬底基板上的多条沿所述第一方向延伸且沿所述第二方向排列的触控引线，以及呈阵 列排布的多个像素；
    每一个所述触控电极至少与一条所述触控引线连接；
    多个所述像素包括多个像素列，所述像素列的方向为所述第一方向；
    所述虚设引线的数量和所述触控引线的数量之和等于所述像素列的数量。
  8. 根据权利要求7所述的阵列基板，其中，所述触控引线，包括：位于不同层且通过过孔连接的第一子触控引线和第二子触控引线；
    所述第二子触控引线与所述数据线同层设置。
  9. 根据权利要求8所述的阵列基板，其中，还包括：位于所述衬底基板上且与所述第一子触控引线位于同一膜层的触控虚拟引线；
    所述触控虚拟引线在所述衬底基板上的正投影与所述虚设引线在所述衬底基板上的正投影具有重叠区域；
    所述触控虚拟引线，包括：多条沿所述第一方向延伸且相互断开的子引线。
  10. 一种显示面板，其中，包括根据权利要求1～9任一项所述的阵列基板。
  11. 一种显示装置，其中，包括根据权利要求10所述的显示面板。
  12. 一种根据权利要求1～9任一项所述的阵列基板的制备方法，其中，包括：在衬底基板上形成位于同一膜层的虚设引线的图案和数据线的图案；
    其中，所述形成所述虚设引线的图案包括：采用包括多个沿第一方向延伸且相互断开的开口的掩膜板，形成多条沿第一方向延伸且相互断开的导线的图案。
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