WO2019158868A1 - Passivated emitter and rear contact photovoltaic or photodetector device and method for manufacturing such a device - Google Patents

Passivated emitter and rear contact photovoltaic or photodetector device and method for manufacturing such a device Download PDF

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Publication number
WO2019158868A1
WO2019158868A1 PCT/FR2019/050336 FR2019050336W WO2019158868A1 WO 2019158868 A1 WO2019158868 A1 WO 2019158868A1 FR 2019050336 W FR2019050336 W FR 2019050336W WO 2019158868 A1 WO2019158868 A1 WO 2019158868A1
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Prior art keywords
layer
rear face
silicon
porous
pores
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PCT/FR2019/050336
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French (fr)
Inventor
Etienne DRAHI
Pierre-Philippe Grand
Guillaume Fischer
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Total Solar International
Electricite De France - Edf
Horiba France Sas
Centre National De La Recherche Scientifique
Ecole Polytechnique
Institut Photovoltaique D'ile De France - Ipvf
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Application filed by Total Solar International, Electricite De France - Edf, Horiba France Sas, Centre National De La Recherche Scientifique, Ecole Polytechnique, Institut Photovoltaique D'ile De France - Ipvf filed Critical Total Solar International
Publication of WO2019158868A1 publication Critical patent/WO2019158868A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0232—Optical elements or arrangements associated with the device
    • H01L31/02327—Optical elements or arrangements associated with the device the optical elements being integrated or being directly associated to the device, e.g. back reflectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0236—Special surface textures
    • H01L31/02363—Special surface textures of the semiconductor body itself, e.g. textured active layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/054—Optical elements directly associated or integrated with the PV cell, e.g. light-reflecting means or light-concentrating means
    • H01L31/056—Optical elements directly associated or integrated with the PV cell, e.g. light-reflecting means or light-concentrating means the light-reflecting means being of the back surface reflector [BSR] type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • H01L31/0682—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells back-junction, i.e. rearside emitter, solar cells, e.g. interdigitated base-emitter regions back-junction cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • H01L31/0684—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells double emitter cells, e.g. bifacial solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • H01L31/0687—Multiple junction or tandem solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/102—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier
    • H01L31/103—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier being of the PN homojunction type
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/52—PV systems with concentrators
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/544—Solar cells from Group III-V materials
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention generally relates to the field of photovoltaic devices (PV) for receiving a light beam and converting it into electric current.
  • PV photovoltaic devices
  • PV photovoltaic solar cell
  • It also relates to a method of manufacturing a photovoltaic device with electronic junction based on crystalline silicon or photovoltaic panel comprising several photovoltaic devices electrically connected to each other.
  • Solar cells based on crystalline silicon substrate have a low absorption coefficient in the infrared.
  • infrared radiation is understood to mean light radiation having a wavelength of between about 900 nm and 1200 nm in vacuum. The aim is to increase the trapping and absorption of infrared radiation in a crystalline silicon solar cell while reducing the thickness of silicon in order to reduce manufacturing costs.
  • a PERC cell has an additional layer disposed on the rear face. This dielectric layer of passivation reflects a part of the light not absorbed during a first pass through the solar cell.
  • a reflective metal layer generally covers the back face and also contributes to reflect some of the unabsorbed light.
  • part of the light is reflected on the rear face. The amount of reflected light depends on the crystalline silicon thickness and the wavelength. For a cell 200 ⁇ m thick, reflection on the back side becomes important for wavelengths greater than 1 pm. For a 100 ⁇ m thick cell, reflection on the back side becomes important for wavelengths greater than 950nm.
  • PERC cells In the category of PERC cells, there are different variants such as PERL, PERT or PERF.
  • a PERT cell (passivated emitter with rear totally diffused, in English terminology) has, on the back, a fully diffused layer in electrical contact with a metal layer.
  • a PERL (passivated emitter with rear locally distributed) cell comprises, on the front face, a passivated emitter layer and, on the rear face, diffusion zones limited to the metal contacts.
  • a PERF cell Passivated Emitter, Rear Floating-junction, in English terminology
  • PERC monofacial device that is to say intended to be exposed to radiation only on the front face, or in a PERC bifacial device, intended to be exposed to a radiation on the front and back side.
  • a monofacial PERC device comprising a reflective metal layer on the rear face of the device, it is sought to reduce the parasitic absorption of infrared radiation in the metal layer or the absorption of surface plasmon polaritons at the interface between the metal layer and the silicon substrate.
  • a first approach to increase the absorption of infrared radiation in a PERC solar cell consists in depositing by thermal evaporation a layer of magnesium fluoride (MgF 2 ) having a thickness of between 200 nm and 500 nm.
  • MgF 2 magnesium fluoride
  • a passivation layer is formed between the substrate and a layer of magnesium fluoride.
  • the magnesium fluoride layer is deposited between the passivated substrate and a metal layer on the back side to reflect the infrared radiation in the substrate.
  • This layer of magnesium fluoride makes it possible to increase the reflection at the interface between the passivation layer and the magnesium fluoride layer and thus to increase the absorption of infrared radiation in the cell and consequently the gain of the cell. .
  • this approach remains difficult to industrialize.
  • CN 101789462 discloses a black silicon solar cell structure, called black silicon, with broad absorption spectrum.
  • EP 0776051 discloses a rear contact solar cell and its method of manufacture.
  • CN 101404301 discloses a crystalline silicon solar cell comprising a reflective back layer of porous silicon.
  • US 2011/0248265 discloses a solar cell having a textured back surface.
  • FIG. 1 illustrates another approach based on the deposition of a layer of silicon nitride (SiNx) having a thickness of between 70 nm and 200 nm.
  • the silicon nitride layer 3 is disposed between the crystalline silicon substrate 1 and the metal layer 2 on the rear face 12 of a solar cell.
  • the silicon substrate has a refractive index between 3.5 and 3.6 in a wavelength range greater than 900 nm, while the silicon nitride layer 3 has a refractive index of about 1.9 in this range.
  • the silicon nitride layer 3 makes it possible to reflect an unabsorbed light beam 100 which propagates towards the interface with the metal layer.
  • the light beams 110, respectively 120, reflected at the interface between the crystalline silicon substrate 1 and the silicon nitride layer 3, respectively the metal layer 2, are returned to the substrate 1.
  • the Silicon nitride 3 makes it possible to limit the parasitic absorption of evanescent waves 300 in the metal layer 2 forming the rear contact.
  • the use of a thick silicon nitride layer is incompatible with the passivation of a p or p + doped surface.
  • multi-junction devices in which several junctions electronic devices are superimposed in the same device.
  • Each electronic junction of a multi-junction device is adapted to absorb and convert part of the incident radiation spectrum.
  • a particular case of heterojunction cell is that of a tandem cell which comprises two electronic junctions, a first electronic junction being disposed on the front face and a second electronic junction being arranged on the rear face of the tandem cell.
  • a solar cell HiT comprises at least one thin layer of intrinsic hydrogenated amorphous silicon ((i) a-Si: H) of about 5 nm thick deposited on the front face.
  • Such a thin layer of intrinsically hydrogenated amorphous silicon makes it possible to passivate the front face of the HiT cell at low cost.
  • the HiT type solar cells have significantly increased the conversion efficiency.
  • One possibility to further improve the absorption of a HiT type solar cell in the infrared is to deposit on the rear face a layer of indium tin oxide (ITO for indium tin oxide) having a thickness of at least 150 nm.
  • ITO indium tin oxide
  • One of the aims of the invention is to propose a manufacturing method and a photovoltaic device, of the passivated emitter back contact type, having a high absorption in the wavelength range between 900 nm and 1200 nm, in particular for a solar cell on a thin crystalline silicon plate and / or in a tandem cell device.
  • the present invention proposes a photovoltaic device or photodetector of the passivated emitter rear contact type, the device comprising a crystalline silicon substrate, and the device having a front face intended to be exposed. to a light beam and a backside.
  • a device photovoltaic or photodetector of passivated emitter back contact type in which the rear face of the device comprises a porous silicon layer, the porous silicon layer having a textured surface, the textured surface comprising pores with dimensions of between approximately 20 nm and 1000 nm, said pores forming apertures facing the rear face of the device, and the device further comprising a thin passivation layer conforming to at least a portion of the textured surface, and at least one metal electrode formed on the rear face of the device, metal electrode being adapted to form an electrical contact via a contact opening on the rear face of the device.
  • the contact opening is devoid of a porous layer and a thin passivation layer in order to obtain electrical contact with the lowest possible contact resistance.
  • the device of the invention makes it possible to increase the absorption of infrared radiation in the photovoltaic device or photodetector of the passivated emitter rear contact type.
  • the invention also makes it possible to reduce the surface plasmon-polariton absorption at the interface between the metal electrode on the rear face and the silicon substrate.
  • This porous silicon layer does not entail a prohibitive overcost of the device.
  • This new architecture makes it possible to increase the absorption in the infrared, hence an increase in the short-circuit current, in other words, a gain in Jsc (which adds up the current resulting from the absorption at all wavelengths). ), while reducing the parasitic absorption of surface plasmon-polaritons at the interface with the metal electrode at the back of the device.
  • the pores have a depth (h) of between 100 nm and 1000 nm, the openings of the pores have a dimension (L 2 ) of between 20 nm and 1000 nm and a distance (Li) between adjacent pores is between 20 nm and 1000 nm;
  • the porous silicon layer has a porosity of between 25% and 75%;
  • the porous silicon layer has an average thickness of between 100 nanometers and 2 micrometers;
  • the porous silicon layer has an equivalent refractive index of approximately 1, 4.
  • the textured surface of the porous silicon layer has a periodic structure having a first spatial period in a range between 20 nm and 500 nm.
  • the textured surface of the porous silicon layer forms a doubly periodic structure comprising a second spatial period in a range between 900 nm and 1.5 miti, the porous silicon layer forming a photonic crystal structure.
  • the rear face of the device further comprises micro-pyramids, the porous silicon layer being formed on the surface of at least one facet of the micro-pyramids.
  • the metal electrode advantageously comprises a reflective metal layer covering the rear face of the device.
  • the device is multi-junction and the porous silicon layer is disposed on the rear face of the multi-junction device.
  • the multi-junction device forms a tandem cell.
  • the front face of the device comprises another porous silicon layer, the other porous silicon layer having another textured surface, the other textured surface forming other pores with dimensions of between about 20 nm and 2000 nm, said other pores forming further apertures oriented toward the front face of the device.
  • the invention also proposes a photovoltaic panel comprising a plurality of photovoltaic devices according to one of the embodiments described, electrically connected to each other.
  • the invention also proposes a method for manufacturing a photovoltaic device or photodetector of the passivated rear-contact emitter type or of a photovoltaic panel comprising a plurality of passivated transmitter-type rear-contact-type photovoltaic devices electrically connected to one another, the method comprising the steps following:
  • porous silicon layer having a textured surface, the textured surface comprising pores of dimensions of between about 20 nm and 1000 nm, said pores forming apertures facing the rear face of the device;
  • the texturing step of the back side is of low cost and does not require the use of additional expensive materials.
  • the texturing step comprises an anisotropic etching step of the rear face of the silicon substrate, the anisotropic etching step being of reactive ion etching type possibly in an inductively coupled plasma reactor, assisted chemical etching. by metal, electrochemical etching or laser engraving.
  • the texturing step comprises an additional step of masking before the etching step, the masking step being adapted to form a mask on the rear face of the silicon substrate, the mask comprising a periodic pattern having at least a first spatial period in a range between 20 nm and 500 nm.
  • the periodic pattern of the mask has a second spatial period in a range of 900 nm to 1.5 miti, so as to form a photonic crystal structure in the porous layer.
  • the method further comprises, before the texturing step, an additional step of removing the sawing defects of the crystalline silicon substrate, polishing the back face of the crystalline silicon substrate and / or forming the micro-pyramids on the back side of the silicon substrate.
  • the step of forming at least one metal electrode comprises a step of depositing the metal electrode by printing, by screen printing, by physical vapor deposition or by electrodeposition.
  • the method further comprises a step of texturing the front face of the substrate so as to form a black silicon layer or another porous silicon layer on the front face of the device, the other layer porous silicon having another textured surface, the other textured surface comprising other pores of dimensions between about 20 nm and 2000 nm, said other pores forming further openings facing the front face of the device.
  • FIG. 1 diagrammatically illustrates the effect of a dielectric layer between the silicon substrate and a metal layer on the rear face of a photovoltaic device or photodetector of the passivated emitter rear contact type according to the prior art
  • FIG. 2 to 5 show schematically a sectional view of the rear face of different variants of PERC cells according to a first embodiment comprising an absorber substrate, a porous layer of textured silicon and a metal electrode rear face;
  • FIG. 6 to 9 schematically show a sectional view of the rear face of different PERC cell variants comprising a porous layer of textured silicon according to a second embodiment, the porous layer of textured silicon being formed on micro-pyramids;
  • FIG. 10 to 13 schematically show a sectional view of the rear face of different variants of PERC cells comprising a porous layer of textured silicon according to a third embodiment, the porous layer of textured silicon forming a photonic crystal structure;
  • FIG. 14 schematically represents a detailed view of the porous layer of textured silicon with a photonic crystal structure of FIGS. 10 to 13;
  • FIG. 15 schematically illustrates a method of forming a porous silicon dioxide layer by plasma etching
  • - Figure 16 schematically illustrates another method of forming a porous layer of textured silicon metal-assisted chemical etching (Metal Assisted Chemical Etching or MACE);
  • FIG. 17 schematically illustrates another method of forming a porous layer of textured silicon by an electrochemical process
  • FIG. 18 schematically illustrates another method of forming a porous layer of textured silicon femtosecond laser beam (fs).
  • the present disclosure proposes a novel solar cell architecture having a textured back side to form a porous silicon layer.
  • This architecture applies to a single-junction solar cell.
  • This architecture also applies to an electronic junction disposed on the rear face of a multi-junction solar cell, in particular in a tandem cell.
  • FIGS. 2 to 13 show diagrammatically the rear face of a photovoltaic device or photodetector of the passivated transmitter rear contact type according to different embodiments.
  • the front face of the device is not shown in Figures 2-13.
  • FIGS. 2, 4, 6, 8, 10 and 12 represent the rear face of a PERC, PERL or PERF type cell comprising a porous silicon layer.
  • Figures 3, 5, 7, 9, 11 and 13 show the rear face of a PERT type cell comprising a porous silicon layer.
  • crystalline silicon is understood to mean monocrystalline silicon (c-Si) or multi-crystalline silicon (mc-Si).
  • the substrate 1 is generally doped, between 1 -2 ohm. cm for a PERC cell and between 2-10 Ohm. cm for a PERT cell.
  • the rear face of the silicon substrate 1 is assumed initially plane and extends in an XY plane of an orthonormal reference (XYZ).
  • the rear face of the crystalline silicon substrate 1 is preferably previously etched to remove sawing and / or polished defects.
  • FIG. 2 diagrammatically shows a sectional view of the rear face of a crystalline silicon substrate 1 of a PERC, PERL or PERF cell according to a first embodiment.
  • the rear face of a PERC, PERL or PERF cell comprises a metal layer 2.
  • the layer metal 2 back side is for example silver, aluminum, nickel, copper or a nickel-silicon alloy.
  • the metal layer 2 is for example formed by screen printing, physical vapor deposition (PVD or Physical Vapor Deposition), electro-deposition or sputtering. According to the deposition technique, the thickness of the metal layer 2 is generally between 10 ⁇ m and 50 ⁇ m, respectively, in screen printing, between 1 ⁇ m and 10 ⁇ m in PVD or in electro-deposition.
  • the metal layer is formed by sputtering an alloy of aluminum and silicon (with 1% or 2% silicon) because of the low cost of aluminum (Al) compared to that of silver ( Ag). Spraying makes it possible to obtain a better reflection coefficient than screen printing.
  • aluminum has a higher absorption coefficient than silver, especially in the infrared.
  • the rear-face metal layer 2 forms an electrode which makes it possible to extract the electrical charges generated in the photovoltaic cell, generally in combination with other electrodes on the front face of the cell.
  • the metal layer 2 covers the rear face 12 of the device.
  • the metal layer 2 also forms a reflective layer which helps to return a portion of the unabsorbed light radiation towards the absorber substrate.
  • the substrate 1 is in contact with the metal layer 2 via one or more contact openings 23, 24.
  • the cell furthermore comprises locally doped zones 6 in contact with the metal layer 2 via the contact openings 23, 24.
  • the zones 6 are made of p-doped silicon or p + formed by local diffusion in the substrate.
  • the locally doped zones 6 form local rear-facing emitters of the PERL or PERF cell.
  • the rear face of the crystalline silicon substrate 1 comprises a porous silicon layer 4. More specifically, the rear face of the substrate 1 is nano-textured outside the contact openings 23, 24. However, the contact openings 23, 24 of the rear face are formed on a surface portion of the substrate which does not comprise any nano-textured porous layer or passivation layer (for example a flat surface portion of silicon and / or polished or including micro-pyramids). More specifically, the porous silicon layer 4 has a nano-textured surface, the nano-textured surface comprising pores with dimensions of between approximately 20 nm and 1000 nm. The pores have apertures oriented towards the rear face 12 of the device.
  • the pores have a depth (h) of between 100 nm and 1000 nm, the pore openings have a transverse dimension (L2) of between 20 nm and 1000 nm and the distance (L1) between adjacent pores is between 20 nm and 1000 nm. nm.
  • the porous silicon layer 4 has an average thickness of between 100 nanometers and 2 micrometers and preferably between 100 nm and 200 nm.
  • the porous silicon layer 4 has a spatially homogeneous porosity. Here means mean thickness, the thickness of the porous layer averaged on its surface. The value of this porosity is in a range between 25% and 75%.
  • the porous silicon layer 4 includes nano-bubbles of air.
  • the porous layer 4 has an equivalent refractive index of about 1.4 ⁇ 0.2 in the infrared.
  • a thin passivation layer 5 is deposited or grown in accordance with at least a portion of the nano-textured surface of the porous layer 4.
  • the thin passivation layer 5 covers the porous layer 4 on the rear face of the cell while leaving open, in other words without closing, the openings of the pores on the rear face of the cell.
  • the stack formed by the porous layer 4 and the thin passivation layer 5 thus forms a passivated porous layer.
  • the thin passivation layer 5 comprises a thin layer of amorphous silicon (a-Si), silicon nitride (SiN x ), alumina (Al2O3), silicon oxide (SiO2) or an oxide of another transition metal.
  • a-Si amorphous silicon
  • SiN x silicon nitride
  • Al2O3 alumina
  • SiO2 silicon oxide
  • the thin passivation layer 5 consists of a stack of at least two thin layers indicated above.
  • the thin passivation layer 5 has a total thickness of between 50 nm and 200 nm.
  • the thin passivation layer 5 may be deposited by one of the conventional thin layer deposition and / or growth methods such as, for example: plasma enhanced chemical vapor deposition (PECVD) for Plasma Enhanced Chemical Vapor Deposition) or by atomic layer deposition (ALD for Atomic Layer Deposition).
  • PECVD plasma enhanced chemical vapor deposition
  • ALD Atomic Layer Deposition
  • the thin passivation layer 5 is formed on the entire rear face of the cell.
  • Contact openings 23, 24 are then performed locally through the thin passivation layer 5 to allow better electrical contact between, on the one hand, the metal layer 2 and, on the other hand, the substrate 1, or respectively the locally doped areas 6 and thus promote a better extraction of charge carriers.
  • a contact fraction is defined as being the ratio of the open area with metallization contact on the unopened surface.
  • These contact openings 23, 24 local correspond to a contact fraction of between 1% and 10%.
  • the local contact openings 23, 24 in the thin passivation layer 5 are for example made by laser, by dry etching or by paste etching.
  • a nickel-silicon (Ni-Si) or aluminum-silicon (Al-Si) alloy is formed at the interface between the silicon substrate 1 and the metal layer 2.
  • These local contact openings 23, 24 have a dimension along the X and / or Y direction generally between 500 microns and 2 mm.
  • the passivated porous layer covers the rear face of the silicon substrate 1 outside the contact openings 23, 24.
  • the metal layer 2 is in electrical contact with the silicon substrate 1 through the contact openings 23, 24.
  • the metal layer 2 is in contact with the passivated porous layer outside the openings. contact 23, 24.
  • the metal layer 2 closes the openings of the pores oriented towards the rear face.
  • the material of the metal layer 2 may or may not fill the pores of the passivated porous layer whose openings are oriented towards the rear face.
  • the metal layer 2 does not enter the pores of the passivated porous layer, which remain empty or filled with gas, for example air.
  • FIG. 3 shows the rear face of a PERT-type cell based on a crystalline silicon substrate 1 and a metal layer 2 according to the first embodiment.
  • the same reference signs designate the same elements as in FIG. 2.
  • the PERT cell furthermore comprises a doped silicon layer 7 formed by back-wall diffusion of the crystalline silicon substrate 1.
  • the silicon substrate 1 is n-doped and the layer 7 is made of p-doped or p + -silicon by diffusion over the entire rear face.
  • Layer 7 forms a rear-facing emitter of the electronic junction of the n-PERT cell.
  • the back side of the silicon layer 7 doped is nano-textured outside the contact openings 23, 24.
  • the rear face of the layer 7 comprises a porous layer 4 of silicon.
  • the porous silicon layer 4 comprises the same dopant as the layer 7.
  • the porous silicon layer 4 is p-doped.
  • the porous silicon layer 4 of the cell illustrated in FIG. 3 also has the same characteristics and properties as the silicon layer 4 of the cell illustrated in FIG. 2, and can be manufactured using the same techniques.
  • the device of FIG. 3 comprises a thin passivation layer 5 deposited or formed by growth in accordance with at least a portion of the nano-textured surface of the porous layer 4 of silicon.
  • the thin passivation layer 5 has a total thickness of between 5 nm and 100 nm.
  • the thin passivation layer 5 covers the porous layer 4 on the rear face of the cell while leaving open the pore openings on the rear face of the cell.
  • the thin passivation layer 5 of the PERT cell comprises contact openings 23, 24 to allow direct electrical contact between the metal layer 2 and the doped layer and fully diffused.
  • FIGS. 4 and 5 illustrate variants of the first embodiment, in which the metal electrode on the rear face does not cover the entire rear face but has metal contacts 21, 22 located and spatially limited to the contact openings 23, 24.
  • the metal contacts 21, 22 located in electrical contact with the substrate through the contact openings 23, 24.
  • the same reference signs designate the same elements as in Figures 2 and 3.
  • a passivated rear-contact emitter cell having a rear face having localized metal contacts finds applications in particular in photovoltaic devices or photodetectors used in bifacial form.
  • a device PERC in connection with FIG. 4 comprises a porous layer
  • the silicon porous layer 4 has a nano-textured surface comprising pores having apertures oriented towards the rear face 12 of the device. Similarly, a thin passivation layer 5 is deposited or grown in a manner consistent with at least a portion of the nano-textured surface of the porous layer 4.
  • FIG. 5 shows the rear face of a PERT-type cell based on a crystalline silicon substrate 1, a layer 7 forming a rear-face emitter and metal contacts 21, 22 located forming one or several electrodes in the rear face according to another variant of the first embodiment.
  • a device PERC in connection with FIG. 5 comprises a porous silicon layer 4 on the rear face of the layer 7 forming the back-side emitter. As described above, the porous layer 4 is spatially limited outside the contact openings 23, 24.
  • a thin passivation layer 5 conforms to at least a portion of the surface. nano-textured porous layer 4 provides a passivated porous layer outside the contact openings 23, 24.
  • the metal contacts 21, 22 located are made of the same materials as those used in the manufacture of the metal layer 2 described with reference to FIGS. 2 and 3, using conventional deposition techniques and / or etching applied locally.
  • the passivated porous layer is not covered by a metal layer but remains in contact with the ambient air.
  • the radiation transmitted through the incident cell on the stack formed by the porous layer 4 of silicon and the thin passivation layer 5 is reflected to the substrate 1 of silicon to be absorbed.
  • the equivalent refractive index of 1, 4 of the porous layer 4 makes it possible to reduce the parasitic absorption by the metal electrode (s) on the rear face, in particular in the infrared.
  • the porous silicon layer 4 makes it possible to increase the internal reflection towards the substrate 1. In the case of a cell comprising a metal layer 2 covering the rear face, this metal layer 2 makes it possible to increase the reflection of light towards the absorber substrate.
  • the passivated porous layer makes it possible to reduce the parasitic absorption in the metal layer 2, in particular in the infrared.
  • the first embodiment makes it possible to increase the reflection in the infrared and, consequently, to increase the short-circuit current (or gain in Jsc).
  • the porous silicon layer 4 makes it possible to limit the evanescent waves exciting surface plasmon polaritons in the metal electrode or electrodes at the rear face.
  • the porous silicon layer 4 thus makes it possible to improve the trapping of the light, in particular the infrared light, in the photovoltaic device. These improvements are particularly important in a tandem cell or in a PV cell having a thin substrate.
  • FIGS. 6 to 9 illustrate a second embodiment, in which the photovoltaic device or photodetector of the passivated emitter rear contact type, furthermore comprises micro-pyramids 8 on the rear face between the substrate 1 and the porous silicon layer 4.
  • FIGS. 6 and 7 represent the rear face of PERC devices in which the rear-facing metal electrode comprises a metal layer 2 completely covering the rear face, in particular for monofacial use.
  • FIGS. 8 and 9 represent the rear face of PERC devices in which the rear-facing metal electrode comprises metal contacts 21, 22 located and limited to the contact openings 23, 24, in particular for use in bifacial form.
  • the rear face of the crystalline silicon substrate 1 is pre-textured to present micro-pyramids 8 over its entire surface.
  • the micro-pyramids 8 generally have dimensions of between 1 to 10 ⁇ m.
  • the openings of contacts 23, 24 at the interface between the metal contacts 21, 22 and the crystalline silicon substrate 1 are textured by micro-pyramids 8.
  • the contact openings 23, 24 at the interface between the metal contacts 21, 22 and the zones 6 doped locally are textured by micro-pyramids 8.
  • the rear face of the fully diffused doped layer 7 is previously textured to present micro-pyramids 8 over its entire surface.
  • the interfaces between the metal contacts 21, 22 and the doped layer 7 are textured by micro-pyramids 8.
  • the rear face is doubly textured outside the openings of FIG. contact 23, 24. More specifically, the rear face here comprises a porous layer 4 of silicon on the surface of the facets of the micro-pyramids 8.
  • the rear face comprises micro-pyramids faceted nanotextured 9.
  • the porous layer 4 is doubly textured by micro-pyramids and pores.
  • the porous silicon layer 4 of the cell illustrated in FIG. 6, 7, 8 or 9 moreover has, locally on each facet of micro-pyramid, the same characteristics and properties as the silicon layer 4 of the cell illustrated in FIG. and can be manufactured using the same techniques.
  • a thin passivation layer 5 is deposited or grown in accordance with at least a portion of the doubly textured surface of the porous silicon layer 4.
  • the thin passivation layer 5 covers the porous layer 4 on the rear face of the cell while leaving open the pore openings on the rear face of the cell.
  • the thin passivation layer 5 also has contact openings 23, 24 to allow direct electrical contact between, on the one hand, the rear-facing metal electrode and, on the other hand, the substrate 1 for a PERC cell, respectively the locally diffused doped zones 6 for a PERL or PERF cell, or the fully diffused doped layer 7 for a PERT cell.
  • the metal layer 2 covers not only the contact openings 23, 24 but also the passivated and doubly textured porous layer.
  • the porous layer passivated and Doubly textured combined with the reflective metal layer 2 contribute to the increase of the unabsorbed light reflection towards the absorber substrate.
  • the doubly textured passivated porous layer reduces the losses by coupling plasmons-polaritons in the metal layer 2.
  • the rear-facing metal electrode comprises metal contacts 21, 22 which are generally limited to the contact openings 23, 24.
  • the passivated and doubly textured porous layer is in contact with the ambient air on the rear face. Since the equivalent refractive index of the porous layer 4 is about 1.4 ⁇ 0.2 in the infrared, the passivated and doubly textured porous layer nevertheless makes it possible to increase the reflection of unabsorbed light towards the absorber substrate.
  • the combination of the micro-pyramids 8, the porous layer 4 and the passivation layer 5 on the rear face of the device makes it possible to further increase the internal reflection to the substrate 1, especially in the infrared.
  • this structure also makes it possible to reduce the parasitic absorption in the metal layer 2, while limiting the evanescent waves that can generate surface plasmon-polaritons in the metal layer 2.
  • the increase of unabsorbed light reflection towards the substrate 1 and the reduction of the parasitic absorption in the metal layer contribute to a short-circuit current gain (Jsc).
  • FIGS. 10 to 13 illustrate a third embodiment, in which the photovoltaic device or photodetector of the passivated emitter rear contact type comprises a porous layer 4 having a photonic crystal structure and a passivation layer 5.
  • Figures 10 and 11 show the rear face of PERC devices in which the metal electrode rear face comprises a metal layer 2 completely covering the rear face, in particular for use in monofacial.
  • FIG. 10 shows the rear face of a device of the PERC type in which the metal layer 2 is in contact with the substrate 1 of silicon through the contact openings 23, 24.
  • FIG. 11 the rear face of a PERT-type device is shown in which the metal layer 2 is in contact via the contact openings 23, 24 with the doped doped silicon layer 7.
  • FIGS. 12 and 13 show the rear face of PERC devices in which the rear-facing metal electrode comprises metal contacts 21, 22 located and limited to the contact openings 23, 24, in particular for use in bifacial form.
  • FIG. 12 shows the rear face of a device of the PERC type in which the metal contacts 21, 22 located are in contact with the silicon substrate 1 through the contact openings 23, 24.
  • FIG. 13 shows the rear face of a PERT type device in which the metal contacts 21, 22 located are in contact via the contact openings 23, 24 with the layer 7 of doped doped silicon formed by diffusion.
  • the porous silicon layer 4 has a structure comprising a first spatial period, denoted Li, and, preferably, a second spatial period, denoted by L G.
  • FIG. 14 represents a sectional view of a detail of the structure of the porous layer of FIGS. 10, 11, 12 or 13.
  • the porous silicon layer 4 comprises pores 41, 42, 43,. openings 51, 52, 53, ... 5n on the rear face of the cell. More specifically, the porous layer 4 comprises at least one block of n pores 41,..., 4n, where n is a natural integer between 10 and 30.
  • the pores 41, ..., 4n of the same block are spaced from the first spatial period Li in the X direction.
  • the pore depth in the Z and L 2 direction is denoted by the opening of the pores in the X direction.
  • the first spatial period Li is less than 1000 nm and preferably in a range between 20 nm and 500 nm.
  • the depth (h) of the pores is between 100 nm and 1000 nm.
  • the transverse dimension (L 2 ) of the pore openings is between 20 nm and 1000 nm.
  • the geometry of the pores depends on the manufacturing process.
  • the pores 41,..., 4n may be spherical, square, rectangular, trench-shaped or mesh-shaped.
  • the pore block is repeated periodically with a gap between blocks noted L G.
  • the space between blocks, L G is equal to Li .
  • the distance between blocks, L G is in a range between 900 nm and 1, 5 pm.
  • the pore block is repeated with a random distance between blocks.
  • the porous silicon layer 4 forms on the rear face a photonic crystal structure that is particularly well suited to reflect the radiation in the near infrared.
  • the photonic crystal structure extends in two dimensions along the X and Y directions outside the contact openings 23, 24.
  • a thin passivation layer 5 is deposited or grown in accordance with the textured surface of the porous silicon layer 4.
  • the thin passivation layer 5 covers the porous layer 4 with a photonic crystal structure on the rear face of the cell while leaving open the pore openings on the rear face of the cell.
  • the thin passivation layer 5 is formed so as to extend over the entire rear face of the cell.
  • the contact openings 23, 24 are then made locally through the thin passivation layer 5 to allow better contact between, on the one hand, the substrate 1, respectively the locally doped zones 6 or the fully diffused doped layer 7 and, on the other hand, the metal layer 2 or the metal contacts 21, 22 located and promote better extraction of the charge carriers.
  • the contact openings 23, 24 have a dimension of between 500 ⁇ m and 2 mm in a direction X parallel to the surface of the silicon substrate 1.
  • the photonic crystal structure of the third embodiment acts as a photonic crystal to increase infrared radiation reflection to the active portion of the photovoltaic cell.
  • the metal layer 2 covers not only the contact openings 23, 24 but also the passivated porous layer having a photonic crystal structure.
  • the passivated porous layer with a photonic crystal structure combined with the reflective metal layer 2 contributes greatly to increasing the unabsorbed light reflection towards the absorber substrate.
  • the passivated porous layer with a photonic crystal structure reduces coupling losses by plasmons-polaritons in the metal layer 2.
  • the rear-facing metal electrode comprises metal contacts 21, 22 which are generally limited to the contact openings 23, 24.
  • the passivated porous layer with a photonic crystal structure is in contact with the ambient air on the rear face.
  • the photonic crystal structure of the porous layer 4 nevertheless makes it possible to increase the reflection of unabsorbed light towards the absorber substrate.
  • the porous layer with a photonic crystal structure is formed on a textured surface by micro-pyramids.
  • the photovoltaic device architecture or photodetector of the passivated emitter type rear contact having a porous layer on the rear face makes it possible to increase the reflection of unabsorbed light, in particular infrared, towards the substrate. absorber, while reducing the parasitic absorption of surface plasmon-polaritons at the interface with the metal electrode on the back of the device. These improvements increase the short-circuit current (hence a gain in Jsc).
  • This solar cell architecture is applied to a single-junction solar cell or to the rear face of a multi-junction solar cell, and in particular to a tandem cell.
  • a tandem cell is thus proposed comprising a first junction on the front face and a second junction on the backside textured according to any one of the embodiments described above.
  • the second junction rear face is particularly well suited to absorb infrared radiation.
  • the first junction on the front face of the tandem cell is adapted to absorb blue and / or ultraviolet (UV) radiation.
  • UV ultraviolet
  • the photovoltaic device or photodetector of the passivated emitter contact back type further comprises another surface texturing front face.
  • the geometry of the surface texturing on the front face is different from that of the surface texturing on the rear face.
  • the texturing of the front face is preferably a texturing of conical shape from 50 nm to 1 ⁇ m high, or in the form of pyramids of dimensions of between 1 ⁇ m and about 10 ⁇ m or of columns or a texturing adapted to form a black silicon surface (black silicon or b-Si).
  • the texturing of the front face is adapted to limit the reflection coefficient and / or to form an anti-reflective surface.
  • the texturing of the front face comprises the formation of another porous silicon layer doped on the front face, the other porous layer of doped silicon having another textured surface, the other textured surface forming other pores having a first spatial period L1 between about 20 nm and 2000 nm, a depth h between 100 nm and 2000 nm, said other pores forming other openings facing the front face of the device.
  • the other porous silicon layer covers the entire surface on the front face of the device.
  • the invention also relates to a photovoltaic panel comprising a plurality of photovoltaic cells electrically connected to each other, the plurality of photovoltaic cells comprising at least one photovoltaic cell according to any one of the embodiments described above.
  • a photovoltaic panel can offer a better performance without significant additional cost.
  • the porous silicon layer 4 can be made by various methods.
  • the rear surface of the photovoltaic cell is previously etched to remove sawing and / or polished defects.
  • the crystalline silicon substrate 1 is generally formed of a monocrystalline or multi-crystalline silicon wafer.
  • the rear face 12 is initially that of the crystalline silicon substrate 1.
  • the rear face of the crystalline silicon substrate 1 is textured to form micro-pyramids 8, according to the second embodiment.
  • locally doped zones 6 are formed by local dopant diffusion in the silicon substrate 1, through the rear face optionally textured by micro-pyramids 8.
  • the doped layer 7 is formed completely diffused by dopant diffusion on the entire back face of the silicon substrate 1, optionally textured by micro-pyramids.
  • FIG. 15 illustrates a first example of a method based on plasma etching.
  • a reactive ion plasma RIE
  • ICP-RIE reactive ion plasma
  • the operating conditions of the etching plasma are adjusted to obtain a nano-texturing of the surface leading to the formation of open pores on the rear face of the substrate, optionally textured by micro-pyramids.
  • a mixture of sulfur hexafluoride (SF 6 ) and oxygen (O 2) is used as gaseous precursors.
  • a RIE etching system based on an SF6 / O2 mixture with a ratio of 1.3 and a total flow of 140 sccm at a pressure of 30 mTorr and an etching power of 55 W for 30 min is used.
  • This method nano-textures the rear face 12 of the cell to form a porous layer 4 of silicon.
  • the duration and the conditions of the plasma 13 are selected so that the porosity of the layer is between 25% and 75%.
  • the front face 11 of the cell is generally protected vis-à-vis the plasma.
  • another plasma etching step is applied to the front face 11 of the cell to texturize the front face.
  • a mask is deposited to protect the areas intended to form the contact openings 23, 24 vis-à-vis the etching plasma. This mask is then removed to form the contact openings 23, 24 on the rear face of the cell.
  • the plasma etching is applied to the entire rear face 12 of the cell and an additional local etching step is applied to remove the porous layer locally to form the contact openings 23, 24.
  • the metal layer 2 or the metal contacts 21, 22 are in direct electrical contact via the contact openings 23, 24 with the silicon substrate 1 in a PERC cell, or, respectively, with the zones 6 doped locally in a PERL cell. or PERF, or respectively, with the doped layer 7 fully diffused in a PERT cell.
  • the method based on plasma etching is adapted for the first embodiment of the invention.
  • the rear face of the cell is pre-textured in the form of micro-pyramids.
  • the texturing step in the form of micro-pyramids is for example carried out in the liquid phase in a conventional KOH / IPA / water or KOH / water / additive mixture.
  • the etching plasma is then applied to the micro-textured micro-pyramid-shaped back surface, to form on the surface of the micro-pyramids 8 the porous silicon layer 4 according to the second embodiment.
  • a mask is deposited on the rear face of the cell, the mask having a pattern corresponding to the negative of the desired pattern.
  • FIG. 16 illustrates another example of a method based on a metal assisted chemical etching (MACE) technique.
  • MACE metal assisted chemical etching
  • the process of FIG. 16 is particularly suitable for forming a porous layer having a photonic crystal structure according to the third embodiment of the invention.
  • a noble metal film 14 is deposited by sputtering through a mask on the back side of a silicon substrate.
  • the noble metal 14 is selected from gold (Au) and silver (Ag).
  • the mask is configured to form the desired pattern comprising a block of n pores spaced from the first period L1 and, where appropriate, a gap between blocks, L g .
  • the silicon substrate is placed in a tank 10 comprising a solution 16 composed of 50% hydrogen fluoride (HF) and 50% oxygen (H2O2) so as to etch the rear face 12 of the photovoltaic cell.
  • the etching acts selectively in the areas where the silver film 14 is deposited, with a selectivity of 10: 1.
  • the silicon is etched to a depth h of about 350 nm so as to form pores 41.
  • n 10 pores
  • the opening L 2 of a port 41 is about 60 nm
  • the distance between adjacent pores (ie the first spatial period) L1 is about 175 nm
  • L G is about 1100 nm.
  • a porous silicon layer 4 having a porosity of 60% is thus obtained.
  • the MACE process makes it possible to manufacture a porous layer 4 having an inexpensive photonic crystal structure.
  • the MACE process is also suitable for forming a porous layer according to the first and / or second embodiment.
  • noble metal particles 14 are directly deposited on the rear face of a silicon substrate without using a periodically patterned mask.
  • the MACE etching step makes it possible to leave, at the bottom of the pores of silicon, the noble metal 14 which serves as a catalyst for the dissolution reaction of the silicon.
  • the MACE technique uses a noble metal, for example silver, which can then serve as a nucleation point for an electrical contact.
  • nickel is then deposited according to the internal geometry of a pore.
  • the MACE etching step is applied simultaneously to the rear face and the front face of the photovoltaic device, with a pattern adapted to form a porous layer on the rear face as described above, and another pattern on the front face.
  • another metal is sprayed on the front face with a periodic pattern having a spatial period L1 of between 20 nm and 1000 nm on the entire front face.
  • the other metal is selected so that the depth h of the front pores is between 100 nm and 2000 nm.
  • a porous layer is made on the infrared reflecting back face and another porous layer forming an antireflection layer, in particular in the UV-visible range, on the front face of the device. photovoltaic.
  • the MACE etching step is followed by a cleaning comprising a rinsing step in deionized water, a washing step in a mixture of hydrogen fluoride (HF) and hydrogen chloride (HCl) ), another rinsing step and a drying step.
  • the silicon plates thus etched and cleaned then follow a passivation treatment process of the rear face of the cell.
  • the surface passivation process comprises, for example, a step of deposition of an alumina layer (Al2O3) by an atomic layer deposition (ALD) comprising 60 cycles at 200 ° C. followed by a PECVD deposition step of silicon nitride layer (SiN x ) having a thickness of about 110 nm on the rear face of the cell.
  • Another washing step in hydrogen fluoride (HF) and a rinsing step are applied to the front face, followed by a PECVD deposition step of a silicon nitride (SiN x ) layer on the front face of the the cell.
  • HF hydrogen fluoride
  • SiN x silicon nitride
  • a picosecond (ps) laser for example at 532 nm or 355 nm, is used to generate contact openings 23, 24 through the backside passivation layer.
  • the laser ps generates contact openings 23, 24 of 20 ⁇ m in size with a repetition period of 1 mm in the X direction forming contact openings 23, 24 corresponding to 2% of the rear surface.
  • the metal contacts are then generated by printing and drying a silver paste on the front face and then printing a silver paste without glass frit on the rear face. Finally, a coking process is applied in a conveyor belt oven at a temperature of 750 ° C.
  • Figure 17 illustrates another example of a method of forming a porous layer of textured silicon based on electrolysis.
  • An aluminum paste contact 19 is applied to the front face of a PV cell.
  • the PV cell is disposed in a tank 10 comprising an electrolytic solution 17.
  • the electrolytic solution 17 is for example composed of hydrogen fluoride (HF).
  • a current generator 18 is connected to the aluminum contact 19 and to the electrolytic solution 17 so as to etch the rear face of the PV cell to form the porous silicon layer 4.
  • the electrolysis method is particularly applicable to a smooth surface corresponding to the first embodiment.
  • the rear face is previously micro-textured in the form of micro-pyramids.
  • the electrolytic process thus leads to the formation of a porous silicon layer on micro-pyramids according to the second embodiment of the invention.
  • the rear face is previously metallized locally, with a periodic pattern.
  • the electrolytic process thus leads to the formation of a porous layer with a photonic structure according to the third embodiment of the invention.
  • Figure 18 illustrates another example of a method of forming a porous silicon layer based on laser beam texturing.
  • a beam 20 of femtosecond laser pulses (fs) is applied to the rear face 12 of a photovoltaic cell, the laser beam being adapted to form a porous layer 4 of silicon.
  • the method for forming a porous silicon layer 4 described above by plasma etching, metal-assisted chemical etching, electrochemical etching or laser etching, makes it easy to adjust the dimensions and the depth of the pores and thus to adjust precisely the porosity of the porous silicon layer. These etching processes are inexpensive and the cost of the resulting photovoltaic device is poorly impacted.
  • a porous silicon layer 4 and a passivation layer is generally applied over the entire back face of the crystalline silicon substrate 1 for a type cell.
  • the rear face of the substrate 1 or respectively, of the doped layer 7 is entirely textured by the passivated photonic crystal structure.
  • contact openings 23, 24 are formed in the passivated photonic crystal structure.
  • the metal layer 2 or, respectively, the metal contacts 21, 22 are in direct electrical contact with the crystalline silicon substrate 1 of a PERC cell, or, respectively, with the locally doped zones 6 of a PERL cell. or PERF, or again, with the fully diffused doped layer 7 of a PERT cell.
  • the front face of the cell can also be textured by a method based on one of the techniques described above, for example plasma etching, and in other operating conditions adapted to produce a texturing of the conical front face. , pyramidal, black silicon or to form another porous layer on the front.
  • the method of manufacturing a photovoltaic cell or a photodetector on a crystalline silicon substrate is applied to a single-junction or multi-junction cell, in particular to the rear face of a tandem cell.
  • the manufacturing method according to one or the other of the techniques described above also applies to the manufacture of a photovoltaic panel comprising a plurality of photovoltaic cells electrically connected to each other.

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Abstract

The invention relates to a passivated emitter and rear contact photovoltaic or photodetector device, comprising a crystalline silicon substrate (1). According to the invention, the rear face (12) of the device includes a porous layer (4) of silicon having a textured surface, the textured surface comprising pores (41, 42, 43, 44, 4n) with dimensions between approximately 20 nm and 1000 nm, said pores forming openings (51, 52, 53, 54, 5n) oriented towards the rear face (12) of the device, and the device also includes a thin passivation layer (5) matching at least one portion of the textured surface, and at least one metal electrode (2, 21, 22) formed on the rear face (12) of the device, the metal electrode (2, 21, 22) being adapted to form at least one electrical contact on the rear face (12) of the device.

Description

Dispositif photovoltaïque ou photodétecteur de type émetteur passivé contact arrière et procédé de fabrication d'un tel dispositif  Photovoltaic device or photodetector of passivated transmitter type, rear contact and method of manufacturing such a device
DOMAINE TECHNIQUE AUQUEL SE RAPPORTE L'INVENTIONTECHNICAL FIELD TO WHICH THE INVENTION REFERS
La présente invention concerne de manière générale le domaine des dispositifs photovoltaïques (PV) destinés à recevoir un faisceau lumineux et à le convertir en courant électrique. The present invention generally relates to the field of photovoltaic devices (PV) for receiving a light beam and converting it into electric current.
Elle concerne plus particulièrement un dispositif de cellule solaire photovoltaïque (PV) ou un photodétecteur.  It relates more particularly to a photovoltaic solar cell (PV) device or a photodetector.
Elle concerne aussi un procédé de fabrication de dispositif photovoltaïque à jonction électronique à base de silicium cristallin ou de panneau photovoltaïque comprenant plusieurs dispositifs photovoltaïques reliés électriquement entre eux.  It also relates to a method of manufacturing a photovoltaic device with electronic junction based on crystalline silicon or photovoltaic panel comprising several photovoltaic devices electrically connected to each other.
ARRIERE-PLAN TECHNOLOGIQUE  BACKGROUND
Lors des quatre dernières décennies, on a cherché constamment à améliorer l’efficacité des cellules solaires tout en réduisant les coûts de production industrielle. A cet effet, différents matériaux semiconducteurs sont évalués et différentes architectures de cellules solaires ont été développées.  Over the past four decades, there has been a steady quest to improve the efficiency of solar cells while reducing industrial production costs. For this purpose, different semiconductor materials are evaluated and different architectures of solar cells have been developed.
De nombreuses cellules solaires sont basées sur une mono-jonction électronique. Par convention, la face avant d’un dispositif photovoltaïque est destinée à être exposée directement à la lumière incidente et la face arrière est opposée à la face avant.  Many solar cells are based on an electronic mono-junction. By convention, the front face of a photovoltaic device is intended to be exposed directly to the incident light and the rear face is opposite to the front face.
Les cellules solaires à base de substrat de silicium cristallin ont un faible coefficient d’absorption dans l’infrarouge. Dans le présent document, on entend par rayonnement infrarouge un rayonnement lumineux ayant une longueur d’onde comprise entre environ 900 nm et 1200 nm dans le vide. On cherche à augmenter le piégeage et l’absorption de rayonnement infrarouge dans une cellule solaire à base de silicium cristallin tout en réduisant l’épaisseur de silicium, afin de réduire les coûts de fabrication.  Solar cells based on crystalline silicon substrate have a low absorption coefficient in the infrared. In the present document, infrared radiation is understood to mean light radiation having a wavelength of between about 900 nm and 1200 nm in vacuum. The aim is to increase the trapping and absorption of infrared radiation in a crystalline silicon solar cell while reducing the thickness of silicon in order to reduce manufacturing costs.
Dans le but d’augmenter l’efficacité d’une cellule solaire sur substrat de silicium cristallin, tout en réduisant l’épaisseur de silicium, on a proposé une architecture dite à émetteur passivé contact arrière ou PERC (pour Passivated Emitter Rear Contact). Une cellule PERC comporte une couche supplémentaire disposée en face arrière. Cette couche diélectrique de passivation réfléchit une partie de la lumière non absorbée lors d’un premier passage à travers la cellule solaire. Toutefois, dans le cas d’une cellule monofaciale, une couche métallique réfléchissante recouvre généralement la face arrière et contribue aussi à réfléchir une partie de la lumière non absorbée. Quelle que soit l’épaisseur de l’absorbeur en silicium cristallin une partie de la lumière est réfléchie en face arrière. La quantité de lumière réfléchie dépend de l’épaisseur de silicium cristallin et de la longueur d’onde. Pour une cellule de 200 pm d’épaisseur, la réflexion en face arrière devient importante pour des longueurs d’ondes supérieures à 1 pm. Pour une cellule de 100 pm d’épaisseur, la réflexion en face arrière devient importante pour des longueurs d’ondes supérieures à 950nm. In order to increase the efficiency of a solar cell on a crystalline silicon substrate, while reducing the thickness of silicon, it has been proposed a so-called rear passivated emitter or PERC architecture (for Passivated Emitter Rear Contact). A PERC cell has an additional layer disposed on the rear face. This dielectric layer of passivation reflects a part of the light not absorbed during a first pass through the solar cell. However, in the case of a monofacial cell, a reflective metal layer generally covers the back face and also contributes to reflect some of the unabsorbed light. Whatever the thickness of the crystalline silicon absorber, part of the light is reflected on the rear face. The amount of reflected light depends on the crystalline silicon thickness and the wavelength. For a cell 200 μm thick, reflection on the back side becomes important for wavelengths greater than 1 pm. For a 100 μm thick cell, reflection on the back side becomes important for wavelengths greater than 950nm.
Dans la catégorie des cellules PERC, on trouve différentes variantes telles que PERL, PERT ou PERF. Une cellule PERT (passivated emitter with rear totally diffused, en terminologie anglo-saxone) comporte, en face arrière, une couche entièrement diffusée en contact électrique avec une couche métallique. Une cellule PERL (passivated emitter with rear locally diffused, en terminologie anglo-saxone) comporte, en face avant, une couche émetteur passivé et, en face arrière, des zones de diffusion limitées aux contacts métalliques. Une cellule PERF (Passivated Emitter, Rear Floating-junction, en terminologie anglo-saxone) comporte une couche émetteur passivé en face avant et en face arrière une junction p-n flottante.  In the category of PERC cells, there are different variants such as PERL, PERT or PERF. A PERT cell (passivated emitter with rear totally diffused, in English terminology) has, on the back, a fully diffused layer in electrical contact with a metal layer. A PERL (passivated emitter with rear locally distributed) cell comprises, on the front face, a passivated emitter layer and, on the rear face, diffusion zones limited to the metal contacts. A PERF cell (Passivated Emitter, Rear Floating-junction, in English terminology) has a passivated emitter layer on the front and on the back a floating p-n junction.
De manière générale, on cherche à augmenter l’absorption de rayonnement infrarouge dans un dispositif PERC monofacial, c’est à dire destiné à être exposé à un rayonnement uniquement en face avant, ou dans un dispositif PERC bifacial, destiné à être exposé à un rayonnement en face avant et en face arrière.  In general, it is sought to increase the absorption of infrared radiation in a PERC monofacial device, that is to say intended to be exposed to radiation only on the front face, or in a PERC bifacial device, intended to be exposed to a radiation on the front and back side.
En particulier, dans un dispositif PERC monofacial comprenant une couche métallique réfléchissante sur la face arrière du dispositif, on cherche à réduire l’absorption parasite de rayonnement infrarouge dans la couche métallique ou l’absorption des plasmon-polaritons de surface à l’interface entre la couche métallique et le substrat de silicium.  In particular, in a monofacial PERC device comprising a reflective metal layer on the rear face of the device, it is sought to reduce the parasitic absorption of infrared radiation in the metal layer or the absorption of surface plasmon polaritons at the interface between the metal layer and the silicon substrate.
Une première approche pour augmenter l’absorption de rayonnement infrarouge dans une cellule solaire de type PERC consiste à déposer par évaporation thermique une couche de fluorure de magnésium (MgF2) ayant une épaisseur comprise entre 200 nm et 500 nm. Une couche de passivation est formée entre le substrat et une couche de fluorure de magnésium. La couche de fluorure de magnésium est déposée entre le substrat passivé et une couche métallique en face arrière pour réfléchir le rayonnement infrarouge dans le substrat. Cette couche de fluorure de magnésium permet d’augmenter la réflexion à l’interface entre la couche de passivation et la couche de fluorure de magnésium et ainsi d’augmenter l’absorption de rayonnement infrarouge dans la cellule et par conséquent le gain de la cellule. Toutefois, cette approche reste difficile à industrialiser. A first approach to increase the absorption of infrared radiation in a PERC solar cell consists in depositing by thermal evaporation a layer of magnesium fluoride (MgF 2 ) having a thickness of between 200 nm and 500 nm. A passivation layer is formed between the substrate and a layer of magnesium fluoride. The magnesium fluoride layer is deposited between the passivated substrate and a metal layer on the back side to reflect the infrared radiation in the substrate. This layer of magnesium fluoride makes it possible to increase the reflection at the interface between the passivation layer and the magnesium fluoride layer and thus to increase the absorption of infrared radiation in the cell and consequently the gain of the cell. . However, this approach remains difficult to industrialize.
Le document CN 101789462 décrit une structure de cellule solaire en silicium noir, appelé black Silicon, à large spectre d’absorption.  CN 101789462 discloses a black silicon solar cell structure, called black silicon, with broad absorption spectrum.
Le document EP 0776051 décrit une cellule solaire à contact arrière et son procédé de fabrication.  EP 0776051 discloses a rear contact solar cell and its method of manufacture.
Le document CN 101404301 décrit une cellule solaire en silicium cristallin comprenant une couche arrière réfléchissante en silicium poreux.  CN 101404301 discloses a crystalline silicon solar cell comprising a reflective back layer of porous silicon.
Le document US 2011/0248265 décrit une cellule solaire ayant une surface arrière texturée.  US 2011/0248265 discloses a solar cell having a textured back surface.
La figure 1 illustre une autre approche basée sur le dépôt d’une couche de nitrure de silicium (SiNx) ayant une épaisseur comprise entre 70 nm et 200 nm. La couche de nitrure de silicium 3 est disposée entre le substrat de silicium cristallin 1 et la couche métallique 2 en face arrière 12 d’une cellule solaire. Le substrat de silicium a un indice de réfraction compris entre 3.5 et 3.6 dans une gamme de longueur d’onde supérieure à 900 nm, tandis que la couche de nitrure de silicium 3 a un indice de réfraction égal à environ 1.9 dans cette gamme. La couche de nitrure de silicium 3 permet de réfléchir un faisceau lumineux 100 non absorbé et qui se propage vers l’interface avec la couche métallique. Ainsi, les faisceaux lumineux 110, respectivement 120, réfléchis à l’interface entre le substrat de silicium cristallin 1 et la couche de nitrure de silicium 3, respectivement la couche métallique 2, sont renvoyés vers le substrat 1. De plus, la couche de nitrure de silicium 3 permet de limiter l’absorption parasite d’ondes évanescentes 300 dans la couche métallique 2 formant le contact arrière. Cependant, l’utilisation d’une couche épaisse de nitrure de silicium est incompatible avec la passivation d’une surface dopée p ou p+.  FIG. 1 illustrates another approach based on the deposition of a layer of silicon nitride (SiNx) having a thickness of between 70 nm and 200 nm. The silicon nitride layer 3 is disposed between the crystalline silicon substrate 1 and the metal layer 2 on the rear face 12 of a solar cell. The silicon substrate has a refractive index between 3.5 and 3.6 in a wavelength range greater than 900 nm, while the silicon nitride layer 3 has a refractive index of about 1.9 in this range. The silicon nitride layer 3 makes it possible to reflect an unabsorbed light beam 100 which propagates towards the interface with the metal layer. Thus, the light beams 110, respectively 120, reflected at the interface between the crystalline silicon substrate 1 and the silicon nitride layer 3, respectively the metal layer 2, are returned to the substrate 1. In addition, the Silicon nitride 3 makes it possible to limit the parasitic absorption of evanescent waves 300 in the metal layer 2 forming the rear contact. However, the use of a thick silicon nitride layer is incompatible with the passivation of a p or p + doped surface.
D’autre part, dans le but d’augmenter l’efficacité des cellules solaires, des dispositifs multi-jonction sont proposés, dans lesquels plusieurs jonctions électroniques sont superposées dans un même dispositif. Chaque jonction électronique d’un dispositif multi-jonction est adaptée pour absorber et convertir une partie du spectre du rayonnement incident. Un cas particulier de cellule à hétérojonction est celui d’une cellule tandem qui comporte deux jonctions électroniques, une première jonction électronique étant disposée en face avant et une seconde jonction électronique étant disposée en face arrière de la cellule tandem. On the other hand, in order to increase the efficiency of solar cells, multi-junction devices are proposed, in which several junctions electronic devices are superimposed in the same device. Each electronic junction of a multi-junction device is adapted to absorb and convert part of the incident radiation spectrum. A particular case of heterojunction cell is that of a tandem cell which comprises two electronic junctions, a first electronic junction being disposed on the front face and a second electronic junction being arranged on the rear face of the tandem cell.
Récemment, on a développé une cellule solaire à hétérojonction de type HiT (heterojunction with intrinsic thin-layer) à contacts arrière interdigités (HiT- IBC). Une cellule solaire HiT comporte au moins une couche mince de silicium amorphe hydrogéné intrinsèque ((i) a-Si:H) d’environ 5 nm d’épaisseur déposée sur la face avant. Une telle couche mince de silicium amorphe hydrogéné intrinsèque permet de passiver la face avant de la cellule HiT à bas coût. Les cellules solaires de type HiT ont permis d’accroitre notablement l’efficacité de conversion. Une possibilité pour améliorer encore l’absorption d’une cellule solaire de type HiT dans l’infrarouge est de déposer en face arrière une couche d’oxyde d’indium et d’étain (ITO pour indium tin oxide) ayant une épaisseur d’au moins 150 nm. Toutefois, un compromis doit être trouvé entre l’absorption parasite de rayonnement IR dans la couche d’ITO due aux porteurs libres et la conduction électrique de IΊTO pour réduire les pertes de résistance en série. De plus, cette approche ne semble pas pérenne du fait du coût de IΊTO et des incertitudes sur l’approvisionnement en indium.  Recently, a heterojunction with intrinsic thin-layer (HiT-IBC) heterojunction solar cell has been developed. A solar cell HiT comprises at least one thin layer of intrinsic hydrogenated amorphous silicon ((i) a-Si: H) of about 5 nm thick deposited on the front face. Such a thin layer of intrinsically hydrogenated amorphous silicon makes it possible to passivate the front face of the HiT cell at low cost. The HiT type solar cells have significantly increased the conversion efficiency. One possibility to further improve the absorption of a HiT type solar cell in the infrared is to deposit on the rear face a layer of indium tin oxide (ITO for indium tin oxide) having a thickness of at least 150 nm. However, a compromise must be found between the parasitic absorption of IR radiation in the ITO layer due to the free carriers and the electrical conduction of IΊTO to reduce the losses of resistance in series. In addition, this approach does not appear to be sustainable due to the cost of IΊTO and uncertainties on indium supply.
Un des buts de l’invention est de proposer une méthode de fabrication et un dispositif photovoltaïque, de type émetteur passivé contact arrière, présentant une absorption élevée dans le domaine de longueur d’onde compris entre 900 nm et 1200 nm, en particulier pour une cellule solaire sur plaque de silicium cristallin de faible épaisseur et/ou dans un dispositif de type cellule tandem.  One of the aims of the invention is to propose a manufacturing method and a photovoltaic device, of the passivated emitter back contact type, having a high absorption in the wavelength range between 900 nm and 1200 nm, in particular for a solar cell on a thin crystalline silicon plate and / or in a tandem cell device.
OBJET DE L’INVENTION  OBJECT OF THE INVENTION
Afin de remédier aux inconvénients précités de l’état de la technique, la présente invention propose un dispositif photovoltaïque ou photodétecteur de type émetteur passivé contact arrière, le dispositif comprenant un substrat de silicium cristallin, et le dispositif ayant une face avant destinée à être exposée à un faisceau lumineux et une face arrière.  In order to overcome the aforementioned drawbacks of the state of the art, the present invention proposes a photovoltaic device or photodetector of the passivated emitter rear contact type, the device comprising a crystalline silicon substrate, and the device having a front face intended to be exposed. to a light beam and a backside.
Plus particulièrement, on propose selon l’invention un dispositif photovoltaïque ou photodétecteur de type émetteur passivé contact arrière dans lequel la face arrière du dispositif comporte une couche poreuse de silicium, la couche poreuse de silicium ayant une surface texturée, la surface texturée comprenant des pores de dimensions comprises entre environ 20 nm et 1000 nm, lesdits pores formant des ouvertures orientées vers la face arrière du dispositif, et le dispositif comportant en outre une couche mince de passivation conforme à au moins une partie de la surface texturée, et au moins une électrode métallique formée sur la face arrière du dispositif, l’électrode métallique étant adaptée pour former un contact électrique via une ouverture de contact en face arrière du dispositif. More particularly, there is provided according to the invention a device photovoltaic or photodetector of passivated emitter back contact type in which the rear face of the device comprises a porous silicon layer, the porous silicon layer having a textured surface, the textured surface comprising pores with dimensions of between approximately 20 nm and 1000 nm, said pores forming apertures facing the rear face of the device, and the device further comprising a thin passivation layer conforming to at least a portion of the textured surface, and at least one metal electrode formed on the rear face of the device, metal electrode being adapted to form an electrical contact via a contact opening on the rear face of the device.
L’ouverture de contact est dépourvue de couche poreuse et de couche mince de passivation afin d’obtenir un contact électrique ayant une résistance de contact la plus faible possible.  The contact opening is devoid of a porous layer and a thin passivation layer in order to obtain electrical contact with the lowest possible contact resistance.
Le dispositif de l’invention permet d’augmenter l’absorption de rayonnement infrarouge dans le dispositif photovoltaïque ou photodétecteur de type émetteur passivé contact arrière. De plus, l’invention permet également de réduire l’absorption de plasmon-polaritons de surface à l’interface entre l’électrode métallique en face arrière et le substrat de silicium. L’ajout de cette couche poreuse de silicium n’entraîne pas un surcoût prohibitif du dispositif.  The device of the invention makes it possible to increase the absorption of infrared radiation in the photovoltaic device or photodetector of the passivated emitter rear contact type. In addition, the invention also makes it possible to reduce the surface plasmon-polariton absorption at the interface between the metal electrode on the rear face and the silicon substrate. The addition of this porous silicon layer does not entail a prohibitive overcost of the device.
Cette nouvelle architecture permet d’augmenter l’absorption dans l’infrarouge d’où une augmentation du courant de court-circuit, autrement dit, un gain en Jsc (qui additionne le courant issu de l’absorption à toutes les longueurs d’onde), tout en réduisant l’absorption parasite de plasmon-polaritons de surface à l’interface avec l’électrode métallique en face arrière du dispositif.  This new architecture makes it possible to increase the absorption in the infrared, hence an increase in the short-circuit current, in other words, a gain in Jsc (which adds up the current resulting from the absorption at all wavelengths). ), while reducing the parasitic absorption of surface plasmon-polaritons at the interface with the metal electrode at the back of the device.
D’autres caractéristiques non limitatives et avantageuses du dispositif conforme à l’invention, prises individuellement ou selon toutes les combinaisons techniquement possibles, sont les suivantes :  Other nonlimiting and advantageous features of the device according to the invention, taken individually or in any technically possible combination, are as follows:
- les pores ont une profondeur (h) comprise entre 100 nm et 1000 nm, les ouvertures des pores ont une dimension ( L2 ) comprise entre 20 nm et 1000 nm et une distance ( Li ) entre pores adjacents est comprise entre 20 nm et 1000 nm ; the pores have a depth (h) of between 100 nm and 1000 nm, the openings of the pores have a dimension (L 2 ) of between 20 nm and 1000 nm and a distance (Li) between adjacent pores is between 20 nm and 1000 nm;
- la couche poreuse de silicium présente une porosité comprise entre 25% et 75% ;  the porous silicon layer has a porosity of between 25% and 75%;
- la couche poreuse de silicium a une épaisseur moyenne comprise entre 100 nanomètres et 2 micromètres ; the porous silicon layer has an average thickness of between 100 nanometers and 2 micrometers;
- la couche poreuse de silicium a un indice de réfraction équivalent d’environ 1 ,4.  the porous silicon layer has an equivalent refractive index of approximately 1, 4.
Selon un mode de réalisation particulier et avantageux, la surface texturée de la couche poreuse de silicium présente une structure périodique ayant une première période spatiale dans une gamme comprise entre 20 nm et 500 nm. Selon un mode de réalisation particulier la surface texturée de la couche poreuse de silicium forme une structure doublement périodique comprenant une deuxième période spatiale dans une gamme comprise entre 900 nm et 1.5 miti, la couche poreuse de silicium formant une structure à cristal photonique.  According to a particular and advantageous embodiment, the textured surface of the porous silicon layer has a periodic structure having a first spatial period in a range between 20 nm and 500 nm. According to a particular embodiment, the textured surface of the porous silicon layer forms a doubly periodic structure comprising a second spatial period in a range between 900 nm and 1.5 miti, the porous silicon layer forming a photonic crystal structure.
Selon un aspect particulier et avantageux, la face arrière du dispositif comporte en outre des micro-pyramides, la couche poreuse de silicium étant formée en surface d’au moins une facette des micro-pyramides.  According to a particular and advantageous aspect, the rear face of the device further comprises micro-pyramids, the porous silicon layer being formed on the surface of at least one facet of the micro-pyramids.
Dans le cas d’un dispositif monofacial, l’électrode métallique comporte avantageusement une couche métallique réfléchissante recouvrant la face arrière du dispositif.  In the case of a monofacial device, the metal electrode advantageously comprises a reflective metal layer covering the rear face of the device.
De façon avantageuse, le dispositif est multi-jonction et la couche poreuse de silicium est disposée en face arrière du dispositif multi-jonction.  Advantageously, the device is multi-junction and the porous silicon layer is disposed on the rear face of the multi-junction device.
Selon un mode de réalisation particulier, le dispositif multi-jonction forme une cellule tandem.  According to a particular embodiment, the multi-junction device forms a tandem cell.
Dans un mode de réalisation particulier, la face avant du dispositif comporte une autre couche poreuse de silicium, l’autre couche poreuse de silicium ayant une autre surface texturée, l’autre surface texturée formant d’autres pores de dimensions comprises entre environ 20 nm et 2000 nm, lesdits autres pores formant d’autres ouvertures orientées vers la face avant du dispositif.  In a particular embodiment, the front face of the device comprises another porous silicon layer, the other porous silicon layer having another textured surface, the other textured surface forming other pores with dimensions of between about 20 nm and 2000 nm, said other pores forming further apertures oriented toward the front face of the device.
L’invention propose également un panneau photovoltaïque comprenant une pluralité de dispositifs photovoltaïques selon l’un des modes de réalisation décrits, reliés électriquement entre eux.  The invention also proposes a photovoltaic panel comprising a plurality of photovoltaic devices according to one of the embodiments described, electrically connected to each other.
L’invention propose également un procédé de fabrication d’un dispositif photovoltaïque ou photodétecteur de type émetteur passivé contact arrière ou d’un panneau photovoltaïque comprenant une pluralité de dispositifs photovoltaïques de type émetteur passivé contact arrière reliés électriquement entre eux, le procédé comprenant les étapes suivantes :  The invention also proposes a method for manufacturing a photovoltaic device or photodetector of the passivated rear-contact emitter type or of a photovoltaic panel comprising a plurality of passivated transmitter-type rear-contact-type photovoltaic devices electrically connected to one another, the method comprising the steps following:
- texturation de la face arrière d’un substrat de silicium cristallin de manière à former une couche poreuse de silicium, la couche poreuse de silicium ayant une surface texturée, la surface texturée comprenant des pores de dimensions comprises entre environ 20 nm et 1000 nm, lesdits pores formant des ouvertures orientées vers la face arrière du dispositif ; - Texturing of the back side of a crystalline silicon substrate for forming a porous silicon layer, the porous silicon layer having a textured surface, the textured surface comprising pores of dimensions of between about 20 nm and 1000 nm, said pores forming apertures facing the rear face of the device;
- formation d’au moins une couche mince de passivation conforme à la surface texturée, et  forming at least one thin passivation layer conforming to the textured surface, and
- formation d’au moins une électrode métallique sur la face arrière du dispositif, l’électrode métallique étant adaptée pour former un contact électrique via une ouverture de contact en face arrière du dispositif.  - Formation of at least one metal electrode on the rear face of the device, the metal electrode being adapted to form an electrical contact via a contact opening on the rear face of the device.
L’étape de texturation de la face arrière est de faible coût et ne requiert pas l’utilisation de matériaux coûteux supplémentaires.  The texturing step of the back side is of low cost and does not require the use of additional expensive materials.
Selon un aspect particulier, l’étape de texturation comporte une étape de gravure anisotrope de la face arrière du substrat de silicium, l’étape de gravure anisotrope étant de type gravure par ions réactifs éventuellement dans un réacteur plasma à couplage inductif, gravure chimique assistée par métal, gravure électrochimique ou gravure laser.  According to a particular aspect, the texturing step comprises an anisotropic etching step of the rear face of the silicon substrate, the anisotropic etching step being of reactive ion etching type possibly in an inductively coupled plasma reactor, assisted chemical etching. by metal, electrochemical etching or laser engraving.
Selon un mode de réalisation particulier et avantageux, l’étape de texturation comporte une étape supplémentaire de masquage avant l’étape de gravure, l’étape de masquage étant adaptée pour former un masque sur la face arrière du substrat de silicium, le masque comportant un motif périodique ayant au moins une première période spatiale dans une gamme comprise entre 20 nm et 500 nm. En option, le motif périodique du masque comporte une deuxième période spatiale dans une gamme comprise entre 900 nm et 1 ,5 miti, de manière à former une structure à cristal photonique dans la couche poreuse.  According to a particular and advantageous embodiment, the texturing step comprises an additional step of masking before the etching step, the masking step being adapted to form a mask on the rear face of the silicon substrate, the mask comprising a periodic pattern having at least a first spatial period in a range between 20 nm and 500 nm. Optionally, the periodic pattern of the mask has a second spatial period in a range of 900 nm to 1.5 miti, so as to form a photonic crystal structure in the porous layer.
Selon un aspect particulier, le procédé comporte en outre, avant l’étape de texturation, une étape supplémentaire de suppression de défauts de sciage du substrat de silicium cristallin, de polissage de la face arrière du substrat de silicium cristallin et/ou de formation de micro-pyramides sur la face arrière du substrat de silicium.  According to a particular aspect, the method further comprises, before the texturing step, an additional step of removing the sawing defects of the crystalline silicon substrate, polishing the back face of the crystalline silicon substrate and / or forming the micro-pyramids on the back side of the silicon substrate.
Selon un autre aspect particulier, l’étape de formation d’au moins une électrode métallique comporte une étape de dépôt de l’électrode métallique par impression, par sérigraphie, par dépôt physique en phase vapeur ou par électrodéposition. According to another particular aspect, the step of forming at least one metal electrode comprises a step of depositing the metal electrode by printing, by screen printing, by physical vapor deposition or by electrodeposition.
Selon encore un autre aspect particulier et avantageux, le procédé comprend en outre une étape de texturation de la face avant du substrat de manière à former une couche de silicium noir ou une autre couche poreuse de silicium en face avant du dispositif, l’autre couche poreuse de silicium ayant une autre surface texturée, l’autre surface texturée comprenant d’autres pores de dimensions comprises entre environ 20 nm et 2000 nm, lesdits autres pores formant d’autres ouvertures orientées vers la face avant du dispositif.  According to yet another particular and advantageous aspect, the method further comprises a step of texturing the front face of the substrate so as to form a black silicon layer or another porous silicon layer on the front face of the device, the other layer porous silicon having another textured surface, the other textured surface comprising other pores of dimensions between about 20 nm and 2000 nm, said other pores forming further openings facing the front face of the device.
DESCRIPTION DETAILLEE D’UN EXEMPLE DE RÉALISATION DETAILED DESCRIPTION OF AN EXEMPLARY EMBODIMENT
La description qui va suivre en regard des dessins annexés, donnés à titre d’exemples non limitatifs, fera bien comprendre en quoi consiste l’invention et comment elle peut être réalisée. The following description with reference to the accompanying drawings, given as non-limiting examples, will make it clear what the invention consists of and how it can be achieved.
Sur les dessins annexés :  In the accompanying drawings:
- la figure 1 illustre schématiquement l’effet d’une couche diélectrique entre le substrat de silicium et une couche métallique sur la face arrière d’un dispositif photovoltaïque ou photodétecteur de type émetteur passivé contact arrière selon l’art antérieur ;  FIG. 1 diagrammatically illustrates the effect of a dielectric layer between the silicon substrate and a metal layer on the rear face of a photovoltaic device or photodetector of the passivated emitter rear contact type according to the prior art;
- les figures 2 à 5 représentent schématiquement une vue en coupe de la face arrière de différentes variantes de cellules PERC selon un premier mode de réalisation comprenant un substrat absorbeur, une couche poreuse de silicium texturé et une électrode métallique en face arrière ;  - Figures 2 to 5 show schematically a sectional view of the rear face of different variants of PERC cells according to a first embodiment comprising an absorber substrate, a porous layer of textured silicon and a metal electrode rear face;
- les figures 6 à 9 représentent schématiquement une vue en coupe de la face arrière de différentes variantes de cellules PERC comprenant une couche poreuse de silicium texturé selon un deuxième mode de réalisation, la couche poreuse de silicium texturée étant formée sur des micro-pyramides ;  - Figures 6 to 9 schematically show a sectional view of the rear face of different PERC cell variants comprising a porous layer of textured silicon according to a second embodiment, the porous layer of textured silicon being formed on micro-pyramids;
- les figures 10 à 13 représentent schématiquement une vue en coupe de la face arrière de différentes variantes de cellules PERC comprenant une couche poreuse de silicium texturée selon un troisième mode de réalisation, la couche poreuse de silicium texturée formant une structure à cristal photonique ;  - Figures 10 to 13 schematically show a sectional view of the rear face of different variants of PERC cells comprising a porous layer of textured silicon according to a third embodiment, the porous layer of textured silicon forming a photonic crystal structure;
- la figure 14 représente schématiquement une vue détaillée de la couche poreuse de silicium texturée à structure à cristal photonique des figures 10 à 13 ;  FIG. 14 schematically represents a detailed view of the porous layer of textured silicon with a photonic crystal structure of FIGS. 10 to 13;
- la figure 15 illustre schématiquement une méthode de formation d’une couche poreuse de silicium texturée par gravure plasma ; - la figure 16 illustre schématiquement une autre méthode de formation d’une couche poreuse de silicium texturée par gravure chimique assistée par métal (Métal Assisted Chemical Etching ou MACE) ; FIG. 15 schematically illustrates a method of forming a porous silicon dioxide layer by plasma etching; - Figure 16 schematically illustrates another method of forming a porous layer of textured silicon metal-assisted chemical etching (Metal Assisted Chemical Etching or MACE);
- la figure 17 illustre schématiquement une autre méthode de formation d’une couche poreuse de silicium texturée par un procédé électrochimique ;  - Figure 17 schematically illustrates another method of forming a porous layer of textured silicon by an electrochemical process;
- la figure 18 illustre schématiquement une autre méthode de formation d’une couche poreuse de silicium texturée par faisceau laser femtoseconde (fs).  - Figure 18 schematically illustrates another method of forming a porous layer of textured silicon femtosecond laser beam (fs).
Dispositif  Device
La présente divulgation propose une nouvelle architecture de cellule solaire ayant une face arrière texturée pour former une couche poreuse de silicium. Cette architecture s’applique à une cellule solaire mono-jonction. Cette architecture s’applique aussi à une jonction électronique disposée en face arrière d’une cellule solaire multi-jonction, notamment dans une cellule tandem.  The present disclosure proposes a novel solar cell architecture having a textured back side to form a porous silicon layer. This architecture applies to a single-junction solar cell. This architecture also applies to an electronic junction disposed on the rear face of a multi-junction solar cell, in particular in a tandem cell.
Sur les figures 2 à 13, on a représenté schématiquement la face arrière d’un dispositif photovoltaïque ou photodétecteur de type émetteur passivé contact arrière selon différents modes de réalisation. La face avant du dispositif n’est pas représentée sur les figures 2-13.  FIGS. 2 to 13 show diagrammatically the rear face of a photovoltaic device or photodetector of the passivated transmitter rear contact type according to different embodiments. The front face of the device is not shown in Figures 2-13.
Plus précisément, les figures 2, 4, 6, 8, 10 et 12 représentent la face arrière d’une cellule de type PERC, PERL ou PERF comprenant une couche poreuse de silicium. Les figures 3, 5, 7, 9, 11 et 13 représentent la face arrière d’une cellule de type PERT comprenant une couche poreuse de silicium.  More precisely, FIGS. 2, 4, 6, 8, 10 and 12 represent the rear face of a PERC, PERL or PERF type cell comprising a porous silicon layer. Figures 3, 5, 7, 9, 11 and 13 show the rear face of a PERT type cell comprising a porous silicon layer.
Dans le présent document, on entend par silicium cristallin du silicium monocristallin (c-Si) ou multi-cristallin (mc-Si). Le substrat 1 est généralement dopé, entre 1 -2 ohm. cm pour une cellule PERC et entre 2-10 Ohm. cm pour une cellule de type PERT.  In the present document, crystalline silicon is understood to mean monocrystalline silicon (c-Si) or multi-crystalline silicon (mc-Si). The substrate 1 is generally doped, between 1 -2 ohm. cm for a PERC cell and between 2-10 Ohm. cm for a PERT cell.
La face arrière du substrat 1 de silicium est supposée initialement plane et s’étend dans un plan XY d’un repère orthonormé (XYZ).  The rear face of the silicon substrate 1 is assumed initially plane and extends in an XY plane of an orthonormal reference (XYZ).
Dans le premier mode de réalisation, la face arrière du substrat 1 de silicium cristallin est de préférence préalablement gravée pour enlever les défauts de sciage et/ou polie.  In the first embodiment, the rear face of the crystalline silicon substrate 1 is preferably previously etched to remove sawing and / or polished defects.
Sur la figure 2, on a représenté schématiquement une vue en coupe de la face arrière d’un substrat 1 de silicium cristallin d’une cellule PERC, PERL ou PERF selon un premier mode de réalisation. Sur la figure 2, la face arrière d’une cellule PERC, PERL ou PERF comporte une couche métallique 2. La couche métallique 2 face arrière est par exemple en argent, aluminium, nickel, cuivre ou un alliage nickel-silicium. La couche métallique 2 est par exemple formée par sérigraphie, dépôt physique en phase vapeur (PVD ou Physical Vapor Déposition), électro-déposition ou pulvérisation. Selon la technique de dépôt, l’épaisseur de la couche métallique 2 est généralement comprise respectivement entre 10 pm et 50 pm en sérigraphie, entre 1 pm et 10 pm en PVD ou en électro- déposition. De préférence, la couche métallique est formée par pulvérisation d’un alliage d’aluminium et de silicium (avec 1 % ou 2% de silicium) du fait du faible coût de l’aluminium (Al) comparé à celui de l’argent (Ag). La pulvérisation permet d’obtenir un meilleur coefficient de réflexion que la sérigraphie. Cependant, l’aluminium présente un plus fort coefficient d’absorption que l’argent, notamment dans l’infrarouge. La couche métallique 2 face arrière forme une électrode qui permet d’extraire les charges électriques générées dans la cellule photovoltaïque, généralement en combinaison avec d’autres électrodes en face avant de la cellule. De façon avantageuse, dans le cas d’une cellule monofaciale, la couche métallique 2 recouvre la face arrière 12 du dispositif. La couche métallique 2 forme aussi une couche réfléchissante qui contribue à renvoyer une partie du rayonnement lumineux non absorbé en direction du substrat absorbeur. FIG. 2 diagrammatically shows a sectional view of the rear face of a crystalline silicon substrate 1 of a PERC, PERL or PERF cell according to a first embodiment. In FIG. 2, the rear face of a PERC, PERL or PERF cell comprises a metal layer 2. The layer metal 2 back side is for example silver, aluminum, nickel, copper or a nickel-silicon alloy. The metal layer 2 is for example formed by screen printing, physical vapor deposition (PVD or Physical Vapor Deposition), electro-deposition or sputtering. According to the deposition technique, the thickness of the metal layer 2 is generally between 10 μm and 50 μm, respectively, in screen printing, between 1 μm and 10 μm in PVD or in electro-deposition. Preferably, the metal layer is formed by sputtering an alloy of aluminum and silicon (with 1% or 2% silicon) because of the low cost of aluminum (Al) compared to that of silver ( Ag). Spraying makes it possible to obtain a better reflection coefficient than screen printing. However, aluminum has a higher absorption coefficient than silver, especially in the infrared. The rear-face metal layer 2 forms an electrode which makes it possible to extract the electrical charges generated in the photovoltaic cell, generally in combination with other electrodes on the front face of the cell. Advantageously, in the case of a monofacial cell, the metal layer 2 covers the rear face 12 of the device. The metal layer 2 also forms a reflective layer which helps to return a portion of the unabsorbed light radiation towards the absorber substrate.
Dans le cas d’une cellule de type PERC (illustrée en figure 2), le substrat 1 est en contact avec la couche métallique 2 via une ou plusieurs ouvertures de contact 23, 24. Dans le cas d’une cellule de type PERL ou PERF (aussi illustrée en figure 2), la cellule comporte en outre des zones 6 dopées localement en contact avec la couche métallique 2 via les ouvertures de contact 23, 24. Par exemple, dans le cas d’un substrat 1 de silicium dopé n, les zones 6 sont en silicium dopé p ou p+ formées par diffusion locale dans le substrat. Les zones 6 dopées localement forment des émetteurs locaux face arrière de la cellule PERL ou PERF.  In the case of a PERC type cell (illustrated in FIG. 2), the substrate 1 is in contact with the metal layer 2 via one or more contact openings 23, 24. In the case of a PERL type cell or PERF (also shown in FIG. 2), the cell furthermore comprises locally doped zones 6 in contact with the metal layer 2 via the contact openings 23, 24. For example, in the case of an n-doped silicon substrate 1 the zones 6 are made of p-doped silicon or p + formed by local diffusion in the substrate. The locally doped zones 6 form local rear-facing emitters of the PERL or PERF cell.
Selon la présente divulgation, la face arrière du substrat 1 de silicium cristallin comporte une couche poreuse 4 de silicium. Plus précisément, la face arrière du substrat 1 est nano-texturée en dehors des ouvertures de contact 23, 24. Toutefois, les ouvertures de contact 23, 24 de la face arrière sont formés sur une portion de surface du substrat qui ne comporte pas de couche poreuse nano- texturée ni de couche de passivation (par exemple une portion de surface de silicium plane et/ou polie ou encore comprenant des micro-pyramides). Plus précisément, la couche poreuse 4 de silicium présente une surface nano-texturée, la surface nano-texturée comprenant des pores de dimensions comprises entre environ 20 nm et 1000 nm. Les pores ont des ouvertures orientées vers la face arrière 12 du dispositif. Les pores ont une profondeur (h) comprise entre 100 nm et 1000 nm, les ouvertures des pores ont une dimension transverse (L2) comprise entre 20 nm et 1000 nm et la distance (L1 ) entre pores adjacents est comprise entre 20 nm et 1000 nm. La couche poreuse 4 de silicium a une épaisseur moyenne comprise entre 100 nanomètres et 2 micromètres et de préférence entre 100 nm et 200 nm. La couche poreuse 4 de silicium a une porosité spatialement homogène. On entend ici par épaisseur moyenne, l’épaisseur de la couche poreuse moyennée sur sa surface. La valeur de cette porosité est comprise dans un domaine entre 25% et 75%. Dans certains cas, la couche poreuse 4 de silicium inclue des nano-bulles d’air. La couche poreuse 4 a un indice de réfraction équivalent d’environ 1 ,4 ± 0,2 dans l’infrarouge. According to the present disclosure, the rear face of the crystalline silicon substrate 1 comprises a porous silicon layer 4. More specifically, the rear face of the substrate 1 is nano-textured outside the contact openings 23, 24. However, the contact openings 23, 24 of the rear face are formed on a surface portion of the substrate which does not comprise any nano-textured porous layer or passivation layer (for example a flat surface portion of silicon and / or polished or including micro-pyramids). More specifically, the porous silicon layer 4 has a nano-textured surface, the nano-textured surface comprising pores with dimensions of between approximately 20 nm and 1000 nm. The pores have apertures oriented towards the rear face 12 of the device. The pores have a depth (h) of between 100 nm and 1000 nm, the pore openings have a transverse dimension (L2) of between 20 nm and 1000 nm and the distance (L1) between adjacent pores is between 20 nm and 1000 nm. nm. The porous silicon layer 4 has an average thickness of between 100 nanometers and 2 micrometers and preferably between 100 nm and 200 nm. The porous silicon layer 4 has a spatially homogeneous porosity. Here means mean thickness, the thickness of the porous layer averaged on its surface. The value of this porosity is in a range between 25% and 75%. In some cases, the porous silicon layer 4 includes nano-bubbles of air. The porous layer 4 has an equivalent refractive index of about 1.4 ± 0.2 in the infrared.
De plus, une couche mince de passivation 5 est déposée ou formée par croissance de manière conforme à au moins une partie de la surface nano- texturée de la couche poreuse 4. De préférence, la couche mince de passivation 5 recouvre la couche poreuse 4 sur la face arrière de la cellule tout en laissant ouvertes, autrement dit sans refermer, les ouvertures des pores en face arrière de la cellule. L’empilement constitué par la couche poreuse 4 et la couche mince de passivation 5 forme ainsi une couche poreuse passivée.  In addition, a thin passivation layer 5 is deposited or grown in accordance with at least a portion of the nano-textured surface of the porous layer 4. Preferably, the thin passivation layer 5 covers the porous layer 4 on the rear face of the cell while leaving open, in other words without closing, the openings of the pores on the rear face of the cell. The stack formed by the porous layer 4 and the thin passivation layer 5 thus forms a passivated porous layer.
La couche mince de passivation 5 comporte une couche mince de silicium amorphe (a-Si), de nitrure de silicium (SiNx), d’alumine (AI2O3), d’oxyde de silicium (S1O2) ou d’un oxyde d’un autre métal de transition. De façon optionnelle, la couche mince de passivation 5 est constituée d’un empilement d’au moins deux couches minces indiquées ci-dessus. La couche mince de passivation 5 a une épaisseur totale comprise entre 50 nm et 200 nm. The thin passivation layer 5 comprises a thin layer of amorphous silicon (a-Si), silicon nitride (SiN x ), alumina (Al2O3), silicon oxide (SiO2) or an oxide of another transition metal. Optionally, the thin passivation layer 5 consists of a stack of at least two thin layers indicated above. The thin passivation layer 5 has a total thickness of between 50 nm and 200 nm.
La couche mince de passivation 5 peut être déposée par l’une ou l’autre des méthodes classiques de dépôt et/ou de croissance de couche minces telles que par exemple : le dépôt chimique en phase vapeur assisté par plasma (PECVD pour Plasma Enhanced Chemical Vapor Déposition) ou par dépôt de couche atomique (ALD pour Atomic Layer Déposition).  The thin passivation layer 5 may be deposited by one of the conventional thin layer deposition and / or growth methods such as, for example: plasma enhanced chemical vapor deposition (PECVD) for Plasma Enhanced Chemical Vapor Deposition) or by atomic layer deposition (ALD for Atomic Layer Deposition).
De façon avantageuse, la couche mince de passivation 5 est formée sur toute la face arrière de la cellule. Des ouvertures de contact 23, 24 sont ensuite réalisées localement à travers la couche mince de passivation 5 pour permettre un meilleur contact électrique entre, d’une part, la couche métallique 2 et, d’autre part, le substrat 1 , ou respectivement les zones 6 dopées localement et favoriser ainsi une meilleure extraction des porteurs de charge. On définit une fraction de contact comme étant le rapport entre la surface ouverte avec contact de métallisation sur la surface non ouverte. Ces ouvertures de contact 23, 24 locales correspondent à une fraction de contact comprise entre 1 % et 10 %. Les ouvertures de contact 23, 24 locales dans la couche mince de passivation 5 sont par exemple effectuées par laser, par gravure sèche ou par gravure en pâte. De façon optionnelle, on forme un alliage nickel-silicium (Ni-Si) ou aluminium-silicium (Al-Si) à l’interface entre le substrat 1 de silicium et la couche métallique 2. Ces ouvertures de contact 23, 24 locales ont une dimension suivant la direction X et/ou Y comprise généralement entre 500 microns et 2 mm. Ainsi, la couche poreuse passivée recouvre la face arrière du substrat 1 de silicium en dehors des ouvertures de contact 23, 24. Advantageously, the thin passivation layer 5 is formed on the entire rear face of the cell. Contact openings 23, 24 are then performed locally through the thin passivation layer 5 to allow better electrical contact between, on the one hand, the metal layer 2 and, on the other hand, the substrate 1, or respectively the locally doped areas 6 and thus promote a better extraction of charge carriers. A contact fraction is defined as being the ratio of the open area with metallization contact on the unopened surface. These contact openings 23, 24 local correspond to a contact fraction of between 1% and 10%. The local contact openings 23, 24 in the thin passivation layer 5 are for example made by laser, by dry etching or by paste etching. Optionally, a nickel-silicon (Ni-Si) or aluminum-silicon (Al-Si) alloy is formed at the interface between the silicon substrate 1 and the metal layer 2. These local contact openings 23, 24 have a dimension along the X and / or Y direction generally between 500 microns and 2 mm. Thus, the passivated porous layer covers the rear face of the silicon substrate 1 outside the contact openings 23, 24.
Sur la figure 2, la couche métallique 2 est en contact électrique avec le substrat 1 de silicium au travers des ouvertures de contact 23, 24. D’autre part, la couche métallique 2 est en contact avec la couche poreuse passivée en dehors des ouvertures de contact 23, 24. Ainsi, la couche métallique 2 vient refermer les ouvertures des pores orientées vers la face arrière. Selon la technique utilisée pour former la couche métallique 2, le matériau de la couche métallique 2 peut ou non remplir les pores de la couche poreuse passivée dont les ouvertures sont orientées vers la face arrière. De façon avantageuse, la couche métallique 2 ne rentre pas dans les pores de la couche poreuse passivée, qui restent vides ou remplis de gaz, par exemple d’air.  In FIG. 2, the metal layer 2 is in electrical contact with the silicon substrate 1 through the contact openings 23, 24. On the other hand, the metal layer 2 is in contact with the passivated porous layer outside the openings. contact 23, 24. Thus, the metal layer 2 closes the openings of the pores oriented towards the rear face. According to the technique used to form the metal layer 2, the material of the metal layer 2 may or may not fill the pores of the passivated porous layer whose openings are oriented towards the rear face. Advantageously, the metal layer 2 does not enter the pores of the passivated porous layer, which remain empty or filled with gas, for example air.
Sur la figure 3, on a représenté la face arrière d’une cellule de type PERT à base d’un substrat 1 de silicium cristallin et d’une couche métallique 2 selon le premier mode de réalisation. Les mêmes signes de référence désignent les mêmes éléments que sur la figure 2. La cellule PERT comporte en outre une couche 7 de silicium dopé formée par diffusion en face arrière du substrat 1 de silicium cristallin. Par exemple, dans le cas d’une cellule n-PERT, le substrat 1 de silicium est dopé n et la couche 7 est en silicium dopé p ou p+ par diffusion sur toute la face arrière. La couche 7 forme un émetteur face arrière de la jonction électronique de la cellule n-PERT. La face arrière de la couche 7 de silicium dopée est nano-texturée en dehors des ouvertures de contact 23, 24. Plus précisément, la face arrière de la couche 7 comporte une couche poreuse 4 de silicium. Dans ce cas, la couche poreuse 4 de silicium comporte le même dopant que la couche 7. Ainsi, dans le cas d’une cellule n-PERT, la couche poreuse 4 de silicium est dopée p. La couche poreuse 4 de silicium de la cellule illustrée en figure 3 présente par ailleurs les mêmes caractéristiques et propriétés que la couche 4 de silicium de la cellule illustrée en figure 2, et peut être fabriquée suivant les mêmes techniques. FIG. 3 shows the rear face of a PERT-type cell based on a crystalline silicon substrate 1 and a metal layer 2 according to the first embodiment. The same reference signs designate the same elements as in FIG. 2. The PERT cell furthermore comprises a doped silicon layer 7 formed by back-wall diffusion of the crystalline silicon substrate 1. For example, in the case of an n-PERT cell, the silicon substrate 1 is n-doped and the layer 7 is made of p-doped or p + -silicon by diffusion over the entire rear face. Layer 7 forms a rear-facing emitter of the electronic junction of the n-PERT cell. The back side of the silicon layer 7 doped is nano-textured outside the contact openings 23, 24. More specifically, the rear face of the layer 7 comprises a porous layer 4 of silicon. In this case, the porous silicon layer 4 comprises the same dopant as the layer 7. Thus, in the case of an n-PERT cell, the porous silicon layer 4 is p-doped. The porous silicon layer 4 of the cell illustrated in FIG. 3 also has the same characteristics and properties as the silicon layer 4 of the cell illustrated in FIG. 2, and can be manufactured using the same techniques.
De manière analogue à l’exemple illustré en figure 2, le dispositif de la figure 3 comporte une couche mince de passivation 5 déposée ou formée par croissance de manière conforme à au moins une partie de la surface nano- texturée de la couche poreuse 4 de silicium. La couche mince de passivation 5 a une épaisseur totale comprise entre 5 nm et 100 nm. De préférence, la couche mince de passivation 5 recouvre la couche poreuse 4 sur la face arrière de la cellule tout en laissant ouvertes les ouvertures des pores en face arrière de la cellule. De plus, la couche mince de passivation 5 de la cellule PERT comporte des ouvertures de contact 23, 24 pour permettre un contact électrique direct entre la couche métallique 2 et la couche 7 dopée et entièrement diffusée.  In a similar manner to the example illustrated in FIG. 2, the device of FIG. 3 comprises a thin passivation layer 5 deposited or formed by growth in accordance with at least a portion of the nano-textured surface of the porous layer 4 of silicon. The thin passivation layer 5 has a total thickness of between 5 nm and 100 nm. Preferably, the thin passivation layer 5 covers the porous layer 4 on the rear face of the cell while leaving open the pore openings on the rear face of the cell. In addition, the thin passivation layer 5 of the PERT cell comprises contact openings 23, 24 to allow direct electrical contact between the metal layer 2 and the doped layer and fully diffused.
Une cellule à émetteur passivé contact arrière ayant une face arrière recouverte d’une couche métallique 2 réfléchissante, comme illustrée sur les figures 2 et 3, trouve des applications en particulier dans des dispositifs photovoltaïques ou photodétecteurs utilisés en monofacial.  A rear-passively passivated transmitter cell having a rear face covered with a reflective metal layer 2, as illustrated in FIGS. 2 and 3, finds applications in particular in photovoltaic devices or photodetectors used in monofacial.
Les figures 4 et 5 illustrent des variantes du premier mode de réalisation, dans lesquelles l’électrode métallique en face arrière ne recouvre pas toute la face arrière mais comporte des contacts métalliques 21 , 22 localisés et limités spatialement aux ouvertures de contact 23, 24. Ainsi, les contacts métalliques 21 , 22 localisés sont en contact électrique avec le substrat au travers des ouvertures de contact 23, 24. Par ailleurs, les mêmes signes de référence désignent les mêmes éléments que sur les figures 2 et 3.  FIGS. 4 and 5 illustrate variants of the first embodiment, in which the metal electrode on the rear face does not cover the entire rear face but has metal contacts 21, 22 located and spatially limited to the contact openings 23, 24. Thus, the metal contacts 21, 22 located in electrical contact with the substrate through the contact openings 23, 24. Moreover, the same reference signs designate the same elements as in Figures 2 and 3.
Une cellule à émetteur passivé contact arrière ayant une face arrière comportant des contacts métalliques localisés, comme illustrée sur les figures 4 et 5, trouve des applications en particulier dans des dispositifs photovoltaïques ou photodétecteurs utilisés en bifacial.  A passivated rear-contact emitter cell having a rear face having localized metal contacts, as illustrated in FIGS. 4 and 5, finds applications in particular in photovoltaic devices or photodetectors used in bifacial form.
Sur la figure 4, la face arrière d’une cellule PERC, PERL ou PERF comporte des contacts métalliques 21 , 22 localisés formant une ou plusieurs électrodes en face arrière. De manière analogue au dispositif décrit en lien avec la figure 2, un dispositif PERC en lien avec la figure 4 comporte une couche poreuseIn FIG. 4, the rear face of a PERC, PERL or PERF cell has metal contacts 21, 22 located forming one or more electrodes on the rear face. In a similar manner to the device described in connection with FIG. 2, a device PERC in connection with FIG. 4 comprises a porous layer
4 de silicium sur la face arrière du substrat 1 de silicium cristallin en dehors des ouvertures de contact 23, 24. La couche poreuse 4 de silicium présente une surface nano-texturée comprenant des pores ayant des ouvertures orientées vers la face arrière 12 du dispositif. De manière analogue, une couche mince de passivation 5 est déposée ou formée par croissance de manière conforme à au moins une partie de la surface nano-texturée de la couche poreuse 4. L’empilement constitué par la couche poreuse 4 et la couche mince de passivation4 The silicon porous layer 4 has a nano-textured surface comprising pores having apertures oriented towards the rear face 12 of the device. Similarly, a thin passivation layer 5 is deposited or grown in a manner consistent with at least a portion of the nano-textured surface of the porous layer 4. The stack consisting of the porous layer 4 and the thin layer of passivation
5 forme ainsi une couche poreuse passivée en dehors des ouvertures de contact 23, 24. 5 thus forms a passivated porous layer outside the contact openings 23, 24.
Sur la figure 5, on a représenté la face arrière d’une cellule de type PERT à base d’un substrat 1 de silicium cristallin, d’une couche 7 formant un émetteur face arrière et de contacts métalliques 21 , 22 localisés formant une ou plusieurs électrodes en face arrière selon une autre variante du premier mode de réalisation. De manière analogue au dispositif décrit en lien avec la figure 3, un dispositif PERC en lien avec la figure 5 comporte une couche poreuse 4 de silicium sur la face arrière de la couche 7 formant l’émetteur face arrière. Comme décrit plus haut, la couche poreuse 4 est limitée spatialement en dehors des ouvertures de contact 23, 24. De manière analogue au dispositif décrit en lien avec la figure 4, une couche mince de passivation 5 conforme à au moins une partie de la surface nano-texturée de la couche poreuse 4 permet d’obtenir une couche poreuse passivée en dehors des ouvertures de contact 23, 24.  FIG. 5 shows the rear face of a PERT-type cell based on a crystalline silicon substrate 1, a layer 7 forming a rear-face emitter and metal contacts 21, 22 located forming one or several electrodes in the rear face according to another variant of the first embodiment. In a similar manner to the device described in connection with FIG. 3, a device PERC in connection with FIG. 5 comprises a porous silicon layer 4 on the rear face of the layer 7 forming the back-side emitter. As described above, the porous layer 4 is spatially limited outside the contact openings 23, 24. In a similar manner to the device described in connection with FIG. 4, a thin passivation layer 5 conforms to at least a portion of the surface. nano-textured porous layer 4 provides a passivated porous layer outside the contact openings 23, 24.
Sur les figures 4 et 5, les contacts métalliques 21 , 22 localisés sont constitués des mêmes matériaux que ceux utilisés dans la fabrication de la couche métallique 2 décrite en lien avec les figures 2 et 3, en utilisant des techniques classiques de dépôt et/ou de gravure appliquées localement.  In FIGS. 4 and 5, the metal contacts 21, 22 located are made of the same materials as those used in the manufacture of the metal layer 2 described with reference to FIGS. 2 and 3, using conventional deposition techniques and / or etching applied locally.
A la différence des dispositifs décrits en lien avec les figures 2 et 3, dans le cas de contacts métalliques 21 , 22 localisés aux ouvertures de contact 23, 24, comme illustré sur les figures 4 et 5, la couche poreuse passivée n’est pas recouverte par une couche métallique mais reste en contact avec l’air ambiant.  Unlike the devices described in connection with FIGS. 2 and 3, in the case of metal contacts 21, 22 located at the contact openings 23, 24, as illustrated in FIGS. 4 and 5, the passivated porous layer is not covered by a metal layer but remains in contact with the ambient air.
Ainsi, dans le premier mode de réalisation, illustré en figure 2 à 5, le rayonnement transmis à travers la cellule incident sur l’empilement formé par la couche poreuse 4 de silicium et la couche mince de passivation 5 est réfléchi vers le substrat 1 de silicium pour y être absorbé. L’indice de réfraction équivalent de 1 ,4 de la couche poreuse 4 permet de réduire l’absorption parasite par la ou les électrodes métalliques en face arrière, notamment dans l’infrarouge. La couche poreuse 4 de silicium permet d’augmenter la réflexion interne vers le substrat 1. Dans le cas d’une cellule comportant une couche métallique 2 recouvrant la face arrière, cette couche métallique 2 permet d’augmenter encore plus la réflexion de lumière vers le substrat absorbeur. De plus, la couche poreuse passivée permet de réduire l’absorption parasite dans la couche métallique 2 notamment dans l’infrarouge. Le premier mode de réalisation permet d’augmenter la réflexion dans l’infrarouge, et, par conséquent, d’augmenter le courant de court-circuit (ou gain en Jsc). De plus, la couche poreuse 4 de silicium permet de limiter les ondes évanescentes excitant des plasmon-polaritons de surface dans la ou les électrodes métalliques en face arrière. La couche poreuse 4 de silicium permet ainsi d’améliorer le piégeage de la lumière, notamment infrarouge, dans le dispositif photovoltaïque. Ces améliorations sont particulièrement importantes dans une cellule tandem ou dans une cellule PV ayant un substrat de faible épaisseur. Thus, in the first embodiment, illustrated in FIGS. 2 to 5, the radiation transmitted through the incident cell on the stack formed by the porous layer 4 of silicon and the thin passivation layer 5 is reflected to the substrate 1 of silicon to be absorbed. The equivalent refractive index of 1, 4 of the porous layer 4 makes it possible to reduce the parasitic absorption by the metal electrode (s) on the rear face, in particular in the infrared. The porous silicon layer 4 makes it possible to increase the internal reflection towards the substrate 1. In the case of a cell comprising a metal layer 2 covering the rear face, this metal layer 2 makes it possible to increase the reflection of light towards the absorber substrate. In addition, the passivated porous layer makes it possible to reduce the parasitic absorption in the metal layer 2, in particular in the infrared. The first embodiment makes it possible to increase the reflection in the infrared and, consequently, to increase the short-circuit current (or gain in Jsc). In addition, the porous silicon layer 4 makes it possible to limit the evanescent waves exciting surface plasmon polaritons in the metal electrode or electrodes at the rear face. The porous silicon layer 4 thus makes it possible to improve the trapping of the light, in particular the infrared light, in the photovoltaic device. These improvements are particularly important in a tandem cell or in a PV cell having a thin substrate.
Les figures 6 à 9 illustrent un deuxième mode de réalisation, dans lequel le dispositif photovoltaïque ou photodétecteur de type émetteur passivé contact arrière, comporte en outre des micro-pyramides 8 en face arrière entre le substrat 1 et la couche poreuse 4 de silicium.  FIGS. 6 to 9 illustrate a second embodiment, in which the photovoltaic device or photodetector of the passivated emitter rear contact type, furthermore comprises micro-pyramids 8 on the rear face between the substrate 1 and the porous silicon layer 4.
Les figures 6 et 7 représentent la face arrière de dispositifs PERC dans lesquels l’électrode métallique face arrière comporte une couche métallique 2 recouvrant entièrement la face arrière, notamment pour une utilisation en monofacial.  FIGS. 6 and 7 represent the rear face of PERC devices in which the rear-facing metal electrode comprises a metal layer 2 completely covering the rear face, in particular for monofacial use.
Les figures 8 et 9 représentent la face arrière de dispositifs PERC dans lesquels l’électrode métallique face arrière comporte des contacts métalliques 21 , 22 localisés et limités aux ouvertures de contact 23, 24, notamment pour une utilisation en bifacial. Dans le cas d’une cellule de type PERC, PERL ou PERF illustrée sur la figure 6 ou 8, la face arrière du substrat 1 de silicium cristallin est préalablement texturée pour présenter des micro-pyramides 8 sur toute sa surface. Les micro-pyramides 8 ont en général des dimensions comprises entre 1 à 10 pm. Ainsi, dans le cas d’une cellule de type PERC, les ouvertures de contacts 23, 24 à l’interface entre les contacts métalliques 21 , 22 et le substrat 1 de silicium cristallin sont texturées par des micro-pyramides 8. Dans le cas d’une cellule de type PERL ou PERF, les ouvertures de contact 23, 24 à l’interface entre les contacts métalliques 21 , 22 et les zones 6 dopées localement sont texturées par des micro-pyramides 8. FIGS. 8 and 9 represent the rear face of PERC devices in which the rear-facing metal electrode comprises metal contacts 21, 22 located and limited to the contact openings 23, 24, in particular for use in bifacial form. In the case of a PERC, PERL or PERF type cell shown in FIG. 6 or 8, the rear face of the crystalline silicon substrate 1 is pre-textured to present micro-pyramids 8 over its entire surface. The micro-pyramids 8 generally have dimensions of between 1 to 10 μm. Thus, in the case of a PERC type cell, the openings of contacts 23, 24 at the interface between the metal contacts 21, 22 and the crystalline silicon substrate 1 are textured by micro-pyramids 8. In the case of a PERL or PERF type cell, the contact openings 23, 24 at the interface between the metal contacts 21, 22 and the zones 6 doped locally are textured by micro-pyramids 8.
Dans le cas d’une cellule de type PERT illustrée sur la figure 7 ou 9, la face arrière de la couche 7 dopée entièrement diffusée est préalablement texturée pour présenter des micro-pyramides 8 sur toute sa surface. Ainsi, les interfaces entre les contacts métalliques 21 , 22 et la couche 7 dopée sont texturées par des micro-pyramides 8. Dans le deuxième mode de réalisation, illustré en figures 6 à 9, la face arrière est doublement texturée en dehors des ouvertures de contact 23, 24. Plus précisément, la face arrière comporte ici une couche poreuse 4 de silicium en surface des facettes des micro-pyramides 8. Ainsi, la face arrière comporte des micro-pyramides à facettes nanotexturées 9. Autrement dit, la couche poreuse 4 est doublement texturée par les micro-pyramides et par les pores. La couche poreuse 4 de silicium de la cellule illustrée en figure 6, 7, 8 ou 9 présente par ailleurs, localement sur chaque facette de micro-pyramide, les mêmes caractéristiques et propriétés que la couche 4 de silicium de la cellule illustrée en figure 2 et peut être fabriquée suivant les mêmes techniques. De manière analogue au premier mode de réalisation, une couche mince de passivation 5 est déposée ou formée par croissance de manière conforme à au moins une partie de la surface doublement texturée de la couche poreuse 4 de silicium. De préférence, la couche mince de passivation 5 recouvre la couche poreuse 4 sur la face arrière de la cellule tout en laissant ouvertes les ouvertures des pores en face arrière de la cellule. La couche mince de passivation 5 comporte aussi des ouvertures de contact 23, 24 pour permettre un contact électrique direct entre, d’une part, l’électrode métallique face arrière et, d’autre part, le substrat 1 pour une cellule PERC, respectivement les zones dopées 6 localement diffusées pour une cellule PERL ou PERF, ou la couche dopée entièrement diffusée 7 pour une cellule PERT.  In the case of a PERT-type cell illustrated in FIG. 7 or 9, the rear face of the fully diffused doped layer 7 is previously textured to present micro-pyramids 8 over its entire surface. Thus, the interfaces between the metal contacts 21, 22 and the doped layer 7 are textured by micro-pyramids 8. In the second embodiment, illustrated in FIGS. 6 to 9, the rear face is doubly textured outside the openings of FIG. contact 23, 24. More specifically, the rear face here comprises a porous layer 4 of silicon on the surface of the facets of the micro-pyramids 8. Thus, the rear face comprises micro-pyramids faceted nanotextured 9. In other words, the porous layer 4 is doubly textured by micro-pyramids and pores. The porous silicon layer 4 of the cell illustrated in FIG. 6, 7, 8 or 9 moreover has, locally on each facet of micro-pyramid, the same characteristics and properties as the silicon layer 4 of the cell illustrated in FIG. and can be manufactured using the same techniques. In a similar manner to the first embodiment, a thin passivation layer 5 is deposited or grown in accordance with at least a portion of the doubly textured surface of the porous silicon layer 4. Preferably, the thin passivation layer 5 covers the porous layer 4 on the rear face of the cell while leaving open the pore openings on the rear face of the cell. The thin passivation layer 5 also has contact openings 23, 24 to allow direct electrical contact between, on the one hand, the rear-facing metal electrode and, on the other hand, the substrate 1 for a PERC cell, respectively the locally diffused doped zones 6 for a PERL or PERF cell, or the fully diffused doped layer 7 for a PERT cell.
Dans un dispositif photovoltaïque ou photodétecteur de type émetteur passivé contact arrière décrit en lien avec la figure 6 ou 7, la couche métallique 2 recouvre non seulement les ouvertures de contact 23, 24 mais aussi la couche poreuse passivée et doublement texturée. Ainsi, la couche poreuse passivée et doublement texturée combinée à la couche métallique 2 réfléchissante contribuent à l’accroissement de la réflexion de lumière non absorbée vers le substrat absorbeur. De plus, la couche poreuse passivée doublement texturée réduit les pertes par couplage de plasmons-polaritons dans la couche métallique 2. In a photovoltaic device or photodetector of the passivated rear-contact emitter type described in connection with FIG. 6 or 7, the metal layer 2 covers not only the contact openings 23, 24 but also the passivated and doubly textured porous layer. Thus, the porous layer passivated and Doubly textured combined with the reflective metal layer 2 contribute to the increase of the unabsorbed light reflection towards the absorber substrate. In addition, the doubly textured passivated porous layer reduces the losses by coupling plasmons-polaritons in the metal layer 2.
Dans un dispositif photovoltaïque ou photodétecteur de type émetteur passivé contact arrière décrit en lien avec la figure 8 ou 9, l’électrode métallique face arrière comporte des contacts métalliques 21 , 22 qui sont généralement limités aux ouvertures de contact 23, 24. Dans ces variantes du deuxième mode de réalisation, la couche poreuse passivée et doublement texturée est en contact avec l’air ambiant en face arrière. L’indice de réfraction équivalent de la couche poreuse 4 étant d’environ 1 ,4 ± 0.2 dans l’infrarouge, la couche poreuse passivée et doublement texturée permet néanmoins d’augmenter la réflexion de lumière non absorbée vers le substrat absorbeur.  In a photovoltaic device or photodetector of the rear-passivated emitter type described in connection with FIG. 8 or 9, the rear-facing metal electrode comprises metal contacts 21, 22 which are generally limited to the contact openings 23, 24. In these variants of the second embodiment, the passivated and doubly textured porous layer is in contact with the ambient air on the rear face. Since the equivalent refractive index of the porous layer 4 is about 1.4 ± 0.2 in the infrared, the passivated and doubly textured porous layer nevertheless makes it possible to increase the reflection of unabsorbed light towards the absorber substrate.
Dans le deuxième mode de réalisation, illustré sur les figures 6, 7, 8 et 9, la combinaison des micro-pyramides 8, de la couche poreuse 4 et de la couche de passivation 5 en face arrière du dispositif permet d’augmenter encore la réflexion interne vers le substrat 1 , notamment dans l’infrarouge. Dans le cas d’une structure comportant une électrode métallique recouvrant la couche poreuse passivée et doublement texturée en face arrière, cette structure permet en outre de réduire l’absorption parasite dans la couche métallique 2, tout en limitant les ondes évanescentes susceptibles de générer des plasmon-polaritons de surface dans la couche métallique 2. L’augmentation de réflexion de lumière non absorbée vers le substrat 1 et la réduction de l’absorption parasite dans la couche métallique contribuent à un gain en courant de court-circuit (Jsc).  In the second embodiment, illustrated in FIGS. 6, 7, 8 and 9, the combination of the micro-pyramids 8, the porous layer 4 and the passivation layer 5 on the rear face of the device makes it possible to further increase the internal reflection to the substrate 1, especially in the infrared. In the case of a structure comprising a metal electrode covering the passivated and doubly textured porous layer on the rear face, this structure also makes it possible to reduce the parasitic absorption in the metal layer 2, while limiting the evanescent waves that can generate surface plasmon-polaritons in the metal layer 2. The increase of unabsorbed light reflection towards the substrate 1 and the reduction of the parasitic absorption in the metal layer contribute to a short-circuit current gain (Jsc).
Les figures 10 à 13 illustrent un troisième mode de réalisation, dans lequel le dispositif photovoltaïque ou photodétecteur de type émetteur passivé contact arrière, comporte une couche poreuse 4 ayant une structure de cristal photonique et une couche de passivation 5.  FIGS. 10 to 13 illustrate a third embodiment, in which the photovoltaic device or photodetector of the passivated emitter rear contact type comprises a porous layer 4 having a photonic crystal structure and a passivation layer 5.
Les figures 10 et 11 représentent la face arrière de dispositifs PERC dans lesquels l’électrode métallique face arrière comporte une couche métallique 2 recouvrant entièrement la face arrière, notamment pour une utilisation en monofacial.  Figures 10 and 11 show the rear face of PERC devices in which the metal electrode rear face comprises a metal layer 2 completely covering the rear face, in particular for use in monofacial.
Sur la figure 10, on a représenté la face arrière d’un dispositif de type PERC dans lequel la couche métallique 2 est en contact avec le substrat 1 de silicium au travers des ouvertures de contact 23, 24. FIG. 10 shows the rear face of a device of the PERC type in which the metal layer 2 is in contact with the substrate 1 of silicon through the contact openings 23, 24.
Sur la figure 11 , on a représenté la face arrière d’un dispositif de type PERT dans lequel la couche métallique 2 est en contact via au les ouvertures de contact 23, 24 avec la couche 7 de silicium dopé formée par diffusion.  In FIG. 11, the rear face of a PERT-type device is shown in which the metal layer 2 is in contact via the contact openings 23, 24 with the doped doped silicon layer 7.
Les figures 12 et 13 représentent la face arrière de dispositifs PERC dans lesquels l’électrode métallique face arrière comporte des contacts métalliques 21 , 22 localisés et limités aux ouvertures de contact 23, 24, notamment pour une utilisation en bifacial.  FIGS. 12 and 13 show the rear face of PERC devices in which the rear-facing metal electrode comprises metal contacts 21, 22 located and limited to the contact openings 23, 24, in particular for use in bifacial form.
Sur la figure 12, on a représenté la face arrière d’un dispositif de type PERC dans lequel les contacts métalliques 21 , 22 localisés sont en contact avec le substrat 1 de silicium au travers des ouvertures de contact 23, 24.  FIG. 12 shows the rear face of a device of the PERC type in which the metal contacts 21, 22 located are in contact with the silicon substrate 1 through the contact openings 23, 24.
Sur la figure 13, on a représenté la face arrière d’un dispositif de type PERT dans lequel les contacts métalliques 21 , 22 localisés sont en contact via au les ouvertures de contact 23, 24 avec la couche 7 de silicium dopé formée par diffusion.  FIG. 13 shows the rear face of a PERT type device in which the metal contacts 21, 22 located are in contact via the contact openings 23, 24 with the layer 7 of doped doped silicon formed by diffusion.
Dans le troisième mode de réalisation, la couche poreuse 4 de silicium a une structure comprenant une première période spatiale, notée Li, et, de préférence, une deuxième période spatiale, notée LG. In the third embodiment, the porous silicon layer 4 has a structure comprising a first spatial period, denoted Li, and, preferably, a second spatial period, denoted by L G.
La figure 14 représente une vue en coupe d’un détail de la structure de la couche poreuse des figures 10, 11 , 12 ou 13. La couche poreuse 4 de silicium comporte des pores 41 , 42, 43, ...4n formant des ouvertures 51 , 52, 53, ...5n en face arrière de la cellule. Plus précisément, la couche poreuse 4 comporte au moins un bloc de n pores 41 ,..., 4n, où n est un nombre entier naturel compris entre 10 et 30. Les pores 41 ,..., 4n d’un même bloc sont espacés de la première période spatiale Li suivant la direction X. On note h la profondeur des pores suivant la direction Z et L2 l’ouverture des pores suivant la direction X. La première période spatiale Li est inférieure à 1000 nm et de préférence située dans une gamme comprise entre 20 nm et 500 nm. La profondeur (h) des pores est comprise entre 100 nm et 1000 nm. La dimension transverse ( L2 ) des ouvertures de pores est comprise entre 20 nm et 1000 nm. La géométrie des pores dépend du procédé de fabrication. Les pores 41 ,..., 4n peuvent être de section sphérique, carrée, rectangulaire, en forme de tranchée ou de maille (mesh). De façon avantageuse, le bloc de pores est répété périodiquement avec un espace entre blocs noté LG. Selon une variante, l’espace entre blocs, LG, est égal à Li. Selon une autre variante, la distance entre blocs, LG, est située dans une gamme comprise entre 900 nm et 1 ,5 pm. Selon encore une autre variante, le bloc de pores est répété avec une distance aléatoire entre blocs. Ainsi, dans le troisième mode de réalisation, la couche poreuse 4 de silicium forme en face arrière une structure à cristal photonique particulièrement bien adaptée pour réfléchir le rayonnement dans le proche infrarouge. La structure à cristal photonique s’étend en deux dimensions suivant les directions X et Y en dehors des ouvertures de contact 23, 24. FIG. 14 represents a sectional view of a detail of the structure of the porous layer of FIGS. 10, 11, 12 or 13. The porous silicon layer 4 comprises pores 41, 42, 43,. openings 51, 52, 53, ... 5n on the rear face of the cell. More specifically, the porous layer 4 comprises at least one block of n pores 41,..., 4n, where n is a natural integer between 10 and 30. The pores 41, ..., 4n of the same block are spaced from the first spatial period Li in the X direction. The pore depth in the Z and L 2 direction is denoted by the opening of the pores in the X direction. The first spatial period Li is less than 1000 nm and preferably in a range between 20 nm and 500 nm. The depth (h) of the pores is between 100 nm and 1000 nm. The transverse dimension (L 2 ) of the pore openings is between 20 nm and 1000 nm. The geometry of the pores depends on the manufacturing process. The pores 41,..., 4n may be spherical, square, rectangular, trench-shaped or mesh-shaped. Advantageously, the pore block is repeated periodically with a gap between blocks noted L G. According to one variant, the space between blocks, L G , is equal to Li . according to another variant, the distance between blocks, L G , is in a range between 900 nm and 1, 5 pm. According to yet another variant, the pore block is repeated with a random distance between blocks. Thus, in the third embodiment, the porous silicon layer 4 forms on the rear face a photonic crystal structure that is particularly well suited to reflect the radiation in the near infrared. The photonic crystal structure extends in two dimensions along the X and Y directions outside the contact openings 23, 24.
De manière analogue aux premier et deuxième modes de réalisation, une couche mince de passivation 5 est déposée ou formée par croissance de manière conforme à la surface texturée de la couche poreuse 4 de silicium. De préférence, la couche mince de passivation 5 recouvre la couche poreuse 4 à structure de cristal photonique sur la face arrière de la cellule tout en laissant ouvertes les ouvertures des pores en face arrière de la cellule. De façon avantageuse, la couche mince de passivation 5 est formée de manière à s’étendre sur toute la face arrière de la cellule. Dans le cas d’une cellule PERC, respectivement PERL ou PERT, les ouvertures de contact 23, 24 sont ensuite réalisées localement à travers la couche mince de passivation 5 pour permettre un meilleur contact entre, d’une part, le substrat 1 , respectivement les zones dopées 6 localement ou la couche dopée 7 entièrement diffusée et, d’autre part, la couche métallique 2 ou les contacts métalliques 21 , 22 localisés et favoriser une meilleure extraction des porteurs de charge. Les ouvertures de contact 23, 24 ont une dimension comprise entre 500 pm et 2 mm suivant une direction X parallèle à la surface du substrat 1 de silicium. La structure à cristal photonique du troisième mode de réalisation agit comme un cristal photonique pour augmenter la réflexion de rayonnement infrarouge vers la partie active de la cellule photovoltaïque.  In a similar manner to the first and second embodiments, a thin passivation layer 5 is deposited or grown in accordance with the textured surface of the porous silicon layer 4. Preferably, the thin passivation layer 5 covers the porous layer 4 with a photonic crystal structure on the rear face of the cell while leaving open the pore openings on the rear face of the cell. Advantageously, the thin passivation layer 5 is formed so as to extend over the entire rear face of the cell. In the case of a PERC cell, respectively PERL or PERT, the contact openings 23, 24 are then made locally through the thin passivation layer 5 to allow better contact between, on the one hand, the substrate 1, respectively the locally doped zones 6 or the fully diffused doped layer 7 and, on the other hand, the metal layer 2 or the metal contacts 21, 22 located and promote better extraction of the charge carriers. The contact openings 23, 24 have a dimension of between 500 μm and 2 mm in a direction X parallel to the surface of the silicon substrate 1. The photonic crystal structure of the third embodiment acts as a photonic crystal to increase infrared radiation reflection to the active portion of the photovoltaic cell.
Dans un dispositif photovoltaïque ou photodétecteur de type émetteur passivé contact arrière décrit en lien avec les figures 10 ou 11 , la couche métallique 2 recouvre non seulement les ouvertures de contact 23, 24 mais aussi la couche poreuse passivée ayant une structure de cristal photonique. Ainsi, la couche poreuse passivée à structure de cristal photonique combinée à la couche métallique 2 réfléchissante contribue fortement à l’accroissement de la réflexion de lumière non absorbée vers le substrat absorbeur. De plus, la couche poreuse passivée à structure de cristal photonique réduit les pertes par couplage de plasmons-polaritons dans la couche métallique 2. In a rear-passively passivated transmitter-type photovoltaic device or photodetector described in connection with FIGS. 10 or 11, the metal layer 2 covers not only the contact openings 23, 24 but also the passivated porous layer having a photonic crystal structure. Thus, the passivated porous layer with a photonic crystal structure combined with the reflective metal layer 2 contributes greatly to increasing the unabsorbed light reflection towards the absorber substrate. In addition, the passivated porous layer with a photonic crystal structure reduces coupling losses by plasmons-polaritons in the metal layer 2.
Dans un dispositif photovoltaïque ou photodétecteur de type émetteur passivé contact arrière décrit en lien avec la figure 12 ou 13, l’électrode métallique face arrière comporte des contacts métalliques 21 , 22 qui sont généralement limités aux ouvertures de contact 23, 24. Dans ces variantes du troisième mode de réalisation, la couche poreuse passivée à structure de cristal photonique est en contact avec l’air ambiant en face arrière. La structure de cristal photonique de la couche poreuse 4 permet néanmoins d’augmenter la réflexion de lumière non absorbée vers le substrat absorbeur.  In a photovoltaic device or photodetector of the passive rear-pass emitter type described in connection with FIG. 12 or 13, the rear-facing metal electrode comprises metal contacts 21, 22 which are generally limited to the contact openings 23, 24. In these variants of the third embodiment, the passivated porous layer with a photonic crystal structure is in contact with the ambient air on the rear face. The photonic crystal structure of the porous layer 4 nevertheless makes it possible to increase the reflection of unabsorbed light towards the absorber substrate.
Selon une variante combinant le deuxième et le troisième mode de réalisation, la couche poreuse à structure de cristal photonique est formée sur une surface texturée par des micro-pyramides.  According to a variant combining the second and third embodiments, the porous layer with a photonic crystal structure is formed on a textured surface by micro-pyramids.
Dans les différents modes de réalisation décrits ci-dessus, l’architecture de dispositif photovoltaïque ou photodétecteur de type émetteur passivé contact arrière comportant une couche poreuse en face arrière permet d’augmenter la réflexion de lumière non absorbée, en particulier infrarouge, vers le substrat absorbeur, tout en réduisant l’absorption parasite de plasmon-polaritons de surface à l’interface avec l’électrode métallique en face arrière du dispositif. Ces améliorations permettent d’augmenter le courant de court-circuit (d’où un gain en Jsc).  In the different embodiments described above, the photovoltaic device architecture or photodetector of the passivated emitter type rear contact having a porous layer on the rear face makes it possible to increase the reflection of unabsorbed light, in particular infrared, towards the substrate. absorber, while reducing the parasitic absorption of surface plasmon-polaritons at the interface with the metal electrode on the back of the device. These improvements increase the short-circuit current (hence a gain in Jsc).
Cette architecture de cellule solaire s’applique à une cellule solaire mono-jonction ou à la face arrière d’une cellule solaire multi-jonction, et en particulier à une cellule tandem. On propose ainsi une cellule tandem comportant une première jonction en face avant et une seconde jonction en face arrière texturée selon l’un quelconque des modes de réalisation décrits ci-dessus. Ainsi, la seconde jonction en face arrière est particulièrement bien adaptée pour absorber le rayonnement infrarouge. De préférence, la première jonction en face avant de la cellule tandem est adaptée pour absorber le rayonnement bleu et/ou ultraviolet (UV). Ainsi, l’efficacité de la cellule tandem s’en trouve accrue.  This solar cell architecture is applied to a single-junction solar cell or to the rear face of a multi-junction solar cell, and in particular to a tandem cell. A tandem cell is thus proposed comprising a first junction on the front face and a second junction on the backside textured according to any one of the embodiments described above. Thus, the second junction rear face is particularly well suited to absorb infrared radiation. Preferably, the first junction on the front face of the tandem cell is adapted to absorb blue and / or ultraviolet (UV) radiation. Thus, the efficiency of the tandem cell is increased.
Selon une variante de l’un quelconque des modes de réalisation décrits ci-dessus, le dispositif photovoltaïque ou photodétecteur de type émetteur passivé contact arrière comporte en outre une autre texturation de surface en face avant. Toutefois, la géométrie de la texturation de surface en face avant est différente de celle de la texturation de surface en face arrière. La texturation de la face avant est de préférence une texturation de forme conique de 50 nm à 1 pm de haut, ou en forme de pyramides de dimensions comprises entre 1 pm et environ 10 pm ou de colonnes ou encore une texturation adaptée pour former une surface de silicium noir (black Silicon ou b-Si). De façon avantageuse, la texturation de la face avant est adaptée pour limiter le coefficient de réflexion et/ou pour former une surface anti-réfléchissante. Selon une variante, la texturation de la face avant comprend la formation d’une autre couche poreuse de silicium dopé en face avant, l’autre couche poreuse de silicium dopé ayant une autre surface texturée, l’autre surface texturée formant d’autres pores ayant une première période spatiale L1 comprise entre environ 20 nm et 2000 nm, une profondeur h comprise entre 100 nm et 2000 nm, lesdits autres pores formant d’autres ouvertures orientées vers la face avant du dispositif. De préférence, l’autre couche poreuse de silicium recouvre toute la surface en face avant du dispositif. According to a variant of any one of the embodiments described above, the photovoltaic device or photodetector of the passivated emitter contact back type further comprises another surface texturing front face. However, the geometry of the surface texturing on the front face is different from that of the surface texturing on the rear face. The texturing of the front face is preferably a texturing of conical shape from 50 nm to 1 μm high, or in the form of pyramids of dimensions of between 1 μm and about 10 μm or of columns or a texturing adapted to form a black silicon surface (black silicon or b-Si). Advantageously, the texturing of the front face is adapted to limit the reflection coefficient and / or to form an anti-reflective surface. According to one variant, the texturing of the front face comprises the formation of another porous silicon layer doped on the front face, the other porous layer of doped silicon having another textured surface, the other textured surface forming other pores having a first spatial period L1 between about 20 nm and 2000 nm, a depth h between 100 nm and 2000 nm, said other pores forming other openings facing the front face of the device. Preferably, the other porous silicon layer covers the entire surface on the front face of the device.
L’invention concerne aussi un panneau photovoltaïque comprenant une pluralité de cellules photovoltaïques reliées électriquement entre elles, la pluralité de cellules photovoltaïques comprenant au moins une cellule photovoltaïque selon l’un quelconque des modes de réalisation décrits ci-dessus. Un tel panneau photovoltaïque permet d’offrir un meilleur rendement sans surcoût notable.  The invention also relates to a photovoltaic panel comprising a plurality of photovoltaic cells electrically connected to each other, the plurality of photovoltaic cells comprising at least one photovoltaic cell according to any one of the embodiments described above. Such a photovoltaic panel can offer a better performance without significant additional cost.
Procédé  Process
La couche poreuse 4 de silicium peut être fabriquée par différents procédés.  The porous silicon layer 4 can be made by various methods.
De préférence, la surface arrière de la cellule photovoltaïque est préalablement gravée pour enlever les défauts de sciage et/ou polie.  Preferably, the rear surface of the photovoltaic cell is previously etched to remove sawing and / or polished defects.
Le substrat 1 de silicium cristallin est généralement formé d’une plaque de silicium monocristallin ou multi-cristallin.  The crystalline silicon substrate 1 is generally formed of a monocrystalline or multi-crystalline silicon wafer.
Dans le cas d’une cellule de type PERC, la face arrière 12 est initialement celle du substrat 1 de silicium cristallin.  In the case of a PERC type cell, the rear face 12 is initially that of the crystalline silicon substrate 1.
De façon optionnelle, on texture la face arrière du substrat 1 de silicium cristallin pour former des micro-pyramides 8, selon le deuxième mode de réalisation.  Optionally, the rear face of the crystalline silicon substrate 1 is textured to form micro-pyramids 8, according to the second embodiment.
Dans le cas d’une cellule de type PERL ou PERF, on forme des zones 6 dopées localement par diffusion locale de dopant dans le substrat 1 de silicium, à travers la face arrière éventuellement texturé par des micro-pyramides 8.  In the case of a PERL or PERF type cell, locally doped zones 6 are formed by local dopant diffusion in the silicon substrate 1, through the rear face optionally textured by micro-pyramids 8.
Dans le cas d’une cellule de type PERT, on forme la couche 7 dopée entièrement diffusée par diffusion de dopant sur toute la face arrière du substrat 1 de silicium, éventuellement texturé par des micro-pyramides. In the case of a PERT-type cell, the doped layer 7 is formed completely diffused by dopant diffusion on the entire back face of the silicon substrate 1, optionally textured by micro-pyramids.
On forme ensuite la couche poreuse 4 de silicium. La figure 15 illustre un premier exemple de procédé basé sur une gravure plasma. A titre d’exemple on utilise un plasma à ions réactifs (RIE). De préférence, on utilise un réacteur plasma à couplage inductif pour générer le plasma à ions réactifs (ICP-RIE). Les conditions opérationnelles du plasma de gravure sont ajustées pour obtenir une nano-texturation de la surface conduisant à la formation de pores ouverts en face arrière du substrat, optionnellement texturé par des micro-pyramides. Dans un exemple, on utilise comme précurseurs gazeux un mélange d’hexafluorure de soufre (SF6) et de dioxygène (O2). Par exemple, on utilise un système gravure RIE, basée sur un mélange SF6/O2 avec un ratio de 1.3 et un flux total de 140 sccm à une pression de 30 mTorr et une puissance de gravure de 55 W pendant 30 min. Ce procédé permet de nano-texturer la face arrière 12 de la cellule pour former une couche poreuse 4 de silicium. La durée et les conditions du plasma 13 sont sélectionnées pour que la porosité de la couche soit comprise entre 25% et 75%. La face avant 11 de la cellule est généralement protégée vis-à-vis du plasma. Selon une variante, on applique une autre étape de gravure par plasma à la face avant 11 de la cellule pour texturer la face avant. The porous layer 4 of silicon is then formed. Figure 15 illustrates a first example of a method based on plasma etching. For example, a reactive ion plasma (RIE) is used. Preferably, an inductively coupled plasma reactor is used to generate the reactive ion plasma (ICP-RIE). The operating conditions of the etching plasma are adjusted to obtain a nano-texturing of the surface leading to the formation of open pores on the rear face of the substrate, optionally textured by micro-pyramids. In one example, a mixture of sulfur hexafluoride (SF 6 ) and oxygen (O 2) is used as gaseous precursors. For example, a RIE etching system based on an SF6 / O2 mixture with a ratio of 1.3 and a total flow of 140 sccm at a pressure of 30 mTorr and an etching power of 55 W for 30 min is used. This method nano-textures the rear face 12 of the cell to form a porous layer 4 of silicon. The duration and the conditions of the plasma 13 are selected so that the porosity of the layer is between 25% and 75%. The front face 11 of the cell is generally protected vis-à-vis the plasma. According to one variant, another plasma etching step is applied to the front face 11 of the cell to texturize the front face.
Dans une variante, on dépose un masque pour protéger les zones destinées à former les ouvertures de contact 23, 24 vis-à-vis du plasma de gravure. Ce masque est ensuite retiré pour former les ouvertures de contact 23, 24 en face arrière de la cellule. Dans une autre variante, la gravure plasma est appliquée sur toute la face arrière 12 de la cellule et on applique une étape supplémentaire de gravure locale pour enlever la couche poreuse localement former les ouvertures de contact 23, 24.  In a variant, a mask is deposited to protect the areas intended to form the contact openings 23, 24 vis-à-vis the etching plasma. This mask is then removed to form the contact openings 23, 24 on the rear face of the cell. In another variant, the plasma etching is applied to the entire rear face 12 of the cell and an additional local etching step is applied to remove the porous layer locally to form the contact openings 23, 24.
Ainsi, la couche métallique 2 ou les contacts métalliques 21 , 22 sont en contact électrique direct via les ouvertures de contact 23, 24 avec le substrat 1 de silicium dans une cellule PERC, ou respectivement, avec les zones 6 dopées localement dans une cellule PERL ou PERF, ou respectivement, avec la couche 7 dopée entièrement diffusée dans une cellule PERT.  Thus, the metal layer 2 or the metal contacts 21, 22 are in direct electrical contact via the contact openings 23, 24 with the silicon substrate 1 in a PERC cell, or, respectively, with the zones 6 doped locally in a PERL cell. or PERF, or respectively, with the doped layer 7 fully diffused in a PERT cell.
Lorsque le plasma 13 est appliqué sans masque à la face arrière de la cellule, le procédé basé sur une gravure plasma est adapté pour le premier mode de réalisation de l’invention. De façon optionnelle, avant les étapes de dopage et de gravure par plasma, la face arrière de la cellule est préalablement texturée en forme de micro- pyramides. L’étape de texturation en forme de micro-pyramides est par exemple réalisée en phase liquide dans un mélange classique KOH/IPA/eau ou KOH/eau/additif. Le plasma de gravure est ensuite appliqué à la face arrière micro-texturée en forme de micro-pyramides, pour former en surface des micro- pyramides 8 la couche poreuse 4 de silicium selon le deuxième mode de réalisation. When the plasma 13 is applied without a mask to the rear face of the cell, the method based on plasma etching is adapted for the first embodiment of the invention. Optionally, before the doping and plasma etching steps, the rear face of the cell is pre-textured in the form of micro-pyramids. The texturing step in the form of micro-pyramids is for example carried out in the liquid phase in a conventional KOH / IPA / water or KOH / water / additive mixture. The etching plasma is then applied to the micro-textured micro-pyramid-shaped back surface, to form on the surface of the micro-pyramids 8 the porous silicon layer 4 according to the second embodiment.
Selon une autre option, avant l’étape de gravure par plasma, on dépose un masque sur la face arrière de la cellule, le masque ayant un motif correspondant au négatif du motif souhaité. L’application du procédé de gravure sélectif permet d’obtenir une couche poreuse selon le troisième mode de réalisation.  According to another option, before the plasma etching step, a mask is deposited on the rear face of the cell, the mask having a pattern corresponding to the negative of the desired pattern. The application of the selective etching method makes it possible to obtain a porous layer according to the third embodiment.
La figure 16 illustre un autre exemple de procédé basé sur une technique de gravure chimique assistée par métal (Métal Assisted Chemical Etching ou MACE). Le procédé de la figure 16 est particulièrement adapté pour la formation d’une couche poreuse ayant une structure à cristal photonique selon le troisième mode de réalisation de l’invention. On dépose un film d’un métal noble 14 par pulvérisation à travers un masque sur la face arrière d’un substrat de silicium. De préférence, le métal noble 14 est choisi parmi de l’or (Au) et de l’argent (Ag). Le masque est configuré pour former le motif souhaité comprenant un bloc de n pores espacés de la première période L1 et, le cas échéant, un espace entre blocs, Lg. Puis on dispose le substrat de silicium dans une cuve 10 comprenant une solution 16 composée de 50% de fluorure d’hydrogène (HF) et de 50 % de dioxygène (H2O2) de manière à graver la face arrière 12 de la cellule photovoltaïque. La gravure agit sélectivement dans les zones où est déposé le film d’argent 14, avec une sélectivité de 10 :1. On grave ainsi le silicium sur une profondeur h d’environ 350 nm de manière à former des pores 41. Dans un bloc de n=10 pores, l’ouverture L2 d’un port 41 est d’environ 60 nm, la distance entre pores adjacents (i.e. la première période spatiale) L1 est d’environ 175 nm, et la distance entre blocs de pores, LG est d’environ 1100 nm. On obtient ainsi une couche poreuse 4 de silicium ayant une porosité de 60 %. Figure 16 illustrates another example of a method based on a metal assisted chemical etching (MACE) technique. The process of FIG. 16 is particularly suitable for forming a porous layer having a photonic crystal structure according to the third embodiment of the invention. A noble metal film 14 is deposited by sputtering through a mask on the back side of a silicon substrate. Preferably, the noble metal 14 is selected from gold (Au) and silver (Ag). The mask is configured to form the desired pattern comprising a block of n pores spaced from the first period L1 and, where appropriate, a gap between blocks, L g . Then the silicon substrate is placed in a tank 10 comprising a solution 16 composed of 50% hydrogen fluoride (HF) and 50% oxygen (H2O2) so as to etch the rear face 12 of the photovoltaic cell. The etching acts selectively in the areas where the silver film 14 is deposited, with a selectivity of 10: 1. The silicon is etched to a depth h of about 350 nm so as to form pores 41. In a block of n = 10 pores, the opening L 2 of a port 41 is about 60 nm, the distance between adjacent pores (ie the first spatial period) L1 is about 175 nm, and the distance between pore blocks, L G is about 1100 nm. A porous silicon layer 4 having a porosity of 60% is thus obtained.
Le procédé MACE permet de fabriquer une couche poreuse 4 ayant une structure à cristal photonique peu coûteuse. Le procédé MACE est aussi adapté pour la formation d’une couche poreuse selon le premier et/ou le deuxième mode de réalisation. Dans ce cas, on dépose directement des particules de métal noble 14 sur la face arrière d’un substrat de silicium, sans utiliser de masque à motif périodique. The MACE process makes it possible to manufacture a porous layer 4 having an inexpensive photonic crystal structure. The MACE process is also suitable for forming a porous layer according to the first and / or second embodiment. In this case, noble metal particles 14 are directly deposited on the rear face of a silicon substrate without using a periodically patterned mask.
L’étape de gravure MACE permet de laisser au fond des pores de silicium, le métal noble 14 qui sert de catalyseur à la réaction de dissolution du silicium. De façon avantageuse, la technique MACE utilise un métal noble, par exemple de l’argent, qui peut ensuite servir de point de nucléation pour un contact électrique. Dans une variante, on dépose ensuite du nickel conforme à la géométrie interne d’un pore.  The MACE etching step makes it possible to leave, at the bottom of the pores of silicon, the noble metal 14 which serves as a catalyst for the dissolution reaction of the silicon. Advantageously, the MACE technique uses a noble metal, for example silver, which can then serve as a nucleation point for an electrical contact. In a variant, nickel is then deposited according to the internal geometry of a pore.
Selon une variante l’étape de gravure MACE est appliquée simultanément à la face arrière et la face avant du dispositif photovoltaïque, avec un motif adapté pour former une couche poreuse en face arrière telle que décrite ci-dessus, et un autre motif en face avant. A cet effet, on pulvérise un autre métal sur la face avant avec un motif périodique ayant une période spatiale L1 comprise entre 20 nm et 1000 nm sur toute la face avant. L’autre métal est sélectionné de manière à ce que la profondeur h des pores en face avant soit comprise entre 100 nm et 2000 nm. On fabrique ainsi dans la même cuve 10 et avec la même solution 16, une couche poreuse en face arrière réfléchissante dans l’infrarouge et une autre couche poreuse formant une couche antireflet, en particulier dans le domaine UV-visible, en face avant du dispositif photovoltaïque.  According to a variant, the MACE etching step is applied simultaneously to the rear face and the front face of the photovoltaic device, with a pattern adapted to form a porous layer on the rear face as described above, and another pattern on the front face. . For this purpose, another metal is sprayed on the front face with a periodic pattern having a spatial period L1 of between 20 nm and 1000 nm on the entire front face. The other metal is selected so that the depth h of the front pores is between 100 nm and 2000 nm. Thus, in the same vessel 10 and with the same solution 16, a porous layer is made on the infrared reflecting back face and another porous layer forming an antireflection layer, in particular in the UV-visible range, on the front face of the device. photovoltaic.
De préférence, l’étape de gravure MACE est suivie d’un nettoyage comprenant une étape de rinçage dans de l’eau déionisée, une étape de lavage dans un mélange de fluorure d’hydrogène (HF) et de chlorure d’hydrogène (HCl), une autre étape de rinçage et une étape de séchage. Les plaques de silicium ainsi gravées puis nettoyées suivent ensuite un procédé de traitement de passivation de la face arrière de la cellule. Le procédé de passivation de surface comporte par exemple une étape de dépôt d’une couche d’alumine (AI2O3) par un dépôt de couche atomique (ALD) comprenant 60 cycles à 200 °C suivi d’une étape de dépôt PECVD d’une couche de nitrure de silicium (SiNx) ayant une épaisseur d’environ 110 nm en face arrière de la cellule. Preferably, the MACE etching step is followed by a cleaning comprising a rinsing step in deionized water, a washing step in a mixture of hydrogen fluoride (HF) and hydrogen chloride (HCl) ), another rinsing step and a drying step. The silicon plates thus etched and cleaned then follow a passivation treatment process of the rear face of the cell. The surface passivation process comprises, for example, a step of deposition of an alumina layer (Al2O3) by an atomic layer deposition (ALD) comprising 60 cycles at 200 ° C. followed by a PECVD deposition step of silicon nitride layer (SiN x ) having a thickness of about 110 nm on the rear face of the cell.
Une autre étape de lavage dans du fluorure d’hydrogène (HF) et une étape de rinçage sont appliquées à la face avant, suivies d’une étape de dépôt PECVD d’une couche de nitrure de silicium (SiNx) en face avant de la cellule. Ainsi, la cellule photovoltaïque est entièrement passivée, en face avant et en face arrière. Another washing step in hydrogen fluoride (HF) and a rinsing step are applied to the front face, followed by a PECVD deposition step of a silicon nitride (SiN x ) layer on the front face of the the cell. Thus, the photovoltaic cell is fully passivated, front and rear face.
Lorsque la cellule est entièrement passivée, on utilise un laser picoseconde (ps), par exemple à 532 nm ou 355 nm, pour générer des ouvertures de contact 23, 24 à travers la couche de passivation en face arrière. Dans un exemple, le laser ps génère des ouvertures de contact 23, 24 de 20 pm de dimension avec une période de répétition de 1 mm suivant la direction X formant des ouvertures de contact 23, 24 correspondant à 2% de la surface arrière. On génère ensuite les contacts métalliques par impression et séchage d’une pâte d’argent sur la face avant puis par impression d’une pâte d’argent sans fritte de verre sur la face arrière. Enfin, un procédé de cocuisson est appliqué dans un four à bande transporteuse à une température de 750 °C.  When the cell is fully passivated, a picosecond (ps) laser, for example at 532 nm or 355 nm, is used to generate contact openings 23, 24 through the backside passivation layer. In one example, the laser ps generates contact openings 23, 24 of 20 μm in size with a repetition period of 1 mm in the X direction forming contact openings 23, 24 corresponding to 2% of the rear surface. The metal contacts are then generated by printing and drying a silver paste on the front face and then printing a silver paste without glass frit on the rear face. Finally, a coking process is applied in a conveyor belt oven at a temperature of 750 ° C.
La figure 17 illustre un autre exemple de procédé de formation d’une couche poreuse de silicium texturée basé sur une électrolyse. Un contact par pâte d’aluminium 19 est appliqué sur la face avant d’une cellule PV. La cellule PV est disposée dans une cuve 10 comprenant une solution électrolytique 17. La solution électrolytique 17 est par exemple composée de fluorure d’hydrogène (HF). Un générateur de courant 18 est relié au contact d’aluminium 19 et à la solution électrolytique 17 de manière à graver la face arrière de la cellule PV pour former la couche poreuse 4 de silicium.  Figure 17 illustrates another example of a method of forming a porous layer of textured silicon based on electrolysis. An aluminum paste contact 19 is applied to the front face of a PV cell. The PV cell is disposed in a tank 10 comprising an electrolytic solution 17. The electrolytic solution 17 is for example composed of hydrogen fluoride (HF). A current generator 18 is connected to the aluminum contact 19 and to the electrolytic solution 17 so as to etch the rear face of the PV cell to form the porous silicon layer 4.
Le procédé par électrolyse s’applique particulièrement bien sur une surface lisse correspondant au premier mode de réalisation.  The electrolysis method is particularly applicable to a smooth surface corresponding to the first embodiment.
Selon une variante, la face arrière est préalablement micro-texturée en forme de micro-pyramides. Le procédé électrolytique conduit ainsi à la formation d’une couche poreuse de silicium sur micro-pyramides selon le deuxième mode de réalisation de l’invention.  According to one variant, the rear face is previously micro-textured in the form of micro-pyramids. The electrolytic process thus leads to the formation of a porous silicon layer on micro-pyramids according to the second embodiment of the invention.
Selon une autre variante, la face arrière est préalablement métallisée localement, avec un motif périodique. Le procédé électrolytique conduit ainsi à la formation d’une couche poreuse à structure photonique selon le troisième mode de réalisation de l’invention.  According to another variant, the rear face is previously metallized locally, with a periodic pattern. The electrolytic process thus leads to the formation of a porous layer with a photonic structure according to the third embodiment of the invention.
La figure 18 illustre un autre exemple de procédé de formation d’une couche poreuse de silicium basé sur une texturation par faisceau laser. On applique un faisceau 20 d’impulsions laser femtoseconde (fs) sur la face arrière 12 d’une cellule photovoltaïque, le faisceau laser étant adapté pour former une couche poreuse 4 de silicium. Figure 18 illustrates another example of a method of forming a porous silicon layer based on laser beam texturing. A beam 20 of femtosecond laser pulses (fs) is applied to the rear face 12 of a photovoltaic cell, the laser beam being adapted to form a porous layer 4 of silicon.
Le procédé de formation d’une couche poreuse 4 de silicium décrit ci- dessus, par gravure plasma, gravure chimique assistée par métal, gravure électrochimique ou gravure laser, permet aisément d’ajuster les dimensions et la profondeur des pores et ainsi d’ajuster précisément la porosité de la couche poreuse de silicium. Ces procédés de gravure sont peu coûteux et le coût du dispositif photovoltaïque résultant est faiblement impacté.  The method for forming a porous silicon layer 4 described above, by plasma etching, metal-assisted chemical etching, electrochemical etching or laser etching, makes it easy to adjust the dimensions and the depth of the pores and thus to adjust precisely the porosity of the porous silicon layer. These etching processes are inexpensive and the cost of the resulting photovoltaic device is poorly impacted.
Le procédé de formation, par l’une des techniques décrite ci-dessus, d’une couche poreuse 4 de silicium et d’une couche de passivation est généralement appliqué sur toute la face arrière du substrat 1 de silicium cristallin pour une cellule de type PERC, PERL ou PERF, ou, respectivement, sur toute la face arrière de la couche 7 dopée entièrement diffusée d’une cellule de type PERT.  The method of forming, by one of the techniques described above, a porous silicon layer 4 and a passivation layer is generally applied over the entire back face of the crystalline silicon substrate 1 for a type cell. PERC, PERL or PERF, or, respectively, over the entire rear face of the fully diffused doped layer 7 of a PERT-type cell.
De manière analogue, selon le troisième mode de réalisation, suite à l’étape de formation d’une structure à cristal photonique et d’une couche de passivation, la face arrière du substrat 1 ou respectivement, de la couche 7 dopée, est entièrement texturée par la structure à cristal photonique passivée. Suite à cette étape de passivation, on forme des ouvertures de contact 23, 24 dans la structure à cristal photonique passivée. Ainsi, la couche métallique 2 ou, respectivement, les contacts métalliques 21 , 22, sont en contact électrique direct avec le substrat 1 de silicium cristallin d’une cellule PERC, ou, respectivement, avec les zones 6 dopées localement d’une cellule PERL ou PERF, ou encore, avec la couche 7 dopée entièrement diffusée d’une cellule PERT.  Similarly, according to the third embodiment, following the step of forming a photonic crystal structure and a passivation layer, the rear face of the substrate 1 or respectively, of the doped layer 7, is entirely textured by the passivated photonic crystal structure. Following this passivation step, contact openings 23, 24 are formed in the passivated photonic crystal structure. Thus, the metal layer 2 or, respectively, the metal contacts 21, 22 are in direct electrical contact with the crystalline silicon substrate 1 of a PERC cell, or, respectively, with the locally doped zones 6 of a PERL cell. or PERF, or again, with the fully diffused doped layer 7 of a PERT cell.
La face avant de la cellule peut aussi être texturée par un procédé basé sur l’une des techniques décrites ci-dessus, par exemple de gravure plasma, et dans d’autres conditions opérationnelles adaptées pour produire une texturation de la face avant de type conique, pyramidale, en silicium noir ou pour former une autre couche poreuse en face avant.  The front face of the cell can also be textured by a method based on one of the techniques described above, for example plasma etching, and in other operating conditions adapted to produce a texturing of the conical front face. , pyramidal, black silicon or to form another porous layer on the front.
Le procédé de fabrication d’une cellule photovoltaïque ou d’un photodétecteur sur substrat de silicium cristallin s’applique à une cellule mono- jonction ou multi-jonction, notamment à la face arrière d’une cellule tandem.  The method of manufacturing a photovoltaic cell or a photodetector on a crystalline silicon substrate is applied to a single-junction or multi-junction cell, in particular to the rear face of a tandem cell.
Le procédé de fabrication selon l’une ou l’autre des techniques décrites ci-dessus s’applique également à la fabrication d’un panneau photovoltaïque comprenant plusieurs cellules photovoltaïques reliées électriquement entre elles.  The manufacturing method according to one or the other of the techniques described above also applies to the manufacture of a photovoltaic panel comprising a plurality of photovoltaic cells electrically connected to each other.

Claims

REVENDICATIONS
1. Dispositif photovoltaïque ou photodétecteur de type émetteur passivé contact arrière, le dispositif comprenant un substrat de silicium cristallin (1 ), et le dispositif ayant une face avant (11 ) destinée à être exposée à un faisceau lumineux et une face arrière (12), 1. Photovoltaic device or photodetector of passivated transmitter rear contact type, the device comprising a crystalline silicon substrate (1), and the device having a front face (11) intended to be exposed to a light beam and a rear face (12) ,
caractérisé en ce que :  characterized in that
- la face arrière (12) du dispositif comporte une couche poreuse (4) de silicium, la couche poreuse (4) de silicium ayant une surface texturée, la surface texturée comprenant des pores (41 , 42, 43, 44, 4n) de dimensions comprises entre environ 20 nm et 1000 nm, lesdits pores formant des ouvertures (51 , 52, 53, 54, 5n) orientées vers la face arrière (12) du dispositif,  the rear face (12) of the device comprises a porous silicon layer (4), the porous silicon layer (4) having a textured surface, the textured surface comprising pores (41, 42, 43, 44, 4n) of dimensions between about 20 nm and 1000 nm, said pores forming openings (51, 52, 53, 54, 5n) oriented towards the rear face (12) of the device,
et en ce que le dispositif comporte en outre :  and in that the device further comprises:
- une couche mince de passivation (5) conforme à au moins une partie de la surface texturée, et  a thin passivation layer (5) conforming to at least a portion of the textured surface, and
- au moins une électrode métallique (2, 21 , 22) formée sur la face arrière (12) du dispositif, l’électrode métallique (2, 21 , 22) étant adaptée pour former un contact électrique via une ouverture de contact (23, 24) en face arrière (12) du dispositif.  at least one metal electrode (2, 21, 22) formed on the rear face (12) of the device, the metal electrode (2, 21, 22) being adapted to form an electrical contact via a contact opening (23, 24) on the rear face (12) of the device.
2. Dispositif selon la revendication 1 dans lequel les pores (41 , 42, 43, 44, 4n) ont une profondeur (h) comprise entre 100 nm et 1000 nm, les ouvertures (51 , 52, 53, 54, 5n) des pores ayant une dimension ( L2 ) comprise entre 20 nm et 1000 nm et une distance ( Li ) entre pores (51 , 52) adjacents étant comprise entre 20 nm et 1000 nm. 2. Device according to claim 1 wherein the pores (41, 42, 43, 44, 4n) have a depth (h) of between 100 nm and 1000 nm, the openings (51, 52, 53, 54, 5n) of pores having a dimension (L 2 ) of between 20 nm and 1000 nm and a distance (Li) between adjacent pores (51, 52) being between 20 nm and 1000 nm.
3. Dispositif selon l’une des revendications 1 à 2 dans lequel la couche poreuse (4) de silicium a une porosité comprise entre 25% et 75%. 3. Device according to one of claims 1 to 2 wherein the porous layer (4) of silicon has a porosity of between 25% and 75%.
4. Dispositif selon l’une des revendications 1 à 3 dans lequel la couche poreuse (4) de silicium a une épaisseur moyenne comprise entre 100 nanomètres et 2 micromètres. 4. Device according to one of claims 1 to 3 wherein the porous layer (4) of silicon has an average thickness of between 100 nanometers and 2 micrometers.
5. Dispositif selon l’une des revendications 1 à 4 dans lequel la couche poreuse (4) de silicium a un indice de réfraction équivalent d’environ 1 ,4. 5. Device according to one of claims 1 to 4 wherein the porous layer (4) of silicon has an equivalent refractive index of about 1, 4.
6. Dispositif selon l’une des revendications 1 à 5 dans lequel la surface texturée de la couche poreuse (4) de silicium présente une structure périodique ayant une première période spatiale (L1 ) dans une gamme comprise entre 20 nm et 500 nm et/ou une deuxième période spatiale (l_G) dans une gamme comprise entre 900 nm et 1.5 miti, la couche poreuse (4) de silicium formant une structure à cristal photonique. 6. Device according to one of claims 1 to 5 wherein the textured surface of the porous layer (4) of silicon has a periodic structure having a first spatial period (L1) in a range between 20 nm and 500 nm and / or a second spatial period (1 G ) in a range between 900 nm and 1.5 miti, the porous layer (4) of silicon forming a photonic crystal structure.
7. Dispositif selon l’une des revendications 1 à 6 dans lequel la face arrière (12) du dispositif comporte en outre des micro-pyramides (8), la couche poreuse (4) de silicium étant formée en surface d’au moins une facette des micro-pyramides (8). 7. Device according to one of claims 1 to 6 wherein the rear face (12) of the device further comprises micro-pyramids (8), the porous layer (4) of silicon being formed on the surface of at least one facet of micro-pyramids (8).
8. Dispositif selon l’une des revendications 1 à 7 dans lequel l’électrode métallique (2, 21 , 22) comporte une couche métallique (2) réfléchissante recouvrant la face arrière du dispositif. 8. Device according to one of claims 1 to 7 wherein the metal electrode (2, 21, 22) comprises a reflective metal layer (2) covering the rear face of the device.
9. Dispositif selon l’une des revendications 1 à 8, le dispositif étant multi-jonction et dans lequel la couche poreuse (4) de silicium est disposée en face arrière du dispositif multi-jonction. 9. Device according to one of claims 1 to 8, the device being multi-junction and wherein the porous layer (4) of silicon is disposed on the rear face of the multi-junction device.
10. Dispositif photovoltaïque selon la revendication 9 dans lequel le dispositif multi-jonction forme une cellule tandem. 10. Photovoltaic device according to claim 9 wherein the multi-junction device forms a tandem cell.
11. Dispositif selon l’une des revendications 1 à 10 dans lequel la face avant (11 ) du dispositif comporte une couche de silicium noir ou une autre couche poreuse de silicium dopé, l’autre couche poreuse de silicium dopé ayant une autre surface texturée, l’autre surface texturée formant d’autres pores de dimensions comprises entre environ 20 nm et 2000 nm, lesdits autres pores formant d’autres ouvertures orientées vers la face avant (11 ) du dispositif. 11. Device according to one of claims 1 to 10 wherein the front face (11) of the device comprises a black silicon layer or another porous layer of doped silicon, the other porous doped silicon layer having another textured surface , the other textured surface forming other pores of dimensions between about 20 nm and 2000 nm, said other pores forming other openings oriented towards the front face (11) of the device.
12. Panneau photovoltaïque comprenant une pluralité de dispositifs selon l’une des revendications 1 à 1 1 reliés électriquement entre eux. 12. Photovoltaic panel comprising a plurality of devices according to one of claims 1 to 1 1 electrically connected to each other.
13. Procédé de fabrication d’un dispositif photovoltaïque ou photodétecteur de type émetteur passivé contact arrière ou d’un panneau photovoltaïque comprenant une pluralité de dispositifs photovoltaïques de type émetteur passivé contact arrière reliés électriquement entre eux, le procédé comprenant les étapes suivantes : 13. A method of manufacturing a photovoltaic device or photodetector of the passivated emitter rear contact type or a photovoltaic panel comprising a plurality of rear-passivated emitter type photovoltaic devices electrically connected to each other, the method comprising the following steps:
- texturation de la face arrière (12) d’un substrat (1 ) de silicium cristallin de manière à former une couche poreuse (4) de silicium, la couche poreuse (4) de silicium ayant une surface texturée, la surface texturée comprenant des pores (41 , 42, 43, 44, 4n) de dimensions comprises entre environ 20 nm et 1000 nm, lesdits pores (41 , 42, 43, 44, 4n) formant des ouvertures (51 , 52, 53, 54, 5n) orientées vers la face arrière (12) du dispositif,  - texturing of the rear face (12) of a crystalline silicon substrate (1) so as to form a porous silicon layer (4), the porous silicon layer (4) having a textured surface, the textured surface comprising pores (41, 42, 43, 44, 4n) of dimensions between about 20 nm and 1000 nm, said pores (41, 42, 43, 44, 4n) forming openings (51, 52, 53, 54, 5n) oriented towards the rear face (12) of the device,
- formation d’au moins une couche mince de passivation (5) conforme à la surface texturée, et  forming at least one thin passivation layer (5) conforming to the textured surface, and
- formation d’au moins une électrode métallique (2, 21 , 22) sur la face arrière (12) du dispositif, l’électrode métallique (2, 21 , 22) étant adaptée pour former un contact électrique via une ouverture de contact (23, 24) en face arrière (12) du dispositif.  - formation of at least one metal electrode (2, 21, 22) on the rear face (12) of the device, the metal electrode (2, 21, 22) being adapted to form an electrical contact via a contact opening ( 23, 24) on the rear face (12) of the device.
14. Procédé selon la revendication 13 dans lequel l’étape de texturation comporte une étape de gravure anisotrope de la face arrière du substrat de silicium, l’étape de gravure anisotrope étant de type gravure par plasma (13) à couplage inductif, gravure chimique assistée par métal, gravure électrochimique ou gravure laser (20). 14. The method of claim 13 wherein the texturing step comprises an anisotropic etching step of the rear face of the silicon substrate, the anisotropic etching step being inductively coupled plasma etching (13) type, chemical etching. assisted by metal, electrochemical etching or laser engraving (20).
15. Procédé selon la revendication 14 dans lequel l’étape de texturation comporte une étape supplémentaire de masquage avant l’étape de gravure, l’étape de masquage étant adaptée pour former un masque sur la face arrière du substrat de silicium, le masque comportant un motif périodique ayant au moins une première période spatiale dans une gamme comprise entre 20 nm et 500 nm, et/ou une deuxième période spatiale dans une gamme comprise entre 900 nm et 1 ,5 miti, de manière à former une structure à cristal photonique dans la couche poreuse. 15. The method of claim 14 wherein the texturing step comprises an additional step of masking before the etching step, the masking step being adapted to form a mask on the back side of the silicon substrate, the mask comprising a periodic pattern having at least a first spatial period in a range of between 20 nm and 500 nm, and / or a second spatial period in a range between 900 nm and 1.5 miti, so as to form a photonic crystal structure in the porous layer.
PCT/FR2019/050336 2018-02-15 2019-02-14 Passivated emitter and rear contact photovoltaic or photodetector device and method for manufacturing such a device WO2019158868A1 (en)

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EP0776051A2 (en) 1995-11-22 1997-05-28 Ebara Solar Inc Structure and fabrication process for an aluminum alloy junction self-aligned back contact silicon solar cell
WO2008010782A1 (en) * 2006-07-21 2008-01-24 Vadim Volodimirovich Naumov The method of production of the photoelectric converter
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