WO2019119869A1 - Hetero-junction solar cell and preparation method therefor - Google Patents

Hetero-junction solar cell and preparation method therefor Download PDF

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WO2019119869A1
WO2019119869A1 PCT/CN2018/103604 CN2018103604W WO2019119869A1 WO 2019119869 A1 WO2019119869 A1 WO 2019119869A1 CN 2018103604 W CN2018103604 W CN 2018103604W WO 2019119869 A1 WO2019119869 A1 WO 2019119869A1
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layer
doped
water
ito
transparent conductive
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PCT/CN2018/103604
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French (fr)
Chinese (zh)
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董刚强
陆海川
郁操
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君泰创新（北京）科技有限公司
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0216—Coatings
    • H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type
    • H01L31/0725—Multiple junction or tandem solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1876—Particular processes or apparatus for batch treatment of the devices
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/548—Amorphous silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present application relates to, but is not limited to, the field of heterojunction solar cells, and in particular, but not limited to, a solar heterojunction cell and a method of fabricating the same.
  • ITO film plays an important role. It is not only responsible for collecting photogenerated carriers, but also for the majority. The sunlight can enter the battery body smoothly.
  • the excellent ITO film has high light transmittance and good electrical conductivity; in addition, in the HJT device, the ITO film is a part of the battery. In terms of device optics, the ITO film is the trapping and anti-reflection layer of the battery; in terms of device electrical properties, the properties of the ITO film material can affect the matching of the entire battery in the energy band and cause changes in the open circuit voltage and fill factor of the battery. .
  • the methods for preparing ITO materials are divided into low temperature (room temperature) and high temperature (>180 ° C) processes.
  • the low temperature (room temperature) process can be divided into the conventional process (in the process, only argon and oxygen are introduced) and the hydrogen doping process (ie, argon gas and oxygen are introduced during the deposition of ITO at room temperature). And hydrogen to participate in the reaction).
  • An embodiment of the present application provides a solar heterojunction cell comprising a single crystal silicon wafer and an intrinsic amorphous silicon passivation layer, amorphous silicon doping, which are sequentially stacked on at least one side of the single crystal silicon wafer.
  • ITO indium tin oxide
  • the water-doped ITO transparent conductive layer may have a thickness in the range of 30 nm to 50 nm.
  • the solar heterojunction cell when the solar heterojunction cell includes a water-doped ITO transparent conductive layer, the solar heterojunction cell may further include a doped layer disposed on the amorphous silicon layer and the doped water A non-aqueous ITO layer between the ITO transparent conductive layers.
  • the solar heterojunction cell when the solar heterojunction cell comprises two water-doped ITO transparent conductive layers respectively disposed on both sides of the single crystal silicon wafer, the solar heterojunction cell may further include a monocrystalline silicon disposed A non-water-doped ITO layer between at least one side of the sheet between the amorphous silicon layer doped layer and the water-doped ITO transparent conductive layer.
  • the non-water-doped ITO layer disposed between the amorphous silicon doped layer and the water-doped ITO transparent conductive layer may be a microcrystalline ITO layer.
  • the thickness of the non-water-doped ITO layer disposed between the amorphous silicon doped layer and the water-doped ITO transparent conductive layer may range from 2 nm to 3 nm.
  • the solar heterojunction cell when the solar heterojunction cell comprises a water-doped ITO transparent conductive layer, the solar heterojunction cell may further comprise a photo-setting ITO transparent conductive layer disposed between the electrode and the electrode The water-free ITO layer.
  • the solar heterojunction cell when the solar heterojunction cell comprises two water-doped ITO transparent conductive layers respectively disposed on both sides of the single crystal silicon wafer, the solar heterojunction cell may further include a monocrystalline silicon disposed An undoped ITO layer between at least one side of the sheet between the water-doped ITO transparent conductive layer and the electrode.
  • the non-water-doped ITO layer disposed between the water-doped ITO transparent conductive layer and the electrode can be a polycrystalline ITO layer.
  • the thickness of the non-water-doped ITO layer disposed between the water-doped ITO transparent conductive layer and the electrode may range from 30 nm to 50 nm.
  • the single crystal silicon wafer can be an n-type single crystal silicon wafer.
  • the thickness of the single crystal silicon wafer may range from 50 ⁇ m to 300 ⁇ m.
  • the intrinsic amorphous silicon passivation layer may have a thickness in the range of 1 nm to 20 nm.
  • the amorphous silicon doped layer may have a thickness in the range of 3 nm to 20 nm.
  • the solar heterojunction cell comprises two amorphous silicon doped layers respectively disposed on both sides of a single crystal silicon wafer
  • the one disposed on one side of the single crystal silicon wafer The amorphous silicon doped layer may be a P-type amorphous silicon doped layer
  • the amorphous silicon doped layer disposed on the other side of the single crystal silicon wafer may be an N-type amorphous silicon doped layer.
  • the embodiment of the present application further provides a method for preparing a solar heterojunction cell, comprising: forming an intrinsic amorphous silicon passivation layer, an amorphous silicon doped layer, and water in sequence on at least one side of a single crystal silicon wafer; Indium tin oxide (ITO) transparent conductive layer and electrode.
  • ITO Indium tin oxide
  • the method may further comprise depositing the water-doped ITO transparent conductive layer on the amorphous silicon doped layer Previously, a water-impermeable ITO layer is deposited on the amorphous silicon doped layer, and the water-doped ITO transparent conductive layer is deposited on the water-impermeable ITO layer disposed on the amorphous silicon doped layer. .
  • the method may further include the water-doped ITO transparent conductive layer Depositing a water-impermeable ITO layer on the amorphous silicon doped layer on at least one side of the single crystal silicon wafer, and depositing the water-doped ITO transparent conductive layer on the at least one side of the amorphous silicon doped layer Deposited on the water impermeable ITO layer disposed on the amorphous silicon doped layer.
  • the method may further comprise: impervious ITO before the electrode is formed on the water-doped ITO transparent conductive layer A layer is deposited on the water-doped ITO transparent conductive layer, and the electrode is screen printed on the water-impermeable ITO layer disposed on the water-doped ITO transparent conductive layer.
  • the method may further include forming the electrode at the doping Before the water ITO transparent conductive layer, a water-impermeable ITO layer is deposited on the water-doped ITO transparent conductive layer on at least one side of the single crystal silicon wafer, and disposed on the water-doped ITO transparent conductive layer The electrode is screen printed on the water impermeable ITO layer.
  • the step of forming the water-doped ITO transparent conductive layer may include depositing the water-doped ITO transparent conductive layer by introducing argon gas, oxygen gas, and water vapor under room temperature conditions.
  • the water-doped ITO transparent conductive layer may be deposited by magnetron sputtering, and wherein the gas flow ratio of the argon gas, the oxygen gas to the water vapor may be (200:10: 1) To the range of (400:10:1), the pressure at the time of deposition may be in the range of 0.1 Pa to 1 Pa, and the power density of the sputtering power source may be in the range of 0.5 W/cm 2 to 3 W/cm 2 .
  • the water-doped ITO transparent conductive layer may have a thickness in the range of 30 nm to 50 nm.
  • the flow rate of water vapor can be kept constant, and the flow rate of the water vapor can be set in the range of 0.1 sccm to 10 sccm.
  • the depositing the non-aqueous ITO layer disposed on the amorphous silicon doped layer may include depositing water-free ITO on the amorphous silicon doped layer at room temperature.
  • the layers are formed to form a microcrystalline, non-aqueous ITO layer.
  • a non-water-doped ITO layer can be deposited on the amorphous silicon doped layer by magnetron sputtering using argon and oxygen at room temperature, wherein the argon gas is
  • the oxygen gas flow ratio may be in the range of 20:1 to 60:1
  • the deposition pressure may be in the range of 0.1 Pa to 2 Pa
  • the sputtering power source may have a power density of 0.5 W/cm 2 to 3 W/cm 2 . In the range.
  • the thickness of the micro-crystalline non-water-doped ITO layer deposited on the amorphous silicon doped layer may range from 2 nm to 3 nm.
  • the step of depositing a non-water-doped ITO layer on the water-doped ITO transparent conductive layer may include depositing a water-free ITO layer on the water-doped ITO transparent conductive layer to form under high temperature conditions. Polycrystalline non-aqueous ITO layer.
  • the sample to be deposited may be heated to a range of 180 ° C to 200 ° C, argon and oxygen are introduced, and the undoped deposition on the water-doped ITO transparent conductive layer is performed by magnetron sputtering.
  • a water ITO layer to form a polycrystalline non-water-doped ITO layer wherein the gas flow ratio of the argon gas to the oxygen gas may be in the range of 20:1 to 60:1, and the deposition pressure may be 0.1 Pa to
  • the power density of the sputtering power source may range from 0.5 W/cm 2 to 3 W/cm 2 in the range of 2 Pa.
  • the thickness of the polycrystalline non-water-doped ITO layer deposited on the water-doped ITO transparent conductive layer can range from 30 nm to 50 nm.
  • the step of sequentially forming the intrinsic amorphous silicon passivation layer and the amorphous silicon doped layer on at least one side of the single crystal silicon wafer may include depositing the intrinsic amorphous by chemical vapor deposition. a silicon passivation layer and the amorphous silicon doped layer.
  • the solar heterojunction cell comprises two amorphous silicon doped layers respectively disposed on both sides of a single crystal silicon wafer
  • the one disposed on one side of the single crystal silicon wafer The amorphous silicon doped layer may be a P-type amorphous silicon doped layer
  • the amorphous silicon doped layer disposed on the other side of the single crystal silicon wafer may be an N-type amorphous silicon doped layer.
  • the single crystal silicon wafer can include an n-type single crystal silicon wafer.
  • the thickness of the single crystal silicon wafer may range from 50 ⁇ m to 300 ⁇ m.
  • the intrinsic amorphous silicon passivation layer may have a thickness in the range of 1 nm to 20 nm.
  • the amorphous silicon doped layer may have a thickness in the range of 3 nm to 20 nm.
  • FIG. 1 is a schematic structural view of a solar heterojunction battery according to an embodiment of the present application.
  • Figure 2 shows the transmission curves of different ITO samples, in which "microcrystalline” represents ITO prepared by a low temperature conventional process, “amorphous” represents ITO prepared by a low temperature hydrogen doping process, and “polycrystalline” represents ITO prepared by a high temperature process.
  • "Inventive Example” represents a laminated ITO according to an embodiment of the present application.
  • FIG. 3 is an enlarged partial detail view of the short wave band of FIG. 2.
  • FIG. 4 is an enlarged partial detail view of the long wave band of FIG. 2.
  • Figure 5 is a surface reflectance curve of a silicon wafer deposited with different ITOs, wherein "microcrystalline” represents ITO prepared by a low temperature conventional process, “amorphous” represents ITO prepared by a low temperature hydrogen doping process, and “polycrystalline” represents a high temperature.
  • the ITO prepared by the process, "the embodiment of the present application” represents the laminated ITO in the HJT solar cell of an embodiment of the present application.
  • FIG. 6 is an enlarged partial detail view of the short wave band of FIG. 5.
  • FIG. 7 is an enlarged partial detail view of the medium long wave band of FIG. 5.
  • the ITO transparent conductive layer prepared by the water mixing process is defined as a water-doped ITO transparent conductive layer
  • the conventional ITO transparent conductive layer prepared by the non-water mixing process is defined as a water-free ITO transparent conductive layer.
  • the conventional process at room temperature that is, only argon gas and oxygen are introduced during the deposition of ITO at room temperature, and the prepared ITO is a microcrystalline material.
  • the carrier concentration of the microcrystalline ITO material is high, correspondingly The light transmittance of the microcrystalline ITO material is slightly worse.
  • the hydrogen-doping process at room temperature that is, the reaction of argon gas, oxygen gas and hydrogen gas during the deposition of ITO at room temperature can change the degree of crystallization of the ITO material, so that the ITO is prepared by the conventional process, that is, the process of not passing hydrogen gas.
  • the crystalline state changes to an amorphous state.
  • the light transmission properties of this amorphous ITO material are almost the same as those of the polycrystalline ITO material prepared by the high temperature process.
  • the refractive index (n) of the amorphous ITO material prepared by the hydrogen-doping process is relatively large. When used as a transparent conductive layer of a solar cell, the effect of trapping light is slightly worse.
  • the ITO material prepared at a high temperature is polycrystalline ITO.
  • the process controllability of the high-temperature process, the conductivity and transmittance of the prepared ITO material can meet the requirements of the solar cell.
  • This method of preparing ITO materials is currently used by most companies and research institutes. However, this material is not perfect, there is also a lot of optimization space in the process and battery structure design.
  • the core of the solar cell structure is a 4-layer amorphous silicon material: two intrinsic amorphous silicon passivation layers respectively disposed on both sides of the single crystal silicon wafer, and respectively disposed on the two intrinsic amorphous silicon passivation layers.
  • the thickness of the four amorphous silicon layers does not exceed 20 nm, and the properties are relatively unstable. If the battery after the preparation of the four layers of amorphous silicon has been placed in a high temperature environment, the properties of the amorphous silicon are extremely easy to change.
  • a sample of the ITO deposition process is formed by forming a sample of the ITO to be deposited by a conventional method using four layers of the amorphous silicon layer and the single crystal silicon wafer.
  • the deposited ITO can be selected from a low temperature conventional process, a hydrogen doping process, or a high temperature deposition process. From the effect point of view, the battery current of ITO prepared by low temperature conventional process is low, the filling factor of ITO prepared by hydrogen doping process is low, and the opening pressure of ITO battery prepared by high temperature process is not high.
  • a large amount of oxygen is introduced into the cavity, and four amorphous silicon layers are easily oxidized during high-temperature ITO deposition; in addition, there are many high-energy plasmas in the process chamber for depositing ITO. Amorphous silicon films are more susceptible to oxidation and destruction.
  • the inventors of the present application found that in the process of preparing amorphous ITO, a certain amount of water vapor is introduced to participate in the reaction, and the performance of the prepared water-doped ITO transparent conductive layer is improved compared with the performance of the conventional ITO layer.
  • a water-doped ITO film having a high mobility and a low carrier concentration was obtained.
  • the water-doped ITO transparent conductive layer has good light transmission performance, and the short-circuit current of the HJT solar cell prepared by using the water-doped ITO transparent conductive layer is good, so the water-doped ITO transparent conductive layer can be used as a heterojunction solar cell. Transparent conductive layer.
  • the inventors of the present application have creatively proposed a combined design after extensive experimental and theoretical research: after completing four layers of amorphous silicon deposition, on two amorphous silicon doped layers, successive deposition can be used at room temperature.
  • the HJT solar cell prepared by using a specific arrangement of three specific ITOs improves the efficiency of the battery compared with the HJT solar cell prepared by a majority of current research and development organizations using a single type of conventional ITO.
  • the specific combination of such ITO is deposited on the amorphous silicon doped layer by using a microcrystalline non-doped ITO layer, so that the microcrystalline non-doped ITO has a good work function matching with the doped amorphous silicon.
  • the microcrystalline ITO layer is in good contact with the doped amorphous silicon layer.
  • Such a specific combination of ITO uses a polycrystalline non-water-doped ITO layer to screen the electrode onto the polycrystalline non-water-doped ITO layer, so that the polycrystalline non-doped ITO and the electrode have a good work function. Matching, the electrode can be in good contact with the polycrystalline non-water-doped ITO layer.
  • Such specific combinations of ITOs have good light transmission properties, open circuit voltages, and fill factors.
  • the embodiment of the present application provides a solar heterojunction cell prepared by using a water-doped ITO transparent conductive layer and a preparation method thereof, thereby effectively solving the problem that the conventional ITO conductive layer has low light transmittance, poor light trapping effect, and The amorphous silicon film is oxidized during high temperature deposition of ITO.
  • the embodiment of the present application provides a solar heterojunction cell, comprising a single crystal silicon wafer and an intrinsic amorphous silicon passivation layer and amorphous silicon doping layer which are sequentially stacked on at least one side of the single crystal silicon wafer.
  • ITO indium tin oxide
  • water-doped ITO is used as the transparent conductive layer of the HJT solar cell, and a water-doped ITO film having high mobility and low carrier concentration can be obtained.
  • the water-doped ITO transparent conductive layer has good light transmission performance, and the short-circuit current of the HJT solar cell prepared using the water-doped ITO transparent conductive layer is good.
  • the water-doped ITO transparent conductive layer may have a thickness in the range of 30 nm to 50 nm.
  • the solar heterojunction cell when the solar heterojunction cell includes a water-doped ITO transparent conductive layer, the solar heterojunction cell may further include a doped layer disposed on the amorphous silicon layer and the A water-free ITO layer between the water-doped ITO transparent conductive layers.
  • the solar heterojunction battery may further include a single a non-water-doped ITO layer between the amorphous silicon layer doped layer and the water-doped ITO transparent conductive layer on at least one side of the crystalline silicon wafer.
  • the non-water-doped ITO layer disposed between the amorphous silicon doped layer and the water-doped ITO transparent conductive layer may be a microcrystalline ITO layer.
  • the thickness of the non-water-doped ITO layer disposed between the amorphous silicon doped layer and the water-doped ITO transparent conductive layer may range from 2 nm to 3 nm.
  • the solar heterojunction cell when the solar heterojunction cell includes a water-doped ITO transparent conductive layer, the solar heterojunction cell may further include the water-doped ITO transparent conductive layer and the electrode. There is no water ITO layer between them.
  • the solar heterojunction battery may further include a single a non-water-doped ITO layer between the water-doped ITO transparent conductive layer and the electrode on at least one side of the crystalline silicon wafer.
  • the non-water-doped ITO layer disposed between the water-doped ITO transparent conductive layer and the electrode may be a polycrystalline ITO layer.
  • the thickness of the non-water-doped ITO layer disposed between the water-doped ITO transparent conductive layer and the electrode may range from 30 nm to 50 nm.
  • the solar cell provided by the exemplary embodiment of the present application organically combines three types of ITO layers.
  • the entire ITO material is formed using a specific combination of three specific ITO combinations.
  • Both polycrystalline ITO and amorphous ITO materials are ITO materials with good light transmittance to ensure light transmittance.
  • the refractive indices of the polycrystalline ITO, the amorphous ITO, and the microcrystalline ITO layer are different, in the optical trapping and anti-reverse design, by combining the three layers of ITO materials, when the light is incident, it is sequentially passed.
  • the three-layer ITO material with a small change in refractive index enhances the light trapping effect of the solar cell, so that the solar cell has a significantly improved efficiency gain.
  • the entire ITO conductive layer is more conducive to the transport of current.
  • the microcrystalline ITO layer has a high carrier concentration, so the microcrystalline ITO layer can achieve good contact with the amorphous silicon doped layer.
  • the single crystal silicon wafer may be an n-type single crystal silicon wafer.
  • the thickness of the single crystal silicon wafer may range from 50 ⁇ m to 300 ⁇ m.
  • the intrinsic amorphous silicon passivation layer may have a thickness in the range of 1 nm to 20 nm.
  • the amorphous silicon doped layer may have a thickness in the range of 3 nm to 20 nm.
  • the solar heterojunction cell when the solar heterojunction cell includes two amorphous silicon doped layers respectively disposed on both sides of the single crystal silicon wafer, disposed on one side of the single crystal silicon wafer
  • the amorphous silicon doped layer may be a P-type amorphous silicon doped layer
  • the amorphous silicon doped layer disposed on the other side of the single crystal silicon wafer may be N-type amorphous silicon doped Floor.
  • the embodiment of the present application further provides a method for preparing a solar heterojunction cell, comprising: forming an intrinsic amorphous silicon passivation layer, an amorphous silicon doped layer, and water in sequence on at least one side of the single crystal silicon wafer; Indium tin oxide (ITO) transparent conductive layer and electrode.
  • ITO Indium tin oxide
  • the solar heterojunction cell prepared by the above method has good light transmission performance, and the short circuit current of the solar cell is good.
  • the method may further include depositing the amorphous silicon doping on the water-doped ITO transparent conductive layer. Before the layer, a water-impermeable ITO layer is deposited on the amorphous silicon doped layer, and the water-doped ITO transparent conductive layer is deposited on the non-permeable ITO disposed on the amorphous silicon doped layer. On the floor.
  • the method may further include transparently coating the water-doped ITO Depositing a conductive layer on the amorphous silicon doped layer, depositing a water-impermeable ITO layer on the amorphous silicon doped layer on at least one side of the single crystal silicon wafer, and transparently coating the water-doped ITO A conductive layer is deposited on the water impermeable ITO layer disposed on the amorphous silicon doped layer.
  • the method may further include: before the electrode is formed on the water-doped ITO transparent conductive layer, A water permeable ITO layer is deposited on the water-doped ITO transparent conductive layer, and the electrode is screen printed on the water-impermeable ITO layer disposed on the water-doped ITO transparent conductive layer.
  • the method may further include forming the electrode at the Before the water-doped ITO transparent conductive layer, a water-impermeable ITO layer is deposited on the water-doped ITO transparent conductive layer on at least one side of the single crystal silicon wafer, and is disposed on the water-doped ITO transparent conductive layer The electrode is screen printed on the water impermeable ITO layer.
  • the solar heterojunction cell prepared by the above method can avoid the problem that the amorphous silicon film is oxidized during high temperature deposition of ITO.
  • the microcrystalline ITO layer and the amorphous water-doped ITO layer are deposited at a low temperature. Since the sample to be deposited is not heated, the reaction rate of the amorphous silicon material with the oxygen in the process gas is relatively slow, reducing the amorphous Oxidation of the silicon layer. Therefore, the two layers of ITO material of the microcrystalline ITO layer and the amorphous water-doped ITO layer can be used as a protective layer, which can effectively avoid the problem that the amorphous silicon layer is oxidized during high temperature deposition of ITO.
  • the step of forming the water-doped ITO transparent conductive layer may include depositing the water-doped ITO transparent conductive layer by introducing argon gas, oxygen gas, and water vapor under room temperature conditions.
  • the water-doped ITO transparent conductive layer may be deposited by magnetron sputtering, and wherein the gas flow ratio of the argon gas, the oxygen gas to the water vapor may be (200: In the range of 10:1) to (400:10:1), the pressure during deposition may be in the range of 0.1 Pa to 1 Pa, and the power density of the sputtering power source may be in the range of 0.5 W/cm 2 to 3 W/cm 2 .
  • the gas flow ratio of the argon gas, the oxygen gas to the water vapor may be (200: In the range of 10:1) to (400:10:1)
  • the pressure during deposition may be in the range of 0.1 Pa to 1 Pa
  • the power density of the sputtering power source may be in the range of 0.5 W/cm 2 to 3 W/cm 2 .
  • the water-doped ITO transparent conductive layer may have a thickness in the range of 30 nm to 50 nm.
  • the flow rate of water vapor in the process of depositing the water-doped ITO transparent conductive layer, the flow rate of water vapor may be kept constant, and the flow rate of the water vapor may be set in a range of 0.1 sccm to 10 sccm.
  • the depositing the non-water-doped ITO layer disposed on the amorphous silicon doped layer may include depositing an undoped layer on the amorphous silicon doped layer at room temperature.
  • the water ITO layer is formed to form a microcrystalline state without a water-doped ITO layer.
  • a non-aqueous ITO layer may be deposited on the amorphous silicon doped layer by magnetron sputtering under argon and oxygen at room temperature, wherein the argon gas is
  • the oxygen gas flow ratio may be in the range of 20:1 to 60:1
  • the deposition pressure may be in the range of 0.1 Pa to 2 Pa
  • the sputtering power source may have a power density of 0.5 W/cm 2 to 3 W/ Within the range of cm 2 .
  • the thickness of the micro-crystalline non-water-doped ITO layer deposited on the amorphous silicon doped layer may range from 2 nm to 3 nm.
  • the step of depositing a non-water-doped ITO layer on the water-doped ITO transparent conductive layer may include depositing a water-free ITO layer on the water-doped ITO transparent conductive layer under high temperature conditions. To form a polycrystalline, non-water-doped ITO layer.
  • the sample to be deposited may be heated to a range of 180 ° C to 200 ° C, argon and oxygen are introduced, and deposited on the water-doped ITO transparent conductive layer by magnetron sputtering.
  • the ITO layer is not doped to form a polycrystalline non-water-doped ITO layer, wherein the gas flow ratio of the argon gas to the oxygen gas may be in the range of 20:1 to 60:1, and the deposition pressure may be 0.1.
  • the power density of the sputtering power source may range from 0.5 W/cm 2 to 3 W/cm 2 in the range of Pa to 2 Pa.
  • the thickness of the polycrystalline non-water-doped ITO layer deposited on the water-doped ITO transparent conductive layer may range from 30 nm to 50 nm.
  • the step of sequentially forming an intrinsic amorphous silicon passivation layer and an amorphous silicon doped layer on at least one side of the single crystal silicon wafer may include depositing the intrinsic by chemical vapor deposition An amorphous silicon passivation layer and the amorphous silicon doped layer.
  • the solar heterojunction cell when the solar heterojunction cell includes two amorphous silicon doped layers respectively disposed on both sides of the single crystal silicon wafer, disposed on one side of the single crystal silicon wafer
  • the amorphous silicon doped layer may be a P-type amorphous silicon doped layer
  • the amorphous silicon doped layer disposed on the other side of the single crystal silicon wafer may be N-type amorphous silicon doped Floor.
  • the single crystal silicon wafer may include an n-type single crystal silicon wafer.
  • the thickness of the single crystal silicon wafer may range from 50 ⁇ m to 300 ⁇ m.
  • the intrinsic amorphous silicon passivation layer may have a thickness in the range of 1 nm to 20 nm.
  • the amorphous silicon doped layer may have a thickness in the range of 3 nm to 20 nm.
  • the HJT heterojunction cell comprises, in order from top to bottom, a first electrode 9, a second non-doped ITO layer 8, a first water-doped ITO transparent conductive layer 7, a first non-doped ITO layer 6, and a phosphorus-doped a.
  • the thickness of the n-type single crystal silicon wafer 1 is 180 ⁇ m;
  • the first intrinsic amorphous silicon passivation layer 2 has a thickness of 5 nm;
  • the second intrinsic amorphous silicon passivation layer 4 has a thickness of 5 nm;
  • the thickness of the phosphorus-doped a-Si:H(n) layer 3 is 7 nm;
  • the boron-doped a-Si:H(p) layer 5 has a thickness of 7 nm;
  • the first non-doped ITO layer 6 and the third non-doped ITO layer 6' are both microcrystalline ITO layers, each having a thickness of 2 nm;
  • the second non-water-doped ITO layer 8 and the fourth non-water-doped ITO layer 8' are both polycrystalline ITO layers, each having a thickness of 30 nm;
  • the first water-doped ITO transparent conductive layer 7 and the second water-doped ITO transparent conductive layer 7' each have a thickness of 50 nm.
  • the combination of the first non-water-doped ITO layer 6, the first water-doped ITO transparent conductive layer 7 and the second non-water-doped ITO layer 8 is referred to as a first laminated ITO, a third non-water-doped ITO layer 6', and a second
  • the combination of the water-doped ITO transparent conductive layer 7' and the fourth non-water-doped ITO layer 8' is referred to as a second laminated ITO.
  • a second intrinsic amorphous silicon passivation layer 4 and a boron-doped a-Si:H(p) layer 5 are sequentially deposited on the second surface of the n-type single crystal silicon wafer 1.
  • the first intrinsic amorphous silicon passivation layer 2 or the second intrinsic amorphous silicon passivation layer 4 is deposited under the following conditions: a power supply power of 350 W; a hydrogen gas to silane gas flow ratio, that is, a hydrogen dilution ratio of 12:1; The pressure was 0.7 Pa; the substrate temperature during deposition was 240 °C.
  • the deposition condition of phosphorus-doped a-Si:H(n) layer 3 is: power supply power is 400W; hydrogen gas to silane gas flow ratio, that is, hydrogen dilution ratio is 4:1; gas flow ratio of phosphane to silane, ie
  • the ratio of phosphorus to silicon was 1:100; the pressure was 0.4 Pa; and the temperature of the substrate during deposition was 230 °C.
  • the deposition condition of the boron-doped a-Si:H(p) layer 5 is: the power supply power is 500 W; the gas flow ratio of hydrogen to silane, that is, the hydrogen dilution ratio is 5:1; the gas flow ratio of borane to silane, That is, the ratio of boro to silicon is 2:98; the pressure is 0.3 Pa; and the temperature of the substrate during deposition is 200 °C.
  • argon gas and oxygen gas are introduced at room temperature, the gas flow ratio of argon gas to oxygen gas is set to 50:1, the cavity pressure is maintained at 0.3 Pa, the sputtering power source is turned on, and the power density of the power source is 2 W/cm 2 .
  • the first non-water-doped ITO layer 6 is deposited on the phosphorus-doped a-Si:H(n) layer 3 by magnetron sputtering.
  • step b) depositing said third non-water-doped ITO layer 6' on said boron-doped a-Si:H(p) layer 5 by the same process as step b).
  • argon, oxygen and water vapor are simultaneously introduced.
  • the gas flow ratio of argon, oxygen and water vapor is set to 250:10:1, the pressure of the chamber is kept at 0.4 Pa, and the water vapor is maintained.
  • the flow rate is stabilized at 0.5 sccm, the sputtering power source is turned on, the power density of the power source is 2.1 W/cm 2 , and the first water-doped ITO is transparently deposited on the first non-water-doped ITO layer 6 by magnetron sputtering.
  • step d depositing a second water-doped ITO transparent conductive layer 7' on the third non-water-doped ITO layer 6' by the same process as step d).
  • step f) heating the sample obtained in step e) to 185 ° C, introducing argon gas and oxygen gas, setting the gas flow ratio of argon gas to oxygen to 60:1, maintaining the cavity pressure at 0.5 Pa, and turning on the sputtering power source.
  • the power source has a power density of 2 W/cm 2 , and a second non-water-doped ITO layer 8 is deposited on the first water-doped ITO transparent conductive layer 7 by magnetron sputtering.
  • step f depositing a fourth non-water-doped ITO layer 8' on the second water-doped ITO transparent conductive layer 7' by the same process as step f).
  • the first electrode 9 and the second electrode 9' are screen printed on the second non-water-doped ITO layer 8 and the fourth non-water-doped ITO layer 8', respectively.
  • the above preparation process is illustrated by steps a) to h), it is not limited to the preparation of the solar heterojunction cell of the present exemplary embodiment in the order of a) to h).
  • the solar heterojunction cell of the present embodiment can be prepared in the order of a), b), d), f), c), e), g), h), that is, in the n-type single crystal silicon wafer.
  • a first intrinsic amorphous silicon passivation layer 2 a phosphorus-doped a-Si:H(n) layer 3, a first non-doped ITO layer 6, and a first water-doped ITO are sequentially deposited on the first surface of 1.
  • the conductive layer 7 and the second non-water-doped ITO layer 8 are sequentially deposited on the second surface of the n-type single crystal silicon wafer 1 with a second intrinsic amorphous silicon passivation layer 4, boron-doped a-Si:H (p) Layer 5, a third non-water-doped ITO layer 6', a second water-doped ITO transparent conductive layer 7', and a fourth non-water-doped ITO layer 8'.
  • a second intrinsic amorphous silicon passivation layer 4 a boron-doped a-Si:H(p) layer 5, and a third undoped layer may be sequentially deposited on the second surface of the n-type single crystal silicon wafer 1.
  • a water ITO layer 6', a second water-doped ITO transparent conductive layer 7', and a fourth non-water-doped ITO layer 8' depositing a first intrinsic amorphous layer on the first surface of the n-type single crystal silicon wafer 1
  • a silicon passivation layer 2 a phosphorus-doped a-Si:H(n) layer 3, a first non-doped ITO layer 6, a first water-doped ITO transparent conductive layer 7, and a second non-water-doped ITO layer 8.
  • step a diboron or trimethoxy-boroxene (TMB) may be used instead of borane in the exemplary preparation process to complete boron-doped a-Si:H (p) Deposition of the layer.
  • TMB trimethoxy-boroxene
  • the transmittance of the laminated ITO in the HJT solar cell of the above embodiment of the present application is higher than the transmittance of the microcrystalline ITO material prepared by the low temperature conventional process, and is close to the conventional low temperature hydrogen doping process.
  • the transmittance of the prepared amorphous ITO material and the polycrystalline ITO material prepared by a high temperature conventional process is higher than the transmittance of the microcrystalline ITO material prepared by the low temperature conventional process, and is close to the conventional low temperature hydrogen doping process.
  • the laminated ITO material was deposited on the surface of the silicon wafer for testing using the same processes and parameters as in the steps b), d) and f) of the method for preparing the HJT solar cell in the above embodiment, that is, on the surface of the silicon wafer.
  • the microcrystalline ITO, the water-doped ITO, and the polycrystalline ITO were deposited, and the reflectance of the surface of the silicon wafer on which the laminated ITO material was deposited was tested to obtain test data, that is, the laminated ITO of the embodiment of the present application referred to in FIGS. 5-7.
  • the test results are shown in Figure 5-7.
  • the trapping effect of the laminated ITO of the embodiment of the present application is substantially better than that of the microcrystalline ITO prepared by the low temperature conventional process, the amorphous ITO prepared by the low temperature conventional hydrogen doping process, and the high temperature conventionally.
  • the trapping effect of the polycrystalline ITO prepared by the process is substantially better than that of the microcrystalline ITO prepared by the low temperature conventional process, the amorphous ITO prepared by the low temperature conventional hydrogen doping process, and the high temperature conventionally.
  • the efficiency of the HJT solar cell of the above embodiment of the present application is significantly better than that of the microcrystalline ITO prepared by the low temperature conventional process, the amorphous ITO prepared by the low temperature conventional hydrogen doping process, and the high temperature conventional process.
  • the efficiency of the battery prepared by crystalline ITO increases the efficiency by at least 3 percentage points.
  • the structure of the HJT heterojunction cell may also adopt a structure as shown in FIG.
  • the thickness of each layer in the HJT heterojunction cell of the present exemplary embodiment is different from the thickness of each layer of the HJT heterojunction cell of the previous exemplary embodiment.
  • the HJT heterojunction cell of the exemplary embodiment includes a first electrode 9, a second non-water-doped ITO layer 8, a first water-doped ITO transparent conductive layer 7, and a first non-water-doped ITO layer 6, in order from top to bottom.
  • Phosphorus doped a-Si:H(n) layer 3 first intrinsic amorphous silicon passivation layer 2, n-type single crystal silicon wafer 1, second intrinsic amorphous silicon passivation layer 4, boron doping a-Si:H(p) layer 5, a third non-doped ITO layer 6', a second water-doped ITO transparent conductive layer 7', a fourth non-doped ITO layer 8' and a second electrode 9', wherein ,
  • the thickness of the n-type single crystal silicon wafer 1 is 180 ⁇ m;
  • the first intrinsic amorphous silicon passivation layer 2 has a thickness of 10 nm;
  • the second intrinsic amorphous silicon passivation layer 4 has a thickness of 10 nm
  • the thickness of the phosphorus-doped a-Si:H(n) layer 3 is 20 nm;
  • the boron-doped a-Si:H(p) layer 5 has a thickness of 20 nm;
  • the first non-water-doped ITO layer 6 and the third non-water-doped ITO layer 6' are both microcrystalline ITO layers, each having a thickness of 3 nm;
  • the second non-water-doped ITO layer 8 and the fourth non-water-doped ITO layer 8' are polycrystalline ITO layers each having a thickness of 40 nm;
  • the thickness of the first water-doped ITO transparent conductive layer 7 and the second water-doped ITO transparent conductive layer 7' are both 40 nm.
  • the combination of the first non-water-doped ITO layer 6, the first water-doped ITO transparent conductive layer 7 and the second non-water-doped ITO layer 8 is referred to as a first laminated ITO, a third non-water-doped ITO layer 6', and a second
  • the combination of the water-doped ITO transparent conductive layer 7' and the fourth non-water-doped ITO layer 8' is referred to as a second laminated ITO.
  • the HJT heterojunction cell of the present exemplary embodiment can be prepared by the following method:
  • a second intrinsic amorphous silicon passivation layer 4 and a boron-doped a-Si:H(p) layer 5 are sequentially deposited on the second surface of the n-type single crystal silicon wafer 1.
  • the deposition condition of the first intrinsic amorphous silicon passivation layer 2 or the second intrinsic amorphous silicon passivation layer 4 is: the power supply power is 380 W, the hydrogen gas to silane gas flow ratio, that is, the hydrogen dilution ratio is 14:1, and the pressure is 0.7pa, the substrate temperature during deposition is 220 °C.
  • the deposition condition of phosphorus-doped a-Si:H(n) layer 3 is: power supply power is 400W; hydrogen gas to silane gas flow ratio, ie hydrogen dilution ratio is 4:1; phosphine to silane gas flow ratio, ie phosphorus
  • the silicon ratio was 1:100; the pressure was 0.6 Pa; and the substrate temperature was 220 ° C during deposition.
  • the deposition condition of boron-doped a-Si:H(p) layer 5 is: power supply power is 450W; hydrogen gas to silane gas flow ratio, ie hydrogen dilution ratio is 5:1; borane to silane gas flow ratio, ie boron
  • the silicon ratio was 1:100; the pressure was 0.3 Pa; the substrate temperature during deposition was 200 °C.
  • argon gas and oxygen gas are introduced at room temperature, the gas flow ratio of argon gas to oxygen gas is set to 20:1, the cavity pressure is maintained at 0.4 Pa, the sputtering power source is turned on, and the power density of the power source is 1 W/cm 2 .
  • the first non-water-doped ITO layer 6 is deposited on the phosphorus-doped a-Si:H(n) layer 3 by magnetron sputtering.
  • step b) depositing said third non-water-doped ITO layer 6' on said boron-doped a-Si:H(p) layer 5 by the same process as step b).
  • argon, oxygen and water vapor are simultaneously introduced.
  • the gas flow ratio of argon, oxygen and water vapor is set to 300:10:1, and the chamber pressure is maintained at 0.6 Pa, maintaining water vapor.
  • the flow rate was stabilized by 1 sccm, the sputtering power source was turned on, and the power density of the power source was 1 W/cm 2 .
  • the first water-doped ITO transparent conductive layer 7 was deposited on the first non-doped ITO layer 6 by magnetron sputtering.
  • step d depositing a second water-doped ITO transparent conductive layer 7' on the third non-water-doped ITO layer 6' by the same process as step d).
  • step f) heating the sample obtained in step e) to 190 ° C, introducing argon gas and oxygen gas, setting the gas flow ratio of argon gas to oxygen to 30:1, maintaining the cavity pressure at 0.3 Pa, and turning on the sputtering power source.
  • the power source has a power density of 2 W/cm 2 , and a second non-water-doped ITO layer 8 is deposited on the first water-doped ITO transparent conductive layer 7 by magnetron sputtering.
  • step f depositing a fourth non-water-doped ITO layer 8' on the second water-doped ITO transparent conductive layer 7' by the same process as step f).
  • the first electrode 9 and the second electrode 9' are screen printed on the second non-water-doped ITO layer 8 and the fourth non-water-doped ITO layer 8', respectively.
  • the solar heterojunction cell organically combines three types of ITO layers.
  • the main structure of the entire laminated ITO transparent conductive material that is, two ITO layers having a relatively large thickness, polycrystalline ITO and amorphous ITO materials are all ITO materials with good light transmittance. This design ensures light transmission.
  • the refractive indices of the polycrystalline ITO, the amorphous ITO, and the microcrystalline ITO layer are different, in the optical trapping and anti-reverse design, by combining the three layers of ITO materials, when the light is incident, it is sequentially passed.
  • the three-layer ITO material with a small change in refractive index enhances the light trapping effect of the solar cell, so that the solar cell has a significantly improved efficiency gain.
  • the laminated ITO conductive layer is more conducive to the transport of current: the carrier concentration of the microcrystalline ITO layer represented by reference numerals 6 and 6' in FIG. 1 is high, and can be as shown in FIG.
  • the amorphous silicon doped layers denoted by reference numerals 3 and 5 achieve good contact.
  • a two-layer doped amorphous silicon layer that is, a phosphorus-doped a-Si:H layer and a boron-doped a-Si:H layer are respectively deposited with a microcrystalline ITO layer, which can improve the two doping
  • the contact between the amorphous silicon layer and the laminated ITO layer makes the battery conduct smoothly.
  • the method for preparing a solar heterojunction cell can avoid the problem that the amorphous silicon film is oxidized during high temperature deposition of ITO. Firstly, the microcrystalline ITO layer and the amorphous water-doped ITO layer are deposited at a low temperature. Since the sample to be deposited is not heated, the reaction rate of the amorphous silicon material with the oxygen in the process gas is relatively slow, reducing the amorphous Oxidation of the silicon layer.
  • the two layers of ITO material of the microcrystalline ITO layer and the amorphous water-doped ITO layer can be used as a protective layer, which can effectively avoid the problem that the amorphous silicon layer is oxidized during high temperature deposition of ITO.

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Abstract

A hetero-junction solar cell, comprising a monocrystalline silicon wafer, and an intrinsic amorphous silicon passivation layer, an amorphous silicon doping layer, a transparent conductive layer of indium tin oxide mixed with water, and an electrode which are sequentially stacked on at least one side of the monocrystalline silicon wafer. A method for preparing a hetero-junction solar cell, comprising: sequentially forming an intrinsic amorphous silicon passivation layer, an amorphous silicon doping layer, a transparent conductive layer of indium tin oxide mixed with water, and an electrode on at least one side of a monocrystalline silicon wafer.

Description

一种太阳能异质结电池及其制备方法Solar heterojunction battery and preparation method thereof 技术领域Technical field
本申请涉及但不限于异质结太阳能电池技术领域，特别涉及但不限于一种太阳能异质结电池及其制备方法。The present application relates to, but is not limited to, the field of heterojunction solar cells, and in particular, but not limited to, a solar heterojunction cell and a method of fabricating the same.
背景技术Background technique
在异质结(Hetero-Junction with intrinsic Thin-layer，HJT)太阳能电池领域，氧化铟锡(Indium tin oxide,ITO)薄膜发挥着重要作用，它不仅负责收集光生载流子，同时还要让多数的太阳光能顺利进入电池体内。性质优良的ITO薄膜具有高的透光率和良好的导电性；另外，在HJT器件中，ITO薄膜是电池的一部分。在器件光学方面，ITO薄膜是电池的陷光减反层；在器件电学方面，ITO薄膜材料性质的好坏可以影响到整个电池在能带方面的匹配，并引起电池开路电压和填充因子的变化。目前，制备ITO材料的方法分为低温(室温)和高温(＞180℃)两种工艺。根据通入反应气体的不同，低温(室温)工艺又可分为常规工艺(工艺过程中，仅通入氩气和氧气)和掺氢工艺(即在室温沉积ITO过程中通入氩气、氧气和氢气来参与反应)。In the field of Hetero-Junction with intrinsic Thin-layer (HJT) solar cells, Indium tin oxide (ITO) film plays an important role. It is not only responsible for collecting photogenerated carriers, but also for the majority. The sunlight can enter the battery body smoothly. The excellent ITO film has high light transmittance and good electrical conductivity; in addition, in the HJT device, the ITO film is a part of the battery. In terms of device optics, the ITO film is the trapping and anti-reflection layer of the battery; in terms of device electrical properties, the properties of the ITO film material can affect the matching of the entire battery in the energy band and cause changes in the open circuit voltage and fill factor of the battery. . At present, the methods for preparing ITO materials are divided into low temperature (room temperature) and high temperature (>180 ° C) processes. According to the different reaction gases, the low temperature (room temperature) process can be divided into the conventional process (in the process, only argon and oxygen are introduced) and the hydrogen doping process (ie, argon gas and oxygen are introduced during the deposition of ITO at room temperature). And hydrogen to participate in the reaction).
发明概述Summary of invention
以下是对本文详细描述的主题的概述。本概述并非是为了限制权利要求的保护范围。The following is an overview of the topics detailed in this document. This Summary is not intended to limit the scope of the claims.
本申请实施方案提供了一种太阳能异质结电池，包括单晶硅片和在所述单晶硅片的至少一侧上依次层叠设置的本征非晶硅钝化层、非晶硅掺杂层、掺水氧化铟锡(ITO)透明导电层以及电极。An embodiment of the present application provides a solar heterojunction cell comprising a single crystal silicon wafer and an intrinsic amorphous silicon passivation layer, amorphous silicon doping, which are sequentially stacked on at least one side of the single crystal silicon wafer. A layer, a water-doped indium tin oxide (ITO) transparent conductive layer, and an electrode.
在一些实施方案中，所述掺水ITO透明导电层的厚度可以在30nm至50nm的范围内。In some embodiments, the water-doped ITO transparent conductive layer may have a thickness in the range of 30 nm to 50 nm.
在一些实施方案中，当所述太阳能异质结电池包括一个掺水ITO透明导电层时，所述太阳能异质结电池还可以包括设置在所述非晶硅层掺杂层与所 述掺水ITO透明导电层之间的不掺水ITO层。In some embodiments, when the solar heterojunction cell includes a water-doped ITO transparent conductive layer, the solar heterojunction cell may further include a doped layer disposed on the amorphous silicon layer and the doped water A non-aqueous ITO layer between the ITO transparent conductive layers.
在一些实施方案中，当所述太阳能异质结电池包括分别设置在单晶硅片两侧的两个掺水ITO透明导电层时，所述太阳能异质结电池还可以包括设置在单晶硅片的至少一侧的、在所述非晶硅层掺杂层与所述掺水ITO透明导电层之间的不掺水ITO层。In some embodiments, when the solar heterojunction cell comprises two water-doped ITO transparent conductive layers respectively disposed on both sides of the single crystal silicon wafer, the solar heterojunction cell may further include a monocrystalline silicon disposed A non-water-doped ITO layer between at least one side of the sheet between the amorphous silicon layer doped layer and the water-doped ITO transparent conductive layer.
在一些实施方案中，设置在所述非晶硅掺杂层与所述掺水ITO透明导电层之间的所述不掺水ITO层可以为微晶态ITO层。In some embodiments, the non-water-doped ITO layer disposed between the amorphous silicon doped layer and the water-doped ITO transparent conductive layer may be a microcrystalline ITO layer.
在一些实施方案中，设置在所述非晶硅掺杂层与所述掺水ITO透明导电层之间的所述不掺水ITO层的厚度可以在2nm至3nm的范围内。In some embodiments, the thickness of the non-water-doped ITO layer disposed between the amorphous silicon doped layer and the water-doped ITO transparent conductive layer may range from 2 nm to 3 nm.
在一些实施方案中，当所述太阳能异质结电池包括一个掺水ITO透明导电层时，所述太阳能异质结电池还可以包括设置在所述掺水ITO透明导电层与所述电极之间的不掺水ITO层。In some embodiments, when the solar heterojunction cell comprises a water-doped ITO transparent conductive layer, the solar heterojunction cell may further comprise a photo-setting ITO transparent conductive layer disposed between the electrode and the electrode The water-free ITO layer.
在一些实施方案中，当所述太阳能异质结电池包括分别设置在单晶硅片两侧的两个掺水ITO透明导电层时，所述太阳能异质结电池还可以包括设置在单晶硅片的至少一侧的、在所述掺水ITO透明导电层与所述电极之间的不掺水ITO层。In some embodiments, when the solar heterojunction cell comprises two water-doped ITO transparent conductive layers respectively disposed on both sides of the single crystal silicon wafer, the solar heterojunction cell may further include a monocrystalline silicon disposed An undoped ITO layer between at least one side of the sheet between the water-doped ITO transparent conductive layer and the electrode.
在一些实施方案中，设置在所述掺水ITO透明导电层与所述电极之间的所述不掺水ITO层可以为多晶态ITO层。In some embodiments, the non-water-doped ITO layer disposed between the water-doped ITO transparent conductive layer and the electrode can be a polycrystalline ITO layer.
在一些实施方案中，设置在所述掺水ITO透明导电层与所述电极之间的所述不掺水ITO层的厚度可以在30nm至50nm范围内。In some embodiments, the thickness of the non-water-doped ITO layer disposed between the water-doped ITO transparent conductive layer and the electrode may range from 30 nm to 50 nm.
在一些实施方案中，所述单晶硅片可以为n型单晶硅片。In some embodiments, the single crystal silicon wafer can be an n-type single crystal silicon wafer.
在一些实施方案中，所述单晶硅片的厚度可以在50μm至300μm范围内。In some embodiments, the thickness of the single crystal silicon wafer may range from 50 μm to 300 μm.
在一些实施方案中，所述本征非晶硅钝化层的厚度可以在1nm至20nm的范围内。In some embodiments, the intrinsic amorphous silicon passivation layer may have a thickness in the range of 1 nm to 20 nm.
在一些实施方案中，所述非晶硅掺杂层的厚度可以在3nm至20nm范围内。In some embodiments, the amorphous silicon doped layer may have a thickness in the range of 3 nm to 20 nm.
在一些实施方案中，当所述太阳能异质结电池包括分别设置在单晶硅片 两侧的两个非晶硅掺杂层时，设置在所述单晶硅片的一侧上的所述非晶硅掺杂层可以为P型非晶硅掺杂层，设置在所述单晶硅片的另一侧上的所述非晶硅掺杂层可以为N型非晶硅掺杂层。In some embodiments, when the solar heterojunction cell comprises two amorphous silicon doped layers respectively disposed on both sides of a single crystal silicon wafer, the one disposed on one side of the single crystal silicon wafer The amorphous silicon doped layer may be a P-type amorphous silicon doped layer, and the amorphous silicon doped layer disposed on the other side of the single crystal silicon wafer may be an N-type amorphous silicon doped layer.
本申请实施方案还提供了一种制备太阳能异质结电池的方法，包括：在单晶硅片的至少一侧上依次形成本征非晶硅钝化层、非晶硅掺杂层、掺水氧化铟锡(ITO)透明导电层以及电极。The embodiment of the present application further provides a method for preparing a solar heterojunction cell, comprising: forming an intrinsic amorphous silicon passivation layer, an amorphous silicon doped layer, and water in sequence on at least one side of a single crystal silicon wafer; Indium tin oxide (ITO) transparent conductive layer and electrode.
在一些实施方案中，当所述太阳能异质结电池包括一个掺水ITO透明导电层时，所述方法还可以包括在所述掺水ITO透明导电层沉积在所述非晶硅掺杂层上之前，将不渗水ITO层沉积在所述非晶硅掺杂层上，并且将所述掺水ITO透明导电层沉积在设置在所述非晶硅掺杂层上的所述不渗水ITO层上。In some embodiments, when the solar heterojunction cell comprises a water-doped ITO transparent conductive layer, the method may further comprise depositing the water-doped ITO transparent conductive layer on the amorphous silicon doped layer Previously, a water-impermeable ITO layer is deposited on the amorphous silicon doped layer, and the water-doped ITO transparent conductive layer is deposited on the water-impermeable ITO layer disposed on the amorphous silicon doped layer. .
在一些实施方案中，当所述太阳能异质结电池包括分别设置在单晶硅片两侧的两个掺水ITO透明导电层时，所述方法还可以包括在所述掺水ITO透明导电层沉积在所述非晶硅掺杂层之前，在所述单晶硅片的至少一侧将不渗水ITO层沉积在所述非晶硅掺杂层上，并且将所述掺水ITO透明导电层沉积在设置在所述非晶硅掺杂层上的所述不渗水ITO层上。In some embodiments, when the solar heterojunction cell comprises two water-doped ITO transparent conductive layers respectively disposed on both sides of a single crystal silicon wafer, the method may further include the water-doped ITO transparent conductive layer Depositing a water-impermeable ITO layer on the amorphous silicon doped layer on at least one side of the single crystal silicon wafer, and depositing the water-doped ITO transparent conductive layer on the at least one side of the amorphous silicon doped layer Deposited on the water impermeable ITO layer disposed on the amorphous silicon doped layer.
在一些实施方案中，当所述太阳能异质结电池包括一个掺水ITO透明导电层时，所述方法还可以包括在所述电极形成在所述掺水ITO透明导电层之前，将不渗水ITO层沉积在所述掺水ITO透明导电层上，并且在设置在所述掺水ITO透明导电层上的所述不渗水ITO层上丝网印刷所述电极。In some embodiments, when the solar heterojunction cell comprises a water-doped ITO transparent conductive layer, the method may further comprise: impervious ITO before the electrode is formed on the water-doped ITO transparent conductive layer A layer is deposited on the water-doped ITO transparent conductive layer, and the electrode is screen printed on the water-impermeable ITO layer disposed on the water-doped ITO transparent conductive layer.
在一些实施方案中，当所述太阳能异质结电池包括分别设置在单晶硅片两侧的两个掺水ITO透明导电层时，所述方法还可以包括在所述电极形成在所述掺水ITO透明导电层之前，在所述单晶硅片的至少一侧将不渗水ITO层沉积在所述掺水ITO透明导电层上，并且在设置在所述掺水ITO透明导电层上的所述不渗水ITO层上丝网印刷所述电极。In some embodiments, when the solar heterojunction cell comprises two water-doped ITO transparent conductive layers respectively disposed on both sides of a single crystal silicon wafer, the method may further include forming the electrode at the doping Before the water ITO transparent conductive layer, a water-impermeable ITO layer is deposited on the water-doped ITO transparent conductive layer on at least one side of the single crystal silicon wafer, and disposed on the water-doped ITO transparent conductive layer The electrode is screen printed on the water impermeable ITO layer.
在一些实施方案中，形成所述掺水ITO透明导电层的步骤可以包括：在室温条件下通入氩气、氧气和水蒸汽，沉积所述掺水ITO透明导电层。In some embodiments, the step of forming the water-doped ITO transparent conductive layer may include depositing the water-doped ITO transparent conductive layer by introducing argon gas, oxygen gas, and water vapor under room temperature conditions.
在一些实施方案中，可以采用磁控溅射法镀膜沉积所述掺水ITO透明导电层，并且其中所述氩气、所述氧气与所述水蒸汽的气体流量比可以在(200:10:1)至(400:10:1)的范围内，沉积时的压力可以在0.1Pa至1Pa 的范围内，溅射电源的功率密度可以在0.5W/cm 2至3W/cm 2的范围内。 In some embodiments, the water-doped ITO transparent conductive layer may be deposited by magnetron sputtering, and wherein the gas flow ratio of the argon gas, the oxygen gas to the water vapor may be (200:10: 1) To the range of (400:10:1), the pressure at the time of deposition may be in the range of 0.1 Pa to 1 Pa, and the power density of the sputtering power source may be in the range of 0.5 W/cm 2 to 3 W/cm 2 .
在一些实施方案中，所述掺水ITO透明导电层的厚度可以在30nm至50nm的范围内。In some embodiments, the water-doped ITO transparent conductive layer may have a thickness in the range of 30 nm to 50 nm.
在一些实施方案中，在沉积所述掺水ITO透明导电层的过程中，可以保持水蒸汽的流量恒定，并且所述水蒸气的流量可以设定在0.1sccm至10sccm的范围内。In some embodiments, during the deposition of the water-doped ITO transparent conductive layer, the flow rate of water vapor can be kept constant, and the flow rate of the water vapor can be set in the range of 0.1 sccm to 10 sccm.
在一些实施方案中，沉积设置在所述非晶硅掺杂层上所述不掺水ITO层的步骤可以包括：在室温条件下，在所述非晶硅掺杂层上沉积不掺水ITO层以形成微晶态的不掺水ITO层。In some embodiments, the depositing the non-aqueous ITO layer disposed on the amorphous silicon doped layer may include depositing water-free ITO on the amorphous silicon doped layer at room temperature. The layers are formed to form a microcrystalline, non-aqueous ITO layer.
在一些实施方案中，可以在室温条件下，通入氩气和氧气，采用磁控溅射法在所述非晶硅掺杂层上沉积不掺水ITO层，其中所述氩气与所述氧气的气体流量比可以在20:1至60:1的范围内，沉积时的压力可以在0.1Pa至2Pa的范围内，溅射电源的功率密度可以在0.5W/cm 2至3W/cm 2的范围内。 In some embodiments, a non-water-doped ITO layer can be deposited on the amorphous silicon doped layer by magnetron sputtering using argon and oxygen at room temperature, wherein the argon gas is The oxygen gas flow ratio may be in the range of 20:1 to 60:1, the deposition pressure may be in the range of 0.1 Pa to 2 Pa, and the sputtering power source may have a power density of 0.5 W/cm 2 to 3 W/cm 2 . In the range.
在一些实施方案中，沉积在所述非晶硅掺杂层上的微晶态的所述不掺水ITO层的厚度可以在2nm至3nm的范围内。In some embodiments, the thickness of the micro-crystalline non-water-doped ITO layer deposited on the amorphous silicon doped layer may range from 2 nm to 3 nm.
在一些实施方案中，在所述掺水ITO透明导电层上沉积不掺水ITO层的步骤可以包括：在高温条件下，在所述掺水ITO透明导电层上沉积不掺水ITO层以形成多晶态的不掺水ITO层。In some embodiments, the step of depositing a non-water-doped ITO layer on the water-doped ITO transparent conductive layer may include depositing a water-free ITO layer on the water-doped ITO transparent conductive layer to form under high temperature conditions. Polycrystalline non-aqueous ITO layer.
在一些实施方案中，可以将待被沉积的样品加热到180℃至200℃的范围内，通入氩气和氧气，采用磁控溅射法在所述掺水ITO透明导电层上沉积不掺水ITO层以形成多晶态的不掺水ITO层，其中所述氩气与所述氧气的气体流量比可以在20:1至60:1的范围内，沉积时的压力可以在0.1Pa至2Pa的范围内，溅射电源的功率密度可以在0.5W/cm 2至3W/cm 2的范围内。 In some embodiments, the sample to be deposited may be heated to a range of 180 ° C to 200 ° C, argon and oxygen are introduced, and the undoped deposition on the water-doped ITO transparent conductive layer is performed by magnetron sputtering. a water ITO layer to form a polycrystalline non-water-doped ITO layer, wherein the gas flow ratio of the argon gas to the oxygen gas may be in the range of 20:1 to 60:1, and the deposition pressure may be 0.1 Pa to The power density of the sputtering power source may range from 0.5 W/cm 2 to 3 W/cm 2 in the range of 2 Pa.
在一些实施方案中，沉积在所述掺水ITO透明导电层上的多晶态的不掺水ITO层的厚度可以在30nm至50nm的范围内。In some embodiments, the thickness of the polycrystalline non-water-doped ITO layer deposited on the water-doped ITO transparent conductive layer can range from 30 nm to 50 nm.
在一些实施方案中，在单晶硅片的至少一侧上依次形成本征非晶硅钝化层、非晶硅掺杂层的步骤可以包括：采用化学气相沉积法沉积所述本征非晶硅钝化层和所述非晶硅掺杂层。In some embodiments, the step of sequentially forming the intrinsic amorphous silicon passivation layer and the amorphous silicon doped layer on at least one side of the single crystal silicon wafer may include depositing the intrinsic amorphous by chemical vapor deposition. a silicon passivation layer and the amorphous silicon doped layer.
在一些实施方案中，当所述太阳能异质结电池包括分别设置在单晶硅片两侧的两个非晶硅掺杂层时，设置在所述单晶硅片的一侧上的所述非晶硅掺杂层可以为P型非晶硅掺杂层，设置在所述单晶硅片的另一侧上的所述非晶硅掺杂层可以为N型非晶硅掺杂层。In some embodiments, when the solar heterojunction cell comprises two amorphous silicon doped layers respectively disposed on both sides of a single crystal silicon wafer, the one disposed on one side of the single crystal silicon wafer The amorphous silicon doped layer may be a P-type amorphous silicon doped layer, and the amorphous silicon doped layer disposed on the other side of the single crystal silicon wafer may be an N-type amorphous silicon doped layer.
在一些实施方案中，所述单晶硅片可以包括n型单晶硅片。In some embodiments, the single crystal silicon wafer can include an n-type single crystal silicon wafer.
在一些实施方案中，所述单晶硅片的厚度可以在50μm至300μm的范围。In some embodiments, the thickness of the single crystal silicon wafer may range from 50 μm to 300 μm.
在一些实施方案中，所述本征非晶硅钝化层的厚度可以在1nm至20nm的范围内。In some embodiments, the intrinsic amorphous silicon passivation layer may have a thickness in the range of 1 nm to 20 nm.
在一些实施方案中，所述非晶硅掺杂层的厚度可以在3nm至20nm的范围内。In some embodiments, the amorphous silicon doped layer may have a thickness in the range of 3 nm to 20 nm.
本申请的其它特征和优点将在随后的说明书中阐述，并且，部分地从说明书中变得更加清楚明白，或者通过实施本申请而了解。本申请的目的和其他优点可通过在说明书、权利要求书以及附图中所特别指出的结构来实现和获得。Other features and advantages of the present application will be set forth in the description which follows. The objectives and other advantages of the present invention can be realized and obtained by the structure of the invention.
附图概述BRIEF abstract
附图用来提供对本申请技术方案的进一步理解，并且构成说明书的一部分，与本申请的实施例一起用于解释本申请的技术方案，并不构成对本申请技术方案的限制。The drawings are used to provide a further understanding of the technical solutions of the present application, and constitute a part of the specification, which is used together with the embodiments of the present application to explain the technical solutions of the present application, and does not constitute a limitation of the technical solutions of the present application.
图1为本申请实施例的太阳能异质结电池的结构示意图。FIG. 1 is a schematic structural view of a solar heterojunction battery according to an embodiment of the present application.
图2为不同ITO样品的透过曲线，其中“微晶”代表采用低温常规工艺制备的ITO，“非晶”代表采用低温掺氢工艺制备的ITO，“多晶”代表采用高温工艺制备的ITO，“本申请实施例”代表本申请一实施例的叠层ITO。Figure 2 shows the transmission curves of different ITO samples, in which "microcrystalline" represents ITO prepared by a low temperature conventional process, "amorphous" represents ITO prepared by a low temperature hydrogen doping process, and "polycrystalline" represents ITO prepared by a high temperature process. "Inventive Example" represents a laminated ITO according to an embodiment of the present application.
图3为图2的短波波段的局部细节放大图。FIG. 3 is an enlarged partial detail view of the short wave band of FIG. 2. FIG.
图4为图2的长波波段的局部细节放大图。4 is an enlarged partial detail view of the long wave band of FIG. 2.
图5为沉积有不同ITO的硅片表面反射率曲线，其中“微晶”代表采用低温常规工艺制备的ITO，“非晶”代表采用低温掺氢工艺制备的ITO，“多 晶”代表采用高温工艺制备的ITO，“本申请实施例”代表本申请一实施例HJT太阳能电池中的叠层ITO。Figure 5 is a surface reflectance curve of a silicon wafer deposited with different ITOs, wherein "microcrystalline" represents ITO prepared by a low temperature conventional process, "amorphous" represents ITO prepared by a low temperature hydrogen doping process, and "polycrystalline" represents a high temperature. The ITO prepared by the process, "the embodiment of the present application" represents the laminated ITO in the HJT solar cell of an embodiment of the present application.
图6为图5的短波波段的局部细节放大图。FIG. 6 is an enlarged partial detail view of the short wave band of FIG. 5. FIG.
图7为图5的中长波波段的局部细节放大图。FIG. 7 is an enlarged partial detail view of the medium long wave band of FIG. 5. FIG.
详述Detailed
为使本申请的目的、技术方案和优点更加清楚明白，下文中将结合附图对本申请的实施例进行详细说明。需要说明的是，在不冲突的情况下，本申请中的实施例及实施例中的特征可以相互任意组合。In order to make the objects, technical solutions and advantages of the present application more clear, the embodiments of the present application will be described in detail below with reference to the accompanying drawings. It should be noted that, in the case of no conflict, the features in the embodiments and the embodiments in the present application may be arbitrarily combined with each other.
本申请中，将掺水工艺制备的ITO透明导电层定义为掺水ITO透明导电层，常规的不掺水工艺制备的ITO透明导电层定义为不掺水ITO透明导电层。In the present application, the ITO transparent conductive layer prepared by the water mixing process is defined as a water-doped ITO transparent conductive layer, and the conventional ITO transparent conductive layer prepared by the non-water mixing process is defined as a water-free ITO transparent conductive layer.
本申请的发明人在研究异质结太阳能电池的过程中，深入发现了常规工艺制备获得的ITO材料存在一些问题，包括：In the process of studying the heterojunction solar cell, the inventors of the present application have deeply discovered that there are some problems in the ITO material obtained by the conventional process, including:
一般情况下，室温下的常规工艺，即在室温沉积ITO过程中仅通入氩气和氧气，制备的ITO为微晶态的材料，这种微晶态ITO材料的载流子浓度高，相应的微晶态ITO材料的透光率稍差一些。Under normal circumstances, the conventional process at room temperature, that is, only argon gas and oxygen are introduced during the deposition of ITO at room temperature, and the prepared ITO is a microcrystalline material. The carrier concentration of the microcrystalline ITO material is high, correspondingly The light transmittance of the microcrystalline ITO material is slightly worse.
室温下的掺氢工艺，即在室温沉积ITO过程中通入氩气、氧气和氢气来参与的反应可以改变ITO材料的晶化程度，使得ITO由原来常规工艺，即不通氢气的工艺制备的微晶态转变为非晶态。这种非晶态ITO材料的透光性能和高温工艺制备的多晶态ITO材料的透光率几乎一样。但掺氢工艺制备的非晶态ITO材料的折射率(n)比较大，作为太阳能电池的透明导电层时，陷光减反效果会略差一些。The hydrogen-doping process at room temperature, that is, the reaction of argon gas, oxygen gas and hydrogen gas during the deposition of ITO at room temperature can change the degree of crystallization of the ITO material, so that the ITO is prepared by the conventional process, that is, the process of not passing hydrogen gas. The crystalline state changes to an amorphous state. The light transmission properties of this amorphous ITO material are almost the same as those of the polycrystalline ITO material prepared by the high temperature process. However, the refractive index (n) of the amorphous ITO material prepared by the hydrogen-doping process is relatively large. When used as a transparent conductive layer of a solar cell, the effect of trapping light is slightly worse.
高温下制备的ITO材料为多晶态的ITO。高温工艺的工艺可控性、制备出的ITO材料导电性和透光率均能满足太阳能电池的要求。目前这种制备ITO材料的方法被多数的企业和研究单位所采用。然而，这种材料也不是完美的，在工艺和电池结构设计方面也存在很大的优化空间。The ITO material prepared at a high temperature is polycrystalline ITO. The process controllability of the high-temperature process, the conductivity and transmittance of the prepared ITO material can meet the requirements of the solar cell. This method of preparing ITO materials is currently used by most companies and research institutes. However, this material is not perfect, there is also a lot of optimization space in the process and battery structure design.
太阳能电池结构的核心是4层非晶硅材料：分别设置在单晶硅片两侧的两个本征非晶硅钝化层、和分别设置在两个本征非晶硅钝化层上的非晶硅掺 杂层，其中，本征非晶硅钝化层用作钝化层，两个非晶硅掺杂层分别用作背场和电池发射极。这4层非晶硅层的厚度都不超过20nm，且性质相对不稳定。若是将已经完成4层非晶硅制备后的电池放到高温环境中，非晶硅的性质极其容易变化。The core of the solar cell structure is a 4-layer amorphous silicon material: two intrinsic amorphous silicon passivation layers respectively disposed on both sides of the single crystal silicon wafer, and respectively disposed on the two intrinsic amorphous silicon passivation layers. An amorphous silicon doped layer in which an intrinsic amorphous silicon passivation layer is used as a passivation layer, and two amorphous silicon doped layers are used as a back field and a battery emitter, respectively. The thickness of the four amorphous silicon layers does not exceed 20 nm, and the properties are relatively unstable. If the battery after the preparation of the four layers of amorphous silicon has been placed in a high temperature environment, the properties of the amorphous silicon are extremely easy to change.
目前主流的太阳能电池的制备流程中，先将4层非晶硅层与单晶硅片通过常规方法形成待沉积ITO的一样品，然后进入ITO沉积工艺流程。沉积ITO可选用低温常规工艺、掺氢工艺或者高温沉积工艺。从效果上看，低温常规工艺制备ITO的电池电流低，掺氢工艺制备ITO的电池填充因子低，高温工艺制备的ITO电池开压不高。尤其在高温ITO沉积工艺中，腔体内会通入有大量氧气，4层非晶硅层很容易在高温ITO沉积过程中被氧化；加上沉积ITO的工艺腔体内还有很多高能的等离子体，非晶硅薄膜更容易被氧化和破坏。In the current preparation process of the mainstream solar cell, a sample of the ITO deposition process is formed by forming a sample of the ITO to be deposited by a conventional method using four layers of the amorphous silicon layer and the single crystal silicon wafer. The deposited ITO can be selected from a low temperature conventional process, a hydrogen doping process, or a high temperature deposition process. From the effect point of view, the battery current of ITO prepared by low temperature conventional process is low, the filling factor of ITO prepared by hydrogen doping process is low, and the opening pressure of ITO battery prepared by high temperature process is not high. Especially in the high-temperature ITO deposition process, a large amount of oxygen is introduced into the cavity, and four amorphous silicon layers are easily oxidized during high-temperature ITO deposition; in addition, there are many high-energy plasmas in the process chamber for depositing ITO. Amorphous silicon films are more susceptible to oxidation and destruction.
本申请的发明人发现，在制备非晶态ITO的过程中通入一定量的水蒸汽来参与反应，所制备的掺水ITO透明导电层的性能比常规的ITO层的性能有所提高，可以获得迁移率高，载流子浓度低的掺水ITO薄膜。掺水ITO透明导电层具有良好的光透过性能，且使用该掺水ITO透明导电层制备的HJT太阳能电池的短路电流良好，因此掺水ITO透明导电层可用作异质结太阳能电池中的透明导电层。The inventors of the present application found that in the process of preparing amorphous ITO, a certain amount of water vapor is introduced to participate in the reaction, and the performance of the prepared water-doped ITO transparent conductive layer is improved compared with the performance of the conventional ITO layer. A water-doped ITO film having a high mobility and a low carrier concentration was obtained. The water-doped ITO transparent conductive layer has good light transmission performance, and the short-circuit current of the HJT solar cell prepared by using the water-doped ITO transparent conductive layer is good, so the water-doped ITO transparent conductive layer can be used as a heterojunction solar cell. Transparent conductive layer.
本申请的发明人经大量实验和理论上的研究，创造性地提出了一种组合设计：在完成4层非晶硅沉积后，在两个非晶硅掺杂层上，依次沉积可在室温使用常规工艺制备得到的微晶态不掺水ITO层、可在室温使用掺水工艺制备得到的非晶态掺水ITO层和可在高温使用常规工艺制备得到的多晶态不掺水ITO层。The inventors of the present application have creatively proposed a combined design after extensive experimental and theoretical research: after completing four layers of amorphous silicon deposition, on two amorphous silicon doped layers, successive deposition can be used at room temperature. The microcrystalline non-water-doped ITO layer prepared by the conventional process, the amorphous water-doped ITO layer prepared by using a water-doping process at room temperature, and the polycrystalline non-water-doped ITO layer which can be prepared by a conventional process at a high temperature.
这种采用3种特定ITO的特定排列组合来制备得到的HJT太阳能电池，与目前的多数研发和生产机构采用单一类型的常规的ITO制备得到的HJT太阳能电池相比，提高了电池的效率。这样的ITO的特定组合选用微晶态不掺水ITO层沉积在非晶硅掺杂层上，可以使微晶态不掺水ITO与掺杂的非晶硅有很好的功函数匹配，以使微晶态ITO层跟掺杂非晶硅层实现很好的接触。这样的ITO的特定组合选用多晶态不掺水ITO层以将电极丝网印刷到该多晶态不掺水ITO层上，可以使多晶态不掺水ITO与电极有很好的功函数匹配， 可实现电极与多晶态不掺水ITO层很好的接触。这样的ITO的特定组合具有良好的光透过性能、开路电压和填充因子。The HJT solar cell prepared by using a specific arrangement of three specific ITOs improves the efficiency of the battery compared with the HJT solar cell prepared by a majority of current research and development organizations using a single type of conventional ITO. The specific combination of such ITO is deposited on the amorphous silicon doped layer by using a microcrystalline non-doped ITO layer, so that the microcrystalline non-doped ITO has a good work function matching with the doped amorphous silicon. The microcrystalline ITO layer is in good contact with the doped amorphous silicon layer. Such a specific combination of ITO uses a polycrystalline non-water-doped ITO layer to screen the electrode onto the polycrystalline non-water-doped ITO layer, so that the polycrystalline non-doped ITO and the electrode have a good work function. Matching, the electrode can be in good contact with the polycrystalline non-water-doped ITO layer. Such specific combinations of ITOs have good light transmission properties, open circuit voltages, and fill factors.
本申请实施例提供了一种利用掺水ITO透明导电层制备的太阳能异质结电池及其制备方法，从而有效解决了常规的ITO导电层透光率不高、陷光减反效果差、以及高温沉积ITO过程中非晶硅膜被氧化等问题。The embodiment of the present application provides a solar heterojunction cell prepared by using a water-doped ITO transparent conductive layer and a preparation method thereof, thereby effectively solving the problem that the conventional ITO conductive layer has low light transmittance, poor light trapping effect, and The amorphous silicon film is oxidized during high temperature deposition of ITO.
本申请实施例提供了一种太阳能异质结电池，包括单晶硅片和在所述单晶硅片的至少一侧上依次层叠设置的本征非晶硅钝化层、非晶硅掺杂层、掺水氧化铟锡(ITO)透明导电层以及电极。The embodiment of the present application provides a solar heterojunction cell, comprising a single crystal silicon wafer and an intrinsic amorphous silicon passivation layer and amorphous silicon doping layer which are sequentially stacked on at least one side of the single crystal silicon wafer. A layer, a water-doped indium tin oxide (ITO) transparent conductive layer, and an electrode.
与常规的ITO透明导电层相比，采用掺水ITO作为HJT太阳能电池的透明导电层，可以获得迁移率高，载流子浓度低的掺水ITO薄膜。该掺水ITO透明导电层具有良好的光透过性能，且使用该掺水ITO透明导电层制备的HJT太阳能电池的短路电流良好。Compared with the conventional ITO transparent conductive layer, water-doped ITO is used as the transparent conductive layer of the HJT solar cell, and a water-doped ITO film having high mobility and low carrier concentration can be obtained. The water-doped ITO transparent conductive layer has good light transmission performance, and the short-circuit current of the HJT solar cell prepared using the water-doped ITO transparent conductive layer is good.
在一示例性实施例中，所述掺水ITO透明导电层的厚度可以在30nm至50nm的范围内。In an exemplary embodiment, the water-doped ITO transparent conductive layer may have a thickness in the range of 30 nm to 50 nm.
在一示例性实施例中，当所述太阳能异质结电池包括一个掺水ITO透明导电层时，所述太阳能异质结电池还可以包括设置在所述非晶硅层掺杂层与所述掺水ITO透明导电层之间的不掺水ITO层。In an exemplary embodiment, when the solar heterojunction cell includes a water-doped ITO transparent conductive layer, the solar heterojunction cell may further include a doped layer disposed on the amorphous silicon layer and the A water-free ITO layer between the water-doped ITO transparent conductive layers.
在一示例性实施例中，当所述太阳能异质结电池包括分别设置在单晶硅片两侧的两个掺水ITO透明导电层时，所述太阳能异质结电池还可以包括设置在单晶硅片的至少一侧的、在所述非晶硅层掺杂层与所述掺水ITO透明导电层之间的不掺水ITO层。In an exemplary embodiment, when the solar heterojunction cell includes two water-doped ITO transparent conductive layers respectively disposed on two sides of the single crystal silicon wafer, the solar heterojunction battery may further include a single a non-water-doped ITO layer between the amorphous silicon layer doped layer and the water-doped ITO transparent conductive layer on at least one side of the crystalline silicon wafer.
在一示例性实施例中，设置在所述非晶硅掺杂层与所述掺水ITO透明导电层之间的所述不掺水ITO层可以为微晶态ITO层。In an exemplary embodiment, the non-water-doped ITO layer disposed between the amorphous silicon doped layer and the water-doped ITO transparent conductive layer may be a microcrystalline ITO layer.
在一示例性实施例中，设置在所述非晶硅掺杂层与所述掺水ITO透明导电层之间的所述不掺水ITO层的厚度可以在2nm至3nm的范围内。In an exemplary embodiment, the thickness of the non-water-doped ITO layer disposed between the amorphous silicon doped layer and the water-doped ITO transparent conductive layer may range from 2 nm to 3 nm.
在一示例性实施例中，当所述太阳能异质结电池包括一个掺水ITO透明导电层时，所述太阳能异质结电池还可以包括设置在所述掺水ITO透明导电层与所述电极之间的不掺水ITO层。In an exemplary embodiment, when the solar heterojunction cell includes a water-doped ITO transparent conductive layer, the solar heterojunction cell may further include the water-doped ITO transparent conductive layer and the electrode. There is no water ITO layer between them.
在一示例性实施例中，当所述太阳能异质结电池包括分别设置在单晶硅片两侧的两个掺水ITO透明导电层时，所述太阳能异质结电池还可以包括设置在单晶硅片的至少一侧的、在所述掺水ITO透明导电层与所述电极之间的不掺水ITO层。In an exemplary embodiment, when the solar heterojunction cell includes two water-doped ITO transparent conductive layers respectively disposed on two sides of the single crystal silicon wafer, the solar heterojunction battery may further include a single a non-water-doped ITO layer between the water-doped ITO transparent conductive layer and the electrode on at least one side of the crystalline silicon wafer.
在一示例性实施例中，设置在所述掺水ITO透明导电层与所述电极之间的所述不掺水ITO层可以为多晶态ITO层。In an exemplary embodiment, the non-water-doped ITO layer disposed between the water-doped ITO transparent conductive layer and the electrode may be a polycrystalline ITO layer.
在一示例性实施例中，设置在所述掺水ITO透明导电层与所述电极之间的所述不掺水ITO层的厚度可以在30nm至50nm范围内。In an exemplary embodiment, the thickness of the non-water-doped ITO layer disposed between the water-doped ITO transparent conductive layer and the electrode may range from 30 nm to 50 nm.
本申请示例性实施例提供的太阳能电池，有机地结合了3种类型ITO层。在光学设计上，采用3种特定ITO的特定排列组合形成整个ITO材料。多晶态ITO和非晶态ITO材料均是透光率较好的ITO材料以保证光的透过率。而且，由于多晶态ITO、非晶态ITO、微晶态ITO层的折射率存在差异，因此在光学陷光减反设计上，通过组合这三层ITO材料，使得当光入射时，依次经过折射率从小到大变化的三层ITO材料，使太阳能电池的陷光效果得到增强，从而使太阳能电池具有明显提高的效率增益。在电学设计上，整个ITO导电层更有利于电流的输运。微晶态ITO层的载流子浓度高，因此微晶态ITO层可以非晶硅掺杂层实现很好的接触。The solar cell provided by the exemplary embodiment of the present application organically combines three types of ITO layers. In optical design, the entire ITO material is formed using a specific combination of three specific ITO combinations. Both polycrystalline ITO and amorphous ITO materials are ITO materials with good light transmittance to ensure light transmittance. Moreover, since the refractive indices of the polycrystalline ITO, the amorphous ITO, and the microcrystalline ITO layer are different, in the optical trapping and anti-reverse design, by combining the three layers of ITO materials, when the light is incident, it is sequentially passed. The three-layer ITO material with a small change in refractive index enhances the light trapping effect of the solar cell, so that the solar cell has a significantly improved efficiency gain. In electrical design, the entire ITO conductive layer is more conducive to the transport of current. The microcrystalline ITO layer has a high carrier concentration, so the microcrystalline ITO layer can achieve good contact with the amorphous silicon doped layer.
在一示例性实施例中，所述单晶硅片可以为n型单晶硅片In an exemplary embodiment, the single crystal silicon wafer may be an n-type single crystal silicon wafer.
在一示例性实施例中，所述单晶硅片的厚度可以在50μm至300μm范围内。In an exemplary embodiment, the thickness of the single crystal silicon wafer may range from 50 μm to 300 μm.
在一示例性实施例中，所述本征非晶硅钝化层的厚度可以在1nm至20nm的范围内。In an exemplary embodiment, the intrinsic amorphous silicon passivation layer may have a thickness in the range of 1 nm to 20 nm.
在一示例性实施例中，所述非晶硅掺杂层的厚度可以在3nm至20nm范围内。In an exemplary embodiment, the amorphous silicon doped layer may have a thickness in the range of 3 nm to 20 nm.
在一示例性实施例中，当所述太阳能异质结电池包括分别设置在单晶硅片两侧的两个非晶硅掺杂层时，设置在所述单晶硅片的一侧上的所述非晶硅掺杂层可以为P型非晶硅掺杂层，设置在所述单晶硅片的另一侧上的所述非晶硅掺杂层可以为N型非晶硅掺杂层。In an exemplary embodiment, when the solar heterojunction cell includes two amorphous silicon doped layers respectively disposed on both sides of the single crystal silicon wafer, disposed on one side of the single crystal silicon wafer The amorphous silicon doped layer may be a P-type amorphous silicon doped layer, and the amorphous silicon doped layer disposed on the other side of the single crystal silicon wafer may be N-type amorphous silicon doped Floor.
本申请实施例还提供了一种制备太阳能异质结电池的方法，包括：在单晶硅片的至少一侧上依次形成本征非晶硅钝化层、非晶硅掺杂层、掺水氧化铟锡(ITO)透明导电层以及电极。The embodiment of the present application further provides a method for preparing a solar heterojunction cell, comprising: forming an intrinsic amorphous silicon passivation layer, an amorphous silicon doped layer, and water in sequence on at least one side of the single crystal silicon wafer; Indium tin oxide (ITO) transparent conductive layer and electrode.
采用上述方法制备的太阳能异质结电池具有良好的光透过性能，并且太阳能电池的短路电流良好。The solar heterojunction cell prepared by the above method has good light transmission performance, and the short circuit current of the solar cell is good.
在一示例性实施例中，当所述太阳能异质结电池包括一个掺水ITO透明导电层时，所述方法还可以包括在所述掺水ITO透明导电层沉积在所述非晶硅掺杂层上之前，将不渗水ITO层沉积在所述非晶硅掺杂层上，并且将所述掺水ITO透明导电层沉积在设置在所述非晶硅掺杂层上的所述不渗水ITO层上。In an exemplary embodiment, when the solar heterojunction cell includes a water-doped ITO transparent conductive layer, the method may further include depositing the amorphous silicon doping on the water-doped ITO transparent conductive layer. Before the layer, a water-impermeable ITO layer is deposited on the amorphous silicon doped layer, and the water-doped ITO transparent conductive layer is deposited on the non-permeable ITO disposed on the amorphous silicon doped layer. On the floor.
在一示例性实施例中，当所述太阳能异质结电池包括分别设置在单晶硅片两侧的两个掺水ITO透明导电层时，所述方法还可以包括在所述掺水ITO透明导电层沉积在所述非晶硅掺杂层之前，在所述单晶硅片的至少一侧将不渗水ITO层沉积在所述非晶硅掺杂层上，并且将所述掺水ITO透明导电层沉积在设置在所述非晶硅掺杂层上的所述不渗水ITO层上。In an exemplary embodiment, when the solar heterojunction cell includes two water-doped ITO transparent conductive layers respectively disposed on both sides of a single crystal silicon wafer, the method may further include transparently coating the water-doped ITO Depositing a conductive layer on the amorphous silicon doped layer, depositing a water-impermeable ITO layer on the amorphous silicon doped layer on at least one side of the single crystal silicon wafer, and transparently coating the water-doped ITO A conductive layer is deposited on the water impermeable ITO layer disposed on the amorphous silicon doped layer.
在一示例性实施例中，当所述太阳能异质结电池包括一个掺水ITO透明导电层时，所述方法还可以包括在所述电极形成在所述掺水ITO透明导电层之前，将不渗水ITO层沉积在所述掺水ITO透明导电层上，并且在设置在所述掺水ITO透明导电层上的所述不渗水ITO层上丝网印刷所述电极。In an exemplary embodiment, when the solar heterojunction cell includes a water-doped ITO transparent conductive layer, the method may further include: before the electrode is formed on the water-doped ITO transparent conductive layer, A water permeable ITO layer is deposited on the water-doped ITO transparent conductive layer, and the electrode is screen printed on the water-impermeable ITO layer disposed on the water-doped ITO transparent conductive layer.
在一示例性实施例中，当所述太阳能异质结电池包括分别设置在单晶硅片两侧的两个掺水ITO透明导电层时，所述方法还可以包括在所述电极形成在所述掺水ITO透明导电层之前，在所述单晶硅片的至少一侧将不渗水ITO层沉积在所述掺水ITO透明导电层上，并且在设置在所述掺水ITO透明导电层上的所述不渗水ITO层上丝网印刷所述电极。In an exemplary embodiment, when the solar heterojunction cell includes two water-doped ITO transparent conductive layers respectively disposed on both sides of a single crystal silicon wafer, the method may further include forming the electrode at the Before the water-doped ITO transparent conductive layer, a water-impermeable ITO layer is deposited on the water-doped ITO transparent conductive layer on at least one side of the single crystal silicon wafer, and is disposed on the water-doped ITO transparent conductive layer The electrode is screen printed on the water impermeable ITO layer.
采用上述方法制备太阳能异质结电池可避免高温沉积ITO过程中非晶硅膜被氧化的问题。首先在低温下沉积微晶态ITO层和非晶态的掺水ITO层，由于待被沉积的样品没有被加热，非晶硅材料与工艺气体中的氧气的反应速率比较慢，减少了非晶硅层的氧化问题。因此，微晶态ITO层和非晶态的掺水ITO层这两层ITO材料可以作为保护层，可以有效避免高温沉积ITO过程 中非晶硅层被氧化的问题。The solar heterojunction cell prepared by the above method can avoid the problem that the amorphous silicon film is oxidized during high temperature deposition of ITO. Firstly, the microcrystalline ITO layer and the amorphous water-doped ITO layer are deposited at a low temperature. Since the sample to be deposited is not heated, the reaction rate of the amorphous silicon material with the oxygen in the process gas is relatively slow, reducing the amorphous Oxidation of the silicon layer. Therefore, the two layers of ITO material of the microcrystalline ITO layer and the amorphous water-doped ITO layer can be used as a protective layer, which can effectively avoid the problem that the amorphous silicon layer is oxidized during high temperature deposition of ITO.
在一示例性实施例中，形成所述掺水ITO透明导电层的步骤可以包括：在室温条件下通入氩气、氧气和水蒸汽，沉积所述掺水ITO透明导电层。In an exemplary embodiment, the step of forming the water-doped ITO transparent conductive layer may include depositing the water-doped ITO transparent conductive layer by introducing argon gas, oxygen gas, and water vapor under room temperature conditions.
在一示例性实施例中，可以采用磁控溅射法镀膜沉积所述掺水ITO透明导电层，并且其中所述氩气、所述氧气与所述水蒸汽的气体流量比可以在(200:10:1)至(400:10:1)的范围内，沉积时的压力可以在0.1Pa至1Pa的范围内，溅射电源的功率密度可以在0.5W/cm 2至3W/cm 2的范围内。 In an exemplary embodiment, the water-doped ITO transparent conductive layer may be deposited by magnetron sputtering, and wherein the gas flow ratio of the argon gas, the oxygen gas to the water vapor may be (200: In the range of 10:1) to (400:10:1), the pressure during deposition may be in the range of 0.1 Pa to 1 Pa, and the power density of the sputtering power source may be in the range of 0.5 W/cm 2 to 3 W/cm 2 . Inside.
在一示例性实施例中，所述掺水ITO透明导电层的厚度可以在30nm至50nm的范围内。In an exemplary embodiment, the water-doped ITO transparent conductive layer may have a thickness in the range of 30 nm to 50 nm.
在一示例性实施例中，在沉积所述掺水ITO透明导电层的过程中，可以保持水蒸汽的流量恒定，并且所述水蒸气的流量可以设定在0.1sccm至10sccm的范围内。In an exemplary embodiment, in the process of depositing the water-doped ITO transparent conductive layer, the flow rate of water vapor may be kept constant, and the flow rate of the water vapor may be set in a range of 0.1 sccm to 10 sccm.
在一示例性实施例中，沉积设置在所述非晶硅掺杂层上所述不掺水ITO层的步骤可以包括：在室温条件下，在所述非晶硅掺杂层上沉积不掺水ITO层以形成微晶态的不掺水ITO层。In an exemplary embodiment, the depositing the non-water-doped ITO layer disposed on the amorphous silicon doped layer may include depositing an undoped layer on the amorphous silicon doped layer at room temperature. The water ITO layer is formed to form a microcrystalline state without a water-doped ITO layer.
在一示例性实施例中，可以在室温条件下，通入氩气和氧气，采用磁控溅射法在所述非晶硅掺杂层上沉积不掺水ITO层，其中所述氩气与所述氧气的气体流量比可以在20:1至60:1的范围内，沉积时的压力可以在0.1Pa至2Pa的范围内，溅射电源的功率密度可以在0.5W/cm 2至3W/cm 2的范围内。 In an exemplary embodiment, a non-aqueous ITO layer may be deposited on the amorphous silicon doped layer by magnetron sputtering under argon and oxygen at room temperature, wherein the argon gas is The oxygen gas flow ratio may be in the range of 20:1 to 60:1, the deposition pressure may be in the range of 0.1 Pa to 2 Pa, and the sputtering power source may have a power density of 0.5 W/cm 2 to 3 W/ Within the range of cm 2 .
在一示例性实施例中，沉积在所述非晶硅掺杂层上的微晶态的所述不掺水ITO层的厚度可以在2nm至3nm的范围内。In an exemplary embodiment, the thickness of the micro-crystalline non-water-doped ITO layer deposited on the amorphous silicon doped layer may range from 2 nm to 3 nm.
在一示例性实施例中，在所述掺水ITO透明导电层上沉积不掺水ITO层的步骤可以包括：在高温条件下，在所述掺水ITO透明导电层上沉积不掺水ITO层以形成多晶态的不掺水ITO层。In an exemplary embodiment, the step of depositing a non-water-doped ITO layer on the water-doped ITO transparent conductive layer may include depositing a water-free ITO layer on the water-doped ITO transparent conductive layer under high temperature conditions. To form a polycrystalline, non-water-doped ITO layer.
在一示例性实施例中，可以将待被沉积的样品加热到180℃至200℃的范围内，通入氩气和氧气，采用磁控溅射法在所述掺水ITO透明导电层上沉积不掺水ITO层以形成多晶态的不掺水ITO层，其中所述氩气与所述氧气的气体流量比可以在20:1至60:1的范围内，沉积时的压力可以在0.1Pa至2Pa 的范围内，溅射电源的功率密度可以在0.5W/cm 2至3W/cm 2的范围内。 In an exemplary embodiment, the sample to be deposited may be heated to a range of 180 ° C to 200 ° C, argon and oxygen are introduced, and deposited on the water-doped ITO transparent conductive layer by magnetron sputtering. The ITO layer is not doped to form a polycrystalline non-water-doped ITO layer, wherein the gas flow ratio of the argon gas to the oxygen gas may be in the range of 20:1 to 60:1, and the deposition pressure may be 0.1. The power density of the sputtering power source may range from 0.5 W/cm 2 to 3 W/cm 2 in the range of Pa to 2 Pa.
在一示例性实施例中，沉积在所述掺水ITO透明导电层上的多晶态的不掺水ITO层的厚度可以在30nm至50nm的范围内。In an exemplary embodiment, the thickness of the polycrystalline non-water-doped ITO layer deposited on the water-doped ITO transparent conductive layer may range from 30 nm to 50 nm.
在一示例性实施例中，在单晶硅片的至少一侧上依次形成本征非晶硅钝化层、非晶硅掺杂层的步骤可以包括：采用化学气相沉积法沉积所述本征非晶硅钝化层和所述非晶硅掺杂层。In an exemplary embodiment, the step of sequentially forming an intrinsic amorphous silicon passivation layer and an amorphous silicon doped layer on at least one side of the single crystal silicon wafer may include depositing the intrinsic by chemical vapor deposition An amorphous silicon passivation layer and the amorphous silicon doped layer.
在一示例性实施例中，当所述太阳能异质结电池包括分别设置在单晶硅片两侧的两个非晶硅掺杂层时，设置在所述单晶硅片的一侧上的所述非晶硅掺杂层可以为P型非晶硅掺杂层，设置在所述单晶硅片的另一侧上的所述非晶硅掺杂层可以为N型非晶硅掺杂层。In an exemplary embodiment, when the solar heterojunction cell includes two amorphous silicon doped layers respectively disposed on both sides of the single crystal silicon wafer, disposed on one side of the single crystal silicon wafer The amorphous silicon doped layer may be a P-type amorphous silicon doped layer, and the amorphous silicon doped layer disposed on the other side of the single crystal silicon wafer may be N-type amorphous silicon doped Floor.
在一示例性实施例中，所述单晶硅片可以包括n型单晶硅片。In an exemplary embodiment, the single crystal silicon wafer may include an n-type single crystal silicon wafer.
在一示例性实施例中，所述单晶硅片的厚度可以在50μm至300μm的范围。In an exemplary embodiment, the thickness of the single crystal silicon wafer may range from 50 μm to 300 μm.
在一示例性实施例中，所述本征非晶硅钝化层的厚度可以在1nm至20nm的范围内。In an exemplary embodiment, the intrinsic amorphous silicon passivation layer may have a thickness in the range of 1 nm to 20 nm.
在一示例性实施例中，所述非晶硅掺杂层的厚度可以在3nm至20nm的范围内。In an exemplary embodiment, the amorphous silicon doped layer may have a thickness in the range of 3 nm to 20 nm.
图1是根据本申请一示例性实施例的HJT异质结电池的结构示意图。该HJT异质结电池从上至下依次包括第一电极9、第二不掺水ITO层8、第一掺水ITO透明导电层7、第一不掺水ITO层6、磷掺杂的a-Si:H(n)层3、第一本征非晶硅钝化层2、n型单晶硅片1、第二本征非晶硅钝化层4、硼掺杂的a-Si:H(p)层5、第三不掺水ITO层6’、第二掺水ITO透明导电层7’、第四不掺水ITO层8’和第二电极9’，其中，1 is a schematic structural view of an HJT heterojunction cell according to an exemplary embodiment of the present application. The HJT heterojunction cell comprises, in order from top to bottom, a first electrode 9, a second non-doped ITO layer 8, a first water-doped ITO transparent conductive layer 7, a first non-doped ITO layer 6, and a phosphorus-doped a. -Si:H(n) layer 3, first intrinsic amorphous silicon passivation layer 2, n-type single crystal silicon wafer 1, second intrinsic amorphous silicon passivation layer 4, boron-doped a-Si: H(p) layer 5, third non-water-doped ITO layer 6', second water-doped ITO transparent conductive layer 7', fourth non-water-doped ITO layer 8' and second electrode 9', wherein
所述n型单晶硅片1的厚度为180μm；The thickness of the n-type single crystal silicon wafer 1 is 180 μm;
所述第一本征非晶硅钝化层2的厚度为5nm；The first intrinsic amorphous silicon passivation layer 2 has a thickness of 5 nm;
所述第二本征非晶硅钝化层4的厚度为5nm；The second intrinsic amorphous silicon passivation layer 4 has a thickness of 5 nm;
所述磷掺杂的a-Si:H(n)层3的厚度为7nm；The thickness of the phosphorus-doped a-Si:H(n) layer 3 is 7 nm;
所述硼掺杂的a-Si:H(p)层5的厚度为7nm；The boron-doped a-Si:H(p) layer 5 has a thickness of 7 nm;
所述第一不掺水ITO层6和所述第三不掺水ITO层6’均为微晶态ITO层，厚度均为2nm；The first non-doped ITO layer 6 and the third non-doped ITO layer 6' are both microcrystalline ITO layers, each having a thickness of 2 nm;
所述第二不掺水ITO层8和所述第四不掺水ITO层8’均为多晶态的ITO层，厚度均为30nm；The second non-water-doped ITO layer 8 and the fourth non-water-doped ITO layer 8' are both polycrystalline ITO layers, each having a thickness of 30 nm;
所述第一掺水ITO透明导电层7和所述第二掺水ITO透明导电层7’的厚度均为50nm。The first water-doped ITO transparent conductive layer 7 and the second water-doped ITO transparent conductive layer 7' each have a thickness of 50 nm.
第一不掺水ITO层6、第一掺水ITO透明导电层7和第二不掺水ITO层8的组合称之为第一叠层ITO，第三不掺水ITO层6’、第二掺水ITO透明导电层7’和第四不掺水ITO层8’的组合称之为第二叠层ITO。The combination of the first non-water-doped ITO layer 6, the first water-doped ITO transparent conductive layer 7 and the second non-water-doped ITO layer 8 is referred to as a first laminated ITO, a third non-water-doped ITO layer 6', and a second The combination of the water-doped ITO transparent conductive layer 7' and the fourth non-water-doped ITO layer 8' is referred to as a second laminated ITO.
本示例性实施例的HJT太阳能电池可以采用下述方法制备：The HJT solar cell of the present exemplary embodiment can be prepared by the following method:
a)采用化学气相沉积法在n型单晶硅片1的第一表面上依次沉积第一本征非晶硅钝化层2和磷掺杂的a-Si:H(n)层3，在所述n型单晶硅片1的第二表面上依次沉积第二本征非晶硅钝化层4和硼掺杂的a-Si:H(p)层5。a) sequentially depositing a first intrinsic amorphous silicon passivation layer 2 and a phosphorus-doped a-Si:H(n) layer 3 on the first surface of the n-type single crystal silicon wafer 1 by chemical vapor deposition A second intrinsic amorphous silicon passivation layer 4 and a boron-doped a-Si:H(p) layer 5 are sequentially deposited on the second surface of the n-type single crystal silicon wafer 1.
第一本征非晶硅钝化层2或第二本征非晶硅钝化层4的沉积条件为：电源功率为350W；氢气与硅烷的气体流量比，即氢稀释比为12：1；压强0.7pa；沉积时衬底温度240℃。The first intrinsic amorphous silicon passivation layer 2 or the second intrinsic amorphous silicon passivation layer 4 is deposited under the following conditions: a power supply power of 350 W; a hydrogen gas to silane gas flow ratio, that is, a hydrogen dilution ratio of 12:1; The pressure was 0.7 Pa; the substrate temperature during deposition was 240 °C.
磷掺杂的a-Si:H(n)层3的沉积条件为：电源功率为400W；氢气与硅烷气体流量比，即氢稀释比为4:1；磷烷与硅烷的气体流量比，即磷硅比为1:100；压强为0.4pa；沉积时衬底的温度为230℃。The deposition condition of phosphorus-doped a-Si:H(n) layer 3 is: power supply power is 400W; hydrogen gas to silane gas flow ratio, that is, hydrogen dilution ratio is 4:1; gas flow ratio of phosphane to silane, ie The ratio of phosphorus to silicon was 1:100; the pressure was 0.4 Pa; and the temperature of the substrate during deposition was 230 °C.
硼掺杂的a-Si:H(p)层5的沉积条件为：电源功率为500W；氢气与硅烷的气体流量比，即氢稀释比为5:1；硼烷与硅烷的气体流量比，即硼硅比为2:98；压强为0.3pa；沉积时衬底的温度为200℃。The deposition condition of the boron-doped a-Si:H(p) layer 5 is: the power supply power is 500 W; the gas flow ratio of hydrogen to silane, that is, the hydrogen dilution ratio is 5:1; the gas flow ratio of borane to silane, That is, the ratio of boro to silicon is 2:98; the pressure is 0.3 Pa; and the temperature of the substrate during deposition is 200 °C.
b)在室温条件下通入氩气和氧气，氩气与氧气的气体流量比设定为50:1，腔体压强保持为0.3Pa，打开溅射电源，电源功率密度为2W/cm 2，采用磁控溅射法在所述磷掺杂的a-Si:H(n)层3上沉积所述第一不掺水ITO层6。 b) argon gas and oxygen gas are introduced at room temperature, the gas flow ratio of argon gas to oxygen gas is set to 50:1, the cavity pressure is maintained at 0.3 Pa, the sputtering power source is turned on, and the power density of the power source is 2 W/cm 2 . The first non-water-doped ITO layer 6 is deposited on the phosphorus-doped a-Si:H(n) layer 3 by magnetron sputtering.
c)采用与步骤b)相同的工艺在所述硼掺杂的a-Si:H(p)层5上沉积所述 第三不掺水ITO层6’。c) depositing said third non-water-doped ITO layer 6' on said boron-doped a-Si:H(p) layer 5 by the same process as step b).
d)在室温条件下，同时通入氩气、氧气和水蒸汽，氩气、氧气与水蒸汽的气体流量比设定为250:10:1，腔体压强保持为0.4Pa，保持水蒸汽的流量稳定在0.5sccm，打开溅射电源，电源功率密度为2.1W/cm 2，采用磁控溅射法，在所述第一不掺水ITO层6上沉积所述第一掺水ITO透明导电层7。 d) At room temperature, argon, oxygen and water vapor are simultaneously introduced. The gas flow ratio of argon, oxygen and water vapor is set to 250:10:1, the pressure of the chamber is kept at 0.4 Pa, and the water vapor is maintained. The flow rate is stabilized at 0.5 sccm, the sputtering power source is turned on, the power density of the power source is 2.1 W/cm 2 , and the first water-doped ITO is transparently deposited on the first non-water-doped ITO layer 6 by magnetron sputtering. Layer 7.
e)采用与步骤d)相同的工艺在所述第三不掺水ITO层6’上沉积第二掺水ITO透明导电层7’。e) depositing a second water-doped ITO transparent conductive layer 7' on the third non-water-doped ITO layer 6' by the same process as step d).
f)将由步骤e)所获得的样品加热至185℃，通入氩气和氧气，氩气与氧气的气体流量比设定为60:1，腔体压强保持为0.5Pa，打开溅射电源，电源功率密度为2W/cm 2，采用磁控溅射法在所述第一掺水ITO透明导电层7上沉积第二不掺水ITO层8。 f) heating the sample obtained in step e) to 185 ° C, introducing argon gas and oxygen gas, setting the gas flow ratio of argon gas to oxygen to 60:1, maintaining the cavity pressure at 0.5 Pa, and turning on the sputtering power source. The power source has a power density of 2 W/cm 2 , and a second non-water-doped ITO layer 8 is deposited on the first water-doped ITO transparent conductive layer 7 by magnetron sputtering.
g)采用与步骤f)相同的工艺在所述第二掺水ITO透明导电层7’上沉积第四不掺水ITO层8’。g) depositing a fourth non-water-doped ITO layer 8' on the second water-doped ITO transparent conductive layer 7' by the same process as step f).
h)分别在所述第二不掺水ITO层8和所述第四不掺水ITO层8’上丝网印刷第一电极9和第二电极9’。h) The first electrode 9 and the second electrode 9' are screen printed on the second non-water-doped ITO layer 8 and the fourth non-water-doped ITO layer 8', respectively.
本领域的技术人员应当理解，虽然上述制备过程用步骤a)至h)示出，但是并非限定一定要按a)至h)的顺序去制备本示例性实施例的太阳能异质结电池。例如，可以按照a)、b)、d)、f)、c)、e)、g)、h)的顺序制备出本实施例的太阳能异质结电池，即可在n型单晶硅片1的第一表面上依次沉积第一本征非晶硅钝化层2、磷掺杂的a-Si:H(n)层3、第一不掺水ITO层6、第一掺水ITO透明导电层7以及第二不掺水ITO层8，再在n型单晶硅片1的第二表面上依次沉积第二本征非晶硅钝化层4、硼掺杂的a-Si:H(p)层5、第三不掺水ITO层6’、第二掺水ITO透明导电层7’上以及第四不掺水ITO层8’。It will be understood by those skilled in the art that although the above preparation process is illustrated by steps a) to h), it is not limited to the preparation of the solar heterojunction cell of the present exemplary embodiment in the order of a) to h). For example, the solar heterojunction cell of the present embodiment can be prepared in the order of a), b), d), f), c), e), g), h), that is, in the n-type single crystal silicon wafer. A first intrinsic amorphous silicon passivation layer 2, a phosphorus-doped a-Si:H(n) layer 3, a first non-doped ITO layer 6, and a first water-doped ITO are sequentially deposited on the first surface of 1. The conductive layer 7 and the second non-water-doped ITO layer 8 are sequentially deposited on the second surface of the n-type single crystal silicon wafer 1 with a second intrinsic amorphous silicon passivation layer 4, boron-doped a-Si:H (p) Layer 5, a third non-water-doped ITO layer 6', a second water-doped ITO transparent conductive layer 7', and a fourth non-water-doped ITO layer 8'.
或者，可以先在n型单晶硅片1的第二表面上依次沉积第二本征非晶硅钝化层4、硼掺杂的a-Si:H(p)层5、第三不掺水ITO层6’、第二掺水ITO透明导电层7’上以及第四不掺水ITO层8’，再在n型单晶硅片1的第一表面上依次沉积第一本征非晶硅钝化层2、磷掺杂的a-Si:H(n)层3、第一不掺水ITO层6、第一掺水ITO透明导电层7以及第二不掺水ITO层8。Alternatively, a second intrinsic amorphous silicon passivation layer 4, a boron-doped a-Si:H(p) layer 5, and a third undoped layer may be sequentially deposited on the second surface of the n-type single crystal silicon wafer 1. a water ITO layer 6', a second water-doped ITO transparent conductive layer 7', and a fourth non-water-doped ITO layer 8', and then depositing a first intrinsic amorphous layer on the first surface of the n-type single crystal silicon wafer 1 A silicon passivation layer 2, a phosphorus-doped a-Si:H(n) layer 3, a first non-doped ITO layer 6, a first water-doped ITO transparent conductive layer 7, and a second non-water-doped ITO layer 8.
应理解，上述描述的HJT太阳能电池制备方法为示例性的。制备方法中所用的原料，设定的反应参数等等可以经实验进行适当性地调整。例如，在步骤a)中，可以选用乙硼烷或三甲氧基硼氧烯(tri-methoxy-boroxene，TMB)来代替本示例性制备方法中的硼烷完成硼掺杂的a-Si:H(p)层的沉积。It should be understood that the HJT solar cell fabrication method described above is exemplary. The raw materials used in the production method, the set reaction parameters and the like can be appropriately adjusted by experiments. For example, in step a), diboron or trimethoxy-boroxene (TMB) may be used instead of borane in the exemplary preparation process to complete boron-doped a-Si:H (p) Deposition of the layer.
性能测试Performance Testing
1、透过率性能测试1, transmittance performance test
测试常规方法制备的微晶ITO材料、非晶ITO材料以及多晶ITO材料和本申请上述实施例HJT太阳能电池中的叠层ITO材料的透过率，测试结果如图2-4所示。The transmittances of the microcrystalline ITO material, the amorphous ITO material, and the polycrystalline ITO material prepared by the conventional method and the laminated ITO material in the HJT solar cell of the above-described embodiment of the present application were tested, and the test results are shown in FIGS.
从图2-4可以看出，本申请上述实施例HJT太阳能电池中的叠层ITO的透过率高于采用低温常规工艺制备的微晶ITO材料的透过率，接近采用低温常规掺氢工艺制备的非晶ITO材料和采用高温常规工艺制备的多晶ITO材料的透过率。As can be seen from FIG. 2-4, the transmittance of the laminated ITO in the HJT solar cell of the above embodiment of the present application is higher than the transmittance of the microcrystalline ITO material prepared by the low temperature conventional process, and is close to the conventional low temperature hydrogen doping process. The transmittance of the prepared amorphous ITO material and the polycrystalline ITO material prepared by a high temperature conventional process.
2、反射率性能测试2, reflectivity performance test
采用三种常规方法将ITO沉积在测试用的硅片表面上，测试沉积有微晶ITO材料的硅片表面、沉积有掺氢的非晶ITO材料的硅片表面以及沉积有多晶ITO材料的硅片表面的反射率，作为对比数据。Three conventional methods were used to deposit ITO on the surface of the test wafer, and the surface of the silicon wafer on which the microcrystalline ITO material was deposited, the surface of the silicon wafer on which the hydrogen-doped amorphous ITO material was deposited, and the polycrystalline ITO material deposited thereon were tested. The reflectivity of the surface of the wafer as a comparative data.
采用与上述实施例中制备HJT太阳能电池的方法中的b)、d)以及f)步骤中相同的工艺和参数将叠层ITO材料沉积在测试用的硅片表面上，即硅片表面上依次沉积微晶ITO、掺水ITO以及多晶ITO，测试沉积有叠层ITO材料的硅片表面的反射率，得到测试数据，即图5-7中所指的本申请实施例的叠层ITO的硅片表面的反射率。测试结果如图5-7所示。The laminated ITO material was deposited on the surface of the silicon wafer for testing using the same processes and parameters as in the steps b), d) and f) of the method for preparing the HJT solar cell in the above embodiment, that is, on the surface of the silicon wafer. The microcrystalline ITO, the water-doped ITO, and the polycrystalline ITO were deposited, and the reflectance of the surface of the silicon wafer on which the laminated ITO material was deposited was tested to obtain test data, that is, the laminated ITO of the embodiment of the present application referred to in FIGS. 5-7. The reflectivity of the surface of the silicon wafer. The test results are shown in Figure 5-7.
反射率数值越低代表陷光效果越好。从图5-7可以看出，本申请实施例的叠层ITO的陷光效果大体上优于采用低温常规工艺制备的微晶ITO、采用低温常规掺氢工艺制备的非晶ITO和采用高温常规工艺制备的多晶ITO的陷光效果。The lower the reflectance value, the better the light trapping effect. As can be seen from FIG. 5-7, the trapping effect of the laminated ITO of the embodiment of the present application is substantially better than that of the microcrystalline ITO prepared by the low temperature conventional process, the amorphous ITO prepared by the low temperature conventional hydrogen doping process, and the high temperature conventionally. The trapping effect of the polycrystalline ITO prepared by the process.
3、电池效率测试3, battery efficiency test
测试本申请上述实施例的HJT太阳能电池与采用其他单一结构ITO制备的电池的效率，测试结果如表1所示，其中表1中的参数已经归一化处理。The efficiencies of the HJT solar cells of the above-described embodiments of the present application and the cells prepared using other single-structure ITOs were tested. The test results are shown in Table 1, wherein the parameters in Table 1 have been normalized.
表1Table 1
Figure PCTCN2018103604-appb-000001
Figure PCTCN2018103604-appb-000001
从表1可以看出，本申请上述实施例的HJT太阳能电池的效率明显优于采用低温常规工艺制备的微晶ITO、采用低温常规掺氢工艺制备的非晶ITO和采用高温常规工艺制备的多晶ITO所制备的电池的效率，将效率提高了至少3个百分点以上。It can be seen from Table 1 that the efficiency of the HJT solar cell of the above embodiment of the present application is significantly better than that of the microcrystalline ITO prepared by the low temperature conventional process, the amorphous ITO prepared by the low temperature conventional hydrogen doping process, and the high temperature conventional process. The efficiency of the battery prepared by crystalline ITO increases the efficiency by at least 3 percentage points.
此外，从表1中所得到的开路电压、电路电流和填充因子的数据，可以看出，在开路电压、电路电流和填充因子方面，本申请上述实施例的HJT太阳能电池的性能也优于采用低温常规工艺制备的微晶ITO、采用低温常规掺氢工艺制备的非晶ITO和采用高温常规工艺制备的多晶ITO所制备的电池的性能。In addition, from the data of the open circuit voltage, circuit current and fill factor obtained in Table 1, it can be seen that the performance of the HJT solar cell of the above embodiment of the present application is superior to the adoption in terms of open circuit voltage, circuit current and fill factor. The performance of microcrystalline ITO prepared by low temperature conventional process, amorphous ITO prepared by low temperature conventional hydrogen doping process and polycrystalline ITO prepared by high temperature conventional process.
在另一个示例性实施例中，HJT异质结电池的结构也可以采用如图1所示的结构。其中，本示例性实施例的HJT异质结电池中的各层的厚度不同于上一示例性实施例的HJT异质结电池的各层厚度。本示例性实施例的HJT异质结电池从上至下依次包括第一电极9、第二不掺水ITO层8、第一掺水ITO透明导电层7、第一不掺水ITO层6、磷掺杂的a-Si:H(n)层3、第一本征非晶硅钝化层2、n型单晶硅片1、第二本征非晶硅钝化层4、硼掺杂的a-Si:H(p)层5、第三不掺水ITO层6’、第二掺水ITO透明导电层7’、第四不掺水ITO层8’和第二电极9’，其中，In another exemplary embodiment, the structure of the HJT heterojunction cell may also adopt a structure as shown in FIG. Here, the thickness of each layer in the HJT heterojunction cell of the present exemplary embodiment is different from the thickness of each layer of the HJT heterojunction cell of the previous exemplary embodiment. The HJT heterojunction cell of the exemplary embodiment includes a first electrode 9, a second non-water-doped ITO layer 8, a first water-doped ITO transparent conductive layer 7, and a first non-water-doped ITO layer 6, in order from top to bottom. Phosphorus doped a-Si:H(n) layer 3, first intrinsic amorphous silicon passivation layer 2, n-type single crystal silicon wafer 1, second intrinsic amorphous silicon passivation layer 4, boron doping a-Si:H(p) layer 5, a third non-doped ITO layer 6', a second water-doped ITO transparent conductive layer 7', a fourth non-doped ITO layer 8' and a second electrode 9', wherein ,
所述n型单晶硅片1的厚度为180μm；The thickness of the n-type single crystal silicon wafer 1 is 180 μm;
所述第一本征非晶硅钝化层2的厚度为10nm；The first intrinsic amorphous silicon passivation layer 2 has a thickness of 10 nm;
所述第二本征非晶硅钝化层4的厚度为10nm；The second intrinsic amorphous silicon passivation layer 4 has a thickness of 10 nm;
所述磷掺杂的a-Si:H(n)层3的厚度为20nm；The thickness of the phosphorus-doped a-Si:H(n) layer 3 is 20 nm;
所述硼掺杂的a-Si:H(p)层5的厚度为20nm；The boron-doped a-Si:H(p) layer 5 has a thickness of 20 nm;
所述第一不掺水ITO层6和所述第三不掺水ITO层6’均为微晶态ITO层，厚度均为3nm；The first non-water-doped ITO layer 6 and the third non-water-doped ITO layer 6' are both microcrystalline ITO layers, each having a thickness of 3 nm;
所述第二不掺水ITO层8和所述第四不掺水ITO层8’均为多晶态的ITO层，厚度均为40nm；The second non-water-doped ITO layer 8 and the fourth non-water-doped ITO layer 8' are polycrystalline ITO layers each having a thickness of 40 nm;
所述第一掺水ITO透明导电层7和所述第二掺水ITO透明导电层7’的厚度均为40nm。The thickness of the first water-doped ITO transparent conductive layer 7 and the second water-doped ITO transparent conductive layer 7' are both 40 nm.
第一不掺水ITO层6、第一掺水ITO透明导电层7和第二不掺水ITO层8的组合称之为第一叠层ITO，第三不掺水ITO层6’、第二掺水ITO透明导电层7’和第四不掺水ITO层8’的组合称之为第二叠层ITO。本示例性实施例的HJT异质结电池可以采用下述方法制备：The combination of the first non-water-doped ITO layer 6, the first water-doped ITO transparent conductive layer 7 and the second non-water-doped ITO layer 8 is referred to as a first laminated ITO, a third non-water-doped ITO layer 6', and a second The combination of the water-doped ITO transparent conductive layer 7' and the fourth non-water-doped ITO layer 8' is referred to as a second laminated ITO. The HJT heterojunction cell of the present exemplary embodiment can be prepared by the following method:
a)采用化学气相沉积法在n型单晶硅片1的第一表面上依次沉积第一本征非晶硅钝化层2和磷掺杂的a-Si:H(n)层3，在所述n型单晶硅片1的第二表面上依次沉积第二本征非晶硅钝化层4和硼掺杂的a-Si:H(p)层5。a) sequentially depositing a first intrinsic amorphous silicon passivation layer 2 and a phosphorus-doped a-Si:H(n) layer 3 on the first surface of the n-type single crystal silicon wafer 1 by chemical vapor deposition A second intrinsic amorphous silicon passivation layer 4 and a boron-doped a-Si:H(p) layer 5 are sequentially deposited on the second surface of the n-type single crystal silicon wafer 1.
第一本征非晶硅钝化层2或第二本征非晶硅钝化层4的沉积条件为：电源功率为380W，氢气与硅烷气体流量比，即氢稀释比为14：1，压强0.7pa，沉积时衬底温度220℃。The deposition condition of the first intrinsic amorphous silicon passivation layer 2 or the second intrinsic amorphous silicon passivation layer 4 is: the power supply power is 380 W, the hydrogen gas to silane gas flow ratio, that is, the hydrogen dilution ratio is 14:1, and the pressure is 0.7pa, the substrate temperature during deposition is 220 °C.
磷掺杂的a-Si:H(n)层3的沉积条件为：电源功率为400W；氢气与硅烷气体流量比，即氢稀释比为4:1；磷烷与硅烷气体流量比，即磷硅比1:100；压强0.6pa；沉积时衬底温度220℃。The deposition condition of phosphorus-doped a-Si:H(n) layer 3 is: power supply power is 400W; hydrogen gas to silane gas flow ratio, ie hydrogen dilution ratio is 4:1; phosphine to silane gas flow ratio, ie phosphorus The silicon ratio was 1:100; the pressure was 0.6 Pa; and the substrate temperature was 220 ° C during deposition.
硼掺杂的a-Si:H(p)层5的沉积条件为：电源功率为450W；氢气与硅烷气体流量比，即氢稀释比为5:1；硼烷与硅烷气体流量比，即硼硅比1:100；压强0.3pa；沉积时衬底温度200℃。The deposition condition of boron-doped a-Si:H(p) layer 5 is: power supply power is 450W; hydrogen gas to silane gas flow ratio, ie hydrogen dilution ratio is 5:1; borane to silane gas flow ratio, ie boron The silicon ratio was 1:100; the pressure was 0.3 Pa; the substrate temperature during deposition was 200 °C.
b)在室温条件下通入氩气和氧气，氩气与氧气的气体流量比设定为20:1，腔体压强保持为0.4Pa，打开溅射电源，电源功率密度为1W/cm 2，采用磁控 溅射法在所述磷掺杂的a-Si:H(n)层3上沉积所述第一不掺水ITO层6。 b) argon gas and oxygen gas are introduced at room temperature, the gas flow ratio of argon gas to oxygen gas is set to 20:1, the cavity pressure is maintained at 0.4 Pa, the sputtering power source is turned on, and the power density of the power source is 1 W/cm 2 . The first non-water-doped ITO layer 6 is deposited on the phosphorus-doped a-Si:H(n) layer 3 by magnetron sputtering.
c)采用与步骤b)相同的工艺在所述硼掺杂的a-Si:H(p)层5上沉积所述第三不掺水ITO层6’。c) depositing said third non-water-doped ITO layer 6' on said boron-doped a-Si:H(p) layer 5 by the same process as step b).
d)在室温条件下，同时通入氩气、氧气和水蒸汽，氩气、氧气与水蒸汽的气体流量比设定为300:10:1，腔体压强保持为0.6Pa，保持水蒸汽的流量稳定1sccm，打开溅射电源，电源功率密度为1W/cm 2，采用磁控溅射法，在所述第一不掺水ITO层6上沉积第一掺水ITO透明导电层7。 d) At room temperature, argon, oxygen and water vapor are simultaneously introduced. The gas flow ratio of argon, oxygen and water vapor is set to 300:10:1, and the chamber pressure is maintained at 0.6 Pa, maintaining water vapor. The flow rate was stabilized by 1 sccm, the sputtering power source was turned on, and the power density of the power source was 1 W/cm 2 . The first water-doped ITO transparent conductive layer 7 was deposited on the first non-doped ITO layer 6 by magnetron sputtering.
e)采用与步骤d)相同的工艺在所述第三不掺水ITO层6’上沉积第二掺水ITO透明导电层7’。e) depositing a second water-doped ITO transparent conductive layer 7' on the third non-water-doped ITO layer 6' by the same process as step d).
f)将由步骤e)所获得的样品加热至190℃，通入氩气和氧气，氩气与氧气的气体流量比设定为30:1，腔体压强保持为0.3Pa，打开溅射电源，电源功率密度为2W/cm 2，采用磁控溅射法在所述第一掺水ITO透明导电层7上沉积第二不掺水ITO层8。 f) heating the sample obtained in step e) to 190 ° C, introducing argon gas and oxygen gas, setting the gas flow ratio of argon gas to oxygen to 30:1, maintaining the cavity pressure at 0.3 Pa, and turning on the sputtering power source. The power source has a power density of 2 W/cm 2 , and a second non-water-doped ITO layer 8 is deposited on the first water-doped ITO transparent conductive layer 7 by magnetron sputtering.
g)采用与步骤f)相同的工艺在所述第二掺水ITO透明导电层7’上沉积第四不掺水ITO层8’。g) depositing a fourth non-water-doped ITO layer 8' on the second water-doped ITO transparent conductive layer 7' by the same process as step f).
h)分别在所述第二不掺水ITO层8和所述第四不掺水ITO层8’上丝网印刷第一电极9和第二电极9’。h) The first electrode 9 and the second electrode 9' are screen printed on the second non-water-doped ITO layer 8 and the fourth non-water-doped ITO layer 8', respectively.
本申请上述实施例提供的太阳能异质结电池，有机地结合了3种类型ITO层。在光学设计上，整个叠层ITO透明导电材料的主体结构，即厚度较大的两个ITO层，多晶态ITO和非晶态ITO材料均是采用的透光率较好的ITO材料。这种设计可以保证光的透过率。而且，由于多晶态ITO、非晶态ITO、微晶态ITO层的折射率存在差异，因此在光学陷光减反设计上，通过组合这三层ITO材料，使得当光入射时，依次经过折射率从小到大变化的三层ITO材料，使太阳能电池的陷光效果得到增强，从而使太阳能电池具有明显提高的效率增益。The solar heterojunction cell provided by the above embodiment of the present application organically combines three types of ITO layers. In optical design, the main structure of the entire laminated ITO transparent conductive material, that is, two ITO layers having a relatively large thickness, polycrystalline ITO and amorphous ITO materials are all ITO materials with good light transmittance. This design ensures light transmission. Moreover, since the refractive indices of the polycrystalline ITO, the amorphous ITO, and the microcrystalline ITO layer are different, in the optical trapping and anti-reverse design, by combining the three layers of ITO materials, when the light is incident, it is sequentially passed. The three-layer ITO material with a small change in refractive index enhances the light trapping effect of the solar cell, so that the solar cell has a significantly improved efficiency gain.
在电学设计上，叠层ITO导电层更有利于电流的输运：如图1中附图标记6和6’所表示的微晶态ITO层的载流子浓度高，可以与如图1中附图标记 3和5所表示的非晶硅掺杂层实现很好的接触。两层掺杂非晶硅层，即磷掺杂的a-Si:H层和硼掺杂的a-Si:H层上分别沉积有一层微晶态的ITO层，这样可以提高两个掺杂非晶硅层与叠层ITO层之间的接触，使得电池导通顺畅。In electrical design, the laminated ITO conductive layer is more conducive to the transport of current: the carrier concentration of the microcrystalline ITO layer represented by reference numerals 6 and 6' in FIG. 1 is high, and can be as shown in FIG. The amorphous silicon doped layers denoted by reference numerals 3 and 5 achieve good contact. A two-layer doped amorphous silicon layer, that is, a phosphorus-doped a-Si:H layer and a boron-doped a-Si:H layer are respectively deposited with a microcrystalline ITO layer, which can improve the two doping The contact between the amorphous silicon layer and the laminated ITO layer makes the battery conduct smoothly.
本申请上述实施例提供的太阳能异质结电池的制备方法可避免高温沉积ITO过程中非晶硅膜被氧化的问题。首先在低温下沉积微晶态ITO层和非晶态的掺水ITO层，由于待被沉积的样品没有被加热，非晶硅材料与工艺气体中的氧气的反应速率比较慢，减少了非晶硅层的氧化问题。因此，微晶态ITO层和非晶态的掺水ITO层这两层ITO材料可以作为保护层，可以有效避免高温沉积ITO过程中非晶硅层被氧化的问题。The method for preparing a solar heterojunction cell provided by the above embodiments of the present application can avoid the problem that the amorphous silicon film is oxidized during high temperature deposition of ITO. Firstly, the microcrystalline ITO layer and the amorphous water-doped ITO layer are deposited at a low temperature. Since the sample to be deposited is not heated, the reaction rate of the amorphous silicon material with the oxygen in the process gas is relatively slow, reducing the amorphous Oxidation of the silicon layer. Therefore, the two layers of ITO material of the microcrystalline ITO layer and the amorphous water-doped ITO layer can be used as a protective layer, which can effectively avoid the problem that the amorphous silicon layer is oxidized during high temperature deposition of ITO.
本公开内容是本公开实施例的原则的示例，并非对本公开作出任何形式上或实质上的限定，或将本公开限定到具体的实施方案。对本领域的技术人员而言，很显然本公开实施例的技术方案的要素、方法和***等，可以进行变动、改变、改动、演变，而不背离如上的本公开的实施例、技术方案的，如权利要求中所定义的原理、精神和范围。这些变动、改变、改动、演变的实施方案均包括在本公开的等同实施例内，这些等同实施例均包括在本公开的由权利要求界定的范围内。虽然可以许多不同形式来使本公开实施例具体化，但此处详细描述的是本公开的一些实施方案。此外，本公开的实施例包括此处的各种实施方案的一些或全部的任意可能的组合，也包括在本公开的由权利要求界定的范围内。在本公开中或在任一个引用的专利、引用的专利申请或其它引用的资料中任何地方所提及的所有专利、专利申请和其它引用资料据此通过引用以其整体并入。The present disclosure is an exemplification of the principles of the embodiments of the present disclosure, and is not intended to limit the scope of the present disclosure. It is obvious to those skilled in the art that the elements, methods, systems, and the like of the embodiments of the present disclosure can be changed, changed, modified, and evolved without departing from the embodiments and technical solutions of the present disclosure as described above. The principles, spirit and scope as defined in the claims. The implementations of the present invention are intended to be included within the scope of the present invention as defined by the appended claims. While the embodiments of the present disclosure may be embodied in many different forms, the embodiments of the present disclosure are described in detail herein. Furthermore, the embodiments of the present disclosure include any possible combinations of some or all of the various embodiments herein, and are included within the scope of the present disclosure as defined by the claims. All patents, patent applications, and other references cited in this disclosure or in the entirety of each of the entire entire entire entire entire entire entire entire entire entireties
以上公开内容规定为说明性的而不是穷尽性的。对于本领域技术人员来说，本说明书会暗示许多变化和可选择方案。所有这些可选择方案和变化旨在被包括在本权利要求的范围内，其中术语“包括”意思是“包括，但不限于”。The above disclosure is intended to be illustrative rather than exhaustive. This description will suggest many variations and alternatives to those skilled in the art. All such alternatives and modifications are intended to be included within the scope of the claims, wherein the term "comprising" means "including, but not limited to."
在此完成了对本公开可选择的实施方案的描述。本领域技术人员可认识到此处的实施方案的其它等效变换，这些等效变换也为由附于本文的权利要求所包括。A description of alternative embodiments of the present disclosure is completed herein. Other equivalents to the embodiments herein will be apparent to those skilled in the art, and the equivalents are also included in the claims appended hereto.

Claims (20)

  1. 一种太阳能异质结电池，包括单晶硅片和在所述单晶硅片的至少一侧上依次层叠设置的本征非晶硅钝化层、非晶硅掺杂层、掺水氧化铟锡(ITO)透明导电层以及电极。A solar heterojunction cell comprising a single crystal silicon wafer and an intrinsic amorphous silicon passivation layer, an amorphous silicon doped layer, and an indium oxide doped layer which are sequentially stacked on at least one side of the single crystal silicon wafer Tin (ITO) transparent conductive layer and electrode.
  2. 根据权利要求1所述的太阳能异质结电池，其中，所述掺水ITO透明导电层的厚度在30nm至50nm的范围内。The solar heterojunction cell according to claim 1, wherein the water-doped ITO transparent conductive layer has a thickness in the range of 30 nm to 50 nm.
  3. 根据权利要求1或2所述的太阳能异质结电池，其中，当所述太阳能异质结电池包括一个掺水ITO透明导电层时，所述太阳能异质结电池还包括设置在所述非晶硅层掺杂层与所述掺水ITO透明导电层之间的不掺水ITO层；当所述太阳能异质结电池包括分别设置在单晶硅片两侧的两个掺水ITO透明导电层时，所述太阳能异质结电池还包括设置在单晶硅片的至少一侧的、在所述非晶硅层掺杂层与所述掺水ITO透明导电层之间的不掺水ITO层。The solar heterojunction cell according to claim 1 or 2, wherein when the solar heterojunction cell comprises a water-doped ITO transparent conductive layer, the solar heterojunction cell further comprises an amorphous layer a non-water-doped ITO layer between the silicon layer doped layer and the water-doped ITO transparent conductive layer; when the solar heterojunction cell comprises two water-doped ITO transparent conductive layers respectively disposed on both sides of the single crystal silicon wafer The solar heterojunction cell further includes a non-water-doped ITO layer disposed between the amorphous silicon layer doped layer and the water-doped ITO transparent conductive layer disposed on at least one side of the single crystal silicon wafer .
  4. 根据权利要求3所述的太阳能异质结电池，其中，设置在所述非晶硅掺杂层与所述掺水ITO透明导电层之间的所述不掺水ITO层为微晶态ITO层，其厚度在2nm至3nm的范围内。The solar heterojunction cell according to claim 3, wherein the non-doped ITO layer disposed between the amorphous silicon doped layer and the water-doped ITO transparent conductive layer is a microcrystalline ITO layer Its thickness is in the range of 2 nm to 3 nm.
  5. 根据权利要求1至4中任一项所述的太阳能异质结电池，其中，当所述太阳能异质结电池包括一个掺水ITO透明导电层时，所述太阳能异质结电池还包括设置在所述掺水ITO透明导电层与所述电极之间的不掺水ITO层；当所述太阳能异质结电池包括分别设置在单晶硅片两侧的两个掺水ITO透明导电层时，所述太阳能异质结电池还包括设置在单晶硅片的至少一侧的、在所述掺水ITO透明导电层与所述电极之间的不掺水ITO层。The solar heterojunction cell according to any one of claims 1 to 4, wherein when the solar heterojunction cell comprises a water-doped ITO transparent conductive layer, the solar heterojunction cell further comprises a non-aqueous ITO layer between the water-doped ITO transparent conductive layer and the electrode; when the solar heterojunction battery comprises two water-doped ITO transparent conductive layers respectively disposed on two sides of the single crystal silicon wafer, The solar heterojunction cell further includes a non-water-doped ITO layer disposed between the water-doped ITO transparent conductive layer and the electrode disposed on at least one side of the single crystal silicon wafer.
  6. 根据权利要求5所述的太阳能异质结电池，其中，设置在所述掺水ITO透明导电层与所述电极之间的所述不掺水ITO层为多晶态ITO层，其厚度在30nm至50nm范围内。The solar heterojunction cell according to claim 5, wherein the non-water-doped ITO layer disposed between the water-doped ITO transparent conductive layer and the electrode is a polycrystalline ITO layer having a thickness of 30 nm. Up to 50nm range.
  7. 根据权利要求1至6中任一项所述的太阳能异质结电池，其中，所述单晶硅片为n型单晶硅片，其厚度在50μm至300μm范围内。The solar heterojunction cell according to any one of claims 1 to 6, wherein the single crystal silicon wafer is an n-type single crystal silicon wafer having a thickness in the range of 50 μm to 300 μm.
  8. 根据权利要求1至7中任一项所述的太阳能异质结电池，其中，所述本征非晶硅钝化层的厚度在1nm至20nm的范围内。The solar heterojunction cell according to any one of claims 1 to 7, wherein the intrinsic amorphous silicon passivation layer has a thickness in the range of 1 nm to 20 nm.
  9. 根据权利要求1至8中任一项所述的太阳能异质结电池，其中，The solar heterojunction battery according to any one of claims 1 to 8, wherein
    所述非晶硅掺杂层的厚度在3nm至20nm范围内；并且The amorphous silicon doped layer has a thickness in the range of 3 nm to 20 nm;
    当所述太阳能异质结电池包括分别设置在单晶硅片两侧的两个非晶硅掺杂层时，设置在所述单晶硅片的一侧上的所述非晶硅掺杂层为P型非晶硅掺杂层，设置在所述单晶硅片的另一侧上的所述非晶硅掺杂层为N型非晶硅掺杂层。The amorphous silicon doped layer disposed on one side of the single crystal silicon wafer when the solar heterojunction cell includes two amorphous silicon doped layers respectively disposed on both sides of the single crystal silicon wafer The P-type amorphous silicon doped layer, the amorphous silicon doped layer disposed on the other side of the single crystal silicon wafer is an N-type amorphous silicon doped layer.
  10. 一种制备太阳能异质结电池的方法，包括：在单晶硅片的至少一侧上依次形成本征非晶硅钝化层、非晶硅掺杂层、掺水氧化铟锡(ITO)透明导电层以及电极。A method for preparing a solar heterojunction cell, comprising: sequentially forming an intrinsic amorphous silicon passivation layer, an amorphous silicon doped layer, and a water-doped indium tin oxide (ITO) transparent on at least one side of a single crystal silicon wafer; Conductive layer and electrode.
  11. 根据权利要求10所述的方法，其中，当所述太阳能异质结电池包括一个掺水ITO透明导电层时，所述方法还包括在所述掺水ITO透明导电层沉积在所述非晶硅掺杂层上之前，将不渗水ITO层沉积在所述非晶硅掺杂层上，并且将所述掺水ITO透明导电层沉积在设置在所述非晶硅掺杂层上的所述不渗水ITO层上；当所述太阳能异质结电池包括分别设置在单晶硅片两侧的两个掺水ITO透明导电层时，所述方法还包括在所述掺水ITO透明导电层沉积在所述非晶硅掺杂层之前，在所述单晶硅片的至少一侧将不渗水ITO层沉积在所述非晶硅掺杂层上，并且将所述掺水ITO透明导电层沉积在设置在所述非晶硅掺杂层上的所述不渗水ITO层上。The method according to claim 10, wherein when said solar heterojunction cell comprises a water-doped ITO transparent conductive layer, said method further comprises depositing said amorphous silicon in said water-doped ITO transparent conductive layer Before depositing the doped layer, depositing a water-impermeable ITO layer on the amorphous silicon doped layer, and depositing the water-doped ITO transparent conductive layer on the amorphous silicon doped layer On the water ITO layer; when the solar heterojunction cell comprises two water-doped ITO transparent conductive layers respectively disposed on both sides of the single crystal silicon wafer, the method further comprises depositing the water-doped ITO transparent conductive layer on the Before the amorphous silicon doped layer, a water impermeable ITO layer is deposited on the amorphous silicon doped layer on at least one side of the single crystal silicon wafer, and the water-doped ITO transparent conductive layer is deposited on And disposed on the water-impermeable ITO layer on the amorphous silicon doped layer.
  12. 根据权利要求10或11所述的方法，其中，当所述太阳能异质结电池包括一个掺水ITO透明导电层时，所述方法还包括在所述电极形成在所述掺水ITO透明导电层之前，将不渗水ITO层沉积在所述掺水ITO透明导电层上，并且在设置在所述掺水ITO透明导电层上的所述不渗水ITO层上丝网印刷所述电极；当所述太阳能异质结电池包括分别设置在单晶硅片两侧的两个掺水ITO透明导电层时，所述方法还包括在所述电极形成在所述掺水ITO透明导电层之前，在所述单晶硅片的至少一侧将不渗水ITO层沉积在所述掺水ITO透明导电层上，并且在设置在所述掺水ITO透明导电层上的所述不渗水ITO层上丝网印刷所述电极。The method according to claim 10 or 11, wherein when the solar heterojunction cell comprises a water-doped ITO transparent conductive layer, the method further comprises forming the electrode on the water-doped ITO transparent conductive layer Previously, a water-impermeable ITO layer was deposited on the water-doped ITO transparent conductive layer, and the electrode was screen printed on the water-impermeable ITO layer disposed on the water-doped ITO transparent conductive layer; The solar heterojunction cell includes two water-doped ITO transparent conductive layers respectively disposed on both sides of the single crystal silicon wafer, the method further comprising: before the electrode is formed on the water-doped ITO transparent conductive layer, Depositing a water-impermeable ITO layer on the water-doped ITO transparent conductive layer on at least one side of the single crystal silicon wafer, and screen printing on the water-impermeable ITO layer disposed on the water-doped ITO transparent conductive layer Said electrode.
  13. 根据权利要求10至13中任一项所述的方法，其中，形成所述掺水ITO透明导电层的步骤包括：在室温条件下通入氩气、氧气和水蒸汽，沉积 所述掺水ITO透明导电层。The method according to any one of claims 10 to 13, wherein the step of forming the water-doped ITO transparent conductive layer comprises: introducing argon gas, oxygen gas and water vapor at room temperature to deposit the water-doped ITO Transparent conductive layer.
  14. 根据权利要求13所述的方法，其中，在沉积所述掺水ITO透明导电层的过程中保持水蒸汽的流量恒定，并且所述水蒸气的流量设定在0.1sccm至10sccm的范围内。The method according to claim 13, wherein the flow rate of the water vapor is kept constant during the deposition of the water-doped ITO transparent conductive layer, and the flow rate of the water vapor is set in a range of 0.1 sccm to 10 sccm.
  15. 根据权利要求13或14所述的方法，其中，采用磁控溅射法镀膜沉积所述掺水ITO透明导电层，并且其中所述氩气、所述氧气与所述水蒸汽的气体流量比在(200:10:1)至(400:10:1)的范围内，沉积时的压力在0.1Pa至1Pa的范围内，溅射电源的功率密度在0.5W/cm 2至3W/cm 2的范围内；所述掺水ITO透明导电层的厚度在30nm至50nm的范围内。 The method according to claim 13 or 14, wherein said water-doped ITO transparent conductive layer is deposited by magnetron sputtering, and wherein a gas flow ratio of said argon gas, said oxygen gas to said water vapor is In the range of (200:10:1) to (400:10:1), the pressure during deposition is in the range of 0.1 Pa to 1 Pa, and the power density of the sputtering power source is from 0.5 W/cm 2 to 3 W/cm 2 . The thickness of the water-doped ITO transparent conductive layer is in the range of 30 nm to 50 nm.
  16. 根据权利要求11或12所述的方法，其中，沉积设置在所述非晶硅掺杂层上所述不掺水ITO层的步骤包括：在室温条件下，在所述非晶硅掺杂层上沉积不掺水ITO层以形成微晶态的不掺水ITO层。The method according to claim 11 or 12, wherein the depositing the non-aqueous ITO layer on the amorphous silicon doped layer comprises: at room temperature, in the amorphous silicon doped layer A water-free ITO layer is deposited thereon to form a microcrystalline, non-water-doped ITO layer.
  17. 根据权利要求16所述的方法，其中，在室温条件下，通入氩气和氧气，采用磁控溅射法在所述非晶硅掺杂层上沉积不掺水ITO层，其中所述氩气与所述氧气的气体流量比在20:1至60:1的范围内，沉积时的压力在0.1Pa至2Pa的范围内，溅射电源的功率密度在0.5W/cm 2至3W/cm 2的范围内；沉积在所述非晶硅掺杂层上的微晶态的所述不掺水ITO层的厚度在2nm至3nm的范围内。 The method according to claim 16, wherein a non-aqueous ITO layer is deposited on said amorphous silicon doped layer by magnetron sputtering under argon and oxygen at room temperature, wherein said argon The gas flow ratio of gas to the oxygen is in the range of 20:1 to 60:1, the pressure during deposition is in the range of 0.1 Pa to 2 Pa, and the power density of the sputtering power source is from 0.5 W/cm 2 to 3 W/cm. Within the range of 2 ; the thickness of the micro-crystalline non-water-doped ITO layer deposited on the amorphous silicon doped layer is in the range of 2 nm to 3 nm.
  18. 根据权利要求12所述的方法，其中，在所述掺水ITO透明导电层上沉积不掺水ITO层的步骤包括：在高温条件下，在所述掺水ITO透明导电层上沉积不掺水ITO层以形成多晶态的不掺水ITO层。The method according to claim 12, wherein the step of depositing a non-water-doped ITO layer on the water-doped ITO transparent conductive layer comprises: depositing no water on the water-doped ITO transparent conductive layer under high temperature conditions The ITO layer is formed to form a polycrystalline, non-aqueous ITO layer.
  19. 根据权利要求18所述的方法，其中，将待被沉积的样品加热到180℃至200℃的范围内，通入氩气和氧气，采用磁控溅射法在所述掺水ITO透明导电层上沉积不掺水ITO层以形成多晶态的不掺水ITO层，其中所述氩气与所述氧气的气体流量比在20:1至60:1的范围内，沉积时的压力在0.1Pa至2Pa的范围内，溅射电源的功率密度在0.5W/cm 2至3W/cm 2的范围内；沉积在所述掺水ITO透明导电层上的多晶态的不掺水ITO层的厚度在30nm至50nm的范围内。 The method according to claim 18, wherein the sample to be deposited is heated to a range of 180 ° C to 200 ° C, argon gas and oxygen gas are introduced, and the water-doped ITO transparent conductive layer is applied by magnetron sputtering. Depositing an undoped ITO layer thereon to form a polycrystalline non-water-doped ITO layer, wherein the gas flow ratio of the argon gas to the oxygen gas is in the range of 20:1 to 60:1, and the pressure at the deposition is 0.1 In the range of Pa to 2 Pa, the power density of the sputtering power source is in the range of 0.5 W/cm 2 to 3 W/cm 2 ; the polycrystalline non-water-doped ITO layer deposited on the water-doped ITO transparent conductive layer The thickness is in the range of 30 nm to 50 nm.
  20. 根据权利要求10至19中任一项所述的方法，其中，在单晶硅片的 至少一侧上依次形成本征非晶硅钝化层、非晶硅掺杂层的步骤包括：采用化学气相沉积法沉积所述本征非晶硅钝化层和所述非晶硅掺杂层；并且The method according to any one of claims 10 to 19, wherein the step of sequentially forming the intrinsic amorphous silicon passivation layer and the amorphous silicon doped layer on at least one side of the single crystal silicon wafer comprises: using chemistry Depositing the intrinsic amorphous silicon passivation layer and the amorphous silicon doped layer by vapor deposition;
    当所述太阳能异质结电池包括分别设置在单晶硅片两侧的两个非晶硅掺杂层时，设置在所述单晶硅片的一侧上的所述非晶硅掺杂层为P型非晶硅掺杂层，设置在所述单晶硅片的另一侧上的所述非晶硅掺杂层为N型非晶硅掺杂层；并且The amorphous silicon doped layer disposed on one side of the single crystal silicon wafer when the solar heterojunction cell includes two amorphous silicon doped layers respectively disposed on both sides of the single crystal silicon wafer a P-type amorphous silicon doped layer, the amorphous silicon doped layer disposed on the other side of the single crystal silicon wafer is an N-type amorphous silicon doped layer;
    其中所述单晶硅片包括n型单晶硅片，其厚度在50μm至300μm的范围；所述本征非晶硅钝化层的厚度在1nm至20nm的范围内；所述非晶硅掺杂层的厚度在3nm至20nm的范围内。Wherein the single crystal silicon wafer comprises an n-type single crystal silicon wafer having a thickness in a range of 50 μm to 300 μm; the intrinsic amorphous silicon passivation layer has a thickness in a range of 1 nm to 20 nm; The thickness of the impurity layer is in the range of 3 nm to 20 nm.
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