WO2019109253A1 - Method for adjusting effective size of solid-state nanopore in solid-state nanopore system - Google Patents

Method for adjusting effective size of solid-state nanopore in solid-state nanopore system Download PDF

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WO2019109253A1
WO2019109253A1 PCT/CN2017/114642 CN2017114642W WO2019109253A1 WO 2019109253 A1 WO2019109253 A1 WO 2019109253A1 CN 2017114642 W CN2017114642 W CN 2017114642W WO 2019109253 A1 WO2019109253 A1 WO 2019109253A1
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solid
nanopore
state
semiconductor substrate
voltage
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刘泽文
陈琦
王一凡
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清华大学
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B01—PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
    • B01D—SEPARATION
    • B01D67/00—Processes specially adapted for manufacturing semi-permeable membranes for separation processes or apparatus
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N27/00—Investigating or analysing materials by the use of electric, electrochemical, or magnetic means
    • G01N27/26—Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating electrochemical variables; by using electrolysis or electrophoresis
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    • G01N27/413—Concentration cells using liquid electrolytes measuring currents or voltages in voltaic cells

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  • the present invention relates to the field of nanofabrication technology, and in particular to a method for regulating the effective size of solid nanopore in a solid state nanopore system.
  • nanopores can be roughly divided into: bio-nanopores, solid-state nanopores, and composite nanopores.
  • bio-nanopores solid-state nanopores
  • composite nanopores Compared with the early application of biological nanopores, solid nanopores, due to their superior robustness, better semiconductor and microfluid preparation compatibility, and more flexible preparation methods, are receiving more and more attention from the academic community. With emphasis. Solid-state nanopores have a wide range of applications and broad developments in many fields, such as DNA single-molecule sequencing, nanolithography, near-field optical modulation, ion logic circuits, microfluidics and natural simulation platforms, water purification and desalination, and organic Degradation of pollutants, etc.
  • the size of the nanopore is related to the thermal conductivity and conductance of the nanoporous membrane, the surface crystallization, the adsorption of the fluid on the nanopore wall surface, and the ion transport properties in the nanopore. Therefore, how to effectively control the size of the nanopore, has great significance.
  • FIB focused ion beam
  • FEB focused electron beam
  • the present invention aims to solve at least one of the technical problems in the related art to some extent. To this end, it is an object of the present invention to provide a method for regulating the effective size of solid-state nanopores that is reversible, efficient, low-cost, non-invasive or controllable.
  • the invention provides a method of regulating the effective size of solid nanopores in a solid state nanopore system.
  • the solid-state nanopore system includes: an electrolyte solution; a semiconductor substrate on which a solid-state nanopore is disposed and placed in the electrolyte solution, the solid-state nanopore wall surface One And absorbing a second charged ion to form an electric double layer on the wall surface of the nanopore, wherein the first electric charge and the second electric charge are opposite in polarity; a voltage component, the voltage component and the The semiconductor substrate is electrically connected; the method for regulating the effective size of the solid nanopore in the solid state nanopore system comprises: applying a predetermined voltage with a different voltage value to the semiconductor substrate through the voltage component to obtain a solid nanopore of different sizes size.
  • the inventors have found that the magnitude of the predetermined voltage applied to the semiconductor substrate affects the effective size of the solid-state nanopore, and by applying a voltage component to the semiconductor substrate to apply a predetermined voltage having a different voltage value, the effective size of the solid-state nanopore can be changed accordingly. Therefore, the effective size of the solid nanopore can be regulated in real time, and the method is reversible, high-efficiency, low-cost, no damage, does not introduce foreign materials and affects the surface characteristics of the solid nanopore, and does not adversely affect the length of the solid nanopore.
  • the influence, the shape retention is good, the operation steps are simple, the time and labor are saved, and the controllability is good, and the automation and real-time regulation can be realized.
  • the solid-state nanopore effective size d d 0 -2 ⁇ D , wherein d 0 is the physical size of the solid-state nanopore, ⁇ D is the thickness of the electric double layer and satisfies the following formula:
  • I a potential of a predetermined position in the solid-state nanopore, and has a predetermined correspondence relationship with the predetermined voltage, where x is a distance between the predetermined position and a center of a circumcircle of the cross-sectional shape of the solid-state nanohole, e
  • K B is the Boltzmann constant and T is the temperature.
  • the potential of the predetermined position in the solid-state nanopore satisfies the following relationship:
  • R is the distance between the solid nanopore wall surface of the solid nanopore cross-sectional pattern and the center of the circumcircle of the cross-sectional pattern
  • ⁇ * w is the charge density of the solid nanopore wall surface
  • ⁇ f is a dielectric constant of the electrolyte solution at a position corresponding to R
  • ⁇ w is a charge density of the solid nanopore wall surface when the predetermined voltage is zero
  • ⁇ g is a dielectric of the solid nanopore wall material
  • E g is the electric field strength produced by the predetermined voltage.
  • the charge density is determined by a high precision charge meter.
  • the solid state nanoholes are in the shape of an inverted pyramid.
  • the electrolyte solution has a solubility of from 1 ⁇ mol/L to 1 mol/L and a pH of from 4.0 to 10.0.
  • the material forming the semiconductor substrate is silicon.
  • FIG. 1 shows a schematic structural view of a solid state nanopore system in accordance with an embodiment of the present invention.
  • Solid-state nanopores with superior robustness, semiconductor and microfluidic preparation compatibility, and more flexible preparation methods in DNA single-molecule sequencing, nanolithographic printing, near-field optical modulation, ion logic circuits, microfluidics, and natural
  • the simulation platform has good application prospects in the fields of water purification and desalination and degradation of organic pollutants. In actual use, different working conditions, different application requirements, different technical requirements, etc.
  • the reversible, high-efficiency, low-cost, non-invasive controllable method for measuring the effective size of nanopores is of great significance for realizing the application of solid-state nanopore sensors for molecular detection, separation, sequencing, etc., and improving sequencing accuracy.
  • the inventors found that when the solid nanopores are placed in an electrolyte solution, the wall surface will have a certain charge under certain conditions, so that it can adsorb the oppositely charged ions in the electrolyte solution to form an electric double layer on the surface. Structure, and the thickness of the electric double layer structure is related to the effective size of the solid nanopore.
  • the thickness of the electric double layer can be adjusted, the solid nanohole can be controlled reversibly, efficiently, at low cost, without damage and with good controllability.
  • the effective size the inventors further found that the thickness of the electric double layer is related to the potential of the solid nanopore, and the potential of the solid nanopore varies with the voltage of the substrate carrying the solid nanopore, thus The voltage of the substrate of the solid nanopore can easily realize the regulation of the effective size of the solid nanopore.
  • the present invention provides a method of regulating the effective size of solid nanopores in a solid state nanopore system.
  • the solid-state nanopore system includes: an electrolyte solution 4; a semiconductor substrate 3 on which a solid-state nanopore 1 is disposed and placed in the electrolyte solution 4.
  • the solid nanopore 1 wall has a first charge and adsorbs a second charged ion to form an electric double layer 2 on the nanopore wall surface, wherein the first charge and the second charge electrical property
  • the solid-state nanopore effective size d e d 0 -2 ⁇ D , wherein d 0 is the physical size of the solid-state nanopore 1 , ⁇ D is the thickness of the electric double layer 2 , and the voltage component 5,
  • the inventors have found that the magnitude of the predetermined voltage applied to the semiconductor substrate affects the effective size of the solid-state nanopore, and by applying a voltage component to the semiconductor substrate to apply a predetermined voltage having a different voltage value, the thickness of the electric double layer can be adjusted.
  • the effective size of the solid nanopore is changed accordingly, so that the effective size of the solid nanopore can be adjusted in real time, and the method is reversible, high-efficiency, low-cost, no damage, and does not introduce foreign materials to affect the surface characteristics of the solid nanopore, nor will it affect
  • the length of the solid nanopore has adverse effects, good shape retention, simple operation steps, time and labor saving, and good controllability, and can realize automation and real-time regulation.
  • the specific kind of the semiconductor substrate that can be employed according to the embodiment of the present invention is not particularly limited, and those skilled in the art can flexibly select according to actual use requirements and technical conditions.
  • the material from which the semiconductor substrate is formed is silicon. Thereby, it has good semiconductor characteristics and controllable processability, and has a wide range of use.
  • a specific method of forming solid nanoholes on a semiconductor substrate is not particularly limited, and those skilled in the art can flexibly select as needed.
  • solid state nanopores can be formed by a wet etch process.
  • a protective layer may be formed on the surface of the semiconductor substrate, and then the protective layer is patterned by a process such as photolithography, and then exposed by an etching solution such as an alkaline etching solution such as potassium hydroxide.
  • the semiconductor substrate is etched to form solid nanoholes.
  • the specific number of solid-state nanoholes is also not particularly limited, and may be one or plural, such as several, ten, tens, hundreds, or even tens of thousands.
  • the manner in which the solid-state nanopores are distributed on the semiconductor substrate is not particularly limited, may be distributed according to a predetermined rule, or may be randomly distributed.
  • a plurality of solid-states Nanopores can be distributed in an array. Therefore, it is easy to manufacture and convenient to use.
  • the specific shape of the above solid state nanopore is not particularly limited, and those skilled in the art can flexibly select according to needs.
  • the solid state nanopores may be in the shape of an inverted pyramid.
  • the effective length of the solid-state nanopore can be regarded as several atomic layer thicknesses, which solves the problem that the conventional solid-state nanopore channel is too long to cause the sequencing resolution to be difficult to reach a single Base problem.
  • the term "physical size of solid state nanoholes” as used herein refers to the minimum distance between two opposing solid nanohole walls on a longitudinal section of a semiconductor substrate for solid shaped nanoholes of different shapes. "Effective size of solid state nanopores” refers to the minimum distance between two opposing electrical double layers on a longitudinal section of a semiconductor substrate.
  • the type of charge carried on the wall surface of the solid nanopore is not particularly limited, and may be a positive charge or a negative charge.
  • the solid nanopore wall surface is adsorbed and charged.
  • the oppositely charged ions form an electric double layer, that is, the positive charge on the wall surface of the solid nanopore adsorbs the anion to form an electric double layer, and the negative charge on the wall surface of the solid nanopore adsorbs the cation to form an electric double layer.
  • the solid nanopore wall has a certain degree of negative charge, and a small amount of cation is adsorbed in the electrolyte solution to form an electric double layer structure on the inner wall.
  • the effective size of the solid nanopore is related to the thickness of the electric double layer. After the solid nanohole having a certain physical size is formed on the semiconductor substrate, if the thickness of the electric double layer can be adjusted, the solid nanometer can be realized. Regulation of the effective size of the well. According to an embodiment of the invention, ⁇ D satisfies the following formula:
  • K B is the Boltzmann constant
  • T is the temperature. Therefore, based on the predetermined correspondence relationship and the above formula, the size of the ⁇ D can be controlled by controlling the magnitude of the predetermined voltage, thereby realizing the regulation of the effective size of the solid nanopore, and changing the effective size of the solid nanopore by using an electrical method,
  • the predetermined correspondence between the potential of the predetermined position in the solid-state nanopore and the predetermined voltage may be determined by applying a series of predetermined voltages having different voltage values to the semiconductor substrate through the voltage component, respectively detecting different voltage values The potential of the predetermined position in the corresponding solid state nanopore.
  • the correspondence between the potential of the predetermined position in the solid-state nanopore and the predetermined voltage within a certain range can be determined, thereby enabling regulation
  • the magnitude of the voltage of the predetermined voltage regulates the effective size of the solid nanopore.
  • the specific number of predetermined voltages having different voltage values is not particularly limited, and those skilled in the art can flexibly select according to actual needs.
  • the predetermined voltage and the potential of the predetermined position in the solid nanopore may be in a curved relationship or the like, and those skilled in the art may determine different potentials of the predetermined voltage according to the requirements of different correlations, and then prepare a comparison table or pass Algorithms such as simulation and fitting determine the correspondence between the two.
  • the potential of the predetermined position in the solid-state nanopore satisfies the following relationship:
  • R is the distance between the solid nanopore wall surface of the solid nanopore cross-sectional pattern and the center of the circumcircle of the cross-sectional pattern
  • ⁇ * w is the charge density of the solid nanopore wall surface
  • ⁇ f is the position corresponding to R (ie, in the solid-state nanopore cross-sectional pattern, at the solid nanopore wall surface at a distance R from the center of the circumcircle of the cross-sectional pattern)
  • the dielectric constant of the electrolyte solution ⁇ w is a charge density of the solid nanopore wall surface when the predetermined voltage is zero
  • ⁇ g is a dielectric constant of the solid nanopore wall material
  • E g is an electric field intensity generated by the predetermined voltage.
  • the specific method of determining the charge density in the above steps is not particularly limited, and those skilled in the art can flexibly select as long as it can be accurately measured.
  • the charge density of the solid nanopore wall surface can be determined by a high precision charge meter. Thereby, the device is simple, the operation is easy, the accuracy is high, and the cost is low.
  • the electrolyte solution that can be employed according to an embodiment of the present invention is not particularly limited. Those skilled in the art can flexibly choose according to needs.
  • the electrolyte solution has a solubility of from 1 ⁇ mol/L to 1 mol/L and a pH of from 4.0 to 10.0.
  • the electrolyte solution may be a KCl, NaCl or LiCl solution.
  • the raw materials are widely available, easy to obtain, low in cost, and safe.
  • the thickness of the electric double layer is not only affected by the potential of the solid nanopore, but also with the parameters of the electrolyte solution, such as various ion concentrations inside the electrolyte solution n i 0 (ion in unit volume) The number) is related to the valence Z i .
  • the above method of the present invention is applicable to the case of a specific electrolyte.
  • a correspondence between a predetermined voltage and a potential at a predetermined position in the solid nanopore can be determined in combination with a conventional test means or a calculation method, thereby determining between the predetermined voltage and the thickness of the electric double layer.
  • the relationship, so that the thickness of the electric double layer can be controlled by controlling the predetermined voltage, and the effective size of the solid nanopore can be controlled.

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Abstract

A method for adjusting an effective size of a solid-state nanopore (1) in a solid-state nanopore system. The solid-state nanopore system comprises an electrolyte solution (4), a semiconductor substrate (3), and a voltage assembly (5). The semiconductor substrate (3) is provided with the solid-state nanopores (1), and is disposed in the electrolyte solution (4), icons are adsorbed to wall surfaces of the solid-state nanopores (1) to form a double electric layer (2), and the voltage assembly (5) is electrically connected to the semiconductor substrate (3). The method comprises: applying preset voltages of different voltage values on a semiconductor substrate (3) by means of a voltage assembly (5), so as to obtain effective sizes of solid-state nanopores (1) of different sizes. The method can be reversible, has a high efficiency and low costs, produces no harm, does not affect surface features of the solid-state nanopores (1) due to introduction of a foreign material, and does not have a negative effect on the lengths of the solid-state nanopores (1) and the like, and the form retention of the solid-state nanopores (1) is good; and the method has simple operation steps, saves time and labor and has good controllability, and the adjustment can be automatically implemented in real time.

Description

调控固态纳米孔***中固态纳米孔有效尺寸的方法Method for regulating effective size of solid nanopore in solid state nanopore system 技术领域Technical field
本发明涉及纳米制造技术领域，具体的，涉及调控固态纳米孔***中固态纳米孔有效尺寸的方法。The present invention relates to the field of nanofabrication technology, and in particular to a method for regulating the effective size of solid nanopore in a solid state nanopore system.
背景技术Background technique
作为基于纳米孔传感器的关键平台，纳米孔大致可以分为：生物纳米孔、固态纳米孔以及复合型纳米孔。较之早期应用比较广泛的生物纳米孔，固态纳米孔，由于其更优越的鲁棒性，更好的半导体和微流体制备兼容性，以及更灵活的制备方法，越来越受到学术界的关注与重视。固态纳米孔在许多领域有着广泛的应用和广阔的发展空间，如DNA单分子测序、纳米光刻印刷、近场光学调制、离子逻辑电路、微流控及自然模拟平台，水净化与淡化以及有机污染物降解等。而纳米孔的尺寸与承载纳米孔的薄膜的热导和电导、表面结晶、流体对纳米孔壁面的吸附作用，以及纳米孔中的离子传输特性有关，因此，如何对纳米孔尺寸进行有效调控，具有重大意义。As a key platform based on nanopore sensors, nanopores can be roughly divided into: bio-nanopores, solid-state nanopores, and composite nanopores. Compared with the early application of biological nanopores, solid nanopores, due to their superior robustness, better semiconductor and microfluid preparation compatibility, and more flexible preparation methods, are receiving more and more attention from the academic community. With emphasis. Solid-state nanopores have a wide range of applications and broad developments in many fields, such as DNA single-molecule sequencing, nanolithography, near-field optical modulation, ion logic circuits, microfluidics and natural simulation platforms, water purification and desalination, and organic Degradation of pollutants, etc. The size of the nanopore is related to the thermal conductivity and conductance of the nanoporous membrane, the surface crystallization, the adsorption of the fluid on the nanopore wall surface, and the ion transport properties in the nanopore. Therefore, how to effectively control the size of the nanopore, has great significance.
目前常用的纳米孔尺寸的调控方法分为聚焦离子束(FIB)或聚焦电子束(FEB)雕刻法、材料淀积法和直接氧化法。然而，这些方法主要基于不可逆的物理和化学变化对纳米孔进行修饰，在实际应用中面临一些根本性的问题。例如，FIB/FEB雕刻技术中纳米孔在高能量离子束或电子束的轰击作用下，会发生不可逆的机械损伤。材料淀积法会引入外来材料，改变纳米孔的表面特性，同时也增加了纳米孔的长度，降低了基于固态纳米孔的DNA测序的空间分辨率。直接氧化法保形性差、耗时且费力。At present, the commonly used methods for controlling the size of nanopore are classified into focused ion beam (FIB) or focused electron beam (FEB) engraving, material deposition and direct oxidation. However, these methods are mainly based on irreversible physical and chemical changes to modify the nanopore, and face some fundamental problems in practical applications. For example, in the FIB/FEB engraving technique, nanopores can undergo irreversible mechanical damage under the action of high energy ion beam or electron beam bombardment. The material deposition method introduces foreign materials, changes the surface characteristics of the nanopore, and also increases the length of the nanopore, reducing the spatial resolution of DNA sequencing based on solid-state nanopore. The direct oxidation method is poor in shape retention, time consuming and laborious.
因此，目前制备纳米孔的相关技术仍有待改进。Therefore, the related technology for preparing nanopores is still to be improved.
发明内容Summary of the invention
本发明旨在至少在一定程度上解决相关技术中的技术问题之一。为此，本发明的一个目的在于提出一种可逆、高效、低成本、无损伤或可控性好的调控固态纳米孔有效尺寸的方法。The present invention aims to solve at least one of the technical problems in the related art to some extent. To this end, it is an object of the present invention to provide a method for regulating the effective size of solid-state nanopores that is reversible, efficient, low-cost, non-invasive or controllable.
在本发明的一个方面，本发明提供了一种调控固态纳米孔***中固态纳米孔有效尺寸的方法。根据本发明的实施例，该固态纳米孔***包括：电解质溶液；半导体衬底，所述半导体衬底上设置有固态纳米孔，且置于所述电解质溶液中，所述固态纳米孔壁面带第一 电荷，并吸附带第二电荷的离子以在所述纳米孔壁面上形成双电层，其中，所述第一电荷和所述第二电荷电性相反；电压组件，所述电压组件与所述半导体衬底电连接；该调控固态纳米孔***中固态纳米孔有效尺寸的方法包括：通过所述电压组件对所述半导体衬底施加电压值不同的预定电压，以获得大小不同的固态纳米孔有效尺寸。发明人发现，施加给半导体衬底的预定电压的大小会影响固态纳米孔有效尺寸的大小，通过设置电压组件给半导体衬底施加电压值不同的预定电压，即可使得固态纳米孔有效尺寸相应变化，从而能够实时调控固态纳米孔有效尺寸，且该方法可逆、高效、低成本、无损伤，不会引入外来材料而影响固态纳米孔的表面特性，也不会对固态纳米孔的长度等产生不利影响，保形性好，操作步骤简单，省时省力，且可控性好，可实现自动化、实时调控。In one aspect of the invention, the invention provides a method of regulating the effective size of solid nanopores in a solid state nanopore system. According to an embodiment of the present invention, the solid-state nanopore system includes: an electrolyte solution; a semiconductor substrate on which a solid-state nanopore is disposed and placed in the electrolyte solution, the solid-state nanopore wall surface One And absorbing a second charged ion to form an electric double layer on the wall surface of the nanopore, wherein the first electric charge and the second electric charge are opposite in polarity; a voltage component, the voltage component and the The semiconductor substrate is electrically connected; the method for regulating the effective size of the solid nanopore in the solid state nanopore system comprises: applying a predetermined voltage with a different voltage value to the semiconductor substrate through the voltage component to obtain a solid nanopore of different sizes size. The inventors have found that the magnitude of the predetermined voltage applied to the semiconductor substrate affects the effective size of the solid-state nanopore, and by applying a voltage component to the semiconductor substrate to apply a predetermined voltage having a different voltage value, the effective size of the solid-state nanopore can be changed accordingly. Therefore, the effective size of the solid nanopore can be regulated in real time, and the method is reversible, high-efficiency, low-cost, no damage, does not introduce foreign materials and affects the surface characteristics of the solid nanopore, and does not adversely affect the length of the solid nanopore. The influence, the shape retention is good, the operation steps are simple, the time and labor are saved, and the controllability is good, and the automation and real-time regulation can be realized.
根据本发明的实施例，所述固态纳米孔有效尺寸d＝d0-2λD，其中d0为所述固态纳米孔的物理尺寸，λD为所述双电层的厚度且满足以下公式：According to an embodiment of the invention, the solid-state nanopore effective size d=d 0 -2λ D , wherein d 0 is the physical size of the solid-state nanopore, λ D is the thickness of the electric double layer and satisfies the following formula:
Figure PCTCN2017114642-appb-000001
Figure PCTCN2017114642-appb-000001
Figure PCTCN2017114642-appb-000002
Figure PCTCN2017114642-appb-000002
其中，
Figure PCTCN2017114642-appb-000003
是所述固态纳米孔中预定位置的电势，且与所述预定电压具有预定对应关系，x为所述预定位置与所述固态纳米孔的横截面图形的外接圆的圆心之间的距离，e为单位电荷电量，KB是玻尔兹曼常数，T为温度。among them,
Figure PCTCN2017114642-appb-000003
Is a potential of a predetermined position in the solid-state nanopore, and has a predetermined correspondence relationship with the predetermined voltage, where x is a distance between the predetermined position and a center of a circumcircle of the cross-sectional shape of the solid-state nanohole, e For unit charge, K B is the Boltzmann constant and T is the temperature.
根据本发明的实施例，当所述预定电压的电压值不为零时，所述固态纳米孔中预定位置的电势满足以下关系：According to an embodiment of the present invention, when the voltage value of the predetermined voltage is not zero, the potential of the predetermined position in the solid-state nanopore satisfies the following relationship:
Figure PCTCN2017114642-appb-000004
Figure PCTCN2017114642-appb-000004
σW *＝σW+εgEg        (4)σ W * =σ W +ε g E g (4)
其中，R为所述固态纳米孔横截面图形中所述固态纳米孔壁面与所述横截面图形的外接圆的圆心之间的距离，σ* w为所述固态纳米孔壁面的电荷密度，εf是与R对应的位置处所述电解质溶液的介电常数，σw是所述预定电压为零时所述固态纳米孔壁面的电荷密度，εg是所述固态纳米孔壁面物质的介电常数，Eg是所述预定电压产生的电场强度。Wherein R is the distance between the solid nanopore wall surface of the solid nanopore cross-sectional pattern and the center of the circumcircle of the cross-sectional pattern, and σ * w is the charge density of the solid nanopore wall surface, ε f is a dielectric constant of the electrolyte solution at a position corresponding to R, σ w is a charge density of the solid nanopore wall surface when the predetermined voltage is zero, and ε g is a dielectric of the solid nanopore wall material The constant, E g , is the electric field strength produced by the predetermined voltage.
根据本发明的实施例，所述电荷密度是通过高精度电荷仪进行测定的。According to an embodiment of the invention, the charge density is determined by a high precision charge meter.
根据本发明的实施例，所述固态纳米孔呈倒金字塔形。According to an embodiment of the invention, the solid state nanoholes are in the shape of an inverted pyramid.
根据本发明的实施例，所述电解质溶液的溶度为1μmol/L～1mol/L，pH值为4.0～10.0。According to an embodiment of the present invention, the electrolyte solution has a solubility of from 1 μmol/L to 1 mol/L and a pH of from 4.0 to 10.0.
根据本发明的实施例，形成所述半导体衬底的材料为硅。 According to an embodiment of the invention, the material forming the semiconductor substrate is silicon.
附图说明DRAWINGS
图1显示了根据本发明实施例的固态纳米孔***的结构示意图。1 shows a schematic structural view of a solid state nanopore system in accordance with an embodiment of the present invention.
具体实施方式Detailed ways
下面详细描述本发明的实施例。下面描述的实施例是示例性的，仅用于解释本发明，而不能理解为对本发明的限制。实施例中未注明具体技术或条件的，按照本领域内的文献所描述的技术或条件或者按照产品说明书进行。所用试剂或仪器未注明生产厂商者，均为可以通过市购获得的常规产品。Embodiments of the present invention are described in detail below. The embodiments described below are illustrative only and are not to be construed as limiting the invention. Where specific techniques or conditions are not indicated in the examples, they are carried out according to the techniques or conditions described in the literature in the art or in accordance with the product specifications. The reagents or instruments used are not indicated by the manufacturer, and are conventional products that can be obtained commercially.
本发明是基于发明人的以下发现和认识而完成的：The present invention has been completed based on the following findings and knowledge of the inventors:
固态纳米孔具有优越的鲁棒性、半导体和微流体制备兼容性、以及更灵活的制备方法，在DNA单分子测序、纳米光刻印刷、近场光学调制、离子逻辑电路、微流控及自然模拟平台，水净化与淡化和有机污染物降解等领域具有良好的应用前景。在实际使用过程中，针对不同的工作条件，不同的应用对象、不同技术要求等往往要求固态纳米孔具有不同的尺寸，这就需要对固态纳米孔的尺寸进行调控，如果能够提出一种可以对纳米孔有效尺寸可逆、高效、低成本、无损伤的可控性调控方法，则对实现利用固态纳米孔传感器进行分子检测、分离、测序等应用，提高测序精度等具有重要意义。发明人研究过程中发现，当固态纳米孔置于电解质溶液中时，在一定条件下其壁面会带一定电荷，由此其可吸附电解质溶液中带有相反电荷的离子在其表面形成双电层结构，而该双电层结构的厚度与固态纳米孔的有效尺寸有关，如果能够调控该双电层的厚度，则可以可逆、高效、低成本、无损伤且可控性好的调控固态纳米孔有效尺寸，发明人进一步研究发现，双电层的厚度与固态纳米孔的电势有关，而固态纳米孔的电势会随着承载固态纳米孔的衬底的电压的变化而变化，因此，通过调控承载固态纳米孔的衬底的电压即可容易的实现对固态纳米孔有效尺寸的调控。Solid-state nanopores with superior robustness, semiconductor and microfluidic preparation compatibility, and more flexible preparation methods in DNA single-molecule sequencing, nanolithographic printing, near-field optical modulation, ion logic circuits, microfluidics, and natural The simulation platform has good application prospects in the fields of water purification and desalination and degradation of organic pollutants. In actual use, different working conditions, different application requirements, different technical requirements, etc. often require solid nanopores to have different sizes, which requires adjustment of the size of solid nanopores, if one can propose The reversible, high-efficiency, low-cost, non-invasive controllable method for measuring the effective size of nanopores is of great significance for realizing the application of solid-state nanopore sensors for molecular detection, separation, sequencing, etc., and improving sequencing accuracy. During the research process, the inventors found that when the solid nanopores are placed in an electrolyte solution, the wall surface will have a certain charge under certain conditions, so that it can adsorb the oppositely charged ions in the electrolyte solution to form an electric double layer on the surface. Structure, and the thickness of the electric double layer structure is related to the effective size of the solid nanopore. If the thickness of the electric double layer can be adjusted, the solid nanohole can be controlled reversibly, efficiently, at low cost, without damage and with good controllability. The effective size, the inventors further found that the thickness of the electric double layer is related to the potential of the solid nanopore, and the potential of the solid nanopore varies with the voltage of the substrate carrying the solid nanopore, thus The voltage of the substrate of the solid nanopore can easily realize the regulation of the effective size of the solid nanopore.
有鉴于此，在本发明的一个方面，本发明提供了一种调控固态纳米孔***中固态纳米孔有效尺寸的方法。根据本发明的实施例，参照图1，该固态纳米孔***包括：电解质溶液4；半导体衬底3，所述半导体衬底3上设置有固态纳米孔1，且置于所述电解质溶液4中，所述固态纳米孔1壁面带第一电荷，并吸附带第二电荷的离子以在所述纳米孔壁面上形成双电层2，其中，所述第一电荷和所述第二电荷电性相反，所述固态纳米孔有效尺寸de＝d0-2λD，其中d0为所述固态纳米孔1的物理尺寸，λD为所述双电层2的厚度；电压组件5，所述电压组件5与所述半导体衬底3电连接；该调控固态纳米孔***中固态纳米孔有效尺寸的方法包括：通过所述电压组件5对所述半导体衬底3施加电压值不同的预定电压， 以获得大小不同的固态纳米孔有效尺寸de。发明人发现，施加给半导体衬底的预定电压的大小会影响固态纳米孔有效尺寸的大小，通过设置电压组件给半导体衬底施加电压值不同的预定电压，可以调控双电层的厚度，从而可使得固态纳米孔有效尺寸相应变化，从而能够实时调控固态纳米孔有效尺寸，且该方法可逆、高效、低成本、无损伤，不会引入外来材料而影响固态纳米孔的表面特性，也不会对固态纳米孔的长度等产生不利影响，保形性好，操作步骤简单，省时省力，且可控性好，可实现自动化、实时调控。In view of this, in one aspect of the invention, the present invention provides a method of regulating the effective size of solid nanopores in a solid state nanopore system. According to an embodiment of the present invention, referring to FIG. 1, the solid-state nanopore system includes: an electrolyte solution 4; a semiconductor substrate 3 on which a solid-state nanopore 1 is disposed and placed in the electrolyte solution 4. The solid nanopore 1 wall has a first charge and adsorbs a second charged ion to form an electric double layer 2 on the nanopore wall surface, wherein the first charge and the second charge electrical property In contrast, the solid-state nanopore effective size d e =d 0 -2λ D , wherein d 0 is the physical size of the solid-state nanopore 1 , λ D is the thickness of the electric double layer 2 , and the voltage component 5, The voltage component 5 is electrically connected to the semiconductor substrate 3; the method for regulating the effective size of the solid-state nanopore in the solid-state nanopore system comprises: applying a predetermined voltage with a different voltage value to the semiconductor substrate 3 through the voltage component 5, To obtain the effective size d e of the solid nanopore of different sizes. The inventors have found that the magnitude of the predetermined voltage applied to the semiconductor substrate affects the effective size of the solid-state nanopore, and by applying a voltage component to the semiconductor substrate to apply a predetermined voltage having a different voltage value, the thickness of the electric double layer can be adjusted. The effective size of the solid nanopore is changed accordingly, so that the effective size of the solid nanopore can be adjusted in real time, and the method is reversible, high-efficiency, low-cost, no damage, and does not introduce foreign materials to affect the surface characteristics of the solid nanopore, nor will it affect The length of the solid nanopore has adverse effects, good shape retention, simple operation steps, time and labor saving, and good controllability, and can realize automation and real-time regulation.
根据本发明的实施例，可以采用的半导体衬底的具体种类没有特别限制，本领域技术人员可以根据实际使用要求和技术条件灵活选择。在本发明的一些实施例中，形成半导体衬底的材料为硅。由此，具有良好的半导体特性和可控加工性，且使用范围较广。The specific kind of the semiconductor substrate that can be employed according to the embodiment of the present invention is not particularly limited, and those skilled in the art can flexibly select according to actual use requirements and technical conditions. In some embodiments of the invention, the material from which the semiconductor substrate is formed is silicon. Thereby, it has good semiconductor characteristics and controllable processability, and has a wide range of use.
根据本发明的实施例，在半导体衬底上形成固态纳米孔的具体方法没有特别限制，本领域技术人员可以根据需要灵活选择。在本发明的一些实施例中，可以通过湿法刻蚀方法形成固态纳米孔。具体的，可以在半导体衬底的表面上形成保护层，然后通过光刻等工艺对所述保护层进行图案化处理，然后利用刻蚀液，如氢氧化钾等碱性刻蚀液对暴露的半导体衬底进行刻蚀，从而形成固态纳米孔。According to an embodiment of the present invention, a specific method of forming solid nanoholes on a semiconductor substrate is not particularly limited, and those skilled in the art can flexibly select as needed. In some embodiments of the invention, solid state nanopores can be formed by a wet etch process. Specifically, a protective layer may be formed on the surface of the semiconductor substrate, and then the protective layer is patterned by a process such as photolithography, and then exposed by an etching solution such as an alkaline etching solution such as potassium hydroxide. The semiconductor substrate is etched to form solid nanoholes.
根据本发明的实施例，固态纳米孔的具体数量也没有特别限制，可以为一个，也可以为多个，如几个、十几个、几十个、几百个甚至成千上万个。当固态纳米孔的数量为多个时，固态纳米孔在半导体衬底上的分布方式也没有特别限制，可以按照预定规则分布，也可以随机分布，在本发明的一些实施例中，多个固态纳米孔可以阵列分布。由此，便于制作，方便使用。According to an embodiment of the present invention, the specific number of solid-state nanoholes is also not particularly limited, and may be one or plural, such as several, ten, tens, hundreds, or even tens of thousands. When the number of solid-state nanopores is plural, the manner in which the solid-state nanopores are distributed on the semiconductor substrate is not particularly limited, may be distributed according to a predetermined rule, or may be randomly distributed. In some embodiments of the present invention, a plurality of solid-states Nanopores can be distributed in an array. Therefore, it is easy to manufacture and convenient to use.
根据本发明的实施例，上述固态纳米孔的具体形状没有特别限制，本领域技术人员可以根据需要灵活选择。在本发明的一些实施例中，固态纳米孔可以呈倒金字塔形。在应用到DNA测序中时，由于有效测序区域集中在锥尖处，可视为固态纳米孔的有效长度为几个原子层厚度，解决了常规固态纳米孔通道太长导致测序分辨率难以达到单个碱基的问题。According to an embodiment of the present invention, the specific shape of the above solid state nanopore is not particularly limited, and those skilled in the art can flexibly select according to needs. In some embodiments of the invention, the solid state nanopores may be in the shape of an inverted pyramid. When applied to DNA sequencing, since the effective sequencing region is concentrated at the tip of the cone, the effective length of the solid-state nanopore can be regarded as several atomic layer thicknesses, which solves the problem that the conventional solid-state nanopore channel is too long to cause the sequencing resolution to be difficult to reach a single Base problem.
根据本发明的实施例，针对不同形状的固态纳米孔，本文中所采用的术语“固态纳米孔的物理尺寸”是指半导体衬底纵剖面上相对的两个固态纳米孔壁面之间的最小距离，“固态纳米孔的有效尺寸”是指半导体衬底纵剖面上相对的两个双电层之间的最小距离。According to embodiments of the present invention, the term "physical size of solid state nanoholes" as used herein refers to the minimum distance between two opposing solid nanohole walls on a longitudinal section of a semiconductor substrate for solid shaped nanoholes of different shapes. "Effective size of solid state nanopores" refers to the minimum distance between two opposing electrical double layers on a longitudinal section of a semiconductor substrate.
根据本发明的实施例，固态纳米孔壁面上所带的电荷的种类没有特别限制，可以为正电荷也可以为负电荷，基于同性相斥异性相吸的原理，固态纳米孔壁面上会吸附带电性相反的电荷的离子形成双电层，即固态纳米孔壁面上带正电荷则吸附阴离子形成双电层，固态纳米孔壁面上带负电荷则吸附阳离子形成双电层。在本发明的一个具体示例中，半导体衬底由硅形成，由于固态纳米孔在空气中极易氧化而生成SiO2，而SiO2的零电位点为 pH＝2.5左右，故在近似中性的电解质溶液中，固态纳米孔壁呈一定程度的负电性，在电解质溶液中会吸附少量的阳离子而在内壁形成双电层结构。According to an embodiment of the present invention, the type of charge carried on the wall surface of the solid nanopore is not particularly limited, and may be a positive charge or a negative charge. Based on the principle of isotropic repulsive attraction, the solid nanopore wall surface is adsorbed and charged. The oppositely charged ions form an electric double layer, that is, the positive charge on the wall surface of the solid nanopore adsorbs the anion to form an electric double layer, and the negative charge on the wall surface of the solid nanopore adsorbs the cation to form an electric double layer. In a specific example of the present invention, the semiconductor substrate is formed of silicon, and since the solid nanopore is easily oxidized in the air to form SiO 2 , and the zero potential point of SiO 2 is about pH=2.5, it is approximately neutral. In the electrolyte solution, the solid nanopore wall has a certain degree of negative charge, and a small amount of cation is adsorbed in the electrolyte solution to form an electric double layer structure on the inner wall.
如前所述，固态纳米孔有效尺寸与双电层的厚度有关，那么在半导体衬底上形成具有一定物理尺寸的固态纳米孔后，如果可以调控双电层的厚度，则可以实现对固态纳米孔有效尺寸的调控。根据本发明的实施例，λD满足以下公式：As described above, the effective size of the solid nanopore is related to the thickness of the electric double layer. After the solid nanohole having a certain physical size is formed on the semiconductor substrate, if the thickness of the electric double layer can be adjusted, the solid nanometer can be realized. Regulation of the effective size of the well. According to an embodiment of the invention, λ D satisfies the following formula:
Figure PCTCN2017114642-appb-000005
Figure PCTCN2017114642-appb-000005
Figure PCTCN2017114642-appb-000006
Figure PCTCN2017114642-appb-000006
其中，
Figure PCTCN2017114642-appb-000007
是所述固态纳米孔中预定位置的电势，且与所述预定电压具有预定对应关系，x为所述预定位置与所述固态纳米孔的横截面图形的外接圆的圆心之间的距离，e为单位电荷电量，KB是玻尔兹曼常数，T为温度。由此，基于所述预定对应关系和上述公式，通过控制预定电压的大小即可调控λD的大小，从而可以实现对固态纳米孔有效尺寸的调控，利用电学方法改变固态纳米孔有效尺寸，具有操作方便、可逆、及时、低成本、高效的优点。among them,
Figure PCTCN2017114642-appb-000007
Is a potential of a predetermined position in the solid-state nanopore, and has a predetermined correspondence relationship with the predetermined voltage, where x is a distance between the predetermined position and a center of a circumcircle of the cross-sectional shape of the solid-state nanohole, e For unit charge, K B is the Boltzmann constant and T is the temperature. Therefore, based on the predetermined correspondence relationship and the above formula, the size of the λ D can be controlled by controlling the magnitude of the predetermined voltage, thereby realizing the regulation of the effective size of the solid nanopore, and changing the effective size of the solid nanopore by using an electrical method, The advantages of convenient operation, reversibility, timeliness, low cost and high efficiency.
根据本发明的实施例，为了精确的控制固态纳米孔有效尺寸，则需要准确确定固态纳米孔中预定位置的电势和预定电压之间的对应关系。在本发明的一些实施例中。固态纳米孔中预定位置的电势和预定电压之间的预定对应关系可以通过以下步骤确定：通过所述电压组件对所述半导体衬底施加一系列电压值不同的预定电压，分别检测不同电压值时对应的固态纳米孔中预定位置的电势。由此，通过测量一系列不同电压值的预定电压对应的固态纳米孔中预定位置的电势，可以确定一定范围内固态纳米孔中预定位置的电势和预定电压之间的对应关系，从而可以通过调控预定电压的电压值大小调控固态纳米孔有效尺寸的大小。According to an embodiment of the present invention, in order to accurately control the effective size of the solid-state nanopore, it is necessary to accurately determine the correspondence between the potential of the predetermined position in the solid-state nanopore and the predetermined voltage. In some embodiments of the invention. The predetermined correspondence between the potential of the predetermined position in the solid-state nanopore and the predetermined voltage may be determined by applying a series of predetermined voltages having different voltage values to the semiconductor substrate through the voltage component, respectively detecting different voltage values The potential of the predetermined position in the corresponding solid state nanopore. Thus, by measuring the potential of a predetermined position in the solid-state nanopore corresponding to a predetermined voltage of a series of different voltage values, the correspondence between the potential of the predetermined position in the solid-state nanopore and the predetermined voltage within a certain range can be determined, thereby enabling regulation The magnitude of the voltage of the predetermined voltage regulates the effective size of the solid nanopore.
根据本发明的实施例，一系列电压值不同的预定电压的具体数量没有特别限制，本领域技术人员可以根据实际需要灵活选择。例如，预定电压和固态纳米孔中预定位置的电势之间可以呈曲线关系等等，本领域技术人员则可以根据不同相关关系的要求测定不同数量的预定电压对应的电势，然后制作对照表或通过模拟、拟合等算法确定两者之间的对应关系。According to the embodiment of the present invention, the specific number of predetermined voltages having different voltage values is not particularly limited, and those skilled in the art can flexibly select according to actual needs. For example, the predetermined voltage and the potential of the predetermined position in the solid nanopore may be in a curved relationship or the like, and those skilled in the art may determine different potentials of the predetermined voltage according to the requirements of different correlations, and then prepare a comparison table or pass Algorithms such as simulation and fitting determine the correspondence between the two.
根据本发明的一些实施例，当所述预定电压的电压值不为零时，所述固态纳米孔中预定位置的电势满足以下关系：According to some embodiments of the present invention, when the voltage value of the predetermined voltage is not zero, the potential of the predetermined position in the solid-state nanopore satisfies the following relationship:
Figure PCTCN2017114642-appb-000008
Figure PCTCN2017114642-appb-000008
σW *＝σW+εgEg           (4) σ W * =σ W +ε g E g (4)
其中，R为所述固态纳米孔横截面图形中所述固态纳米孔壁面与所述横截面图形的外接圆的圆心之间的距离，σ* w为所述固态纳米孔壁面的电荷密度，εf是与R对应的位置处(即固态纳米孔横截面图形中，与横截面图形的外接圆的圆心之间的距离为R的固态纳米孔壁面处)所述电解质溶液的介电常数，σw是所述预定电压为零时所述固态纳米孔壁面的电荷密度，εg是所述固态纳米孔壁面物质的介电常数，Eg是所述预定电压产生的电场强度。根据本发明的实施例，上述步骤中，测定电荷密度的具体方法没有特别限制，只要能够准确测定，本领域技术人员可以灵活选择。在本发明的一些实施例中，可以通过高精度电荷仪测定所述固态纳米孔壁面的电荷密度。由此，设备简单，操作容易，准确度高，成本较低。根据本发明的实施例，可以采用的电解质溶液没有特别限制。本领域技术人员可以根据需要灵活选择。在本发明的一些实施例中，所述电解质溶液的溶度为1μmol/L～1mol/L，pH值为4.0～10.0。由此，固态纳米孔有效尺寸的调控范围较广，使用效果较佳。根据本发明的具体实施例，电解质溶液可以是KCl、NaCl或LiCl溶液。由此，原料来源广泛，易得，成本较低，且安全性好。Wherein R is the distance between the solid nanopore wall surface of the solid nanopore cross-sectional pattern and the center of the circumcircle of the cross-sectional pattern, and σ * w is the charge density of the solid nanopore wall surface, ε f is the position corresponding to R (ie, in the solid-state nanopore cross-sectional pattern, at the solid nanopore wall surface at a distance R from the center of the circumcircle of the cross-sectional pattern), the dielectric constant of the electrolyte solution, σ w is a charge density of the solid nanopore wall surface when the predetermined voltage is zero, ε g is a dielectric constant of the solid nanopore wall material, and E g is an electric field intensity generated by the predetermined voltage. According to the embodiment of the present invention, the specific method of determining the charge density in the above steps is not particularly limited, and those skilled in the art can flexibly select as long as it can be accurately measured. In some embodiments of the invention, the charge density of the solid nanopore wall surface can be determined by a high precision charge meter. Thereby, the device is simple, the operation is easy, the accuracy is high, and the cost is low. The electrolyte solution that can be employed according to an embodiment of the present invention is not particularly limited. Those skilled in the art can flexibly choose according to needs. In some embodiments of the invention, the electrolyte solution has a solubility of from 1 μmol/L to 1 mol/L and a pH of from 4.0 to 10.0. Therefore, the effective size of the solid nanopore has a wider regulation range and the use effect is better. According to a particular embodiment of the invention, the electrolyte solution may be a KCl, NaCl or LiCl solution. As a result, the raw materials are widely available, easy to obtain, low in cost, and safe.
需要说明的是，实际实验中发现，双电层的厚度不仅受固态纳米孔的电势的影响，其同时与电解质溶液的参数，如电解质溶液内部各种离子浓度ni 0(单位体积中的离子数目)及化合价Zi有关。本发明上述方法适用于针对某一特定电解液的情况。It should be noted that the actual experiment found that the thickness of the electric double layer is not only affected by the potential of the solid nanopore, but also with the parameters of the electrolyte solution, such as various ion concentrations inside the electrolyte solution n i 0 (ion in unit volume) The number) is related to the valence Z i . The above method of the present invention is applicable to the case of a specific electrolyte.
综上所述，通过本发明的上述公式，结合常规测试手段或计算方法即可确定预定电压与固态纳米孔中预定位置的电势之间的对应关系，进而确定预定电压与双电层厚度之间的关系，从而通过控制预定电压即可调控双电层的厚度，实现对固态纳米孔有效尺寸的调控。In summary, by the above formula of the present invention, a correspondence between a predetermined voltage and a potential at a predetermined position in the solid nanopore can be determined in combination with a conventional test means or a calculation method, thereby determining between the predetermined voltage and the thickness of the electric double layer. The relationship, so that the thickness of the electric double layer can be controlled by controlling the predetermined voltage, and the effective size of the solid nanopore can be controlled.
在本说明书的描述中，参考术语“一个实施例”、“一些实施例”、“示例”、“具体示例”、或“一些示例”等的描述意指结合该实施例或示例描述的具体特征、结构、材料或者特点包含于本发明的至少一个实施例或示例中。在本说明书中，对上述术语的示意性表述不必须针对的是相同的实施例或示例。而且，描述的具体特征、结构、材料或者特点可以在任一个或多个实施例或示例中以合适的方式结合。此外，在不相互矛盾的情况下，本领域的技术人员可以将本说明书中描述的不同实施例或示例以及不同实施例或示例的特征进行结合和组合。In the description of the present specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" and the like means a specific feature described in connection with the embodiment or example. A structure, material or feature is included in at least one embodiment or example of the invention. In the present specification, the schematic representation of the above terms is not necessarily directed to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in a suitable manner in any one or more embodiments or examples. In addition, various embodiments or examples described in the specification, as well as features of various embodiments or examples, may be combined and combined.
尽管上面已经示出和描述了本发明的实施例，可以理解的是，上述实施例是示例性的，不能理解为对本发明的限制，本领域的普通技术人员在本发明的范围内可以对上述实施例进行变化、修改、替换和变型。 Although the embodiments of the present invention have been shown and described, it is understood that the above-described embodiments are illustrative and are not to be construed as limiting the scope of the invention. The embodiments are subject to variations, modifications, substitutions and variations.

Claims (7)

  1. 一种调控固态纳米孔***中固态纳米孔有效尺寸的方法，其特征在于，所述固态纳米孔***包括：A method of regulating the effective size of a solid nanopore in a solid state nanopore system, characterized in that the solid state nanopore system comprises:
    电解质溶液；a;
    半导体衬底，所述半导体衬底上设置有固态纳米孔，且置于所述电解质溶液中，所述固态纳米孔壁面带第一电荷，并吸附带第二电荷的离子以在所述纳米孔壁面上形成双电层，其中，所述第一电荷和所述第二电荷电性相反，所述固态纳米孔有效尺寸de＝d0-2λD，其中d0为所述固态纳米孔的物理尺寸，λD为所述双电层的厚度；a semiconductor substrate having a solid nanopore disposed thereon and disposed in the electrolyte solution, the solid nanohole wall having a first charge and adsorbing a second charged ion to the nanopore Forming an electric double layer on the wall surface, wherein the first electric charge and the second electric charge are opposite in electrical polarity, the solid nanopore effective size d e =d 0 -2λ D , wherein d 0 is the solid nanopore Physical dimension, λ D is the thickness of the electric double layer;
    电压组件，所述电压组件与所述半导体衬底电连接；a voltage component, the voltage component being electrically connected to the semiconductor substrate;
    所述方法包括：The method includes:
    通过所述电压组件对所述半导体衬底施加电压值不同的预定电压，以获得大小不同的固态纳米孔有效尺寸。A predetermined voltage having a different voltage value is applied to the semiconductor substrate through the voltage component to obtain a solid nanopore effective size of different sizes.
  2. 根据权利要求1所述的方法，其特征在于，λD满足以下公式：The method of claim 1 wherein λ D satisfies the following formula:
    Figure PCTCN2017114642-appb-100001
    Figure PCTCN2017114642-appb-100001
    Figure PCTCN2017114642-appb-100002
    Figure PCTCN2017114642-appb-100002
    其中，
    Figure PCTCN2017114642-appb-100003
    是所述固态纳米孔中预定位置的电势，且与所述预定电压具有预定对应关系，x为所述预定位置与所述固态纳米孔的横截面图形的外接圆的圆心之间的距离，e为单位电荷电量，KB是玻尔兹曼常数，T为温度。    among them,
    Figure PCTCN2017114642-appb-100003
    Is a potential of a predetermined position in the solid-state nanopore, and has a predetermined correspondence relationship with the predetermined voltage, where x is a distance between the predetermined position and a center of a circumcircle of the cross-sectional shape of the solid-state nanohole, e For unit charge, K B is the Boltzmann constant and T is the temperature.
  3. 根据权利要求2所述的方法，其特征在于，当所述预定电压的电压值不为零时，所述固态纳米孔中预定位置的电势满足以下关系：The method according to claim 2, wherein when the voltage value of the predetermined voltage is not zero, the potential of the predetermined position in the solid-state nanopore satisfies the following relationship:
    Figure PCTCN2017114642-appb-100004
    Figure PCTCN2017114642-appb-100004
    σW *＝σW+εgEg       (4)σ W * =σ W +ε g E g (4)
    其中，R为所述固态纳米孔横截面图形中所述固态纳米孔壁面与所述横截面图形的外接圆的圆心之间的距离，σ* w为所述固态纳米孔壁面的电荷密度，εf是与R对应的位置处所述电解质溶液的介电常数，σw是所述预定电压为零时所述固态纳米孔壁面的电荷密度，εg是所述固态纳米孔壁面物质的介电常数，Eg是所述预定电压产生的电场强度。Wherein R is the distance between the solid nanopore wall surface of the solid nanopore cross-sectional pattern and the center of the circumcircle of the cross-sectional pattern, and σ * w is the charge density of the solid nanopore wall surface, ε f is a dielectric constant of the electrolyte solution at a position corresponding to R, σ w is a charge density of the solid nanopore wall surface when the predetermined voltage is zero, and ε g is a dielectric of the solid nanopore wall material The constant, E g , is the electric field strength produced by the predetermined voltage.
  4. 根据权利要求3所述的方法，其特征在于，所述电荷密度是通过高精度电荷仪进行测定的。The method of claim 3 wherein said charge density is determined by a high precision charge meter.
  5. 根据权利要求1所述的方法，其特征在于，所述固态纳米孔呈倒金字塔形。 The method of claim 1 wherein said solid nanoholes are in the shape of an inverted pyramid.
  6. 根据权利要求1所述的方法，其特征在于，所述电解质溶液的溶度为1μmol/L～1mol/L，pH值为4.0～10.0。The method according to claim 1, wherein the electrolyte solution has a solubility of from 1 μmol/L to 1 mol/L and a pH of from 4.0 to 10.0.
  7. 根据权利要求1所述的方法，其特征在于，形成所述半导体衬底的材料为硅。 The method of claim 1 wherein the material forming the semiconductor substrate is silicon.
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