WO2019071743A1 - Method for double-sided interconnected silicon-based igbt module employing low-temperature sintering of nano silver - Google Patents

Method for double-sided interconnected silicon-based igbt module employing low-temperature sintering of nano silver Download PDF

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WO2019071743A1
WO2019071743A1 PCT/CN2017/112769 CN2017112769W WO2019071743A1 WO 2019071743 A1 WO2019071743 A1 WO 2019071743A1 CN 2017112769 W CN2017112769 W CN 2017112769W WO 2019071743 A1 WO2019071743 A1 WO 2019071743A1
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silicon
dbc substrate
double
chip
sided
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PCT/CN2017/112769
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French (fr)
Chinese (zh)
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梅云辉
刘�文
付善灿
陆国权
李欣
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天津大学
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/325—Material
    • H01L2224/32501—Material at the bonding interface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • H01L2224/335—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8384—Sintering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]

Definitions

  • the present invention relates to the field of power semiconductor packages and power modules, and more particularly to a double-sided interconnected silicon-based IGBT module using a low-temperature sintered nano-silver package.
  • high-power conversion system devices such as silicon-based IGBT modules
  • silicon-based IGBT modules are increasingly required to be lighter and smaller in size due to the need for energy saving and low cost.
  • this demand poses a huge challenge to the development of high-power silicon-based IGBT modules, because light weight and miniaturization will lead to an increase in module current density, which will result in higher heat inside the module, causing junctions. The temperature rises. If the generated heat cannot be discharged in time, the higher junction temperature will affect the overall thermomechanical performance and reliability of the silicon-based IGBT module. Therefore, the heat dissipation of high-power silicon-based IGBT modules is a problem that researchers and manufacturers have to face.
  • optimizing the package structure inside the high-power silicon-based IGBT module is another effective method to solve the heat dissipation problem.
  • the conventional silicon-based IGBT module adopts a single-sided package structure, and the heat generated inside the module can be discharged only from the collector of the silicon-based IGBT chip.
  • Some researchers have tried to remove the leads of the silicon-based IGBT chip emitters and use a double-sided package structure to improve the heat dissipation efficiency of the silicon-based IGBT modules.
  • This package structure allows heat generated inside the module to be discharged from both the collector and emitter sides of the chip. At the same time, this package structure removes the wire bonding and can effectively reduce the parasitic inductance of the silicon-based IGBT module.
  • the chip connection materials of the conventional double-sided silicon-based IGBT modules are solder alloys, and their melting points are generally lower than 300 ° C.
  • This solder alloy is prone to creep fatigue failure due to its low melting point and easy to produce intermetallic compounds, especially in high temperature applications of IGBT modules. Therefore, the traditional solder alloy has become a major bottleneck restricting the high-temperature application and power density improvement of high-power silicon-based IGBT modules.
  • the nano silver solder paste has the advantages of low sintering temperature (275 ° C), high melting point (960 ° C) and high thermal conductivity (240 W ⁇ m -1 ⁇ K -1 ), so that it can be more effectively improved.
  • the object of the present invention is to provide a novel process of a double-sided interconnected silicon-based IGBT module using a low-temperature sintered nano-silver solder paste.
  • the connection strength of the chip to the DBC substrate was made higher than 30 MPa by applying a pressure of 5-10 MPa in a formic acid environment.
  • the silver and silver solder paste are used for the connection of the chip and the buffer layer to the DBC substrate.
  • a double-sided interconnected silicon-based IGBT module using low-temperature sintered nano-silver from power terminal 1, upper DBC substrate 2, lower DBC substrate 3, nano silver solder paste 4, silicon-based IGBT chip 5, buffer layer 6, thick aluminum Wire 7, soldering piece 8, silicon-based diode chip 9, silicone gel and molding resin; respectively, the lower surface of the silicon-based IGBT chip, the lower surface of the silicon-based diode chip, and the lower surface of the buffer layer are connected to the lower DBC substrate At the same time, the same connection is also made on the upper DBC substrate; the silicon-based IGBT chip and the silicon-based diode chip of the lower DBC substrate and the upper surface of the buffer layer are simultaneously simultaneously with the buffer layer of the upper DBC substrate and the silicon-based IGBT chip and the silicon-based diode chip The upper surface is connected.
  • a method for fabricating a double-sided interconnected silicon-based IGBT module using low-temperature sintered nano-silver comprising the following steps:
  • the upper surface of the silicon-based IGBT chip and the silicon-based diode chip is plated with a silver film by magnetron sputtering.
  • Double-sided interconnected silicon-based IGBT module firstly coated with nano-silver solder paste on the lower DBC substrate by stencil printing, and then the lower surface of the silicon-based IGBT chip, silicon-based diode chip and buffer layer Mounted on the surface of the solder paste.
  • Double-sided interconnected silicon-based IGBT module repeating step (2) on the upper DBC substrate.
  • the mounted upper DBC substrate and the lower DBC substrate are subjected to low-temperature sintering connection in a formic acid environment at a sintering temperature of 250 ° C to 300 ° C and a holding time of 15 to 45 minutes.
  • each of the silicon-based IGBT chips corresponds to a silicon-based diode chip.
  • 1200-V/150-A silicon-based IGBT chips and corresponding 1200-V/150-A silicon-based diode chips are connected in parallel on the DBC substrate to realize a double-sided interconnected 1200-V/600-A silicon base. IGBT module packaging.
  • the present invention has the following advantages:
  • the power chip and the buffer layer of the double-sided interconnected silicon-based IGBT module are connected to the DBC substrate by a low-temperature sintering connection of nano silver.
  • the connection strength between the chip and the buffer layer and the DBC substrate can reach 30 MPa or more.
  • the DBC substrate is a bare copper ceramic substrate, and the conventional nano silver low temperature sintering connection uses a silver plated copper-clad ceramic substrate. Therefore, the double-sided interconnected silicon-based IGBT module packaged by the method is more cost-effective.
  • the double-sided interconnected silicon-based IGBT module manufactured according to the above scheme can effectively improve the working environment temperature and the service life of the module by using nano silver solder paste as a connecting material between the chip and the buffer layer and the DBC substrate.
  • the double-sided module is compact in package, high in power density and reliable.
  • FIG. 1 is a schematic cross-sectional structural view of a double-sided interconnected silicon-based IGBT module of the present invention
  • FIG. 2 is a schematic structural view of a DBC substrate according to the present invention.
  • FIG. 3 is a schematic view showing the wire bonding and terminal connection of the double-sided interconnected silicon-based IGBT module of the present invention
  • FIG. 4 is a schematic view showing a positioning fixture of a double-sided interconnected silicon-based IGBT module according to the present invention
  • FIG. 5 is a schematic diagram of assembly of a double-sided interconnected silicon-based IGBT module of the present invention
  • 1-power terminal 2-up DBC substrate, 3-low DBC substrate, 4-nano silver solder paste, 5-silicon based IGBT chip, 6-buffer layer, 7-thick aluminum wire, 8-chip, 9 -Si-based diode chip
  • the method for using a low-temperature sintered nano silver double-sided interconnected silicon-based IGBT module comprises the following steps:
  • Step 1 The ultrasonic welding technology is used to realize the connection between the terminal 1 of the double-sided interconnected silicon-based IGBT module and the electrode region of the DBC substrate.
  • the material of the terminal and the electrode area of the DBC substrate is pure copper.
  • the ultrasonic welding power is 1.3-1.6W.
  • Step 2 The material of the DBC substrate is selected as a bare copper ceramic plate, and the material has high thermal conductivity and thermal expansion coefficient.
  • 2 is the upper DBC substrate
  • 3 is the lower DBC substrate.
  • the impurities on the surfaces of the upper DBC substrate 2 and the lower DBC substrate 3 are removed by ultrasonic cleaning and plasma cleaning.
  • a nano silver solder paste 4 is printed on the substrate 3.
  • the upper DBC substrate 2 and the lower DBC substrate 3 are placed in a formic acid environment to perform primary sintering of the nano silver solder paste.
  • the sintering temperature was 260 ° C and the holding time was 20 minutes.
  • Step 2 The upper DBC substrate 2 and the lower DBC substrate 3 are taken out to perform secondary stencil printing nano silver solder paste. Then, a silicon-based IGBT chip 5, a silicon-based diode chip 9, and a corresponding buffer layer 6 are simultaneously attached to the upper DBC substrate 2 and the lower DBC substrate 3, respectively. The silicon-based IGBT chip 5, the silicon-based diode chip 9, and the buffer layer 6 are lightly pressed to sufficiently wet the nano-silver solder paste 4 before sintering. Finally, the mounted upper DBC substrate 2 and the lower DBC substrate 3 are placed in a formic acid environment for secondary sintering of the nano silver solder paste. The sintering temperature and holding time are the same as in the first step. At this stage of the sintering process, a pressure of 5-10 MPa can be applied to achieve a connection strength of the chip and the buffer layer to the DBC substrate of 30 MPa or more.
  • Step 3 The gate of the high-power silicon-based IGBT chip 5 and the electrode region of the DBC substrate are connected by using the thick aluminum wire 7.
  • One end of the thick aluminum wire 7 is connected to the gate of the high-power silicon-based IGBT chip 5 by the wire bonding technique, and the other end is connected to the electrode region of the DBC substrate. Since the emitter of the silicon-based IGBT chip 5 is connected to the upper DBC substrate through the buffer layer, the height of the aluminum wire bonding cannot exceed the height of the buffer layer, and the schematic diagram of the sintering and bonding completion module is shown in FIG.
  • Step 5 Place a 0.2 mm thick solder tab 8 on the silicon-based IGBT chip 5, the silicon-based diode chip 9, and the buffer layer 6 of the lower DBC substrate 3.
  • the lower DBC substrate 3 is placed in a positioning fixture, as shown in FIG. 4, and then the upper DBC substrate 2 of the same size and reverse symmetry is inverted and gently placed on the lower DBC substrate 3, as shown in FIG. Achieve assembly of double-sided interconnected silicon-based IGBT modules. Finally, the assembled double-sided module is placed in a vacuum reflow oven for welding.
  • Step 6 Fill the sealant and plastic seal.
  • the sealing agent is a two-component silicone gel which can maintain elasticity at 250 ° C for a long time and has excellent electrical properties and chemical stability.
  • the sealing agent was filled, and the module was placed in a vacuum drying oven and incubated at 150 ° C for 1 hour to effect curing of the silica gel.
  • plastic sealing technology is used to realize the surrounding resin encapsulation of the double-sided interconnected silicon-based IGBT module.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Die Bonding (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

A double-sided interconnected silicon-based IGBT module employing low-temperature sintering of nano silver and a preparation method, consisting of a power terminal (1), an upper DBC substrate (2), a lower DBC substrate (3), a nano silver solder paste (4), a silicon-based IGBT chip (5), a buffer layer (6), a thick aluminum wire (7), a solder tab (8), a silicon-based diode chip (9), a silicone gel, and a molded resin. The lower surface of the silicon-based IGBT chip (5), the lower surface of the silicon-based diode chip (9), and the lower surface of the buffer layer (6) respectively are connected to the lower DBC substrate (3) via the nano silver solder paste (4), at the same time, same connections also are made on the upper DBC substrate (2), and the strength of the connection of the chip and the buffer layer (6) to the DBC substrates can be 30 MPa or more. The upper surfaces of the silicon-based IGBT chip (5), of the silicon-based diode chip (9), and of the buffer layer (6) of the lower DBC substrate (3) respectively are connected at the same time to the upper surfaces of the buffer layer (6), of the silicon-based IGBT chip (5), and of the silicon-based diode chip (9) of the upper DBC substrate (2) via SnAgCu solder tabs or SnAg solder tabs so as to produce the double-sided silicon-based IGBT module.

Description

采用低温烧结纳米银的双面互连硅基IGBT模块的方法Method for double-sided interconnecting silicon-based IGBT module using low-temperature sintering nano silver 技术领域Technical field
本发明涉及功率半导体封装以及功率模块领域，特别涉及一种采用低温烧结纳米银封装双面互连硅基IGBT模块。The present invention relates to the field of power semiconductor packages and power modules, and more particularly to a double-sided interconnected silicon-based IGBT module using a low-temperature sintered nano-silver package.
背景技术Background technique
随着电力电子技术的发展，大功率转换***装置(比如硅基IGBT模块)已经吸引了越来越多的关注。与此同时，出于节能和低成本的需求也迫切的要求大功率硅基IGBT模块更加轻型化和小型化。但是，这种需求给大功率硅基IGBT模块的发展带来了巨大的挑战，因为轻型化和小型化会导致模块电流密度的增加，这会导致模块内部会产生较高的热量，从而引起结温的升高。如果产生的热量不能及时排出，较高的结温会影响硅基IGBT模块整体的热机械性能和可靠性。所以，大功率硅基IGBT模块的散热是研究者和厂家不得不面对的一个问题。With the development of power electronics technology, high-power conversion system devices (such as silicon-based IGBT modules) have attracted more and more attention. At the same time, high-power silicon-based IGBT modules are increasingly required to be lighter and smaller in size due to the need for energy saving and low cost. However, this demand poses a huge challenge to the development of high-power silicon-based IGBT modules, because light weight and miniaturization will lead to an increase in module current density, which will result in higher heat inside the module, causing junctions. The temperature rises. If the generated heat cannot be discharged in time, the higher junction temperature will affect the overall thermomechanical performance and reliability of the silicon-based IGBT module. Therefore, the heat dissipation of high-power silicon-based IGBT modules is a problem that researchers and manufacturers have to face.
除了提高的硅基IGBT模块外部散热器的散热效率外，优化大功率硅基IGBT模块内部的封装结构是解决散热问题的另外一个有效方法。传统的硅基IGBT模块采用单面封装的结构，模块的内部产生的热量仅仅可以从硅基IGBT芯片集电极排出。一些研究者尝试去掉硅基IGBT芯片发射极的引线，采用双面封装的结构来提高硅基IGBT模块的散热效率。这种封装结构可以使得模块内部产生的热量从芯片集电极和发射极两个方向排出。同时，这种封装结构去掉了引线键合可以有效的降低硅基IGBT模块的寄生电感。In addition to improving the heat dissipation efficiency of the external heat sink of the silicon-based IGBT module, optimizing the package structure inside the high-power silicon-based IGBT module is another effective method to solve the heat dissipation problem. The conventional silicon-based IGBT module adopts a single-sided package structure, and the heat generated inside the module can be discharged only from the collector of the silicon-based IGBT chip. Some researchers have tried to remove the leads of the silicon-based IGBT chip emitters and use a double-sided package structure to improve the heat dissipation efficiency of the silicon-based IGBT modules. This package structure allows heat generated inside the module to be discharged from both the collector and emitter sides of the chip. At the same time, this package structure removes the wire bonding and can effectively reduce the parasitic inductance of the silicon-based IGBT module.
但是，传统双面硅基IGBT模块的芯片连接材料采用的是焊料合金，它们的熔点一般低于300℃。这种焊料合金由于熔点低和易产生金属间化合物容易产生蠕变疲劳失效，尤其是在IGBT模块的高温应用环境中。所以，传统的焊料合金成为制约大功率硅基IGBT模块高温应用和功率密度提高的一大瓶颈。相对于焊料合金，纳米银焊膏具有烧结温度低(275℃)、熔点高(960℃)和热导率高(240W·m-1·K-1)等优点，从而可以更有效的提高大功率硅基IGBT模块的工作环境温度及使用寿命。但是，采用低温烧结纳米银的双面模块还没有被报道过，主要是因为多个大面积芯片与衬板烧结的连接强度不高(低于30MPa)，尤其是采用裸铜DBC基板。由于芯片与裸铜DBC基板连接需要无氧环境，从而导致烧结连接过程中纳米银焊膏的有机物挥发不出来，进而导致较低的连接强度。 However, the chip connection materials of the conventional double-sided silicon-based IGBT modules are solder alloys, and their melting points are generally lower than 300 ° C. This solder alloy is prone to creep fatigue failure due to its low melting point and easy to produce intermetallic compounds, especially in high temperature applications of IGBT modules. Therefore, the traditional solder alloy has become a major bottleneck restricting the high-temperature application and power density improvement of high-power silicon-based IGBT modules. Compared with the solder alloy, the nano silver solder paste has the advantages of low sintering temperature (275 ° C), high melting point (960 ° C) and high thermal conductivity (240 W · m -1 · K -1 ), so that it can be more effectively improved. Working environment temperature and service life of power silicon-based IGBT modules. However, double-sided modules using low-temperature sintered nano-silver have not been reported, mainly because the connection strength of a plurality of large-area chips and linings is not high (less than 30 MPa), especially using bare copper DBC substrates. Since the chip is connected to the bare copper DBC substrate, an oxygen-free environment is required, which causes the organic matter of the nano silver solder paste to volatilize during the sintering process, resulting in lower connection strength.
发明内容Summary of the invention
为了解决上述问题，本发明专利的目的是提供一种新型工艺的采用低温烧结的纳米银焊膏的双面互连硅基IGBT模块。通过在甲酸环境中施加5-10MPa的压力实现芯片与DBC基板的连接强度高于30MPa。芯片和缓冲层与DBC基板的连接均采用纳米银焊膏。通过先进行功率端子焊接，再进行低温烧结连接纳米银焊膏的工艺顺序，避免了由于超声震动而引起纳米银烧结连接层脱落的问题。In order to solve the above problems, the object of the present invention is to provide a novel process of a double-sided interconnected silicon-based IGBT module using a low-temperature sintered nano-silver solder paste. The connection strength of the chip to the DBC substrate was made higher than 30 MPa by applying a pressure of 5-10 MPa in a formic acid environment. The silver and silver solder paste are used for the connection of the chip and the buffer layer to the DBC substrate. By first performing power terminal soldering, and then performing a low-temperature sintering process of connecting the nano silver solder paste, the problem of the nano silver sintered connecting layer falling off due to ultrasonic vibration is avoided.
本发明专利的技术方案如下：The technical solution of the invention patent is as follows:
一种采用低温烧结纳米银的双面互连硅基IGBT模块：由功率端子1、上DBC基板2、下DBC基板3、纳米银焊膏4、硅基IGBT芯片5、缓冲层6、粗铝丝7、焊片8、硅基二极管芯片9、硅凝胶和模制树脂组成；分别将硅基IGBT芯片的下表面、硅基二极管芯片的下表面以及缓冲层的下表面与下DBC基板连接，同时在上DBC基板也进行同样的连接；下DBC基板的硅基IGBT芯片和硅基二极管芯片以及缓冲层的上表面分别同时与上DBC基板的缓冲层以及硅基IGBT芯片和硅基二极管芯片的上表面连接。A double-sided interconnected silicon-based IGBT module using low-temperature sintered nano-silver: from power terminal 1, upper DBC substrate 2, lower DBC substrate 3, nano silver solder paste 4, silicon-based IGBT chip 5, buffer layer 6, thick aluminum Wire 7, soldering piece 8, silicon-based diode chip 9, silicone gel and molding resin; respectively, the lower surface of the silicon-based IGBT chip, the lower surface of the silicon-based diode chip, and the lower surface of the buffer layer are connected to the lower DBC substrate At the same time, the same connection is also made on the upper DBC substrate; the silicon-based IGBT chip and the silicon-based diode chip of the lower DBC substrate and the upper surface of the buffer layer are simultaneously simultaneously with the buffer layer of the upper DBC substrate and the silicon-based IGBT chip and the silicon-based diode chip The upper surface is connected.
一种采用低温烧结纳米银的双面互连硅基IGBT模块的方法，包括步骤如下：A method for fabricating a double-sided interconnected silicon-based IGBT module using low-temperature sintered nano-silver, comprising the following steps:
(1)硅基IGBT芯片和所述硅基二极管芯片的上表面采用磁控溅射的方法镀一层银膜。(1) The upper surface of the silicon-based IGBT chip and the silicon-based diode chip is plated with a silver film by magnetron sputtering.
(2)双面互连硅基IGBT模块，先采用钢网印刷的方式在下DBC基板均匀涂覆纳米银焊膏，然后将所述的硅基IGBT芯片、硅基二极管芯片和缓冲层的下表面贴装在焊膏表面。(2) Double-sided interconnected silicon-based IGBT module, firstly coated with nano-silver solder paste on the lower DBC substrate by stencil printing, and then the lower surface of the silicon-based IGBT chip, silicon-based diode chip and buffer layer Mounted on the surface of the solder paste.
(3)双面互连硅基IGBT模块，在上DBC基板重复步骤(2)。(3) Double-sided interconnected silicon-based IGBT module, repeating step (2) on the upper DBC substrate.
(4)将贴装好的上DBC基板和下DBC基板在甲酸环境中进行低温烧结连接，烧结温度为250℃-300℃，保温时间15-45min。(4) The mounted upper DBC substrate and the lower DBC substrate are subjected to low-temperature sintering connection in a formic acid environment at a sintering temperature of 250 ° C to 300 ° C and a holding time of 15 to 45 minutes.
(5)在下DBC基板的硅基IGBT芯片、硅基二极管芯片和缓冲层上表面放置SnAgCu焊片或SnAg焊片，然后将下DBC基板置于定位夹具，将上DBC基板倒置放于下DBC基板，最后把组装完成的双面模块放在真空回流炉中进行焊接。(5) placing a SnAgCu solder piece or a SnAg soldering piece on the upper surface of the silicon-based IGBT chip, the silicon-based diode chip, and the buffer layer of the lower DBC substrate, then placing the lower DBC substrate on the positioning jig, and placing the upper DBC substrate on the lower DBC substrate. Finally, the assembled double-sided module is placed in a vacuum reflow oven for welding.
(6)灌冲硅凝胶对双面模块进行密闭保护，保温温度130℃-200℃，保温时间40-90min，最后将灌胶完成的双面模块进行塑封。 (6) The silicon dioxide gel is sealed to protect the double-sided module, the temperature is 130°C-200°C, the holding time is 40-90min, and the double-sided module finished by the glue is finally plasticized.
优选每一个硅基IGBT芯片对应一个硅基二极管芯片。Preferably, each of the silicon-based IGBT chips corresponds to a silicon-based diode chip.
优选4个1200-V/150-A硅基IGBT芯片及对应的1200-V/150-A硅基二极管芯片并联在DBC基板上，从而实现双面互连的1200-V/600-A硅基IGBT模块的封装。Preferably, four 1200-V/150-A silicon-based IGBT chips and corresponding 1200-V/150-A silicon-based diode chips are connected in parallel on the DBC substrate to realize a double-sided interconnected 1200-V/600-A silicon base. IGBT module packaging.
与现有技术相比，本发明有以下优点：Compared with the prior art, the present invention has the following advantages:
(1)双面互连硅基IGBT模块的功率芯片和缓冲层与DBC基板连接均采用纳米银低温烧结连接。芯片和缓冲层与DBC基板的连接强度可达30MPa以上。(1) The power chip and the buffer layer of the double-sided interconnected silicon-based IGBT module are connected to the DBC substrate by a low-temperature sintering connection of nano silver. The connection strength between the chip and the buffer layer and the DBC substrate can reach 30 MPa or more.
(2)DBC基板采用的是裸铜陶瓷基板，而传统的纳米银低温烧结连接采用的是镀银的覆铜陶瓷基板。因此，采用本方法封装的双面互连硅基IGBT模块的成本更加低廉。(2) The DBC substrate is a bare copper ceramic substrate, and the conventional nano silver low temperature sintering connection uses a silver plated copper-clad ceramic substrate. Therefore, the double-sided interconnected silicon-based IGBT module packaged by the method is more cost-effective.
根据上述方案制造的双面互连硅基IGBT模块，由于采用纳米银焊膏作为芯片和缓冲层与DBC基板的连接材料，可有效提高该模块的工作环境温度及使用寿命。该双面模块封装紧凑，功率密度大、可靠性好。The double-sided interconnected silicon-based IGBT module manufactured according to the above scheme can effectively improve the working environment temperature and the service life of the module by using nano silver solder paste as a connecting material between the chip and the buffer layer and the DBC substrate. The double-sided module is compact in package, high in power density and reliable.
附图说明DRAWINGS
图1为本发明双面互连硅基IGBT模块的横截面结构示意图；1 is a schematic cross-sectional structural view of a double-sided interconnected silicon-based IGBT module of the present invention;
图2为本发明采用DBC基板结构示意图；2 is a schematic structural view of a DBC substrate according to the present invention;
图3为本发明双面互连硅基IGBT模块的引线键合和端子连接示意图；3 is a schematic view showing the wire bonding and terminal connection of the double-sided interconnected silicon-based IGBT module of the present invention;
图4为本发明双面互连硅基IGBT模块定位夹具示意图；4 is a schematic view showing a positioning fixture of a double-sided interconnected silicon-based IGBT module according to the present invention;
图5为本发明双面互连硅基IGBT模块组装示意图。FIG. 5 is a schematic diagram of assembly of a double-sided interconnected silicon-based IGBT module of the present invention
其中：1-功率端子、2-上DBC基板、3-下DBC基板、4-纳米银焊膏、5-硅基IGBT芯片、6-缓冲层、7-粗铝丝、8-焊片、9-硅基二极管芯片Among them: 1-power terminal, 2-up DBC substrate, 3-low DBC substrate, 4-nano silver solder paste, 5-silicon based IGBT chip, 6-buffer layer, 7-thick aluminum wire, 8-chip, 9 -Si-based diode chip
具体实施方式Detailed ways
下面结合附图，对本发明的具体实施方式作详细说明。The specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
采用低温烧结纳米银的双面互连硅基IGBT模块的方法，具体包括如下步骤：The method for using a low-temperature sintered nano silver double-sided interconnected silicon-based IGBT module comprises the following steps:
步骤一、采用超声焊接技术实现双面互连硅基IGBT模块端子1与DBC基板电极区的连接。端子与DBC基板电极区的材料均为纯铜。超声焊接功率为1.3-1.6W。Step 1: The ultrasonic welding technology is used to realize the connection between the terminal 1 of the double-sided interconnected silicon-based IGBT module and the electrode region of the DBC substrate. The material of the terminal and the electrode area of the DBC substrate is pure copper. The ultrasonic welding power is 1.3-1.6W.
步骤二、DBC基板材料选择为裸铜陶瓷板，该材料具有较高的热导率和热膨胀系数。如图2所示，2为上DBC基板，3为下DBC基板。采用超声波清洗和等离子清洗的方法去除上DBC基板2和下DBC基板3表面的杂质。然后采用钢网在上DBC基板2和下DBC 基板3上印刷纳米银焊膏4。接着将上DBC基板2和下DBC基板3放入甲酸环境中进行纳米银焊膏的一次烧结。烧结温度260℃，保温时间为20分钟。Step 2: The material of the DBC substrate is selected as a bare copper ceramic plate, and the material has high thermal conductivity and thermal expansion coefficient. As shown in FIG. 2, 2 is the upper DBC substrate, and 3 is the lower DBC substrate. The impurities on the surfaces of the upper DBC substrate 2 and the lower DBC substrate 3 are removed by ultrasonic cleaning and plasma cleaning. Then use steel mesh on the upper DBC substrate 2 and the lower DBC A nano silver solder paste 4 is printed on the substrate 3. Next, the upper DBC substrate 2 and the lower DBC substrate 3 are placed in a formic acid environment to perform primary sintering of the nano silver solder paste. The sintering temperature was 260 ° C and the holding time was 20 minutes.
步骤二、取出上DBC基板2和下DBC基板3进行二次钢网印刷纳米银焊膏。然后在上DBC基板2和下DBC基板3分别同时贴上硅基IGBT芯片5、硅基二极管芯片9和对应的缓冲层6。在进行烧结之前，轻轻挤压硅基IGBT芯片5、硅基二极管芯片9和缓冲层6使其与纳米银焊膏4充分的润湿。最后将贴装完成的上DBC基板2和下DBC基板3放入甲酸环境中进行纳米银焊膏的二次烧结。烧结温度和保温时间与步骤一相同。该阶段的烧结过程可以试加5-10MPa的压力，实现芯片和缓冲层与DBC基板的连接强度达30MPa以上。Step 2: The upper DBC substrate 2 and the lower DBC substrate 3 are taken out to perform secondary stencil printing nano silver solder paste. Then, a silicon-based IGBT chip 5, a silicon-based diode chip 9, and a corresponding buffer layer 6 are simultaneously attached to the upper DBC substrate 2 and the lower DBC substrate 3, respectively. The silicon-based IGBT chip 5, the silicon-based diode chip 9, and the buffer layer 6 are lightly pressed to sufficiently wet the nano-silver solder paste 4 before sintering. Finally, the mounted upper DBC substrate 2 and the lower DBC substrate 3 are placed in a formic acid environment for secondary sintering of the nano silver solder paste. The sintering temperature and holding time are the same as in the first step. At this stage of the sintering process, a pressure of 5-10 MPa can be applied to achieve a connection strength of the chip and the buffer layer to the DBC substrate of 30 MPa or more.
步骤三、采用粗铝丝7实现大功率硅基IGBT芯片5的门极和DBC基板电极区连接。通过引线键合技术实现粗铝丝7的一端与大功率硅基IGBT芯片5门极连接，另一端与DBC基板电极区连接。由于硅基IGBT芯片5的发射极通过缓冲层与上DBC基板连接，所以铝线键合的高度不能超过缓冲层的高度，烧结及键合完成模块示意图见图3。Step 3: The gate of the high-power silicon-based IGBT chip 5 and the electrode region of the DBC substrate are connected by using the thick aluminum wire 7. One end of the thick aluminum wire 7 is connected to the gate of the high-power silicon-based IGBT chip 5 by the wire bonding technique, and the other end is connected to the electrode region of the DBC substrate. Since the emitter of the silicon-based IGBT chip 5 is connected to the upper DBC substrate through the buffer layer, the height of the aluminum wire bonding cannot exceed the height of the buffer layer, and the schematic diagram of the sintering and bonding completion module is shown in FIG.
步骤五、在下DBC基板3的硅基IGBT芯片5、硅基二极管芯片9和缓冲层6上放置0.2毫米厚的焊片8。将下DBC基板3置于定位夹具中，定位夹具如图4所示，接着将同等大小，反向对称的上DBC基板2倒置并轻轻放置在下DBC基板3的上面，如图5所示，实现双面互连硅基IGBT模块的组装。最后将组装完成的双面模块放置在真空回流炉中进行焊接。 Step 5. Place a 0.2 mm thick solder tab 8 on the silicon-based IGBT chip 5, the silicon-based diode chip 9, and the buffer layer 6 of the lower DBC substrate 3. The lower DBC substrate 3 is placed in a positioning fixture, as shown in FIG. 4, and then the upper DBC substrate 2 of the same size and reverse symmetry is inverted and gently placed on the lower DBC substrate 3, as shown in FIG. Achieve assembly of double-sided interconnected silicon-based IGBT modules. Finally, the assembled double-sided module is placed in a vacuum reflow oven for welding.
步骤六、填充密闭剂和塑封。密闭剂选用双组分硅凝胶，该硅胶在250℃能长期保持弹性，且具优良的电气性能和化学稳定性。填充完密闭剂，将模块放在真空干燥箱中并在150℃的环境中保温1小时以实现硅胶的固化。最后，采用塑封技术实现双面互连硅基IGBT模块的四周密闭树脂封装。 Step 6. Fill the sealant and plastic seal. The sealing agent is a two-component silicone gel which can maintain elasticity at 250 ° C for a long time and has excellent electrical properties and chemical stability. The sealing agent was filled, and the module was placed in a vacuum drying oven and incubated at 150 ° C for 1 hour to effect curing of the silica gel. Finally, plastic sealing technology is used to realize the surrounding resin encapsulation of the double-sided interconnected silicon-based IGBT module.

Claims (4)

  1. 一种采用低温烧结纳米银的双面互连硅基IGBT模块，由功率端子(1)、上DBC基板(2)、下DBC基板(3)、纳米银焊膏(4)、硅基IGBT芯片(5)、缓冲层(6)、粗铝丝(7)、焊片(8)、硅基二极管芯片(9)、硅凝胶和模制树脂组成；其特征是分别将硅基IGBT芯片的下表面、硅基二极管芯片的下表面以及缓冲层的下表面与下DBC基板通过纳米银连接，同时在上DBC基板也进行同样的连接；下DBC基板的硅基IGBT芯片和硅基二极管芯片以及缓冲层的上表面分别同时与上DBC基板的缓冲层以及硅基IGBT芯片和硅基二极管芯片的上表面通过焊料连接，得到双面互连硅基IGBT模块。A double-sided interconnected silicon-based IGBT module using low-temperature sintered nano-silver, comprising a power terminal (1), an upper DBC substrate (2), a lower DBC substrate (3), a nano silver solder paste (4), a silicon-based IGBT chip (5), a buffer layer (6), a thick aluminum wire (7), a solder tab (8), a silicon-based diode chip (9), a silicone gel, and a molded resin; characterized in that the silicon-based IGBT chip is respectively The lower surface, the lower surface of the silicon-based diode chip, and the lower surface of the buffer layer are connected to the lower DBC substrate by nano silver, and the same connection is also performed on the upper DBC substrate; the silicon-based IGBT chip and the silicon-based diode chip of the lower DBC substrate and The upper surface of the buffer layer is simultaneously soldered to the buffer layer of the upper DBC substrate and the upper surfaces of the silicon-based IGBT chip and the silicon-based diode chip, respectively, to obtain a double-sided interconnected silicon-based IGBT module.
  2. 权利要求1的采用低温烧结纳米银的双面互连硅基IGBT模块的制备方法，包括步骤如下：A method of preparing a double-sided interconnected silicon-based IGBT module using low-temperature sintered nano-silver according to claim 1, comprising the steps of:
    (1)硅基IGBT芯片和硅基二极管芯片的上表面采用磁控溅射的方法镀一层银膜；(1) The upper surface of the silicon-based IGBT chip and the silicon-based diode chip is plated with a silver film by magnetron sputtering;
    (2)双面互连硅基IGBT模块，先采用钢网印刷的方式在下DBC基板均匀涂覆纳米银焊膏，然后将所述的硅基IGBT芯片、硅基二极管芯片和缓冲层的下表面贴装在焊膏表面；(2) Double-sided interconnected silicon-based IGBT module, firstly coated with nano-silver solder paste on the lower DBC substrate by stencil printing, and then the lower surface of the silicon-based IGBT chip, silicon-based diode chip and buffer layer Mounted on the surface of the solder paste;
    (3)双面互连硅基IGBT模块，在上DBC基板重复步骤(2)；(3) double-sided interconnect silicon-based IGBT module, repeating step (2) on the upper DBC substrate;
    (4)将贴装好的上DBC基板和下DBC基板在甲酸环境中进行低温烧结连接，烧结温度为250℃-300℃，保温时间15-45min，烧结过程可试加5-10MPa的压力；(4) The mounted upper DBC substrate and the lower DBC substrate are subjected to low-temperature sintering connection in a formic acid environment, the sintering temperature is 250 ° C - 300 ° C, the holding time is 15-45 min, and the sintering process can be applied with a pressure of 5-10 MPa;
    (5)在下DBC基板的硅基IGBT芯片、硅基二极管芯片和缓冲层上表面放置SnAgCu焊片或SnAg焊片，然后将下DBC基板置于定位夹具，将上DBC基板倒置放于下DBC基板，最后把组装完成的双面模块放在真空回流炉中进行焊接；(5) placing a SnAgCu solder piece or a SnAg soldering piece on the upper surface of the silicon-based IGBT chip, the silicon-based diode chip, and the buffer layer of the lower DBC substrate, then placing the lower DBC substrate on the positioning jig, and placing the upper DBC substrate on the lower DBC substrate. Finally, the assembled double-sided module is placed in a vacuum reflow furnace for welding;
    (6)灌冲硅凝胶对双面模块进行密闭保护，保温温度130℃-200℃，保温时间40-90min，最后将灌胶完成的双面模块进行塑封。(6) The silicon dioxide gel is sealed to protect the double-sided module, the temperature is 130°C-200°C, the holding time is 40-90min, and the double-sided module finished by the glue is finally plasticized.
  3. 如权利要求2所述的方法，其特征是每一个硅基IGBT芯片对应一个硅基二极管芯片。The method of claim 2 wherein each of the silicon-based IGBT chips corresponds to a silicon-based diode chip.
  4. 如权利要求2所述的方法，其特征是4个1200-V/150-A硅基IGBT芯片及对应的1200-V/150-A硅基二极管芯片并联在DBC基板上，实现双面互连的1200-V/600-A硅基IGBT模块的封装。 The method of claim 2, wherein four 1200-V/150-A silicon-based IGBT chips and corresponding 1200-V/150-A silicon-based diode chips are connected in parallel on the DBC substrate to realize double-sided interconnection The package of the 1200-V/600-A silicon-based IGBT module.
PCT/CN2017/112769 2017-10-13 2017-11-24 Method for double-sided interconnected silicon-based igbt module employing low-temperature sintering of nano silver WO2019071743A1 (en)

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