WO2019033988A1 - 阵列基板、显示面板和电子设备 - Google Patents

阵列基板、显示面板和电子设备 Download PDF

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Publication number
WO2019033988A1
WO2019033988A1 PCT/CN2018/099664 CN2018099664W WO2019033988A1 WO 2019033988 A1 WO2019033988 A1 WO 2019033988A1 CN 2018099664 W CN2018099664 W CN 2018099664W WO 2019033988 A1 WO2019033988 A1 WO 2019033988A1
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WO
WIPO (PCT)
Prior art keywords
display area
sub
scanning line
driving circuit
line driving
Prior art date
Application number
PCT/CN2018/099664
Other languages
English (en)
French (fr)
Inventor
曾元清
Original Assignee
Oppo广东移动通信有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from CN201710718233.9A external-priority patent/CN107340660A/zh
Priority claimed from CN201721046100.3U external-priority patent/CN207114990U/zh
Application filed by Oppo广东移动通信有限公司 filed Critical Oppo广东移动通信有限公司
Publication of WO2019033988A1 publication Critical patent/WO2019033988A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells

Definitions

  • the present application relates to the field of electronic device technologies, and in particular, to an array substrate, a display panel, and an electronic device.
  • the screen ratio refers to the relative ratio of the screen area to the front cover area.
  • the larger the screen ratio the narrower the frame representing the electronic device, and the more the electronic device area is. Under the premise, the appearance of the widescreen narrow frame is achieved.
  • the front device such as the front camera and the photoelectric sensor is usually disposed at the front top position of the mobile phone, forming too many non-display areas, thereby reducing the screen ratio of the mobile phone.
  • the embodiment of the present application provides an array substrate, a display panel, and an electronic device, which can improve the screen ratio of the electronic device.
  • the embodiment of the present application provides an array substrate, a display panel, and an electronic device, which can improve the screen ratio of the electronic device.
  • an embodiment of the present application provides an array substrate, including: a first substrate, and a plurality of main scan lines, a plurality of sub-scan lines, at least one main scan line driving circuit, and at least a sub-scan line driving circuit, the main scanning line driving circuit is connected to the main scanning line, the sub-scanning line driving circuit is connected to the sub-scanning line, and the array substrate further comprises an optical signal for passing through a first non-display area, the sub-scanning line is located at one side of the first non-display area, and the sub-scanning line, the sub-scanning line driving circuit and the first non-display area are arranged side by side in the first One side edge of a substrate.
  • an embodiment of the present application provides a display panel including an array substrate and a color filter substrate disposed opposite to each other, the array substrate includes a first substrate, and a plurality of main bodies disposed on the first substrate a scan line, a plurality of sub-scan lines, at least one main scan line driver circuit, at least one sub-scan line driver circuit, the main scan line driver circuit and the main scan line are connected, the sub-scan line driver circuit and the sub- Scanning line connection, the array substrate is provided with a first non-display area for the optical signal to pass through, the sub-scanning line is located at one side of the first non-display area, the sub-scanning line, the sub-scanning line.
  • the driving circuit and the first non-display area are arranged side by side on one side edge of the first substrate, and the color film substrate is provided with a second non-display area for the optical signal to pass through, the second non-display area Opposite to the first non-display area, a
  • an embodiment of the present application provides an electronic device, including a housing and a display panel, the display panel is disposed in the housing, the display panel, the opposite array substrate and the color filter substrate,
  • the array substrate includes a first substrate, and a plurality of main scanning lines, a plurality of sub-scanning lines, at least one main scanning line driving circuit, and at least one sub-scanning line driving circuit disposed on the first substrate, the main scanning a line driving circuit is connected to the main scanning line, the sub-scanning line driving circuit is connected to the sub-scanning line, and the array substrate is provided with a first non-display area for an optical signal to pass through, the sub-scanning line is located One side of the first non-display area, the sub-scanning line, the sub-scanning line driving circuit and the first non-display area are arranged side by side on one side edge of the first substrate, the color film
  • the substrate is provided with a second non-display area for the optical signal to pass through, and the
  • FIG. 1 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
  • FIG. 2 is a front elevational view of the electronic device of FIG. 1.
  • FIG. 3 is a schematic structural diagram of a display panel according to an embodiment of the present application.
  • FIG. 4 is a cross-sectional view of the display panel of FIG. 3 in the A-A direction.
  • FIG. 5 is another schematic structural diagram of a display panel according to an embodiment of the present application.
  • Figure 6 is a cross-sectional view of the display panel of Figure 5 in the B-B direction.
  • FIG. 7 is a schematic structural diagram of an array substrate according to an embodiment of the present application.
  • FIG. 8 is a schematic structural diagram of a first substrate according to an embodiment of the present application.
  • FIG. 9 is another schematic structural diagram of an array substrate according to an embodiment of the present application.
  • FIG. 10 is another schematic structural diagram of an array substrate according to an embodiment of the present application.
  • FIG. 11 is another schematic structural diagram of an array substrate according to an embodiment of the present application.
  • FIG. 12 is another schematic structural diagram of a first substrate according to an embodiment of the present application.
  • FIG. 13 is another schematic structural diagram of a first substrate according to an embodiment of the present application.
  • FIG. 14 is a schematic structural view of the first non-display area shown in FIG.
  • FIG. 15 is another schematic structural diagram of a display panel according to an embodiment of the present application.
  • Figure 16 is a cross-sectional view of Figure 15 taken along the line C-C.
  • FIG. 17 is another schematic structural diagram of an array substrate according to an embodiment of the present application.
  • FIG. 18 is another schematic structural diagram of a first substrate according to an embodiment of the present application.
  • FIG. 19 is a schematic structural diagram of a color filter substrate according to an embodiment of the present application.
  • FIG. 20 is a schematic structural diagram of a second substrate according to an embodiment of the present application.
  • FIG. 21 is another schematic structural diagram of a color filter substrate according to an embodiment of the present application.
  • FIG. 22 is another schematic structural diagram of a display panel according to an embodiment of the present disclosure.
  • FIG. 23 is another schematic structural diagram of an array substrate according to an embodiment of the present application.
  • FIG. 24 is another schematic structural diagram of a color filter substrate according to an embodiment of the present application.
  • FIG. 25 is another schematic structural diagram of a display panel according to an embodiment of the present application.
  • first and second are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated.
  • features defining “first” or “second” may include one or more of the described features either explicitly or implicitly.
  • the meaning of "a plurality” is two or more unless specifically and specifically defined otherwise.
  • connection In the description of the present application, it should be noted that the terms “installation”, “connected”, and “connected” are to be understood broadly, and may be fixed or detachable, for example, unless otherwise specifically defined and defined. Connected, or integrally connected; may be mechanically connected, may be electrically connected or may communicate with each other; may be directly connected, or may be indirectly connected through an intermediate medium, may be internal communication of two elements or interaction of two elements relationship.
  • Connected, or integrally connected may be mechanically connected, may be electrically connected or may communicate with each other; may be directly connected, or may be indirectly connected through an intermediate medium, may be internal communication of two elements or interaction of two elements relationship.
  • the specific meanings of the above terms in the present application can be understood on a case-by-case basis.
  • the first feature "on” or “under” the second feature may include direct contact of the first and second features, and may also include first and second features, unless otherwise specifically defined and defined. It is not in direct contact but through additional features between them.
  • the first feature “above”, “above” and “above” the second feature includes the first feature directly above and above the second feature, or merely indicating that the first feature level is higher than the second feature.
  • the first feature “below”, “below” and “below” the second feature includes the first feature directly below and below the second feature, or merely the first feature level being less than the second feature.
  • the embodiment of the present application discloses an array substrate, including: a first substrate, and a plurality of main scanning lines, a plurality of sub-scanning lines, at least one main scanning line driving circuit, and at least one disposed on the first substrate.
  • a sub-scan line driving circuit the main scanning line driving circuit is connected to the main scanning line
  • the sub-scanning line driving circuit is connected to the sub-scanning line
  • the array substrate is provided with a first for optical signal passing through a non-display area
  • the sub-scanning line is located at one side of the first non-display area
  • the sub-scanning line, the sub-scanning line driving circuit and the first non-display area are arranged side by side on the first lining One side edge of the bottom.
  • the first substrate includes a first side, a second side, a third side, and a fourth side that are connected end to end, the first side being opposite to the third side, the second side Opposite the fourth side, the second side and the fourth side are respectively located on opposite sides of the first side and the third side, and the first non-display area is disposed adjacent to the first side and the fourth side.
  • the sub-scan line drive circuit is one.
  • the sub-scan line driving circuit abuts a side edge of the first non-display area, and the sub-scan line driving circuit is located between the sub-scan line and the first non-display area.
  • the sub-scan line drive circuit is disposed adjacent to the second side, the sub-scan line being located between the sub-scan line drive circuit and the first non-display area.
  • the sub-scan line driving circuits are two, including a first sub-scanning line driving circuit and a second sub-scanning line driving circuit, the first sub-scanning line driving circuit and the second sub-scanning The line driving circuits are respectively connected to the two ends of the sub-scanning lines, the first sub-scanning line driving circuit is adjacent to one side edge of the first non-display area, and the second sub-scanning line driving circuit is adjacent to the second Set on the side.
  • the first non-display area is two, and the other of the first non-display areas is disposed adjacent to the first side and the second side.
  • two of the first non-display areas are symmetrically disposed with the sub-scan lines as axes.
  • the two first non-display areas are identical in shape and size.
  • the array substrate further includes a data line driving circuit disposed on the first substrate, the data line driving circuit being adjacent to the third side.
  • the array substrate further includes a data line disposed on the first substrate, the data line and the data line driving circuit being connected, located in the first non-display area and the data Data lines between the line drive circuits extend to one side edge of the first non-display area.
  • the first non-display area is formed by providing a first notch on the array substrate, or/and by providing a first transparent area on the array substrate.
  • the first non-display area includes a first sidewall, a second sidewall, and a third sidewall that are interconnected end to end, the first sidewall being adjacent to the first edge, the first The two sidewalls are adjacent to the fourth side, the third sidewall is adjacent to the display region of the array substrate, and the third sidewall is an arc structure.
  • the embodiment of the present application discloses a display panel, comprising: an array substrate and a color filter substrate disposed opposite to each other, the array substrate includes a first substrate, and a plurality of main scanning lines disposed on the first substrate, a plurality of sub-scanning lines, at least one main scanning line driving circuit, at least one sub-scanning line driving circuit, the main scanning line driving circuit and the main scanning line are connected, and the sub-scanning line driving circuit and the sub-scanning line are connected
  • the array substrate is provided with a first non-display area for the optical signal to pass through, the sub-scanning line is located at one side of the first non-display area, the sub-scanning line, the sub-scanning line driving circuit, and
  • the first non-display area is disposed side by side on one side edge of the first substrate, the color film substrate is provided with a second non-display area for optical signal passage, the second non-display area and the The first non-display area is oppositely disposed to
  • the first non-display area and the second non-display area overlap.
  • the second non-display area is spatially located within the first non-display area.
  • the second non-display area is formed by providing a second notch on the color filter substrate, or/and by providing a second transparent area on the color filter substrate.
  • the embodiment of the present application discloses an electronic device, which includes a housing and a display panel.
  • the display panel is disposed in the housing, the display panel, the array substrate and the color filter substrate are oppositely disposed, and the array substrate includes a substrate, and a plurality of main scanning lines, a plurality of sub-scanning lines, at least one main scanning line driving circuit, at least one sub-scanning line driving circuit, and the main scanning line driving circuit disposed on the first substrate
  • the main scan line is connected, the sub-scan line drive circuit is connected to the sub-scan line, the array substrate is provided with a first non-display area for optical signals to pass through, and the sub-scan line is located at the first a side of the non-display area, the sub-scanning line, the sub-scanning line driving circuit and the first non-display area are arranged side by side on one side edge of the first substrate, and the color filter substrate is provided for The second non-display area through which the optical signal passes, the second non
  • the electronic device further includes a front camera, the front camera is disposed in the first non-display area; or the front camera is disposed in the first non-display area and the The second non-display area.
  • the electronic device further includes a photosensor disposed in the first non-display area; or the photosensor is disposed in the second non-display area; or A photosensor is disposed in the first non-display area and the second non-display area.
  • FIG. 1 and FIG. 2 are schematic diagrams showing the structure of an electronic device according to an embodiment of the present application.
  • the electronic device 1 includes a cover 10, a back cover 20, a printed circuit board 30, and a display panel 800. Although not shown in FIGS. 1 and 2, the electronic device 1 further includes a battery.
  • the electronic device 1 is, for example, a mobile phone, a personal computer, a tablet computer, a PDA (Personal Digital Assistant), or the like.
  • the cover 10 is mounted on the display panel 800 to cover the display panel 800.
  • the cover 10 can be a clear glass cover.
  • the cover 10 can be a cover glass made of a material such as sapphire.
  • the cover 10 and the rear cover 20 may be combined to form a housing structure having a space formed by the cover 10 and the rear cover 20 to form a closed space.
  • the back cover of the embodiment of the present application includes a middle frame, and the middle frame and the back cover are integrally disposed. It should be noted that the structure of the housing is not limited thereto. For example, the middle frame and the rear cover are separately disposed. Specifically, the middle frame is disposed between the cover plate and the rear cover.
  • the display panel 800 is attached and mounted under the cover 10 to form a display surface of the electronic device 1.
  • the display panel 800 includes a display area 11 for displaying a screen, and a display surface of the electronic device 1, which can be used to display a screen of the electronic device 1 or for a user to perform touch manipulation or the like.
  • the non-display area 12 is configured to allow optical signals to pass through. Specifically, the non-display area 12 can open an opening, a slot, or the like for conducting optical signals, or the non-display area 12 can be directly transparently disposed, and can directly transmit optical signals. For example, front camera photography, photoelectric sensor detection, etc.
  • the cover 10 covers the display panel 800, and also forms a corresponding display area 11 and a non-display area 12 to protect the display panel 800.
  • the printed circuit board 30 is mounted inside the back cover 20.
  • the printed circuit board 30 can be the main board of the electronic device 1.
  • the printed circuit board 30 can be integrated with functional components such as an earphone holder, an interface holder, an antenna, a motor, a microphone, a camera, a light sensor, a receiver, and a processor.
  • the display panel 800 is electrically connected to the printed circuit board 30.
  • the battery is mounted in the back cover 20 and electrically connected to the printed circuit board 30 to supply power to the electronic device 1.
  • FIG. 3 is a schematic structural view of a display panel according to an embodiment of the present disclosure
  • FIG. 4 is a cross-sectional view of the display panel of FIG. 3 in the A-A direction.
  • the display panel 800 includes an array substrate 810, a color filter substrate 820, and a liquid crystal layer 830.
  • the liquid crystal layer 830 is disposed between the array substrate 810 and the color filter substrate 820.
  • display panel 800 includes display area 11 and non-display area 12.
  • the display area 11 is used for display, wherein the non-display area 12 is used for transmitting light so that the optical signal passes through to realize the conduction of the optical signal.
  • the non-display area 12 is specifically transparently disposed on the display panel 800, and the formed transparent area 12a is only used for optical signals to pass through without a display function.
  • the non-display area 12 may also be in other manners, such as through the entire display panel 800 to form a through-hole structure; for example, the display panel 800 is partially transparent. The following description is made by taking the non-display area 12 as the transparent area 12a as an example. It should be noted that it does not limit the embodiment of the present application.
  • the transparent region 12a includes a first non-display area 814 on the array substrate 810, a second non-display area 824 on the color filter substrate 820, and a third non-display area on the liquid crystal layer 830. 831.
  • the third non-display area 831 is located between the first non-display area 814 and the second non-display area 824, and the first non-display area 814, the second non-display area 824, and the third non-display area 831 collectively form the transparent area 12a.
  • One end of the transparent region 12a is the first substrate 811 of the array substrate 810, and the other end of the non-display region 12 is the second substrate 821 of the color filter substrate 820.
  • the side of the transparent region 12a is surrounded by the display region 11.
  • the display panel 800 is applied to the electronic device 1, and a function device such as a front camera or a photoelectric sensor can be disposed at a position of the transparent region 12a, and a signal such as light can be transmitted through the transparent region 12a to realize a function of photographing and sensing, and the transparent region 12a
  • the peripheral area is the display area 11 having a display function.
  • the function components such as the front camera and the photoelectric sensor can be directly embedded in the transparent area 12a, and the front camera, the photoelectric sensor, and the like can be further reduced on the basis of realizing the comprehensive screen.
  • the space occupied by the electronic device 1 makes the electronic device 1 more light and thin.
  • the front camera can be disposed on the display panel 800. On one side, the front camera can be away from the color film substrate 820. Of course, if the size of the current camera is small enough, the front camera can also be embedded in the transparent area 12a of the display panel.
  • the photosensor may also be disposed on one side of the display panel 800, and the photosensor may be remote from the color filter substrate 820. Of course, the photosensor can also be embedded in the transparent region 12a of the display panel.
  • the non-display area 12 extends through the entire display panel 800 to form a through-hole structure
  • at least a portion of the front camera may be placed in the non-display area 12 of the through-hole structure, and the front camera may be disposed in the first Within a non-display area 814, a front camera can be disposed within the first non-display area 814 and the second non-display area 824.
  • the photosensor may be disposed in the first non-display area 814, and the photo sensor may also be disposed in the second non-display area 824, the photo sensor It is also possible to provide the first non-display area 814 and the second non-display area 824.
  • the non-display area 12 may include a blind hole structure formed on the display panel 800.
  • the first non-display area 814 forms a through-hole structure
  • the second non-display area 824 is transparently disposed, so that the front camera can be At least a portion of the front camera is disposed in the first non-display area 814, and at least a portion of the front camera may be disposed in the first non-display area 814 and the second non-display area 824.
  • At least a portion of the photosensor may also be placed in the first non-display area 814, and the photo sensor may also be disposed in the second non-display area 824, and the photo sensor may also be disposed in the first non-display area 814 and the second non-display area. 824.
  • the photoelectric sensor may include a distance sensor, a photosensitive sensor, and the like.
  • FIG. 5 is another schematic structural view of a display panel according to an embodiment of the present disclosure
  • FIG. 6 is a cross-sectional view of the display panel of FIG. 5 in a B-B direction.
  • the display panel 800 further includes a sealant 840 disposed between the array substrate 810 and the color filter substrate 820, and the sealant 840 is disposed on the edge of the array substrate 810 and the color filter substrate 820 to seal the array substrate 810 and
  • the color filter substrate 820 shields the edges of the array substrate 810 and the color filter substrate 820 at the same time.
  • FIG. 7 is a schematic structural diagram of an array substrate according to an embodiment of the present application.
  • the array substrate 810 includes a first substrate 811 and a first display function layer 801.
  • FIG. 8 is a schematic structural diagram of a first substrate according to an embodiment of the present application.
  • the first substrate 811 is transparently disposed, and the first substrate 811 can be a glass plate, which has good light transmittance and is convenient to set.
  • the type of the first substrate 811 in the embodiment of the present application is not limited to a glass plate, and other types, such as a flexible plate, may also be used.
  • the first substrate 811 includes a first side 8111, a second side 8112, a third side 8113, and a fourth side 8114.
  • the first side 8111 and the third side 8113 are oppositely disposed, and the second side
  • the 8112 and the fourth side 8114 are oppositely disposed, and the second side 8112 and the fourth side 8114 are respectively located on both sides of the first side 8111 and the third side 8113.
  • the first substrate 811 includes a first display area 819 having a display function and a first non-display area 814.
  • the first non-display area 814 does not have a display function.
  • the first non-display area 814 is formed by disposing a first transparent area on the array substrate 810, that is, the first non-display area 814 is a first transparent area, and the same mark can be used for both.
  • the first non-display area 814 is surrounded by the first display area 819, or the first non-display area 814 is located at one side edge position of the first display area 819.
  • the first display function layer 801 is disposed in the first display area 819, and the first non-display area 814 is not provided with the first display function layer 801. Thus, the first display function layer 801 does not cause occlusion and filling of the first non-display area 814, so that the first non-display area 814 can always pass the light signal.
  • the first non-display area 814 is not provided with components or devices, and the components of the first display function layer 801 near the first non-display area 814 are disposed around the edge of the first non-display area 814.
  • a component adjacent to the first non-display area 814 is adapted to be disposed at an edge of the first non-display area 814.
  • the first non-display area 814 has a rectangular cross section, and the edges of the components adjacent to the first non-display area 814 are arranged in a rectangular structure, and may also be in contact with the edge of the first non-display area 814.
  • the direction of the cross section is parallel to the first substrate 811. It should be noted that the structure of the cross section of the first non-display area 814 in the embodiment of the present application is not limited thereto, and may be other structures such as a circle, a polygon, an ellipse or other irregular pattern structure.
  • the first display function layer 801 includes a plurality of data lines 812, a plurality of main scan lines 813, a plurality of sub-scan lines 818, a data line driving circuit 815, at least one main scan line driving circuit 816, and at least one Sub-scan line drive circuit 817.
  • the data lines 812 are formed on the first substrate 811 and uniformly arranged along the vertical direction of the first substrate 811.
  • the plurality of data lines 812 are only arranged in the first display area 819, and the plurality of data lines 812 are not arranged in the first non-display area 814.
  • a portion of the data line 812 terminates in the first non-display area 814 or extends to the first non-display area 814.
  • the main scanning lines 813 are formed on the first substrate 811 and uniformly arranged in the horizontal direction of the first substrate 811.
  • the plurality of scan lines 813 are arranged only in the first display area 819, and the plurality of scan lines 813 are not arranged in the first non-display area 814.
  • the data line 812 and the main scan line 813 are staggered to define a plurality of pixel units, and each of the pixel units may include a pixel electrode and a thin film transistor, and the thin film transistor is used to control the pixel electrode, and the thin film transistor is respectively connected to the data line 812 and the main scan line.
  • 813 is connected to control the pixel electrodes by the signals of the data lines 812 and the main scan lines 813.
  • the first display function layer 801 includes the pixel unit, and the first non-display area 814 is not provided with the pixel unit or other components.
  • the sub-scanning line 818 is formed on the first substrate 811.
  • the data lines 812 and the sub-scan lines 818 are alternately arranged to define a plurality of pixel units.
  • Each pixel unit may include a pixel electrode and a thin film transistor for controlling the pixel electrode, and the thin film transistor is respectively connected to the data line 812 and the sub-scanning line 818 to control the pixel electrode through the signals of the data line 812 and the sub-scanning line 818.
  • the plurality of sub-scanning lines 818 are all located on one side of the first non-display area 814, and the plurality of sub-scanning lines 818 and the first non-display area 814 are disposed side by side on one side edge of the first substrate. In some embodiments, the plurality of sub-scanning lines 818 are both adjacent to the second side 8112. It should be noted that the plurality of sub-scanning lines 818 may also be adjacent to the fourth side 8114, or the plurality of sub-scanning lines 818 may be disposed on the second side. The position between 8112 and the fourth side 8114.
  • the data line driving circuit 815 is disposed on the first substrate 811, and the data line driving circuit 815 is adjacent to one side edge of the first substrate 811. Specifically, the data line driving circuit 815 is disposed adjacent to the third side 8113 of the first substrate 811. Further, the data line driving circuit 815 is disposed opposite to the first non-display area 814. The data line driving circuit 815 is connected to a plurality of data lines 812 for driving the data lines 812.
  • the sub-scanning line driving circuit 817 is disposed on the first substrate 811, and the sub-scanning line driving circuit 817 is connected to the plurality of sub-scanning lines 818 for driving the sub-scanning line 818.
  • the sub-scan line driving circuit 817 and the main scanning line driving circuit 816 may be separately disposed, and the sub-scanning line driving circuit 817 and the main scanning line driving circuit 816 are respectively disposed at different positions of the array substrate 810. It should be noted that the sub-scan line driving circuit 817 and the main scanning line driving circuit 816 may be arranged side by side.
  • the sub-scan line drive circuit 817 is disposed adjacent to the first side 8111 of the first substrate 811. Specifically, the sub-scanning line 813, the sub-scanning line driving circuit 817, and the first non-display area 814 are arranged side by side on one side edge of the first substrate 811. Further, the sub-scanning line driving circuit 817 is adjacent to one side edge of the first non-display area 814, and the sub-scanning line driving circuit 817 is located between the sub-scanning line 813 and the first non-display area 814. It should be noted that the position of the scan line area circuit 817 in the embodiment of the present application is not limited thereto. For example, please refer to FIG. 9. FIG.
  • FIG. 9 is another schematic structural diagram of the array substrate according to the embodiment of the present application. 9 is different from FIG. 7 in that the sub-scanning line area circuit 817 in FIG. 9 is disposed adjacent to the second side 8112, and the sub-scanning line 813 is located between the sub-scanning line driving circuit 817 and the first non-display area 814.
  • the number of the sub-scanning line driving circuits 817 is not limited to one, and may be two.
  • FIG. 10 is another schematic structural diagram of the array substrate according to the embodiment of the present application. 10 is different from FIG. 7 in that the sub-scan line driving circuit in FIG. 10 includes a first sub-scanning line driving circuit 8171 and a second sub-scanning line driving circuit 8172, a first sub-scanning line driving circuit 8171 and a second sub-scanning.
  • the line driving circuit 8172 is connected to the sub-scanning line 818, respectively, and the first sub-scanning line driving circuit 8171 and the second sub-scanning line driving circuit 8172 are respectively connected to both ends of the sub-scanning line 818 to jointly drive the sub-scanning line 818.
  • the first sub-scan line driver circuit 8171 abuts one side edge of the first non-display area
  • the second sub-scan line driver circuit 8172 is disposed adjacent to the second side 8112.
  • the main scanning line driving circuit 816 is disposed on the first substrate 811, and the main scanning line driving circuit 816 is connected to the plurality of main scanning lines 813 for driving the main scanning line 813.
  • the main scan line driver circuit 816 can be two, specifically a first main scan line driver circuit 8161 and a second main scan line driver circuit 8162, a first main scan line driver circuit 8161 and a second main scan.
  • the line driving circuit 8162 collectively drives the main scanning line 813.
  • the first main scanning line driving circuit 8161 is close to the fourth side 8114, and the second main scanning line driving circuit 8162 is close to the second side 8112. Further, the first main scanning line driving circuit 8161 and the second main scanning line driving circuit 8162 are symmetrically disposed. It should be noted that the asymmetric arrangement of the first main scanning line driving circuit 8161 and the second main scanning line driving circuit 8162 is also possible.
  • the sub-scan line driving circuit 817 when the sub-scan line driving circuit 817 is adjacent to the second side 8112, the sub-scanning line 8112 near the second side may be disposed side by side with the second main scanning line driving circuit 8161.
  • FIG. 11 is another schematic structural diagram of an array substrate according to an embodiment of the present application.
  • Fig. 11 is a modification of Fig. 7, and the same components as those of Fig. 7 in Fig. 11 are denoted by the same reference numerals.
  • 11 is different from FIG. 7 in that the main scanning line driving circuit 816 of FIG. 11 includes only the first main scanning line driving circuit 8161.
  • the main scanning line driving circuit 816 includes only the second main scanning line driving circuit 8162.
  • the first non-display area 814 is adjacent to the adjacent two side edges of the first substrate 811 . Specifically, the first non-display area 814 is adjacent to the first side 8111 and the fourth side 8114 of the first substrate 811 . It should be noted that the position setting of the first non-display area 814 is not limited thereto. For example, please refer to FIG. 12 , which is another schematic structural diagram of the first substrate provided by the embodiment of the present application. 12 differs from FIG. 8 in that the first non-display area 814 abuts the first side 8111 and the second side 8112.
  • the first non-display area 814 is a rectangular parallelepiped structure having a rectangular cross-section and including four side walls, wherein the two side walls are adjacent to the first side 8111 and the fourth side 8114, respectively. Or adjacent to the first side 8111 and the second side 8112.
  • the structure of the first non-display area 814 in the embodiment of the present application is not limited thereto, and may also be a trihedral structure or other structures.
  • FIG. 13 is another schematic structural diagram of a first substrate according to an embodiment of the present application
  • FIG. 14 is a schematic structural diagram of a first non-display area shown in FIG.
  • the first substrate 811 in FIG. 13 is different from the first substrate in FIG. 8 or FIG. 12 in that the first non-display area 814 in FIG. 13 includes only three side walls, specifically, the first side wall. 8141, a second sidewall 8142 and a third sidewall 8143.
  • the first side wall 8141, the second side wall 8142 and the third side wall 8143 are connected to each other end to end.
  • the first side wall 8141 is adjacent to the first side 8111
  • the second side wall 8142 is adjacent to the fourth side 8114
  • the first side wall 8141 and the second side wall 8142 are perpendicular to each other.
  • the third sidewall 8143 is adjacent to the display region 819 of the array substrate 810.
  • the third side wall 8143 is an arcuate structure, and the center of the third side wall arc structure faces a direction in which the first side wall 8141 and the second side wall 8142 are connected.
  • FIG. 15 is another schematic structural diagram of the display panel according to the embodiment of the present application.
  • FIG. 16 is a cross-sectional view of the array substrate of FIG. 15 and
  • FIG. 17 is another schematic structural view of the first substrate according to the embodiment of the present application.
  • the number of non-display areas 12 is two, or that the number of transparent areas 12a is two.
  • the first non-display area 814 is two, and the two first non-display areas 814 are adjacent to the first side 8111 of the array substrate 810.
  • one of the first non-display areas 814 is adjacent to the first side 8111 and the fourth side 8114.
  • the second non-display area 824 on the color filter substrate 820 is also two.
  • the other first non-display area 814 is adjacent to the first side 8111 and the second side 8112.
  • the two first non-display areas 814 are symmetrically disposed with the sub-scanning lines 818 as axes. In some embodiments, the size and shape of the two first non-display areas 814 are the same. It should be noted that the shapes and sizes of the two first non-display areas 814 in the embodiment of the present application may also be different.
  • the array substrate 811 is not limited to the above structures and components.
  • the content of the above array substrate 811 is only for the convenience of describing the embodiments of the present application, rather than the array substrate. 811 all content is limited.
  • the color film substrate will be described in detail below.
  • FIG. 19 is a schematic structural diagram of a color filter substrate according to an embodiment of the present application.
  • the color filter substrate 820 includes a second substrate 821 and a second display function layer 802 disposed on the second substrate 821.
  • FIG. 20 is a schematic structural diagram of a second substrate according to an embodiment of the present application.
  • the second substrate 821 can be made of a glass plate, which has good light transmittance and is convenient to set. It should be noted that the type of the second bottom 821 of the embodiment of the present application is not limited to a glass plate, and other types, such as a flexible plate, may also be used.
  • the second substrate 821 includes a second display area 829 having a display function and a second non-display area 824.
  • the second non-display area 824 does not have a display function, and the second non-display area 824 is formed by providing a second transparent area on the color filter substrate 820, that is, the second non-display area 824 is a second transparent area, and both can be used. The same mark.
  • the second non-display area 824 is surrounded by the second display area 829, or the second non-display area 824 is located at one side edge position of the second display area 829.
  • the second display function layer 802 is disposed in the second display area 829, and the second non-display area 824 is not provided with the second display function layer 802. Thus, the second display function layer 802 does not occlude and fill the second non-display area 824 such that the second non-display area 824 can pass the optical signal.
  • the second display function layer 802 is used to implement display of the display panel 800.
  • the second display function layer 802 includes a color resist 822.
  • the color resist 822 is formed on the second substrate 821, and the color resist 822 includes, but is not limited to, a red color resist, a green color resist, and a blue color resist.
  • the second non-display area 824 is formed on the second substrate 821 for the optical signal to pass through.
  • the second substrate 821 is not provided with a color resist 822 and other devices or materials at the second non-display area 824, ensuring that the second non-display area 824 is always transparent.
  • a color resist 822 located near the second non-display area 824 is disposed around the edge of the second non-display area 824. Specifically, adjacent to the second non-display area 824, the color resistance adjacent to the second non-display area 824 is suitable for the edge setting of the second non-display area 824.
  • the second non-display area 824 has a rectangular cross section, and the edge of the color resist adjacent to the second non-display area 824 is disposed in a rectangular structure, and may also be in contact with the edge of the second non-display area 824. .
  • FIG. 21 is another schematic structural diagram of a color filter substrate according to an embodiment of the present application.
  • the second display function layer 802 of the color filter substrate 820 further includes a black matrix 823 formed on the second substrate 821 and disposed between the respective color resists 822 to function as a light blocking.
  • a black matrix 822 adjacent to the second non-display area 824 is disposed around the edge of the second non-display area 824, specifically, a black matrix 823 adjacent to the second non-display area 824, and a black matrix adjacent to the second non-display area 824 is suitable
  • the second non-display area 824 is disposed at an edge.
  • the second non-display area 824 has a rectangular cross section, and the edge of the black matrix adjacent to the second non-display area 824 is disposed in a rectangular structure, and may also be in contact with the edge of the second non-display area 824.
  • the structure of the cross section of the second non-display area 824 in the embodiment of the present application is not limited thereto, and may be other structures, such as a circle, a polygon, an ellipse or other irregular pattern structure.
  • the second non-display area 824 is formed on the second substrate 821, and the second substrate 821 is not provided with other devices or components on the second non-display area 824, ensuring a second non-display area 824. Transparent and visible, it is convenient for light signals to pass through.
  • the color film substrate 820 is not limited to the above structures and components.
  • the content of the above color film substrate 820 is merely for the convenience of describing the embodiment of the present application, and The definition of all contents of the color filter substrate 820.
  • the first non-display area 814 and the second non-display area 824 are oppositely disposed, and the first non-display area 814 and the second non-display area 824 do not have a display device or a display member, and the light transmittance is formed.
  • the non-display area 12 is such that the optical signal is transmitted.
  • the shape of the first non-display area 812 is the same as the shape of the second non-display area 824.
  • the cross section of the first non-display area 812 is a rectangular structure
  • the cross section of the second non-display area 824 is also a rectangular structure.
  • the area of the first non-display area 814 and the area of the second non-display area 824 are the same, that is, the first non-display area 814 and the second non-display area 824 overlap.
  • the cross section of the first non-display area 814 is a rectangular structure
  • the cross section of the second non-display area 824 is also a rectangular structure, and the size and rectangular area of the two rectangular structures are the same.
  • the area setting between the first non-display area 814 and the second non-display area 824 is not limited thereto.
  • the area of the first non-display area 814 is larger than the area of the second non-display area 824. That is, the surface of the first non-display area 814 is larger than the surface of the second non-display area 824, or the rectangular structure of the second non-display area 824 is spatially located within the rectangular structure of the first non-display area 814.
  • the number setting of the second non-display area 824 is the same as the number setting of the first non-display area 814.
  • the first non-display area may be located at any position defined by the scan line and the data line, and the second non-display area corresponds to the first The location setting of the non-display area is sufficient. It should be noted that the arrangement of the array substrate in the embodiment of the present application is not limited thereto, and other methods may also be adopted.
  • the cross-section of the non-display area 12 may be a rectangular structure, which does not constitute a limitation on the embodiment of the present application, and the specific shape structure of the non-display area 12 in the embodiment of the present application. You can refer to the above and I won't go into details here.
  • FIG. 22 is another schematic structural diagram of a display panel according to an embodiment of the present application. 22 is a modification of FIG. 3, and the reference numerals in FIG. 22 are the same as those in FIG. 3.
  • the difference between FIG. 22 and FIG. 3 is that the non-display area 12 is formed by the notch 12b provided on the display panel 800.
  • the notch 12b extends through the entire display panel 800. Specifically, the notch 12b is one.
  • the notch 12b may be disposed at a corner of the display panel 800.
  • the shape of the notch 12b may refer to the shape of the transparent region 12a, such as a rectangle, a triangle, a polygon, or the like.
  • the notch 12b is not limited to the corner position of the display panel 800, and may be located at an intermediate position of one of the sides or at any position of one of the sides. It should be noted that the structure of the notch 12b is not limited to one, and may be two or more. For example, two notches 12b are provided at one edge of the display panel 800 to form a plurality of non-display areas 12. Thereby, a device such as a camera, a photo sensor, or the like can be placed at the position of the notch 12b.
  • FIG. 23 is another schematic structural diagram of an array substrate according to an embodiment of the present application.
  • FIG. 23 is a modification of FIG. 7.
  • the first non-display area is formed by a first notch 121 disposed on the array substrate 810, and the first notch 121 extends through the array substrate 810. .
  • the rest of the arrangement of the array substrate can be referred to the above content, and details are not described herein again.
  • FIG. 24 is another schematic structural diagram of a color filter substrate according to an embodiment of the present application.
  • FIG. 24 is a modification of FIG. 19, which is different from FIG. 19 in that the second non-display area is formed by a second notch 122 disposed on the color filter substrate 820, and the second notch 122 penetrates the color film.
  • the display panel may also have a first notch on the array substrate, and no second notch is formed on the color filter substrate, so that the display panel forms a slotted structure at the first notch position, and the color filter substrate corresponds to The location has a transparent setting.
  • FIG. 25 is another schematic structural diagram of a display panel according to an embodiment of the present application.
  • FIG. 25 is a modification of FIG. 3 and FIG. 22, which is different from FIG. 3 and FIG. 22 in that the non-display area 12 is at least two, and one non-display area 12 is disposed on the display panel 800.
  • the transparent area 12a is formed, and the other non-display area 12 is formed by a notch 12b provided on the display panel 800.
  • two first non-display areas are formed by disposing a first transparent area on the array substrate and by providing a first notch on the array substrate.
  • Two second non-display areas are formed by providing a second transparent area on the color filter substrate and by providing a second notch on the color filter substrate. Therefore, in the embodiment of the present application, a camera, a photosensor, and the like can be disposed at two positions of the notch 12b and the transparent region 12a.
  • first transparent area the notch, the second transparent area, the second notch, and the like can be referred to the above content, and details are not described herein again.
  • the electronic device 1 may include more or less components than those illustrated, or some components may be combined, or different component arrangements.
  • the electronic device 1 may further include a processor, a memory, a Bluetooth module, and the like, and details are not described herein.

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Abstract

本申请公开了一种阵列基板、显示面板和电子设备，其中阵列基板包括：第一衬底、及设置在第一衬底上的多条主扫描线、多条子扫描线、至少一个主扫描线驱动电路、至少一个子扫描线驱动电路，主扫描线驱动电路和主扫描线连接，子扫描线驱动电路和子扫描线连接，阵列基板设置有用于光信号穿过的第一非显示区域，子扫描线位于第一非显示区域的一侧，子扫描线、子扫描线驱动电路和第一非显示区域并排设置于第一衬底的一侧边缘。

Description

阵列基板、显示面板和电子设备
本申请要求于2017年08月18日提交中国专利局、申请号为201721046100.3、申请名称为“阵列基板、显示面板和电子设备”以及于2017年08月18日提交中国专利局、申请号为201710718233.9、申请名称为“阵列基板、显示面板和电子设备”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及电子设备技术领域，具体涉及一种阵列基板、显示面板和电子设备。
背景技术
电子设备，如手机、平板电脑等设备，其屏占比是指屏幕面积和前面盖板面积的相对比值，屏占比越大，代表电子设备的边框越窄，越能够在电子设备面积一定的前提下，实现宽屏窄框的外观效果。
对于相关技术中的手机常用的前置摄像头、光电感应器等前置器件通常设置在手机的正面顶部位置，形成过多的非显示区域，从而降低手机的屏占比。
发明内容
本申请实施例提供一种阵列基板、显示面板和电子设备，可以提高电子设备的屏占比。
本申请实施例提供一种阵列基板、显示面板和电子设备，可以提高电子设备的屏占比。
第一方面，本申请实施例提供阵列基板，包括：第一衬底、及设置在所述第一衬底上的多条主扫描线、多条子扫描线、至少一个主扫描线驱动电路、至少一个子扫描线驱动电路，所述主扫描线驱动电路和所述主扫描线连接，所述子扫描线驱动电路和所述子扫描线连接，所述阵列基板还包括用于光信号穿过的第一非显示区域，所述子扫描线位于所述第一非显示区域的一侧，所述子扫描线、所述子扫描线驱动电路和所述第一非显示区域并排设置于所述第一衬底的一侧边缘。
第二方面，本申请实施例提供了一种显示面板，包括相对设置的阵列基板和彩膜基板，所述阵列基板包括第一衬底、及设置在所述第一衬底上的多条主扫描线、多条子扫描线、至少一个主扫描线驱动电路、至少一个子扫描线驱动电路，所述主扫描线驱动电路和所述主扫描线连接，所述子扫描线驱动电路和所述子扫描线连接，所述阵列基板设置有用于光信号穿过的第一非显示区域，所述子扫描线位于所述第一非显示区域的一侧，所述子扫描线、所述子扫描线驱动电路和所述第一非显示区域并排设置于所述第一衬底的一侧边缘，所述彩膜基板设置有用于光信号穿过的第二非显示区域，所述第二非显示区域和所述第一非显示区域相对设置，形成非显示区域，用于供光信号穿过。
第三方面，本申请实施例提供了一种电子设备，包括壳体和显示面板，所述显示面板设置在所述壳体内，所述显示面板，相对设置的阵列基板和彩膜基板，所述阵列基板包括第一衬底、及设置在所述第一衬底上的多条主扫描线、多条子扫描线、至少一个主扫描线驱动电路、至少一个子扫描线驱动电路，所述主扫描线驱动电路和所述主扫描线连接，所述子扫描线驱动电路和所述子扫描线连接，所述阵列基板设置有用于光信号穿过的第一非显示区域，所述子扫描线位于所述第一非显示区域的一侧，所述子扫描线、所述子扫描线驱动电路和所述第一非显示区域并排设置于所述第一衬底的一侧边缘，所述彩膜基板设置有用于光信号穿过的第二非显示区域，所述第二非显示区域和所述第一非显示区域相对设置，形成非显示区域，用于供光信号穿过。
附图说明
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本申请实施例提供的电子设备的结构示意图。
图2为图1所示电子设备的正面示意图。
图3为本申请实施例提供的显示面板的结构示意图。
图4为图3所示显示面板在A-A方向的剖面图。
图5为本申请实施例提供的显示面板的另一结构示意图。
图6为图5所示显示面板在B-B方向的截面图。
图7为本申请实施例提供的阵列基板的结构示意图。
图8为本申请实施例提供的第一衬底的结构示意图。
图9为本申请实施例提供的阵列基板的另一结构示意图。
图10为本申请实施例提供的阵列基板的另一结构示意图。
图11为本申请实施例提供的阵列基板的另一结构示意图。
图12为本申请实施例提供的第一衬底的另一结构示意图。
图13为本申请实施例提供的第一衬底的另一结构示意图。
图14为图13中所示第一非显示区域的结构示意图。
图15为本申请实施例提供的显示面板的另一结构示意图。
图16为图15在C-C方向的剖面图。
图17为本申请实施例提供的阵列基板的另一结构示意图。
图18为本申请实施例提供的第一衬底的另一结构示意图。
图19为本申请实施例提供的彩膜基板的结构示意图。
图20为本申请实施例提供的第二衬底的结构示意图。
图21为本申请实施例提供的彩膜基板的另一结构示意图。
图22为本申请实施例提供的显示面板的另一结构示意图。
图23为本申请实施例提供的阵列基板的另一结构示意图。
图24为本申请实施例提供的彩膜基板的另一结构示意图。
图25为本申请实施例提供的显示面板的另一结构示意图。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
在本申请的描述中，需要理解的是，术语“中心”、“纵向”、“横向”、“长度”、“宽度”、“厚度”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”、“顺时针”、“逆时针”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本申请和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本申请的限制。此外，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个所述特征。在本申请的描述中，“多个”的含义是两个或两个以上，除非另有明确具体的限定。
在本申请的描述中，需要说明的是，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”应做广义理解，例如，可以是固定连接，也可以是可拆卸连接，或一体地连接；可以是机械连接，也可以是电连接或可以相互通讯；可以是直接相连，也可以通过中间媒介间接相连，可以是两个元件内部的连通或两个元件的相互作用关系。对于本领域的普通技术人员而言，可以根据具体情况理解上述术语在本申请中的具体含义。
在本申请中，除非另有明确的规定和限定，第一特征在第二特征之“上”或之“下”可以包括第一和第二特征直接接触，也可以包括第一和第二特征不是直接接触而是通过它们之间的另外的特征接触。而且，第一特征在第二特征“之上”、“上方”和“上面”包括第一特征在第二特征正上方和斜上方，或仅仅表示第一特征水平高度高于第二特征。第一特征在第二特征“之下”、“下方”和“下面”包括第一特征在第二特征正下方和斜下方，或仅仅表示第一特征水平高度小于第二特征。
下文的公开提供了许多不同的实施方式或例子用来实现本申请的不同结构。为了简化本申请的公开， 下文中对特定例子的部件和设置进行描述。当然，它们仅仅为示例，并且目的不在于限制本申请。此外，本申请可以在不同例子中重复参考数字和/或参考字母，这种重复是为了简化和清楚的目的，其本身不指示所讨论各种实施方式和/或设置之间的关系。此外，本申请提供了的各种特定的工艺和材料的例子，但是本领域普通技术人员可以意识到其他工艺的应用和/或其他材料的使用。
本申请实施例公开一种阵列基板，其包括：第一衬底、及设置在所述第一衬底上的多条主扫描线、多条子扫描线、至少一个主扫描线驱动电路、至少一个子扫描线驱动电路，所述主扫描线驱动电路和所述主扫描线连接，所述子扫描线驱动电路和所述子扫描线连接，所述阵列基板设置有用于光信号穿过的第一非显示区域，所述子扫描线位于所述第一非显示区域的一侧，所述子扫描线、所述子扫描线驱动电路和所述第一非显示区域并排设置于所述第一衬底的一侧边缘。
在一些实施例中，所述第一衬底包括首尾相连的第一边、第二边、第三边和第四边，所述第一边和所述第三边相对，所述第二边和所述第四边相对，所述第二边、第四边分别位于所述第一边、第三边两侧，所述第一非显示区域邻接所述第一边和第四边设置。
在一些实施例中，所述子扫描线驱动电路为一个。
在一些实施例中，所述子扫描线驱动电路邻接所述第一非显示区域的一侧边缘，所述子扫描线驱动电路位于所述子扫描线和所述第一非显示区域之间。
在一些实施例中，所述子扫描线驱动电路靠近所述第二边设置，所述子扫描线位于所述子扫描线驱动电路和所述第一非显示区域之间。
在一些实施例中，所述子扫描线驱动电路为两个，包括第一子扫描线驱动电路和第二子扫描线驱动电路，所述第一子扫描线驱动电路和所述第二子扫描线驱动电路分别连接于所述子扫描线两端，所述第一子扫描线驱动电路邻接所述第一非显示区域的一侧边缘，所述第二子扫描线驱动电路靠近所述第二边设置。
在一些实施例中，所述第一非显示区域为两个，另一个所述第一非显示区域邻接所述第一边和所述第二边设置。
在一些实施例中，两个所述第一非显示区域以所述子扫描线为轴对称设置。
在一些实施例中，两个所述第一非显示区域的形状、大小相同。
在一些实施例中，所述阵列基板还包括设置在所述第一衬底上数据线驱动电路，所述数据线驱动电路靠近所述第三边。
在一些实施例中，所述阵列基板还包括设置在所述第一衬底上的数据线，所述数据线和所述数据线驱动电路连接，位于所述第一非显示区域和所述数据线驱动电路之间的数据线延伸至所述第一非显示区域的一侧边缘。
在一些实施例中，所述第一非显示区域通过在所述阵列基板上设置第一缺口形成，或/和通过在所述阵列基板上设置第一透明区域形成。
在一些实施例中，所述第一非显示区域包括首尾相互连接的第一侧壁、第二侧壁和第三侧壁，所述第一侧壁与所述第一边邻接，所述第二侧壁与所述第四边邻接，所述第三侧壁与所述阵列基板的显示区域邻接，所述第三侧壁为弧形结构。
本申请实施例公开一种显示面板，其包括：相对设置的阵列基板和彩膜基板，所述阵列基板包括第一衬底、及设置在所述第一衬底上的多条主扫描线、多条子扫描线、至少一个主扫描线驱动电路、至少一个子扫描线驱动电路，所述主扫描线驱动电路和所述主扫描线连接，所述子扫描线驱动电路和所述子扫描线连接，所述阵列基板设置有用于光信号穿过的第一非显示区域，所述子扫描线位于所述第一非显示区域的一侧，所述子扫描线、所述子扫描线驱动电路和所述第一非显示区域并排设置于所述第一衬底的一侧边缘，所述彩膜基板设置有用于光信号穿过的第二非显示区域，所述第二非显示区域和所述第一非显示区域相对设置，形成非显示区域，用于供光信号穿过。
在一些实施例中，所述第一非显示区域和所述第二非显示区域重叠。
在一些实施例中，所述第二非显示区域在空间上位于所述第一非显示区域内。
在一些实施例中，所述第二非显示区域通过在所述彩膜基板上设置第二缺口形成，或/和通过在所述彩膜基板设置第二透明区域形成。
本申请实施例公开一种电子设备，其包括壳体和显示面板，所述显示面板设置在所述壳体内，所述显示面板，相对设置的阵列基板和彩膜基板，所述阵列基板包括第一衬底、及设置在所述第一衬底上的多条主扫描线、多条子扫描线、至少一个主扫描线驱动电路、至少一个子扫描线驱动电路，所述主扫描线驱动电路和所述主扫描线连接，所述子扫描线驱动电路和所述子扫描线连接，所述阵列基板设置有用于光信号穿过的第一非显示区域，所述子扫描线位于所述第一非显示区域的一侧，所述子扫描线、所述子扫描线驱动电路和所述第一非显示区域并排设置于所述第一衬底的一侧边缘，所述彩膜基板设置有用于光信号穿过的第二非显示区域，所述第二非显示区域和所述第一非显示区域相对设置，形成非显示区域，用于供光信号穿过。
在一些实施例中，，所述电子设备还包括前置摄像头，所述前置摄像头设置在所述第一非显示区域；或所述前置摄像头设置在所述第一非显示区域和所述第二非显示区域。
在一些实施例中，所述电子设备还包括光电感应器，所述光电感应器设置在所述第一非显示区域；或所述光电感应器设置在所述第二非显示区域；或所述光电感应器设置在所述第一非显示区域和所述第二非显示区域。
请参阅1和图2，图1和图2为本申请实施例提供的电子设备的结构示意图。该电子设备1包括盖板10、后盖20、印制电路板30、显示面板800。虽然图1和图2中未示出，该电子设备1还包括有电池。电子设备1比如手机、个人电脑、平板电脑、掌上电脑(PDA，Personal Digital Assistant)等。
其中，盖板10安装到显示面板800上，以覆盖显示面板800。盖板10可以为透明玻璃盖板。在一些实施方式中，盖板10可以是用诸如蓝宝石等材料制成的玻璃盖板。
该盖板10与后盖20可以组合形成一壳体结构，该壳体具有通过盖板10与后盖20形成密闭的空间。其中，本申请实施例的后盖包括有中框，中框和后盖一体设置。需要说明的是，壳体的结构并不限于此，比如：中框和后盖分开设置，具体的是，中框设置在盖板和后盖之间。
该显示面板800贴合安装在该盖板10之下，以形成电子设备1的显示面。该显示面板800包括显示区域11和非显示区域12，显示区域11用于显示画面，为电子设备1的显示面，可以用来显示电子设备1的画面或者供用户进行触摸操控等。该非显示区域12用于供光信号穿过，具体的该非显示区域12可以开设供光信号传导的开孔、开槽等，或者该非显示区域12直接透明设置，可以直接供光信号传导，比如：前置摄像头拍照、光电感应器检测等。该盖板10盖合于显示面板800上，也形成相应的显示区域11和非显示区域12，以实现对显示面板800的保护。
该印制电路板30安装在后盖20内部。印制电路板30可以为电子设备1的主板。印制电路板30上可以集成有耳机座、接口座、天线、马达、麦克风、摄像头、光线感应器、受话器以及处理器等功能组件。同时，显示面板800电连接至印制电路板30上。
该电池安装在后盖20中，与该印制电路板30进行电连接，以向电子设备1提供电源。
请一并参阅图3和图4，图3为本申请实施例提供的显示面板的结构示意图，图4为图3所示显示面板在A-A方向的截面图。该显示面板800包括阵列基板810、彩膜基板820和液晶层830。
其中，液晶层830设置在阵列基板810和彩膜基板820之间。
在一些实施例中，显示面板800上包括显示区域11和非显示区域12。其中显示区域11用于显示，其中非显示区域12用于透光，以便光信号穿过，实现光信号的传导。在一些实施例中，该非显示区域12具体为显示面板800透明设置，形成的透明区域12a，仅用于光信号穿过，而不具有显示功能。需要说明的是，该非显示区域12也可以为其它方式，比如：贯穿整个显示面板800，以形成通孔结构；再比如显示面板800部分透明。下面以该非显示区域12为透明区域12a为例进行说明，需要说明的是，其并不构成对本申请实施例的限制。
在一些实施例中，该透明区域12a包括位于阵列基板810上的第一非显示区域814、位于彩膜基板820上的第二非显示区域824以及位于液晶层830位置上的第三非显示区域831。第三非显示区域831位于第一非显示区域814和第二非显示区域824之间，第一非显示区域814、第二非显示区域824和第三非显示区域831共同形成透明区域12a。透明区域12a的一端为阵列基板810的第一衬底811，非显示区域12的另一端为彩膜基板820的第二衬底821。透明区域12a的侧部周围均为显示区域11。
将该显示面板800应用到电子设备1中，可以在透明区域12a位置设置前置摄像头、光电感应器等 功能器件，通过透明区域12a可以传递光线等信号，实现拍照、感应的功能，透明区域12a的周边区域为具有显示功能的显示区域11。本申请实施例的显示面板800在应用到手机、pad等电子设备上时，可以实现全面屏设计，仅在显示面板800上设置透明区域12a以放置前置摄像头或光电感应器等功能器件即可。需要说明的是，本申请实施例还可以直接将前置摄像头、光电感应器等功能器件嵌入到透明区域12a内，可以在实现全面屏的基础上，进一步减少前置摄像头、光电感应器等器件占用电子设备1的空间，使得电子设备1更加轻薄化。
需要说明的是，当非显示区域12具体为显示面板800透明设置，形成的透明区域12a，仅用于光信号穿过，而不具有显示功能时，可以将前置摄像头设置在显示面板800的一侧，前置摄像头可以远离彩膜基板820。当然，当前置摄像头的体积足够小时，也可以将前置摄像头嵌入到显示面板的透明区域12a内。也可以将光电传感器设置在显示面板800的一侧，光电传感器可以远离彩膜基板820。当然，还可以将光电传感器嵌入到显示面板的透明区域12a内。
需要说明的是，当非显示区域12贯穿整个显示面板800，以形成通孔结构时，可以将前置摄像头的至少一部分放置到通孔结构的非显示区域12内，前置摄像头可以设置在第一非显示区域814内，前置摄像头可以设置在第一非显示区域814和第二非显示区域824内。也可以将光电传感器的至少一部分放置到通孔结构的非显示区域12内，光电感应器可以设置在第一非显示区域814，光电感应器也可以设置在第二非显示区域824，光电感应器还可以设置在第一非显示区域814和第二非显示区域824。
需要说明的是，非显示区域12可以包括形成在显示面板800上的盲孔结构，比如第一非显示区域814形成通孔结构，第二非显示区域824透明设置，从而可以将前置摄像头的至少一部分设置在第一非显示区域814，也可以将前置摄像头的至少一部分设置在第一非显示区域814和第二非显示区域824内。也可以将光电传感器的至少一部分放置在第一非显示区域814，光电感应器也可以设置在第二非显示区域824，光电感应器还可以设置在第一非显示区域814和第二非显示区域824。
其中，光电感应器可以包括距离传感器、感光传感器等。
请一并参阅图5和图6，图5为本申请实施例提供的显示面板的另一结构示意图，图6为图5所示显示面板在B-B方向的截面图。
其中，显示面板800还包括框胶840，框胶840设置在阵列基板810和彩膜基板820之间，且框胶840设置在阵列基板810和彩膜基板820的边沿，以密封阵列基板810和彩膜基板820，同时对阵列基板810和彩膜基板820的边沿进行遮光。
请一并参阅图7，图7为本申请实施例提供的阵列基板的结构示意图。该阵列基板810包括第一衬底811和第一显示功能层801。
请一并参阅图8，图8为本申请实施例提供的第一衬底的结构示意图。其中，该第一衬底811透明设置，第一衬底811可以采用玻璃板，其透光性好，方便设置。需要说明的是，本申请实施例第一衬底811的类型并不限于玻璃板，也可以采用其他类型，比如：可挠式板。
在一些实施例中，该第一衬底811包括首尾相连第一边8111、第二边8112、第三边8113和第四边8114，第一边8111和第三边8113相对设置，第二边8112和第四边8114相对设置，第二边8112和第四边8114分别位于第一边8111和第三边8113两侧。
在一些实施例中，第一衬底811包括具有显示功能的第一显示区域819和第一非显示区域814。第一非显示区域814不具有显示功能。该第一非显示区域814通过在阵列基板810上设置第一透明区域形成，即该第一非显示区域814为第一透明区域，两者可以采用相同的标记。第一非显示区域814被第一显示区域819包围，或第一非显示区域814位于第一显示区域819的一侧边沿位置。
其中，第一显示功能层801设置在第一显示区域819，第一非显示区域814未设置有第一显示功能层801。从而，第一显示功能层801不会对第一非显示区域814造成遮挡和填充，使得第一非显示区域814能够一直供光信号穿过。
在一些实施例中，第一非显示区域814未设置部件或器件，靠近该第一非显示区域814位置的第一显示功能层801的部件围绕第一非显示区域814边缘设置。具体的，靠近该第一非显示区域814，与该第一非显示区域814相邻的部件适合该第一非显示区域814边缘设置。比如：该第一非显示区域814的横截面为矩形结构，与该第一非显示区域814相邻的部件的边沿设置成矩形结构，还可以与该第一非显 示区域814的边缘相接触。该横截面的方向与第一衬底811平行。需要说明的是，本申请实施例第一非显示区域814横截面的结构并不限于此，还可以为其它结构，比如圆形、多边形、椭圆形或其它不规则图形结构等。
在一些实施例中，第一显示功能层801包括有多条数据线812、多条主扫描线813、多条子扫描线818、数据线驱动电路815、至少一个主扫描线驱动电路816和至少一个子扫描线驱动电路817。
其中，数据线812，形成在第一衬底811上，并沿第一衬底811的竖直方向均匀排列。在一些实施例中，多条数据线812仅排布在第一显示区域819，多条数据线812未排布在第一非显示区域814。其中部分数据线812终止于第一非显示区域814，或者说延伸至第一非显示区域814。
其中，主扫描线813，形成在第一衬底811上，并沿第一衬底811的水平方向均匀排列。在一些实施例中，多条扫描线813仅排布在第一显示区域819，多条扫描线813未排布在第一非显示区域814。数据线812和主扫描线813相互交错排列限定出多个像素单元，而每个像素单元可以包括像素电极和薄膜晶体管，薄膜晶体管用于控制像素电极，薄膜晶体管分别与数据线812、主扫描线813连接，以通过数据线812和主扫描线813的信号控制像素电极。在一些实施例中，第一显示功能层801包括有该像素单元，第一非显示区域814未设置有该像素单元或其它部件。
其中，子扫描线818，形成在第一衬底811上。数据线812和子扫描线818相互交错排列也限定出多个像素单元。而每个像素单元可以包括像素电极和薄膜晶体管，薄膜晶体管用于控制像素电极，薄膜晶体管分别与数据线812、子扫描线818连接，以通过数据线812和子扫描线818的信号控制像素电极。在一些实施例中，多条子扫描线818均位于第一非显示区域814的一侧，多条子扫描线818和第一非显示区域814并排设置于第一衬底的一侧边缘。在一些实施例中，多条子扫描线818均靠近第二边8112，需要说明的是，多条子扫描线818也可以均靠近第四边8114，或者多条子扫描线818也可以设置于第二边8112和第四边8114中间的位置。
其中，数据线驱动电路815设置在第一衬底811上，数据线驱动电路815靠近第一衬底811的一侧边缘。具体的，数据线驱动电路815靠近第一衬底811的第三边8113设置。进一步的，数据线驱动电路815和第一非显示区域814相对设置。数据线驱动电路815和多条数据线812连接，用于驱动数据线812。
其中，子扫描线驱动电路817设置在第一衬底811上，子扫描线驱动电路817和多条子扫描线818连接，用于驱动子扫描线818。在一些实施例中，子扫描线驱动电路817和主扫描线驱动电路816可以分开设置，子扫描线驱动电路817和主扫描线驱动电路816分别设置在阵列基板810的不同位置。需要说明的是，子扫描线驱动电路817和主扫描线驱动电路816也可以并排设置。
在一些实施例中，子扫描线驱动电路817靠近第一衬底811的第一边8111设置。具体的，子扫描线813、子扫描线驱动电路817和第一非显示区域814并排设置于第一衬底811的一侧边缘。进一步的，子扫描线驱动电路817邻接第一非显示区域814的一侧边缘，子扫描线驱动电路817位于子扫描线813和第一非显示区域814之间。需要说明的是，本申请实施例子扫描线区域电路817的位置并不限于此，比如：请参阅图9，图9为本申请实施例提供的阵列基板的另一结构示意图。图9与图7的区别在于：图9中的子扫描线区域电路817靠近第二边8112设置，子扫描线813位于子扫描线驱动电路817和第一非显示区域814之间。
还需要说明的是，子扫描线驱动电路817的个数并不限于一个，也可以为两个，请参阅图10，图10为本申请实施例提供的阵列基板的另一结构示意图。图10与图7的区别在于：图10中的子扫描线驱动电路包括第一子扫描线驱动电路8171和第二子扫描线驱动电路8172，第一子扫描线驱动电路8171和第二子扫描线驱动电路8172分别与子扫描线818连接，且第一子扫描线驱动电路8171和第二子扫描线驱动电路8172分别连接于子扫描线818的两端，共同驱动子扫描线818。在一些实施例中，第一子扫描线驱动电路8171邻接第一非显示区域的一侧边缘，第二子扫描线驱动电路8172靠近第二边8112设置。
其中，主扫描线驱动电路816设置在第一衬底811上，主扫描线驱动电路816和多条主扫描线813连接，用于驱动主扫描线813。
在一些实施例中，主扫描线驱动电路816可以为两个，具体为第一主扫描线驱动电路8161和第二 主扫描线驱动电路8162，第一主扫描线驱动电路8161和第二主扫描线驱动电路8162共同驱动主扫描线813。第一主扫描线驱动电路8161靠近第四边8114，第二主扫描线驱动电路8162靠近第二边8112位置。进一步的，第一主扫描线驱动电路8161和第二主扫描线驱动电路8162对称设置。需要说明的是，第一主扫描线驱动电路8161和第二主扫描线驱动电路8162不对称设置也是可以的。
在一些实施例中，当有子扫描线驱动电路817靠近第二边8112时，该靠近第二边的子扫描线8112可以与第二主扫描线驱动电路8161并排设置。
需要说明的是，本申请实施例主扫描线驱动电路816的个数并不限于两个，采用一个主扫描线驱动电路816也是可以的。比如：请参阅图11，图11为本申请实施例提供的阵列基板的另一结构示意图。图11是对图7进行的改变，图11中与图7相同的部件采用相同的标记。图11与图7的区别在于：图11的主扫描线驱动电路816仅包括第一主扫描线驱动电路8161。当然，主扫描线驱动电路816仅包括第二主扫描线驱动电路8162也是可以的。
其中，第一非显示区域814邻接第一衬底811的相邻两个侧边沿，具体的是，第一非显示区域814邻接第一衬底811的第一边8111和第四边8114。需要说明的是，第一非显示区域814的位置设置并不限于此，比如，请参阅图12，图12为本申请实施例提供的第一衬底的另一结构示意图。图12与图8的区别在于：第一非显示区域814邻接第一边8111和第二边8112。
在一些实施例中，该第一非显示区域814为长方体结构，其横截面为矩形结构，其包括有四个侧壁，其中两个侧壁分别与第一边8111和第四边8114邻接，或者与第一边8111和第二边8112邻接。需要说明的是，本申请实施例第一非显示区域814的结构并不限于此，其也可以为三面体结构或其它结构。比如，请参阅图13和图14，图13为本申请实施例提供的第一衬底的另一结构示意图，图14为图13中所示第一非显示区域的结构示意图。图13中的第一衬底811与图8或图12中的第一衬底的区别在于：图13中的第一非显示区域814仅包括有三个侧壁，具体的，为第一侧壁8141、第二侧壁8142和第三侧壁8143。
其中，第一侧壁8141、第二侧壁8142和第三侧壁8143首尾相互连接。第一侧壁8141与第一边8111邻接，第二侧壁8142与第四边8114邻接，第一侧壁8141和第二侧壁8142相互垂直。第三侧壁8143与阵列基板810的显示区域819邻接。在一些实施例中，第三侧壁8143为弧形结构，且第三侧壁弧形结构的圆心朝向第一侧壁8141和第二侧壁8142连接的方向。
以上为本申请实施例第一非显示区域814为一个时，其位置的设置方式。需要说明的是，本申请实施例第一非显示区域814的个数并不限于一个，请一并参阅图15至图18，图15为本申请实施例提供的显示面板的另一结构示意图，图16为图15在C-C方向的剖面图，图17为本申请实施例提供的阵列基板的另一结构示意图，图18为本申请实施例提供的第一衬底的另一结构示意图。
图15至图18与以上内容的区别在于：非显示区域12为两个，或者说透明区域12a为两个。具体的，第一非显示区域814为两个，两个第一非显示区域814均邻接阵列基板810的第一边8111。具体的，其中一个第一非显示区域814邻接于第一边8111和第四边8114，具体可以参阅以上内容，在此不再赘述。对应的，彩膜基板820上的第二非显示区域824也为两个。其中另一个第一非显示区域814邻接于第一边8111和第二边8112。两个第一非显示区域814以子扫描线818为轴对称设置。在一些实施例中，两个第一非显示区域814的大小、形状设置相同。需要说明的是，本申请实施例两个第一非显示区域814的形状、大小也可以设置不相同。
以上为本申请实施例对阵列基板811的描述，需要说明的是，阵列基板811并不限于以上结构及部件，以上阵列基板811的内容仅仅是为了便于描述本申请实施例，而非对阵列基板811所有内容的限定。下面对彩膜基板进行详细描述。
请参阅图19，图19为本申请实施例提供的彩膜基板的结构示意图。该彩膜基板820包括第二衬底821及设置在第二衬底821上的第二显示功能层802。
请参阅图20，图20为本申请实施例提供的第二衬底的结构示意图。其中，该第二衬底821可以采用玻璃板，其透光性好，方便设置。需要说明的是，本申请实施例第二底821的类型并不限于玻璃板，也可以采用其他类型，比如：可挠式板。
在一些实施例中，第二衬底821包括具有显示功能的第二显示区域829和第二非显示区域824。第 二非显示区域824不具有显示功能，该第二非显示区域824通过在彩膜基板820上设置第二透明区域形成，即该第二非显示区域824为第二透明区域，两者可以采用相同的标记。第二非显示区域824被第二显示区域829包围，或第二非显示区域824位于第二显示区域829的一侧边沿位置。
其中，第二显示功能层802设置在第二显示区域829，第二非显示区域824未设置有第二显示功能层802。从而，第二显示功能层802不会对第二非显示区域824造成遮挡和填充，使得第二非显示区域824能够供光信号穿过。第二显示功能层802用于实现显示面板800的显示。其中第二显示功能层802包括色阻822。
其中，色阻822，形成在第二衬底821上，该色阻822包括但不限于红色色阻、绿色色阻、蓝色色阻。
其中，第二非显示区域824，形成在第二衬底821上，用于供光信号穿过。其中第二衬底821在第二非显示区域824位置未设置色阻822以及其它器件或材料，确保第二非显示区域824一直透明可见。靠近该第二非显示区域824位置的色阻822围绕第二非显示区域824边缘设置。具体的，靠近该第二非显示区域824，与该第二非显示区域824相邻的色阻适合该第二非显示区域824边缘设置。比如：该第二非显示区域824的横截面为矩形结构，与该第二非显示区域824相邻的色阻的边沿设置成矩形结构，还可以与该第二非显示区域824的边缘相接触。
请参阅图21，图21为本申请实施例提供的彩膜基板的另一结构示意图。该彩膜基板820的第二显示功能层802还包括有黑矩阵823，该黑矩阵823形成在第二衬底821上，且设置在各个色阻822之间，起到遮光的作用。靠近第二非显示区域824的黑矩阵822围绕第二非显示区域824边缘设置，具体的，靠近第二非显示区域824的黑矩阵823，且与第二非显示区域824相邻的黑矩阵适合该第二非显示区域824边缘设置。比如：该第二非显示区域824的横截面为矩形结构，与该第二非显示区域824相邻的黑矩阵的边沿设置成矩形结构，还可以与该第二非显示区域824的边缘相接触。
需要说明的是，本申请实施例第二非显示区域824横截面的结构并不限于此，还可以为其它结构，比如圆形、多边形、椭圆形或其它不规则图形结构等。
本申请实施例中，第二非显示区域824形成在第二衬底821上，第二衬底821在第二非显示区域824上不设置其它器件或部件，确保第二非显示区域824一种透明可见，方便光信号穿过。
以上为本申请实施例对彩膜基板820的描述，需要说明的是，彩膜基板820并不限于以上结构及部件，以上彩膜基板820的内容仅仅是为了便于描述本申请实施例，而非对彩膜基板820所有内容的限定。
在一些实施例中，第一非显示区域814和第二非显示区域824相对设置，第一非显示区域814和第二非显示区域824之间不具有显示器件或显示部件，形成具有透光率的非显示区域12，以便光信号透过。
在一些实施例中，第一非显示区域812的形状和第二非显示区域824的形状相同。比如：第一非显示区域812的横截面为矩形结构，第二非显示区域824的横截面也为矩形结构。
在一些实施例中，第一非显示区域814的面积和第二非显示区域824的面积设置相同，也就是说第一非显示区域814和第二非显示区域824重叠。比如：第一非显示区域814的横截面为矩形结构，第二非显示区域824的横截面也为矩形结构，且两个矩形结构的大小及矩形面积相同。
需要说明的是，第一非显示区域814和第二非显示区域824之间的面积设置并不限于此，比如：第一非显示区域814的面积大于第二非显示区域824的面积，具体的是，第一非显示区域814的表面大于第二非显示区域824的表面，或者说第二非显示区域824的矩形结构在空间上位于第一非显示区域814的矩形结构内。
需要说明的是，第二非显示区域824的个数设置与第一非显示区域814的个数设置相同。
以上为本申请实施例的数据线和扫描线穿过第一非显示区域的具体描述，该第一非显示区域可以位于扫描线和数据线所限定的任意位置，第二非显示区域对应第一非显示区域的位置设置即可。需要说明的是，本申请实施例阵列基板的设置并不限于此，还可以采用其他方式。
需要说明的是，在图示出的举例说明中，非显示区域12的横截面可以为矩形结构，其并不构成对本申请实施例的限定，而本申请实施例非显示区域12的具体形状结构可以参阅以上内容，在此不再赘述。
请参阅图22，图22为本申请实施例提供的显示面板的另一结构示意图。该图22是对图3进行的改 进，该图22中的标记与图3中的标记相同，该图22与图3的区别在于：非显示区域12通过设置在显示面板800上的缺口12b形成，该缺口12b贯穿整个显示面板800。具体的，该缺口12b为一个，可以在显示面板800的一个边角位置设置缺口12b，该缺口12b的形状可以参阅以上透明区域12a的形状，比如矩形、三角形、多边形等。
需要说明的是，该缺口12b并不限于显示面板800的边角位置，也可以位于其中一个边的中间位置，或位于其中一个边的任意位置。还需要说明的是，该缺口12b结构并不限于一个，也可以为两个或多个，比如在显示面板800的一个边缘设置两个缺口12b，以形成多个非显示区域12。从而，可以将摄像头、光电感应器等器件设置到缺口12b位置。
具体的，请参阅图23，图23为本申请实施例提供的阵列基板的另一结构示意图。该图23是针对图7做出的改进，该图23与图7的区别在于：第一非显示区域通过设置在阵列基板810上的第一缺口121形成，该第一缺口121贯穿阵列基板810。需要说明的是，该阵列基板的其余设置可以参阅以上内容，在此不再赘述。
请参阅图24，图24为本申请实施例提供的彩膜基板的另一结构示意图。该图24是针对图19做出的改进，该图24与图19的区别在于：第二非显示区域通过设置在彩膜基板820上的第二缺口122形成，该第二缺口122贯穿彩膜基板810。需要说明的是，该彩膜基板的其余设置可以参阅以上内容，在此不再赘述。
需要说明的是，该显示面板也可以仅在阵列基板上开设第一缺口，而不再彩膜基板上开设第二缺口，这样使得显示面板在于第一缺口位置形成开槽结构，彩膜基板对应位置具有透明设置。
请参阅图25，图25为本申请实施例提供的显示面板的另一结构示意图。该图25是针对图3及图22进行的改进，该图25与图3及图22的区别在于：该非显示区域12至少为两个，其中一个非显示区域12通过设置在显示面板800上的透明区域12a形成，其中另一个非显示区域12通过设置在显示面板800上的缺口12b形成。
具体的是，通过在阵列基板上设置第一透明区域以及通过在阵列基板上设置第一缺口形成两个第一非显示区域。通过在彩膜基板上设置第二透明区域以及通过在彩膜基板上设置第二缺口形成两个第二非显示区域。从而，本申请实施例可以在缺口12b及透明区域12a两个位置设置摄像头、光电感应器等器件。
需要说明的是，第一透明区域、缺口、第二透明区域、第二缺口等均可以参阅以上内容，在此不再赘述。
本领域技术人员可以理解，图1和图2中示出的电子设备1的结构并不构成对电子设备1的限定。电子设备1可以包括比图示更多或更少的部件，或者组合某些部件，或者不同的部件布置。电子设备1还可以包括处理器、存储器、蓝牙模块等，在此不再赘述。
以上对本申请实施例提供的阵列基板、显示面板及电子设备进行了详细介绍，本文中应用了具体个例对本申请的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本申请。同时，对于本领域的技术人员，依据本申请的思想，在具体实施方式及应用范围上均会有改变之处，综上所述，本说明书内容不应理解为对本申请的限制。

Claims (20)

  1. 一种阵列基板，其包括：第一衬底、及设置在所述第一衬底上的多条主扫描线、多条子扫描线、至少一个主扫描线驱动电路、至少一个子扫描线驱动电路，所述主扫描线驱动电路和所述主扫描线连接，所述子扫描线驱动电路和所述子扫描线连接，所述阵列基板设置有用于光信号穿过的第一非显示区域，所述子扫描线位于所述第一非显示区域的一侧，所述子扫描线、所述子扫描线驱动电路和所述第一非显示区域并排设置于所述第一衬底的一侧边缘。
  2. 根据权利要求1所述的阵列基板，其中，所述第一衬底包括首尾相连的第一边、第二边、第三边和第四边，所述第一边和所述第三边相对，所述第二边和所述第四边相对，所述第二边、第四边分别位于所述第一边、第三边两侧，所述第一非显示区域邻接所述第一边和第四边设置。
  3. 根据权利要求2所述的阵列基板，其中，所述子扫描线驱动电路为一个。
  4. 根据权利要求3所述的阵列基板，其中，所述子扫描线驱动电路邻接所述第一非显示区域的一侧边缘，所述子扫描线驱动电路位于所述子扫描线和所述第一非显示区域之间。
  5. 根据权利要求3所述的阵列基板，其中，所述子扫描线驱动电路靠近所述第二边设置，所述子扫描线位于所述子扫描线驱动电路和所述第一非显示区域之间。
  6. 根据权利要求2所述的阵列基板，其中，所述子扫描线驱动电路为两个，包括第一子扫描线驱动电路和第二子扫描线驱动电路，所述第一子扫描线驱动电路和所述第二子扫描线驱动电路分别连接于所述子扫描线两端，所述第一子扫描线驱动电路邻接所述第一非显示区域的一侧边缘，所述第二子扫描线驱动电路靠近所述第二边设置。
  7. 根据权利要求2所述的阵列基板，其中，所述第一非显示区域为两个，另一个所述第一非显示区域邻接所述第一边和所述第二边设置。
  8. 根据权利要求7所述的阵列基板，其特征在于，两个所述第一非显示区域以所述子扫描线为轴对称设置。
  9. 根据权利要求7所述的阵列基板，其特征在于，两个所述第一非显示区域的形状、大小相同。
  10. 根据权利要求2所述的阵列基板，其中，所述阵列基板还包括设置在所述第一衬底上数据线驱动电路，所述数据线驱动电路靠近所述第三边。
  11. 根据权利要求10所述的阵列基板，其中，所述阵列基板还包括设置在所述第一衬底上的数据线，所述数据线和所述数据线驱动电路连接，位于所述第一非显示区域和所述数据线驱动电路之间的数据线延伸至所述第一非显示区域的一侧边缘。
  12. 根据权利要求2所述的阵列基板，其中，所述第一非显示区域通过在所述阵列基板上设置第一缺口形成，或/和通过在所述阵列基板上设置第一透明区域形成。
  13. 根据权利要求2所述的阵列基板，其中，所述第一非显示区域包括首尾相互连接的第一侧壁、第二侧壁和第三侧壁，所述第一侧壁与所述第一边邻接，所述第二侧壁与所述第四边邻接，所述第三侧壁与所述阵列基板的显示区域邻接，所述第三侧壁为弧形结构。
  14. 一种显示面板，其包括：相对设置的阵列基板和彩膜基板，所述阵列基板包括第一衬底、及设置在所述第一衬底上的多条主扫描线、多条子扫描线、至少一个主扫描线驱动电路、至少一个子扫描线驱动电路，所述主扫描线驱动电路和所述主扫描线连接，所述子扫描线驱动电路和所述子扫描线连接，所述阵列基板设置有用于光信号穿过的第一非显示区域，所述子扫描线位于所述第一非显示区域的一侧，所述子扫描线、所述子扫描线驱动电路和所述第一非显示区域并排设置于所述第一衬底的一侧边缘，所述彩膜基板设置有用于光信号穿过的第二非显示区域，所述第二非显示区域和所述第一非显示区域相对设置，形成非显示区域，用于供光信号穿过。
  15. 根据权利要求14所述的显示面板，其中，所述第一非显示区域和所述第二非显示区域重叠。
  16. 根据权利要求14所述的显示面板，其中，所述第二非显示区域通过在所述彩膜基板上设置第二缺口形成，或/和通过在所述彩膜基板设置第二透明区域形成。
  17. 一种电子设备，其包括壳体和显示面板，所述显示面板设置在所述壳体内，所述显示面板包括相对设置的阵列基板和彩膜基板，所述阵列基板包括第一衬底、及设置在所述第一衬底上的多条主扫描 线、多条子扫描线、至少一个主扫描线驱动电路、至少一个子扫描线驱动电路，所述主扫描线驱动电路和所述主扫描线连接，所述子扫描线驱动电路和所述子扫描线连接，所述阵列基板设置有用于光信号穿过的第一非显示区域，所述子扫描线位于所述第一非显示区域的一侧，所述子扫描线、所述子扫描线驱动电路和所述第一非显示区域并排设置于所述第一衬底的一侧边缘，所述彩膜基板设置有用于光信号穿过的第二非显示区域，所述第二非显示区域和所述第一非显示区域相对设置，形成非显示区域，用于供光信号穿过。
  18. 根据权利要求18所述的电子设备，其中，所述非显示区域包括贯穿所述显示面板的通孔结构，所述电子设备还包括功能器件，所述功能器件至少一部分设置在通孔结构的非显示区域内。
  19. 根据权利要求18所述的电子设备，其中，所述非显示区域包括盲孔结构，所述第一非显示区域包括贯穿阵列基板的通孔结构，所述电子设备还包括功能器件，所述功能器件的至少一部分设置在所述盲孔结构的非显示区域内。
  20. 根据权利要求18所述的电子设备，其中，所述电子设备还包括功能器件，所述功能器件设置在所述显示面板一侧，且所述功能器件远离所述彩膜基板。
PCT/CN2018/099664 2017-08-18 2018-08-09 阵列基板、显示面板和电子设备 WO2019033988A1 (zh)

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