WO2019033811A1 - 电致发光显示基板及其制备方法、显示面板及显示装置 - Google Patents

电致发光显示基板及其制备方法、显示面板及显示装置 Download PDF

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WO2019033811A1
WO2019033811A1 PCT/CN2018/087846 CN2018087846W WO2019033811A1 WO 2019033811 A1 WO2019033811 A1 WO 2019033811A1 CN 2018087846 W CN2018087846 W CN 2018087846W WO 2019033811 A1 WO2019033811 A1 WO 2019033811A1
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Prior art keywords
data line
electrode
substrate
layer
disposed
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PCT/CN2018/087846
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English (en)
French (fr)
Inventor
盖翠丽
林奕呈
徐攀
张保侠
李全虎
王玲
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京东方科技集团股份有限公司
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Priority to JP2018565066A priority Critical patent/JP7148411B2/ja
Priority to US16/308,537 priority patent/US10978524B2/en
Priority to EP18811432.6A priority patent/EP3694010B1/en
Publication of WO2019033811A1 publication Critical patent/WO2019033811A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/82—Cathodes
    • H10K50/822—Cathodes characterised by their shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/84—Passivation; Containers; Encapsulations
    • H10K50/842—Containers
    • H10K50/8426—Peripheral sealing arrangements, e.g. adhesives, sealants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/86—Arrangements for improving contrast, e.g. preventing reflection of ambient light
    • H10K50/865—Arrangements for improving contrast, e.g. preventing reflection of ambient light comprising light absorbing layers, e.g. light-blocking layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/124—Insulating layers formed between TFT elements and OLED elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8052—Cathodes
    • H10K59/80522—Cathodes combined with auxiliary electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/87—Passivation; Containers; Encapsulations
    • H10K59/871—Self-supporting sealing arrangements
    • H10K59/8722—Peripheral sealing arrangements, e.g. adhesives, sealants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/87—Passivation; Containers; Encapsulations
    • H10K59/871—Self-supporting sealing arrangements
    • H10K59/8723—Vertical spacers, e.g. arranged between the sealing arrangement and the OLED
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/87—Passivation; Containers; Encapsulations
    • H10K59/873—Encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/38—Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/8791—Arrangements for improving contrast, e.g. preventing reflection of ambient light
    • H10K59/8792—Arrangements for improving contrast, e.g. preventing reflection of ambient light comprising light absorbing layers, e.g. black layers

Definitions

  • Embodiments of the present disclosure relate to an electroluminescent display substrate, a method of fabricating the same, a display panel, and a display device.
  • OLED Organic Light-Emitting Diode
  • LCD Organic Light-Emitting Diode
  • OLED display devices have begun to gradually replace traditional liquid crystal display devices, and have begun to be widely used in electronic devices such as mobile phones, computers, full-color televisions, digital video cameras, and personal digital assistants.
  • an OLED device on an electroluminescent display substrate includes an anode, a cathode, and a light-emitting layer disposed between the anode and the cathode.
  • a voltage is applied between the anode and the cathode, holes and electrons move to the light-emitting layer, and holes and electrons recombine in the light-emitting layer to emit light.
  • the cathode or anode in the OLED device is an active metal, which is very sensitive to water vapor and oxygen in the air, and is very likely to react with water vapor or oxygen which is infiltrated by the outside, resulting in deterioration of the electrode properties and affecting charge injection;
  • the infiltrated water vapor or oxygen also chemically reacts with the organic light-emitting material in the light-emitting layer, impairing the organic light-emitting material, greatly reducing the luminous efficiency of the organic light-emitting material, causing the performance of the OLED device to be degraded and the lifespan to be shortened.
  • At least one embodiment of the present disclosure provides an electroluminescent display substrate comprising: a substrate including a display area and a peripheral area surrounding the display area, wherein at least one OLED device is disposed in the display area; disposed on the display a pixel defining layer in the region and the peripheral region; at least one groove in the pixel defining layer disposed in the peripheral region.
  • the at least one OLED device has a first electrode disposed on a side of the pixel defining layer away from the substrate and extending over the recess.
  • the first electrode completely covers the groove.
  • a plurality of OLED devices are disposed in the display region, and the first electrodes are common cathodes of the plurality of OLED devices.
  • the groove penetrates the pixel defining layer in a direction perpendicular to the electroluminescent display substrate.
  • an electroluminescent display substrate provided by an embodiment of the present disclosure further includes an insulating layer disposed in the display region and the peripheral region and between the pixel defining layer and the substrate.
  • the insulating layer and the pixel defining layer are in contact with each other in the peripheral region, the recess including a first portion penetrating the pixel defining layer in a direction perpendicular to the electroluminescent display substrate and disposed at the The second part of the insulating layer.
  • the second portion of the recess penetrates the insulating layer in a direction perpendicular to the electroluminescent display substrate.
  • a cross-sectional shape of the groove in a direction parallel to the electroluminescent display substrate includes at least one closed ring shape.
  • the ring shape includes a rectangular ring or a rounded rectangular ring.
  • the planar shape of the groove includes a straight strip shape, a curved strip shape, or a wavy line shape.
  • an electroluminescent display substrate further includes a first electrode lead line disposed in the recess and electrically connected to the first electrode.
  • the at least one OLED device has a second electrode disposed opposite to the first electrode, the first electrode lead line and the second electrode being formed of the same material in the same layer.
  • an electroluminescent display substrate provided by an embodiment of the present disclosure further includes a gate metal layer, a gate insulating layer, and a source/drain metal layer sequentially disposed on the substrate.
  • the gate metal layer includes a data line lead disposed in the peripheral region, the source/drain metal layer including a data line disposed in the peripheral region, the gate insulating layer having and being exposed in the peripheral region a plurality of vias of the data line lead, the plurality of vias and the data line are disposed on a side of the recess facing the display area, and the data line lead passes through the recess
  • the at least one via is electrically connected to the data line.
  • an electroluminescent display substrate provided by an embodiment of the present disclosure further includes a first power line and a second power line disposed in the peripheral area.
  • the first power line and the second power line and the gate metal layer are formed of the same material in the same layer, and the data line is fan-shaped when crossing the second power line, so that the data line is The outer diffusion extends to avoid the first power line and the second power line, and a portion of the data line that is fanned and overlaps with a projection of the second power line on the substrate;
  • the data The line is linearly routed across the first power line, and the data line is electrically connected to the data line lead through the plurality of vias after crossing the first power line, and the data line is in a straight line a portion of the wiring and a projection of the first power line on the substrate overlap;
  • the data line lead is fanned when crossing the groove such that the data line lead avoids the first power line And the second power line, and a portion of the data line lead that is fanned and overlap
  • At least one embodiment of the present disclosure further provides a display panel comprising: the display substrate according to any one of the embodiments of the present disclosure; an opposite substrate disposed opposite to the display substrate to be combined with each other; and the display substrate and the A frame sealant in which opposing substrates are bonded to each other.
  • the sealant is disposed on a side of the groove away from the display area.
  • a display panel further includes a first conductive layer disposed on a side of the opposite substrate facing the display substrate, and the first electrode is electrically connected to the first conductive layer.
  • a display panel further includes a column spacer disposed between the display substrate and the opposite substrate, and a cover covering the first conductive layer and the column spacer a second conductive layer; wherein the first electrode is electrically connected to the first conductive layer through the second conductive layer.
  • At least one embodiment of the present disclosure further provides a display device including the display panel of any of the embodiments of the present disclosure.
  • At least one embodiment of the present disclosure further provides a method of fabricating an electroluminescent display substrate, comprising: providing a substrate including a display area and a peripheral area surrounding the display area; forming at least one OLED device in the display area; Forming a pixel defining layer in the display area and the peripheral area; forming at least one groove in the pixel defining layer of the peripheral area.
  • the at least one OLED device has a first electrode disposed on a side of the pixel defining layer away from the substrate and extending over the recess.
  • the groove penetrates the pixel defining layer in a direction perpendicular to the electroluminescent display substrate.
  • a method of fabricating an electroluminescent display substrate further includes forming an insulating layer in the display region and the peripheral region and between the pixel defining layer and the substrate.
  • the insulating layer in the peripheral region is in contact with the pixel defining layer, the groove including a first portion penetrating the pixel defining layer in a direction perpendicular to the electroluminescent display substrate and disposed at a second portion of the planar layer.
  • the second portion of the recess penetrates the insulating layer in a direction perpendicular to the electroluminescent display substrate.
  • the method for fabricating an electroluminescent display substrate according to an embodiment of the present disclosure further includes forming a first electrode lead line covered by the first electrode in the recess.
  • the at least one OLED device has a second electrode disposed opposite the first electrode, the first electrode lead line and the second electrode being formed by the same process.
  • the method for fabricating an electroluminescent display substrate further includes sequentially forming a gate metal layer, a gate insulating layer, and a source/drain metal layer on the substrate.
  • the gate metal layer includes a data line lead disposed in the peripheral region, a first power supply line, and a second power supply line, the source/drain metal layer including a data line disposed in the peripheral region, the gate insulation
  • the layer has at least one via formed in the peripheral region and exposing the data line lead, the plurality of vias and the data line being disposed on a side of the recess facing the display area;
  • the data line is fanned when crossing the second power line such that the data line extends outwardly to avoid the first power line and the second power line, and the data line is fanned a portion of the wiring and a projection of the second power line on the substrate overlap; the data line is linearly routed across the first power line, and the data line passes through the first power line
  • the plurality of vias are electrically electrically
  • FIG. 1 is a top plan view of an electroluminescent display substrate according to an example of an embodiment of the present disclosure
  • Figure 2 is a cross-sectional view taken along line II' of Figure 1;
  • FIG. 3 is a cross-sectional view of an electroluminescent display substrate according to another example of an embodiment of the present disclosure.
  • FIG. 4 is a cross-sectional view of an electroluminescent display substrate according to still another example of an embodiment of the present disclosure.
  • FIG. 5 is a cross-sectional view of an electroluminescent display substrate according to still another example of an embodiment of the present disclosure.
  • Figure 6 is a schematic view 1 of a groove in an embodiment of the present disclosure.
  • Figure 7 is a schematic view 2 of a groove in an embodiment of the present disclosure.
  • Figure 8 is a schematic view 3 of the groove in the embodiment of the present disclosure.
  • FIG. 9A is a cross-sectional view of another electroluminescent display substrate provided in an embodiment of the present disclosure.
  • FIG. 9B is a cross-sectional view of the electroluminescent display substrate provided in FIG. 9A without data line leads;
  • FIG. 10 is a top plan view showing a data driving side of a display substrate according to an embodiment of the present disclosure.
  • FIG. 11 is a cross-sectional view of a display panel according to an embodiment of the present disclosure.
  • 602-second sector line 701-black matrix; 702-color filter;
  • VSS-first power line VDD-second power line
  • the luminescent layer and the metal electrode (cathode or anode) in the organic light-emitting diode (OLED) device in the electroluminescent display substrate are very sensitive to water vapor and oxygen in the air, and are easily infiltrated with the outside. Water oxygen or the like reacts to affect the performance and stability of the display panel including the electroluminescent display substrate. Therefore, the display panel needs to be packaged and water-blocking designed to enhance the protection of the OLED device inside the display panel.
  • packaging technologies commonly used for OLED devices include ultraviolet (UV) curing sealant, glass powder laser sealing, face seal, desiccant packaging, die filling (Dam & Fill) and film packaging.
  • UV ultraviolet
  • the sealant is provided, the moisture or oxygen in the external environment may still penetrate into the inner seal area through the gap between the sealant and the display panel, and it is possible The OLED device is immersed along a pixel defining layer or other layer structure, thereby causing damage to the OLED device.
  • At least one embodiment of the present disclosure provides an electroluminescent display substrate, the electroluminescent display substrate comprising: a substrate including a display area and a peripheral area surrounding the display area, wherein at least one OLED device is disposed in the display area; a pixel defining layer in the area and the surrounding area; at least one groove defined in the pixel defining layer in the peripheral area.
  • the at least one OLED device has a first electrode disposed on a side of the pixel defining layer away from the substrate and extending over the recess.
  • At least one embodiment of the present disclosure also provides a method of fabricating the electroluminescent display substrate, a display panel, and a display device.
  • the electroluminescent display substrate provided by the embodiments of the present disclosure can effectively reduce oxygen and moisture permeating into the OLED device, improve display performance and stability of the display panel including the electroluminescent display substrate, thereby prolonging the service life of the display panel .
  • the patterning process may be a photolithography patterning process, for example, including: coating a photoresist on a structural layer that needs to be patterned, and coating the photoresist by spin coating, blade coating, or roll coating.
  • the photoresist layer is then exposed using a mask, and the exposed photoresist layer is developed to obtain a photoresist pattern; then the structural layer is etched using a photoresist pattern to form a desired pattern structure. Finally, the photoresist pattern is optionally removed.
  • FIGS. 1 and 2 are cross-sectional views taken along line II' of FIG. 1
  • the electroluminescent display substrate 10 includes A substrate 100 including a display area 101 and a peripheral area 102 surrounding the display area 101, which may also be referred to as an AA (Active Area) area.
  • AA Active Area
  • the substrate 100 may be a glass substrate, and embodiments of the present disclosure include, but are not limited to.
  • At least one (eg, a plurality of) OLED devices 20 may be disposed in display area 101 for implementing display functions, and a plurality of OLED devices may be arranged in an array. It should be noted that the number of the OLED devices 20 in FIG. 1 is merely illustrative, and the disclosure is not limited thereto.
  • the OLED device 20 includes a first electrode 201, a second electrode 203 disposed opposite the first electrode 201, and an organic layer 202.
  • the organic layer 202 is interposed between the first electrode 201 and the second electrode 202.
  • the first electrode 201 may be a common electrode for a plurality of OLED devices, such as a common cathode, and the first electrode 201 of the plurality of OLED devices may be integrated as a common electrode.
  • the first electrode 201 is a cathode and the second electrode 203 is an anode.
  • the first electrode 201 may be formed, for example, of a transparent conductive material having a high work function, and the electrode material may include indium tin oxide (ITO), indium zinc oxide (IZO), or the like; and the second electrode 203 may be, for example, of high conductivity and low work function.
  • the material is formed, and the electrode material may include an alloy such as magnesium aluminum alloy (MgAl), lithium aluminum alloy (LiAl), or a single metal such as magnesium, aluminum, or lithium.
  • the organic layer 202 may have a multi-layered structure.
  • the organic layer 202 may include a multilayer structure formed by a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, and an electron injection layer, and the organic layer 202 may further include a hole block.
  • the layer and the electron blocking layer may be disposed, for example, between the electron transport layer and the light emitting layer, and the electron blocking layer may be disposed, for example, between the hole transport layer and the light emitting layer.
  • the arrangement and material of each layer in the organic layer 202 can be referred to a general design, which is not limited by the embodiments of the present disclosure.
  • the electroluminescent display substrate 10 includes a pixel defining layer 204 disposed in the display region 101 and the peripheral region 102.
  • the pixel definition layer 204 is configured to define sub-pixel regions, for example, at least the light-emitting layer in the organic layer 202 is correspondingly disposed in the open region of the pixel definition layer 204.
  • the pixel defining layer 204 extends from the display area 101 into the peripheral area 102, and at least one groove 300 is disposed in the pixel defining layer in the peripheral area.
  • at least one groove 300 is disposed in the pixel defining layer in the peripheral area.
  • FIG. 1 only two grooves 300 respectively disposed on two sides are illustrated by way of example, and embodiments of the present disclosure include but are not limited thereto, for example, only one groove may be provided, and for example, Three, four or more grooves are provided, which are not limited by the embodiments of the present disclosure.
  • the first electrode 201 is disposed on a side of the pixel defining layer 204 away from the substrate 100, and the first electrode 201 extends from the display region 101 into the peripheral region 102 and covers the recess 300.
  • the first electrode 201 may cover only a portion of the recess 300, or as shown in FIG. 2, the first electrode 201 completely covers the recess 300, and an embodiment of the present disclosure. This is not limited.
  • a barrier of a certain height can be formed in the pixel defining layer, thereby effectively blocking oxygen, water vapor, etc.
  • the pixel definition layer penetrates into the OLED device.
  • the OLED device 20 can adopt active driving or passive driving.
  • the passive driving electroluminescent display substrate is composed of a cathode and an anode, and the intersection of the anode and the cathode can emit light, and the driving circuit can be packaged by a tape carrier (Tape Carrier) Package, TCP) or glass on chip (Chip On Glass, COG) and other connection methods for exterior decoration.
  • the active driving electroluminescent display substrate can be provided with a thin film transistor (switching transistor) having a switching function, a thin film transistor (driving transistor) having a driving function, and a charge storage capacitor, that is, a 2T1C driving circuit, a peripheral driving circuit, and each pixel.
  • the OLED device can be integrated on the same glass substrate.
  • the embodiment shown in FIG. 2 employs an active drive mode that includes a drive transistor disposed within display region 101 that can act as a drive component for OLED device 20 to connect OLED device 20 to a power source.
  • the drive circuit may further include a compensation circuit, a monitoring circuit, etc., as needed to achieve a more stable and more accurate drive.
  • the driving transistor may include a gate electrode 411, a gate insulating layer 402, an active layer 414, a third electrode 412, and a fourth electrode 413, and the first via hole 415 exposes the fourth electrode 413, and the second electrode
  • the 203 is electrically connected to the fourth electrode 413 through the first via 415.
  • the third electrode 412 can be a source or a drain, and accordingly the fourth electrode 413 is a drain or a source.
  • through refers to penetration in a direction perpendicular to the electroluminescent display substrate.
  • the following embodiments are the same as those described herein and will not be described again.
  • the groove 300 in the pixel defining layer in the peripheral region may not extend through the pixel defining layer 204, and may also pass through the pixel defining layer 204. This embodiment of the present disclosure does not limit this.
  • the groove 300 extends through the pixel defining layer 204.
  • the recess 300 extends through the pixel defining layer 204, which can more effectively block oxygen, moisture, etc. from penetrating into the OLED device through the pixel defining layer 204.
  • the OLED array substrate 10 further includes an insulating layer disposed between the pixel defining layer 204 and the substrate 100. 205.
  • the insulating layer 205 extends from the display region 101 into the peripheral region 102 and is in contact with the pixel defining layer 204 in the peripheral region 102.
  • the recess 300 includes a first portion that extends through the pixel defining layer 204 and a second portion that is disposed in the insulating layer 205.
  • the first electrode 201 extends from the display area 101 into the peripheral area 102 and covers the recess 300.
  • the recess 300 includes a second portion disposed in the insulating layer 205 as compared to the previous example, and a barrier of a certain height may also be formed in the insulating layer 205.
  • the recess 300 can effectively block oxygen, moisture, and the like from penetrating into the OLED device through the insulating layer 205.
  • the second portion of the recess 300 disposed in the insulating layer 205 may not penetrate the insulating layer 205, and may also penetrate the insulating layer 205. This embodiment of the present disclosure does not limit this.
  • the second portion of the recess 300 disposed in the insulating layer 205 penetrates the insulating layer 205, that is, The groove 300 is said to extend through both the pixel defining layer 204 and the insulating layer 205.
  • the electroluminescent display substrate provided by the present example can more effectively block oxygen, moisture, and the like from penetrating into the OLED device through the pixel defining layer 204 or the insulating layer 205.
  • the sectional shape of the groove 300 indicates the cross-sectional shape of the groove 300 in the direction parallel to the electroluminescent display substrate 10, and the following embodiments are the same as those described herein, and will not be described again.
  • the groove 300 may be disposed around the peripheral region 102 and form a closed loop.
  • the shape of the recess 300 includes at least one closed loop.
  • a closed annular recess may be provided in the peripheral region 102, and, for example, as shown in FIG. 7, may be disposed in the peripheral region 102.
  • Two closed annular grooves may be noted that the embodiment of the present disclosure does not limit the number of annular grooves provided, as long as there is sufficient space setting in the peripheral area.
  • grooves are formed around the peripheral region and form a closed ring shape, which is equivalent to the display area.
  • An annular barrier is formed around the surface to more effectively block oxygen, water vapor, etc. from penetrating into the OLED device through the pixel defining layer or the insulating layer. It is easy to understand that the more the number of annular grooves is set, the better the barrier effect is when the space requirements (such as the width of the frame) are satisfied.
  • the cross-sectional shape of the annular groove includes a rectangular ring or a rounded rectangular ring. It should be noted that embodiments of the present disclosure include but are not limited thereto, and the cross-sectional shape of the annular groove may be other The regular ring shape can be set in the surrounding area and enclose the display area.
  • the planar shape of the groove 300 includes a straight strip shape, a curved strip shape, or a wavy line shape.
  • Embodiments of the present disclosure include, but are not limited to, the planar shape of the groove 300 may also be other shapes, for example, various planar shapes may be combined to form a new planar shape.
  • the four grooves 300 shown may also be joined end to end to form an irregular annular groove.
  • the planar shape of the groove 300 represents a shape formed by the extending direction of the groove 300 when the electroluminescent display substrate 10 is viewed in plan.
  • grooves 300 shown in FIG. 1, FIG. 6, FIG. 7, and FIG. 8 are only schematic, and their sizes and sizes do not represent true proportions.
  • the embodiments of the present disclosure regarding the features of the grooves may be combined with each other to obtain a new groove, which is not limited in the present disclosure.
  • FIG. 1, FIG. 6, FIG. 7, and FIG. 8 a sealant 400 is further disposed outside the recess 300.
  • the sealant 400 will be described below, and details are not described herein again.
  • the electroluminescent display substrate 10 further includes a first electrode lead-out line 211 disposed in the recess 300 and electrically connected to the first electrode 201.
  • the first electrode lead-out line 211 may be in direct contact with the first electrode 201, and the first electrode lead-out line 211 may lead the first electrode 201 common to the OLED device to be connected to the first power source line VSS described hereinafter.
  • an electrical connection (not shown) may be achieved by providing a via between the first electrode lead and the first power line.
  • the OLED device has a second electrode 203 disposed opposite to the first electrode 201.
  • the first electrode lead line 211 may be formed of the same material as the second electrode 203.
  • the same layer formation in the present disclosure means that the same patterning process is formed with the material, and the plurality of structures formed are not necessarily located in the same layer in physical space.
  • the first electrode lead-out line 211 does not need to be disposed at all places in the recess 300, and it is only necessary to provide the first electrode 201 in a part of the recess.
  • the first electrode lead-out line 211 can be formed by the same patterning process as the second electrode 203, thereby saving process cost and mask cost.
  • the electroluminescent display substrate 10 further includes a gate metal layer 401, a gate insulating layer 402, and a source/drain metal layer 403 which are sequentially disposed on the substrate 100.
  • gate metal layer 401 includes data line leads 502 disposed in peripheral region 102 in addition to gate 411 of the drive transistor described above. That is, the gate electrode 411 and the data line lead 502 can be simultaneously formed by the same patterning process.
  • the source/drain metal layer 403 includes a data line 501 disposed in the peripheral region in addition to the third electrode 412 and the fourth electrode 413 of the driving transistor described above. That is, the third electrode 412, the fourth electrode 413, and the data line 501 can be simultaneously formed by the same patterning process.
  • the gate insulating layer 402 has at least one via 505 in the peripheral region 102 and exposing the data line leads (eg, multiple passes) hole).
  • the data line 501 disposed in the source/drain metal layer 403 may be routed through the via 505 to the data line lead 502 disposed in the gate metal layer 401.
  • FIG. 9A is a partial cross-sectional view, only one via 505 is shown.
  • a plurality of data lines 501 and a plurality of data line leads 502 corresponding thereto are located in different layers, and may be connected through via holes therebetween. Since FIG. 10 is a plan view, the via holes are covered by the data lines 501. Therefore, the via holes are not shown in FIG.
  • a plurality of vias 505 and data lines 501 are disposed on a side of the recess 300 facing the display area 101, and the data line leads 502 pass through the vias 505 and through the vias 505 and data lines. 501 achieves electrical connection.
  • data line lead 502 can be coupled to data drive circuit 500, which can be coupled to an electrode (eg, a source or a drain) of a switching transistor for controlling each OLED device in the display substrate.
  • an electrode eg, a source or a drain
  • the data line 501 refers to a data line disposed in the source/drain metal layer 403 in the peripheral region 102. It is easy to understand that the data line is also usually set in the display area, but the data line 501 in the present disclosure does not include the data line portion provided in the display area 101.
  • the data line lead 502 refers to a trace which is disposed in the gate metal layer 401 in the peripheral region 102 and which can lead the data line 501.
  • the crossing or crossing refers to intersecting and passing through from the projection on the substrate, and may or may not be in contact with the physical structure.
  • the data line lead spans or spans the groove, as seen from the projection of the data line lead and the groove on the substrate, the projection of the data line lead intersects the projection of the groove, and the data line lead projection extends A projection through the groove.
  • the data line spanning or crossing the second power line means that the projection of the data line intersects the projection of the second power line as viewed from the projection of the data line and the second power line on the substrate, and the data The line projection extends through the projection of the second power line.
  • the display substrate 10 further includes a passivation layer 404 that covers the source/drain metal layer 403 to serve as an isolation or protection.
  • the recess 300 penetrates the pixel defining layer 204 and the insulating layer 205, if the data line 501 of the source/drain metal layer 403 is not routed to the data line lead 502 of the gate metal layer 401 through the via 505.
  • the first electrode 201 at the recess 300 and the data line 501 are separated by an insulating passivation layer 404.
  • the data line 501 disposed in the source/drain metal layer 403 is routed through the via 505 to the data line lead 502 disposed in the gate metal layer 401 through the data line.
  • the lead 502 leads the data line 501, so that the first electrode 201 and the data line lead 502 located at the recess 300 are separated by a two-layer insulating structure of the passivation layer 404 and the gate insulating layer 402, which can more effectively avoid the first The risk of short circuit between electrode 201 and data line lead 502.
  • the electroluminescent display substrate further includes a first power line VSS and a second power line VDD disposed in the peripheral region 102.
  • first power line VSS is connected to the data driving circuit 500, and the other end is connected to the first electrode lead line 211 described above for directly or indirectly supplying a voltage signal to the first electrode 201.
  • second power line VDD is connected to the data driving circuit 500, and the other end is provided to be connected to one electrode (for example, a source or a drain) of the driving transistor described above for direct or indirect driving.
  • the transistor provides a drive voltage.
  • the first power line VSS and the second power line VDD are formed of the same material as the gate metal layer 401, that is, the first power line VSS and the first layer are formed while forming the gate metal layer 401 by the same patterning process.
  • a data driving circuit 500 may be provided in the left half and the right half, respectively, for supplying a voltage signal to the data line lead 502, the first power line VSS, and the second power line VDD.
  • the data line 501 is drawn from the display area 101 in the vertical direction, the direction when the data line 501 is taken out from the display area 101 is referred to as a first direction, and the direction perpendicular to the first direction is referred to as a second direction.
  • the second power line VDD includes a portion extending in the second direction and a portion extending in the first direction, wherein one end of the portion extending in the first direction is divided into two paths when approaching the data driving circuit 500, the two paths
  • the traces are connected to the data driving circuit 500 of the left and right halves, respectively.
  • the second power supply line VDD is connected to the two data driving circuits 500, and the driving ability of the data driving circuit 500 to the second power supply line VDD can be improved.
  • the first power supply line VSS is disposed in the left half portion and the right half portion, and the extending direction of the first power supply line VSS is parallel to the extending direction of the second power supply line, and the first power supply line VSS includes a portion extending in the second direction. And a portion extending in the first direction, wherein one end of the portion extending in the first direction is connected to the data driving circuit 500.
  • the data line 501 and the source/drain metal layer 403 are formed of the same material in the same layer, that is, the data line 501 is formed while forming the source/drain metal layer 403 by the same patterning process.
  • the data line 501 is taken out from the display area 101, it is fan-shaped when it crosses the second power line VDD, and is called a first sector wiring 601.
  • the first sector wiring 601 and the second power line VDD are along the first.
  • the projections of the two-direction extensions on the substrate overlap.
  • the data line 501 After the data line 501 is taken out from the display area 101, it first extends in the first direction, then a part of the data line 501 extends to the lower left, and the other part of the data line 501 extends to the lower right, that is, the extending direction of the data line 501 is outwardly diffused. Thereby, the first sector wiring 601 is formed. Since the data line 501 (the data line lead 502), the first power line VSS, and the second power line VDD are finally connected to the data driving circuit 500, the first sector wiring 601 is disposed so that the data line 501 can avoid the first power line. A connection line area between VSS and the second power supply line VDD and the data driving circuit 500.
  • the data line 501 crosses the second power supply line VDD after the first sector wiring 601, and then crosses the first power supply line VSS with a straight line, the linear wiring and the first power supply line VSS are in the second direction.
  • the projections of the extended portions overlap on the substrate.
  • the data line 501 is then electrically coupled to the data line lead 502 through the via after crossing the first power line VSS, that is, the data line 501 is routed through the via to the data line lead 502.
  • the data line lead 502 and the gate metal layer 401 are formed of the same material in the same layer, that is, the data line lead 502 is formed while forming the gate metal layer 401 by the same patterning process.
  • the data line lead 502, the first power line VSS, and the second power line VDD are disposed on the gate metal layer 401, and the data line 501 is disposed on the source/drain metal layer 403, such as the gate metal layer 401 and the source/drain metal layer.
  • a gate insulating layer 402 is disposed between 403 to insulate the data line 501 from the first power line VSS and the second power line VDD.
  • the portion of the data line lead 502 that spans the groove 300 is a fan-shaped wiring, referred to as a second sector wiring 602, and the projection of the second sector wiring 602 and the groove 300 on the substrate overlaps.
  • a part of the data line lead 502 extends to the lower left, and the other part of the data line lead 502 extends to the lower right, that is, the data line.
  • the lead 502 is outwardly diffused to form a second sector wiring 602.
  • Providing the second sector wiring 602 can cause the data line lead 502 to avoid the connection line area between the first power line VSS and the data driving circuit 500, so that the data line lead 502 is better fanned out to be connected to the data driving circuit 500.
  • the data line lead 502, the first power supply line VSS, and the portion where the second power supply line VDD is connected to the data driving circuit 500 are distributed in parallel.
  • the data driving circuit 500 may include a plurality of uniformly arranged electrode leads.
  • the data line lead 502, the first power line VSS, and the second power line VDD can be electrically connected to the data driving circuit 500 through the electrode pins.
  • the first power line VSS and the second power line VDD are disposed in the gate metal layer, and the data lines are disposed in the source/drain metal layer, thereby causing the data lines to cross the first power line VSS and The line creepage design is maintained when the second power line VDD.
  • the wire climbing design has fewer metal ramps that reduce the risk of shorts between the two metal layers.
  • the two sector wirings (the first sector wiring and the second sector wiring) can make the data lines fan out better to be connected to the data driving circuit.
  • At least one embodiment of the present disclosure further provides a display panel.
  • the display panel 1 includes any display substrate provided by an embodiment of the present disclosure and an opposite substrate disposed opposite to the display substrate to be combined with each other.
  • a black matrix 701, a color filter 702, and a flat layer 703 may be disposed on the opposite substrate.
  • the color filter 702 is disposed overlapping the opening region defined by the pixel defining layer 204 in the OLED device such that light emitted by the organic layer 202 (eg, white light) may pass through the color filter 702. Filter to achieve color display.
  • the color filter 702 can include three primary color filters, such as a red color filter, a blue color filter, or a green color filter.
  • the organic layer 202 can emit white light, and then filter through the color filter 702 to obtain three primary colors, and then combine the three primary colors to realize color display.
  • the embodiments of the present disclosure are not limited to the above-described manner of color display.
  • the display panel provided in this embodiment can also realize color display by using red, green and blue pixels to independently emit light; the display panel can also use blue light emitting OLED device to emit blue light, and then use the blue light excitation color conversion material (for example, fluorescent material) to obtain Red and green light for color display.
  • the manner of illumination of the display panel in the embodiment of the present disclosure is not limited to the above three types, and is not limited to the specific color of the light that it emits.
  • the display panel 1 further includes a sealant 400 that bonds the display substrate and the opposite substrate to each other, and the sealant 400 is disposed on a side of the recess 300 away from the display region 101.
  • the sealant 400 has the function of preventing moisture intrusion, maintaining the thickness of the periphery of the display panel, and adhering the display substrate and the opposite substrate.
  • a gap between the display substrate and the opposite substrate can also be filled with a liquid filling filler, Filler combined with a frame sealant 400 (Dam & Fill) is a common packaging process.
  • the filler Filler can be made of a resinous material.
  • the display panel 1 may further include a column spacer 705 disposed between the display substrate and the opposite substrate, the column spacer 705 having the display substrate and the display substrate The gap between the opposing substrates, that is, the thickness of the cell is stabilized.
  • a first conductive layer 704 and a second conductive layer 706 covering the first conductive layer 704 and the pillar spacers 705 may also be disposed between the flat layer 703 and the column spacers 705.
  • the first conductive layer 704 may be made of a metal material such as molybdenum or the like.
  • the second conductive layer may be a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO).
  • ITO indium tin oxide
  • IZO indium zinc oxide
  • the first electrode 201 is electrically connected to the first conductive layer 704 through the second conductive layer 706. It should be noted that if the column spacer 705 itself has a conductive material preparation (for example, an anisotropic conductive material), the second conductive layer 706 may not be formed.
  • the first electrode 201 is made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO).
  • ITO indium tin oxide
  • IZO indium zinc oxide
  • the display panel provided in this embodiment may further include a data driving circuit 500, and the data line lead 502 is electrically connected to the data driving circuit 500.
  • the data driving circuit 500 may be a data driving chip that is bonded to the display panel, and the data line lead 502 and the data driving chip may be connected through a flexible circuit board.
  • the driving transistor may be a thin film transistor having a bottom gate structure, or a thin film transistor having a top gate structure.
  • the embodiments of the present disclosure do not limit this.
  • the driving transistor employs a thin film transistor of a bottom gate type structure.
  • the OLED device may adopt a top emission mode or a bottom emission mode, which is not limited by the embodiment of the present disclosure.
  • the first electrode 201 is made of a transparent conductive material, such as indium tin oxide (ITO) or indium zinc oxide (IZO), and the second electrode 203 thereof can be used. It is an opaque metal electrode.
  • the OLED device adopts the bottom emission mode the first electrode 201 may adopt a reflective electrode, and the second electrode 203 may adopt a translucent electrode.
  • At least one embodiment of the present disclosure also provides a display device including a display panel provided by an embodiment of the present disclosure.
  • the display device may be any product or component having a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, and the like.
  • a display function such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, and the like.
  • Embodiments of the present disclosure also provide a method of fabricating an electroluminescent display substrate, in one example, as shown in FIGS. 1 and 2 (FIG. 2 is a cross-sectional view taken along line II' of FIG. 1).
  • the method includes providing a substrate 100 including a display area 101 and a peripheral area 102 surrounding the display area 101, which may also be referred to as an AA (Active Area) area.
  • AA Active Area
  • the substrate 100 may be a glass substrate, and embodiments of the present disclosure include, but are not limited to.
  • the preparation method provided by the present example further includes forming at least one (eg, a plurality of) OLED devices 20 in the display region 101 for implementing a display function, and the plurality of OLED devices may be arranged in an array.
  • the number of the OLED device 20 in FIG. 1 is merely exemplary, and embodiments of the present disclosure are not limited thereto.
  • the OLED device 20 includes a first electrode 201, a second electrode 203 disposed opposite the first electrode 201, and an organic layer 202.
  • first electrode 201 the second electrode 203 disposed opposite the first electrode 201
  • organic layer 202 the organic layer 202
  • the preparation method provided by the present example further includes forming a pixel definition layer 204 that extends from the display area 101 into the peripheral area 102.
  • the preparation method provided by the present example further includes forming at least one groove 300 in the pixel defining layer in the peripheral region.
  • the recess 300 can be formed by a photolithography process.
  • FIG. 1 only two grooves 300 are exemplarily shown.
  • Embodiments of the present disclosure include but are not limited thereto, for example, only one groove may be provided, and for example, three or four may also be provided. The embodiment of the present disclosure does not limit this.
  • a common first electrode 201 of the OLED device is disposed on a side of the pixel defining layer 204 away from the substrate 100, and the first electrode 201 extends from the display region 101 into the peripheral region 102 and covers the recess 300. .
  • the first electrode 201 may cover only a part of the groove 300, or as shown in FIG. 2, the first electrode 201 completely covers the groove 300, and an embodiment of the present disclosure This is not limited.
  • the preparation method provided by the embodiment of the present disclosure can form a certain height in the pixel defining layer by forming a groove in the pixel defining layer in the peripheral region and covering the groove with the first electrode, thereby effectively blocking oxygen Water vapor, etc. penetrate into the OLED device through the pixel definition layer.
  • the OLED device 20 can adopt active driving or passive driving.
  • the passive driving electroluminescent display substrate is composed of a cathode and an anode, and the intersection of the anode and the cathode can emit light, and the driving circuit can be packaged by a tape carrier (Tape Carrier) Package, TCP) or glass on chip (Chip On Glass, COG) and other connection methods for exterior decoration.
  • the active driving electroluminescent display substrate can be provided with a thin film transistor (switching transistor) having a switching function, a thin film transistor (driving transistor) having a driving function, and a charge storage capacitor, that is, a 2T1C driving circuit, a peripheral driving circuit, and each pixel.
  • the OLED device can be integrated on the same glass substrate.
  • the embodiment shown in FIG. 2 employs an active drive mode that includes a drive transistor disposed within display region 101 that can act as a drive component for OLED device 20 to connect OLED device 20 to a power source.
  • the drive circuit may further include a compensation circuit, a monitoring circuit, etc., as needed to achieve a more stable and more accurate drive.
  • the driving transistor may include a gate electrode 411, a gate insulating layer 402, an active layer 414, a third electrode 412, and a fourth electrode 413, and the first via hole 415 exposes the fourth electrode 413, and the second electrode
  • the 203 is electrically connected to the fourth electrode 413 through the first via 415.
  • the third electrode 412 can be a source or a drain, and accordingly the fourth electrode 413 is a drain or a source.
  • the groove 300 in the pixel defining layer in the peripheral region may not extend through the pixel defining layer 204, and may also pass through the pixel defining layer 204. This embodiment of the present disclosure does not limit this.
  • the groove 300 extends through the pixel defining layer 204.
  • the recess 300 can be passed through the pixel defining layer 204 by adjusting the etching time.
  • the recess 300 extends through the pixel defining layer 204 to more effectively block oxygen, moisture, etc. from penetrating into the OLED device through the pixel defining layer 204.
  • the preparation method further includes forming an insulating layer 205 between the pixel defining layer 204 and the substrate 100.
  • the insulating layer 205 extends from the display region 101 into the peripheral region 102 and is in contact with the pixel defining layer 204 in the peripheral region 102.
  • the recess 300 includes a first portion that extends through the pixel defining layer 204 and a second portion that is formed in the insulating layer 205.
  • the first electrode 201 extends from the display area 101 into the peripheral area 102 and covers the recess 300.
  • the groove 300 includes, in addition to the pixel defining layer 204, a second portion formed in the insulating layer 205, which may also be in the insulating layer 205. Form a barrier of a certain height.
  • the recess 300 can effectively block oxygen, moisture, and the like from penetrating into the OLED device through the insulating layer 205.
  • the second portion of the recess 300 disposed in the insulating layer 205 may not penetrate the insulating layer 205, and may also penetrate the insulating layer 205. This embodiment of the present disclosure does not limit this.
  • the second portion of the recess formed in the insulating layer 205 penetrates through the insulating layer 205, that is, the recess 300 penetrates through the pixel defining layer 204.
  • the electroluminescent display substrate prepared by the preparation method provided by the present example can more effectively block oxygen, moisture, and the like from penetrating into the OLED device through the pixel defining layer 204 or the insulating layer 205.
  • At least one embodiment of the present disclosure further provides a method of fabricating an electroluminescent display substrate.
  • the method further includes forming a first electrode lead electrically connected to the first electrode 201 in the recess 300.
  • Line 211 may be in direct contact with the first electrode 201, and the first electrode lead-out line 211 may lead the first electrode 201 common to the OLED device to be connected to the first power source line VSS.
  • an electrical connection (not shown) may be achieved by providing a via between the first electrode lead and the first power line.
  • the OLED device has a second electrode 203 disposed opposite to the first electrode 201.
  • the first electrode lead line 211 may be formed by the same patterning process as the second electrode 203, such as the same photolithography process.
  • the first electrode lead line can be formed by the same patterning process as the second electrode, thereby saving process cost and mask cost.
  • At least one embodiment of the present disclosure further provides a method of fabricating an electroluminescent display substrate.
  • the method further includes sequentially forming a gate metal layer 401, a gate insulating layer 402, and a source and drain on the substrate 100.
  • Metal layer 403. For example, it can be formed using a sputtering process, a deposition process, and a photolithography process.
  • the gate metal layer 401 includes a gate electrode 411 including the driving transistor described above, and is formed in the peripheral region 102.
  • the gate metal layer 401 can be formed by a sputtering process as well as a photolithography process.
  • the source/drain metal layer 403 includes a data line 501 formed in a peripheral region in addition to the third electrode 412 and the fourth electrode 413 of the driving transistor described above.
  • the source/drain metal layer 403 can be formed by a sputtering process as well as a photolithography process.
  • the gate insulating layer 402 has at least one via 505 (eg, a plurality of vias) formed in the peripheral region 102 and exposing the data line leads.
  • the data line 501 formed in the source/drain metal layer 403 may be routed through the via 505 to the data line lead 502 formed in the gate metal layer 401.
  • a plurality of vias 505 and data lines 501 are formed on one side of the recess 300 toward the display area 101, and the data line leads 502 pass through the vias 505 and the data lines after crossing the recesses 300. 501 achieves electrical connection.
  • the array substrate 10 further includes a passivation layer 404 that covers the source/drain metal layer 403.
  • the recess 300 penetrates the pixel defining layer 204 and the insulating layer 205, if the data line 501 of the source/drain metal layer 403 is not routed to the data line lead 502 of the gate metal layer 401 through the via 505.
  • the first electrode 201 at the recess 300 and the data line 501 are separated by an insulating passivation layer 404.
  • the data line 501 formed in the source/drain metal layer 403 is routed through the via 505 to the data line lead 502 disposed in the gate metal layer 401, through the data line.
  • the lead 502 leads the data line 501, so that the first electrode 201 and the data line lead 502 at the recess 300 are separated by a two-layer insulating structure of the passivation layer 404 and the gate insulating layer 402, which can effectively avoid the first electrode 201.
  • one end of the first power line VSS is connected to the data driving circuit 500, and the other end is connected to the first electrode lead line 211 described above for supplying a voltage signal to the first electrode 201.
  • One end of the second power line VDD is connected to the data driving circuit 500, and the other end is connected to one electrode (for example, a source or a drain) of the driving transistor described above for supplying a driving voltage to the driving transistor.
  • the data line 501 is taken out from the display area 101, it is fan-shaped when it crosses the second power supply line VDD, and is referred to as a first sector wiring 601. Since the data line 501 (the data line lead 502), the first power line VSS, and the second power line VDD are finally connected to the data driving circuit 500, the first sector wiring 601 is disposed so that the data line 501 can avoid the first power line. A connection line area between VSS and the second power supply line VDD and the data driving circuit 500.
  • the data line 501 crosses the second power supply line VDD with a sector wiring, and then crosses the first power supply line VSS with a straight line.
  • the data line 501 is then electrically coupled to the data line lead 502 through the via after crossing the first power line VSS, that is, the data line 501 is routed through the via to the data line lead 502.
  • a portion of the data line lead 502 that spans the groove 300 is a fan-shaped wiring, which is referred to as a second sector wiring 602.
  • Providing the second sector wiring 602 allows the data line lead 502 to be better fanned out to be connected to the data driving circuit 500.
  • the first power line VSS and the second power line VDD are disposed in the gate metal layer, and the data lines are disposed in the source/drain metal layer, thereby causing the data lines to cross the first power line VSS and The line creepage design is maintained when the second power line VDD.
  • the wire climbing design has fewer metal ramps that reduce the risk of shorts between the two metal layers.
  • the two sector wirings (the first sector wiring and the second sector wiring) can make the data lines fan out better to be connected to the data driving circuit.
  • the electroluminescent display substrate and the preparation method thereof, the display panel and the display device provided by the embodiments of the present disclosure have at least one of the following beneficial effects.
  • the first electrode lead line may be formed by the same patterning process as the second electrode, thereby saving process cost and mask cost.
  • the data line is routed through the via to the data line lead 502, which effectively avoids the risk of short circuit between the first electrode and the data line lead.
  • the data line maintains a line-climbing design across the first power line and the second power line, which may reduce the risk of short circuit between the metal layers.
  • the two sector wirings (the first sector wiring and the second sector wiring) can make the data lines more fan-out to be connected to the data driving circuit.

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Abstract

一种电致发光显示基板及其制备方法、显示面板及显示装置。该电致发光显示基板(10)包括：基底(100)，包括显示区域(101)和围绕显示区域的周边区域(102)，其中至少一个OLED器件(20)设置在显示区域(101)内；设置在显示区域(101)和周边区域(102)中的像素定义层(204)；设置在周边区域(102)中的像素定义层(204)中的至少一个凹槽(300)；至少一个OLED器件(20)具有第一电极(201)，第一电极(201)设置在像素定义层(204)远离基底(100)的一侧且延伸覆盖凹槽(300)。

Description

电致发光显示基板及其制备方法、显示面板及显示装置
本申请要求于2017年8月17日递交的中国专利申请第201710705346.5号的优先权，在此全文引用上述中国专利申请公开的内容以作为本申请的一部分。
技术领域
本公开实施例涉及一种电致发光显示基板及其制备方法、显示面板及显示装置。
背景技术
有机发光二极管(OLED，Organic Light-Emitting Diode)是一种有机薄膜电致发光器件，其因具有制备工艺简单、成本低、功耗小、亮度高、视角宽、对比度高及可实现柔性显示等优点，而越来越受到人们的关注。作为新一代的显示方式，OLED显示装置已开始逐渐取代传统液晶显示装置，开始被广泛应用在手机、电脑、全彩电视、数码摄像机、个人数字助理等电子装置上。
OLED显示技术与传统的液晶显示技术不同，在电致发光显示基板上的OLED器件包括阳极、阴极和设置于阳极和阴极之间的发光层。当在阳极和阴极之间施加电压时，空穴和电子移动到发光层，空穴和电子在发光层中复合而发光。但是，OLED器件中的阴极或阳极为活泼金属，对空气中的水汽和氧气等非常敏感，非常容易与外界渗透进来的水汽或氧气等发生反应，导致电极性质劣化，影响电荷的注入；另外，渗透进来的水汽或氧气还会与发光层中的有机发光材料发生化学反应，损害有机发光材料，大大降低有机发光材料的发光效率，引起OLED器件性能下降、寿命缩短。
发明内容
本公开至少一实施例提供一种电致发光显示基板，包括：基底，包括显示区域和围绕所述显示区域的周边区域，其中至少一个OLED器件设置在所述显示区域内；设置在所述显示区域和所述周边区域中的像素定义层； 设置在所述周边区域中的所述像素定义层中的至少一个凹槽。所述至少一个OLED器件具有第一电极，所述第一电极设置在所述像素定义层远离所述基底的一侧且延伸覆盖所述凹槽。
例如，在本公开一实施例提供的电致发光显示基板中，所述第一电极完全覆盖所述凹槽。
例如，在本公开一实施例提供的电致发光显示基板中，在所述显示区域内设置有多个OLED器件，所述第一电极是所述多个OLED器件的公共的阴极。
例如，在本公开一实施例提供的电致发光显示基板中，所述凹槽在垂直于所述电致发光显示基板的方向上贯穿所述像素定义层。
例如，本公开一实施例提供的电致发光显示基板还包括设置在所述显示区域和所述周边区域中且在所述像素定义层与所述基底之间的绝缘层。在所述周边区域中所述绝缘层与所述像素定义层彼此接触，所述凹槽包括在垂直于所述电致发光显示基板的方向上贯穿所述像素定义层的第一部分和设置在所述绝缘层中的第二部分。
例如，在本公开一实施例提供的电致发光显示基板中，所述凹槽的第二部分在垂直于所述电致发光显示基板的方向上贯穿所述绝缘层。
例如，在本公开一实施例提供的电致发光显示基板中，所述凹槽在平行于所述电致发光显示基板的方向上的截面形状包括至少一个封闭的环形。
例如，在本公开一实施例提供的电致发光显示基板中，所述环形包括矩形环或圆角矩形环。
例如，在本公开一实施例提供的电致发光显示基板中，所述凹槽的平面形状包括直条形、曲线条形或波浪线条形。
例如，本公开一实施例提供的电致发光显示基板还包括设置在所述凹槽内且与所述第一电极电连接的第一电极引出线。所述至少一个OLED器件具有与所述第一电极相对设置的第二电极，所述第一电极引出线与所述第二电极由相同的材料同层形成。
例如，本公开一实施例提供的电致发光显示基板还包括依次设置在所述基底上的栅金属层、栅绝缘层和源漏金属层。所述栅金属层包括设置在所述周边区域中的数据线引线，所述源漏金属层包括设置在所述周边区域 中的数据线，所述栅绝缘层具有在所述周边区域中且暴露所述数据线引线的多个过孔，所述多个过孔和所述数据线设置在所述凹槽朝向所述显示区域的一侧，所述数据线引线跨过所述凹槽后通过所述至少一个过孔与所述数据线电连接。
例如，本公开一实施例提供的电致发光显示基板还包括设置在所述周边区域中的第一电源线和第二电源线。所述第一电源线和所述第二电源线与所述栅金属层由相同材料同层形成，所述数据线在跨越所述第二电源线时呈扇形布线，以使得所述数据线向外扩散延伸以避开所述第一电源线和所述第二电源线，且所述数据线中呈扇形布线的部分和所述第二电源线在所述基底上的投影重叠；所述数据线在跨越所述第一电源线呈直线布线，所述数据线跨过所述第一电源线后通过所述多个过孔与所述数据线引线电连接，且所述数据线中呈直线布线的部分和所述第一电源线在所述基底上的投影重叠；所述数据线引线在跨越所述凹槽时呈扇形布线，以使得所述数据线引线避开所述第一电源线和所述第二电源线，且所述数据线引线中呈扇形布线的部分和所述凹槽在所述基底上的投影重叠。
本公开至少一实施例还提供一种显示面板，包括：本公开任一实施例所述的显示基板；与所述显示基板相对设置以彼此组合的对置基板；以及将所述显示基板和所述对置基板彼此结合在一起的封框胶。所述封框胶设置在所述凹槽远离所述显示区域的一侧。
例如，本公开一实施例提供的显示面板还包括设置在所述对置基板朝向所述显示基板的一侧上的第一导电层，所述第一电极与所述第一导电层电连接。
例如，本公开一实施例提供的显示面板还包括设置在所述显示基板和所述对置基板之间的柱状隔垫物，以及覆盖所述第一导电层和所述柱状隔垫物的第二导电层；其中，所述第一电极通过所述第二导电层与所述第一导电层电连接。
本公开至少一实施例还提供一种显示装置，包括本公开任一实施例所述的显示面板。
本公开至少一实施例还提供一种电致发光显示基板的制备方法，包括：提供一基底，包括显示区域和围绕所述显示区域的周边区域；在所述显示区域内形成至少一个OLED器件；在所述显示区域和所述周边区域中 形成像素定义层；在所述周边区域的所述像素定义层中形成至少一个凹槽。所述至少一个OLED器件具有第一电极，所述第一电极设置在所述像素定义层远离所述基底的一侧且延伸覆盖所述凹槽。
例如，在本公开一实施例提供的电致发光显示基板的制备方法中，所述凹槽在垂直于所述电致发光显示基板的方向上贯穿所述像素定义层。
例如，本公开一实施例提供的电致发光显示基板的制备方法还包括在所述显示区域和所述周边区域中且在所述像素定义层与所述基底之间形成绝缘层。在所述周边区域中的所述绝缘层与所述像素定义层彼此接触，所述凹槽包括在垂直于所述电致发光显示基板的方向上贯穿所述像素定义层的第一部分和设置在所述平坦层中的第二部分。
例如，在本公开一实施例提供的电致发光显示基板的制备方法中，所述凹槽的第二部分在垂直于所述电致发光显示基板的方向上贯穿所述绝缘层。
例如，本公开一实施例提供的电致发光显示基板的制备方法还包括在所述凹槽内形成被所述第一电极所覆盖的第一电极引出线。所述至少一个OLED器件具有与所述第一电极相对设置的第二电极，所述第一电极引出线与所述第二电极通过同一次工艺形成。
例如，本公开一实施例提供的电致发光显示基板的制备方法还包括在所述基底上依次形成栅金属层、栅绝缘层和源漏金属层。所述栅金属层包括设置在所述周边区域中的数据线引线、第一电源线以及第二电源线，所述源漏金属层包括设置在所述周边区域中的数据线，所述栅绝缘层具有形成在所述周边区域中且暴露所述数据线引线的至少一个过孔，所述多个过孔和所述数据线设置在所述凹槽朝向所述显示区域的一侧；所述数据线在跨越所述第二电源线时呈扇形布线，以使得所述数据线向外扩散延伸以避开所述第一电源线和所述第二电源线，且所述数据线中呈扇形布线的部分和所述第二电源线在所述基底上的投影重叠；所述数据线在跨越所述第一电源线呈直线布线，所述数据线跨过所述第一电源线后通过所述多个过孔与所述数据线引线电连接，且所述数据线中呈直线布线的部分和所述第一电源线在所述基底上的投影重叠；所述数据线引线在跨越所述凹槽时呈扇形布线，以使得所述数据线引线避开所述第一电源线和所述第二电源线，且所述数据线引线中呈扇形布线的部分和所述凹槽在所述基底上的投影重 叠。
附图说明
为了更清楚地说明本公开实施例的技术方案，下面将对实施例的附图作简单地介绍，显而易见地，下面描述中的附图仅仅涉及本公开的一些实施例，而非对本公开的限制。
图1为本公开一实施例中的一个示例提供的一种电致发光显示基板的俯视图；
图2为沿图1中I-I'线的剖视图；
图3为本公开一实施例中的另一个示例提供的一种电致发光显示基板的剖视图；
图4为本公开一实施例中的又一个示例提供的一种电致发光显示基板的剖视图；
图5为本公开一实施例中的再一个示例提供的一种电致发光显示基板的剖视图；
图6为本公开的实施例中关于凹槽的示意图1；
图7为本公开的实施例中关于凹槽的示意图2；
图8为本公开的实施例中关于凹槽的示意图3；
图9A为本公开一实施例中提供的另一种电致发光显示基板的剖视图；
图9B为图9A中提供的电致发光显示基板未设置数据线引线的剖视图；
图10为本公开的实施例提供的显示基板数据驱动侧的俯视图；以及
图11为本公开的一实施例提供的一种显示面板的剖视图。
附图标记：
10-显示基板；           20-OLED器件；           100-基底；
101-显示区域；          102-周边区域；          300-凹槽；
400-封框胶；            500-数据驱动电路；      201-第一电极；
202-有机层；            203-第二电极；          204-像素定义层；
205-绝缘层；            211-第一电极引出线；    401-栅金属层；
402-栅绝缘层；          403-源漏金属层；        404-钝化层；
411-栅极；              412-第三电极；          413-第四电极；
414-有源层；            415-第一过孔；          501-数据线；
502-数据线引线；        505-过孔；              601-第一扇形走线；
602-第二扇形走线；      701-黑矩阵；            702-彩色滤光片；
703-平坦层；            704-第一导电层；        705-柱状隔垫物；
706-第二导电层；        VSS-第一电源线；        VDD-第二电源线；
Filler-填充胶
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。基于所描述的本公开的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例，都属于本公开保护的范围。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。同样，“一个”、“一”或者“该”等类似词语也不表示数量限制，而是表示存在至少一个。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也可能相应地改变。
电致发光显示基板中的有机发光二极管(OLED，Organic Light-EmittingDiode)器件中的发光层和金属电极(阴极或阳极)等对空气中的水汽和氧气等非常敏感，非常容易与外界渗透进来的水氧等发生反应，从而影响包括该电致发光显示基板的显示面板的性能和稳定性。因此，需要对该显示面板进行封装及阻水设计，增强对显示面板内部的OLED器件的保护。
目前对于OLED器件常用的封装技术包括紫外光(UV)固化框胶、玻璃粉末激光封装(laser sealing)、面封装(face seal)、干燥剂封装、填充胶封装(Dam& Fill)及薄膜封装等。在采用填充胶封装(Dam & Fill)时，虽然设置了封框 胶，但是外部环境中的水汽或氧气仍然有可能会透过封框胶与显示面板的间隙渗透入内部密封区域，并有可能沿着像素定义层或其他层结构浸入OLED器件，从而对OLED器件造成损害。
本公开至少一实施例提供一种电致发光显示基板，该电致发光显示基板包括：基底，包括显示区域和围绕显示区域的周边区域，其中至少一个OLED器件设置在显示区域内；设置在显示区域和周边区域中的像素定义层；设置在周边区域中的像素定义层中的至少一个凹槽。至少一个OLED器件具有第一电极，第一电极设置在像素定义层远离基底的一侧且延伸覆盖凹槽。本公开至少一实施例还提供对应于上述电致发光显示基板的制备方法、显示面板及显示装置。
本公开的实施例提供的电致发光显示基板可以有效减少渗透到OLED器件的氧气与水汽，提高包括该电致发光显示基板的显示面板的显示性能和稳定性，从而延长该显示面板的使用寿命。
在本公开的实施例中，构图工艺可以是光刻构图工艺，例如包括：在需要被构图的结构层上涂覆光刻胶，光刻胶的涂覆可以采用旋涂、刮涂或者辊涂的方式；接着使用掩膜板对光刻胶层进行曝光，对曝光的光刻胶层进行显影以得到光刻胶图案；然后使用光刻胶图案对结构层进行蚀刻，以形成需要的图案结构；最后可选地去除光刻胶图案。
下面结合附图对本公开的实施例及其示例进行详细说明。
本公开的实施例的一个示例提供一种电致发光显示基板，如图1和图2所示(图2是沿图1中I-I'线的剖视图)，该电致发光显示基板10包括：基底100，该基底100包括显示区域101和围绕显示区域101的周边区域102，显示区域101又可以称为AA(Active Area)区。
例如，基底100可以是玻璃基板，本公开的实施例包括但不限于此。
例如，如图1所示，在显示区域101中可以设置有至少一个(例如多个)OLED器件20用于实现显示功能，多个OLED器件可以呈阵列排布。需要说明的是，图1中的OLED器件20的个数仅是示意性的，本公开不限于此。
例如，如图2所示，OLED器件20包括第一电极201、与第一电极201相对设置的第二电极203以及有机层202。有机层202夹置在第一电极201和第二电极202之间。例如，第一电极201可以是用于多个OLED器件的公共电极，例如是公共的阴极，多个OLED器件的第一电极201作为公共电极 可以是一体的。
例如，第一电极201为阴极，第二电极203为阳极。第一电极201例如可由具有高功函数的透明导电材料形成，其电极材料可以包括氧化铟锡(ITO)、氧化铟锌(IZO)等；第二电极203例如可由高导电性和低功函数的材料形成，其电极材料可以包括镁铝合金(MgAl)、锂铝合金(LiAl)等合金或者镁、铝、锂等单金属。
有机层202可以为多层结构，例如有机层202可以包括空穴注入层、空穴传输层、发光层、电子传输层和电子注入层形成的多层结构，有机层202还可以包括空穴阻挡层和电子阻挡层，空穴阻挡层例如可设置在电子传输层和发光层之间，电子阻挡层例如可设置在空穴传输层和发光层之间。有机层202中各层的设置及材质可以参照通常设计，本公开的实施例对此不作限定。
例如，如图2所示，电致发光显示基板10包括设置在显示区域101和周边区域102中的像素定义层204。例如，像素定义层204被配置为限定亚像素区域，例如至少有机层202中的发光层对应设置在像素定义层204的开口区域中。
像素定义层204从显示区域101延伸至周边区域102中，且在周边区域中的像素定义层中设置有至少一个凹槽300。如图1所示，仅示例性的示出了分别设置在两侧的两个凹槽300，本公开的实施例包括但不限于此，例如，可以只设置一个凹槽，又例如，还可以设置三个、四个或更多个凹槽，本公开的实施例对此不作限定。
例如，如图2所示，第一电极201设置在像素定义层204远离基底100的一侧，第一电极201从显示区域101延伸至周边区域102中并覆盖凹槽300。
需要说明的是，在本公开的实施例中，第一电极201可以只覆盖凹槽300的一部分，也可以如图2中所示，第一电极201完全覆盖凹槽300，本公开的实施例对此不作限定。
在本示例中，通过在周边区域中的像素定义层中设置凹槽，并且使第一电极覆盖凹槽，可以在像素定义层中形成一定高度的屏障，从而可以有效地阻隔氧气、水汽等通过像素定义层渗透到OLED器件中。
需要说明的是，OLED器件20可以采用有源驱动或无源驱动，无源驱动电致发光显示基板由阴极和阳极构成，阳极和阴极的交叉部分可以发光，驱动电路可由带载封装(Tape Carrier Package,TCP)或玻璃载芯片(Chip On  Glass,COG)等连接方式进行外装。有源驱动电致发光显示基板对每个像素可配备具有开关功能的薄膜晶体管(开关晶体管)、具有驱动功能的薄膜晶体管(驱动晶体管)和一个电荷存储电容，即2T1C驱动电路，***驱动电路和OLED器件可集成在同一玻璃基板上。如图2所示的实施例采用有源驱动的方式，驱动电路包括驱动晶体管，该驱动晶体管设置在显示区域101内，驱动晶体管可以作为OLED器件20的驱动部件以将OLED器件20与电源连接。在其他示例中，根据需要，该驱动电路还可以包括补偿电路、监测电路等，以实现更稳定、更精确地驱动。
例如，如图2所示，驱动晶体管可以包括栅极411、栅绝缘层402、有源层414、第三电极412和第四电极413，第一过孔415暴露第四电极413，第二电极203通过该第一过孔415与第四电极413电连接。例如，第三电极412可以为源极或漏极，相应地第四电极413为漏极或源极。
需要说明的是，在本公开的实施例中所述的“贯穿”均是指在垂直于电致发光显示基板的方向上进行贯穿。以下各实施例与此相同，不再赘述。
需要说明的是，设置在周边区域中的像素定义层中的凹槽300可以不贯穿像素定义层204，当然也可以贯穿像素定义层204，本公开的实施例对此不作限定。
例如，在本公开的实施例的另一个示例提供的一种电致发光显示基板中，如图3所示，凹槽300贯穿像素定义层204。与上一示例相比，凹槽300贯穿像素定义层204，可以更有效地阻隔氧气、水汽等通过像素定义层204渗透到OLED器件中。
例如，在本公开的实施例的又一个示例提供的一种电致发光显示基板中，如图4所示，该OLED阵列基板10还包括设置在像素定义层204与基底100之间的绝缘层205。该绝缘层205从显示区域101延伸至周边区域102中，且在周边区域102中与像素定义层204彼此接触。凹槽300包括贯穿像素定义层204的第一部分和设置在绝缘层205中的第二部分。同样的，第一电极201从显示区域101延伸至周边区域102中并覆盖凹槽300。
与上一示例相比，凹槽300除了贯穿像素定义层外，还包括设置在绝缘层205中的第二部分，可以在绝缘层205中也形成一定高度的屏障。凹槽300除了可以有效地阻隔氧气、水汽等通过像素定义层204渗透到OLED器件中，还可以有效地阻隔氧气、水汽等通过绝缘层205渗透到OLED器件中。
需要说明的是，设置在绝缘层205中的凹槽300的第二部分可以不贯穿绝缘层205，当然也可以贯穿绝缘层205，本公开的实施例对此不作限定。
例如，在本公开的实施例的再一个示例提供的一种电致发光显示基板中，如图5所述，设置于绝缘层205中的凹槽300的第二部分贯穿绝缘层205，也就是说，凹槽300既贯穿像素定义层204又贯穿绝缘层205。与上一示例相比，本示例提供的电致发光显示基板可以更有效地阻隔氧气、水汽等通过像素定义层204或绝缘层205渗透到OLED器件中。
下面，对上述示例中的凹槽300的截面形状进行说明。在本公开的实施例中，凹槽300的截面形状表示凹槽300在平行于电致发光显示基板10的方向上的截面形状，以下各实施例与此相同，不再赘述。
在本公开至少一实施例中，例如，如图6所示，凹槽300可以设置在周边区域102的四周并形成封闭的环形。凹槽300的形状包括至少一个封闭的环形，例如，如图6所示，在周边区域102中可以设置一个封闭的环形凹槽，又例如，如图7所示，在周边区域102中可以设置两个封闭的环形凹槽。需要说明的是，本公开的实施例对设置的环形凹槽的个数不作限定，只要是周边区域中有足够的空间设置即可。
相对于图1中所示的不封闭的凹槽，在本公开的实施例提供的电致发光显示基板中，在周边区域的四周均设置凹槽并形成封闭的环形，相当于在显示区域的周围形成一个环形屏障，可以更有效地阻隔氧气、水汽等通过像素定义层或绝缘层渗透到OLED器件中。容易理解，在满足空间要求(例如边框的宽度)的情况下，环形凹槽设置的个数越多，阻隔效果越好。
例如，如图7所示，环形凹槽的截面形状包括矩形环或圆角矩形环，需要说明的是，本公开的实施例包括但不限于此，环形凹槽的截面形状还可以是其他不规则环形形状，只要设置在周边区域中并将显示区域包围起来即可。
又例如，如图8所示，凹槽300的平面形状包括直条形、曲线条形或波浪线条形。本公开的实施例包括但不限于此，凹槽300的平面形状还可以是其他形状，例如，可以将各种平面形状组合以形成新的平面形状。当然，在图8中，也可以将所示的四个凹槽300首尾连接起来形成一个不规则的环形凹槽。需要说明的是，在本公开的实施例中，凹槽300的平面形状表示俯视电致发光显示基板10时，凹槽300的延伸走向所形成的形状。
需要说明的是，图1、图6、图7和图8中所示的凹槽300仅是示意性的，其尺寸及大小不代表真实比例。另外，在不冲突的情况下，本公开中关于凹槽的特征可以相互组合以得到新的凹槽的实施例，本公开对此不作限定。
另外，需要说明的是，在图1、图6、图7和图8中，在凹槽300外侧还设置有封框胶400，关于封框胶400将在下文中进行描述，这里不再赘述。
在本公开至少一实施例中，例如，如图9A所示，电致发光显示基板10还包括设置在凹槽300内且与第一电极201电连接的第一电极引出线211。例如，第一电极引出线211可以与第一电极201直接接触，第一电极引出线211可以将OLED器件公共的第一电极201引出，连接到下文中所述的第一电源线VSS。例如，第一电极引出线和第一电源线之间可以通过设置过孔实现电连接(图中未示出)。
例如，如图9A所示，如上文中所述，OLED器件具有与第一电极201相对设置的第二电极203。例如，第一电极引出线211可以与第二电极203由相同的材料同层形成。
需要说明的是，在本公开中“同层形成”是指通过同一次构图工艺同材料形成，形成的多个结构在物理空间上不一定位于同一层。
另外，第一电极引出线211不需要在凹槽300内的所有地方都设置，只需要在部分凹槽内设置能将第一电极201引出即可。
在本公开的实施例中，第一电极引出线211可以和第二电极203通过同一次构图工艺形成，从而可以节约制程成本和掩膜成本。
在本公开至少一实施例中，例如，如图9A所示，电致发光显示基板10还包括依次设置在基底100上的栅金属层401、栅绝缘层402和源漏金属层403。
例如，栅金属层401除了包括上文中所述的驱动晶体管的栅极411外，还包括设置在周边区域102中的数据线引线502。也就是说，可以通过同一次构图工艺同时形成栅极411和数据线引线502。
例如，源漏金属层403除了包括上文中所述的驱动晶体管的第三电极412和第四电极413外，还包括设置在周边区域中的数据线501。也就是说，可以通过同一次构图工艺同时形成第三电极412、第四电极413以及数据线501。
例如，如图9A和图10所示(图10是阵列基板10数据驱动侧的俯视图)，栅绝缘层402具有在周边区域102中且暴露数据线引线的至少一个过孔505(例如多个过孔)。设置在源漏金属层403中的数据线501可以通过过孔505换线到设置在栅金属层401中的数据线引线502。
需要说明的是，由于图9A是局部剖视图，所以只示出了一个过孔505。从图10可以看出，多条数据线501和与之对应的多条数据线引线502位于不同层，它们之间可以通过过孔连接，由于图10为俯视图，过孔被数据线501所覆盖，所以在图10中未示出过孔。
另外，图10中示出了12条数据线501和与之对应的数据线引线502，此处数据线501和数据线引线502的条数仅是示意性的，本公开的实施例对此不作限定。
例如，如图9A和图10所示，多个过孔505和数据线501设置在凹槽300朝向显示区域101的一侧，数据线引线502跨过凹槽300后通过过孔505与数据线501实现电连接。
例如，数据线引线502可以与数据驱动电路500连接，数据线501可以与开关晶体管的电极(例如为源极或漏极)连接，用于控制显示基板中的每个OLED器件。
需要说明的是，在本公开的实施例中，数据线501是指设置于周边区域102中的源漏金属层403中的数据线。容易理解，通常在显示区域中也会设置数据线，但本公开中的数据线501不包括设置于显示区域101中的数据线部分。数据线引线502是指设置于周边区域102中的栅金属层401中，且可以将数据线501引出的走线。
需要说明的是，在本公开的实施例中，跨过或跨越是指从基底上的投影来看，相交并穿过，可以实体结构接触，也可以不接触。例如，所述数据线引线跨过或跨越凹槽，是指从数据线引线和凹槽在基底上的投影上看，数据线引线的投影与凹槽的投影相交，并且，数据线引线投影延伸穿过凹槽的投影。又例如，所述数据线跨过或跨越第二电源线，是指从数据线和第二电源线在基底上的投影上看，数据线的投影与第二电源线的投影相交，并且，数据线投影延伸穿过第二电源线的投影。
例如，如图9A所示，显示基板10还包括钝化层404，钝化层404覆盖源漏金属层403以起到隔离或保护的作用。
例如，如图9B所示，当凹槽300贯穿像素定义层204和绝缘层205时，如果源漏金属层403的数据线501不通过过孔505换线到栅金属层401的数据线引线502，则位于凹槽300处的第一电极201与数据线501之间仅间隔有一层绝缘的钝化层404。
在本公开的实施例中，如图9A所示，将设置在源漏金属层403中的数据线501通过过孔505换线到设置在栅金属层401中的数据线引线502，通过数据线引线502将数据线501引出，这样位于凹槽300处的第一电极201与数据线引线502之间就间隔有钝化层404和栅绝缘层402两层绝缘结构，可以更有效地避免第一电极201与数据线引线502之间的短路风险。
在本公开至少一实施例中，例如，如图10所示，电致发光显示基板还包括设置在周边区域102中的第一电源线VSS和第二电源线VDD。例如，第一电源线VSS的一端与数据驱动电路500连接，另一端与上文中所述的第一电极引出线211连接，用于直接或间接地向第一电极201提供电压信号。例如，第二电源线VDD的一端与数据驱动电路500连接，另一端设置为与上文中所述的驱动晶体管的一个电极(例如为源极或漏极)连接，用于直接或间接地向驱动晶体管提供驱动电压。
例如，第一电源线VSS和第二电源线VDD与栅金属层401由相同材料同层形成，也就是说，通过同一次构图工艺在形成栅金属层401的同时形成第一电源线VSS和第二电源线VDD。
例如，如图10所示，可以在左半部分和右半部分分别设置一个数据驱动电路500，用于向数据线引线502、第一电源线VSS和第二电源线VDD提供电压信号。
如图10所示，数据线501沿竖直方向从显示区域101引出，将数据线501从显示区域101引出时的方向称为第一方向，将与第一方向垂直的方向称为第二方向。例如，第二电源线VDD包括沿第二方向延伸的一部分以及沿第一方向延伸的一部分，其中沿第一方向延伸的部分的一端在靠近数据驱动电路500时分成两路走线，该两路走线分别与左半部分和右半部分的数据驱动电路500连接。第二电源线VDD与两个数据驱动电路500连接，可以提高数据驱动电路500对第二电源线VDD的驱动能力。
例如，在左半部分和右半部分均设置有第一电源线VSS，第一电源线VSS的延伸方向和第二电源线的延伸方向平行，第一电源线VSS包括沿第二 方向延伸的一部分和沿第一方向延伸的一部分，其中沿第一方向延伸的部分的一端和数据驱动电路500连接。
例如，数据线501与源漏金属层403由相同材料同层形成，也就是说，通过同一次构图工艺在形成源漏金属层403的同时形成数据线501。如图10所示，数据线501从显示区域101引出后，在跨越第二电源线VDD时呈扇形布线，称之为第一扇形布线601，第一扇形布线601和第二电源线VDD沿第二方向延伸的部分在基底上的投影重叠。例如，数据线501从显示区域101引出后先沿第一方向延伸，然后一部分数据线501向左下方延伸，另一部分数据线501向右下方延伸，即数据线501的延伸方向是向外扩散的，从而形成第一扇形布线601。因为数据线501(数据线引线502)、第一电源线VSS以及第二电源线VDD最后都要和数据驱动电路500连接，所以设置第一扇形布线601可以使数据线501避开第一电源线VSS和第二电源线VDD与数据驱动电路500之间的连接线区域。
例如，如图10所示，数据线501以第一扇形布线601跨过第二电源线VDD后，再以直线布线跨越第一电源线VSS，该直线布线和第一电源线VSS沿第二方向延伸的部分在基底上的投影重叠。然后数据线501在跨过第一电源线VSS后通过过孔与数据线引线502电连接，也就是说数据线501通过过孔换线到数据线引线502。数据线引线502与栅金属层401由相同材料同层形成，也就是说，通过同一次构图工艺在形成栅金属层401的同时形成数据线引线502。由上述可知，数据线引线502、第一电源线VSS以及第二电源线VDD设置在栅金属层401，而数据线501设置在源漏金属层403，例如栅极金属层401和源漏金属层403之间设置有栅绝缘层402，以使得数据线501和第一电源线VSS以及第二电源线VDD绝缘。
例如，如图10所示，数据线引线502中跨越凹槽300的部分呈扇形布线，称之为第二扇形布线602，第二扇形布线602和凹槽300在基底上的投影重叠。例如，数据线501通过过孔换线到数据线引线502后，和第一扇形布线601类似地，一部分数据线引线502向左下方延伸，另一部分数据线引线502向右下方延伸，即数据线引线502是向外扩散的，从而形成第二扇形布线602。设置第二扇形布线602可以使数据线引线502避开第一电源线VSS与数据驱动电路500之间的连接线区域，使得数据线引线502更好的扇出从而与数据驱动电路500连接。
例如，如图10所示，数据线引线502、第一电源线VSS以及第二电源线VDD与数据驱动电路500连接的部分呈平行分布，例如数据驱动电路500可以包括多个均匀排列的电极引脚，数据线引线502、第一电源线VSS以及第二电源线VDD可以通过该电极引脚与数据驱动电路500实现电连接。
在本公开的实施例中，由于第一电源线VSS和第二电源线VDD设置在栅金属层中，而数据线设置在源漏金属层中，从而使数据线在跨越第一电源线VSS和第二电源线VDD时保持了线爬面设计。线爬面设计的金属爬坡截面较少，可以降低两层金属层之间的短路(short)风险。同时，两次扇形布线(第一扇形布线和第二扇形布线)可以使数据线更好的扇出以连接到数据驱动电路。
本公开至少一实施例还提供一种显示面板，如图11所示，该显示面板1包括本公开的实施例提供的任一显示基板以及与显示基板相对设置以彼此组合的对置基板。
例如，在对置基板上可以设置有黑矩阵701、彩色滤光片702以及平坦层703。
例如，在垂直于显示基板的方向上，彩色滤光片702与OLED器件中由像素定义层204限定的开口区域重叠设置，从而有机层202发出的光(例如白光)可以经过彩色滤光片702滤光，实现彩色显示。例如，该彩色滤光片702可以包括三个基色滤光片，例如可以为红色滤光片、蓝色滤光片或绿色滤光片。例如，有机层202可以发出白光，然后通过彩色滤光片702进行滤光从而得到三基色，再组合三基色实现彩色显示。
需要说明的是，本公开的实施例不限于上述彩色显示的方式。例如，本实施例提供的显示面板还可以采用红绿蓝像素独立发光的方式实现彩色显示；该显示面板还可以采用OLED器件发蓝光，然后利用该蓝光激发光色转换材料(例如荧光材料)得到红光和绿光，从而实现彩色显示。本领的普通技术人员应该理解，本公开的实施例中的显示面板的发光方式不限于上述三种，且不限于其所发射的光的具体颜色。
例如，如图11所示，显示面板1还包括将显示基板和对置基板彼此结合在一起的封框胶400，封框胶400设置在凹槽300远离显示区域101的一侧。封框胶400具有防止水汽侵入，维持显示面板周边盒厚，以及黏附显示基板和对置基板的作用。
例如，在显示基板和对置基板之间的间隙还可以填充液体的填充胶Filler，填充胶Filler结合封框胶400(Dam&Fill)就是一种常用的封装工艺。例如，填充胶Filler可以采用树脂类材料。
在本公开至少一实施例中，例如，如图11所示，显示面板1还可以包括设置在显示基板和对置基板之间的柱状隔垫物705，柱状隔垫物705具有维持显示基板与对置基板之间的间隙即盒厚稳定的作用。
例如，在平坦层703和柱状隔垫物705之间还可以设置有第一导电层704，以及覆盖第一导电层704和柱状隔垫物705的第二导电层706。例如，第一导电层704可以采用金属材料，例如为钼等。例如，第二导电层可以采用透明导电材料，例如为氧化铟锡(ITO)或氧化铟锌(IZO)等。第一电极201通过第二导电层706与第一导电层704实现电连接。需要说明的是，如果柱状隔垫物705本身有导电材料制备(例如各向异性导电材料)，则可以不形成第二导电层706。
例如，在显示面板1采用顶发射模式的情形下，第一电极201采用透明导电材质，例如为氧化铟锡(ITO)或氧化铟锌(IZO)等。通过设置第一导电层704并通过第二导电层706与第一电极201电连接，第一导电层704可以作为第一电极201的辅助电极，可以有效降低第一电极201上的压降。
例如，如图10所示，本实施例提供的显示面板还可以包括数据驱动电路500，数据线引线502与数据驱动电路500电连接。例如，数据驱动电路500可以是邦定在显示面板上的数据驱动芯片，数据线引线502与数据驱动芯片可以通过柔性电路板连接。
需要说明的是，本公开的实施例中驱动晶体管可以采用底栅型结构的薄膜晶体管，也可以采用顶栅型结构的薄膜晶体管。本公开的实施例对此不作限定。例如，在本公开的附图所示的实施例中，驱动晶体管采用底栅型结构的薄膜晶体管。
另外OLED器件可以采用顶发射模式，也可以底发射模式，本公开的实施例对此不作限定。例如，OLED器件采用顶发射模式时(如图11所示)，其第一电极201采用透明导电材质，例如为氧化铟锡(ITO)或氧化铟锌(IZO)等，其第二电极203可以为不透明金属电极。OLED器件采用底发射模式时，其第一电极201可以采用反射型电极，其第二电极203可以采用半透明电极。
本公开的实施例提供的显示面板的技术效果可以参考本公开的实施例 提供的电致发光显示基板中的相应描述，在此不再赘述。
本公开的至少一实施例还提供一种显示装置，包括本公开的实施例提供的显示面板。
例如，该显示装置可以为：手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
本公开的实施例提供的显示装置的技术效果可以参考本公开的实施例提供的电致发光显示基板中的相应描述，在此不再赘述。
本公开的实施例还提供一种电致发光显示基板的制备方法，在一个示例中，如图1和图2所示(图2是沿图1中I-I'线的剖视图)，该制备方法包括：提供一基底100，该基底100包括显示区域101和围绕显示区域101的周边区域102，显示区域101又可以称为AA(Active Area)区。
例如，基底100可以是玻璃基板，本公开的实施例包括但不限于此。
例如，如图1所示，本示例提供的制备方法还包括在显示区域101中形成至少一个(例如多个)OLED器件20用于实现显示功能，多个OLED器件可以呈阵列排布。需要说明的是，图1中的OLED器件20的个数仅是示意性的，本公开的实施例不限于此。
例如，如图2所示，OLED器件20包括第一电极201、与第一电极201相对设置的第二电极203以及有机层202。关于第一电极201、第二电极203以及有机层202可以参考本公开的实施例提供的电致发光显示基板中的相应描述，这里不再赘述。
例如，如图2所示，本示例提供的制备方法还包括形成像素定义层204，像素定义层204从显示区域101延伸至周边区域102中。
例如，如图2所示，本示例提供的制备方法还包括在周边区域中的像素定义层中形成有至少一个凹槽300。例如，可以通过光刻工艺形成凹槽300。
如图1所示，仅示例性的示出了两个凹槽300，本公开的实施例包括但不限于此，例如，可以只设置一个凹槽，又例如，还可以设置三个、四个或更多个凹槽，本公开的实施例对此不作限定。
例如，如图2所示，OLED器件的公共的第一电极201设置在像素定义层204远离基底100的一侧，且第一电极201从显示区域101延伸至周边区域102中并覆盖凹槽300。
需要说明的是，在本公开的实施例中，第一电极201可以只覆盖凹槽300 的一部分，也可以如图2中所示，第一电极201完全覆盖凹槽300，本公开的实施例对此不作限定。
本公开的实施例提供的制备方法，通过在周边区域中的像素定义层中形成凹槽，并且使第一电极覆盖凹槽，可以在像素定义层中形成一定高度的屏障，可以有效地阻隔氧气、水汽等通过像素定义层渗透到OLED器件中。
需要说明的是，OLED器件20可以采用有源驱动或无源驱动，无源驱动电致发光显示基板由阴极和阳极构成，阳极和阴极的交叉部分可以发光，驱动电路可由带载封装(Tape Carrier Package,TCP)或玻璃载芯片(Chip On Glass,COG)等连接方式进行外装。有源驱动电致发光显示基板对每个像素可配备具有开关功能的薄膜晶体管(开关晶体管)、具有驱动功能的薄膜晶体管(驱动晶体管)和一个电荷存储电容，即2T1C驱动电路，***驱动电路和OLED器件可集成在同一玻璃基板上。如图2所示的实施例采用有源驱动的方式，驱动电路包括驱动晶体管，该驱动晶体管设置在显示区域101内，驱动晶体管可以作为OLED器件20的驱动部件以将OLED器件20与电源连接。在其他示例中，根据需要，该驱动电路还可以包括补偿电路、监测电路等，以实现更稳定、更精确地驱动。
例如，如图2所示，驱动晶体管可以包括栅极411、栅绝缘层402、有源层414、第三电极412和第四电极413，第一过孔415暴露第四电极413，第二电极203通过该第一过孔415与第四电极413电连接。例如，第三电极412可以为源极或漏极，相应地第四电极413为漏极或源极。
需要说明的是，设置在周边区域中的像素定义层中的凹槽300可以不贯穿像素定义层204，当然也可以贯穿像素定义层204，本公开的实施例对此不作限定。
例如，在另一个示例提供的制备方法中，如图3所示，凹槽300贯穿像素定义层204。例如，可以通过调整刻蚀时间，使凹槽300贯穿像素定义层204。与图2所示的示例相比，凹槽300贯穿像素定义层204，可以更有效地阻隔氧气、水汽等通过像素定义层204渗透到OLED器件中。
例如，在又一个示例提供的制备方法中，如图4所示，该制备方法还包括在像素定义层204与基底100之间形成绝缘层205。该绝缘层205从显示区域101延伸至周边区域102中，且在周边区域102中与像素定义层204彼此接触。凹槽300包括贯穿像素定义层204的第一部分和形成在绝缘层205 中的第二部分。同样的，第一电极201从显示区域101延伸至周边区域102中并覆盖凹槽300。
与图3所示的示例相比，在本示例提供的制备方法中，凹槽300除了贯穿像素定义层204外，还包括形成在绝缘层205中的第二部分，可以在绝缘层205中也形成一定高度的屏障。凹槽300除了可以有效地阻隔氧气、水汽等通过像素定义层204渗透到OLED器件中，还可以有效地阻隔氧气、水汽等通过绝缘层205渗透到OLED器件中。
需要说明的是，设置在绝缘层205中的凹槽300的第二部分可以不贯穿绝缘层205，当然也可以贯穿绝缘层205，本公开的实施例对此不作限定。
例如，在再一个示例提供的制备方法中，如图5所述，形成于绝缘层205中的凹槽的第二部分贯穿绝缘层205，也就是说，凹槽300既贯穿像素定义层204又贯穿绝缘层205。与图4所示的示例相比，由本示例提供的制备方法制备的电致发光显示基板可以更有效地阻隔氧气、水汽等通过像素定义层204或绝缘层205渗透到OLED器件中。
关于上述示例中凹槽的截面形状和平面形状可以参考本公开的实施例提供的电致发光显示基板中的相应描述，这里不再赘述。
本公开至少一实施例还提供一种电致发光显示基板的制备方法，例如，如图9A所示，该制备方法还包括在凹槽300内形成与第一电极201电连接的第一电极引出线211。例如，第一电极引出线211可以与第一电极201直接接触，第一电极引出线211可以将OLED器件公共的第一电极201引出，连接到第一电源线VSS。例如，第一电极引出线和第一电源线之间可以通过设置过孔实现电连接(图中未示出)。
例如，如图9A所示，如上文中所述，OLED器件具有与第一电极201相对设置的第二电极203。例如，第一电极引出线211可以与第二电极203通过同一次构图工艺形成，例如同一次光刻工艺。
在本实施例中，第一电极引出线可以和第二电极通过同一次构图工艺形成，从而可以节约制程成本和掩膜成本。
本公开至少一实施例还提供一种电致发光显示基板的制备方法，例如，如图9A所示，该制备方法还包括在基底100上依次形成栅金属层401、栅绝缘层402和源漏金属层403。例如，可以利用溅射工艺、沉积工艺和光刻工艺形成。
例如，如图9A和图10所示(图10是阵列基板10数据驱动侧的俯视图)，栅金属层401除了包括上文中所述的驱动晶体管的栅极411外，还包括形成在周边区域102中的数据线引线、第一电源线VSS以及第二电源线VDD。例如，可以通过溅射工艺以及光刻工艺形成栅金属层401。
例如，如图9A和图10所示，源漏金属层403除了包括上文中所述的驱动晶体管的第三电极412和第四电极413外，还包括形成在周边区域中的数据线501。例如，可以通过溅射工艺以及光刻工艺形成源漏金属层403。
例如，如图9A和图10所示，栅绝缘层402具有形成在周边区域102中且暴露数据线引线的至少一个过孔505(例如多个过孔)。形成在源漏金属层403中的数据线501可以通过过孔505换线到形成在栅金属层401中的数据线引线502。
例如，如图9A和图10所示，多个过孔505和数据线501形成在凹槽300朝向显示区域101的一侧，数据线引线502跨过凹槽300后通过过孔505与数据线501实现电连接。
例如，如图9A所示，阵列基板10还包括钝化层404，钝化层404覆盖源漏金属层403。
例如，如图9B所示，当凹槽300贯穿像素定义层204和绝缘层205时，如果源漏金属层403的数据线501不通过过孔505换线到栅金属层401的数据线引线502，则位于凹槽300处的第一电极201与数据线501之间间隔有一层绝缘的钝化层404。
在本公开的实施例中，如图9A所示，将形成在源漏金属层403中的数据线501通过过孔505换线到设置在栅金属层401中的数据线引线502，通过数据线引线502将数据线501引出，这样位于凹槽300处的第一电极201与数据线引线502之间就间隔有钝化层404和栅绝缘层402两层绝缘结构，可以有效避免第一电极201与数据线引线502之间的短路(short)风险。
例如，如图10所示，第一电源线VSS的一端与数据驱动电路500连接，另一端与上文中所述的第一电极引出线211连接，用于向第一电极201提供电压信号。第二电源线VDD的一端与数据驱动电路500连接，另一端与上文中所述的驱动晶体管的一个电极(例如为源极或漏极)连接，用于向驱动晶体管提供驱动电压。
例如，如图10所示，数据线501从显示区域101引出后，在跨越第二 电源线VDD时呈扇形布线，称之为第一扇形布线601。因为数据线501(数据线引线502)、第一电源线VSS以及第二电源线VDD最后都要和数据驱动电路500连接，所以设置第一扇形布线601可以使数据线501避开第一电源线VSS和第二电源线VDD与数据驱动电路500之间的连接线区域。
例如，如图10所示，数据线501以扇形布线跨过第二电源线VDD后，再以直线布线跨越第一电源线VSS。然后数据线501在跨过第一电源线VSS后通过过孔与数据线引线502电连接，也就是说数据线501通过过孔换线到数据线引线502。
例如，如图10所示，数据线引线502中跨越凹槽300的部分呈扇形布线，称之为第二扇形布线602。设置第二扇形布线602可以使数据线引线502更好的扇出从而与数据驱动电路500连接。
需要说明的是，关于数据线501、第一扇形布线601、数据线引线502、第二扇形布线602、第一电源线VSS以及第二电源线VDD的描述可以参考本公开的实施例提供的电致发光显示基板中的相应描述，这里不再赘述。
在本公开的实施例中，由于第一电源线VSS和第二电源线VDD设置在栅金属层中，而数据线设置在源漏金属层中，从而使数据线在跨越第一电源线VSS和第二电源线VDD时保持了线爬面设计。线爬面设计的金属爬坡截面较少，可以降低两层金属层之间的短路(short)风险。同时，两次扇形布线(第一扇形布线和第二扇形布线)可以使数据线更好的扇出以连接到数据驱动电路。
综上所述，本公开的实施例提供的电致发光显示基板及其制备方法、显示面板及显示装置，具有以下至少一项有益效果。
(1)在至少一个实施例中，通过在周边区域的像素定义层中设置凹槽，并且使第一电极覆盖凹槽，可以有效地阻隔氧气、水汽等通过像素定义层渗透到OLED器件中，从而提高包括该电致发光显示基板的显示面板的显示性能和稳定性，从而延长显示面板的使用寿命。
(2)在至少一个实施例中，通过在周边区域的像素定义层和绝缘层中设置凹槽，并且使第一电极覆盖凹槽，可以有效地阻隔氧气、水汽等通过像素定义层和绝缘层渗透到OLED器件中，从而提高包括该电致发光显示基板的显示面板的显示性能和稳定性，从而延长显示面板的使用寿命。
(3)在至少一个实施例中，第一电极引出线可以和第二电极通过同一 次构图工艺形成，从而可以节约制程成本和掩膜成本。
(4)在至少一个实施例中，将数据线通过过孔换线到数据线引线502，可以有效避免第一电极与数据线引线之间的短路风险。
(5)在至少一个实施例中，数据线在跨越第一电源线和第二电源线时保持线爬面设计，可以降低金属层之间的短路风险。
(6)在至少一个实施例中，两次扇形布线(第一扇形布线和第二扇形布线)可以使数据线更好的扇出以连接到数据驱动电路。
有以下几点需要说明：
(1)本公开实施例的附图只涉及到与本公开实施例涉及到的结构，其他结构可参考通常设计。
(2)为了清晰起见，在用于描述本公开实施例的附图中，有些区域被放大或缩小，即这些附图并非按照实际的比例绘制。
(3)在不冲突的情况下，本公开实施例及实施例中的特征可以相互组合以得到新的实施例。
以上所述，仅为本公开的具体实施方式，但本公开的保护范围并不局限于此，本公开的保护范围应以所述权利要求的保护范围为准。

Claims (22)

  1. 一种电致发光显示基板，包括：
    基底，包括显示区域和围绕所述显示区域的周边区域，其中至少一个OLED器件设置在所述显示区域内；
    设置在所述显示区域和所述周边区域中的像素定义层；
    设置在所述周边区域中的所述像素定义层中的至少一个凹槽；其中，
    所述至少一个OLED器件具有第一电极，所述第一电极设置在所述像素定义层远离所述基底的一侧且延伸覆盖所述凹槽。
  2. 根据权利要求1所述的电致发光显示基板，其中，所述第一电极完全覆盖所述凹槽。
  3. 根据权利要求1或2所述的电致发光显示基板，其中，在所述显示区域内设置有多个OLED器件，所述第一电极是所述多个OLED器件的公共的阴极。
  4. 根据权利要求1-3任一所述的电致发光显示基板，其中，所述凹槽在垂直于所述电致发光显示基板的方向上贯穿所述像素定义层。
  5. 根据权利要求1-4任一所述的电致发光显示基板，还包括设置在所述显示区域和所述周边区域中且在所述像素定义层与所述基底之间的绝缘层；其中，
    在所述周边区域中所述绝缘层与所述像素定义层彼此接触，
    所述凹槽包括在垂直于所述电致发光显示基板的方向上贯穿所述像素定义层的第一部分和设置在所述绝缘层中的第二部分。
  6. 根据权利要求5所述的电致发光显示基板，其中，所述凹槽的第二部分在垂直于所述电致发光显示基板的方向上贯穿所述绝缘层。
  7. 根据权利要求1-6任一所述的电致发光显示基板，其中，所述凹槽在平行于所述电致发光显示基板的方向上的截面形状包括至少一个封闭的环形。
  8. 根据权利要求7所述的电致发光显示基板，其中，所述环形包括矩形环或圆角矩形环。
  9. 根据权利要求1-8任一所述的电致发光显示基板，其中，所述凹槽的平面形状包括直条形、曲线条形或波浪线条形。
  10. 根据权利要求1-9任一所述的电致发光显示基板，还包括设置在所述凹槽内且与所述第一电极电连接的第一电极引出线；其中，
    所述至少一个OLED器件具有与所述第一电极相对设置的第二电极，
    所述第一电极引出线与所述第二电极由相同的材料同层形成。
  11. 根据权利要求10所述的电致发光显示基板，还包括依次设置在所述基底上的栅金属层、栅绝缘层和源漏金属层；其中，
    所述栅金属层包括设置在所述周边区域中的数据线引线，
    所述源漏金属层包括设置在所述周边区域中的数据线，
    所述栅绝缘层具有在所述周边区域中且暴露所述数据线引线的至少一个过孔，
    所述多个过孔和所述数据线设置在所述凹槽朝向所述显示区域的一侧，
    所述数据线引线跨过所述凹槽后通过所述多个过孔与所述数据线电连接。
  12. 根据权利要求11所述的电致发光显示基板，还包括设置在所述周边区域中的第一电源线和第二电源线；其中，
    所述第一电源线和所述第二电源线与所述栅金属层由相同材料同层形成；
    所述数据线在跨越所述第二电源线时呈扇形布线，以使得所述数据线向外扩散延伸以避开所述第一电源线和所述第二电源线，且所述数据线中呈扇形布线的部分和所述第二电源线在所述基底上的投影重叠；
    所述数据线在跨越所述第一电源线呈直线布线，所述数据线跨过所述第一电源线后通过所述多个过孔与所述数据线引线电连接，且所述数据线中呈直线布线的部分和所述第一电源线在所述基底上的投影重叠；
    所述数据线引线在跨越所述凹槽时呈扇形布线，以使得所述数据线引线避开所述第一电源线和所述第二电源线，且所述数据线引线中呈扇形布线的部分和所述凹槽在所述基底上的投影重叠。
  13. 一种显示面板，包括：
    权利要求1-12任一所述的显示基板；
    与所述显示基板相对设置以彼此组合的对置基板；以及
    将所述显示基板和所述对置基板彼此结合在一起的封框胶；其中，
    所述封框胶设置在所述凹槽远离所述显示区域的一侧。
  14. 根据权利要求13所述的显示面板，还包括设置在所述对置基板朝向所述显示基板的一侧上的第一导电层；其中，
    所述第一电极与所述第一导电层电连接。
  15. 根据权利要求14所述的显示面板，还包括设置在所述显示基板和所述对置基板之间的柱状隔垫物，以及覆盖所述第一导电层和所述柱状隔垫物的第二导电层；其中，所述第一电极通过所述第二导电层与所述第一导电层电连接。
  16. 一种显示装置，包括权利要求13-15任一所述的显示面板。
  17. 一种电致发光显示基板的制备方法，包括：
    提供一基底，包括显示区域和围绕所述显示区域的周边区域；
    在所述显示区域内形成至少一个OLED器件；
    在所述显示区域和所述周边区域中形成像素定义层；
    在所述周边区域的所述像素定义层中形成至少一个凹槽；其中，
    所述至少一个OLED器件具有第一电极，所述第一电极设置在所述像素定义层远离所述基底的一侧且延伸覆盖所述凹槽。
  18. 根据权利要求17所述的制备方法，其中，所述凹槽在垂直于所述电致发光显示基板的方向上贯穿所述像素定义层。
  19. 根据权利要求17或18所述的制备方法，还包括：
    在所述显示区域和所述周边区域中且在所述像素定义层与所述基底之间形成绝缘层；其中，
    在所述周边区域中的所述绝缘层与所述像素定义层彼此接触，
    所述凹槽包括在垂直于所述电致发光显示基板的方向上贯穿所述像素定义层的第一部分和设置在所述绝缘层中的第二部分。
  20. 根据权利要求19所述的制备方法，其中，所述凹槽的第二部分在垂直于所述电致发光显示基板的方向上贯穿所述绝缘层。
  21. 根据权利要求17-20任一所述的制备方法，还包括：
    在所述凹槽内形成被所述第一电极所覆盖的第一电极引出线；其中，
    所述至少一个OLED器件具有与所述第一电极相对设置的第二电极，所述第一电极引出线与所述第二电极通过同一次工艺形成。
  22. 根据权利要求21所述的制备方法，还包括在所述基底上依次形 成栅金属层、栅绝缘层和源漏金属层；其中，
    所述栅金属层包括设置在所述周边区域中的数据线引线、第一电源线以及第二电源线；
    所述源漏金属层包括设置在所述周边区域中的数据线；
    所述栅绝缘层具有形成在所述周边区域中且暴露所述数据线引线的至少一个过孔，所述多个过孔和所述数据线设置在所述凹槽朝向所述显示区域的一侧；
    所述数据线在跨越所述第二电源线时呈扇形布线，以使得所述数据线向外扩散延伸以避开所述第一电源线和所述第二电源线，且所述数据线中呈扇形布线的部分和所述第二电源线在所述基底上的投影重叠；
    所述数据线在跨越所述第一电源线呈直线布线，所述数据线跨过所述第一电源线后通过所述多个过孔与所述数据线引线电连接，且所述数据线中呈直线布线的部分和所述第一电源线在所述基底上的投影重叠；
    所述数据线引线在跨越所述凹槽时呈扇形布线，以使得所述数据线引线避开所述第一电源线和所述第二电源线，且所述数据线引线中呈扇形布线的部分和所述凹槽在所述基底上的投影重叠。
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