WO2019001210A1 - 一种新型潜标数据采集*** - Google Patents

一种新型潜标数据采集*** Download PDF

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Publication number
WO2019001210A1
WO2019001210A1 PCT/CN2018/089108 CN2018089108W WO2019001210A1 WO 2019001210 A1 WO2019001210 A1 WO 2019001210A1 CN 2018089108 W CN2018089108 W CN 2018089108W WO 2019001210 A1 WO2019001210 A1 WO 2019001210A1
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WO
WIPO (PCT)
Prior art keywords
data acquisition
conversion circuit
acquisition system
fpga
novel
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PCT/CN2018/089108
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English (en)
French (fr)
Inventor
阚光明
陈自力
刘保华
裴彦良
连艳红
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国家***第一海洋研究所
西安虹陆洋机电设备有限公司
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Priority to US16/301,454 priority Critical patent/US11686873B2/en
Publication of WO2019001210A1 publication Critical patent/WO2019001210A1/zh

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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01CMEASURING DISTANCES, LEVELS OR BEARINGS; SURVEYING; NAVIGATION; GYROSCOPIC INSTRUMENTS; PHOTOGRAMMETRY OR VIDEOGRAMMETRY
    • G01C13/00Surveying specially adapted to open water, e.g. sea, lake, river or canal
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S19/00Satellite radio beacon positioning systems; Determining position, velocity or attitude using signals transmitted by such systems
    • G01S19/01Satellite radio beacon positioning systems transmitting time-stamped messages, e.g. GPS [Global Positioning System], GLONASS [Global Orbiting Navigation Satellite System] or GALILEO
    • G01S19/13Receivers
    • G01S19/14Receivers specially adapted for specific applications
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01VGEOPHYSICS; GRAVITATIONAL MEASUREMENTS; DETECTING MASSES OR OBJECTS; TAGS
    • G01V1/00Seismology; Seismic or acoustic prospecting or detecting
    • G01V1/38Seismology; Seismic or acoustic prospecting or detecting specially adapted for water-covered areas
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01CMEASURING DISTANCES, LEVELS OR BEARINGS; SURVEYING; NAVIGATION; GYROSCOPIC INSTRUMENTS; PHOTOGRAMMETRY OR VIDEOGRAMMETRY
    • G01C13/00Surveying specially adapted to open water, e.g. sea, lake, river or canal
    • G01C13/002Measuring the movement of open water
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01VGEOPHYSICS; GRAVITATIONAL MEASUREMENTS; DETECTING MASSES OR OBJECTS; TAGS
    • G01V1/00Seismology; Seismic or acoustic prospecting or detecting
    • G01V1/16Receiving elements for seismic signals; Arrangements or adaptations of receiving elements
    • G01V1/162Details
    • G01V1/164Circuits therefore
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01VGEOPHYSICS; GRAVITATIONAL MEASUREMENTS; DETECTING MASSES OR OBJECTS; TAGS
    • G01V1/00Seismology; Seismic or acoustic prospecting or detecting
    • G01V1/16Receiving elements for seismic signals; Arrangements or adaptations of receiving elements
    • G01V1/18Receiving elements, e.g. seismometer, geophone or torque detectors, for localised single point measurements
    • G01V1/186Hydrophones
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01VGEOPHYSICS; GRAVITATIONAL MEASUREMENTS; DETECTING MASSES OR OBJECTS; TAGS
    • G01V1/00Seismology; Seismic or acoustic prospecting or detecting
    • G01V1/38Seismology; Seismic or acoustic prospecting or detecting specially adapted for water-covered areas
    • G01V1/3808Seismic data acquisition, e.g. survey design
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02ATECHNOLOGIES FOR ADAPTATION TO CLIMATE CHANGE
    • Y02A90/00Technologies having an indirect contribution to adaptation to climate change
    • Y02A90/30Assessment of water resources

Definitions

  • the invention relates to the field of data acquisition technology, in particular to a novel submersible data acquisition system.
  • the submarine technology was developed and developed by some marine developed countries in the 1960s.
  • the submarine standard system is an important technical equipment for marine environmental investigation. It has long-term, continuous and synchronous unattended conditions under harsh marine environment conditions.
  • the automatic comprehensive monitoring of marine hydrological and meteorological elements is an extension of spatial and temporal extension of ocean observation shore stations, survey vessels and survey aircraft, and is an important means of offshore monitoring.
  • the existing submersible system generally adopts a plurality of hydrophones in series and parallel to increase the energy of receiving the analog signal, wherein the hydrophone includes a hydrophone, and the hydrophone is used to receive the acoustic signal in the ocean and receive the
  • the analog sound signal is amplified by the front circuit and transmitted to the host computer through a few meters or even hundreds of meters of streamers, and the upper computer performs analog-digital conversion for further processing. In this way, long-distance streamers can cause attenuation and interference to the analog sound signal, resulting in reduced acquisition performance of the sub-standard system.
  • the present invention provides a novel submersible data acquisition system, which reduces the attenuation and interference of the collected data, improves the acquisition performance of the submarine data acquisition system, and realizes the synchronous acquisition of the entire submarine data acquisition system. And control.
  • the present invention solves the above problems by the following technical means:
  • a novel bidding data acquisition system of the present invention comprises: a battery compartment, a main control processor, a GPS receiver, a Gigabit Ethernet interface module and at least one data acquisition board; the battery compartment is used for each power module Powering, the GPS receiver is connected to an input end of the main control processor, and an input end of the Gigabit Ethernet interface module is connected to an input end of the main control processor, the Gigabit Ethernet interface
  • the output end of the module is connected to the host computer through a bus;
  • the data acquisition board includes a water sensing sensor, a front end driving circuit, an AD conversion circuit, a clock module, a DA conversion circuit, an FPGA, an ARM processor, and a storage module, and the hydrophone
  • the output end is connected to the input end of the AD conversion circuit through the front end driving circuit, the output end of the AD conversion circuit is connected to the input end of the FPGA, and the FPGA is connected to the ARM processor.
  • the storage module is connected to an output end of the ARM processor, and an input end of the DA conversion circuit is connected to an output end of the FPGA, an output end of the DA conversion circuit and the clock module
  • the terminal is connected, the output of the clock input terminal of the module connected to the FPGA, the ARM processor in contact with the master processor.
  • the main control processor includes a chip XC7Z020-2CLG400I.
  • the GPS receiver includes a Lassen LPGPS time receiver.
  • the Gigabit Ethernet interface module includes a chip 88E1340S.
  • model of the FPGA is ALG1000, and the ARM processor uses an ARM chip of the STM32F207 series.
  • model of the hydrophone is TL-30DS.
  • the AD conversion circuit includes an analog to digital converter of the type ADS1263IPW.
  • the clock module includes an oven controlled crystal oscillator OCXO
  • the DA conversion circuit includes a digital-to-analog converter of the type AD5331.
  • the storage module includes an SDIO interface circuit and an SD card, and the ARM processor is connected to the SD card through the SDIO interface circuit.
  • the battery compartment comprises eight sets of battery packs, each set of the battery pack being composed of a double-section ER34615M battery core.
  • the invention provides a novel submersible data acquisition system, which comprises a battery compartment, a main control processor, a GPS receiver, a Gigabit Ethernet interface module and at least one data acquisition board, and uses a battery compartment for power supply of each electrical module.
  • Each data acquisition board is connected to the main control processor, and the water listening sensor of each data acquisition board is used for detecting the sound wave signal in real time, and the detected analog sound wave signal is amplified by the front end drive circuit and input to the AD conversion circuit.
  • the AD conversion circuit converts the digital sound wave signal into a digital sound wave signal, and then inputs it to the FPGA, and then the FPGA transfers to the ARM processor, and the ARM processor stores the data into the storage module, and completes the acquisition process of each data acquisition board; and each data acquisition board
  • the ARM processor can also send the received digital sound wave signal to the main control processor, and the main control processor transmits the signal to the host computer through the Gigabit Ethernet interface module, so that the host computer pairs each data according to the received digital sound wave signal.
  • the acquisition board is monitored to ensure that each data acquisition board works normally.
  • the present invention converts the collected analog sound wave signal into a digital sound wave signal and saves it to the SD card, thereby avoiding the loss of the collected data; and also transmits the digital collected data to the host computer through the Gigabit Ethernet interface module, thereby reducing the The attenuation and interference of the collected data improves the acquisition performance of the submarine data acquisition system; in addition, the GPS receiver is used to provide high-precision timing information, and the timing information is sent to the main control processor, and finally the main control processor The FPGA is sent to each data acquisition board, and the FPGA of each data acquisition board sets the output voltage of the DA conversion circuit according to the clock module and the received timing information, thereby adjusting the oscillation frequency of the clock module to achieve the purpose of clock calibration. Synchronous trigger input and synchronous trigger output of each data acquisition board realize synchronous acquisition and control of the entire submarine data acquisition system.
  • FIG. 1 is a circuit block diagram of a novel submarine data acquisition system of the present invention
  • FIG. 2 is a circuit diagram of a front end drive circuit of the present invention.
  • a novel submarine data acquisition system of the embodiment includes: a battery compartment 1, a main control processor 2, a GPS receiver 3, a Gigabit Ethernet interface module 4, and at least one data acquisition board;
  • the battery compartment 1 is configured to supply power to each power module, and the GPS receiver 3 is connected to an input end of the main control processor 2, and the input end of the Gigabit Ethernet interface module 4 and the main control
  • the input of the processor 2 is connected, and the output of the Gigabit Ethernet interface module 4 is connected to the host computer 6 via a bus.
  • the data acquisition board includes a water sensing sensor 51, a front end driving circuit 52, an AD conversion circuit 53, a clock module 54, a DA conversion circuit 55, an FPGA 56, an ARM processor 57, and a storage module 58, an output end of the hydrophone sensor 51.
  • the front end driving circuit 52 is connected to the input end of the AD conversion circuit 53
  • the output end of the AD conversion circuit 53 is connected to the input end of the FPGA 56
  • the FPGA 56 is connected to the ARM processor 57.
  • the storage module 58 is connected to the output end of the ARM processor 57.
  • the input end of the DA conversion circuit 55 is connected to the output end of the FPGA 56.
  • the output end of the DA conversion circuit 55 and the clock module 54 are connected.
  • the input terminal is connected, the output end of the clock module 54 is connected to the input end of the FPGA 56, and the ARM processor 57 is connected to the main control processor 2.
  • the number of data acquisition boards is four, as shown in FIG. 1 , which are respectively a first data acquisition board 5-1, a second data acquisition board 5-2, and a third data acquisition board 5- 3 and the fourth data acquisition board 5-4, and the ARM processor 57 of each data acquisition board is connected to the main control processor 2, and only the modules in the first data acquisition board 5-1 are performed in FIG. Reference numerals.
  • the main control processor 2 includes a chip XC7Z020-2CLG400I.
  • the GPS receiver 3 includes a Lassen LPGPS time receiver.
  • the Gigabit Ethernet interface module 4 includes a chip 88E1340S.
  • the model of the FPGA 56 is ALG1000, and the ARM processor 57 uses an ARM chip of the STM32F207 series.
  • the model of the hydrophone sensor 51 is TL-30DS.
  • the present invention does not limit the specific circuit of the front-end driving circuit, and may be a corresponding driving circuit in the prior art.
  • the front-end driving circuit 52 includes an analog switch U2 of the type ADG884BRMZ.
  • the operational amplifier A1 of the ADA4805-2ARMZ and the differential amplifier U3 of the type THS4531IDGK, the 5th pin and the 7th pin of the U2 are connected to the data signal output end of the TL-30DS, and the third lead of the U2
  • the pin is connected to the fifth pin of the U1 through a resistor R20 and a resistor R21 connected in series, and the ninth pin of the U2 is connected to the third pin of the U1 through a resistor R6 and a resistor R7 connected in series, the U1
  • the second pin is grounded through a resistor R3, and the sixth pin of the U1 is grounded through a resistor R22.
  • the first pin of the U1 passes through a series resistor R4, a resistor R5, and a resistor R8 to the eighth lead of the U3.
  • the seventh pin of the U1 is connected to the first pin of the U3 through a resistor R18, a resistor R19 and a resistor R15 connected in series, and the fourth pin of the U3 passes through the resistor R16 and the AD conversion circuit.
  • the fifth pin of the U3 is connected to the AD conversion circuit through a resistor R11.
  • the network label ADC_SIGAL_P and the network label ADC_SIGAL_N represent two ports connected to the AD conversion circuit; the network label GIG_IN_P and the network label GIG_IN_N represent two ports connected to the hydrophone TL-30DS.
  • the AD conversion circuit 53 includes an analog-to-digital converter of the type ADS1263IPW.
  • the clock module 54 includes an oven controlled crystal oscillator OCXO
  • the DA conversion circuit 55 includes a digital-to-analog converter of the type AD5331.
  • the storage module 58 includes an SDIO interface circuit and an SD card, and the ARM processor 57 is connected to the SD card through the SDIO interface circuit.
  • the battery compartment 1 includes eight battery packs, each of which is composed of a double-section ER34615M battery.
  • the battery compartment 1 further includes a battery charge and discharge management module, a microcontroller and a display.
  • the input end of the battery charge and discharge management module is connected to the battery pack, and the output end of the battery charge and discharge management module and the input end of the microcontroller Connected, the display is connected to the output of the microcontroller; the battery charge and discharge management module is used to detect the voltage and current of the battery pack in real time, and send the detected voltage and current of the battery pack to the microcontroller, and the microcontroller will The voltage and current of the received battery pack are displayed through the display.
  • the invention provides a novel submersible data acquisition system, comprising a battery compartment 1, a main control processor 2, a GPS receiver 3, a Gigabit Ethernet interface module 4 and at least one data acquisition board, and the battery compartment 1 is used for each purpose.
  • the electric module is powered, and each data acquisition board is connected to the main control processor 2, and the hydrophone 51 of each data acquisition board is used for detecting the acoustic signal in real time, and the detected analog acoustic signal is passed through the front end drive circuit 52.
  • the AD conversion circuit 53 After being amplified, it is input to the AD conversion circuit 53, converted into a digital acoustic wave signal by the AD conversion circuit 53, and then input to the FPGA 56, and then transmitted to the ARM processor 57 by the FPGA 56, and stored by the ARM processor 57 into the storage module 58, completing each The data acquisition board acquisition process; and the ARM processor 57 of each data acquisition board can also send the received digital sound wave signal to the main control processor 2, and the main control processor 2 transmits through the Gigabit Ethernet interface module 4. To the host computer 6, the host computer 6 monitors each data acquisition board according to the received digital sound wave signal to ensure that each data acquisition board works normally.
  • the present invention converts the collected analog sound wave signal into a digital sound wave signal and saves it to the SD card, thereby avoiding the loss of the collected data; and transmitting the digital collected data to the host computer 6 through the Gigabit Ethernet interface module 4,
  • the attenuation and interference of the collected data are reduced, and the acquisition performance of the submarine data acquisition system is improved; in addition, the GPS receiver 3 is used to provide high-precision timing information, and the timing information is sent to the main control processor 2, by the main The control processor 2 is finally sent to the FPGA 56 of each data acquisition board.
  • the FPGA 56 of each data acquisition board sets the output voltage of the DA conversion circuit 55 according to the clock module 54 and the received timing information, thereby adjusting the oscillation frequency of the clock module.
  • the synchronous trigger input and synchronous trigger output of each data acquisition board are realized, that is, the synchronous acquisition and control of the entire submarine data acquisition system is realized.

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  • Physics & Mathematics (AREA)
  • Remote Sensing (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Environmental & Geological Engineering (AREA)
  • General Life Sciences & Earth Sciences (AREA)
  • Geology (AREA)
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  • Acoustics & Sound (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Hydrology & Water Resources (AREA)
  • Oceanography (AREA)
  • Position Fixing By Use Of Radio Waves (AREA)
  • Measurement Of Velocity Or Position Using Acoustic Or Ultrasonic Waves (AREA)
  • Testing Or Calibration Of Command Recording Devices (AREA)
  • Geophysics And Detection Of Objects (AREA)

Abstract

一种新型潜标数据采集***,包括:电池仓(1)、主控处理器(2)、GPS接收机(3)、千兆以太网接口模块(4)和多个数据采集板;GPS接收机(3)与主控处理器(2)连接,主控处理器(2)通过千兆以太网接口模块(4)与上位机(6)连接;数据采集板包括水听传感器(51)、前端驱动电路(52)、AD转换电路(53)、时钟模块(54)、DA转换电路(55)、FPGA(56)、ARM处理器(57)和存储模块(58),水听传感器(51)通过前端驱动电路(52)与AD转换电路(53)连接,AD转换电路(53)与FPGA(56)连接,FPGA(56)与ARM处理器(57)相接,存储模块(58)与ARM处理器(57)连接,DA转换电路(55)与FPGA(56)和时钟模块(54)连接,时钟模块(54)与FPGA(56)连接,ARM处理器(57)与主控处理器(2)相接。提高了潜标数据采集***的采集性能,实现了整个***的同步采集和控制。

Description

一种新型潜标数据采集***
本申请要求于2017年6月27日提交中国专利局、申请号为201710500438.X、发明名称为“一种新型潜标数据采集***”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
技术领域
本发明涉及数据采集技术领域,特别涉及一种新型潜标数据采集***。
背景技术
潜标技术是六十年代由一些海洋发达国家开始使用并发展起来的,潜标***是海洋环境调查的重要技术装备,具有在恶劣的海洋环境条件下,无人值守的长期、连续、同步、自动地对海洋水文、气象诸要素进行全面综合监测的特点,是海洋观测岸站、调查船和调查飞机在空间上和时间上的延伸扩展,是离岸监测的重要手段。现有的潜标***通常采用多个水听器串并联的方式提高接收模拟信号的能量,其中,水听器包括水听传感器,水听传感器用于接收海洋中的声信号,并将接收的模拟声信号经过前置电路进行放大后通过几米甚至上百米的拖缆传输至上位机,由上位机进行模数转换后做进一步处理。这样,长距离拖缆会对模拟声信号造成衰减和干扰,从而导致潜标***的采集性能降低。
发明内容
有鉴于此,本发明提供一种新型潜标数据采集***,其降低了对采集数据的衰减和干扰,提高了潜标数据采集***的采集性能;且实现了整个潜标数据采集***的同步采集和控制。
本发明通过以下技术手段解决上述问题:
本发明的一种新型潜标数据采集***,包括:电池仓、主控处理器、GPS接收机、千兆以太网接口模块和至少一个数据采集板;所述电池仓用于为各用电模块进行供电,所述GPS接收机与所述主控处理器的输入端连接,所述千兆以太网接口模块的输入端与所述主控处理器的输入端连 接,所述千兆以太网接口模块的输出端通过总线与上位机连接;所述数据采集板包括水听传感器、前端驱动电路、AD转换电路、时钟模块、DA转换电路、FPGA、ARM处理器和存储模块,所述水听传感器的输出端通过所述前端驱动电路与所述AD转换电路的输入端连接,所述AD转换电路的输出端与所述FPGA的输入端连接,所述FPGA与所述ARM处理器相接,所述存储模块与所述ARM处理器的输出端连接,所述DA转换电路的输入端与所述FPGA的输出端连接,所述DA转换电路的输出端与所述时钟模块的输入端连接,所述时钟模块的输出端与所述FPGA的输入端连接,所述ARM处理器与所述主控处理器相接。
进一步,所述主控处理器包括芯片XC7Z020-2CLG400I。
进一步,所述GPS接收机包括LassenLPGPS时间接收器。
进一步,所述千兆以太网接口模块包括芯片88E1340S。
进一步,所述FPGA的型号为ALG1000,所述ARM处理器采用STM32F207系列的ARM芯片。
进一步,所述水听传感器的型号为TL-30DS。
进一步,所述AD转换电路包括型号为ADS1263IPW的模数转换器。
进一步,所述时钟模块包括恒温晶体振荡器OCXO,所述DA转换电路包括型号为AD5331的数模转换器。
进一步,所述存储模块包括SDIO接口电路和SD卡,所述ARM处理器通过所述SDIO接口电路与所述SD卡连接。
进一步,所述电池仓包括八组电池组,每组所述电池组均由双节ER34615M电芯组成。
本发明的一种新型潜标数据采集***具有以下有益效果:
本发明提供了一种新型潜标数据采集***,包括电池仓、主控处理器、GPS接收机、千兆以太网接口模块和至少一个数据采集板,采用电池仓为各用电模块进行供电,每个数据采集板均与主控处理器连接,每个数据采集板的水听传感器用于实时检测声波信号,并将检测到的模拟声波信号通过前端驱动电路进行放大后输入至AD转换电路,由AD转换电路转换为数字声波信号后输入至FPGA,再由FPGA传输至ARM处理器,由ARM处理器存储至存储模块中,完成了每个数据采集板的采集过程;且 每个数据采集板的ARM处理器还可将接收到的数字声波信号发送至主控处理器,由主控处理器通过千兆以太网接口模块传输至上位机,使得上位机根据接收到的数字声波信号对各数据采集板进行监控,确保各数据采集板正常工作。由此可知,本发明是将采集到的模拟声波信号转换为数字声波信号后就近保存至SD卡,避免采集数据丢失;还将数字采集数据通过千兆以太网接口模块传输至上位机,降低了对采集数据的衰减和干扰,提高了潜标数据采集***的采集性能;另外,GPS接收机用于提供高精度的授时信息,并将授时信息发送至主控处理器,由主控处理器最终发送至每个数据采集板的FPGA,每个数据采集板的FPGA根据时钟模块和接收到的授时信息设置DA转换电路的输出电压,从而调整时钟模块的振荡频率,达到对时钟校准的目的,实现了每个数据采集板的同步触发输入和同步触发输出,即实现了整个潜标数据采集***的同步采集和控制。
说明书附图
为了更清楚地说明本发明实施例或现有技术中的技术方案,下面将对实施例中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动性的前提下,还可以根据这些附图获得其他的附图。
图1为本发明的一种新型潜标数据采集***的电路原理框图;
图2为本发明的一种前端驱动电路的电路图。
具体实施方式
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
为使本发明的上述目的、特征和优点能够更加明显易懂,下面结合附图和具体实施方式对本发明作进一步详细的说明。
如图1所示:本实施例的一种新型潜标数据采集***包括:电池仓1、主控处理器2、GPS接收机3、千兆以太网接口模块4和至少一个数据采集板;所述电池仓1用于为各用电模块进行供电,所述GPS接收机3与 所述主控处理器2的输入端连接,所述千兆以太网接口模块4的输入端与所述主控处理器2的输入端连接,所述千兆以太网接口模块4的输出端通过总线与上位机6连接。
所述数据采集板包括水听传感器51、前端驱动电路52、AD转换电路53、时钟模块54、DA转换电路55、FPGA56、ARM处理器57和存储模块58,所述水听传感器51的输出端通过所述前端驱动电路52与所述AD转换电路53的输入端连接,所述AD转换电路53的输出端与所述FPGA56的输入端连接,所述FPGA56与所述ARM处理器57相接,所述存储模块58与所述ARM处理器57的输出端连接,所述DA转换电路55的输入端与所述FPGA56的输出端连接,所述DA转换电路55的输出端与所述时钟模块54的输入端连接,所述时钟模块54的输出端与所述FPGA56的输入端连接,所述ARM处理器57与所述主控处理器2相接。
需要说明的是,优选的,数据采集板的数量为四个,如图1所示,分别为第一数据采集板5-1、第二数据采集板5-2、第三数据采集板5-3和第四数据采集板5-4,且每个数据采集板的ARM处理器57均与主控处理器2相接,图1中仅对第一数据采集板5-1内部的各模块进行了附图标记。
本实施例中,所述主控处理器2包括芯片XC7Z020-2CLG400I。
本实施例中,所述GPS接收机3包括LassenLPGPS时间接收器。
本实施例中,所述千兆以太网接口模块4包括芯片88E1340S。
本实施例中,所述FPGA56的型号为ALG1000,所述ARM处理器57采用STM32F207系列的ARM芯片。
本实施例中,所述水听传感器51的型号为TL-30DS。
需要说明的是,本发明对前端驱动电路的具体电路不做限制,可以为现有技术中对应的驱动电路,例如,如图2所示,前端驱动电路52包括型号为ADG884BRMZ模拟开关U2、型号为ADA4805-2ARMZ的运算放大器U1和型号为THS4531IDGK的差分放大器U3,所述U2的第5引脚和第7引脚与所述TL-30DS的数据信号输出端连接,所述U2的第3引脚通过串联的电阻R20和电阻R21与所述U1的第5引脚连接,所述U2的第9引脚通过串联的电阻R6和电阻R7与所述U1的第3引脚连接,所述U1的第2引脚通过电阻R3接地,所述U1的第6引脚通过电阻R22 接地,所述U1的第1引脚通过串联的电阻R4、电阻R5和电阻R8与所述U3的第8引脚连接,所述U1的第7引脚通过串联的电阻R18、电阻R19和电阻R15与所述U3的第1引脚连接,所述U3的第4引脚通过电阻R16与所述AD转换电路连接,所述U3的第5引脚通过电阻R11与所述AD转换电路连接。
其中,网络标号ADC_SIGAL_P和网络标号ADC_SIGAL_N表示与AD转换电路连接的两个端口;网络标号GIG_IN_P和网络标号GIG_IN_N表示与水听传感器TL-30DS连接的两个端口。
本实施例中,所述AD转换电路53包括型号为ADS1263IPW的模数转换器。
本实施例中,所述时钟模块54包括恒温晶体振荡器OCXO,所述DA转换电路55包括型号为AD5331的数模转换器。
本实施例中,所述存储模块58包括SDIO接口电路和SD卡,所述ARM处理器57通过所述SDIO接口电路与所述SD卡连接。
具体的,SDIO接口电路与ARM处理器57及SD卡的具体电路连接均为现有技术,在此不再赘述。
本实施例中,所述电池仓1包括八组电池组,每组所述电池组均由双节ER34615M电芯组成。
需要说明的是,电池仓1还包括电池充放电管理模块、微控制器和显示器,电池充放电管理模块的输入端与电池组连接,电池充放电管理模块的输出端与微控制器的输入端连接,显示器与微控制器的输出端连接;电池充放电管理模块用于实时检测电池组的电压和电流,并将检测到的电池组的电压和电流发送至微控制器,微控制器再将接收到的电池组的电压和电流通过显示器进行显示。
本发明提供了一种新型潜标数据采集***,包括电池仓1、主控处理器2、GPS接收机3、千兆以太网接口模块4和至少一个数据采集板,采用电池仓1为各用电模块进行供电,每个数据采集板均与主控处理器2连接,每个数据采集板的水听传感器51用于实时检测声波信号,并将检测到的模拟声波信号通过前端驱动电路52进行放大后输入至AD转换电路53,由AD转换电路53转换为数字声波信号后输入至FPGA56,再由 FPGA56传输至ARM处理器57,由ARM处理器57存储至存储模块58中,完成了每个数据采集板的采集过程;且每个数据采集板的ARM处理器57还可将接收到的数字声波信号发送至主控处理器2,由主控处理器2通过千兆以太网接口模块4传输至上位机6,使得上位机6根据接收到的数字声波信号对各数据采集板进行监控,确保各数据采集板正常工作。由此可知,本发明是将采集到的模拟声波信号转换为数字声波信号后就近保存至SD卡,避免采集数据丢失;还将数字采集数据通过千兆以太网接口模块4传输至上位机6,降低了对采集数据的衰减和干扰,提高了潜标数据采集***的采集性能;另外,GPS接收机3用于提供高精度的授时信息,并将授时信息发送至主控处理器2,由主控处理器2最终发送至每个数据采集板的FPGA56,每个数据采集板的FPGA56根据时钟模块54和接收到的授时信息设置DA转换电路55的输出电压,从而调整时钟模块的振荡频率,达到对时钟校准的目的,实现了每个数据采集板的同步触发输入和同步触发输出,即实现了整个潜标数据采集***的同步采集和控制。
以上实施例的说明只是用于帮助理解本发明的方法及其核心思想。应当指出,对于本技术领域的普通技术人员来说,在不脱离本发明原理的前提下,还可以对本发明进行若干改进和修饰,这些改进和修饰也落入本发明权利要求的保护范围内。对这些实施例的多种修改对本领域的专业技术人员来说是显而易见的,本文中所定义的一般原理可以在不脱离本发明的精神或范围的情况下在其它实施例中实现。因此,本发明将不会被限制于本文所示的这些实施例,而是要符合与本文所公开的原理和新颖特点相一致的最宽的范围。

Claims (10)

  1. 一种新型潜标数据采集***,其特征在于:包括:电池仓、主控处理器、GPS接收机、千兆以太网接口模块和至少一个数据采集板;所述电池仓用于为各用电模块进行供电,所述GPS接收机与所述主控处理器的输入端连接,所述千兆以太网接口模块的输入端与所述主控处理器的输入端连接,所述千兆以太网接口模块的输出端通过总线与上位机连接;
    所述数据采集板包括水听传感器、前端驱动电路、AD转换电路、时钟模块、DA转换电路、FPGA、ARM处理器和存储模块,所述水听传感器的输出端通过所述前端驱动电路与所述AD转换电路的输入端连接,所述AD转换电路的输出端与所述FPGA的输入端连接,所述FPGA与所述ARM处理器相接,所述存储模块与所述ARM处理器的输出端连接,所述DA转换电路的输入端与所述FPGA的输出端连接,所述DA转换电路的输出端与所述时钟模块的输入端连接,所述时钟模块的输出端与所述FPGA的输入端连接,所述ARM处理器与所述主控处理器相接。
  2. 根据权利要求1所述的一种新型潜标数据采集***,其特征在于:所述主控处理器包括芯片XC7Z020-2CLG400I。
  3. 根据权利要求2所述的一种新型潜标数据采集***,其特征在于:所述GPS接收机包括Lassen LP GPS时间接收器。
  4. 根据权利要求3所述的一种新型潜标数据采集***,其特征在于:所述千兆以太网接口模块包括芯片88E1340S。
  5. 根据权利要求4所述的一种新型潜标数据采集***,其特征在于:所述FPGA的型号为ALG1000,所述ARM处理器采用STM32F207系列的ARM芯片。
  6. 根据权利要求5所述的一种新型潜标数据采集***,其特征在于:所述水听传感器的型号为TL-30DS。
  7. 根据权利要求6所述的一种新型潜标数据采集***,其特征在于:所述AD转换电路包括型号为ADS1263IPW的模数转换器。
  8. 根据权利要求7所述的一种新型潜标数据采集***,其特征在于:所述时钟模块包括恒温晶体振荡器OCXO,所述DA转换电路包括型号为AD5331的数模转换器。
  9. 根据权利要求8所述的一种新型潜标数据采集***,其特征在于: 所述存储模块包括SDIO接口电路和SD卡,所述ARM处理器通过所述SDIO接口电路与所述SD卡连接。
  10. 根据权利要求1-9任一项所述的一种新型潜标数据采集***,其特征在于:所述电池仓包括八组电池组,每组所述电池组均由双节ER34615M电芯组成。
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