WO2019001090A1 - 信息处理的方法、装置和通信设备 - Google Patents
信息处理的方法、装置和通信设备 Download PDFInfo
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- WO2019001090A1 WO2019001090A1 PCT/CN2018/082851 CN2018082851W WO2019001090A1 WO 2019001090 A1 WO2019001090 A1 WO 2019001090A1 CN 2018082851 W CN2018082851 W CN 2018082851W WO 2019001090 A1 WO2019001090 A1 WO 2019001090A1
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/033—Theoretical methods to calculate these checking codes
- H03M13/036—Heuristic code construction methods, i.e. code construction or code search based on using trial-and-error
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
- H03M13/1185—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
- H03M13/1188—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal wherein in the part with the double-diagonal at least one column has an odd column weight equal or greater than three
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
Definitions
- decoding the input sequence using the LDPC matrix includes: decoding the input sequence using the LDPC matrix corresponding to the spreading factor Z; or the LDPC matrix corresponding to the spreading factor Z undergoes row/column conversion, using the row/ The matrix after the column transformation encodes the input sequence to encode the input sequence.
- the row/column transformation in this application refers to a row transformation, a column transformation, or a row transformation and a column transformation.
- the base map of the LDPC matrix is stored in a memory, and offset values of non-zero elements in the base matrix of the LDPC matrix may be stored in the memory.
- 3b-4 is a schematic diagram of another base matrix according to an embodiment of the present invention.
- the structure of other parts of the base matrix of the LDPC code is not limited.
- any of the structures shown in FIG. 3b-1 to FIG. 3b-8 may be employed, and other matrix designs may be employed.
- the base matrix may include the 0th to 6th rows and the 0th to 16th columns in the matrix 3b-3, Alternatively, the base matrix includes the 0th to (m-1)th rows and the 0th to (n-1)th columns in the matrix shown in FIG. 3b-3, where 7 ⁇ m ⁇ 42, m is an integer, 17 ⁇ n ⁇ 52 , n is an integer; or, the base matrix includes the 0th to (m-1)th rows of the matrix shown in FIG. 3b-1 and the partial columns in the 0th to (n-1)th columns, where 7 ⁇ m ⁇ 42,m Is an integer, 17 ⁇ n ⁇ 52, and n is an integer.
- the base matrix may include the 0th to 6th rows and the 0th to 16th columns in the matrix 3b-8, or the base matrix Including the 0th to (m-1)th rows and the 0th to (n-1)th columns in the matrix shown in Fig. 3b-8, where 7 ⁇ m ⁇ 42, m is an integer, 17 ⁇ n ⁇ 52, n is an integer
- the base matrix includes the 0th to (m-1)th rows of the matrix shown in FIG. 3b-8 and the partial columns in the 0th to (n-1)th columns, where 7 ⁇ m ⁇ 42, m is an integer, 17 ⁇ n ⁇ 52, where n is an integer.
- the base map of 10a in FIG. 1 is a matrix of 7 rows and 10 columns, and the parameters involved can be represented by Table 2.
- the parameter "row weight" in Table 2, Table 3b-1 through Table 3b-8, and Table 3b-2' may also be omitted. You can know how many non-zero elements are in the row through a column with a non-zero element, so the row weight is known.
- Figure 5 shows the design of the process of processing data.
- the process of processing the data may be implemented by a communication device, which may be a base station, terminal or other entity, such as a communication chip, an encoder/decoder, and the like.
- the corresponding base matrix is determined according to the spreading factor Z, and the base matrix is replaced according to the spreading factor Z to obtain an LDPC matrix.
- c [c 0 , c 1 , c 2 , ..., c K-1 ] T
- 0 represents a column vector in which the values of all the elements are 0.
- the check bit w in the formula (1) is a transposition vector of a vector composed of bits in the check sequence w.
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Abstract
Description
Z | a=2 | a=3 | a=5 | a=7 | a=9 | a=11 | a=13 | a=15 |
j=0 | 2 | 3 | 5 | 7 | 9 | 11 | 13 | 15 |
j=1 | 4 | 6 | 10 | 14 | 18 | 22 | 26 | 30 |
j=2 | 8 | 12 | 20 | 28 | 36 | 44 | 52 | 60 |
j=3 | 16 | 24 | 40 | 56 | 72 | 88 | 104 | 120 |
j=4 | 32 | 48 | 80 | 112 | 144 | 176 | 208 | 240 |
j=5 | 64 | 96 | 160 | 224 | 288 | 352 | ||
j=6 | 128 | 192 | 320 | |||||
j=7 | 256 | 384 |
Claims (42)
- 一种编码方法,其特征在于,所述方法包括:基于低密度奇偶校验LDPC矩阵对输入序列进行编码;所述LDPC矩阵是基于扩展因子Z和基矩阵得到的,所述基矩阵包括:图3b-1至图3b-8所示矩阵中之一矩阵的第0至6行以及第0至16列,或者,所述基矩阵包括图3b-1至图3b-8所示矩阵中之一矩阵的第0至6行以及第0至16列中的部分列。
- 一种译码方法,其特征在于,所述方法包括:基于低密度奇偶校验LDPC矩阵对输入序列进行译码;所述LDPC矩阵是基于扩展因子Z和基矩阵得到的,所述基矩阵包括图3b-1至图3b-8所示矩阵中之一矩阵的第0至6行以及第0至16列,或者,所述基矩阵包括图3b-1至图3b-8所示矩阵中之一矩阵的的第0至6行以及第0至16列中的部分列。
- 根据权利要求1至2任一项所述的方法,其特征在于,所述扩展因子Z=a×2 j,0≤j<7,a∈{2,3,5,7,9,11,13,15},其中,若a=2,或者扩展因子Z取值为{2,4,8,16,32,64,128,256}中的一个时,基矩阵可以包括图3b-1至图3b-8中所示矩阵中的第0至6行以及第0至16列,或者,基矩阵包括图3b-1所示矩阵中的第0至(m-1)行以及第0至(n-1)列,其中7≤m≤42,m为整数,17≤n≤52,n为整数;或者,基矩阵包括图3b-1所示矩阵的第0至(m-1)行以及第0至(n-1)列中的部分列,其中7≤m≤42,m为整数,17≤n≤52,n为整数;若a=3,或者扩展因子Z取值为{3,6,12,24,48,96,192,384}中的一个时,基矩阵可以包括矩阵3b-2中的第0至6行以及第0至16列,或者,基矩阵包括图3b-2所示矩阵中的第0至(m-1)行以及第0至(n-1)列,其中7≤m≤42,m为整数,17≤n≤52,n为整数;或者,基矩阵包括图3b-2所示矩阵的第0至(m-1)行以及第0至(n-1)列中的部分列,其中7≤m≤42,m为整数,17≤n≤52,且n为整数;若a=5,或者扩展因子Z取值为{5,10,20,40,80,160,320}中的一个时,基矩阵可以包括矩阵3b-3中的第0至6行以及第0至16列,或者,基矩阵包括图3b-3所示矩阵中的第0至(m-1)行以及第0至(n-1)列,其中7≤m≤42,m为整数,17≤n≤52,n为整数;或者,基矩阵包括图3b-1所示矩阵的第0至(m-1)行以及第0至(n-1)列中的部分列,其中7≤m≤42,m为整数,17≤n≤52,n为整数;若a=7,或者扩展因子Z取值为{7,14,28,56,112,224}中的一个时,基矩阵可以包括矩阵3b-4中的第0至6行以及第0至16列,或者,基矩阵包括图3b-4所示矩阵中的第0至(m-1)行以及第0至(n-1)列,其中7≤m≤42,m为整数,17≤n≤52,n为整数;或者,基矩阵包括图3b-4所示矩阵的第0至(m-1)行以及第0至(n-1)列中的部分列,其中7≤m≤42,m为整数,17≤n≤52,n为整数;若a=9,或者扩展因子Z取值为{9,18,36,72,144,288}中的一个时,基矩阵可以包括矩阵3b-5中的第0至6行以及第0至16列,或者,基矩阵包括图3b-5所示矩阵中的第0至(m-1)行以及第0至(n-1)列,其中7≤m≤42,m为整数,17≤n≤52,n为整数;或者,基矩阵包括图3b-5所示矩阵的第0至(m-1)行以及第0至(n-1)列 中的部分列,其中7≤m≤42,m为整数,17≤n≤52,n为整数;若a=11,或者扩展因子Z取值为{11,22,44,88,176,352}中的一个时,基矩阵可以包括矩阵3b-6中的第0至6行以及第0至16列,或者,基矩阵包括图3b-6所示矩阵中的第0至(m-1)行以及第0至(n-1)列,其中7≤m≤42,m为整数,17≤n≤52,n为整数;或者,基矩阵包括图3b-6所示矩阵的第0至(m-1)行以及第0至(n-1)列中的部分列,其中7≤m≤42,m为整数,17≤n≤52,n为整数;若a=13,或者扩展因子Z取值为{13,26,52,104,208}中的一个时,基矩阵可以包括矩阵3b-7中的第0至6行以及第0至16列,或者,基矩阵包括图3b-7所示矩阵中的第0至(m-1)行以及第0至(n-1)列,其中7≤m≤42,m为整数,17≤n≤52,n为整数;或者,基矩阵包括图3b-7所示矩阵的第0至(m-1)行以及第0至(n-1)列中的部分列,其中7≤m≤42,m为整数,17≤n≤52,n为整数;或者若a=15,或者扩展因子Z取值为{15,30,60,120,240}中的一个时,基矩阵可以包括矩阵3b-8中的第0至6行以及第0至16列,或者,基矩阵包括图3b-8所示矩阵中的第0至(m-1)行以及第0至(n-1)列,其中7≤m≤42,m为整数,17≤n≤52,n为整数;或者,基矩阵包括图3b-8所示矩阵的第0至(m-1)行以及第0至(n-1)列中的部分列,其中7≤m≤42,m为整数,17≤n≤52,n为整数。
- 根据权利要求1至3任一项所述的方法,其特征在于,所述LDPC矩阵是基于所述扩展因子Z,和对所述基矩阵进行补偿后的矩阵Hs得到的,其中,所述矩阵Hs是对所述基矩阵中至少一列s中大于或等于0的各偏移值增加或减少补偿值Offset s得到的,其中,所述补偿值Offset s为大于或等于0的整数,其中S为大于等于0,且小于11的整数。
- 根据权利要求1至4任一项所述的方法,其特征在于,所述LDPC矩阵是基于所述扩展因子Z,和所述基矩阵或者基矩阵的补偿矩阵Hs经过行交换、或者列交换、或者行交换和列交换后的矩阵得到的。
- 一种编码方法,其特征在于,所述方法包括:根据扩展因子Z和低密度奇偶校验LDPC矩阵的参数对输入序列进行编码;其中,所述LDPC矩阵的参数包括表2、表3b-1至表3b-8任一所示表中行号为0至6所对应的参数。
- 一种译码方法,其特征在于,所述方法包括:根据扩展因子Z和低密度奇偶校验LDPC矩阵的参数对输入序列进行译码;其中,所述LDPC矩阵的参数包括表2、表3b-1至表3b-8任一所示表中行号为0至6所对应的参数。
- 根据权利要求6或7所述的方法,其特征在于,所述LDPC矩阵的参数还包括所述表2、表3b-1至表3b-8任一所示表中行号为7至41行对应的参数。
- 根据权利要求6至8任一项所述的方法,其特征在于,所述扩展因子Z=a×2 j, 0≤j<7,a∈{2,3,5,7,9,11,13,15},其中,a=2,所述LDPC矩阵的参数包括表2或者表3b-1中行号为0至6行所对应的参数;或者,a=3,所述LDPC矩阵的参数包括表2或者表3b-2中行号为0至6行所对应的参数;或者,a=5,所述LDPC矩阵的参数包括表2或者表3b-3中行号为0至6行所对应的参数;或者,a=7,所述LDPC矩阵的参数包括表2或者表3b-4中行号为0至6行所对应的参数;或者,a=9,所述LDPC矩阵的参数包括表2或者表3b-5中行号为0至6行所对应的参数;或者,a=11,所述LDPC矩阵的参数包括表2或者表3b-6中行号为0至6行所对应的参数;或者,a=13,所述LDPC矩阵的参数包括表2或者表3b-7中行号为0至6行所对应的参数;或者,a=15,所述LDPC矩阵的参数包括表2或者表3b-8中行号为0至6行所对应的参数。
- 根据权利要求9所述的方法,其特征在于,a=2,所述LDPC矩阵的参数包括表2或者表3b-1中行号为7至41行所对应的参数;或者,a=3,所述LDPC矩阵的参数包括表2或者表3b-2中行号为7至41行所对应的参数;或者,a=5,所述LDPC矩阵的参数包括表2或者表3b-3中行号为7至41行所对应的参数;或者,a=7,所述LDPC矩阵的参数包括表2或者表3b-4中行号为7至41行所对应的参数;或者,a=9,所述LDPC矩阵的参数包括表2或者表3b-5中行号为7至41行所对应的参数;或者,a=11,所述LDPC矩阵的参数包括表2或者表3b-6中行号为7至41行所对应的参数;或者,a=13,所述LDPC矩阵的参数包括表2或者表3b-7中行号为7至41行所对应的参数;或者,a=15,所述LDPC矩阵的参数包括表2或者表3b-8中行号为7至41行所对应的参数。
- 根据权利要求6至10任一项所述的方法,其特征在于,所述根据扩展因子Z和低密度奇偶校验LDPC矩阵的参数对输入序列进行编码/译码,包括:根据扩展因子Z和对所述LDPC矩阵的参数进行补偿后的参数对输入序列进行编码/译码;所述补偿后的参数,包括:所述LDPC矩阵的参数中至少一个列位置s上的大于或等于0的偏移值增加或减少补偿值Offset s,其中,所述补偿值Offset s为大于或等于0的整数,其中s为大于等于0,且小于11的整数。
- 一种信息处理方法,包括:对输入序列c={c 0,c 1,c 2,...,c K-1}进行编码得到输出序列d={d 0,d 1,d 2,...,d N-1},其中K和N为大于0的整数;所述输出序列d包括所述输入序列c中K 0个比特和校验序列w中的校验比特,K 0为整数,且0<K 0≤K;H为低密度奇偶校验LDPC矩阵,所述H的基图包括H BG和H BG,EXT,其中 表示m c×n c大小的全零矩阵, 表示n c×n c大小的单位矩阵,H BG包括H BG2中Kb列信息比特对应的列,以及H BG2中第10至10+m A-1列,H BG2列数为10+m A列,4≤m A≤7,其中Kb∈{6,8,9,10};其中m c=7,0≤n c≤35,H BG2的列数等于17,或者,m c=6,0≤n c≤36,H BG2的列数等于16,或者,m c=5,0≤n c≤37,H BG2的列数等于15,或者,m c=4,0≤n c≤38,H BG2的列数等于14。
- 根据权利要求12所述的方法,其特征在于,若所述H BG2各行中非零元素所在的列的位置如图表3a,3b-1至3b-8或者表3a,表3b-1至表3b-8,表3b-2’任一个所示。
- 如权利要求12至15任一项所述的方法,其特征在于校验序列w的长度为N+2Z-K,或者校验序列的长度为N-K。
- 根据权利要求17所述的方法,其特征在于,所述基于低密度奇偶校验LDPC 矩阵H对输入序列c进行编码,包括:对输入序列c={c 0,c 1,c 2,...,c K-1}进行编码得到输出序列d={d 0,d 1,d 2,...,d N-1},其中,K和N均为正整数,K是Z的整数倍,N=50Z。
- 根据权利要求18所述的方法,其特征在于所述Z为{5,10,20,40,80,160,320}中之一。
- 根据权利要求18或19所述的方法,其特征在于Z为满足K b·Z≥K的最小值,其中K b为{6,8,9,10}中之一。
- 根据权利要求22所述的方法,其特征在于,所述校验序列w的长度为N+2Z-K。
- 根据权利要求17至32任一项所述的方法,其特征在于,所述H的基矩阵为m行n列的矩阵,m≤42,n≤52。
- 根据权利要求17至33任一项所述的方法,其特征在于所述Z为{5,10,20,40, 80,160,320}中之一。
- 根据权利要求12至34任一项所述的方法,其特征在于K是Z的整数倍。
- 一种装置,用于执行如权利要求1至35项任一项所述的方法。
- 一种通信装置,其特征在于,所述通信装置包括处理器、存储器以及存储在存储器上并可在处理器上运行的指令,当所述指令被运行时,使得所述通信装置执行如权利要求1至35项任一项所述的方法。
- 一种终端,其特征在于,包括如权利要求36所述的装置或权利要求37所述的通信装置。
- 一种基站,其特征在于,包括如权利要求36所述的装置或权利要求37所述的通信装置。
- 一种通信***,其特征在于包括如权利要求38所述的终端以及如权利要求39所述的基站。
- 一种计算机可读存储介质,包括指令,当其在计算机上运行时,使得计算机执行如权利要求1至35任一项所述的方法。
- 一种计算机程序产品,当其在计算机上运行时,使得计算机执行权利要求1至35任一项所述的方法。
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BR112019027688A BR112019027688A8 (pt) | 2017-06-27 | 2018-04-12 | método de codificação, método de decodificação, aparelho, aparelho de comunicação, terminal, estação de base, sistema de comunicação, mídia de armazenamento legível por computador, e produto de programa de computador |
PL18825332T PL3567731T3 (pl) | 2017-06-27 | 2018-04-12 | Projektowanie quasi-cyklicznych kodów ldpc dla systemu komunikacji mobilnej 5g |
EP22150629.8A EP4064573B1 (en) | 2017-06-27 | 2018-04-12 | Decoding of quasi-cyclic ldpc codes for a 5g mobile communications system |
AU2018294981A AU2018294981B2 (en) | 2017-06-27 | 2018-04-12 | Information processing method, apparatus, and communication apparatus |
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EP18825332.2A EP3567731B1 (en) | 2017-06-27 | 2018-04-12 | Design of quasi-cyclic ldpc codes for a 5g mobile communications system |
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RU2020102671A RU2758968C2 (ru) | 2017-06-27 | 2018-04-12 | Аппаратура, способ обработки информации и аппаратура связи |
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ES18825332T ES2907089T3 (es) | 2017-06-27 | 2018-04-12 | Diseño de códigos ldpc cuasi-cíclicos para un sistema de comunicaciones móviles 5g |
JP2019571976A JP7143343B2 (ja) | 2017-06-27 | 2018-04-12 | 情報処理方法、装置、および通信装置 |
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BR112019027876-1A BR112019027876A2 (pt) | 2017-06-27 | 2018-06-27 | método de codificação, método de decodificação, codificador, decodificador, meio de armazenagem legível por computador, produto de programa de computador, e sistema e aparelho de comunicação |
US16/423,175 US10771092B2 (en) | 2017-06-27 | 2019-05-28 | Method and apparatus for low density parity check channel coding in wireless communication system |
US17/013,640 US11277153B2 (en) | 2017-06-27 | 2020-09-06 | Method and apparatus for low density parity check channel coding in wireless communication system |
US17/591,347 US11671116B2 (en) | 2017-06-27 | 2022-02-02 | Method and apparatus for low density parity check channel coding in wireless communication system |
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US18/305,982 US20230361787A1 (en) | 2017-06-27 | 2023-04-24 | Method and apparatus for low density parity check channel coding in wireless communication system |
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