WO2018205735A1 - Display panel manufacturing method, display panel manufacturing device, and display panel - Google Patents

Display panel manufacturing method, display panel manufacturing device, and display panel Download PDF

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Publication number
WO2018205735A1
WO2018205735A1 PCT/CN2018/078754 CN2018078754W WO2018205735A1 WO 2018205735 A1 WO2018205735 A1 WO 2018205735A1 CN 2018078754 W CN2018078754 W CN 2018078754W WO 2018205735 A1 WO2018205735 A1 WO 2018205735A1
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WO
WIPO (PCT)
Prior art keywords
semiconductor material
gate
droplets
substrate
display panel
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PCT/CN2018/078754
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French (fr)
Chinese (zh)
Inventor
冯翔
杨瑞智
刘莎
乔赟
孙晓
邱云
张强
杨照坤
王瑞勇
尤杨
Original Assignee
京东方科技集团股份有限公司
北京京东方显示技术有限公司
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Publication of WO2018205735A1 publication Critical patent/WO2018205735A1/en

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/10—Deposition of organic active material
    • H10K71/12—Deposition of organic active material using liquid deposition, e.g. spin coating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K19/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic element specially adapted for rectifying, amplifying, oscillating or switching, covered by group H10K10/00
    • H10K19/10—Integrated devices, or assemblies of multiple devices, comprising at least one organic element specially adapted for rectifying, amplifying, oscillating or switching, covered by group H10K10/00 comprising field-effect transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/20—Changing the shape of the active layer in the devices, e.g. patterning

Definitions

  • the present disclosure relates to the field of display technologies, and in particular, to a display panel manufacturing method, a manufacturing device of the display panel, and a display panel.
  • the display panel usually includes a plurality of thin film transistors (English: Thin Film Transistor; abbreviated as: TFT), and these TFTs can implement different functions in the display panel depending on the type of the display panel.
  • TFT may generally include a structure such as a gate, a semiconductor layer, and a source drain (source drain including source and drain).
  • a gate conductive pattern (including a gate electrode) and a gate insulating layer are first formed on a base substrate, and then a semiconductor layer pattern is formed on the base substrate on which the gate insulating layer is formed, and then formed therein. Other structures are formed on the base substrate of the active layer pattern.
  • the related art has at least the following problem: when the semiconductor layer pattern is made of an organic semiconductor material, if the semiconductor layer pattern is fabricated by a conventional patterning process, light is required in the patterning process. In the engraving, the photoresist may contaminate the organic semiconductor material and affect the performance of the semiconductor layer pattern.
  • Embodiments of the present disclosure provide a display panel manufacturing method, a manufacturing apparatus of the display panel, and a display panel.
  • the technical solution is as follows:
  • a display panel manufacturing method comprising:
  • the plurality of semiconductor material droplets are subjected to a curing treatment, and the plurality of semiconductor material droplets after the curing treatment form a semiconductor layer pattern.
  • the method before the forming a plurality of droplets of the semiconductor material on the substrate by the microfluidic technology, the method further includes:
  • the gate conductive pattern includes a plurality of gate lines, each of the plurality of gate lines including a plurality of gates, Providing a plurality of channels in a pool of semiconductor material solutions for providing droplets of said semiconductor material, one end of either of said channels being in communication with an interior of said pool of semiconductor material solution, and the other end being disposed in said plurality of gate lines a gate line includes a flow region of a gate, and a flow region of any one of the plurality of gate lines includes an orthographic projection area of the gate on the gate insulating layer;
  • Forming a plurality of droplets of semiconductor material on the substrate by microfluidic technology including:
  • the plurality of gate lines comprise gates arranged in rows and columns on the substrate.
  • the gate electrode included in the plurality of gate lines is used as a first electrowetting electrode, and the semiconductor material solution in the semiconductor material solution pool is controlled to flow to the substrate substrate on which the gate insulating layer is formed, and is formed therein Forming the plurality of semiconductor material droplets on the base substrate of the gate insulating layer, including:
  • a gate line of semiconductor material droplets is not disposed furthest from the specified gate line and in a flow region of the included gate.
  • the gates included in the plurality of gate lines are used as the first electrowetting electrodes, and the semiconductor material droplet groups are controlled to move to a plurality of flow regions of a gate included in the target gate lines.
  • the plurality of gate lines are arranged on the substrate substrate in a predetermined direction.
  • the specified gate line is any one of two gate lines located at two ends of the plurality of gate lines in the predetermined direction.
  • a second electrowetting electrode pattern is disposed between any two adjacent ones of the plurality of gate lines, and the second electrowetting electrode pattern is used to control droplet movement of the semiconductor material .
  • the second electrowetting electrode pattern is a wire grid polarization structure, and the second electrowetting electrode pattern functions as a polarizer.
  • any one of the plurality of gate lines includes an area of any one of the gate lines that is larger than an area of the predetermined gate line, and the predetermined gate line is located at any one of the gates A gate line in an orthographic projection on a grid line.
  • the method further includes:
  • a common electrode pattern is formed on the base substrate on which the insulating layer is formed, and the common electrode pattern and the second electrowetting electrode constitute a touch electrode.
  • the curing process of the plurality of semiconductor material droplets includes:
  • the substrate substrate on which the plurality of semiconductor material droplets are formed is heated to cure the plurality of semiconductor material droplets.
  • the material of the semiconductor material droplet comprises an organic semiconductor material, or the material of the semiconductor material droplet comprises a mixture of the organic semiconductor material and a polymer polymer material, the organic semiconductor material comprising a small molecule Semiconductor materials and polymer semiconductor materials.
  • a manufacturing apparatus of a display panel for manufacturing a display panel using the method provided by the first aspect comprising:
  • control circuit being electrically connected to the semiconductor material solution pool
  • the control circuit is configured to control a semiconductor material solution in the semiconductor material solution pool to form a plurality of semiconductor material droplets on a base substrate of the display panel by a microfluidic technology, and cure the processed plurality of semiconductors
  • the material droplets are semiconductor layer patterns.
  • the substrate substrate is sequentially provided with a gate conductive pattern and a gate insulating layer, wherein the plurality of semiconductor material droplets are disposed on the base substrate provided with the gate insulating layer, and the gate conductive pattern comprises Multiple grid lines,
  • the control circuit is respectively connected to the plurality of gate lines.
  • the display panel is provided with an array substrate row driving circuit
  • the control circuit is disposed in the array substrate row driving circuit.
  • a display panel comprising the display panel manufactured by the method provided by the first aspect.
  • FIG. 1 is a schematic view of the principle of electrowetting in an embodiment of the present disclosure
  • FIG. 2 is a flow chart showing a method of manufacturing a display panel according to an embodiment of the present disclosure
  • 3-1 is a flowchart of another method for manufacturing a display panel according to an embodiment of the present disclosure
  • FIG. 3-1 is a schematic structural view of a substrate in the embodiment shown in FIG. 3-1;
  • 3-3 is a schematic structural view of another substrate in the embodiment shown in FIG. 3-1;
  • FIG. 3-4 is a schematic structural view of another substrate in the embodiment shown in FIG. 3-1;
  • 3-5 are flow diagrams of forming a plurality of droplets of semiconductor material in an embodiment of the present disclosure
  • FIG. 3-1 is a schematic structural view of another substrate in the embodiment shown in FIG. 3-1;
  • 3-7 is a schematic view showing movement of a droplet of a semiconductor material in the embodiment shown in FIG. 3-1;
  • 3-8 are flow diagrams of controlling droplets of semiconductor material in an embodiment of the present disclosure.
  • 3-9 are schematic diagrams of voltages on an electrowetting electrode in an embodiment of the present disclosure.
  • FIG. 3-10 is a schematic structural view of another substrate in the embodiment shown in FIG. 3-1;
  • FIG. 3-11 are schematic structural views of another substrate in the embodiment shown in FIG. 3-1;
  • FIG. 4 is a schematic structural diagram of a manufacturing apparatus of a display panel according to an embodiment of the present disclosure.
  • Embodiments of the present disclosure provide a display panel manufacturing method using electrowetting (Electrowetting) principle, as shown in FIG. 1 , which is a principle for controlling droplet movement of a semiconductor material by an electrowetting principle in the embodiment of the present disclosure.
  • FIG. 1 is a principle for controlling droplet movement of a semiconductor material by an electrowetting principle in the embodiment of the present disclosure.
  • schematic diagram. The electrowetting electrode 02 and the insulating layer 03 are sequentially formed on the substrate layer 01, and the electrowetting electrode 02 includes an electrode 021, an electrode 022, and an electrode 023.
  • a droplet 04 may be disposed on the insulating layer 03.
  • the voltage on the electrode 022 is larger than the voltage on the electrode 021, and there is an electric field passing through the droplet 04 between the electrode 022 and the electrode 021, which makes the electrode 022
  • the contact angle of the upper portion of the droplet with the insulating layer 03 becomes smaller, and the contact angle of the portion of the droplet above the electrode 021 with the insulating layer 03 does not change, and the inside of the droplet 04 generates a horizontal pressure. Poor, driving the droplet 04 to move in the direction of the electrode 022.
  • the voltages of the adjacent two electrodes can then be alternately shifted to drive the continuous movement of the droplets 04.
  • the electrode of Figure 1 may correspond to the gate of the present disclosure, and the droplet may correspond to a droplet of semiconductor material in the present disclosure.
  • the display panel manufacturing method can include the following steps:
  • Step 201 Form a plurality of droplets of semiconductor material on the substrate by microfluidic technology.
  • Step 202 Perform curing treatment on a plurality of droplets of the semiconductor material, and form a semiconductor layer pattern by the plurality of droplets of the semiconductor material after the curing.
  • the display panel manufacturing method provided by the embodiment of the present disclosure may further include steps for manufacturing other structures of the display panel. These steps may refer to related technologies, and the embodiments of the present disclosure are not limited.
  • the display panel manufacturing method provided by the embodiment of the present disclosure forms a semiconductor layer pattern on a substrate by using a microfluidic technology, without using a photoresist.
  • the semiconductor layer pattern is made of an organic semiconductor material
  • the photoresist may contaminate the organic semiconductor material due to the use of the photoresist in the patterning process.
  • the problem of the performance of the semiconductor layer pattern achieves the effect that various semiconductor materials can be used to form the semiconductor layer pattern.
  • 3-1 is a flowchart of another method of manufacturing a display panel according to an embodiment of the present disclosure, which may be applied to a manufacturing apparatus of the display panel shown in FIG. 4.
  • the display panel manufacturing method can include the following steps:
  • Step 301 sequentially forming a gate conductive pattern and a gate insulating layer on the base substrate.
  • the gate conductive pattern and the gate insulating layer may be sequentially formed on the substrate.
  • the gate conductive pattern may include a plurality of gate lines, each of the plurality of gate lines includes a plurality of gates, and the semiconductor material solution pool for providing droplets of the semiconductor material may be provided with a plurality of channels.
  • One end of any of the plurality of channels is in communication with the interior of the semiconductor material solution pool, and the other end is disposed in a flow region of a gate included in a specified gate line of the plurality of gate lines (English: fluid place), a plurality of The flow region of any of the gate lines included in the gate line is an orthographic projection area of the gate on the gate insulating layer.
  • the designated gate line may be any one of the plurality of gate lines, or may be a gate line configured according to a preset rule.
  • the designated gate line may be any one of two gate lines located at two ends of the plurality of gate lines in a preset direction.
  • the specified gate line is located at two ends of the plurality of gate lines, the other end of the channel can be easily disposed in the flow region on the designated gate line, which reduces the process difficulty.
  • the arrangement direction of the plurality of gate lines and the length direction of the gate lines are two different concepts, and the plurality of gate lines may be arranged in parallel.
  • the arrangement direction of the plurality of gate lines may refer to the length direction of the line of the center of each of the gate lines, and the arrangement direction is not parallel to the length direction of each of the gate lines.
  • any one of the plurality of gate lines includes an area of any one of the gate lines that is larger than an area of the preset gate line, and the preset gate line is positive of the gate line on the any gate line.
  • the gate line in the projection may be equal to the area of the orthographic projection of the gate on the gate insulating layer, and the area of the gate line may refer to the area of the orthographic projection of the gate line on the gate insulating layer.
  • the orthographic projection of the gate on the gate line may refer to the projection of the gate on the gate line in a direction perpendicular to the substrate substrate.
  • the structure of the base substrate can be as shown in FIG. 3-2, and the gate conductive pattern 12 and the gate insulating layer 13 are sequentially formed on the base substrate 11.
  • the gate insulating layer 13 is in FIG. 3-2.
  • the middle is shown in a transparent state, but this is not a limitation of the gate insulating layer 13
  • the plurality of gate lines 121, 122, and 123 in the gate conductive pattern 12 are arranged along a predetermined direction A, and the specified gate line can be preset.
  • the semiconductor material solution cell 20 more easily places one end of the channel 21 in the flow region of the gate included in the specified gate line.
  • the region where the gate g is located (this region is the orthographic projection region of the gate g on the gate insulating layer 13) can be regarded as the flow region of the gate g.
  • One end of the channel 21 may be disposed in the semiconductor material solution pool 20, and the other end may be disposed in the flow region of the gate g.
  • the gate lines included in the plurality of gate lines are arranged in a row on the base substrate 11.
  • a lead 22 may also be disposed on the semiconductor material solution cell 20 for connection to a control circuit.
  • the gate line (121, 122 or 123) of any of the gate lines (121, 122 or 123) of FIG. 3-2 has an area larger than the area of the predetermined gate line 121a, and the predetermined gate line 121a is located at any gate of the gate.
  • a gate line in the orthographic projection on the line (the preset gate line 121a shown in FIG. 3-2 is a section of the gate line in the projection of the first gate g included on the leftmost side of the gate line 121 on the gate line 121 ). That is, the size of the gate is set larger than the gate line to enhance the control of the gate droplets of the semiconductor material to avoid uncontrolled flow of the droplets of semiconductor material.
  • a second electrowetting electrode pattern may be further included in the gate conductive pattern, and the second electrowetting electrode pattern may include a plurality of second electrowetting electrodes, and any one of the plurality of second electrowetting electrodes
  • the electrowetting electrode may be disposed between any two adjacent gate lines of the plurality of gate lines on the substrate. Since the distance between any two adjacent gate lines on the substrate may be relatively long, providing a second electrowetting electrode between any two adjacent gate lines can prevent the semiconductor material droplets from being uncontrolled. flow.
  • FIG. 3-3 it is a schematic structural diagram of a substrate provided with a second electrowetting electrode pattern 124 according to an embodiment of the present disclosure, and the second electrowetting electrode pattern 124 includes a second electrowetting. Electrodes 1241 and 1242. As can be seen from FIG. 3-3, the second electrowetting electrode 1241 disposed between the gate lines 121 and 122, and the second electrowetting electrode 1242 disposed between the gate lines 122 and 123, add direction A. The density of the electrodes used to control the droplets of semiconductor material is such that the control of droplets of semiconductor material is more stable.
  • Any of the electrowetting electrodes in FIG. 3-2 may include a lead region and an electrode region. The structure of the lead region may refer to a gate line (121, 122 or 123), and the structure of the electrode region may refer to the gate g and the electrode. The region can be placed between two adjacent gates in direction A.
  • the second electrowetting electrode pattern is a wire grid polarization structure, and the second electrowetting electrode pattern can function as a polarizer.
  • the second electrowetting electrode pattern plays the same role as the polarizer on the light exiting side in the related art, so that the polarizing plate is not required to be disposed on the light emitting side, which reduces the cost of the display panel.
  • FIG. 3-4 is a schematic structural diagram of another substrate provided with a second electrowetting electrode pattern 124 according to an embodiment of the present disclosure, wherein the second electrowetting electrode pattern 124 is a wire grid.
  • the polarization structure, the specific parameters of the wire grid polarization structure can refer to the polarizer in the related art.
  • the distance between adjacent two gate lines is about 80 micrometers, and the flow region (ie, the gate g is located)
  • the size of the region may be 4 micrometers by 5 micrometers, and the length of the flow region in the direction A (direction A, that is, the arrangement direction of the gate lines) is 4 micrometers, and the length in the direction perpendicular to the direction A is 5 micrometers.
  • the width of a "line” in the wire grid polarization structure is 250 nm, and the distance between the "line” and the "line” is also 250 nm, and 160 lines can be set between the adjacent two gate lines.
  • an adjacent electrode (the adjacent 8 lines in the direction A is exactly 4 microns in length) can prepare an electrode equal in size to the gate (ie, two gates adjacent in the direction A).
  • a plurality of electrodes are disposed between them, only one of which is exemplarily shown in FIGS. 3-4, but is not a limitation on the number of electrodes) for controlling the flow of droplets of semiconductor material.
  • Figure 3-4 refer to Figure 3-3, and details are not described herein.
  • Step 302 using a gate electrode included in the plurality of gate lines as the first electrowetting electrode, controlling the semiconductor material solution in the semiconductor material solution pool to flow to the base substrate formed with the gate insulating layer, and forming the lining formed with the gate insulating layer A plurality of droplets of semiconductor material are formed on the base substrate.
  • the photoresist may not be used, and thus the semiconductor material may be an organic semiconductor material, which avoids the photoresist in the related art when the patterning process is used to form the semiconductor layer pattern.
  • the problem of contamination of the semiconductor layer pattern of organic materials may also be avoided, while the problem of high cost of forming semiconductor layer patterns using inkjet printing techniques is also avoided.
  • the material of the droplet of the semiconductor material may comprise an organic semiconductor material, or the material of the droplet of the semiconductor material may comprise a mixture of the organic semiconductor material and the polymer polymer material, wherein the organic semiconductor material comprises a small molecule semiconductor material and a polymer semiconductor material.
  • the polymer polymer material may include polymethyl methacrylate (English: PMMA) and polystyrene (English: Polystyrene; abbreviation: PS).
  • Small molecule semiconductor materials may include: pentacene, PBTTT (English: poly(2,5-bis(3-alkylthiophene-2-yl)thieno[3,2-b]thiophene)), BTBT (English: 2,7) -Dioctyl[1]benzothieno[3,2-b][1]benzothiophene), DNNT (English: Dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene) and TES-ADT (English: 5,11-Bis(triethylsilylethynyl)anthradithiophene).
  • the polymer semiconductor material may include a polymer of 3-hexylthiophene and PBTTT (English: Poly(2,5-bis(3-hexadecyllthiophen-2-yl)thieno[3,2-b]thiophene)).
  • the solvent of the semiconductor material solution may use a solvent having a higher boiling point such as dichlorobenzene and trichlorobenzene.
  • this step can include the following two sub-steps:
  • Sub-step 3021 applying a voltage to the specified gate line, causing the semiconductor material solution in the semiconductor material solution pool to flow into the plurality of flow regions of the gate included in the specified gate line, and forming a group of semiconductor material droplets in the plurality of flow regions.
  • the semiconductor material solution cell corresponds to an electrowetting electrode, and after applying a voltage to the specified gate line, the semiconductor material solution in the semiconductor material solution pool flows into a plurality of flow regions of the gate included in the specified gate line.
  • the flow regions in the plurality of flow regions are in one-to-one correspondence with the droplets of semiconductor material in the group of semiconductor material droplets.
  • the structure of the base substrate can be as shown in FIG. 3-6, and a plurality of semiconductor material droplets Y are located in the flow regions of the plurality of gates g, and the flow regions are in one-to-one correspondence with the semiconductor material droplets Y.
  • 3-6 is an example in which the specified gate line is the gate line 121.
  • FIG. 3-3 For the meanings of other marks in FIG. 3-6, reference may be made to FIG. 3-3, and details are not described herein again.
  • Sub-step 3022 controlling the group of semiconductor material droplets to move to a plurality of flow regions of the gate included in the target gate line with the first electrowetting electrode and the second electrowetting electrode.
  • the gate line and the second electrowetting electrode can collectively act as an electrowetting electrode to control droplet movement of the semiconductor material.
  • the plurality of gate lines comprise a gate electrode as a first electrowetting electrode, and a direction in which the droplets of the semiconductor material move on the substrate substrate and a direction in which the gate lines are arranged on the substrate substrate are uniform, that is, an electrowetting
  • the droplets of semiconductor material in the flow region of the electrode may include the first electrowetting electrode and the second electrowetting electrode
  • the target gate line is the gate line that is farthest from the specified gate line and is not provided with the droplets of semiconductor material in the flow region of the included gate, so that the semiconductor material droplets can be prevented from blocking each other.
  • Embodiments of the present disclosure control droplets of semiconductor materials by microfluidics (Microfluidics) technology, which refers to the treatment or manipulation of microfluidics using microchannels (several tens to hundreds of microns in size).
  • a plurality of gate lines include an array of grids arranged in an array, and an array of electrowetting electrodes parallel to the arrangement direction of the plurality of gate lines can be considered as Micropipeline.
  • FIGS. 3-7 which is a schematic diagram of a plurality of flow regions of semiconductor material droplets moving to a target gate line, which is a schematic diagram for controlling droplets of semiconductor material on a substrate substrate as shown in FIGS. 3-6.
  • the specified gate line is 121
  • the semiconductor material droplet Y is located in the flow region of the gate included in the gate line 121, is farthest from the specified gate line 121 and is not set in the flow region of the included gate.
  • the target gate line having the droplets of semiconductor material is the gate line 123, as shown in FIGS. 3-7, at which time the droplets of semiconductor material Y can be controlled to move along the track S into the flow region of the gate included in the gate line 123.
  • Each of the gate lines (121, 122 or 123) and the second electrowetting electrodes (1241 and 1242) may be provided with a separate interface at the edge of the base substrate 11, the interface being used for connection with the control circuit 30, the control circuit 30 It may be constituted by a logic circuit for applying a voltage to the gate lines (121, 122 or 123) and the second electrowetting electrodes (1241 and 1242) to control the movement of the droplets of the semiconductor material. Control circuit 30 can also be electrically coupled to cell material solution cell 20 via leads 22.
  • the gate line connection control circuit may be an array substrate row driver (English: Gate Driver on Array; abbreviated as: GOA) circuit, and the second electrowetting electrode connection control circuit may also be a GOA circuit.
  • GOA Gate Driver on Array
  • Md can be a micropipe.
  • FIG. 3-7 The meanings of other marks in FIG. 3-7 can be referred to FIG. 3-6, and details are not described herein again.
  • this step can include the following substep:
  • Sub-step 30221 when a group of semiconductor material droplets in a plurality of flow regions of a gate included in the specified gate line moves out of a plurality of flow regions of a gate included in the specified gate line, applying a voltage to the specified gate line to control the semiconductor material
  • the solution of semiconductor material in the solution cell flows to a plurality of flow regions of the gate included in the specified gate line.
  • FIG. 3-9 shows the solution pool of the semiconductor material. 20.
  • the horizontal direction from left to right represents a time increase, and the period of the rectangular protrusion represents a period at a higher potential and the rectangle is not convex.
  • the representative is at a lower potential (the semiconductor material solution cell 20 is always at a lower potential, where the lower potential refers to a potential lower than the higher potential).
  • the structural schematic diagram of the base substrate can be as shown in FIGS. 3-10, and each of the gate lines includes a flow region of the gate formed with droplets of semiconductor material.
  • the meanings of other marks in FIG. 3-10 can be referred to FIG. 3-6, and details are not described herein again.
  • the pool of semiconductor material solutions can be separated from the substrate.
  • Step 303 heating a substrate substrate on which a plurality of droplets of semiconductor material are formed to cure a plurality of droplets of semiconductor material.
  • the heating temperature can be 80 degrees Celsius and the heating time can be 30 minutes.
  • the plurality of droplets of the semiconductor material after curing form a semiconductor layer pattern.
  • Step 304 forming an insulating layer on the base substrate on which the semiconductor layer pattern is formed.
  • Step 305 forming a common electrode pattern on the base substrate on which the insulating layer is formed, and the common electrode pattern and the second electrowetting electrode constitute the touch electrode.
  • the common electrode layer may be formed on the base substrate on which the insulating layer is formed, and then the common electrode pattern is formed by a patterning process.
  • the patterning process may include processes such as photoresist coating, exposure, development, etching, and photoresist stripping.
  • the structure of the base substrate can be as shown in FIG. 3-11, wherein the common electrode C is formed on the base substrate 11, and the common electrode C is made of a transparent conductive material, and the transparent conductive material may be indium oxide.
  • Tin International: Indium tin oxide; referred to as: ITO.
  • ITO Indium tin oxide
  • the common electrode C and the second electrowetting electrode (1241 and 1242) can form a mutual capacitive touch electrode to implement a touch function.
  • the touch function reference may be made to related technologies, and details are not described herein again.
  • the solution for forming the semiconductor layer is dropped on the substrate, and then the substrate is rotated to spread the solution on the substrate and dried to form a semiconductor layer (
  • the process of forming the semiconductor layer is referred to as a spin coating process, and then the semiconductor layer is processed by a patterning process to form a semiconductor layer pattern.
  • the spin coating process the linear velocities of different regions of the substrate substrate are different, and the formation speeds of the semiconductor layers in different regions are also different, which may result in different thicknesses of the semiconductor layers in different regions of the substrate substrate. Further, the thickness of the semiconductor layer pattern in different regions is also different, which affects the quality of the semiconductor layer pattern.
  • the semiconductor layer patterns in the present disclosure are all formed by a microfluidic technology, and the semiconductor layer patterns of different regions are respectively formed under control, which can ensure the similarity of parameters such as the thickness of the semiconductor layer pattern in different regions is high.
  • the quality of the semiconductor layer pattern is improved.
  • the display panel manufacturing method provided by the embodiment of the present disclosure forms a semiconductor layer pattern on a substrate by using a microfluidic technology, without using a photoresist.
  • the semiconductor layer pattern is made of an organic semiconductor material
  • the photoresist may contaminate the organic semiconductor material due to the use of the photoresist in the patterning process.
  • the problem of the performance of the semiconductor layer pattern The effect that various semiconductor materials can be used to form a semiconductor layer pattern is achieved.
  • the display Panel manufacturing equipment includes:
  • the semiconductor material solution cell 20 and the control circuit 30 are electrically connected to the semiconductor material solution cell 20.
  • the control circuit 30 is configured to control the semiconductor material solution in the semiconductor material solution pool 20 by microfluidic technology to form on the base substrate 11 (the substrate substrate 11 may not be included in the manufacturing apparatus of the display panel provided by the embodiment of the present disclosure)
  • a plurality of semiconductor material droplets, and the plurality of semiconductor material droplets after the curing process are semiconductor layer patterns.
  • the substrate substrate 11 is sequentially provided with a gate conductive pattern and a gate insulating layer.
  • the plurality of semiconductor material droplets are disposed on the base substrate provided with the gate insulating layer, and the gate conductive pattern 12 includes a plurality of gate lines.
  • the control circuit 30 is connected to a plurality of gate lines (121, 122, and 123), respectively.
  • the display panel is provided with an array substrate row driving circuit 50, and the control circuit 30 can be disposed in the array substrate row driving circuit 50. That is, when the array substrate row driving circuit 50 is formed, the control circuit 30 can be directly formed on the array. In the substrate row driving circuit 50, the control circuit 30 can control the voltage of the gate line to move the semiconductor material droplets when forming the semiconductor layer pattern.
  • control circuit 30 may also be partially disposed in the array substrate row driving circuit 50, and the other portion may be disposed in the external circuit board.
  • control circuit for controlling the first electrowetting electrode in the control circuit 30 may be disposed at The array substrate is driven in the row driving circuit 50, and the control circuit for controlling the second electrowetting electrode may be disposed in an external circuit board.
  • the manufacturing device of the display panel further includes a card slot 40 for setting the base substrate 11 .
  • the display panel manufacturing apparatus forms a semiconductor layer pattern on a substrate by microfluidic technology without using a photoresist.
  • the semiconductor layer pattern is made of an organic semiconductor material
  • the photoresist may contaminate the organic semiconductor material due to the use of the photoresist in the patterning process.
  • the problem of the performance of the semiconductor layer pattern is achieved.
  • Embodiments of the present disclosure also provide a display panel including a display panel manufactured by the method illustrated in FIG. 2 or the method illustrated in FIG. 3-1.
  • the display panel can be a liquid crystal display panel (English: Liquid Crystal Display; abbreviated as: LCD) or an organic light-emitting diode (English: Organic Light-Emitting Diode; OLED) display panel.
  • LCD Liquid Crystal Display
  • OLED Organic Light-Emitting Diode
  • a person skilled in the art may understand that all or part of the steps of implementing the above embodiments may be completed by hardware, or may be instructed by a program to execute related hardware, and the program may be stored in a computer readable storage medium.
  • the storage medium mentioned may be a read only memory, a magnetic disk or an optical disk or the like.

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Abstract

A display panel manufacturing method, a display panel manufacturing device, and a display panel, relating to the technical field of displaying. The method comprises: forming multiple semiconductor material drops on a base substrate (11) by using microfluidics technology; and solidifying the multiple semiconductor material drops, wherein the solidified multiple semiconductor material drops form a semiconductor layer pattern (202). By using the microfluidics technology to form a semiconductor layer pattern on a base substrate, there is no need to use a photoresist, solving the technical problem in the art that when a semiconductor layer pattern is made of an organic semiconductor material, if a conventional patterning process is adopted to manufacture the semiconductor layer pattern, since photoresist needs to be adopted during the patterning process, the photoresist may contaminate the organic semiconductor material, thus affecting the performance of the semiconductor layer pattern. The effect of forming a semiconductor layer pattern using multiple semiconductor materials is achieved.

Description

显示面板制造方法、显示面板的制造设备和显示面板Display panel manufacturing method, display panel manufacturing device, and display panel
本申请要求于2017年5月11日提交中国国家知识产权局、公开号为201710330494.3、发明名称为“显示面板制造方法、显示面板的制造设备和显示面板”的中国专利公开的优先权，其全部内容通过引用结合在本公开中。This application claims priority to the Chinese Patent Disclosure of the Chinese National Intellectual Property Office, publication number 201710330494.3, and the invention titled "Display Panel Manufacturing Method, Display Panel Manufacturing Equipment, and Display Panel" on May 11, 2017, all of which are The content is incorporated herein by reference.
技术领域Technical field
本公开涉及显示技术领域，特别涉及一种显示面板制造方法、显示面板的制造设备和显示面板。The present disclosure relates to the field of display technologies, and in particular, to a display panel manufacturing method, a manufacturing device of the display panel, and a display panel.
背景技术Background technique
显示面板中通常包括有多个薄膜晶体管(英文：Thin Film Transistor；简称：TFT)，根据显示面板种类的不同，这些TFT可以在显示面板中实现不同的功能。TFT通常可以包括栅极、半导体层和源漏极(源漏极包括源极和漏极)等结构。The display panel usually includes a plurality of thin film transistors (English: Thin Film Transistor; abbreviated as: TFT), and these TFTs can implement different functions in the display panel depending on the type of the display panel. The TFT may generally include a structure such as a gate, a semiconductor layer, and a source drain (source drain including source and drain).
相关技术中在制造显示面板时，首先在衬底基板上形成栅导电图形(包括栅极)和栅绝缘层，然后在形成有栅绝缘层的衬底基板上形成半导体层图案，之后在形成有有源层图案的衬底基板上形成其它结构。In the related art, in manufacturing a display panel, a gate conductive pattern (including a gate electrode) and a gate insulating layer are first formed on a base substrate, and then a semiconductor layer pattern is formed on the base substrate on which the gate insulating layer is formed, and then formed therein. Other structures are formed on the base substrate of the active layer pattern.
在实现本公开的过程中，发明人发现相关技术至少存在以下问题：当半导体层图案由有机半导体材料制成时，若采用传统的构图工艺制造该半导体层图案，由于该构图工艺中需要使用光刻胶，光刻胶可能污染有机半导体材料，影响半导体层图案的性能。In the process of implementing the present disclosure, the inventors have found that the related art has at least the following problem: when the semiconductor layer pattern is made of an organic semiconductor material, if the semiconductor layer pattern is fabricated by a conventional patterning process, light is required in the patterning process. In the engraving, the photoresist may contaminate the organic semiconductor material and affect the performance of the semiconductor layer pattern.
发明内容Summary of the invention
本公开实施例提供了一种显示面板制造方法、显示面板的制造设备和显示 面板。所述技术方案如下：Embodiments of the present disclosure provide a display panel manufacturing method, a manufacturing apparatus of the display panel, and a display panel. The technical solution is as follows:
根据本公开的第一方面，提供了一种显示面板制造方法，所述方法包括：According to a first aspect of the present disclosure, a display panel manufacturing method is provided, the method comprising:
通过微流控技术在衬底基板上形成多个半导体材料液滴；Forming a plurality of droplets of semiconductor material on the substrate by microfluidic technology;
对所述多个半导体材料液滴进行固化处理，固化处理后的所述多个半导体材料液滴形成半导体层图案。The plurality of semiconductor material droplets are subjected to a curing treatment, and the plurality of semiconductor material droplets after the curing treatment form a semiconductor layer pattern.
可选的，所述通过微流控技术在衬底基板上形成多个半导体材料液滴之前，所述方法还包括：Optionally, before the forming a plurality of droplets of the semiconductor material on the substrate by the microfluidic technology, the method further includes:
在所述衬底基板上依次形成栅导电图形和栅绝缘层，所述栅导电图形包括多条栅线，所述多条栅线中的每条栅线上均包括有多个栅极，用于提供所述半导体材料液滴的半导体材料溶液池设置有多个通道，任一所述通道的一端与所述半导体材料溶液池的内部连通，另一端设置在所述多条栅线中的指定栅线包括的一个栅极的流动区域，所述多条栅线包括的任一栅极的流动区域为所述任一栅极在所述栅绝缘层上的正投影区域；Forming a gate conductive pattern and a gate insulating layer on the substrate, the gate conductive pattern includes a plurality of gate lines, each of the plurality of gate lines including a plurality of gates, Providing a plurality of channels in a pool of semiconductor material solutions for providing droplets of said semiconductor material, one end of either of said channels being in communication with an interior of said pool of semiconductor material solution, and the other end being disposed in said plurality of gate lines a gate line includes a flow region of a gate, and a flow region of any one of the plurality of gate lines includes an orthographic projection area of the gate on the gate insulating layer;
所述通过微流控技术在衬底基板上形成多个半导体材料液滴，包括：Forming a plurality of droplets of semiconductor material on the substrate by microfluidic technology, including:
以所述多条栅线包括的栅极作为第一电润湿电极，控制所述半导体材料溶液池中的半导体材料溶液流向形成有所述栅绝缘层的衬底基板，并在形成有所述栅绝缘层的衬底基板上形成所述多个半导体材料液滴。Controlling the semiconductor material solution in the semiconductor material solution pool to the base substrate on which the gate insulating layer is formed by using the gate electrode included in the plurality of gate lines as the first electrowetting electrode, and forming the The plurality of semiconductor material droplets are formed on the base substrate of the gate insulating layer.
可选的，所述多条栅线包括栅极在所述衬底基板上成行列排布，Optionally, the plurality of gate lines comprise gates arranged in rows and columns on the substrate.
所述以所述多条栅线包括的栅极作为第一电润湿电极，控制所述半导体材料溶液池中的半导体材料溶液流向形成有所述栅绝缘层的衬底基板，并在形成有所述栅绝缘层的衬底基板上形成所述多个半导体材料液滴，包括：The gate electrode included in the plurality of gate lines is used as a first electrowetting electrode, and the semiconductor material solution in the semiconductor material solution pool is controlled to flow to the substrate substrate on which the gate insulating layer is formed, and is formed therein Forming the plurality of semiconductor material droplets on the base substrate of the gate insulating layer, including:
向所述指定栅线施加电压，使所述半导体材料溶液池中的半导体材料溶液流向所述指定栅线包括的栅极的多个流动区域中，并在所述多个流动区域中形成半导体材料液滴组，所述多个流动区域中的流动区域与所述半导体材料液滴组中的半导体材料液滴一一对应；Applying a voltage to the specified gate line to cause a semiconductor material solution in the semiconductor material solution pool to flow into a plurality of flow regions of a gate included in the specified gate line, and forming a semiconductor material in the plurality of flow regions a set of droplets, wherein the flow regions of the plurality of flow regions are in one-to-one correspondence with the droplets of semiconductor material in the set of droplets of semiconductor material;
以所述多条栅线包括的栅极作为所述第一电润湿电极，控制所述半导体材 料液滴组移动到目标栅线包括栅极的多个流动区域，所述目标栅线为当前距离所述指定栅线最远且在包括的栅极的流动区域中未设置有半导体材料液滴的栅线。Controlling, by the gates included in the plurality of gate lines, as the first electrowetting electrode, moving the group of semiconductor material droplets to a plurality of flow regions of the target gate line including the gate, the target gate line being current A gate line of semiconductor material droplets is not disposed furthest from the specified gate line and in a flow region of the included gate.
可选的，所述以所述多条栅线包括的栅极作为所述第一电润湿电极，控制所述半导体材料液滴组移动到目标栅线包括的栅极的多个流动区域，包括：Optionally, the gates included in the plurality of gate lines are used as the first electrowetting electrodes, and the semiconductor material droplet groups are controlled to move to a plurality of flow regions of a gate included in the target gate lines. include:
在所述指定栅线包括的栅极的多个流动区域中的半导体材料液滴组移动出所述指定栅线包括的栅极的多个流动区域时，向所述指定栅线施加电压，控制所述半导体材料溶液池中的半导体材料溶液流向所述指定栅线包括的栅极的多个流动区域。Applying a voltage to the specified gate line when the group of semiconductor material droplets in the plurality of flow regions of the gate included in the specified gate line moves out of the plurality of flow regions of the gate included in the specified gate line The semiconductor material solution in the pool of semiconductor material solutions flows to a plurality of flow regions of the gate included in the specified gate line.
可选的，所述多条栅线在所述衬底基板上沿预设方向排布，Optionally, the plurality of gate lines are arranged on the substrate substrate in a predetermined direction.
所述指定栅线为所述预设方向上位于所述多条栅线两端的两条栅线中的任意一条栅线。The specified gate line is any one of two gate lines located at two ends of the plurality of gate lines in the predetermined direction.
可选的，所述多条栅线中任意相邻的两条栅线之间设置有第二电润湿电极图案，所述第二电润湿电极图案用于控制所述半导体材料液滴移动。Optionally, a second electrowetting electrode pattern is disposed between any two adjacent ones of the plurality of gate lines, and the second electrowetting electrode pattern is used to control droplet movement of the semiconductor material .
可选的，所述第二电润湿电极图案为线栅偏振结构，所述第二电润湿电极图案起到偏光片的效果。Optionally, the second electrowetting electrode pattern is a wire grid polarization structure, and the second electrowetting electrode pattern functions as a polarizer.
可选的，所述多条栅线中，任一栅线包括的任一栅极的面积大于预设栅线的面积，所述预设栅线为位于所述任一栅极在所述任一栅线上的正投影中的栅线。Optionally, any one of the plurality of gate lines includes an area of any one of the gate lines that is larger than an area of the predetermined gate line, and the predetermined gate line is located at any one of the gates A gate line in an orthographic projection on a grid line.
可选的，所述对所述多个半导体材料液滴进行固化处理，固化处理后的所述多个半导体材料液滴形成半导体层图案之后，所述方法还包括：Optionally, after the curing of the plurality of semiconductor material droplets, after the curing of the plurality of semiconductor material droplets to form a semiconductor layer pattern, the method further includes:
在形成有所述半导体层图案的衬底基板上形成绝缘层；Forming an insulating layer on the base substrate on which the semiconductor layer pattern is formed;
在形成有所述绝缘层的衬底基板上形成公共电极图案，所述公共电极图案与所述第二电润湿电极构成触控电极。A common electrode pattern is formed on the base substrate on which the insulating layer is formed, and the common electrode pattern and the second electrowetting electrode constitute a touch electrode.
可选的，所述对所述多个半导体材料液滴进行固化处理，包括：Optionally, the curing process of the plurality of semiconductor material droplets includes:
加热形成有所述多个半导体材料液滴的衬底基板，使所述多个半导体材料 液滴固化。The substrate substrate on which the plurality of semiconductor material droplets are formed is heated to cure the plurality of semiconductor material droplets.
可选的，所述半导体材料液滴的材料包括有机半导体材料，或者，所述半导体材料液滴的材料包括所述有机半导体材料和聚合物高分子材料的混合物，所述有机半导体材料包括小分子半导体材料和高分子半导体材料。Optionally, the material of the semiconductor material droplet comprises an organic semiconductor material, or the material of the semiconductor material droplet comprises a mixture of the organic semiconductor material and a polymer polymer material, the organic semiconductor material comprising a small molecule Semiconductor materials and polymer semiconductor materials.
根据本公开的第二方面，提供一种显示面板的制造设备，用于使用第一方面提供的方法制造显示面板，所述显示面板的制造设备包括：According to a second aspect of the present disclosure, there is provided a manufacturing apparatus of a display panel for manufacturing a display panel using the method provided by the first aspect, the manufacturing apparatus of the display panel comprising:
半导体材料溶液池和控制电路，所述控制电路与所述半导体材料溶液池电连接；a semiconductor material solution pool and a control circuit, the control circuit being electrically connected to the semiconductor material solution pool;
所述控制电路用于通过微流控技术控制所述半导体材料溶液池中的半导体材料溶液在所述显示面板的衬底基板上形成多个半导体材料液滴，固化处理后的所述多个半导体材料液滴为半导体层图案。The control circuit is configured to control a semiconductor material solution in the semiconductor material solution pool to form a plurality of semiconductor material droplets on a base substrate of the display panel by a microfluidic technology, and cure the processed plurality of semiconductors The material droplets are semiconductor layer patterns.
可选的，所述衬底基板上依次设置有栅导电图形和栅绝缘层，所述多个半导体材料液滴设置在设置有所述栅绝缘层的衬底基板上，所述栅导电图形包括多条栅线，Optionally, the substrate substrate is sequentially provided with a gate conductive pattern and a gate insulating layer, wherein the plurality of semiconductor material droplets are disposed on the base substrate provided with the gate insulating layer, and the gate conductive pattern comprises Multiple grid lines,
所述控制电路分别与所述多条栅线连接。The control circuit is respectively connected to the plurality of gate lines.
可选的，所述显示面板上设置有阵列基板行驱动电路，Optionally, the display panel is provided with an array substrate row driving circuit,
所述控制电路设置在所述阵列基板行驱动电路中。The control circuit is disposed in the array substrate row driving circuit.
根据本公开的第二方面，提供一种显示面板，所述显示面板包括第一方面提供的方法制造的显示面板。According to a second aspect of the present disclosure, there is provided a display panel comprising the display panel manufactured by the method provided by the first aspect.
附图说明DRAWINGS
为了更清楚地说明本公开实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本公开的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the drawings used in the description of the embodiments will be briefly described below. It is obvious that the drawings in the following description are only some embodiments of the present disclosure. Other drawings may also be obtained from those of ordinary skill in the art in light of the inventive work.
图1是本公开实施例中电润湿原理示意图；1 is a schematic view of the principle of electrowetting in an embodiment of the present disclosure;
图2是本公开实施例示出的一种显示面板制造方法的流程图；2 is a flow chart showing a method of manufacturing a display panel according to an embodiment of the present disclosure;
图3-1是本公开实施例示出的另一种显示面板制造方法的流程图；3-1 is a flowchart of another method for manufacturing a display panel according to an embodiment of the present disclosure;
图3-2是图3-1所示实施例中一种衬底基板的结构示意图；3-2 is a schematic structural view of a substrate in the embodiment shown in FIG. 3-1;
图3-3是图3-1所示实施例中另一种衬底基板的结构示意图；3-3 is a schematic structural view of another substrate in the embodiment shown in FIG. 3-1;
图3-4是图3-1所示实施例中另一种衬底基板的结构示意图；3-4 is a schematic structural view of another substrate in the embodiment shown in FIG. 3-1;
图3-5是本公开实施例中一种形成多个半导体材料液滴的流程图；3-5 are flow diagrams of forming a plurality of droplets of semiconductor material in an embodiment of the present disclosure;
图3-6是图3-1所示实施例中另一种衬底基板的结构示意图；3-6 is a schematic structural view of another substrate in the embodiment shown in FIG. 3-1;
图3-7是图3-1所示实施例中一种半导体材料液滴移动的示意图；3-7 is a schematic view showing movement of a droplet of a semiconductor material in the embodiment shown in FIG. 3-1;
图3-8是本公开实施例中一种控制半导体材料液滴的流程图；3-8 are flow diagrams of controlling droplets of semiconductor material in an embodiment of the present disclosure;
图3-9是本公开实施例中一种电润湿电极上的电压示意图；3-9 are schematic diagrams of voltages on an electrowetting electrode in an embodiment of the present disclosure;
图3-10是图3-1所示实施例中另一种衬底基板的结构示意图；3-10 is a schematic structural view of another substrate in the embodiment shown in FIG. 3-1;
图3-11是图3-1所示实施例中另一种衬底基板的结构示意图；3-11 are schematic structural views of another substrate in the embodiment shown in FIG. 3-1;
图4是本公开实施例提供的一种显示面板的制造设备的结构示意图。FIG. 4 is a schematic structural diagram of a manufacturing apparatus of a display panel according to an embodiment of the present disclosure.
通过上述附图，已示出本公开明确的实施例，后文中将有更详细的描述。这些附图和文字描述并不是为了通过任何方式限制本公开构思的范围，而是通过参考特定实施例为本领域技术人员说明本公开的概念。The embodiments of the present disclosure have been shown by the above-described drawings, which will be described in more detail later. The drawings and the text are not intended to limit the scope of the present disclosure in any way, and the description of the present disclosure will be described by those skilled in the art by reference to the specific embodiments.
具体实施方式detailed description
为使本公开的目的、技术方案和优点更加清楚，下面将结合附图对本公开实施方式作进一步地详细描述。The embodiments of the present disclosure will be further described in detail below with reference to the accompanying drawings.
本公开实施例提供一种显示面板制造方法，其采用电润湿(英文：Electrowetting)原理，如图1所示，其为本公开实施例中通过电润湿原理控制半导体材料液滴移动的原理示意图。其中，衬底层01上依次形成有电润湿电极02和绝缘层03，电润湿电极02包括电极021、电极022和电极023。绝缘层03上可以设置有液滴04。Embodiments of the present disclosure provide a display panel manufacturing method using electrowetting (Electrowetting) principle, as shown in FIG. 1 , which is a principle for controlling droplet movement of a semiconductor material by an electrowetting principle in the embodiment of the present disclosure. schematic diagram. The electrowetting electrode 02 and the insulating layer 03 are sequentially formed on the substrate layer 01, and the electrowetting electrode 02 includes an electrode 021, an electrode 022, and an electrode 023. A droplet 04 may be disposed on the insulating layer 03.
在向电极022施加电压而不向电极021施加电压时，电极022上的电压比 电极021上的电压大，且电极022和电极021之间存在一个经过液滴04的电场，该电场使电极022上方的部分液滴与绝缘层03的接触角(英文：contact angle)05变小，而电极021上方的部分液滴与绝缘层03的接触角无变化，液滴04内部将产生水平方向的压强差，驱动液滴04移动向电极022的方向。之后可以交替变换相邻的两个电极的电压就能驱动液滴04不断的移动。When a voltage is applied to the electrode 022 without applying a voltage to the electrode 021, the voltage on the electrode 022 is larger than the voltage on the electrode 021, and there is an electric field passing through the droplet 04 between the electrode 022 and the electrode 021, which makes the electrode 022 The contact angle of the upper portion of the droplet with the insulating layer 03 becomes smaller, and the contact angle of the portion of the droplet above the electrode 021 with the insulating layer 03 does not change, and the inside of the droplet 04 generates a horizontal pressure. Poor, driving the droplet 04 to move in the direction of the electrode 022. The voltages of the adjacent two electrodes can then be alternately shifted to drive the continuous movement of the droplets 04.
图1中的电极可以相当于本公开中的栅极，液滴可以相当于本公开中的半导体材料液滴。The electrode of Figure 1 may correspond to the gate of the present disclosure, and the droplet may correspond to a droplet of semiconductor material in the present disclosure.
图2是本公开实施例示出的一种显示面板制造方法的流程图。该显示面板制造方法可以包括如下几个步骤：2 is a flow chart of a method of manufacturing a display panel according to an embodiment of the present disclosure. The display panel manufacturing method can include the following steps:
步骤201、通过微流控技术在衬底基板上形成多个半导体材料液滴。Step 201: Form a plurality of droplets of semiconductor material on the substrate by microfluidic technology.
步骤202、对多个半导体材料液滴进行固化处理，固化处理后的多个半导体材料液滴形成半导体层图案。Step 202: Perform curing treatment on a plurality of droplets of the semiconductor material, and form a semiconductor layer pattern by the plurality of droplets of the semiconductor material after the curing.
此外，本公开实施例提供的显示面板制造方法还可以包括用于制造显示面板其他结构的步骤，这些步骤可以参考相关技术，本公开实施例不作出限制。In addition, the display panel manufacturing method provided by the embodiment of the present disclosure may further include steps for manufacturing other structures of the display panel. These steps may refer to related technologies, and the embodiments of the present disclosure are not limited.
综上所述，本公开实施例提供的显示面板制造方法，通过微流控技术在衬底基板上形成半导体层图案，无需使用光刻胶。解决了相关技术中当半导体层图案由有机半导体材料制成时，若采用传统的构图工艺制造该半导体层图案，由于该构图工艺中需要使用光刻胶，光刻胶可能污染有机半导体材料，影响半导体层图案的性能的问题，达到了可以使用各种半导体材料来形成半导体层图案的效果。In summary, the display panel manufacturing method provided by the embodiment of the present disclosure forms a semiconductor layer pattern on a substrate by using a microfluidic technology, without using a photoresist. In the related art, when the semiconductor layer pattern is made of an organic semiconductor material, if the semiconductor layer pattern is formed by a conventional patterning process, the photoresist may contaminate the organic semiconductor material due to the use of the photoresist in the patterning process. The problem of the performance of the semiconductor layer pattern achieves the effect that various semiconductor materials can be used to form the semiconductor layer pattern.
图3-1是本公开实施例示出的另一种显示面板制造方法的流程图，该方法可以应用于图4所示的显示面板的制造设备中。该显示面板制造方法可以包括如下几个步骤：3-1 is a flowchart of another method of manufacturing a display panel according to an embodiment of the present disclosure, which may be applied to a manufacturing apparatus of the display panel shown in FIG. 4. The display panel manufacturing method can include the following steps:
步骤301、在衬底基板上依次形成栅导电图形和栅绝缘层。 Step 301, sequentially forming a gate conductive pattern and a gate insulating layer on the base substrate.
在使用本公开实施例提供的显示面板制造方法时，首先可以在衬底基板上依次形成栅导电图形和栅绝缘层。其中，栅导电图形可以包括多条栅线，多条栅线中的每条栅线上均包括有多个栅极，用于提供半导体材料液滴的半导体材料溶液池可以设置有多个通道，这多个通道中的任一通道的一端与半导体材料溶液池的内部连通，另一端设置在多条栅线中的指定栅线包括的一个栅极的流动区域(英文：fluid place)，多条栅线包括的任一栅极的流动区域为该任一栅极在栅绝缘层上的正投影区域。其中，指定栅线可以是这多条栅线中的任意一条栅线，也可以为按照预设规则配置的一条栅线。When the display panel manufacturing method provided by the embodiment of the present disclosure is used, the gate conductive pattern and the gate insulating layer may be sequentially formed on the substrate. The gate conductive pattern may include a plurality of gate lines, each of the plurality of gate lines includes a plurality of gates, and the semiconductor material solution pool for providing droplets of the semiconductor material may be provided with a plurality of channels. One end of any of the plurality of channels is in communication with the interior of the semiconductor material solution pool, and the other end is disposed in a flow region of a gate included in a specified gate line of the plurality of gate lines (English: fluid place), a plurality of The flow region of any of the gate lines included in the gate line is an orthographic projection area of the gate on the gate insulating layer. The designated gate line may be any one of the plurality of gate lines, or may be a gate line configured according to a preset rule.
可选的，多条栅线在衬底基板上沿预设方向排布时，该指定栅线可以为预设方向上位于多条栅线两端的两条栅线中的任意一条栅线。指定栅线位于多条栅线两端时，能够较为容易的将通道的另一端设置在指定栅线上的流动区域中，减小了工艺难度。其中，多条栅线的排布方向与栅线的长度方向是两个不同的概念，多条栅线可以平行布置。示例性的，多条栅线的排布方向可以是指每一条栅线的中心的连线的长度方向，该排布方向与每条栅线的长度方向不平行。Optionally, when a plurality of gate lines are arranged in a predetermined direction on the substrate, the designated gate line may be any one of two gate lines located at two ends of the plurality of gate lines in a preset direction. When the specified gate line is located at two ends of the plurality of gate lines, the other end of the channel can be easily disposed in the flow region on the designated gate line, which reduces the process difficulty. Wherein, the arrangement direction of the plurality of gate lines and the length direction of the gate lines are two different concepts, and the plurality of gate lines may be arranged in parallel. Illustratively, the arrangement direction of the plurality of gate lines may refer to the length direction of the line of the center of each of the gate lines, and the arrangement direction is not parallel to the length direction of each of the gate lines.
可选的，多条栅线中，任一栅线包括的任一栅极的面积大于预设栅线的面积，预设栅线为位于该任一栅极在该任一栅线上的正投影中的栅线。其中，栅极的面积可以等于栅极在栅绝缘层上的正投影的面积，栅线的面积可以是指栅线在栅绝缘层上的正投影的面积。栅极在栅线上的正投影可以是指栅极在垂直于衬底基板的方向上在栅线上的投影。Optionally, any one of the plurality of gate lines includes an area of any one of the gate lines that is larger than an area of the preset gate line, and the preset gate line is positive of the gate line on the any gate line. The gate line in the projection. Wherein, the area of the gate may be equal to the area of the orthographic projection of the gate on the gate insulating layer, and the area of the gate line may refer to the area of the orthographic projection of the gate line on the gate insulating layer. The orthographic projection of the gate on the gate line may refer to the projection of the gate on the gate line in a direction perpendicular to the substrate substrate.
本步骤结束时，衬底基板的结构可以如图3-2所示，衬底基板11上依次形成有栅导电图形12和栅绝缘层13(为了便于说明，栅绝缘层13在图3-2中以透明状态示出，但这并非是对栅绝缘层13的限制)，栅导电图形12中的多条栅线121、122和123沿预设方向A排布，指定栅线可以为预设方向A上位于多条栅线两端的两条栅线中的栅线121或栅线123。这样半导体材料溶液池20就更容易将通道21的一端设置在指定栅线包括的栅极的流动区域中。在图3-2 中，可以将栅极g所在的区域(该区域即为栅极g在栅绝缘层13上的正投影区域)作为栅极g的流动区域。通道21的一端可以设置在半导体材料溶液池20中，另一端可以设置在栅极g的流动区域中。多条栅线包括的栅极在衬底基板11上成行列排布。半导体材料溶液池20上还可以设置有引线22，引线22用于与控制电路连接。At the end of this step, the structure of the base substrate can be as shown in FIG. 3-2, and the gate conductive pattern 12 and the gate insulating layer 13 are sequentially formed on the base substrate 11. (For convenience of explanation, the gate insulating layer 13 is in FIG. 3-2. The middle is shown in a transparent state, but this is not a limitation of the gate insulating layer 13), and the plurality of gate lines 121, 122, and 123 in the gate conductive pattern 12 are arranged along a predetermined direction A, and the specified gate line can be preset. A gate line 121 or a gate line 123 of the two gate lines located at both ends of the plurality of gate lines in the direction A. Thus, the semiconductor material solution cell 20 more easily places one end of the channel 21 in the flow region of the gate included in the specified gate line. In FIG. 3-2, the region where the gate g is located (this region is the orthographic projection region of the gate g on the gate insulating layer 13) can be regarded as the flow region of the gate g. One end of the channel 21 may be disposed in the semiconductor material solution pool 20, and the other end may be disposed in the flow region of the gate g. The gate lines included in the plurality of gate lines are arranged in a row on the base substrate 11. A lead 22 may also be disposed on the semiconductor material solution cell 20 for connection to a control circuit.
图3-2中任一栅线(121、122或123)包括的任一栅极g的面积大于预设栅线121a的面积，预设栅线121a为位于任一栅极在该任一栅线上的正投影中的栅线(图3-2中示出的预设栅线121a为栅线121最左侧包括的第一个栅极g在栅线121上的投影中的一段栅线)。即将栅极的尺寸设置的比栅线大，以加强栅极对于半导体材料液滴的控制，避免半导体材料液滴不受控制的流动。The gate line (121, 122 or 123) of any of the gate lines (121, 122 or 123) of FIG. 3-2 has an area larger than the area of the predetermined gate line 121a, and the predetermined gate line 121a is located at any gate of the gate. a gate line in the orthographic projection on the line (the preset gate line 121a shown in FIG. 3-2 is a section of the gate line in the projection of the first gate g included on the leftmost side of the gate line 121 on the gate line 121 ). That is, the size of the gate is set larger than the gate line to enhance the control of the gate droplets of the semiconductor material to avoid uncontrolled flow of the droplets of semiconductor material.
可选的，栅导电图案中还可以包括第二电润湿电极图案，第二电润湿电极图案可以包括多个第二电润湿电极，这多个第二电润湿电极中的任一电润湿电极，可以设置在衬底基板上的多条栅线中任意相邻的两条栅线之间。由于衬底基板上任意两条相邻的栅线之间的距离可能较远，因而在任意相邻的两条栅线之间设置第二电润湿电极能够避免半导体材料液滴不受控制的流动。Optionally, a second electrowetting electrode pattern may be further included in the gate conductive pattern, and the second electrowetting electrode pattern may include a plurality of second electrowetting electrodes, and any one of the plurality of second electrowetting electrodes The electrowetting electrode may be disposed between any two adjacent gate lines of the plurality of gate lines on the substrate. Since the distance between any two adjacent gate lines on the substrate may be relatively long, providing a second electrowetting electrode between any two adjacent gate lines can prevent the semiconductor material droplets from being uncontrolled. flow.
如图3-3所示，其为本公开实施例提供的一种设置有第二电润湿电极图案124的衬底基板的结构示意图，第二电润湿电极图案124包括第二电润湿电极1241和1242。由图3-3可以看出，设置在栅线121和122之间的第二电润湿电极1241，以及设置在栅线122和123之间的第二电润湿电极1242，增加了方向A上用于控制半导体材料液滴的电极的密度，使得对于半导体材料液滴的控制更加稳定。图3-2中的任一电润湿电极可以包括引线区域和电极区域两部分，引线区域的结构可以参考栅线(121、122或123)，电极区域的结构可以参考栅极g，且电极区域可以设置在方向A上相邻的两个栅极之间。As shown in FIG. 3-3, it is a schematic structural diagram of a substrate provided with a second electrowetting electrode pattern 124 according to an embodiment of the present disclosure, and the second electrowetting electrode pattern 124 includes a second electrowetting. Electrodes 1241 and 1242. As can be seen from FIG. 3-3, the second electrowetting electrode 1241 disposed between the gate lines 121 and 122, and the second electrowetting electrode 1242 disposed between the gate lines 122 and 123, add direction A. The density of the electrodes used to control the droplets of semiconductor material is such that the control of droplets of semiconductor material is more stable. Any of the electrowetting electrodes in FIG. 3-2 may include a lead region and an electrode region. The structure of the lead region may refer to a gate line (121, 122 or 123), and the structure of the electrode region may refer to the gate g and the electrode. The region can be placed between two adjacent gates in direction A.
图3-3中其他标记的含义可以参考图3-2，在此不再赘述。For the meanings of other tags in Figure 3-3, refer to Figure 3-2, and details are not described herein.
需要说明的是，图3-3示出的衬底基板中，任意两条相邻的栅线之间设置的第二电润湿电极还可以有多个，本公开实施例不作出限制。It should be noted that, in the substrate substrate shown in FIG. 3-3, there may be a plurality of second electrowetting electrodes disposed between any two adjacent gate lines, which is not limited in the embodiment of the present disclosure.
可选的，第二电润湿电极图案为线栅偏振结构，第二电润湿电极图案可以起到偏光片的效果。本公开实施例中，第二电润湿电极图案起到的作用与相关技术中位于出光侧的偏光片相同，这样可以无需在出光侧设置偏光片，降低了显示面板的成本。Optionally, the second electrowetting electrode pattern is a wire grid polarization structure, and the second electrowetting electrode pattern can function as a polarizer. In the embodiment of the present disclosure, the second electrowetting electrode pattern plays the same role as the polarizer on the light exiting side in the related art, so that the polarizing plate is not required to be disposed on the light emitting side, which reduces the cost of the display panel.
如图3-4所示，其为本公开实施例提供的另一种设置有第二电润湿电极图案124的衬底基板的结构示意图，其中，第二电润湿电极图案124为线栅偏振结构，该线栅偏振结构的具体参数可以参考相关技术中的偏光片。示例性的，在显示面板的像素密度(英文：Pixels Per Inch；简称：PPI)为300时，则相邻的两条栅线之间的距离大约为80微米，流动区域(即栅极g所在的区域)的尺寸可以为4微米×5微米，该流动区域在方向A(方向A即栅线的排布方向)上的长度为4微米，在垂直于方向A的方向上的长度为5微米，线栅偏振结构中一条“线”的宽度为250纳米，“线”与“线”之间的距离也为250纳米，则相邻的两条栅线之间可以设置160条线。并且相邻的8条线(相邻的8条线在方向A上的长度正好为4微米)上可制备一个与栅极尺寸大小相等的电极(即在方向A上相邻的两个栅极之间设置有多个电极，图3-4中仅示例性的示出了一个，但并非是对该电极数量的限制)，用于控制半导体材料液滴流动。图3-4中其他标记的含义可以参考图3-3，在此不再赘述。FIG. 3-4 is a schematic structural diagram of another substrate provided with a second electrowetting electrode pattern 124 according to an embodiment of the present disclosure, wherein the second electrowetting electrode pattern 124 is a wire grid. The polarization structure, the specific parameters of the wire grid polarization structure can refer to the polarizer in the related art. Exemplarily, when the pixel density of the display panel (English: Pixels Per Inch; PPI) is 300, the distance between adjacent two gate lines is about 80 micrometers, and the flow region (ie, the gate g is located) The size of the region may be 4 micrometers by 5 micrometers, and the length of the flow region in the direction A (direction A, that is, the arrangement direction of the gate lines) is 4 micrometers, and the length in the direction perpendicular to the direction A is 5 micrometers. The width of a "line" in the wire grid polarization structure is 250 nm, and the distance between the "line" and the "line" is also 250 nm, and 160 lines can be set between the adjacent two gate lines. And an adjacent electrode (the adjacent 8 lines in the direction A is exactly 4 microns in length) can prepare an electrode equal in size to the gate (ie, two gates adjacent in the direction A). A plurality of electrodes are disposed between them, only one of which is exemplarily shown in FIGS. 3-4, but is not a limitation on the number of electrodes) for controlling the flow of droplets of semiconductor material. For the meanings of other labels in Figure 3-4, refer to Figure 3-3, and details are not described herein.
步骤302、以多条栅线包括的栅极作为第一电润湿电极，控制半导体材料溶液池中的半导体材料溶液流向形成有栅绝缘层的衬底基板，并在形成有栅绝缘层的衬底基板上形成多个半导体材料液滴。 Step 302, using a gate electrode included in the plurality of gate lines as the first electrowetting electrode, controlling the semiconductor material solution in the semiconductor material solution pool to flow to the base substrate formed with the gate insulating layer, and forming the lining formed with the gate insulating layer A plurality of droplets of semiconductor material are formed on the base substrate.
由于本公开实施例通过微流控技术来形成半导体层图案，可以不使用光刻胶，因而半导体材料可以为有机半导体材料，这避免了相关技术中使用构图工艺形成半导体层图案时，光刻胶可能污染有机材料构成的半导体层图案的问题，同时也避免了使用喷墨打印技术形成半导体层图案的成本较高的问题。其中，半导体材料液滴的材料可以包括有机半导体材料，或者，半导体材料液滴的材料可以包括有机半导体材料和聚合物高分子材料的混合物，其中有机半导 体材料包括小分子半导体材料和高分子半导体材料；聚合物高分子材料可以包括聚甲基丙烯酸甲酯(英文：PMMA)和聚苯乙烯(英文:Polystyrene；简称：PS)。小分子半导体材料可以包括：并五苯、PBTTT(英文：poly(2,5-bis(3-alkylthiophene-2-yl)thieno[3,2-b]thiophene))、BTBT(英文：2,7-Dioctyl[1]benzothieno[3,2-b][1]benzothiophene)、DNNT(英文：Dinaphtho[2,3-b:2′,3′-f]thieno[3,2-b]thiophene)和TES-ADT(英文：5,11-Bis(triethylsilylethynyl)anthradithiophene)。高分子半导体材料可以包括：3-己基噻吩的聚合物和PBTTT(英文：Poly(2,5-bis(3-hexadecyllthiophen-2-yl)thieno[3,2-b]thiophene))。Since the embodiment of the present disclosure forms the semiconductor layer pattern by the microfluidic technology, the photoresist may not be used, and thus the semiconductor material may be an organic semiconductor material, which avoids the photoresist in the related art when the patterning process is used to form the semiconductor layer pattern. The problem of contamination of the semiconductor layer pattern of organic materials may also be avoided, while the problem of high cost of forming semiconductor layer patterns using inkjet printing techniques is also avoided. Wherein, the material of the droplet of the semiconductor material may comprise an organic semiconductor material, or the material of the droplet of the semiconductor material may comprise a mixture of the organic semiconductor material and the polymer polymer material, wherein the organic semiconductor material comprises a small molecule semiconductor material and a polymer semiconductor material. The polymer polymer material may include polymethyl methacrylate (English: PMMA) and polystyrene (English: Polystyrene; abbreviation: PS). Small molecule semiconductor materials may include: pentacene, PBTTT (English: poly(2,5-bis(3-alkylthiophene-2-yl)thieno[3,2-b]thiophene)), BTBT (English: 2,7) -Dioctyl[1]benzothieno[3,2-b][1]benzothiophene), DNNT (English: Dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene) and TES-ADT (English: 5,11-Bis(triethylsilylethynyl)anthradithiophene). The polymer semiconductor material may include a polymer of 3-hexylthiophene and PBTTT (English: Poly(2,5-bis(3-hexadecyllthiophen-2-yl)thieno[3,2-b]thiophene)).
而为了避免半导体材料液滴过早的固化，半导体材料溶液的溶剂可以选用沸点较高的溶剂，比如二氯苯和三氯苯等。In order to avoid premature curing of the semiconductor material droplets, the solvent of the semiconductor material solution may use a solvent having a higher boiling point such as dichlorobenzene and trichlorobenzene.
如图3-5所示，本步骤可以包括下面两个子步骤：As shown in Figure 3-5, this step can include the following two sub-steps:
子步骤3021、向指定栅线施加电压，使半导体材料溶液池中的半导体材料溶液流向指定栅线包括的栅极的多个流动区域中，并在多个流动区域中形成半导体材料液滴组。Sub-step 3021, applying a voltage to the specified gate line, causing the semiconductor material solution in the semiconductor material solution pool to flow into the plurality of flow regions of the gate included in the specified gate line, and forming a group of semiconductor material droplets in the plurality of flow regions.
半导体材料溶液池相当于一个电润湿电极，在向指定栅线施加电压后，半导体材料溶液池中的半导体材料溶液会流向指定栅线包括的栅极的多个流动区域中。其中，多个流动区域中的流动区域与半导体材料液滴组中的半导体材料液滴一一对应。The semiconductor material solution cell corresponds to an electrowetting electrode, and after applying a voltage to the specified gate line, the semiconductor material solution in the semiconductor material solution pool flows into a plurality of flow regions of the gate included in the specified gate line. Wherein, the flow regions in the plurality of flow regions are in one-to-one correspondence with the droplets of semiconductor material in the group of semiconductor material droplets.
本步骤结束时，衬底基板的结构可以如图3-6所示，多个半导体材料液滴Y位于多个栅极g的流动区域中，且流动区域与半导体材料液滴Y一一对应。图3-6是以指定栅线为栅线121为例进行说明。图3-6中其他标记的含义可以参考图3-3，在此不再赘述。At the end of this step, the structure of the base substrate can be as shown in FIG. 3-6, and a plurality of semiconductor material droplets Y are located in the flow regions of the plurality of gates g, and the flow regions are in one-to-one correspondence with the semiconductor material droplets Y. 3-6 is an example in which the specified gate line is the gate line 121. For the meanings of other marks in FIG. 3-6, reference may be made to FIG. 3-3, and details are not described herein again.
子步骤3022、以第一电润湿电极和第二电润湿电极控制半导体材料液滴组移动到目标栅线包括的栅极的多个流动区域。Sub-step 3022, controlling the group of semiconductor material droplets to move to a plurality of flow regions of the gate included in the target gate line with the first electrowetting electrode and the second electrowetting electrode.
在本公开实施例中，栅线和第二电润湿电极可以共同作为电润湿电极控制 半导体材料液滴移动。其中多条栅线包括的栅极为第一电润湿电极，半导体材料液滴在衬底基板上移动的方向和栅线在衬底基板上的排布方向是一致的，即某个电润湿电极(电润湿电极可以包括第一电润湿电极和第二电润湿电极)的流动区域中的半导体材料液滴会沿着栅线在衬底基板上的排布方向向相邻的电润湿电极的流动区域中移动。In embodiments of the present disclosure, the gate line and the second electrowetting electrode can collectively act as an electrowetting electrode to control droplet movement of the semiconductor material. Wherein the plurality of gate lines comprise a gate electrode as a first electrowetting electrode, and a direction in which the droplets of the semiconductor material move on the substrate substrate and a direction in which the gate lines are arranged on the substrate substrate are uniform, that is, an electrowetting The droplets of semiconductor material in the flow region of the electrode (the electrowetting electrode may include the first electrowetting electrode and the second electrowetting electrode) may be adjacent to each other along the arrangement direction of the gate line on the substrate substrate Moving in the flow area of the wetting electrode.
目标栅线为当前距离指定栅线最远且在包括的栅极的流动区域中未设置有半导体材料液滴的栅线，这样可以避免半导体材料液滴相互阻挡。The target gate line is the gate line that is farthest from the specified gate line and is not provided with the droplets of semiconductor material in the flow region of the included gate, so that the semiconductor material droplets can be prevented from blocking each other.
本公开实施例是通过微流控(英文：Microfluidics)技术来对半导体材料液滴进行控制的，微流控技术指的是使用微管道(尺寸为数十到数百微米)处理或操纵微小流体(体积为纳升到阿升)的技术，本公开中，多条栅线包括的阵列排布的栅极中，平行于多条栅线的排布方向的一列电润湿电极即可以认为是微管道。Embodiments of the present disclosure control droplets of semiconductor materials by microfluidics (Microfluidics) technology, which refers to the treatment or manipulation of microfluidics using microchannels (several tens to hundreds of microns in size). (in the volume of nanoliter to a liter), in the present disclosure, a plurality of gate lines include an array of grids arranged in an array, and an array of electrowetting electrodes parallel to the arrangement direction of the plurality of gate lines can be considered as Micropipeline.
如图3-7所示，其为半导体材料液滴移动到目标栅线的多个流动区域的示意图，其为控制如图3-6所示的衬底基板上的半导体材料液滴的示意图，在图3-6中，指定栅线为121，半导体材料液滴Y位于栅线121包括的栅极的流动区域中，距离指定栅线121最远且在包括的栅极的流动区域中未设置有半导体材料液滴的目标栅线为栅线123，如图3-7所示，此时可以控制半导体材料液滴Y沿着轨迹S移动到栅线123包括的栅极的流动区域中。每个栅线(121、122或123)和第二电润湿电极(1241和1242)均可以在衬底基板11的边缘设置单独的接口，该接口用于与控制电路30连接，控制电路30可以由逻辑电路构成，用于向栅线(121、122或123)和第二电润湿电极(1241和1242)施加电压，以控制半导体材料液滴的移动。控制电路30还可以通过引线22与半导体材料溶液池20电连接。3-7, which is a schematic diagram of a plurality of flow regions of semiconductor material droplets moving to a target gate line, which is a schematic diagram for controlling droplets of semiconductor material on a substrate substrate as shown in FIGS. 3-6. In FIGS. 3-6, the specified gate line is 121, and the semiconductor material droplet Y is located in the flow region of the gate included in the gate line 121, is farthest from the specified gate line 121 and is not set in the flow region of the included gate. The target gate line having the droplets of semiconductor material is the gate line 123, as shown in FIGS. 3-7, at which time the droplets of semiconductor material Y can be controlled to move along the track S into the flow region of the gate included in the gate line 123. Each of the gate lines (121, 122 or 123) and the second electrowetting electrodes (1241 and 1242) may be provided with a separate interface at the edge of the base substrate 11, the interface being used for connection with the control circuit 30, the control circuit 30 It may be constituted by a logic circuit for applying a voltage to the gate lines (121, 122 or 123) and the second electrowetting electrodes (1241 and 1242) to control the movement of the droplets of the semiconductor material. Control circuit 30 can also be electrically coupled to cell material solution cell 20 via leads 22.
此外，栅线连接的控制电路可以为阵列基板行驱动(英文：Gate Driver on Array；简称：GOA)电路，第二电润湿电极连接的控制电路也可以是GOA电路。Md可以为微管道。In addition, the gate line connection control circuit may be an array substrate row driver (English: Gate Driver on Array; abbreviated as: GOA) circuit, and the second electrowetting electrode connection control circuit may also be a GOA circuit. Md can be a micropipe.
图3-7中其他标记的含义可以参考图3-6，在此不再赘述。The meanings of other marks in FIG. 3-7 can be referred to FIG. 3-6, and details are not described herein again.
如图3-8所示，本步骤可以包括下面一个子步骤：As shown in Figure 3-8, this step can include the following substep:
子步骤30221、在指定栅线包括的栅极的多个流动区域中的半导体材料液滴组移动出指定栅线包括的栅极的多个流动区域时，向指定栅线施加电压，控制半导体材料溶液池中的半导体材料溶液流向指定栅线包括的栅极的多个流动区域。Sub-step 30221, when a group of semiconductor material droplets in a plurality of flow regions of a gate included in the specified gate line moves out of a plurality of flow regions of a gate included in the specified gate line, applying a voltage to the specified gate line to control the semiconductor material The solution of semiconductor material in the solution cell flows to a plurality of flow regions of the gate included in the specified gate line.
这样能够连续不断的移动半导体材料液滴至目标栅线包括的栅极的流动区域，加快半导体图案的形成速度。This can continuously move the droplets of semiconductor material to the flow region of the gate included in the target gate line, thereby accelerating the formation speed of the semiconductor pattern.
以图3-6所示的衬底基板为例，在本步骤中，电润湿电极上所施加的电压与时间的关系图可以如图3-9所示，其示出了半导体材料溶液池20、栅线121、栅线122和第二电润湿电极1241的电压示意图，横向从左到右代表时间的增长，矩形凸起的时间段代表处于较高电位，矩形未凸起的时间段代表处于较低电位(半导体材料溶液池20始终处于较低电位，这里的较低电位是指低于较高电位的电位)。通过这种控制方式，能够源源不断的将半导体材料溶液池中的半导体材料液滴移动到目的栅线包括的栅极的流动区域。Taking the substrate shown in FIG. 3-6 as an example, in this step, the relationship between the voltage applied on the electrowetting electrode and time can be as shown in FIG. 3-9, which shows the solution pool of the semiconductor material. 20. A voltage diagram of the gate line 121, the gate line 122, and the second electrowetting electrode 1241. The horizontal direction from left to right represents a time increase, and the period of the rectangular protrusion represents a period at a higher potential and the rectangle is not convex. The representative is at a lower potential (the semiconductor material solution cell 20 is always at a lower potential, where the lower potential refers to a potential lower than the higher potential). By this control, the droplets of semiconductor material in the pool of semiconductor material solution can be continuously moved to the flow region of the gate included in the target gate line.
步骤302结束时，衬底基板的结构示意图可以如图3-10所示，每个栅线包括的栅极的流动区域均形成有半导体材料液滴。图3-10中其他标记的含义可以参考图3-6，在此不再赘述。At the end of step 302, the structural schematic diagram of the base substrate can be as shown in FIGS. 3-10, and each of the gate lines includes a flow region of the gate formed with droplets of semiconductor material. The meanings of other marks in FIG. 3-10 can be referred to FIG. 3-6, and details are not described herein again.
步骤302结束后，可以将半导体材料溶液池与衬底基板分离。After the end of step 302, the pool of semiconductor material solutions can be separated from the substrate.
步骤303、加热形成有多个半导体材料液滴的衬底基板，使多个半导体材料液滴固化。Step 303: heating a substrate substrate on which a plurality of droplets of semiconductor material are formed to cure a plurality of droplets of semiconductor material.
加热温度可以为80摄氏度，加热时间可以为30分钟。固化后的所述多个半导体材料液滴形成半导体层图案。The heating temperature can be 80 degrees Celsius and the heating time can be 30 minutes. The plurality of droplets of the semiconductor material after curing form a semiconductor layer pattern.
步骤304、在形成有半导体层图案的衬底基板上形成绝缘层。 Step 304, forming an insulating layer on the base substrate on which the semiconductor layer pattern is formed.
步骤305、在形成有绝缘层的衬底基板上形成公共电极图案，公共电极图案与第二电润湿电极构成触控电极。 Step 305, forming a common electrode pattern on the base substrate on which the insulating layer is formed, and the common electrode pattern and the second electrowetting electrode constitute the touch electrode.
可以在形成有绝缘层的衬底基板上形成公共电极层，之后通过构图工艺形成公共电极图案。该构图工艺可以包括光刻胶涂覆、曝光、显影、刻蚀和光刻胶剥离等工序。The common electrode layer may be formed on the base substrate on which the insulating layer is formed, and then the common electrode pattern is formed by a patterning process. The patterning process may include processes such as photoresist coating, exposure, development, etching, and photoresist stripping.
本步骤结束时，衬底基板的结构可以如图3-11所示，其中，公共电极C形成于衬底基板11上，公共电极C由透明导电材料制成，该透明导电材料可以为氧化铟锡(英文：Indium tin oxide；简称：ITO)。图3-11中其他标记的含义可以参考图3-6，在此不再赘述。公共电极C可以和第二电润湿电极(1241和1242)构成互容式的触控电极，以实现触控功能。触控功能的实现可以参考相关技术，在此不再赘述。At the end of this step, the structure of the base substrate can be as shown in FIG. 3-11, wherein the common electrode C is formed on the base substrate 11, and the common electrode C is made of a transparent conductive material, and the transparent conductive material may be indium oxide. Tin (English: Indium tin oxide; referred to as: ITO). For the meanings of other labels in FIG. 3-11, reference may be made to FIG. 3-6, and details are not described herein again. The common electrode C and the second electrowetting electrode (1241 and 1242) can form a mutual capacitive touch electrode to implement a touch function. For the implementation of the touch function, reference may be made to related technologies, and details are not described herein again.
相关技术中在形成半导体层图案的流程为：先将用于形成半导体层的溶液滴在衬底基板上，之后旋转衬底基板使该溶液平铺在衬底基板上并干燥以形成半导体层(该形成半导体层的工艺称为旋涂工艺)，之后通过构图工艺对该半导体层进行加工以形成半导体层图案。其中，旋涂工艺中由于衬底基板不同区域在旋转时的线速度不同，进而不同区域的半导体层的形成速度也会不同，这可能导致衬底基板不同区域的半导体层的厚度等参数不同，进而使得不同区域的半导体层图案的厚度也会不同，影响了半导体层图案的质量。In the related art, in the process of forming the semiconductor layer pattern, the solution for forming the semiconductor layer is dropped on the substrate, and then the substrate is rotated to spread the solution on the substrate and dried to form a semiconductor layer ( The process of forming the semiconductor layer is referred to as a spin coating process, and then the semiconductor layer is processed by a patterning process to form a semiconductor layer pattern. Wherein, in the spin coating process, the linear velocities of different regions of the substrate substrate are different, and the formation speeds of the semiconductor layers in different regions are also different, which may result in different thicknesses of the semiconductor layers in different regions of the substrate substrate. Further, the thickness of the semiconductor layer pattern in different regions is also different, which affects the quality of the semiconductor layer pattern.
而本公开中的半导体层图案均是通过微流控技术形成的，不同区域的半导体层图案是在控制下分别形成的，可以保证不同区域的半导体层图案的厚度等参数的相似度较高，提高了半导体层图案的质量。综上所述，本公开实施例提供的显示面板制造方法，通过微流控技术在衬底基板上形成半导体层图案，无需使用光刻胶。解决了相关技术中当半导体层图案由有机半导体材料制成时，若采用传统的构图工艺制造该半导体层图案，由于该构图工艺中需要使用光刻胶，光刻胶可能污染有机半导体材料，影响半导体层图案的性能的问题。达到了可以使用各种半导体材料来形成半导体层图案的效果。The semiconductor layer patterns in the present disclosure are all formed by a microfluidic technology, and the semiconductor layer patterns of different regions are respectively formed under control, which can ensure the similarity of parameters such as the thickness of the semiconductor layer pattern in different regions is high. The quality of the semiconductor layer pattern is improved. In summary, the display panel manufacturing method provided by the embodiment of the present disclosure forms a semiconductor layer pattern on a substrate by using a microfluidic technology, without using a photoresist. In the related art, when the semiconductor layer pattern is made of an organic semiconductor material, if the semiconductor layer pattern is formed by a conventional patterning process, the photoresist may contaminate the organic semiconductor material due to the use of the photoresist in the patterning process. The problem of the performance of the semiconductor layer pattern. The effect that various semiconductor materials can be used to form a semiconductor layer pattern is achieved.
下述为本公开装置实施例，可以用于执行本公开方法实施例。对于本公开 装置实施例中未披露的细节，请参照本公开方法实施例。The following is an apparatus embodiment of the present disclosure, which may be used to implement the method embodiments of the present disclosure. For details not disclosed in the embodiments of the present disclosure, please refer to the method embodiments of the present disclosure.
图4是本公开实施例提供的一种显示面板的制造设备的结构示意图，该显示面板的制造设备用于使用图2所示的方法或图3-1所示的方法制造显示面板，该显示面板的制造设备包括：4 is a schematic structural diagram of a manufacturing apparatus of a display panel, which is used to manufacture a display panel using the method shown in FIG. 2 or the method shown in FIG. 3-1, the display Panel manufacturing equipment includes:
半导体材料溶液池20和控制电路30，控制电路30与半导体材料溶液池20电连接。The semiconductor material solution cell 20 and the control circuit 30 are electrically connected to the semiconductor material solution cell 20.
控制电路30用于通过微流控技术控制半导体材料溶液池20中的半导体材料溶液在衬底基板11(衬底基板11可以不包括在本公开实施例提供的显示面板的制造设备中)上形成多个半导体材料液滴，固化处理后的多个半导体材料液滴为半导体层图案。The control circuit 30 is configured to control the semiconductor material solution in the semiconductor material solution pool 20 by microfluidic technology to form on the base substrate 11 (the substrate substrate 11 may not be included in the manufacturing apparatus of the display panel provided by the embodiment of the present disclosure) A plurality of semiconductor material droplets, and the plurality of semiconductor material droplets after the curing process are semiconductor layer patterns.
可选的，衬底基板11上依次设置有栅导电图形和栅绝缘层，多个半导体材料液滴设置在设置有栅绝缘层的衬底基板上，栅导电图形12包括多条栅线。Optionally, the substrate substrate 11 is sequentially provided with a gate conductive pattern and a gate insulating layer. The plurality of semiconductor material droplets are disposed on the base substrate provided with the gate insulating layer, and the gate conductive pattern 12 includes a plurality of gate lines.
控制电路30分别与多条栅线(121、122和123)连接。The control circuit 30 is connected to a plurality of gate lines (121, 122, and 123), respectively.
可选的，显示面板上设置有阵列基板行驱动电路50，控制电路30可以设置在阵列基板行驱动电路50中，即在形成阵列基板行驱动电路50时，可以将控制电路30直接形成于阵列基板行驱动电路50中，该控制电路30可以在形成半导体层图案时控制栅线的电压以移动半导体材料液滴。Optionally, the display panel is provided with an array substrate row driving circuit 50, and the control circuit 30 can be disposed in the array substrate row driving circuit 50. That is, when the array substrate row driving circuit 50 is formed, the control circuit 30 can be directly formed on the array. In the substrate row driving circuit 50, the control circuit 30 can control the voltage of the gate line to move the semiconductor material droplets when forming the semiconductor layer pattern.
此外，控制电路30也可以一部分设置在阵列基板行驱动电路50中，另一部分设置在外部电路板中，示例性的，控制电路30中用于控制第一电润湿电极的控制电路可以设置在阵列基板行驱动电路50中，而用于控制第二电润湿电极的控制电路可以设置在外部电路板中。In addition, the control circuit 30 may also be partially disposed in the array substrate row driving circuit 50, and the other portion may be disposed in the external circuit board. Illustratively, the control circuit for controlling the first electrowetting electrode in the control circuit 30 may be disposed at The array substrate is driven in the row driving circuit 50, and the control circuit for controlling the second electrowetting electrode may be disposed in an external circuit board.
可选的，该显示面板的制造设备还包括卡槽40，该卡槽40用于设置衬底基板11。Optionally, the manufacturing device of the display panel further includes a card slot 40 for setting the base substrate 11 .
图4中其他标记的含义可以参考图3-7，在此不再赘述。For the meanings of other marks in FIG. 4, reference may be made to FIG. 3-7, and details are not described herein again.
综上所述，本公开实施例提供的显示面板制造设备，通过微流控技术在衬底基板上形成半导体层图案，无需使用光刻胶。解决了相关技术中当半导体层 图案由有机半导体材料制成时，若采用传统的构图工艺制造该半导体层图案，由于该构图工艺中需要使用光刻胶，光刻胶可能污染有机半导体材料，影响半导体层图案的性能的问题。达到了可以使用各种半导体材料来形成半导体层图案的效果。In summary, the display panel manufacturing apparatus provided by the embodiment of the present disclosure forms a semiconductor layer pattern on a substrate by microfluidic technology without using a photoresist. In the related art, when the semiconductor layer pattern is made of an organic semiconductor material, if the semiconductor layer pattern is formed by a conventional patterning process, the photoresist may contaminate the organic semiconductor material due to the use of the photoresist in the patterning process. The problem of the performance of the semiconductor layer pattern. The effect that various semiconductor materials can be used to form a semiconductor layer pattern is achieved.
此外。本公开实施例还提供一种显示面板，该显示面板包括由图2所示的方法或图3-1所示的方法制造的显示面板。该显示面板可以为液晶显示面板(英文：Liquid Crystal Display；简称：LCD)或有机发光二极管(英文：Organic Light-Emitting Diode；简称：OLED)显示面板。Also. Embodiments of the present disclosure also provide a display panel including a display panel manufactured by the method illustrated in FIG. 2 or the method illustrated in FIG. 3-1. The display panel can be a liquid crystal display panel (English: Liquid Crystal Display; abbreviated as: LCD) or an organic light-emitting diode (English: Organic Light-Emitting Diode; OLED) display panel.
本领域普通技术人员可以理解实现上述实施例的全部或部分步骤可以通过硬件来完成，也可以通过程序来指令相关的硬件完成，所述的程序可以存储于一种计算机可读存储介质中，上述提到的存储介质可以是只读存储器，磁盘或光盘等。A person skilled in the art may understand that all or part of the steps of implementing the above embodiments may be completed by hardware, or may be instructed by a program to execute related hardware, and the program may be stored in a computer readable storage medium. The storage medium mentioned may be a read only memory, a magnetic disk or an optical disk or the like.
以上所述仅为本公开的较佳实施例，并不用以限制本公开，凡在本公开的精神和原则之内，所作的任何修改、等同替换、改进等，均应包含在本公开的保护范围之内。The above description is only the preferred embodiment of the present disclosure, and is not intended to limit the disclosure. Any modifications, equivalent substitutions, improvements, etc., which are within the spirit and principles of the present disclosure, should be included in the protection of the present disclosure. Within the scope.

Claims (15)

  1. 一种显示面板制造方法，所述方法包括：A display panel manufacturing method, the method comprising:
    通过微流控技术在衬底基板上形成多个半导体材料液滴；Forming a plurality of droplets of semiconductor material on the substrate by microfluidic technology;
    对所述多个半导体材料液滴进行固化处理，固化处理后的所述多个半导体材料液滴形成半导体层图案。The plurality of semiconductor material droplets are subjected to a curing treatment, and the plurality of semiconductor material droplets after the curing treatment form a semiconductor layer pattern.
  2. 根据权利要求1所述的方法，所述通过微流控技术在衬底基板上形成多个半导体材料液滴之前，所述方法还包括：The method of claim 1, before the forming a plurality of semiconductor material droplets on the substrate by microfluidic technology, the method further comprising:
    在所述衬底基板上依次形成栅导电图形和栅绝缘层，所述栅导电图形包括多条栅线，所述多条栅线中的每条栅线上均包括有多个栅极，用于提供所述半导体材料液滴的半导体材料溶液池设置有多个通道，任一所述通道的一端与所述半导体材料溶液池的内部连通，另一端设置在所述多条栅线中的指定栅线包括的一个栅极的流动区域，所述多条栅线包括的任一栅极的流动区域为所述任一栅极在所述栅绝缘层上的正投影区域；Forming a gate conductive pattern and a gate insulating layer on the substrate, the gate conductive pattern includes a plurality of gate lines, each of the plurality of gate lines including a plurality of gates, Providing a plurality of channels in a pool of semiconductor material solutions for providing droplets of said semiconductor material, one end of either of said channels being in communication with an interior of said pool of semiconductor material solution, and the other end being disposed in said plurality of gate lines a gate line includes a flow region of a gate, and a flow region of any one of the plurality of gate lines includes an orthographic projection area of the gate on the gate insulating layer;
    所述通过微流控技术在衬底基板上形成多个半导体材料液滴，包括：Forming a plurality of droplets of semiconductor material on the substrate by microfluidic technology, including:
    以所述多条栅线包括的栅极作为第一电润湿电极，控制所述半导体材料溶液池中的半导体材料溶液流向形成有所述栅绝缘层的衬底基板，并在形成有所述栅绝缘层的衬底基板上形成所述多个半导体材料液滴。Controlling the semiconductor material solution in the semiconductor material solution pool to the base substrate on which the gate insulating layer is formed by using the gate electrode included in the plurality of gate lines as the first electrowetting electrode, and forming the The plurality of semiconductor material droplets are formed on the base substrate of the gate insulating layer.
  3. 根据权利要求2所述的方法，所述多条栅线包括的栅极在所述衬底基板上成行列排布，The method according to claim 2, wherein the plurality of gate lines comprise gate electrodes arranged in a row on the substrate.
    所述以所述多条栅线包括的栅极作为第一电润湿电极，控制所述半导体材料溶液池中的半导体材料溶液流向形成有所述栅绝缘层的衬底基板，并在形成有所述栅绝缘层的衬底基板上形成所述多个半导体材料液滴，包括：The gate electrode included in the plurality of gate lines is used as a first electrowetting electrode, and the semiconductor material solution in the semiconductor material solution pool is controlled to flow to the substrate substrate on which the gate insulating layer is formed, and is formed therein Forming the plurality of semiconductor material droplets on the base substrate of the gate insulating layer, including:
    向所述指定栅线施加电压，使所述半导体材料溶液池中的半导体材料溶液 流向所述指定栅线包括的栅极的多个流动区域中，并在所述多个流动区域中形成半导体材料液滴组，所述多个流动区域中的流动区域与所述半导体材料液滴组中的半导体材料液滴一一对应；Applying a voltage to the specified gate line to cause a semiconductor material solution in the semiconductor material solution pool to flow into a plurality of flow regions of a gate included in the specified gate line, and forming a semiconductor material in the plurality of flow regions a set of droplets, wherein the flow regions of the plurality of flow regions are in one-to-one correspondence with the droplets of semiconductor material in the set of droplets of semiconductor material;
    以所述多条栅线包括的栅极作为所述第一电润湿电极，控制所述半导体材料液滴组移动到目标栅线包括的栅极的多个流动区域，所述目标栅线为当前距离所述指定栅线最远且在包括的栅极的流动区域中未设置有半导体材料液滴的栅线。Controlling, by the gates included in the plurality of gate lines, as the first electrowetting electrode, moving the group of semiconductor material droplets to a plurality of flow regions of a gate included in the target gate line, the target gate line being The gate line that is currently furthest from the specified gate line and is not provided with a droplet of semiconductor material in the flow region of the included gate.
  4. 根据权利要求3所述的方法，所述以所述多条栅线包括的栅极作为所述第一电润湿电极，控制所述半导体材料液滴组移动到目标栅线包括的栅极的多个流动区域，包括：The method according to claim 3, wherein said gate electrode included in said plurality of gate lines is used as said first electrowetting electrode, and said group of semiconductor material droplets is controlled to move to a gate of said target gate line Multiple flow areas, including:
    在所述指定栅线包括的栅极的多个流动区域中的半导体材料液滴组移动出所述指定栅线包括的栅极的多个流动区域时，向所述指定栅线施加电压，控制所述半导体材料溶液池中的半导体材料溶液流向所述指定栅线包括的栅极的多个流动区域。Applying a voltage to the specified gate line when the group of semiconductor material droplets in the plurality of flow regions of the gate included in the specified gate line moves out of the plurality of flow regions of the gate included in the specified gate line The semiconductor material solution in the pool of semiconductor material solutions flows to a plurality of flow regions of the gate included in the specified gate line.
  5. 根据权利要求3所述的方法，所述多条栅线在所述衬底基板上沿预设方向排布，The method according to claim 3, wherein the plurality of gate lines are arranged in a predetermined direction on the base substrate,
    所述指定栅线为所述预设方向上位于所述多条栅线两端的两条栅线中的任意一条栅线。The specified gate line is any one of two gate lines located at two ends of the plurality of gate lines in the predetermined direction.
  6. 根据权利要求3所述的方法，所述多条栅线中任意相邻的两条栅线之间设置有第二电润湿电极图案，所述第二电润湿电极图案用于控制所述半导体材料液滴移动。The method according to claim 3, wherein a second electrowetting electrode pattern is disposed between any two adjacent ones of the plurality of gate lines, and the second electrowetting electrode pattern is used to control the The droplets of semiconductor material move.
  7. 根据权利要求6所述的方法，所述第二电润湿电极图案为线栅偏振结构，所述第二电润湿电极图案起到偏光片的效果。The method according to claim 6, wherein the second electrowetting electrode pattern is a wire grid polarization structure, and the second electrowetting electrode pattern functions as a polarizer.
  8. 根据权利要求2所述的方法，所述多条栅线中，任一栅线包括的任一栅极的面积大于预设栅线的面积，所述预设栅线为位于所述任一栅极在所述任一栅线上的正投影中的栅线。The method according to claim 2, wherein any one of the plurality of gate lines includes an area of any of the gate lines greater than an area of the predetermined gate line, and the predetermined gate line is located at any of the gate lines A gate line in an orthographic projection of any of the gate lines.
  9. 根据权利要求6所述的方法，所述对所述多个半导体材料液滴进行固化处理，固化处理后的所述多个半导体材料液滴形成半导体层图案之后，所述方法还包括：The method of claim 6, after the curing of the plurality of semiconductor material droplets, after the curing of the plurality of semiconductor material droplets to form a semiconductor layer pattern, the method further comprises:
    在形成有所述半导体层图案的衬底基板上形成绝缘层；Forming an insulating layer on the base substrate on which the semiconductor layer pattern is formed;
    在形成有所述绝缘层的衬底基板上形成公共电极图案，所述公共电极图案与所述第二电润湿电极构成触控电极。A common electrode pattern is formed on the base substrate on which the insulating layer is formed, and the common electrode pattern and the second electrowetting electrode constitute a touch electrode.
  10. 根据权利要求1所述的方法，所述对所述多个半导体材料液滴进行固化处理，包括：The method of claim 1, wherein the curing of the plurality of semiconductor material droplets comprises:
    加热形成有所述多个半导体材料液滴的衬底基板，使所述多个半导体材料液滴固化。The substrate substrate on which the plurality of semiconductor material droplets are formed is heated to cure the plurality of semiconductor material droplets.
  11. 根据权利要求1至10任一所述的方法，所述半导体材料液滴的材料包括有机半导体材料，或者，所述半导体材料液滴的材料包括所述有机半导体材料和聚合物高分子材料的混合物，所述有机半导体材料包括小分子半导体材料和高分子半导体材料。The method according to any one of claims 1 to 10, wherein the material of the droplet of the semiconductor material comprises an organic semiconductor material, or the material of the droplet of the semiconductor material comprises a mixture of the organic semiconductor material and the polymer polymer material. The organic semiconductor material includes a small molecule semiconductor material and a polymer semiconductor material.
  12. 一种显示面板的制造设备，用于使用权利要求1至11任一所述的方法制造显示面板，所述显示面板的制造设备包括：A manufacturing apparatus for a display panel for manufacturing a display panel using the method according to any one of claims 1 to 11, the manufacturing apparatus of the display panel comprising:
    半导体材料溶液池和控制电路，所述控制电路与所述半导体材料溶液池电连接；a semiconductor material solution pool and a control circuit, the control circuit being electrically connected to the semiconductor material solution pool;
    所述控制电路用于通过微流控技术控制所述半导体材料溶液池中的半导体 材料溶液在所述显示面板的衬底基板上形成多个半导体材料液滴，固化处理后的所述多个半导体材料液滴为半导体层图案。The control circuit is configured to control a semiconductor material solution in the semiconductor material solution pool to form a plurality of semiconductor material droplets on a base substrate of the display panel by a microfluidic technology, and cure the processed plurality of semiconductors The material droplets are semiconductor layer patterns.
  13. 根据权利要求12所述的显示面板的制造设备，所述衬底基板上依次设置有栅导电图形和栅绝缘层，所述栅导电图形包括多条栅线，The manufacturing apparatus of the display panel according to claim 12, wherein the substrate substrate is sequentially provided with a gate conductive pattern and a gate insulating layer, and the gate conductive pattern includes a plurality of gate lines.
    所述控制电路分别与所述多条栅线连接。The control circuit is respectively connected to the plurality of gate lines.
  14. 根据权利要求12所述的显示面板的制造设备，所述显示面板上设置有阵列基板行驱动电路，The manufacturing apparatus of the display panel according to claim 12, wherein the display panel is provided with an array substrate row driving circuit,
    所述控制电路设置在所述阵列基板行驱动电路中。The control circuit is disposed in the array substrate row driving circuit.
  15. 一种显示面板，所述显示面板包括权利要求1至11任一所述方法制造的显示面板。A display panel comprising the display panel manufactured by the method of any one of claims 1 to 11.
PCT/CN2018/078754 2017-05-11 2018-03-12 Display panel manufacturing method, display panel manufacturing device, and display panel WO2018205735A1 (en)

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