WO2018182669A1

WO2018182669A1 - Spin orbit coupling shift register memory device

Info

Publication number: WO2018182669A1
Application number: PCT/US2017/025261
Authority: WO
Inventors: Sasikanth Manipatruni; Dmitri E. Nikonov; Ian A. Young
Original assignee: Intel Corporation
Priority date: 2017-03-31
Filing date: 2017-03-31
Publication date: 2018-10-04

Abstract

Techniques are disclosed for forming and using a "racetrack memory" (also referred to as a "shift register") that reads and writes data to magnetic domains within a ferromagnetic conductor using the Rashba Bychkov ("RB") effect. The RB effect enables strong electron spin polarization ("spin-orbit coupling") in an "out of plane" direction - that is, in a direction perpendicular to an interface between the ferromagnetic conductor and an RB conductor. With this out of plane polarization, the RB effect can more efficiently (e.g., with a lower current) and more read and write data to domains in the shift register.

Description

SPIN ORBIT COUPLING SHIFT REGISTER MEMORY DEVICE

BACKGROUND

One common type of non-volatile data storage used in computing systems is magnetic disk drive technology. Magnetic disk drives are economical, but generally considered to have uncertain reliability due to moving components that can fail from wear or malfunction. An alternative form of non-volatile storage media is solid state random access memory (RAM). Solid state RAM is generally considered to have better reliability than magnetic disk drive storage because it does not have moving components. But solid state RAM is relatively expensive and has relatively slow reading and writing speeds. Magnetic RAM (MRAM) is another type of solid state RAM. An MRAM stores data with magnetic tunnel junction (MTJ) based bit cell formed from two ferromagnetic layers separated by a thin insulating layer. One of the ferromagnetic layers has a fixed magnetization, while magnetization of the other

ferromagnetic layer can be changed (based on external field) to store data with the bit cell. A memory device includes a grid of such bit cells. But this type of memory device has yet to be adopted widely.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 A is a schematic illustration of a shift register ("racetrack") memory device.

FIG. IB is a schematic illustration of a magnetic tunnel junction transistor.

FIG. 2 A is a schematic illustration of the spin Hall effect ("SHE") exhibited in a domain of a ferromagnet, as can be applied in a shift register memory device, in accordance with an embodiment of the present disclosure.

FIG. 2B is a schematic illustration of the Rashba-Bychkov ("RB") effect exhibited in a domain of a ferromagnet, as can be applied in a shift register memory device, in accordance with an embodiment of the present disclosure.

FIG. 3 is a schematic illustration of an example RB shift register memory device architected to write and read a bit of data to and from, respectively, a shift register using the Rashba-Bychkov effect, in accordance with an embodiment of the present disclosure.

FIGS. 4A to 4C illustrate a shift of bits through an example RB shift register memory device, in accordance with an embodiment of the present disclosure. FIG. 5 is a graph of polarization current versus write delays for writing bits to a magnetic domain using in plane electron polarization compared to out of plane electron polarization, in accordance with an embodiment of the present disclosure.

FIG. 6 illustrates an example method for fabricating an example RB shift register memory device, in accordance with an embodiment of the present disclosure.

FIG. 7 is a depiction of a computing system configured in accordance with an

embodiment of the present disclosure.

The figures depict various embodiments of the present disclosure for purposes of illustration only. Numerous variations, configurations, and other embodiments will be apparent from the following detailed discussion. Furthermore, as will be appreciated, the figures are not necessarily drawn to scale or intended to limit the described embodiments to the specific configurations shown. For instance, while some figures generally indicate straight lines, right angles, and smooth surfaces, an actual implementation of the disclosed techniques may have less than perfect straight lines and right angles, and some features may have surface topography or otherwise be non-smooth, given real-world limitations of fabrication processes. In short, the figures are provided merely to show example structures.

DETAILED DESCRIPTION

Techniques are disclosed for forming and using a "racetrack memory" device (also referred to as a "shift register" memory device) that reads and writes data to magnetic domains within a ferromagnetic conductor using the Rashba Bychkov ("RB") effect produced by spin orbit coupling ("SOC"). Spin orbit coupling can result in other phenomena, such as the spin Hall effect ("SHE") and the Rashba effect. The RB effect and the Rashba effect are primarily exhibited at a material surface or at an interface between materials, unlike the SHE which is exhibited in bulk material.

Also, the RB effect enables strong electron spin polarization for electron spins in an "out of plane" direction. The "out of plane" direction is in a direction perpendicular to an interface between the ferromagnetic conductor and a two dimensional material that exhibits the RB effect. This is unlike the SHE and the Rashba effect, which produce "in plane" electron spin

polarizations parallel to a material surface or interface. The out of plane polarization produced by the RB effect can write bits to and read bits from a shift register memory device and increase an efficiency of shift register memory devices by writing in less time and using lower currents compared to other mechanisms (e.g., STT, which usually requires a magnetic tunnel junction). For at least these reasons, device configurations described herein improve shift register memory device performance.

A shift register memory device according to an embodiment of the present disclosure is fabricated by disposing a ferromagnetic conductor having a plurality of linearly adjacent magnetic domains on (and in some examples, in contact with) a second conductor. Some examples of materials that can be used for a second conductor include platinum, beta-phase tungsten, and beta-phase tantalum, which can exhibit the SHE. Other example materials that can be used for the second conductor include, for instance, heterostructures fabricated from layers of copper, silver, and bismuth. These heterostructures can exhibit the Rashba effect. Regardless of the phenomenon, the in plane electron spin polarization produced by the SHE is convenient for advancing magnetic domains through the ferromagnetic conductor from a write terminal to a read terminal.

Read and write terminals of an example RB shift register device according to an embodiment are disposed at opposite ends of the ferromagnetic conductor and can be fabricated from any of a variety of two dimensional materials. The two dimensional materials used for the read and write terminals (referred to herein as Rashba-Bychkov materials or RB materials) of the RB shift register exhibit the RB effect and thus, as described above, efficiently write and read spin polarized electrons to and from a magnetic domain. Example two dimensional materials that exhibit the RB effect include, but are not limited to, transition metal dichalcogenide family members, graphene, and two dimensional heterostructures. Examples of dichalcogenide two dimensional materials include graphene, MoS₂, WSe₂, WS₂, and MoSe_2. Example two dimensional heterostructures include, but are not limited to, a first layer of a first electrically conductive material in contact with an adlayer of a second electrically conductive material. The adatoms of the adlayer form a surface alloy with the first electrically conductive material. In some embodiments, the two dimensional materials include an absorbent element, such as copper (Cu), silver (Ag), platinum (Pt), bismuth (Bi), francium (Fr), and hydrogen (H). The RB layer may comprise materials ROCh₂, where 'R' can comprise at least one of: lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), strontium (Sr), scandium (Sc), gallium (Ga), aluminum (Al), and indium (In), and where "Ch" is a chalcogenide element that is one of S, Se, and Te.

By selecting materials and architectures that take advantage of the RB effect to polarize electron spin in an out of plane direction, the electrical current and time delay needed to read/write data to the shift register and move magnetic domains (corresponding to bits of data) through the shift register is greatly improved over shift register memory devices and other MRAM devices that do not use the RB effect.

General Overview

A schematic illustration of a shift register memory device 100 that does not utilize the RB effect appears in FIG. 1 A. The shift register memory device 100 includes a ferromagnetic conductor 104, a magnetic tunnel junction (MTJ) write device 112, a MTJ read device 116, and electrodes 120A, 120B, 124A, and 124B. Note that other materials (e.g., insulator fill materials to provide planarity and structural integrity) as well as other neighboring layers or structures (e.g., lower device layer, upper interconnect layers) are not shown, to allow for focus on the subject matter of the present disclosure.

The shift register memory device 100 includes a ferromagnetic conductor 104 that has a plurality of linearly adjacent magnetic domains 108A-108N. As used herein, the phrase

"linearly adjacent" refers to a single row of domains, wherein each domain is in contact with two neighboring domains except for the terminal domains that are in contact with only one neighboring domain. Each magnetic domain includes electrons having a same spin polarization. The ferromagnetic conductor 104 can be fabricated from an anisotropically magnetized material, such as alloys of at least two of iron, platinum, and palladium. The ferromagnetic conductor can also be fabricated from multilayer structures of cobalt and nickel or multilayer structures of cobalt and palladium. The domain magnetizations are shown as "up" and "down" arrows in FIG. 1 A. Operation of the shift register memory device 100 can be understood by first examining the "writing" of a bit (i.e., providing spin polarized electrons) to a magnetic domain in the ferromagnetic conductor 104. Writing a bit is accomplished in the example device 100 using the MTJ write device 112. The MTJ write device 112 writes to proximately disposed write domain 114 by providing spin polarized electrons (indicated by an "up" arrow) to the write domain 114. This can, in some cases, be accomplished using the spin torque transfer ("STT") in which a current is applied to the MTJ write device 112 via contacts 120A and 120B. The electrons in the current are spin polarized by passing through a magnetized "reference layer" (described below in the context of FIG. IB). These spin polarized electrons then can transfer momentum to electrons in the adjacent write monodomain 114, thus causing the magnetization of the write domain 114 to be either "up" or "down." The STT phenomena also enables the "shifting" of magnetic domains progressively from one end of a ferromagnetic conductor 104 (corresponding to where spins are "written" into a domain) to an opposing end (corresponding to where spins are "read" from a domain). A current is applied through the ferromagnetic conductor 104. This current contains electrons that become spin polarized as they travel through each domain. That is, electrons in the applied current become polarized to match the spin polarization of the electrons within each successive domain 108A-108N that the electrons in the current flow through. So, as the current passes into a magnetic domain wall that separates magnetic domains (e.g., between domains 108 A and 108B, between 108B and 108C), each electron in the current that passes into a new domain contributes a unit of magnetic moment in the direction of spin of the old domain to the new domain. If the spin of the electron entering the new domain is of a different polarization from the new domain, a sufficient number of electrons can switch the spin polarization of the domain. This has the effect of "advancing" or "shifting" a spin from one domain to an adjacent domain. As each domain 108 A to 108N is shifted through the ferromagnetic conductor 104, the domains 108 A to 108N sequentially pass through the location corresponding to the read domain 118. The MTJ read device 1 16 then determines a spin polarization, which results in determining a bit value (i.e., either a "0" or a "1") as a function of the spin polarized induced resistance detectable within the MTJ read device 116. This is described below in more detail in the context of FIG. IB. Electrodes 120A, 120B, 124A, and 124B are electrical contacts, often fabricated from a metal (e.g., tungsten, aluminum, copper) and/or a metal and a liner (e.g., silicon nitride) that are used to supply and detect electrical signals associated with the MTJ write device 112, and the MTJ read device 116.

These electrodes also can supply current to the ferromagnetic conductor 104.

An example structure of an MTJ device 128 is shown in FIG. IB. An MTJ can be used to form some or all of the MTJ write device 112 and the MTJ read device 116. The example MTJ 128 includes a reference layer 130, a barrier layer 134, and a free layer 138.

The so-called fixed or reference layer 130 of an MTJ is fabricated from a relatively hard ferromagnetic material (i.e., having a high magnetic coercivity). Types of materials used to fabricate the reference layer 130 include permanent magnetic materials. In one example, the reference layer 130 is fabricated from a single layer of cobalt iron boron (CoFeB). In another example, the reference layer 130 is composed of a stack of materials that include a cobalt iron boron (CoFeB) layer, a ruthenium (Ru) layer, and a cobalt iron boron (CoFeB) layer. The free layer 138 is generally made from a "soft" ferromagnetic material with a lower magnetic coercivity that the reference layer so that the direction of magnetization (i.e., the spin

polarization of the electrons in the free layer 138) can be switched at a lower magnetic field strength than the reference layer 130. The soft ferromagnetic material of the free layer 138 can then switch between states of magnetization direction relative to that of the reference layer 130. This results in changing an electrical resistance between the free layer 130 and the reference layer 130. The barrier layer 134 is generally a dielectric material configured to permit electrons to tunnel through it into the free layer 138. The barrier layer 134 can facilitate selective tunneling so that electrons having a preferred spin polarity can tunnel from the reference layer 130 through the barrier layer 134 into the free layer 138. This selective tunneling can be used to control the magnetization polarity of electrons in the free layer 138.

In the context of the shift register memory device 100, the free layer 138 of the MTJ write device 112 corresponds to write domain 114. Analogously, the free layer 138 of the MTJ read device 116 corresponds to the read domain 118. That is, the reference layer 130 of the MTJ write device 112 can be used to transfer spin torque to the lower coercivity write domain 114 of the ferromagnetic conductor 104. The reference layer 130 of the MTJ read device 116 can be used to determine the spin polarization of the read domain 118 as a function of the electrical resistance between the read domain 118 and the reference layer 130.

An electrical resistance is determined between the reference layer 130 and the free layer 138 (or, more specific to the device of FIG. 1A, between a reference layer 130 and one of the write domain 114 and the read domain 118). The determined resistance is then correlated with a bit value of "0" or "1."

The shift register memory device 100 depicted in FIG. 1 A, which uses MTJ devices to read and write bits to and from a shift register, has relatively low read and write speeds. Also, devices configured like the shift register memory device 100 also generally use higher electrical currents that consume more power and produce more waste heat than would be preferred.

Thus, in accordance with the present disclosure, to overcome the higher electrical currents and low read and write speeds presented in the context of the shift register device 100 (and common with other solid state memory devices), embodiments described herein include a shift register memory device that uses the RB effect to write and read spin polarized electrons to and from, respectively, magnetic domains. Using a write terminal fabricated from a Rashba- Bychkov conductor material, a Rashba-Bychkov ("RB") write device can apply a spin polarized current to a proximate domain (i.e., a write domain) of a ferromagnetic conductor. The spin polarization of the write domain can then shifted through a ferromagnetic conductor using any of a variety of SOC effects, whether the RB effect, the SHE, or the Rashba effect. Similarly, an RB read terminal can be fabricated from an RB material to more efficiently read bits from a ferromagnetic conductor.

As a result, shift register memory devices of the present disclosure use a lower electrical current and have lower read/write times compared to devices that rely on other phenomena (e.g., STT), like those of the shift register memory device 100. The improvement in RB shift register memory device operation is believed to be related, in part, to the orientation of spin polarization produced by the RB effect. This spin polarization orientation is different than those produced by other spin phenomenon, such as the SHE. FIGS. 2A and 2B illustrate an example of this difference.

FIG. 2A illustrates a spin orientation for electron spins polarized using phenomena that produce "in plane" electron spin polarization, such as the SHE. It will be appreciated that other phenomena used for spin polarization (e.g., the Rashba effect) will produce similarly oriented electron spins. As shown in FIG. 2A, a current is applied to a conductor. Because the example illustrated in FIG. 2A presumes that electrons are the predominant charger carriers, the electrons are shown flowing in a direction opposite that of the applied current. With no externally applied magnetic field, electrons having opposite spins are deflected to opposite surfaces of the conductor, as illustrated in FIG. 2A. The spin polarization in the SHE produces "in plane" electron spins parallel to a plane of the conductor, as indicated in FIG. 2A by arrows parallel to a top surface of the conductor.

FIG. 2B illustrates spin polarization induced by the recently discovered Rashba Bychkov ("RB") effect. Much like the SHE, the RB effect causes polarization of electrons having a same spin at lateral surfaces of an electrical conductor carrying an electrical current. Opposite lateral surfaces of the conductor accumulate electrons having opposite spins. However, unlike the SHE illustrated in FIG. 2A, the direction of the electron spins polarized by the RB effect is perpendicular to the lateral surfaces of the conductor, as indicated by the up and down arrows in FIG. 2A.

The techniques disclosed herein for forming and using RB shift register memory devices may provide various advantages. For example, RB shift register memory devices typically use lower electrical current (and thus produce less heat) to write to and read from a ferromagnetic conductor compared to shift register memory devices that rely on mechanisms other than the RB effect (e.g., magnetic tunnel junctions). Furthermore, for a given applied current, RB shift register memory devices can write and read bits in less time than non-RB effect shift memory devices. Thus, an RB shift register memory device has an improved efficiency and performance compared to non-RB shift register memory devices. Other advantages will be apparent in light of this disclosure. Also, numerous variations and configurations will be apparent in light of this disclosure.

Rashba Bychkov Shift Register Architecture

FIG. 3 illustrates an example embodiment 300 of an RB shift register memory device 300. The RB shift register device 300 includes a ferromagnetic conductor 304, a second conductor 312, a write terminal 316, a read terminal 320, electrodes 324A and 324B, electrodes 328A and 328B, and electrodes 332A and 332B. Note that other materials (e.g., insulator fill materials to provide planarity and structural integrity) as well as other neighboring layers or structures (e.g., lower device layer, upper interconnect layers) are not shown, to allow for focus on the subject matter of the present disclosure. In some embodiments, the device 300 may be in a dedicated layer, while in other embodiments, device 300 may be integrated into another layer, such as within a interconnect layer or a device layer. Any number of such configurations can be used, so long as adequate insulation and needed interconnect structure is provisioned, as will be appreciated.

The ferromagnetic conductor 304 includes a plurality of linearly adjacent magnetic domains 308A-308N, each of which can include spin polarized electrons. The ferromagnetic conductor 304 and its domains 308A-308N have functions analogous to the ferromagnetic conductor 104 and its domains 108A-108N, respectively, described above in the context of FIG. 1 A. That is, the domains 308A-308N having uniform electron spin polarizations can be shifted through the ferromagnetic conductor and ultimately read as bits of data.

Examples of materials that can be used for the ferromagnetic conductor 304 include any anisotropically magnetized material, such as an alloy comprising iron, platinum, and cobalt. Other examples of materials that can be used for the ferromagnetic conductor 304 include multilayer structures of cobalt (layer A) and nickel (layer B) or cobalt (layer A) and palladium (layer B). Generally the material used for the ferromagnetic conductor 304 has an electrical resistivity that is higher (e.g., as much as an order of magnitude or more higher) than the material used for the second conductor 312, described below.

The second conductor 312 is used to shift magnetic domains 308A-308N through the ferromagnetic conductor 304. This can be accomplished by passing a current through the second conductor 312. When fabricated from a material that can induce spin polarization (e.g., by the SHE or Rashba effect), the polarized spins in the second conductor exert a force on domain walls between the magnetic domains 308A-308N within the ferromagnetic conductor 304. It is this force that shifts the domains 308A-308N through the ferromagnetic conductor 304.

In some examples, the second conductor 312 is disposed directly on (i.e., in direct contact with) the ferromagnetic conductor 304. In other examples, an intervening layer of a nonmagnetic material (e.g., a dielectric material such as silicon nitride or silicon dioxide) is disposed between the second conductor 312 and the ferromagnetic conductor 304. If an intervening layer is present between the second conductor 312 and the ferromagnetic conductor 304, the intervening layer thickness is less than a spin relaxation length for an electron in the intervening material. Having a thickness less than the spin relaxation length facilitates transmission of the force from the second conductor 312 to the domain walls of the ferromagnetic conductor 304 described above. For example, a spin relaxation length for an electron in copper is

approximately 400 nm. Thus, an intervening layer of silicon dioxide would be configured to be less than 200 nm. Having either no intervening layer or a sufficiently thin intervening layer allows spin orbit coupling between electrons of the second conductor 312 and the domains 308A-308N of the ferromagnetic conductor 304.

Examples of materials that can be used to fabricate the second conductor 312 include, but are not limited to, materials such as platinum, beta-phase tungsten, and beta-phase tantalum. These materials can produce the SHE. Heterostructures including layers of at least two of copper, silver, and bismuth may also be used for the second conductor 312. These latter materials can produce the Rashba surface effect.

The write terminal 316, fabricated from an RB material, uses the RB effect to efficiently introduce electrons having a polarization that corresponds to a bit (e.g., that can be interpreted as either a "1" or a "0") to a write domain 318 in the ferromagnetic conductor 304. The write terminal 316 is fabricated from two dimensional materials and two dimensional heterostructures, collectively referred to herein as "RB materials." Example two dimensional materials used to fabricate the write terminal 316 (and the read terminal 320, described below) include, but are not limited to, transition metal dichalcogenide family members (e.g., MoS₂) and graphene. Example two dimensional heterostructures include, but are not limited to, a first layer of a first electrically conductive material in contact with an adlayer of a second electrically conductive material. The adatoms of the adlayer form a surface alloy with the first electrically conductive material. For example, a heterostructure of silver with copper adatoms can produce the RB effect.

Analogously, the read terminal 320 (also fabricated from an RB conductor) uses an inverse RB effect to read an electron polarization from a proximately disposed read domain 322. That is, a current is induced in the read terminal 320 having a spin polarization opposite to the spin polarization in the read domain 322. This enables the bit corresponding to the spin polarization in the read domain 322 to be detected and correlated with a bit value.

In the example RB shift memory device 300, the terminals 316, 320 are separated and electrically insulated from the second conductor 312. In examples, the separation between write terminal 316 and the second conductor 312 and the separation between the read terminal 320 and the second conductor 312 is 300 nm or less. Configuring the separation below 300 nm enables convenient propagation of domain walls, which enables the "shifting" of bits through the memory device 300, as described above. The separation and electrical insulation between the terminals 316, 320 and the second conductor 312 prevents electrical shorting between these components. Electrical insulation can be accomplished by encapsulating the terminals 316, 320 and the second conductor 312 in an electrically insulating material. These materials include, but are not limited to nitrides (e.g., S1₃N₄), oxides (e.g. Si0₂, A1₂0₃), oxynitrides (e.g., SiO_xN_y), carbides (e.g., SiC), oxycarbides, polymers, silanes, siloxanes, or other suitable insulator materials. In some embodiments, the insulator material can be an ultra-low-k insulator materials, low-k dielectric materials, or high-k dielectric materials depending on the application. Example low-k and ultra-low-k dielectric materials include porous silicon dioxide, carbon doped oxide (CDO), organic polymers such as perfluorocyclobutane or polytetrafluoroethylene, fluorosilicate glass (FSG), and organosilicates such as silsesquioxane, siloxane, or organosilicate glass. Examples of high-k dielectric materials include, for instance, hafnium oxide, hafnium silicon oxide, lanthanum oxide, lanthanum aluminum oxide, zirconium oxide, zirconium silicon oxide, tantalum oxide, titanium oxide, barium strontium titanium oxide, barium titanium oxide, strontium titanium oxide, yttrium oxide, aluminum oxide, lead scandium tantalum oxide, and lead zinc niobate..

The various electrodes 324A and 324B, 328A and 328B, and 332A and 332B are used to transmit and/or receive electrical signals to the various components fabricated from RB materials, thus enabling use of and electrical communication to and from the RB shift register memory device 300. For example, electrodes 324A and 324B are electrical contacts (i.e., a signal electrode and a ground electrode) to the write terminal 316. Electrodes 328 A and 328B are electrical contacts (i.e., a signal electrode and a ground electrode) to the second conductor 312. Electrodes 332A and 332B are electrical contacts (i.e., a signal electrode and a ground electrode) the read terminal 320.

The various electrodes 324A and 324B, 328A and 328B, and 332A and 332B can be fabricated from any material commonly used to make electrical contact with structures in a circuit. These materials include tungsten, aluminum, copper, and alloys thereof, among others. Furthermore, in some examples, a liner material can be disposed around the conductive electrode material and optionally between the conductive electrode material and the RB material used for the second conductor 312, the write terminal 316, and/or the read terminal 320. Example materials used for the optional liner include, but are not limited to silicon nitride.

FIGS. 4A to 4C schematically illustrate the "shifting" of magnetic domains

(corresponding to bits of data) through an example RB shift register memory device, in an embodiment of the present disclosure. As shown in FIG. 4A, an RB shift register memory device 400 includes a ferromagnetic conductor 404 comprising domains 408A-408D, a second conductor 412, an RB write terminal 416, an RB read terminal 420, a write domain 418 and a read domain 422. These elements of the RB shift register memory are analogous to those described above in the context of FIG. 3. Furthermore, electrodes shown in FIG. 3 are omitted from FIGS. 4A to 4C for convenience.

As shown in FIG. 4A, each of the domains 4A to 4D includes an electron spin polarization indicated by an "up" arrow. FIG. 4B illustrates a scenario in which the RB write terminal 416 writes a bit to the write domain using the RB effect, as described above. This bit, indicated by a "down arrow" in FIG. 4B is then shifted by applying an electrical current to the second conductor 412 and the ferromagnetic conductor 404, inducing for example the SHE. This shifting also moves domain 408D into position under the RB read terminal 420. As described above, the RB read terminal 420 determines the spin polarization at the read domain 422 using an inverse RB effect, thus also determining a bit data value of "1" or "0." FIG. 4C merely illustrates a repetition of the scenario illustrated in FIG. 4B, in which domain 408C is shifted to read domain 422 and read by the read terminal 420.

Performance Improvement from Rashba Bychkov Shift Register Architecture

FIG. 5 illustrates results of simulations showing an improvement in efficiency for RB read/write terminal shift register memory devices compared to shift register memory devices that use in plane spin polarization to read and write bits to a ferromagnetic conductor. Simulation results for both "out of plane" electron spin polarization and "in plane" electron spin polarization are shown in FIG. 5 in terms of energy per "write" event (as measured in femto Joules or "fj") versus time required to complete the write event. "In plane" simulation results are based on device models that include elements fabricated from platinum (Pt), tantalum (Ta), and tungsten (W). Examples of these devices include devices configured to induce, for example, the SHE or the Rashba effect.

"Out of plane" simulation results, model the efficiency of applying a spin polarization to a domain by an example RB shift memory device (e.g., device 300). The simulation results for out of plane effects are based on three different model coefficients selected to be comparable to platinum, tantalum, and tungsten used for the "in plane" simulations.

As shown in FIG. 5, and described above for shift register memory devices that read and write bits using the RB effect, "out of plane" spin polarization can write bits with lower energy levels for a given delay. In some cases, "out of plane" spin polarization writing requires energy that is orders of magnitude lower than "in plane" writing.

Example Method FIG. 6 illustrates an example method 600 for fabricating an RB memory device of the present disclosure. A first conductor comprising a ferromagnet is formed 604 from any of the materials described above for ferromagnetic conductor 304. Deposition (and subsequent thermal processing) techniques to form 604 the first conductor can be any that produce a polycrystalline, ferromagnetic conductor. These techniques include formation 604 by chemical vapor deposition (CVD), sputtering, atomic layer deposition (ALD) among others, provided that subsequent thermal processes produces separate single crystals within the first conductor.

A second conductor is then formed 608 on the first conductor. As described above, the second conductor may be formed from any of the materials indicated above, including but not limited to platinum, beta-phase tungsten, and beta-phase tantalum. Techniques for forming 608 the second conductor can include chemical vapor deposition (CVD), sputtering, atomic layer deposition (ALD).

A read terminal is formed 612 at a first end of the first conductor and a write terminal is formed 612 is formed at a second end of the first conductor opposite the first end. As described above, the read device and the write device are formed using RB materials that include two dimensional materials, such as dichalcogenides, graphene, and two dimensional heterostructures. Techniques for forming 612 the read and write terminals from a dichalcogenide materials include epitaxial deposition techniques (e.g., molecular beam epitaxy, or "MBE"). When the read and write terminals are formed 612 from a heterostructure, techniques for formation 612 can include epitaxial deposition techniques and non-epitaxial deposition techniques, such as sputtering or chemical vapor deposition.

Electrodes, formed from materials described above in the context of FIG. 3, are then formed 616 on the read device, the write device, and the second conductor. Processes used to form 616 the electrical contacts include at least one of: disulfur dinitride (S₂N₂); titanium nitride (TiN); tantalum nitride (TaN); copper (Cu); tungsten (W); titanium (Ti); one or more noble metals, such as ruthenium (Ru), rhodium (Rh), palladium (Pd), silver (Ag), osmium (Os), iridium (Ir), platinum (Pt), and gold (Au); and/or any other suitable material or combination of materials, as will be apparent in light of this disclosure. The formation 612 of the electrodes can be performed using any of a variety of techniques that include, but are not limited to epitaxial growth, sputtering, chemical vapor deposition (CVD), atomic layer deposition (ALD), photolithography and other patterning techniques, and planarization techniques (e.g., chemical and/or mechanical polishing).

An insulator material may be optionally formed to prevent unintentional (i.e., electrical shorting) contact between the read device and the second conductor and between the write device and the second conductor. Example insulator materials that can be used are described above in the context of FIG. 3. Techniques for forming the insulator material can be any of a wide range of suitable deposition techniques, including but not necessarily limited to: physical vapor deposition (PVD); chemical vapor deposition (CVD); spin coating/spin-on deposition (SOD); and/or a combination of any of the aforementioned. Other suitable configurations, materials, deposition techniques, and/or thicknesses for the insulator material will depend on a given application and will be apparent in light of this disclosure.

Use of the techniques and structures provided herein may be detectable using tools such as: electron microscopy including scanning/transmission electron microscopy (SEM/TEM), scanning transmission electron microscopy (STEM), and reflection electron microscopy (REM); composition mapping; x-ray crystallography or diffraction (XRD); energy-dispersive x-ray spectroscopy (EDS); secondary ion mass spectrometry (SFMS); time-of-flight SFMS (ToF- SFMS); atom probe imaging or tomography; local electrode atom probe (LEAP) techniques; 3D tomography; or high resolution physical or chemical analysis, to name a few suitable example analytical tools. In particular, in some embodiments, such tools may be used to detect a presence of RB conductors and view an architecture of a shift memory device indicative of an RB shift register memory device.

Example System

FIG. 7 is an example computing system implemented with one or more of the integrated circuit structures as disclosed herein, in accordance with some embodiments of the present disclosure. As can be seen, the computing system 700 houses a motherboard 702. The motherboard 702 may include a number of components, including, but not limited to, a processor 704 and at least one communication chip 706, each of which can be physically and electrically coupled to the motherboard 702, or otherwise integrated therein. As will be appreciated, the motherboard 702 may be, for example, any printed circuit board, whether a main board, a daughterboard mounted on a main board, or the only board of system 700, etc.

Depending on its applications, computing system 700 may include one or more other components that may or may not be physically and electrically coupled to the motherboard 702. These other components may include, but are not limited to, volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), a graphics processor, a digital signal processor, a crypto processor, a chipset, an antenna, a display, a touchscreen display, a touchscreen controller, a battery, an audio codec, a video codec, a power amplifier, a global positioning system (GPS) device, a compass, an accelerometer, a gyroscope, a speaker, a camera, and a mass storage device (such as hard disk drive, compact disk (CD), digital versatile disk (DVD), and so forth). Any of the components included in computing system 700 may include one or more integrated circuit structures or devices configured in accordance with an example embodiment (e.g., to include one or more RB shift register memory devices, as variously provided herein). In some embodiments, multiple functions can be integrated into one or more chips (e.g., for instance, note that the communication chip 706 can be part of or otherwise integrated into the processor 704).

The communication chip 706 enables wireless communications for the transfer of data to and from the computing system 700. The term "wireless" and its derivatives may be used to describe circuits, devices, systems, methods, techniques, communications channels, etc., that may communicate data through the use of modulated electromagnetic radiation through a non- solid medium. The term does not imply that the associated devices do not contain any wires, although in some embodiments they might not. The communication chip 706 may implement any of a number of wireless standards or protocols, including, but not limited to, Wi-Fi (IEEE 802.11 family), WiMAX (IEEE 802.16 family), IEEE 802.20, long term evolution (LTE), Ev- DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM, GPRS, CDMA, TDMA, DECT, Bluetooth, derivatives thereof, as well as any other wireless protocols that are designated as 3G, 4G, 5G, and beyond. The computing system 700 may include a plurality of communication chips 706. For instance, a first communication chip 706 may be dedicated to shorter range wireless communications such as Wi-Fi and Bluetooth and a second communication chip 406 may be dedicated to longer range wireless communications such as GPS, EDGE, GPRS, CDMA, WiMAX, LTE, Ev-DO, and others. In some embodiments, communication chip 406 may include one or more transistor structures having a gate stack an access region polarization layer as variously described herein.

The processor 704 of the computing system 700 includes an integrated circuit die packaged within the processor 704. In some embodiments, the integrated circuit die of the processor includes onboard circuitry that is implemented with one or more integrated circuit structures or devices as variously described herein. The term "processor" may refer to any device or portion of a device that processes, for instance, electronic data from registers and/or memory to transform that electronic data into other electronic data that may be stored in registers and/or memory.

The communication chip 706 also may include an integrated circuit die packaged within the communication chip 706. In accordance with some such example embodiments, the integrated circuit die of the communication chip includes one or more integrated circuit structures or devices as variously described herein. As will be appreciated in light of this disclosure, note that multi -standard wireless capability may be integrated directly into the processor 704 (e.g., where functionality of any chips 706 is integrated into processor 704, rather than having separate communication chips). Further note that processor 704 may be a chip set having such wireless capability. In short, any number of processor 704 and/or communication chips 706 can be used. Likewise, any one chip or chip set can have multiple functions integrated therein.

In various implementations, the computing system 700 may be a laptop, a netbook, a notebook, a smartphone, a tablet, a personal digital assistant (PDA), an ultra-mobile PC, a mobile phone, a desktop computer, a server, a printer, a scanner, a monitor, a set-top box, an entertainment control unit, a digital camera, a portable music player, a digital video recorder, or any other electronic device that processes data or employs one or more integrated circuit structures or devices formed using the disclosed techniques, as variously described herein.

Further Example Embodiments

The following examples pertain to further embodiments, from which numerous permutations and configurations will be apparent.

Example 1 includes a shift register memory device comprising: a first conductor comprising a ferromagnetic material, the first conductor including a plurality of linearly adjacent magnetic domains; a second conductor on the first conductor over at least some of the plurality of linearly adjacent magnetic domains in the first conductor; and a read terminal at a first end of the first conductor and a write terminal at a second end of the first conductor opposite the first end, at least one of the read terminal and the write terminal comprising a Rashba-Bychkov material.

Example 2 includes the subject matter of Example 1, wherein the write terminal is configured to apply an out of plane electron spin polarization in a proximately disposed write domain.

Example 3 includes the subject matter of Example 1 or 2, wherein the write terminal further comprises a ground electrode and a signal electrode, the signal electrode in electrical contact with the write terminal.

Example 4 includes the subject matter of any of Examples 1 through 3, wherein the read terminal is configured to determine an electron spin polarization in a proximately disposed read domain using an inverse Rashba-Bychkov effect.

Example 5 includes the subject matter of any of Examples 1 through 4, wherein the read terminal further comprises a ground electrode and a signal electrode, the signal electrode in electrical contact with the read terminal. Example 6 includes the subject matter of any of Examples 1 through 5, further comprising a first electrode at a first end of the second conductor and a second electrode at a second end of the second conductor.

Example 7 includes the subject matter of any of Examples 1 through 6, wherein the ferromagnetic material of the first conductor comprises at least two of iron, platinum, and palladium.

Example 8 includes the subject matter of any of Examples 1 through 6, wherein the ferromagnetic material of the first conductor comprises a multilayer structure that includes a layer of cobalt and a layer of nickel.

Example 9 includes the subject matter of any of Examples 1 through 6, wherein the ferromagnetic material of the first conductor comprises a multilayer structure that includes a layer of cobalt and a layer of palladium.

Example 10 includes the subject matter of any of Examples 1 through 9, wherein the second conductor is in direct contact with the first conductor.

Example 11 includes the subject matter of any of Examples 1 through 10, wherein the second conductor comprises at least one of platinum, beta-phase tungsten, and beta-phase tantalum.

Example 12 includes the subject matter of any of Examples 1 through 10, wherein the second conductor comprises a heterostructure of at least two of a copper layer, a silver layer, and a bismuth layer.

Example 13 includes the subject matter of any of Examples 1 through 9 and Example 11, further comprising an intervening layer of non-magnetic material disposed between the first conductor and the second conductor, the intervening layer of non-magnetic material having a thickness less than a spin relaxation length of the second conductor.

Example 14 includes the subject matter of Example 13, wherein the intervening layer of non-magnetic material is copper having a thickness of less than 200 nm.

Example 15 includes the subject matter of any of Examples 1 through 14, wherein the Rashba-Bychkov material comprises a two dimensional material.

Example 16 includes the subject matter of any of Examples 1 through 14, wherein the Rashba-Bychkov material comprises graphene.

Example 17 includes the subject matter of any of Examples 1 through 14, wherein the Rashba-Bychkov material comprises a dichalcogenide material.

Example 18 includes the subject matter of Example 17, wherein the dichalcogenide material comprises a metal and one of sulfur, selenium, and tellurium. Example 19 includes the subject matter of Example 18, wherein the metal of the dichalcogenide material comprises one of molybdenum and tungsten.

Example 20 includes the subject matter of Example 17, wherein the dichalcogenide material comprises oxygen and at least one of lanthanum, cerium, praseodymium, neodymium, strontium, scandium, gallium, aluminum, and indium.

Example 21 includes the subject matter of any of Examples 1 through 14, wherein the Rashba-Bychkov material comprises two dimensional heterostructure.

Example 22 includes the subject matter of Example 21, wherein the two dimensional heterostructure comprises an adalloy of silver, copper, platinum, and bismuth.

Example 23 includes the subject matter of Example 21 or 22, wherein the two dimensional heterostructure comprises an absorbent element comprising at least one of copper, silver, platinum, bismuth, francium, and hydrogen.

Example 24 includes a computing device comprising any of Examples 1 through 23.

Example 25 includes a method of fabricating a shift register shift memory device, the method comprising: forming a first conductor comprising a ferromagnet having a plurality of linearly adjacent domains, the first conductor having a first end and a second end opposite the first end; forming second conductor on the first conductor, the second conductor comprising at least one of platinum, beta-phase tungsten, and beta-phase tantalum; forming a read device at the first end of the first conductor, the read device comprising a Rashba-Bychkov material; and forming a write device at the second end of the first conductor, the read device comprising a Rashba-Bychkov material.

Example 26 includes the subject matter of Example 25, wherein the read device and the write device are electrically insulated from the second conductor.

Example 27 includes the subject matter of Example 25 or 26, further comprising:

forming a first electrode and a second electrode on the read device; forming a first electrode and a second electrode on the write device; and forming a first electrode and a second electrode on the second conductor.

Example 28 includes a method of using a Rashba-Bychkov shift register memory device, the method comprising: providing a shift register memory device comprising a Rashba-Bychkov write terminal; applying a voltage to the Rashba-Bychkov write terminal; and responsive to the applied voltage, providing out of plane spin polarized electrons to a write domain via a Rashba- Bychkov effect. Example 29 includes the subject matter of Example 28, further comprising shifting the write domain comprising out of plane spin polarized electrons through a ferromagnetic shift register.

Example 30 includes the subject matter of Example 29, wherein the shifting comprising shifting the write domain through the ferromagnetic shift register using at least one of a spin Hall effect and a Rashba effect.

Example 31 includes the subject matter of any of Examples 28 through 30, further comprising determining a bit value corresponding to the write domain using an inverse Rashba- Bychkov effect at a Rashba-Bychkov read terminal.

Claims

What is claimed is:

1. A shift register memory device comprising:

a first conductor comprising a ferromagnetic material, the first conductor including a plurality of linearly adjacent magnetic domains;

a second conductor on the first conductor over at least some of the plurality of

linearly adjacent magnetic domains in the first conductor; and

a read terminal at a first end of the first conductor and a write terminal at a second end of the first conductor opposite the first end, at least one of the read terminal and the write terminal comprising a Rashba-Bychkov material.

2. The shift register memory device of claim 1, wherein:

the write terminal is configured to apply an out of plane electron spin polarization in a proximately disposed write domain; and

the read terminal is configured to determine an electron spin polarization in a

proximately disposed read domain using an inverse Rashba-Bychkov effect.

3. The shift register memory device of claim 1, wherein:

the write terminal further comprises a ground electrode and a signal electrode, the signal electrode being in electrical contact with the write terminal; and the read terminal further comprises a ground electrode and a signal electrode, the signal electrode in electrical contact with the read terminal.

4. The shift register memory device of claim 1, further comprising a first electrode at a first end of the second conductor and a second electrode at a second end of the second conductor.

5. The shift register memory device of claim 1, wherein the ferromagnetic material of the first conductor comprises at least two of iron, platinum, and palladium.

6. The shift register memory device of claim 1, wherein the ferromagnetic material of the first conductor comprises a multilayer structure that includes a layer of cobalt and one of a layer of nickel and a layer of palladium.

7. The shift register memory device of claim 1, wherein the second conductor is in direct contact with the first conductor.

8. The shift register memory device of claim 1, wherein the second conductor comprises at least one of platinum, beta-phase tungsten, and beta-phase tantalum.

9. The shift register memory device of claim 1, wherein the second conductor comprises a heterostructure of at least two of a copper layer, a silver layer, and a bismuth layer.

10. The shift register memory device of any of claim 1, further comprising an intervening layer of non-magnetic material disposed between the first conductor and the second conductor, the intervening layer of non-magnetic material having a thickness less than a spin relaxation length of the second conductor.

11. The shift register memory device of claim 1, wherein the Rashba-Bychkov material comprises a two dimensional material.

12. The shift register memory device of claim 11, wherein the Rashba-Bychkov material comprises graphene.

13. The shift register memory device of claim 1, wherein the Rashba-Bychkov material comprises a dichalcogenide material.

14. The shift register memory device of claim 13, wherein the dichalcogenide material comprises a metal and one of sulfur, selenium, and tellurium.

15. The shift register memory device of claim 14, wherein the metal of the dichalcogenide material includes one of molybdenum and tungsten.

16. The shift register memory device of claim 13, wherein the dichalcogenide material comprises oxygen and at least one of lanthanum, cerium, praseodymium, neodymium, strontium, scandium, gallium, aluminum, and indium.

17. The shift register memory device of claim 1, wherein the Rashba-Bychkov material comprises a two dimensional heterostructure.

18. The shift register memory device of claim 17, wherein the two dimensional heterostructure comprises an adalloy of silver, copper, platinum, and bismuth.

19. A computing device comprising the shift register memory device of any of claims

1 to 18.

20. A method of fabricating a shift register shift memory device, the method comprising:

forming a first conductor comprising a ferromagnet having a plurality of linearly adjacent domains, the first conductor having a first end and a second end opposite the first end;

forming second conductor on the first conductor, the second conductor comprising at least one of platinum, beta-phase tungsten, and beta-phase tantalum;

forming a read device at the first end of the first conductor, the read device comprising a Rashba-Bychkov material; and

forming a write device at the second end of the first conductor, the read device

comprising a Rashba-Bychkov material.

21. The method of claim 20, wherein the read device and the write device are electrically insulated from the second conductor.

22. The method of any of claims 20 or 21, further comprising:

forming a first electrode and a second electrode on the read device;

forming a first electrode and a second electrode on the write device; and

forming a first electrode and a second electrode on the second conductor.

23. A method of using a Rashba-Bychkov shift register memory device, the method comprising:

providing a shift register memory device comprising a Rashba-Bychkov write

terminal; applying a voltage to the Rashba-Bychkov write terminal; and

responsive to the applied voltage, providing out of plane spin polarized electrons to a write domain via a Rashba-Bychkov effect.

24. The method of claim 23, further comprising shifting the write domain comprising J out of plane spin polarized electrons through a ferromagnetic shift register.

25. The method of claims 23 or 24, further comprising determining a bit value corresponding to the write domain using an inverse Rashba-Bychkov effect at a Rashba- Bychkov read terminal.