WO2018086438A1 - 一种mipi接口多路连接结构 - Google Patents

一种mipi接口多路连接结构 Download PDF

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WO2018086438A1
WO2018086438A1 PCT/CN2017/106139 CN2017106139W WO2018086438A1 WO 2018086438 A1 WO2018086438 A1 WO 2018086438A1 CN 2017106139 W CN2017106139 W CN 2017106139W WO 2018086438 A1 WO2018086438 A1 WO 2018086438A1
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mipi
switch
interface
connection structure
image sensor
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PCT/CN2017/106139
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French (fr)
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罗强军
成转鹏
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深圳市道通智能航空技术有限公司
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Publication of WO2018086438A1 publication Critical patent/WO2018086438A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04M—TELEPHONIC COMMUNICATION
    • H04M1/00—Substation equipment, e.g. for use by subscribers
    • H04M1/02—Constructional features of telephone sets
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/76—Television signal recording
    • H04N5/765—Interface circuits between an apparatus for recording and another apparatus

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  • the embodiments of the present application relate to the field of integrated circuits, and in particular, to a MIPI interface multiple connection structure.
  • MIPI Mobile Industry Processor Interface
  • MIPI Mobile Industry Processor Interface
  • ARM Nokia, ST, TI and other companies in 2003 to interface internal electronic devices such as cameras, display interfaces, and RF/baseband interfaces.
  • Standardization which reduces the complexity of electronic device design and increases design flexibility.
  • the advantage of the unified interface standard is that electronic device manufacturers can flexibly select different chips and modules from the market as needed, and it is faster and more convenient to change the design and function.
  • VR Virtual Reality
  • Access multi-channel image sensor to collect data.
  • the technical problem to be solved by the embodiments of the present application is to provide an MIPI multi-way connection structure, which can expand the MIPI interface and access multiple image sensors.
  • a technical solution adopted by the present application is to provide a MIPI interface multiple connection structure, including: an image processing chip, an MIPI switch, and an image sensor, wherein the MIPI switch is connected to the image processing chip; An image sensor is connected to the MIPI switch.
  • the image processing chip further includes an MIPI interface, and the MIPI interface is connected to the MIPI switch.
  • the MIPI switch is an MIPI analog switch, and the MIPI analog switch further includes two signal inputs and a signal output.
  • the signal output end of the MIPI analog switch is connected to the MIPI interface, and the two signal input ends of the MIPI analog switch are respectively connected to the image sensor.
  • the two signal input ends of the MIPI analog switch are respectively connected with the output ends of the two MIPI analog switches to form a rear stage MIPI analog switch, and the signal output ends of each MIPI switch of the latter stage MIPI analog switch are respectively compared with the previous one.
  • the signal input terminals of the level MIPI analog switches are connected, and a parallel connection structure is formed between the MIPI analog switches connected to the signal input ends of the previous stage MIPI switches.
  • the MIPI switch is an FPGA chip, and the FPGA chip further includes at least one MIPI sub-switch. When the at least one MIPI sub-switch is multiple, each MIPI sub-switch is connected in parallel.
  • the image sensor is connected in parallel to the MIPI sub-switch of the FPGA chip.
  • the image processing chip further includes an image sensor selection end, and the image sensor selection end is connected to the MIPI sub-switch.
  • the image sensor selection end is connected to the MIPI analog switch or the FPGA chip.
  • another technical solution adopted by the present application is to provide a drone, which includes a fuselage, and a MIPI interface multi-connection structure as described above.
  • the embodiment of the present application can expand the MIPI interface by connecting the MIPI analog switch on the MIPI interface, and then connect on the input end of the MIPI analog switch.
  • the image sensor enables multiple image sensors to be connected to one MIPI interface.
  • the image processing chip selection terminal can issue a control signal to control the opening and closing of the MIPI switch, thereby acquiring the signal transmitted by the image sensor connected to the MIPI switch.
  • the image processing chip selection end can issue a control signal to control the opening and closing of the MIPI sub-switch, thereby acquiring the signal transmitted by the image sensor connected to the MIPI sub-switch.
  • a plurality of image sensors can be simultaneously connected to a MIPI interface for MIPI connection The port is expanded.
  • FIG. 1a is a schematic structural diagram of a MIPI interface multi-way connection structure provided by a first embodiment of the present application
  • FIG. 1b is a schematic structural diagram of still another MIPI interface multi-path connection structure provided by the first embodiment of the present application.
  • FIG. 2 is a schematic structural diagram of a MIPI interface multi-path connection structure according to a second embodiment of the present application
  • FIG. 3 is a schematic diagram of a drone provided by a third embodiment of the present application.
  • a MIPI interface multiple connection structure provided by the first embodiment of the present application includes: an image processing chip 11, an MIPI analog switch 12, and an image sensor 13.
  • the image processing chip 11 further includes an MIPI interface 111.
  • the MIPI analog switch 12 is connected to the MIPI interface 111, and the image sensor 13 is connected to the MIPI analog switch 12.
  • the MIPI analog switch 12 includes two signal input terminals 121 and a signal output terminal 122.
  • the signal output terminal 122 is connected to the MIPI interface 111, and the two signal input terminals 121 are respectively connected to the two image sensors 13.
  • the image sensor 13 may be a CCD (Charge Coupled Device) sensor or a CMOS (Complementary Metal-Oxide Semiconductor) sensor, and the camera or the camera lens includes one or more image sensors.
  • the image processing chip 11 may be a graphics processor (GPU), a microcontroller (MCU), a digital signal processor (DSP), a central processing unit (CPU), a field programmable logic gate array (FPGA), or the like.
  • two MIPI analog switches 12 may be respectively connected to the two signal input terminals 121 to form a two-stage MIPI analog switch 12, and the signal output end 122 of each MIPI switch 12 of the second-level MIPI analog switch 12 is respectively compared with the previous level MIPI.
  • the signal input terminal 121 of the analog switch 12 is connected, and the parallel connection structure is formed between the MIPI analog switches 12 connected to the signal input terminal 121 of the previous stage MIPI switch 12.
  • the second signal input terminal of each MIPI analog switch 12 of the previous stage is respectively connected with the second MIPI analog switch 12 to form the latter level MIPI analog switch 12.
  • the number of MIPI analog switches 12 of the latter stage is the previous level.
  • the number of MIPI analog switches 12 is twice.
  • the image sensor 13 is connected to the two signal input terminals 121 of each of the MIPI analog switches 12 of the last stage to form a structure in which the multi-level MIPI analog switch 12 is connected to the image sensor 13.
  • the MIPI interface 111 on the image processing chip 11 may be one or more; the signal input end 121 of the MIPI analog switch 12 may be one or more, and the signal output end 122 may be at least one.
  • the image processing chip 11 of the MIPI interface multiple connection structure may further include an image sensor selection terminal 112 connected to the MIPI analog switch 12.
  • the image sensor selection segment 112 is coupled to the secondary MIPI analog switch 12 and to the MIPI analog switch 12 connected to the second and MIPI analog switch 12.
  • the image sensor selection signal can be issued to select the MIPI analog switch 12, and the path of the selected MIPI analog switch 12 is connected and connected.
  • the image sensor 13 on the last stage MIPI analog switch 12 is connected to the MIPI interface 111 via the MIPI analog switch 12, and the signal on the image sensor 13 can pass through the connected MIPI analog switch 12 Transfer to the MIPI interface 111.
  • the signal transmitted by the image sensor 13 can be transmitted to the MIPI interface 121 of the image processing chip 11 through each stage of the MIPI switch 12.
  • the extension of the MIPI interface 111 can be performed, and then the image sensor 13 is connected to the input end 121 of the MIPI analog switch, which can be implemented in a MIPI interface 111.
  • a plurality of image sensors 13 are connected to each other.
  • a MIPI interface multiple connection structure provided by the second embodiment of the present application includes: an image processing chip 21, an FPGA chip 22, and an image sensor 23; the FPGA chip 22 is connected to the image processing chip 21, and the image sensor 23 is connected. On the FPGA chip 22.
  • the image processing chip 21 further includes an image sensor selection terminal 211 and an MIPI interface 212.
  • the image sensor selection terminal 211 and the MIPI interface 212 are respectively connected to the FPGA chip.
  • the FPGA chip 22 (Field-Programmable Gate Array) includes at least one MIPI sub-switch 221. When there are multiple MIPI sub-switches 221, each sub-MIPI switch 221 is connected in parallel and connected in series. To the MIPI interface 212, an image sensor 23 is connected in parallel to each sub-MIPI switch 221.
  • the image sensor selection signal can be issued to select the MIPI sub-switch 221, and the selected MIPI sub-switch 221 is connected and connected to the MIPI sub-switch 221.
  • Image sensor 23 is coupled to MIPI interface 212 via a connected MIPI sub-switch 221, and signals on image sensor 23 can be transmitted to MIPI interface 212 via a connected MIPI sub-switch 221.
  • the image sensor selection terminal 211 and the MIPI switch 212 on the image processing chip 21 may be one or more.
  • the image processing chip selection terminal 211 can issue a control signal to control the opening and closing of the MIPI sub-switch 221, thereby being able to obtain the connection at the MIPI.
  • a plurality of image sensors 23 can be simultaneously connected to a MIPI interface 212 to expand the MIPI interface 212.
  • the image processing chip collects the information of the image sensor in a time-sharing manner; when the information input amount of the image sensor is smaller than the processing capability of the image processing chip, the information of the image sensor may be synthesized by using the integrated circuit first.
  • the above purpose can also be achieved by simultaneously outputting the MIPI interface signal to the image processor and then restoring it to several image sensor information through the image processor.
  • the embodiment provides a UAV 3, and the UAV 3 includes a body 31, and a MIPI interface multi-way connection structure according to Embodiment 1 and Embodiment 2.
  • the MIPI interface multiple connection structure is disposed in an internal cavity of the body 31.

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Abstract

本申请实施方式公开了一种MIPI接口多路连接结构，包括：图像处理芯片、MIPI开关及图像传感器，所述MIPI开关连接所述图像处理芯片；所述图像传感器连接所述MIPI开关。通过上述方式，本申请实施方式能够通过MIPI接口连接MIPI模拟开关，可进行对MIPI接口的扩展，而后在MIPI模拟开关的输入端连接图像传感器，能够实现在一个MIPI接口上连接多个图像传感器。通过将MIPI开关与MIPI接口以及图像传感器选择端进行连接，图像处理芯片选择端能够发出控制信号控制MIPI开关的开合，进而能够获取到连接在MIPI开关上的图像传感器传输的信号。

Description

一种MIPI接口多路连接结构 技术领域
本申请实施方式涉及集成电路领域，特别是涉及一种MIPI接口多路连接结构。
背景技术
MIPI(Mobile Industry Processor Interface，移动产业处理器接口)是2003年由ARM,Nokia,ST,TI等公司成立的一个联盟，目的是把电子设备内部的接口如摄像头、显示屏接口、射频/基带接口等标准化，从而减少电子设备设计的复杂程度和增加设计灵活性。统一接口标准的好处是电子设备厂商根据需要可以从市面上灵活选择不同的芯片和模组，更改设计和功能时更加快捷方便。
随着人工智能技术不断发展，无人机、机器人需要采集周边更多的图像信息以便进行自主智能操作，VR(Virtual Reality，虚拟现实)需要同时采集多幅图像做图像拼接，这些设备都需要同时接入多路图像传感器采集数据。
但是，目前的图像处理IC通常只有1至2个MIPI接口，已远远不能满足接入的图像传感器数量。
申请内容
本申请实施方式主要解决的技术问题是提供一种MIPI多路连接结构，能够对MIPI接口进行扩展，接入多个图像传感器。
为解决上述技术问题，本申请采用的一个技术方案是：提供一种MIPI接口多路连接结构，包括：图像处理芯片、MIPI开关及图像传感器，所述MIPI开关连接所述图像处理芯片；所述图像传感器连接所述MIPI开关。
其中，所述图像处理芯片进一步包括MIPI接口，所述MIPI接口与所述MIPI开关连接。
其中，所述MIPI开关为MIPI模拟开关，所述MIPI模拟开关进一步包括二信号输入端及一信号输出端。
其中，所述MIPI模拟开关的信号输出端与所述MIPI接口连接，所述MIPI模拟开关的二信号输入端分别与所述图像传感器连接。
其中，在所述MIPI模拟开关的二信号输入端分别连接二MIPI模拟开关的输出端，形成后一级MIPI模拟开关，后一级MIPI模拟开关的每一MIPI开关的信号输出端分别与前一级MIPI模拟开关的信号输入端连接，连接在前一级MIPI开关上的信号输入端的MIPI模拟开关之间形成并联连接结构。
其中，所述MIPI开关为FPGA芯片，所述FPGA芯片进一步包括至少一MIPI子开关，所述至少一MIPI子开关为多个时，每一MIPI子开关之间并联连接。
其中，所述图像传感器并联连接在FPGA芯片的MIPI子开关上。
其中，所述图像处理芯片进一步包括图像传感器选择端，所述图像传感器选择端与所述MIPI子开关连接。
其中，所述图像传感器选择端与MIPI模拟开关或FPGA芯片连接。
为解决上述技术问题，本申请采用的另一个技术方案是：提供一种无人机，所述无人机包括机身，以及如上所述的MIPI接口多路连接结构。
本申请实施方式的有益效果是：区别于现有技术的情况，本申请实施方式通过在MIPI接口上连接MIPI模拟开关，可进行对MIPI接口的扩展，而后在MIPI模拟开关的输入端上连接上图像传感器，能够实现在一个MIPI接口上连接多个图像传感器。通过将MIPI开关与MIPI接口以及图像传感器选择端进行连接，图像处理芯片选择端能够发出控制信号控制MIPI开关的开合，进而能够获取到连接在MIPI开关的图像传感器传输的信号。或者通过将FPGA芯片与MIPI接口以及图像传感器选择端进行连接，图像处理芯片选择端能够发出控制信号控制MIPI子开关的开合，进而能够获取到连接在MIPI子开关上的图像传感器传输的信号。能够实现多个图像传感器同时连接至一MIPI接口上，对MIPI接 口进行扩展。
附图说明
图1a是本申请第一实施例提供的一种MIPI接口多路连接结构的结构示意图；
图1b是本申请第一实施例提供的又一种MIPI接口多路连接结构的结构示意图；
图2是本申请第二实施例提供的一种MIPI接口多路连接结构的结构示意图；
图3是本申请第三实施例提供的一种无人机示意图。
具体实施方式
为了便于理解本申请，下面结合附图和具体实施方式，对本申请进行更详细的说明。需要说明的是，当元件被表述“固定于”另一个元件，它可以直接在另一个元件上、或者其间可以存在一个或多个居中的元件。当一个元件被表述“连接”另一个元件，它可以是直接连接到另一个元件、或者其间可以存在一个或多个居中的元件。本说明书所使用的术语“垂直的”、“水平的”、“左”、“右”以及类似的表述只是为了说明的目的。
除非另有定义，本说明书所使用的所有的技术和科学术语与属于本申请的技术领域的技术人员通常理解的含义相同。本说明书中在本申请的说明书中所使用的术语只是为了描述具体的实施方式的目的，不是用于限制本申请。本说明书所使用的术语“和/或”包括一个或多个相关的所列项目的任意的和所有的组合。
实施例一
参阅图1a，本申请第一实施例提供的一种MIPI接口多路连接结构包括：图像处理芯片11、MIPI模拟开关12及图像传感器13，图像处理芯片11进一步包括MIPI接口111。MIPI模拟开关12连接在MIPI接口111上，图像传感器13连接在MIPI模拟开关12上。
MIPI模拟开关12包括两个信号输入端121及一个信号输出端122，信号输出端122与MIPI接口111进行连接，两个信号输入端121分别与两个图像传感器13进行连接。图像传感器13可以是CCD(Charge Coupled Device，电荷耦合元件)传感器或CMOS(Complementary Metal-Oxide Semiconductor，金属氧化物半导体元件)传感器，摄像头或相机镜头中包括一个或多个图像传感器。图像处理芯片11可以是图像处理器(GPU)、微控制器(MCU)、数字信号处理器(DSP)、中央处理器(CPU)、现场可编程逻辑门阵列(FPGA)等。
进一步的，可在二信号输入端121上分别连接二MIPI模拟开关12，形成二级MIPI模拟开关12，二级MIPI模拟开关12的每一MIPI开关12的信号输出端122分别与前一级MIPI模拟开关12的信号输入端121连接，连接在前一级MIPI开关12上的信号输入端121的MIPI模拟开关12之间形成并联连接结构。依次类推，在前一级的每一MIPI模拟开关12的二信号输入端分别接上二MIPI模拟开关12形成后一级MIPI模拟开关12，后一级的MIPI模拟开关12的数量是前一级MIPI模拟开关12数量的2倍。在最后一级的每一MIPI模拟开关12的二信号输入端121上分别连接上图像传感器13，形成多级MIPI模拟开关12与图像传感器13连接的结构。可选的，图像处理芯片11上的MIPI接口111可以为1个或者多个；MIPI模拟开关12的信号输入端121可以为1个或者多个，信号输出端122可以为至少一个。参阅图1b，可选的，一种MIPI接口多路连接结构的图像处理芯片11还可包括图像传感器选择端112，所述图像传感器选择端112与MIPI模拟开关12连接。所述图像传感器选择段112连接在二级MIPI模拟开关12及连接在二及MIPI模拟开关12之后的MIPI模拟开关12上。
图像处理芯片11的图像传感器选择端112与MIPI模拟开关12连接后，能够发出图像传感器选择信号对MIPI模拟开关12进行选择，被选中的MIPI模拟开关12所在的那一通路即被连通，连接在最后一级MIPI模拟开关12上的图像传感器13通过MIPI模拟开关12与MIPI接口111连接，图像传感器13上的信号能够通过连通的MIPI模拟开关12 传输至MIPI接口111上。
工作时，图像传感器13发送的信号能够通过每一级MIPI开关12传输至图像处理芯片11的MIPI接口121上。
区别于现有技术，通过在MIPI接口111上连接MIPI模拟开关12，可进行对MIPI接口111的扩展，而后在MIPI模拟开关的输入端121上连接上图像传感器13，能够实现在一个MIPI接口111上连接多个图像传感器13。
实施例二
参阅图2，本申请第二实施例提供的一种MIPI接口多路连接结构包括：图像处理芯片21、FPGA芯片22及图像传感器23；FPGA芯片22连接在图像处理芯片21上，图像传感器23连接在FPGA芯片22上。
图像处理芯片21进一步包括：图像传感器选择端211及MIPI接口212，图像传感器选择端211及MIPI接口212分别与FPGA芯片连接。
FPGA芯片22(FPGA,Field-Programmable Gate Array，即现场可编程门阵列)包括至少一MIPI子开关221，当MIPI子开关221为多个时，每一子MIPI开关221之间并联连接后串联连接至MIPI接口212，图像传感器23并联连接在每一子MIPI开关221上。
图像处理芯片21的图像传感器选择端211与FPGA芯片22连接后，能够发出图像传感器选择信号对MIPI子开关221进行选择，被选中的MIPI子开关221即被连通，连接在MIPI子开关221上的图像传感器23通过被连通的MIPI子开关221与MIPI接口212连接，图像传感器23上的信号能够通过连通的MIPI子开关221传输至MIPI接口212。
可选的，图像处理芯片21上的图像传感器选择端211及MIPI开关212可以为1个或者多个。
区别于现有技术，通过将FPGA芯片22与MIPI接口212以及图像传感器选择端211进行连接，图像处理芯片选择端211能够发出控制信号控制MIPI子开关221的开合，进而能够获取到连接在MIPI子开关221上的图像传感器23传输的信号。能够实现多个图像传感器23同时连接至一MIPI接口212上，对MIPI接口212进行扩展。
实施例一与实施例二是图像处理芯片分时对图像传感器的信息进行采集；在图像传感器信息输入量小于图像处理芯片的处理能力时，也可将几路图像传感器的信息先使用集成电路合成为一路MIPI接口信号后同时输出给图像处理器，然后通过图像处理器复原为几路图像传感器信息，也能达到以上目的。
实施例三
参阅图3，本实施例提供一种无人机3，所述无人机3包括机身31，以及实施例一与实施例二所述的一种MIPI接口多路连接结构。该MIPI接口多路连接结构设置在机身31的内部空腔中。
需要说明的是，本申请的说明书及其附图中给出了本申请的较佳的实施方式，但是，本申请可以通过许多不同的形式来实现，并不限于本说明书所描述的实施方式，这些实施方式不作为对本申请内容的额外限制，提供这些实施方式的目的是使对本申请的公开内容的理解更加透彻全面。并且，上述各技术特征继续相互组合，形成未在上面列举的各种实施方式，均视为本申请说明书记载的范围；进一步地，对本领域普通技术人员来说，可以根据上述说明加以改进或变换，而所有这些改进和变换都应属于本申请所附权利要求的保护范围。

Claims (10)

  1. 一种MIPI接口多路连接结构，其特征在于，包括：图像处理芯片、MIPI开关及图像传感器，所述MIPI开关连接所述图像处理芯片；所述图像传感器连接所述MIPI开关。
  2. 根据权利要求1所述的MIPI接口多路连接结构，其特征在于，所述图像处理芯片进一步包括MIPI接口，所述MIPI接口与所述MIPI开关连接。
  3. 根据权利要求2所述的MIPI接口多路连接结构，其特征在于，所述MIPI开关为MIPI模拟开关，所述MIPI模拟开关进一步包括二信号输入端及一信号输出端。
  4. 根据权利要求3所述的MIPI接口多路连接结构，其特征在于，所述MIPI模拟开关的信号输出端与所述MIPI接口连接，所述MIPI模拟开关的二信号输入端分别与所述图像传感器连接。
  5. 根据权利要求3所述的MIPI接口多路连接结构，其特征在于，在所述MIPI模拟开关的二信号输入端分别连接二MIPI模拟开关的输出端，形成后一级MIPI模拟开关，后一级MIPI模拟开关的每一MIPI开关的信号输出端分别与前一级MIPI模拟开关的信号输入端连接，连接在前一级MIPI开关上的信号输入端的MIPI模拟开关之间形成并联连接结构。
  6. 根据权利要求2所述的MIPI接口多路连接结构，其特征在于，所述MIPI开关为FPGA芯片，所述FPGA芯片进一步包括至少一MIPI子开关，所述至少一MIPI子开关为多个时，每一MIPI子开关之间并联连接。
  7. 根据权利要求6所述的MIPI接口多路连接结构，其特征在于，所述图像传感器并联连接在FPGA芯片的MIPI子开关上。
  8. 根据权利要求3或6所述的MIPI接口多路连接结构，其特征在于，所述图像处理芯片进一步包括图像传感器选择端，所述图像传感器选择端与所述MIPI子开关连接。
  9. 根据权利要求8所述的MIPI接口多路连接结构，其特征在于，所述图像传感器选择端与MIPI模拟开关或FPGA芯片连接。
  10. 一种无人机，其特征在于，所述无人机包括机身，以及如权利要求1-9任一权利要求所述的MIPI接口多路连接结构。
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Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN206472223U (zh) * 2016-11-11 2017-09-05 深圳市道通智能航空技术有限公司 一种mipi接口多路连接结构及无人机
CN108076287B (zh) * 2017-12-14 2020-01-03 维沃移动通信有限公司 一种图像处理方法、移动终端及计算机可读存储介质
US10602119B1 (en) 2019-05-20 2020-03-24 A & L Canada Laboratories Inc. System and method for multiplexing MIPI multispectral imaging devices
CN110300221B (zh) * 2019-05-20 2021-06-25 努比亚技术有限公司 Mipi控制电路和***、电路控制和电路***控制方法、终端和计算机可读存储介质
CN110287138A (zh) * 2019-06-12 2019-09-27 京微齐力(北京)科技有限公司 一种集成fpga和mipi的电路装置及装置中信号传输方法
CN114125180A (zh) * 2020-09-01 2022-03-01 格科微电子（上海）有限公司 图像信号处理器件、终端
CN116405758A (zh) * 2020-11-26 2023-07-07 华为技术有限公司 一种数据传输方法及电子设备
CN113485190B (zh) * 2021-07-13 2022-11-11 西安电子科技大学 一种多通道数据采集***及采集方法
CN115623339B (zh) * 2022-12-12 2023-02-28 南京芯驰半导体科技有限公司 用于多摄像头的图像数据交换方法、装置、***和汽车

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN202818422U (zh) * 2012-10-16 2013-03-20 重庆国虹科技发展有限公司 基于单mipi接口的多屏移动设备
CN103475383A (zh) * 2013-08-16 2013-12-25 福兴达科技实业（深圳）有限公司 具有可扩展功能的无线通信终端及其控制电路
CN203840382U (zh) * 2013-12-17 2014-09-17 重庆国虹科技发展有限公司 在单个高像素平台下支持多个高像素摄像头的移动设备
WO2016082769A1 (zh) * 2014-11-27 2016-06-02 优利科技有限公司 超视距空中观光***
CN206472223U (zh) * 2016-11-11 2017-09-05 深圳市道通智能航空技术有限公司 一种mipi接口多路连接结构及无人机

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN202818422U (zh) * 2012-10-16 2013-03-20 重庆国虹科技发展有限公司 基于单mipi接口的多屏移动设备
CN103475383A (zh) * 2013-08-16 2013-12-25 福兴达科技实业（深圳）有限公司 具有可扩展功能的无线通信终端及其控制电路
CN203840382U (zh) * 2013-12-17 2014-09-17 重庆国虹科技发展有限公司 在单个高像素平台下支持多个高像素摄像头的移动设备
WO2016082769A1 (zh) * 2014-11-27 2016-06-02 优利科技有限公司 超视距空中观光***
CN206472223U (zh) * 2016-11-11 2017-09-05 深圳市道通智能航空技术有限公司 一种mipi接口多路连接结构及无人机

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