WO2018070306A1 - Power supply control circuit, electronic device, and power supply control method - Google Patents

Power supply control circuit, electronic device, and power supply control method Download PDF

Info

Publication number
WO2018070306A1
WO2018070306A1 PCT/JP2017/035998 JP2017035998W WO2018070306A1 WO 2018070306 A1 WO2018070306 A1 WO 2018070306A1 JP 2017035998 W JP2017035998 W JP 2017035998W WO 2018070306 A1 WO2018070306 A1 WO 2018070306A1
Authority
WO
WIPO (PCT)
Prior art keywords
adapter
voltage
power
usb
power supply
Prior art date
Application number
PCT/JP2017/035998
Other languages
French (fr)
Japanese (ja)
Inventor
一樹 小宮
Original Assignee
富士通株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 富士通株式会社 filed Critical 富士通株式会社
Publication of WO2018070306A1 publication Critical patent/WO2018070306A1/en

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/28—Supervision thereof, e.g. detecting power-supply failure by out of limits supervision
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/34—Parallel operation in networks using both storage and other dc sources, e.g. providing buffering
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J9/00—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting
    • H02J9/04—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source
    • H02J9/06—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source with automatic change-over, e.g. UPS systems
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/30—Systems integrating technologies related to power network operation and communication or information technologies for improving the carbon footprint of the management of residential or tertiary loads, i.e. smart grids as climate change mitigation technology in the buildings sector, including also the last stages of power distribution and the control, monitoring or operating management systems at local level
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y04—INFORMATION OR COMMUNICATION TECHNOLOGIES HAVING AN IMPACT ON OTHER TECHNOLOGY AREAS
    • Y04S—SYSTEMS INTEGRATING TECHNOLOGIES RELATED TO POWER NETWORK OPERATION, COMMUNICATION OR INFORMATION TECHNOLOGIES FOR IMPROVING THE ELECTRICAL POWER GENERATION, TRANSMISSION, DISTRIBUTION, MANAGEMENT OR USAGE, i.e. SMART GRIDS
    • Y04S20/00—Management or operation of end-user stationary applications or the last stages of power distribution; Controlling, monitoring or operating thereof
    • Y04S20/20—End-user application control systems

Definitions

  • the present invention relates to a power supply control circuit, an electronic device, and a power supply control method.
  • portable electronic devices such as notebook computers have been widely used. Such portable electronic devices often operate with a battery or the like mounted therein, and are not always connected to an external power source like stationary electronic devices. For this reason, portable electronic devices generally have a configuration in which an external power source such as an AC (Alternating Current) adapter is connected to receive power from the outside.
  • AC Alternating Current
  • USB-PD Universal Serial Bus-Power Delivery
  • USB-PD Universal Serial Bus-Power Delivery
  • USB-PD is a standard that notifies a supplied voltage in advance and outputs a variable voltage on both the power receiving side and the power transmission side.
  • Electronic devices equipped with USB Type C connectors such as tablet terminals and notebook PCs (Personal Computers) are supplied with power via a connector with a maximum voltage of 20V and a maximum current of 3A, that is, a maximum of 60W. Can do.
  • Many USB Type C connectors conform to the USB-PD standard, and are expected to replace conventional fixed output type AC adapters (hereinafter simply referred to as “AC adapters”).
  • the maximum discharge capacity of a USB-PD adapter conforming to the USB-PD standard is 60 W. Therefore, it is expected that an AC adapter having a capacity of 60 W or more and a USB-PD adapter are used in combination in an electronic device whose power consumption is 60 W or more for applications such as rapidly charging a battery.
  • an AC adapter and a USB-PD adapter together a configuration in which the output of the AC adapter and the output of the USB-PD adapter are abutted by a diode OR to supply the power supplied from the higher voltage side to the load is considered. It is done.
  • the voltage when the USB-PD adapter is discharged at 60 W is 20V.
  • the voltage output from the AC adapter is often lower than 20V, and is generally 12 to 19V.
  • the USB-PD having a high voltage is preferentially discharged. Therefore, the electronic device operates with its own power consumption suppressed to less than 60 W even when the legacy AC adapter is connected. In this case, there is a risk that system performance such as an increase in charging time of a battery mounted on the electronic device or a decrease in operation clock of the CPU may be deteriorated.
  • system performance such as an increase in charging time of a battery mounted on the electronic device or a decrease in operation clock of the CPU may be deteriorated.
  • any of the conventional technology for switching between a variable power source and a battery, the conventional technology for monitoring the current flowing through the battery, and the conventional technology for transitioning the FET through the diode OR takes into account the voltage difference between the two power sources. It has not been. Therefore, it is difficult to avoid a decrease in performance by using any conventional technique.
  • the disclosed technology has been made in view of the above, and an object thereof is to provide a power supply control circuit, an electronic device, and a power supply control method that reduce a decrease in performance of a system that is a power supply target.
  • the power supply circuit includes a first supply path connected to the first power supply and a second power supply having a larger capacity than the first power supply.
  • the power supplied from the higher voltage of the connected second supply paths is output.
  • the supply voltage control unit is configured such that when both the first power supply and the second power supply are connected and the voltage of the second supply path is less than the voltage of the first supply path, the voltage of the second supply path Is controlled to be higher than the voltage of the first supply path.
  • the power supply control circuit, the electronic device, and the power supply control method disclosed in the present application there is an effect that it is possible to reduce a decrease in performance of a system that is a power supply target.
  • FIG. 1 is a circuit configuration diagram of the personal computer according to the first embodiment.
  • FIG. 2 is a diagram illustrating transition of the power supply state in the personal computer.
  • FIG. 3 is a flowchart of power supply switching processing when the AC adapter is removed in the power supply control circuit according to the first embodiment.
  • FIG. 4 is a flowchart of the power supply switching process when the AC adapter is connected in the power supply control circuit according to the first embodiment.
  • FIG. 5 is a flowchart of power supply switching processing when the AC adapter is removed in the power supply control circuit according to the second embodiment.
  • FIG. 6 is a flowchart of the power supply switching process when the AC adapter is connected in the power supply control circuit according to the second embodiment.
  • a power supply control circuit an electronic device, and a power supply control method disclosed in the present application will be described in detail with reference to the drawings.
  • the power supply control circuit, the electronic device, and the power supply control method disclosed in the present application are not limited by the following embodiments.
  • a personal computer will be described below as an example, but any other device can be used as long as it is an electronic device that can be connected to both a USB-PD adapter and an AC adapter and can receive power supply from both. Good.
  • FIG. 1 is a circuit configuration diagram of the personal computer according to the first embodiment.
  • the system according to this embodiment includes a personal computer (PC) 1, an AC adapter 2, and a USB-PD adapter 3.
  • PC personal computer
  • AC adapter 2 AC adapter
  • USB-PD adapter 3 USB-PD adapter
  • the AC adapter 2 is a power source having a capacity of 60 W or more and an output voltage lower than 20V.
  • the AC adapter 2 has a larger capacity than the USB-PD adapter 3 described later.
  • the AC adapter 2 is supplied with AC electricity from a primary power source such as a household outlet.
  • the AC adapter 2 converts alternating current electricity into direct current, drops the voltage, and outputs it.
  • the AC adapter 2 is connected to a power supply path that connects a USB-PD adapter 3 described later with a CPU power source 102 and a 5V / 3.3V power source 104.
  • the butting point 150 is a connection point on the power supply path that connects the USB-PD adapter 3 of the AC adapter 2 to the CPU power source 102 and the 5V / 3.3V power source 104.
  • the AC adapter 2 corresponds to an example of “second power supply”.
  • the USB-PD adapter 3 is a power supply conforming to the USB-PD standard.
  • the USB-PD adapter 3 has a maximum output voltage of 20V and a maximum output current of 3A. That is, the USB-PD adapter 3 supplies a maximum power of 60W.
  • the USB-PD adapter 3 can selectively output a voltage higher than the supply voltage of the AC adapter 2 or a voltage lower than the supply voltage of the AC adapter 2.
  • the USB-PD adapter 3 according to the present embodiment can selectively output at least a voltage of 15V or a voltage of 20V as a supply voltage.
  • the USB-PD adapter 3 is connected to the personal computer 1 via, for example, a USB Type C connector.
  • the USB-PD adapter 3 corresponds to an example of “first power supply”.
  • the USB-PD adapter 3 has a USB-PD controller 31.
  • the USB-PD controller 31 communicates with the USB-PD controller 103 of the personal computer 1 to be described later via a USB Type C connector to grasp the voltage direction.
  • the USB-PD adapter 3 acquires information such as power capacity from the USB-PD controller 103.
  • the USB-PD controller 31 controls the output voltage of the USB-PD adapter 3 to the notified power capacity, and causes the USB-PD adapter 3 to supply power with the notified power capacity.
  • the personal computer 1 has a motherboard 10 and a battery 11.
  • the personal computer 1 includes a hard disk, a portable storage medium reader, and the like (not shown).
  • FIG. 1 power supply from the AC adapter 2 and the USB-PD adapter 3 to the motherboard 10 is shown.
  • the AC adapter 2 and the USB-PD adapter 3 are a hard disk and a portable storage medium reading device other than the motherboard 10. You may supply the electric power to.
  • the battery 11 is a built-in battery of the personal computer 1.
  • the battery 11 supplies power to each unit including the CPU power source 102 and the 5V / 3.3V power source 104.
  • the motherboard 10 includes a CPU (Central Processing Unit) 101, a CPU power supply 102, a USB-PD controller 103, a 5V / 3.3V power supply 104, a PMU (Power Management Unit) 105, and a charger 106.
  • CPU Central Processing Unit
  • CPU Central Processing Unit
  • USB-PD controller 103 USB-PD controller
  • PMU Power Management Unit
  • a charger 106 On the motherboard 10, FET switches 121, 122, 131, and 132, resistors 123 and 133, diodes 141 to 143, and a comparator 108 are mounted.
  • the circuit including the PMU 105, the charger 106, the FET switches 121, 122, 131, and 132, the resistors 123 and 133, the diodes 141 to 143, and the comparator 108 corresponds to an example of a “power supply control circuit”.
  • the CPU 101 is an arithmetic processing unit that operates by the power supplied from the CPU power source 102 and performs arithmetic processing.
  • the CPU power source 102 is a power source that supplies power for driving the CPU 101.
  • the CPU power supply 102 receives power supply from any of the AC adapter 2, USB-PD adapter 3, or battery 11.
  • the CPU power supply 102 adjusts the supplied power to the drive voltage of the CPU 101 and supplies power to the CPU 101.
  • CPU power supply 102 receives supply of power output from AC adapter 2 when only AC adapter 2 is inserted. When only the USB-PD adapter 3 is inserted, the CPU power supply 102 receives the power output from the USB-PD adapter 3. Further, when the AC adapter 2 and the USB-PD adapter 3 are not connected and only the battery 11 is connected, the CPU power supply 102 receives supply of power output from the battery 11.
  • the CPU power supply 102 is supplied with output power having a higher voltage.
  • the output power of the USB-PD adapter 3 is lowered to 15V, and the output power of the AC adapter 2 is set to 19V. Maintained. Therefore, when both the AC adapter 2 and the USB-PD adapter 3 are connected, the CPU power source 102 receives the power output from the AC adapter 2.
  • the USB-PD controller 103 controls the USB-PD adapter 3.
  • the USB-PD controller 103 operates with power from the 5V / 3.3V power supply 104.
  • the USB-PD controller 103 has a plurality of stepwise values in advance as power values that the USB-PD adapter 3 can output.
  • the USB-PD controller 103 communicates with the USB-PD controller 31 via the USB Type C connector to acquire the voltage direction.
  • the USB-PD controller 103 selects one of the pre-set output power values and sets the selected output power value to the USB-PD controller 31. To notify.
  • USB-PD controller 103 receives AC adapter connection notification from PMU 105 when AC adapter 2 is inserted. Then, the USB-PD controller 103 determines whether or not the USB-PD adapter 3 is connected, and if it is connected, notifies the output voltage of the USB-PD adapter 3 of 15V. Thereafter, the USB-PD controller 103 outputs a voltage drop completion notification to the PMU 105.
  • the USB-PD controller 103 receives an AC adapter removal notification from the PMU 105. Then, the USB-PD controller 103 determines whether or not the USB-PD adapter 3 is connected, and if it is connected, notifies the output voltage of the USB-PD adapter 3 of 20V. Thereafter, the USB-PD controller 103 outputs a voltage rise completion notification to the PMU 105.
  • the USB-PD controller 103 is an example of a “supply voltage control unit”.
  • the 5V / 3.3V power supply 104 is a power supply that supplies power to the USB-PD controller 103.
  • the 5V / 3.3V power supply 104 is supplied with power from any one of the AC adapter 2, the USB-PD adapter 3, and the battery 11.
  • the 5V / 3.3V power supply 104 adjusts the supplied power to 5V or 3.3V, which is the drive voltage of the USB-PD controller 103, and supplies power to the USB-PD controller 103.
  • the 5V / 3.3V power supply 104 changes the voltage to 5V or 3.3V in accordance with the driving voltage for each part mounted on the motherboard 10 such as a memory. Power supply.
  • the 5V / 3.3V power supply 104 receives the power output from the AC adapter 2 when only the AC adapter 2 is inserted.
  • the 5V / 3.3V power source 104 receives the power output from the USB-PD adapter 3.
  • the 5V / 3.3V power supply 104 receives supply of power output from the battery 11.
  • the 5V / 3.3V power supply 104 receives the output power with the higher voltage. For example, when the output power of the USB-PD adapter 3 is 15V and the output power of the AC adapter 2 is 19V, the 5V / 3.3V power supply 104 receives the power output from the AC adapter 2.
  • the charger 106 is arranged in parallel with the power supply path connecting the CPU power source 102 and the 5V / 3.3V power source 104 to the point where the outputs of the USB-PD adapter 3 and the AC adapter 2 collide with each other.
  • the charger 106 receives input of electric power supplied from the AC adapter 2 or the USB-PD adapter 3. Then, the charger 106 reduces the voltage of the supplied power up to the voltage for charging the battery 11.
  • the charger 106 supplies electricity with a reduced voltage to charge the battery 11.
  • the battery 11 is connected to a power supply path between the charger 106, the CPU power source 102, and the 5V / 3.3V power source 104.
  • the battery 11 When the AC adapter 2 or the USB-PD adapter 3 is in a connected state, the battery 11 is charged with the power output from the connected AC adapter 2 or the USB-PD adapter 3 from the charger 106.
  • the battery 11 supplies power to the CPU power source 102 and the 5V / 3.3V power source 104.
  • a voltage output from the higher output voltage of the AC adapter 2 or the USB-PD adapter 3 is supplied from the charger 106 and charged.
  • the battery 11 is continuously charged until the remaining battery level reaches a predetermined value. Thereafter, the battery 11 supplies power to the CPU power source 102 and the 5V / 3.3V power source 104 until the increase of the output voltage of the USB-PD adapter 3 is completed.
  • the battery 11 continues to be charged until the remaining battery level reaches a predetermined value. Thereafter, the battery 11 operates as a backup of power supply from the AC adapter 2 until the output voltage drop of the USB-PD adapter 3 is completed.
  • the PMU 105 controls the power supplied to the motherboard 10.
  • the PMU 105 receives an input of an AC adapter connection signal for notifying whether or not the AC adapter 2 is connected from a comparator 108 described later. Further, the PMU 105 monitors the state of charge of the battery 11.
  • a one-dot chain line in FIG. 1 represents monitoring of the battery 11 by the PMU 105.
  • the PMU 105 receives an input of an AC adapter connection signal that notifies the connection of the AC adapter 2.
  • the PMU 105 determines whether the remaining battery level is equal to or greater than a predetermined value. When the remaining battery level is less than the predetermined value, the PMU 105 continues to charge the battery 11.
  • the PMU 105 continues the power supply from the USB-PD adapter 3 until the battery 11 is charged to such an extent that the operation of each part on the mother board 10 can be continued for a certain time.
  • the PMU 105 When the remaining battery level is equal to or higher than the predetermined value or when the remaining battery level is equal to or higher than the predetermined value due to continued charging, the PMU 105 turns off the FET switch 131. Then, the PMU 105 outputs an AC adapter connection notification to the USB-PD controller 103. Thereafter, the PMU 105 receives a voltage drop completion notification from the USB-PD controller 103. Then, the PMU 105 turns on the FET switch 131. Thereafter, the PMU 105 changes the system performance from 60W equivalent to 65W equivalent. Since the power supply source is changed from the USB-PD adapter 3 to the AC adapter 2, the supplied power increases, so that the system performance can be increased to 65 W. For example, the PMU 105 changes the system performance to 65 W by raising the operation clock of the CPU 101 or raising the charging voltage of the battery 11. Thereby, the processing capability of the personal computer 1 can be improved.
  • the PMU 105 once stops the power supply from the USB-PD adapter 3, then increases or decreases the voltage of the USB-PD adapter 3, and after the increase or decrease of the voltage is completed, the USB-PD adapter The power supply from 3 is resumed.
  • the PMU 105 When the AC adapter 2 is removed, the PMU 105 receives an AC adapter connection signal that notifies the removal of the AC adapter 2. In this state, the personal computer 1 operates using the power output from the USB-PD adapter 3 in a state where the voltage is lowered. In this embodiment, the USB-PD adapter 3 in this case is in a state where the output voltage is lowered to 15V. Therefore, the PMU 105 changes the system performance to a value operable with the output power from the USB-PD adapter 3. The PMU 105 changes the system performance to less than 45W. Here, in this embodiment, the system performance is set to less than 45 W so that the USB-PD adapter 3 can operate when the output voltage is 15 V and the output current is 3 A. Thereafter, the PMU 105 determines whether or not the remaining battery level is equal to or greater than a predetermined value. When the remaining battery level is less than the predetermined value, the PMU 105 continues to charge the battery 11.
  • the PMU 105 continues the power supply from the USB-PD adapter 3 until the battery 11 is charged to such an extent that the operation of each part on the mother board 10 can be continued for a certain time.
  • the PMU 105 When the remaining battery level is equal to or higher than the predetermined value or when the remaining battery level is equal to or higher than the predetermined value due to continued charging, the PMU 105 turns off the FET switch 131. Then, the PMU 105 outputs an AC adapter removal notification to the USB-PD controller 103. Thereafter, the PMU 105 receives a notification of the completion of voltage increase from the USB-PD controller 103. Then, the PMU 105 turns on the FET switch 131. Thereafter, the PMU 105 changes the system performance from 65W equivalent to 60W equivalent. Since the power supply is reduced by changing the power supply source from the AC adapter 2 to the USB-PD adapter 3, it is preferable to lower the system performance to 60W or equivalent. For example, the PMU 105 changes the system performance to 60 W by lowering the operation clock of the CPU 101 or lowering the charging voltage of the battery 11. This PMU 105 corresponds to an example of a “route management unit”.
  • the diode 141 is a rectifying element.
  • the diode 141 is disposed between the AC adapter 2 and the abutting point 150.
  • the diode 141 allows electricity output from the AC adapter 2 to pass to the CPU power source 102 and the 5V / 3.3V power source 104.
  • the diode 141 prevents electricity from flowing into the AC adapter 2 through the power supply path extending from the AC adapter 2.
  • the diode 142 is a rectifying element.
  • the diode 142 is disposed between the USB-PD adapter 3 and the abutment point 150.
  • the diode 142 passes electricity output from the USB-PD adapter 3 toward the CPU power source 102 and the 5V / 3.3V power source 104.
  • the diode 142 prevents electricity from flowing into the USB-PD adapter 3 through the power supply path extending from the USB-PD adapter 3.
  • the output of the diode 141 and the output of the diode 142 collide with each other at the abutting point 150, and the higher voltage is supplied from the abutting point 150 to the CPU power source 102 and the 5V / 3.3V power source 104. That is, the diodes 141 and 142 and the abutting point 150 form a diode OR circuit.
  • the diodes 141 and 142 and the diode OR circuit having the butting point 150 correspond to an example of a “power supply circuit”.
  • the diode 143 is a rectifying element.
  • the diode 143 is disposed on a power supply path that connects the charger 106 and the battery 11 to the CPU power source 102 and the 5V / 3.3V power source 104.
  • the diode 143 allows electricity output from the battery 11 to pass toward the CPU power source 102 and the 5V / 3.3V power source 104.
  • the diode 143 prevents electricity from flowing into the battery 11 through the power supply path extending from the battery 11.
  • the comparator 108 is an operational amplifier / comparator.
  • the comparator 108 receives the reference voltage (VREF) from the reference voltage source at the ⁇ input terminal. Further, the comparator 108 receives the input of the voltage of the AC adapter 2 with respect to the + input terminal.
  • the voltage input from the AC adapter 2 is referred to as “detection voltage”.
  • the comparator 108 subtracts the reference voltage from the detection voltage, amplifies the result by multiplying the subtraction result by the positive power supply voltage (VCC), and outputs the result to the PMU 105. That is, when the value obtained by subtracting the reference voltage from the detection voltage is positive, the comparator 108 outputs a signal having a positive value to the PMU 105.
  • a signal having a positive value is referred to as a “high signal”.
  • the High signal is an AC adapter connection signal that notifies the connection of the AC adapter 2.
  • the comparator 108 when the value obtained by subtracting the reference voltage from the detection voltage is negative, the comparator 108 outputs a signal having a negative value to the PMU 105.
  • a signal having a negative value is referred to as a “Low signal”.
  • the Low signal is an AC adapter connection signal for notifying that the AC adapter 2 is not connected.
  • FET switch 122 is a P-type FET switch.
  • the FET switch 122 is disposed between the diode 141 and the butting point 150.
  • the drain of the FET switch 122 is connected to the output side of the AC adapter 2.
  • the source of the FET switch 122 is connected to the input side to the CPU power source 102 and the 5V / 3.3V power source 104.
  • the gate of the FET switch 122 is connected to the drain of the FET switch 121. Further, a path connecting from the path connecting the gate of the FET switch 122 and the drain of the FET switch 121 to the path connecting the USB-PD adapter 3 and the source of the FET switch 122 is provided. Is placed.
  • the FET switch 122 When the FET switch 121 is on, the FET switch 122 is turned on when the gate voltage drops to the ground. Further, when the FET switch 121 is off, the FET switch 122 is turned off when the voltage output from the USB-PD adapter 3 via the resistor 123 is applied to the gate.
  • FET switch 121 is an N-type FET switch.
  • the FET switch 121 is disposed between the gate of the FET switch 122 and the ground.
  • the drain of the FET switch 121 is connected to the gate of the FET switch 122.
  • the source of the FET switch 121 is connected to the ground.
  • the gate of the FET switch 121 is connected to the output of the comparator 108.
  • the FET switch 121 When the High signal is output from the comparator 108, the FET switch 121 is turned on when the voltage applied to the gate rises. That is, when the AC adapter 2 is connected, the FET switch 121 is turned on. Further, when a Low signal is output from the comparator 108, the FET switch 121 is turned off because the voltage applied to the gate decreases. That is, when the AC adapter 2 is connected, the FET switch 121 is turned off.
  • the leakage current from the diode 141 is not generated, and the output voltage from the USB-PD adapter 3 can be prevented from being input to the comparator 108 as a detection voltage. Therefore, erroneous detection of the AC adapter 2 when the AC adapter 2 is removed can be prevented.
  • FET switch 132 is a P-type FET switch.
  • the FET switch 132 is disposed between the diode 142 and the USB-PD adapter 3.
  • the source of the FET switch 132 is connected to the output side of the USB-PD adapter 3.
  • the drain of the FET switch 132 is connected to the input side to the diode 142.
  • the gate of the FET switch 132 is connected to the drain of the FET switch 131.
  • a path connecting from the path connecting the gate of the FET switch 132 and the drain of the FET switch 131 to the path connecting the USB-PD adapter 3 and the source of the FET switch 132 is provided, and a resistor 133 is provided on the path. Is placed.
  • the FET switch 132 When the FET switch 131 is on, the FET switch 132 is turned on because the gate voltage drops to the ground. Further, when the FET switch 131 is off, the FET switch 132 is turned off when the voltage output from the USB-PD adapter 3 via the resistor 133 is applied to the gate.
  • FET switch 131 is an N-type FET switch.
  • the FET switch 131 is disposed between the gate of the FET switch 132 and the ground.
  • the drain of the FET switch 131 is connected to the gate of the FET switch 132.
  • the source of the FET switch 131 is connected to the ground.
  • the gate of the FET switch 131 is connected to the PMU 105.
  • the FET switch 131 is turned on when a high voltage is applied from the PMU 105 to the gate.
  • the FET switch 131 is turned off when a low voltage is applied from the PMU 105 to the gate.
  • FIG. 2 is a diagram showing the transition of the power supply state in the personal computer.
  • a transition 201 occurs, and power is supplied from the battery 11.
  • the FET switches 121, 122, 131, and 132 are not switched, and the power output from the battery 11 is simply supplied to the CPU power source 102 and the 5V / 3.3V power source 104.
  • USB-PD adapter 3 when the USB-PD adapter 3 is connected in a state where power is supplied from the battery 11, a transition 202 occurs, and power is supplied from the USB-PD adapter 3.
  • the FET switches 121, 122, 131, and 132 are not switched, and the power output from the USB-PD adapter 3 is simply supplied to the CPU power source 102 and the 5V / 3.3V power source 104.
  • a transition 203 occurs and power is supplied from the battery 11.
  • the FET switches 121, 122, 131, and 132 are not switched, and the power output from the battery 11 is simply supplied to the CPU power source 102 and the 5V / 3.3V power source 104.
  • a transition 204 occurs, and power is supplied from the AC adapter 2.
  • the FET switches 121, 122, 131, and 132 are not switched, and the power output from the AC adapter 2 is simply supplied to the CPU power source 102 and the 5V / 3.3V power source 104.
  • FIG. 3 is a flowchart of power supply switching processing when the AC adapter is removed in the power supply control circuit according to the first embodiment.
  • the flow of the power supply switching process executed in the transition 205 will be described with reference to FIG.
  • the AC adapter 2 is removed while the AC adapter 2 and the USB-PD adapter 3 are connected to the personal computer 1 and power is supplied from the AC adapter 2 (step S101).
  • the input of the detection voltage from the AC adapter 2 to the comparator 108 is lost, and the detection voltage decreases. Thereby, since the reference voltage becomes higher than the detection voltage, the comparator 108 outputs a Low signal as an AC adapter connection signal (step S102).
  • step S104 When the FET switch 121 is turned off, the FET switch 122 is turned off (step S104). Thereby, erroneous detection of the AC adapter 2 due to the voltage output from the USB-PD adapter 3 is prevented.
  • the PMU 105 changes the system performance to a value that can be operated with the output power from the USB-PD adapter 3. Specifically, the PMU 105 changes the system performance to less than 45 W (step S105).
  • the PMU 105 determines whether the remaining battery level is equal to or greater than a predetermined value (step S106). When the remaining battery level is less than the predetermined value (step S106: No), the PMU 105 continues charging the battery 11 in a system performance state equivalent to 65 W until the remaining battery level becomes equal to or higher than the predetermined value (step S107). That is, the PMU 105 continues to charge the battery 11 while the output voltage from the USB-PD adapter 3 remains at 15V.
  • Step S106 When the battery remaining amount is equal to or greater than the predetermined value (Step S106: Yes), the PMU 105 turns off the FET switch 131 (Step S108).
  • the PMU 105 outputs an AC adapter removal notification to the USB-PD controller 103.
  • the USB-PD controller 103 instructs the USB-PD controller 31 to change the output power to 20V.
  • the USB-PD controller 31 increases the output voltage of the USB-PD adapter 3 to 20V (step S110).
  • the USB-PD controller 103 notifies the PMU 105 of a voltage rise completion notification.
  • the PMU 105 receives the notification of the completion of the voltage increase and turns on the FET switch 131 (step S111).
  • the PMU 105 changes the system performance to 60 W (step S113).
  • the personal computer 1 can operate with the output voltage 20 V and the output current 3 A of the USB-PD adapter 3.
  • FIG. 4 is a flowchart of the power supply switching process when the AC adapter is connected in the power supply control circuit according to the first embodiment.
  • FIG. 4 the flow of the power source switching process executed in the transition 206 will be described.
  • the AC adapter 2 is connected in a state where power is supplied from the USB-PD adapter 3 to the personal computer 1 (step S201).
  • the voltage output from the AC adapter 2 is input to the comparator 108 as a detection voltage, and the detection voltage rises. Accordingly, since the detection voltage becomes higher than the reference voltage, the comparator 108 outputs a High signal as an AC adapter connection signal (step S202).
  • step S203 When the comparator 108 outputs a high signal, the FET switch 121 is turned on (step S203).
  • the PMU 105 determines whether the remaining battery level is equal to or greater than a predetermined value (step S205). If the remaining battery level is less than the predetermined value (No at Step S205), the PMU 105 continues charging the battery 11 in a system performance state equivalent to 60 W until the remaining battery level becomes equal to or higher than the predetermined value (Step S206). That is, the PMU 105 continues to charge the battery 11 while the output voltage from the USB-PD adapter 3 remains 20V.
  • step S205 When the battery remaining amount is equal to or greater than the predetermined value (step S205: Yes), the PMU 105 turns off the FET switch 131 (step S207).
  • the PMU 105 outputs an AC adapter connection notification to the USB-PD controller 103.
  • the USB-PD controller 103 instructs the USB-PD controller 31 to change the output power to 15V.
  • the USB-PD controller 31 lowers the output voltage of the USB-PD adapter 3 to 15V (step S209).
  • the USB-PD controller 103 notifies the PMU 105 of a voltage drop completion notification.
  • the PMU 105 turns on the FET switch 131 (step S210).
  • the PMU 105 changes the system performance to 65 W (step S212). Thereby, the personal computer 1 can operate with the output voltage of the AC adapter 2 of less than 20V.
  • the present embodiment it waits until the battery 11 is sufficiently charged in order to deal with a failure such as a momentary interruption, but if it does not care about the occurrence of these failures, without waiting for charging,
  • the voltage of the USB-PD adapter 3 may be changed.
  • the power supply control circuit according to the present embodiment reduces the output voltage of the USB-PD adapter below the output voltage of the AC adapter when both the USB-PD adapter and the AC adapter are connected. Accordingly, even when both the AC adapter and the USB-PD adapter are connected, the power supplied from the AC adapter can be used for driving the system, and the system performance can be improved. In particular, even when both the AC adapter and the USB-PD adapter are connected, the battery can be charged with a high voltage, and the time required for charging the battery can be shortened. As described above, the power supply control circuit according to the present embodiment can reduce a decrease in the performance of the electronic device.
  • the diode OR circuit when the USB-PD adapter supplies a voltage of 20V, there is a possibility that the insertion of the AC adapter may be erroneously detected due to the generation of the leakage voltage due to the leakage current of the diode.
  • a Schottky barrier diode often used for rectification of a large current generates a leakage current of about 10 mA depending on the ambient temperature. For this reason, in order to simply dispose the discharge resistor and reduce the leakage current to a level that does not falsely detect, the value of the discharge resistor becomes small, and the standby power with the AC adapter inserted becomes large.
  • the power supply control circuit disconnects the path from the USB-PD adapter to the comparator, and thus the AC adapter is disconnected when the AC adapter is not connected. False detection can be avoided.
  • no discharge resistor since no discharge resistor is used, it is possible to avoid an increase in standby power when the AC adapter is inserted, and power consumption can be reduced.
  • the power supply control circuit in order to avoid erroneous detection of the AC adapter, when the AC adapter is removed, the output path from the diode through which the electricity output from the AC adapter passes is cut off.
  • another configuration for preventing the erroneous detection may be used.
  • the power supply control circuit according to the present embodiment can improve the performance of the system to be supplied with power.
  • the power supply control circuit according to this embodiment also has the circuit configuration shown in FIG.
  • the power supply control circuit according to the present embodiment reduces the output voltage of the USB-PD adapter 3 to less than the output voltage of the AC adapter 2 by cutting the power supply path from the USB-PD adapter 3 according to the first embodiment. And different. In the following, description of the same functions as those of the first embodiment will be omitted.
  • the PMU 105 When the AC adapter 2 is removed, the PMU 105 receives a Low signal input from the comparator 108 as an AC adapter connection signal. Then, the PMU 105 turns off the FET switch 131. Next, the PMU 105 outputs an AC adapter removal notification to the USB-PD controller 103. Thereafter, the PMU 105 receives a voltage rise completion notification from the USB-PD controller 103. Then, the PMU 105 turns on the FET switch 131. Thereafter, the PMU 105 changes the system performance to 60 W or equivalent.
  • the PMU 105 receives a High signal input from the comparator 108 as an AC adapter connection signal. Then, the PMU 105 turns off the FET switch 131. Thus, by turning off the FET switch 131, the electricity output from the USB-PD adapter 3 does not flow to the abutment point 150. As a result, the output voltage of the AC adapter 2 in the diode OR circuit becomes higher than the voltage of the path connected to the USB-PD adapter 3, so that the output power from the AC adapter 2 is the CPU power supply 102 and the 5V / 3.3V power supply 104. Will be supplied to. Thereafter, the PMU 105 changes the system performance to 65 W or equivalent.
  • FIG. 5 is a flowchart of power supply switching processing when the AC adapter is removed in the power supply control circuit according to the second embodiment.
  • the AC adapter 2 is removed while the AC adapter 2 and the USB-PD adapter 3 are connected to the personal computer 1 and power is supplied from the AC adapter 2 (step S301).
  • the input of the detection voltage from the AC adapter 2 to the comparator 108 is lost, and the detection voltage decreases. Accordingly, since the reference voltage becomes higher than the detection voltage, the comparator 108 outputs a Low signal as an AC adapter connection signal (step S302).
  • step S304 When the FET switch 121 is turned off, the FET switch 122 is turned off (step S304). Thereby, erroneous detection of the AC adapter 2 due to the voltage output from the USB-PD adapter 3 is prevented.
  • the PMU 105 turns off the FET switch 131 (step S305).
  • the PMU 105 outputs an AC adapter removal notification to the USB-PD controller 103.
  • the USB-PD controller 103 instructs the USB-PD controller 31 to change the output power to 20V.
  • the USB-PD controller 31 increases the output voltage of the USB-PD adapter 3 to 20 V (step S307).
  • the USB-PD controller 103 notifies the PMU 105 of a voltage rise completion notification.
  • the PMU 105 turns on the FET switch 131 (step S308).
  • the PMU 105 changes the system performance to 60 W (step S310).
  • the personal computer 1 can operate with the output voltage 20 V and the output current 3 A of the USB-PD adapter 3.
  • FIG. 6 is a flowchart of the power supply switching process when the AC adapter is connected in the power supply control circuit according to the second embodiment.
  • the AC adapter 2 is connected in a state where power is supplied from the USB-PD adapter 3 to the personal computer 1 (step S401).
  • the voltage output from the AC adapter 2 is input to the comparator 108 as a detection voltage, and the detection voltage rises. Accordingly, since the detection voltage becomes higher than the reference voltage, the comparator 108 outputs a High signal as an AC adapter connection signal (step S402).
  • step S403 When the comparator 108 outputs a high signal, the FET switch 121 is turned on (step S403).
  • the PMU 105 turns off the FET switch 131 (step S405).
  • the PMU 105 changes the system performance to 65 W (step S407). Thereby, the personal computer 1 can operate with the output voltage of the AC adapter 2 of less than 20V.
  • the PMU 105 may wait for the switching until the battery 11 is sufficiently charged in either the removal or connection of the AC adapter 2.
  • the power supply control circuit reduces the output voltage to less than the output voltage of the AC adapter by cutting the power supply path of the USB-PD adapter. Let Accordingly, even when both the AC adapter and the USB-PD adapter are connected, the power supplied from the AC adapter can be used for driving the system, and the system performance can be improved.
  • USB-PD Controller 101 CPU 102
  • CPU power supply 103 USB-PD controller 104 5V / 3.3V power supply 105
  • PMU 106 Charger 108 Comparator 121, 122, 131, 132 FET switch 141-143 Diode 150 Butting point

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Business, Economics & Management (AREA)
  • Emergency Management (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)
  • Power Sources (AREA)
  • Stand-By Power Supply Arrangements (AREA)

Abstract

Provided are a power supply control circuit, an electronic device, and a power supply control method which lessen deterioration of the performance of a system to be supplied with electric power. A diode OR circuit including diodes 141 and 142 outputs electric power that is supplied from a supply path having a higher voltage between a first supply path which is connected to a USB-PD adapter 3 and a second supply path which is connected to an AC adapter 2 having a capacity larger than that of the USB-PD adapter 3. A USB-PD controller 103 performs control such that the voltage of the second supply path becomes higher than the voltage of the first supply path when the voltage of the second supply path is lower than the voltage of the first supply path in a state where both the USB-PD adapter 3 and the AC adapter 2 are connected to the first supply path and the second supply path, respectively.

Description

電源制御回路、電子機器及び電源制御方法Power supply control circuit, electronic device, and power supply control method
　本発明は、電源制御回路、電子機器及び電源制御方法に関する。 The present invention relates to a power supply control circuit, an electronic device, and a power supply control method.
　近年、ノートパソコンなどの携帯型の電子機器が広く使用されるようになった。このような携帯型の電子機器は、内部に搭載されたバッテリなどで動作することも多く、据え置き型の電子機器のように常時外部電源に接続されているわけではない。そのため、携帯型の電子機器は、ＡＣ（Alternating　Current）アダプタなどの外部電源を接続して外部から電力の供給を受ける構成が一般的である。 In recent years, portable electronic devices such as notebook computers have been widely used. Such portable electronic devices often operate with a battery or the like mounted therein, and are not always connected to an external power source like stationary electronic devices. For this reason, portable electronic devices generally have a configuration in which an external power source such as an AC (Alternating Current) adapter is connected to receive power from the outside.
　さらに、最近になって、ＵＳＢ－ＰＤ（Universal　Serial　Bus-Power　Delivery）に対応した電子機器が増加している。ＵＳＢ－ＰＤは、受電側及び送電側の双方で、供給される電圧を事前に通知して、可変の電圧を出力する規格である。タブレット型端末やノートＰＣ（Personal　Computer）などのＵＳＢ　Ｔｙｐｅ　Ｃコネクタを備えた電子機器は、コネクタ経由で最大電圧が２０Ｖであり最大電流が３Ａである電力、すなわち最大６０Ｗの電力の供給を受けることができる。ＵＳＢ　Ｔｙｐｅ　Ｃコネクタは、ＵＳＢ－ＰＤの規格に準拠したものが多く、従来の固定出力タイプのＡＣアダプタ（以下、単に「ＡＣアダプタ」という。）に取って代わることが期待されている。 Furthermore, recently, electronic devices compatible with USB-PD (Universal Serial Bus-Power Delivery) are increasing. USB-PD is a standard that notifies a supplied voltage in advance and outputs a variable voltage on both the power receiving side and the power transmission side. Electronic devices equipped with USB Type C connectors such as tablet terminals and notebook PCs (Personal Computers) are supplied with power via a connector with a maximum voltage of 20V and a maximum current of 3A, that is, a maximum of 60W. Can do. Many USB Type C connectors conform to the USB-PD standard, and are expected to replace conventional fixed output type AC adapters (hereinafter simply referred to as “AC adapters”).
　一方、ＵＳＢ－ＰＤの規格に準拠したＵＳＢ－ＰＤアダプタの放電能力は、６０Ｗが最大である。そのため、バッテリを急速に充電したいなどの用途で消費電力が６０Ｗ以上となる電子機器においては、６０Ｗ以上の容量を有するＡＣアダプタとＵＳＢ－ＰＤアダプタとが併用されることが予想される。ＡＣアダプタとＵＳＢ－ＰＤアダプタとを併用する場合、ダイオードＯＲでＡＣアダプタの出力とＵＳＢ－ＰＤアダプタの出力とを突き当てて、電圧の高い側から供給された電力を負荷に供給させる構成が考えられる。 On the other hand, the maximum discharge capacity of a USB-PD adapter conforming to the USB-PD standard is 60 W. Therefore, it is expected that an AC adapter having a capacity of 60 W or more and a USB-PD adapter are used in combination in an electronic device whose power consumption is 60 W or more for applications such as rapidly charging a battery. When using an AC adapter and a USB-PD adapter together, a configuration in which the output of the AC adapter and the output of the USB-PD adapter are abutted by a diode OR to supply the power supplied from the higher voltage side to the load is considered. It is done.
　なお、２つの電源から電力供給を受ける技術として、可変電源とバッテリとをスイッチで相互に切り替えてシステムに供給する従来技術がある。また、アダプタが抜かれた場合にバッテリからの電流によりアダプタ接続と誤検出しないように、バッテリに流れる電流を監視する従来技術がある。さらに、電力源毎にｂａｃｋ－ｔｏ－ｂａｃｋのＦＥＴ（Field　Effect　Transistor）経由して結合した電力源群において、ダイオードＯＲを経由するようにＦＥＴを遷移させることで無瞬断で電力源の切り替えを行う従来技術がある。 As a technology for receiving power supply from two power sources, there is a conventional technology in which a variable power source and a battery are mutually switched by a switch and supplied to the system. In addition, there is a conventional technique for monitoring the current flowing through the battery so that the adapter connection is not erroneously detected by the current from the battery when the adapter is removed. Furthermore, in a power source group coupled via a back-to-back FET (Field Effect Transistor) for each power source, the power source can be switched without instantaneous interruption by transiting the FET so as to pass through the diode OR. There are conventional techniques to do.
特開２００５－２７４９６号公報JP 2005-27496 A 特開２００８－２２８４１６号公報JP 2008-228416 A 特開２００５－８０４９１号公報JP 2005-80491 A
　しかしながら、ＵＳＢ－ＰＤアダプタが６０Ｗで放電している際の電圧は２０Ｖである。これに対して、ＡＣアダプタが出力する電圧は、２０Ｖよりも低いことが多く、１２～１９Ｖが一般的である。そのため、単純にダイオードＯＲでＡＣアダプタの出力とＵＳＢ－ＰＤアダプタの出力とを突き当てた場合、電圧が高いＵＳＢ－ＰＤから優先的に放電されてしまう。そこで、電子機器は、レガシーＡＣアダプタが接続されていても、自己の消費電力を６０Ｗ未満に抑えて動作する。この場合、電子機器に搭載されたバッテリの充電時間の増加や、ＣＰＵの動作クロックの低下などのシステムのパフォーマンスが低下するおそれがある。このように、消費電力を６０Ｗ未満に抑えて動作した場合、電子機器は、十分な性能を発揮することが困難となる。 However, the voltage when the USB-PD adapter is discharged at 60 W is 20V. On the other hand, the voltage output from the AC adapter is often lower than 20V, and is generally 12 to 19V. For this reason, when the output of the AC adapter and the output of the USB-PD adapter are simply brought into contact with each other by the diode OR, the USB-PD having a high voltage is preferentially discharged. Therefore, the electronic device operates with its own power consumption suppressed to less than 60 W even when the legacy AC adapter is connected. In this case, there is a risk that system performance such as an increase in charging time of a battery mounted on the electronic device or a decrease in operation clock of the CPU may be deteriorated. As described above, when operating with power consumption less than 60 W, it is difficult for the electronic device to exhibit sufficient performance.
　また、可変電源とバッテリとを切り替える従来技術、バッテリに流れる電流を監視する従来技術、及び、ダイオードＯＲを経由するようにＦＥＴを遷移させる従来技術の何れでも、２つの電源の電圧差については考慮されていない。そのため、いずれの従来技術を用いても、性能の低下を回避することは困難である。 In addition, any of the conventional technology for switching between a variable power source and a battery, the conventional technology for monitoring the current flowing through the battery, and the conventional technology for transitioning the FET through the diode OR takes into account the voltage difference between the two power sources. It has not been. Therefore, it is difficult to avoid a decrease in performance by using any conventional technique.
　開示の技術は、上記に鑑みてなされたものであって、電力供給対象であるシステムの性能の低下を軽減する電源制御回路、電子機器及び電源制御方法を提供することを目的とする。 The disclosed technology has been made in view of the above, and an object thereof is to provide a power supply control circuit, an electronic device, and a power supply control method that reduce a decrease in performance of a system that is a power supply target.
　本願の開示する電源制御回路、電子機器及び電源制御方法の一つの態様において、電力供給回路は、第１電源に接続される第１供給経路及び前記第１電源よりも容量の大きい第２電源に接続される第２供給経路のうち電圧の高い方から供給される電力を出力する。供給電圧制御部は、前記第１電源及び前記第２電源の双方が接続された状態で、前記第２供給経路の電圧が前記第１供給経路の電圧未満の場合、前記第２供給経路の電圧が前記第１供給経路の電圧より高くなるように制御する。 In one aspect of the power supply control circuit, the electronic device, and the power supply control method disclosed in the present application, the power supply circuit includes a first supply path connected to the first power supply and a second power supply having a larger capacity than the first power supply. The power supplied from the higher voltage of the connected second supply paths is output. The supply voltage control unit is configured such that when both the first power supply and the second power supply are connected and the voltage of the second supply path is less than the voltage of the first supply path, the voltage of the second supply path Is controlled to be higher than the voltage of the first supply path.
　本願の開示する電源制御回路、電子機器及び電源制御方法の一つの態様によれば、電力供給対象であるシステムの性能の低下を軽減することができるという効果を奏する。 According to one aspect of the power supply control circuit, the electronic device, and the power supply control method disclosed in the present application, there is an effect that it is possible to reduce a decrease in performance of a system that is a power supply target.
図１は、実施例１に係るパーソナルコンピュータの回路構成図である。FIG. 1 is a circuit configuration diagram of the personal computer according to the first embodiment. 図２は、パーソナルコンピュータにおける電力の供給状態の遷移を表す図である。FIG. 2 is a diagram illustrating transition of the power supply state in the personal computer. 図３は、実施例１に係る電源制御回路におけるＡＣアダプタ抜去時の電源切替処理のフローチャートである。FIG. 3 is a flowchart of power supply switching processing when the AC adapter is removed in the power supply control circuit according to the first embodiment. 図４は、実施例１に係る電源制御回路におけるＡＣアダプタ接続時の電源切替処理のフローチャートである。FIG. 4 is a flowchart of the power supply switching process when the AC adapter is connected in the power supply control circuit according to the first embodiment. 図５は、実施例２に係る電源制御回路におけるＡＣアダプタ抜去時の電源切替処理のフローチャートである。FIG. 5 is a flowchart of power supply switching processing when the AC adapter is removed in the power supply control circuit according to the second embodiment. 図６は、実施例２に係る電源制御回路におけるＡＣアダプタ接続時の電源切替処理のフローチャートである。FIG. 6 is a flowchart of the power supply switching process when the AC adapter is connected in the power supply control circuit according to the second embodiment.
　以下に、本願の開示する電源制御回路、電子機器及び電源制御方法の実施例を図面に基づいて詳細に説明する。なお、以下の実施例により本願の開示する電源制御回路、電子機器及び電源制御方法が限定されるものではない。特に、以下では、パーソナルコンピュータを例に説明するが、ＵＳＢ－ＰＤアダプタ及びＡＣアダプタの双方を接続でき、且ついずれからも電力供給を受けることができる電子機器であれば他の機器であってもよい。 Hereinafter, embodiments of a power supply control circuit, an electronic device, and a power supply control method disclosed in the present application will be described in detail with reference to the drawings. The power supply control circuit, the electronic device, and the power supply control method disclosed in the present application are not limited by the following embodiments. In particular, a personal computer will be described below as an example, but any other device can be used as long as it is an electronic device that can be connected to both a USB-PD adapter and an AC adapter and can receive power supply from both. Good.
　図１は、実施例１に係るパーソナルコンピュータの回路構成図である。図１に示すように、本実施例に係るシステムは、パーソナルコンピュータ（ＰＣ：Personal　Computer）１、ＡＣアダプタ２及びＵＳＢ－ＰＤアダプタ３を有する。 FIG. 1 is a circuit configuration diagram of the personal computer according to the first embodiment. As shown in FIG. 1, the system according to this embodiment includes a personal computer (PC) 1, an AC adapter 2, and a USB-PD adapter 3.
　ＡＣアダプタ２は、６０Ｗ以上の容量を有し、且つ、出力電圧が２０Ｖより低い電源である。ＡＣアダプタ２は、後述するＵＳＢ－ＰＤアダプタ３よりも容量が大きい。ＡＣアダプタ２は、家庭用コンセントなどの１次電源から交流の電気の供給を受ける。そして、ＡＣアダプタ２は、交流の電気を直流に変換し、電圧を降下させて出力する。ＡＣアダプタ２は、後述するＵＳＢ－ＰＤアダプタ３とＣＰＵ電源１０２及び５Ｖ／３．３Ｖ電源１０４とを結ぶ電力供給経路上に接続される。突き当て点１５０は、ＡＣアダプタ２のＵＳＢ－ＰＤアダプタ３とＣＰＵ電源１０２及び５Ｖ／３．３Ｖ電源１０４とを結ぶ電力供給経路上の接続点である。このＡＣアダプタ２が、「第２電源」の一例にあたる。 The AC adapter 2 is a power source having a capacity of 60 W or more and an output voltage lower than 20V. The AC adapter 2 has a larger capacity than the USB-PD adapter 3 described later. The AC adapter 2 is supplied with AC electricity from a primary power source such as a household outlet. The AC adapter 2 converts alternating current electricity into direct current, drops the voltage, and outputs it. The AC adapter 2 is connected to a power supply path that connects a USB-PD adapter 3 described later with a CPU power source 102 and a 5V / 3.3V power source 104. The butting point 150 is a connection point on the power supply path that connects the USB-PD adapter 3 of the AC adapter 2 to the CPU power source 102 and the 5V / 3.3V power source 104. The AC adapter 2 corresponds to an example of “second power supply”.
　ＵＳＢ－ＰＤアダプタ３は、ＵＳＢ－ＰＤの規格に準拠した電源である。ＵＳＢ－ＰＤアダプタ３は、最大出力電圧が２０Ｖであり、最大出力電流が３Ａである。すなわち、ＵＳＢ－ＰＤアダプタ３は、最大６０Ｗの電力を供給する。そして、ＵＳＢ－ＰＤアダプタ３は、ＡＣアダプタ２の供給電圧よりも高い電圧又はＡＣアダプタ２の供給電圧よりも低い電圧を選択的に出力することができる。本実施例に係るＵＳＢ－ＰＤアダプタ３は、少なくとも供給電圧として１５Ｖの電圧又は２０Ｖの電圧を選択的に出力することができる。ＵＳＢ－ＰＤアダプタ３は、例えばＵＳＢ　Ｔｙｐｅ　Ｃコネクタを介してパーソナルコンピュータ１と接続する。このＵＳＢ－ＰＤアダプタ３が、「第１電源」の一例にあたる。 The USB-PD adapter 3 is a power supply conforming to the USB-PD standard. The USB-PD adapter 3 has a maximum output voltage of 20V and a maximum output current of 3A. That is, the USB-PD adapter 3 supplies a maximum power of 60W. The USB-PD adapter 3 can selectively output a voltage higher than the supply voltage of the AC adapter 2 or a voltage lower than the supply voltage of the AC adapter 2. The USB-PD adapter 3 according to the present embodiment can selectively output at least a voltage of 15V or a voltage of 20V as a supply voltage. The USB-PD adapter 3 is connected to the personal computer 1 via, for example, a USB Type C connector. The USB-PD adapter 3 corresponds to an example of “first power supply”.
　ＵＳＢ－ＰＤアダプタ３は、ＵＳＢ－ＰＤコントローラ３１を有する。ＵＳＢ－ＰＤコントローラ３１は、後述するパーソナルコンピュータ１のＵＳＢ－ＰＤコントローラ１０３とＵＳＢ　Ｔｙｐｅ　Ｃコネクタを介して通信を行い、電圧の向きを把握する。電圧の向きがＵＳＢ－ＰＤアダプタ３からパーソナルコンピュータ１へ向かう場合、ＵＳＢ－ＰＤアダプタ３は、電力容量などの情報をＵＳＢ－ＰＤコントローラ１０３から取得する。そして、ＵＳＢ－ＰＤコントローラ３１は、通知された電力容量にＵＳＢ－ＰＤアダプタ３の出力電圧を制御し、ＵＳＢ－ＰＤアダプタ３に通知された電力容量で電力供給を行わせる。 The USB-PD adapter 3 has a USB-PD controller 31. The USB-PD controller 31 communicates with the USB-PD controller 103 of the personal computer 1 to be described later via a USB Type C connector to grasp the voltage direction. When the voltage direction is from the USB-PD adapter 3 to the personal computer 1, the USB-PD adapter 3 acquires information such as power capacity from the USB-PD controller 103. Then, the USB-PD controller 31 controls the output voltage of the USB-PD adapter 3 to the notified power capacity, and causes the USB-PD adapter 3 to supply power with the notified power capacity.
　パーソナルコンピュータ１は、マザーボード１０及びバッテリ１１を有する。パーソナルコンピュータ１は、この他にも、図示しないが、ハードディスク及び可搬記憶媒体の読取装置などを有する。図１では、ＡＣアダプタ２及びＵＳＢ－ＰＤアダプタ３からマザーボード１０への電力供給を示したが、ＡＣアダプタ２及びＵＳＢ－ＰＤアダプタ３は、マザーボード１０以外のハードディスク及び可搬記憶媒体の読取装置などへの電力供給を行ってもよい。 The personal computer 1 has a motherboard 10 and a battery 11. In addition to this, the personal computer 1 includes a hard disk, a portable storage medium reader, and the like (not shown). In FIG. 1, power supply from the AC adapter 2 and the USB-PD adapter 3 to the motherboard 10 is shown. However, the AC adapter 2 and the USB-PD adapter 3 are a hard disk and a portable storage medium reading device other than the motherboard 10. You may supply the electric power to.
　バッテリ１１は、パーソナルコンピュータ１の内蔵バッテリである。バッテリ１１は、パーソナルコンピュータ１がＡＣアダプタ２及びＵＳＢ－ＰＤアダプタ３から電力の供給を受けない場合、ＣＰＵ電源１０２及び５Ｖ／３．３Ｖ電源１０４を含む各部に対して電力の供給を行う。 The battery 11 is a built-in battery of the personal computer 1. When the personal computer 1 does not receive power supply from the AC adapter 2 and the USB-PD adapter 3, the battery 11 supplies power to each unit including the CPU power source 102 and the 5V / 3.3V power source 104.
　マザーボード１０は、ＣＰＵ（Central　Processing　Unit）１０１、ＣＰＵ電源１０２、ＵＳＢ－ＰＤコントローラ１０３、５Ｖ／３．３Ｖ電源１０４、ＰＭＵ（Power　Management　Unit）１０５及びチャージャ１０６を有する。また、マザーボード１０上には、ＦＥＴスイッチ１２１，１２２，１３１及び１３２、抵抗１２３及び１３３、ダイオード１４１～１４３、並びに、コンパレータ１０８が搭載される。これらＰＭＵ１０５、チャージャ１０６、ＦＥＴスイッチ１２１，１２２，１３１及び１３２、抵抗１２３及び１３３、ダイオード１４１～１４３、並びに、コンパレータ１０８を有する回路が、「電源制御回路」の一例にあたる。 The motherboard 10 includes a CPU (Central Processing Unit) 101, a CPU power supply 102, a USB-PD controller 103, a 5V / 3.3V power supply 104, a PMU (Power Management Unit) 105, and a charger 106. On the motherboard 10, FET switches 121, 122, 131, and 132, resistors 123 and 133, diodes 141 to 143, and a comparator 108 are mounted. The circuit including the PMU 105, the charger 106, the FET switches 121, 122, 131, and 132, the resistors 123 and 133, the diodes 141 to 143, and the comparator 108 corresponds to an example of a “power supply control circuit”.
　ＣＰＵ１０１は、ＣＰＵ電源１０２から供給された電力により動作し、演算処理を行う演算処理部である。ＣＰＵ電源１０２は、ＣＰＵ１０１が駆動するための電力を供給する電源である。ＣＰＵ電源１０２は、ＡＣアダプタ２、ＵＳＢ－ＰＤアダプタ３又はバッテリ１１の何れかから電力供給を受ける。そして、ＣＰＵ電源１０２は、供給された電力をＣＰＵ１０１の駆動電圧に調整し、ＣＰＵ１０１へ電力供給を行う。 The CPU 101 is an arithmetic processing unit that operates by the power supplied from the CPU power source 102 and performs arithmetic processing. The CPU power source 102 is a power source that supplies power for driving the CPU 101. The CPU power supply 102 receives power supply from any of the AC adapter 2, USB-PD adapter 3, or battery 11. The CPU power supply 102 adjusts the supplied power to the drive voltage of the CPU 101 and supplies power to the CPU 101.
　ＣＰＵ電源１０２は、ＡＣアダプタ２のみが挿入された場合、ＡＣアダプタ２が出力した電力の供給を受ける。また、ＵＳＢ－ＰＤアダプタ３のみが挿入された場合、ＣＰＵ電源１０２は、ＵＳＢ－ＰＤアダプタ３が出力した電力の供給を受ける。また、ＡＣアダプタ２及びＵＳＢ－ＰＤアダプタ３が接続されず、バッテリ１１のみが接続された場合、ＣＰＵ電源１０２は、バッテリ１１から出力された電力の供給を受ける。 CPU power supply 102 receives supply of power output from AC adapter 2 when only AC adapter 2 is inserted. When only the USB-PD adapter 3 is inserted, the CPU power supply 102 receives the power output from the USB-PD adapter 3. Further, when the AC adapter 2 and the USB-PD adapter 3 are not connected and only the battery 11 is connected, the CPU power supply 102 receives supply of power output from the battery 11.
　さらに、ＡＣアダプタ２とＵＳＢ－ＰＤアダプタ３との双方が接続された場合、ＣＰＵ電源１０２は、電圧が高い方の出力電力の供給を受ける。本実施例では後述するように、ＡＣアダプタ２とＵＳＢ－ＰＤアダプタ３との双方が接続された場合、ＵＳＢ－ＰＤアダプタ３の出力電力は１５Ｖに下げられ、ＡＣアダプタ２の出力電力は１９Ｖに維持される。そこで、ＡＣアダプタ２とＵＳＢ－ＰＤアダプタ３との双方が接続された場合、ＣＰＵ電源１０２は、ＡＣアダプタ２が出力する電力の供給を受ける。 Furthermore, when both the AC adapter 2 and the USB-PD adapter 3 are connected, the CPU power supply 102 is supplied with output power having a higher voltage. In this embodiment, as will be described later, when both the AC adapter 2 and the USB-PD adapter 3 are connected, the output power of the USB-PD adapter 3 is lowered to 15V, and the output power of the AC adapter 2 is set to 19V. Maintained. Therefore, when both the AC adapter 2 and the USB-PD adapter 3 are connected, the CPU power source 102 receives the power output from the AC adapter 2.
　ＵＳＢ－ＰＤコントローラ１０３は、ＵＳＢ－ＰＤアダプタ３の制御を行う。ＵＳＢ－ＰＤコントローラ１０３は、５Ｖ／３．３Ｖ電源１０４からの電力により動作する。 The USB-PD controller 103 controls the USB-PD adapter 3. The USB-PD controller 103 operates with power from the 5V / 3.3V power supply 104.
　ＵＳＢ－ＰＤコントローラ１０３は、ＵＳＢ－ＰＤアダプタ３が出力可能な電力の値として、段階的な複数の値を予め有する。そして、ＵＳＢ－ＰＤコントローラ１０３は、ＵＳＢ　Ｔｙｐｅ　Ｃコネクタを介してＵＳＢ－ＰＤコントローラ３１と通信を行い電圧の方向を取得する。そして、電圧方向がＵＳＢ－ＰＤアダプタ３からパーソナルコンピュータ１へ向かう場合、ＵＳＢ－ＰＤコントローラ１０３は、予め有する出力電力の値から１つを選択し、選択した出力電力の値をＵＳＢ－ＰＤコントローラ３１へ通知する。 The USB-PD controller 103 has a plurality of stepwise values in advance as power values that the USB-PD adapter 3 can output. The USB-PD controller 103 communicates with the USB-PD controller 31 via the USB Type C connector to acquire the voltage direction. When the voltage direction goes from the USB-PD adapter 3 to the personal computer 1, the USB-PD controller 103 selects one of the pre-set output power values and sets the selected output power value to the USB-PD controller 31. To notify.
　ＵＳＢ－ＰＤコントローラ１０３は、ＡＣアダプタ２が挿入された場合、ＡＣアダプタ接続通知をＰＭＵ１０５から受ける。そして、ＵＳＢ－ＰＤコントローラ１０３は、ＵＳＢ－ＰＤアダプタ３が接続されているか否かを判定し、接続されている場合、ＵＳＢ－ＰＤアダプタ３の出力電圧として１５Ｖを通知する。その後、ＵＳＢ－ＰＤコントローラ１０３は、電圧降下完了の通知をＰＭＵ１０５へ出力する。 USB-PD controller 103 receives AC adapter connection notification from PMU 105 when AC adapter 2 is inserted. Then, the USB-PD controller 103 determines whether or not the USB-PD adapter 3 is connected, and if it is connected, notifies the output voltage of the USB-PD adapter 3 of 15V. Thereafter, the USB-PD controller 103 outputs a voltage drop completion notification to the PMU 105.
　また、ＡＣアダプタ２が抜去された場合、ＵＳＢ－ＰＤコントローラ１０３は、ＡＣアダプタ抜去通知をＰＭＵ１０５から受ける。そして、ＵＳＢ－ＰＤコントローラ１０３は、ＵＳＢ－ＰＤアダプタ３が接続されているか否かを判定し、接続されている場合、ＵＳＢ－ＰＤアダプタ３の出力電圧として２０Ｖを通知する。その後、ＵＳＢ－ＰＤコントローラ１０３は、電圧上昇完了の通知をＰＭＵ１０５へ出力する。このＵＳＢ－ＰＤコントローラ１０３が、「供給電圧制御部」の一例にあたる。 When the AC adapter 2 is removed, the USB-PD controller 103 receives an AC adapter removal notification from the PMU 105. Then, the USB-PD controller 103 determines whether or not the USB-PD adapter 3 is connected, and if it is connected, notifies the output voltage of the USB-PD adapter 3 of 20V. Thereafter, the USB-PD controller 103 outputs a voltage rise completion notification to the PMU 105. The USB-PD controller 103 is an example of a “supply voltage control unit”.
　５Ｖ／３．３Ｖ電源１０４は、ＵＳＢ－ＰＤコントローラ１０３へ電力を供給する電源である。５Ｖ／３．３Ｖ電源１０４は、ＡＣアダプタ２、ＵＳＢ－ＰＤアダプタ３又はバッテリ１１の何れかから電力供給を受ける。そして、５Ｖ／３．３Ｖ電源１０４は、供給された電力をＵＳＢ－ＰＤコントローラ１０３の駆動電圧である５Ｖ又は３．３Ｖに調整し、ＵＳＢ－ＰＤコントローラ１０３へ電力供給を行う。５Ｖ／３．３Ｖ電源１０４は、ＵＳＢ－ＰＤコントローラ１０３以外にも、例えばメモリなどのマザーボード１０上に搭載された各部に対して、それぞれの駆動電圧に合わせて電圧を５Ｖ又は３．３Ｖに変更して電力供給を行う。 The 5V / 3.3V power supply 104 is a power supply that supplies power to the USB-PD controller 103. The 5V / 3.3V power supply 104 is supplied with power from any one of the AC adapter 2, the USB-PD adapter 3, and the battery 11. The 5V / 3.3V power supply 104 adjusts the supplied power to 5V or 3.3V, which is the drive voltage of the USB-PD controller 103, and supplies power to the USB-PD controller 103. In addition to the USB-PD controller 103, the 5V / 3.3V power supply 104 changes the voltage to 5V or 3.3V in accordance with the driving voltage for each part mounted on the motherboard 10 such as a memory. Power supply.
　５Ｖ／３．３Ｖ電源１０４は、ＡＣアダプタ２のみが挿入された場合、ＡＣアダプタ２が出力した電力の供給を受ける。また、ＵＳＢ－ＰＤアダプタ３のみが挿入された場合、５Ｖ／３．３Ｖ電源１０４は、ＵＳＢ－ＰＤアダプタ３が出力した電力の供給を受ける。また、ＡＣアダプタ２及びＵＳＢ－ＰＤアダプタ３が接続されず、バッテリ１１のみが接続された場合、５Ｖ／３．３Ｖ電源１０４は、バッテリ１１から出力された電力の供給を受ける。 The 5V / 3.3V power supply 104 receives the power output from the AC adapter 2 when only the AC adapter 2 is inserted. When only the USB-PD adapter 3 is inserted, the 5V / 3.3V power source 104 receives the power output from the USB-PD adapter 3. Further, when the AC adapter 2 and the USB-PD adapter 3 are not connected and only the battery 11 is connected, the 5V / 3.3V power supply 104 receives supply of power output from the battery 11.
　さらに、ＡＣアダプタ２とＵＳＢ－ＰＤアダプタ３との双方が接続された場合、５Ｖ／３．３Ｖ電源１０４は、電圧が高い方の出力電力の供給を受ける。例えば、ＵＳＢ－ＰＤアダプタ３の出力電力が１５Ｖであり、ＡＣアダプタ２の出力電力は１９Ｖであ場合、５Ｖ／３．３Ｖ電源１０４は、ＡＣアダプタ２が出力する電力の供給を受ける。 Furthermore, when both the AC adapter 2 and the USB-PD adapter 3 are connected, the 5V / 3.3V power supply 104 receives the output power with the higher voltage. For example, when the output power of the USB-PD adapter 3 is 15V and the output power of the AC adapter 2 is 19V, the 5V / 3.3V power supply 104 receives the power output from the AC adapter 2.
　チャージャ１０６は、ＵＳＢ－ＰＤアダプタ３とＡＣアダプタ２との出力が突き当たる点とＣＰＵ電源１０２及び５Ｖ／３．３Ｖ電源１０４とを結ぶ電力供給経路と並行するように配置される。チャージャ１０６は、ＡＣアダプタ２又はＵＳＢ－ＰＤアダプタ３から供給された電力の入力を受ける。そして、チャージャ１０６は、バッテリ１１を充電するための電圧まで供給された電力の電圧を降下させる。そして、チャージャ１０６は、電圧を降下させた電気を供給してバッテリ１１を充電する。 The charger 106 is arranged in parallel with the power supply path connecting the CPU power source 102 and the 5V / 3.3V power source 104 to the point where the outputs of the USB-PD adapter 3 and the AC adapter 2 collide with each other. The charger 106 receives input of electric power supplied from the AC adapter 2 or the USB-PD adapter 3. Then, the charger 106 reduces the voltage of the supplied power up to the voltage for charging the battery 11. The charger 106 supplies electricity with a reduced voltage to charge the battery 11.
　バッテリ１１は、チャージャ１０６とＣＰＵ電源１０２及び５Ｖ／３．３Ｖ電源１０４との電力供給経路上に接続される。バッテリ１１は、ＡＣアダプタ２又はＵＳＢ－ＰＤアダプタ３が接続状態の場合、接続されたＡＣアダプタ２又はＵＳＢ－ＰＤアダプタ３から出力される電力がチャージャ１０６から供給され充電される。また、ＡＣアダプタ２及びＵＳＢ－ＰＤアダプタ３がいずれも接続されていない場合、バッテリ１１は、ＣＰＵ電源１０２及び５Ｖ／３．３Ｖ電源１０４に電力供給を行う。 The battery 11 is connected to a power supply path between the charger 106, the CPU power source 102, and the 5V / 3.3V power source 104. When the AC adapter 2 or the USB-PD adapter 3 is in a connected state, the battery 11 is charged with the power output from the connected AC adapter 2 or the USB-PD adapter 3 from the charger 106. When neither the AC adapter 2 nor the USB-PD adapter 3 is connected, the battery 11 supplies power to the CPU power source 102 and the 5V / 3.3V power source 104.
　また、ＡＣアダプタ２及びＵＳＢ－ＰＤアダプタ３が接続状態の場合、ＡＣアダプタ２又はＵＳＢ－ＰＤアダプタ３の出力電圧が高い方から出力される電圧がチャージャ１０６から供給され充電される。本実施例では、後述するように、双方が接続された状態からＡＣアダプタ２が抜去されると、バッテリ１１は、バッテリ残量が所定値となるまで充電が継続される。その後、ＵＳＢ－ＰＤアダプタ３の出力電圧の上昇が完了するまで、バッテリ１１は、ＣＰＵ電源１０２及び５Ｖ／３．３Ｖ電源１０４に電力供給を行う。 In addition, when the AC adapter 2 and the USB-PD adapter 3 are connected, a voltage output from the higher output voltage of the AC adapter 2 or the USB-PD adapter 3 is supplied from the charger 106 and charged. In this embodiment, as will be described later, when the AC adapter 2 is removed from a state in which both are connected, the battery 11 is continuously charged until the remaining battery level reaches a predetermined value. Thereafter, the battery 11 supplies power to the CPU power source 102 and the 5V / 3.3V power source 104 until the increase of the output voltage of the USB-PD adapter 3 is completed.
　また、ＵＳＢ－ＰＤアダプタ３が接続された状態でＡＣアダプタ２が接続されると、バッテリ１１は、バッテリ残量が所定値となるまで充電が継続される。その後、ＵＳＢ－ＰＤアダプタ３の出力電圧の下降が完了するまで、バッテリ１１は、ＡＣアダプタ２からの電力供給のバックアップとして動作する。 If the AC adapter 2 is connected while the USB-PD adapter 3 is connected, the battery 11 continues to be charged until the remaining battery level reaches a predetermined value. Thereafter, the battery 11 operates as a backup of power supply from the AC adapter 2 until the output voltage drop of the USB-PD adapter 3 is completed.
　ＰＭＵ１０５は、マザーボード１０に供給される電力を制御する。ＰＭＵ１０５は、ＡＣアダプタ２が接続されたか否かを通知するＡＣアダプタ接続信号の入力を後述するコンパレータ１０８から受ける。また、ＰＭＵ１０５は、バッテリ１１の充電状態を監視する。図１における一点鎖線は、ＰＭＵ１０５によるバッテリ１１の監視を表す。 The PMU 105 controls the power supplied to the motherboard 10. The PMU 105 receives an input of an AC adapter connection signal for notifying whether or not the AC adapter 2 is connected from a comparator 108 described later. Further, the PMU 105 monitors the state of charge of the battery 11. A one-dot chain line in FIG. 1 represents monitoring of the battery 11 by the PMU 105.
　具体的には、ＰＭＵ１０５は、ＡＣアダプタ２が接続された場合、ＡＣアダプタ２の接続を通知するＡＣアダプタ接続信号の入力を受ける。ＰＭＵ１０５は、バッテリ残量が所定値以上か否かを判定する。バッテリ残量が所定値未満の場合、ＰＭＵ１０５は、バッテリ１１の充電を継続する。 Specifically, when the AC adapter 2 is connected, the PMU 105 receives an input of an AC adapter connection signal that notifies the connection of the AC adapter 2. The PMU 105 determines whether the remaining battery level is equal to or greater than a predetermined value. When the remaining battery level is less than the predetermined value, the PMU 105 continues to charge the battery 11.
　ここで、バッテリ１１の充電が不十分であると、ＵＳＢ－ＰＤアダプタ３からの電力供給を停止した状態でＡＣアダプタ２がすぐに外れてしまった場合、瞬断が発生しＣＰＵ１０１などのマザーボード１０上の各部が停止するおそれがある。そこで、本実施例では、ＰＭＵ１０５は、バッテリ１１がマザーボード１０上の各部の動作を一定時間継続できる程度に充電されるまでＵＳＢ－ＰＤアダプタ３からの電力供給を継続させる。 Here, if the battery 11 is insufficiently charged, if the AC adapter 2 is immediately disconnected in a state where the power supply from the USB-PD adapter 3 is stopped, a momentary interruption occurs and the motherboard 10 such as the CPU 101 or the like. The parts above may stop. Therefore, in this embodiment, the PMU 105 continues the power supply from the USB-PD adapter 3 until the battery 11 is charged to such an extent that the operation of each part on the mother board 10 can be continued for a certain time.
　バッテリ残量が所定値以上の場合又は充電継続によりバッテリ残量が所定値以上となった場合、ＰＭＵ１０５は、ＦＥＴスイッチ１３１をオフにする。そして、ＰＭＵ１０５は、ＡＣアダプタ接続通知をＵＳＢ－ＰＤコントローラ１０３へ出力する。その後、ＰＭＵ１０５は、電圧低下完了の通知をＵＳＢ－ＰＤコントローラ１０３から受ける。そして、ＰＭＵ１０５は、ＦＥＴスイッチ１３１をオンにする。その後、ＰＭＵ１０５は、システムパフォーマンスを６０Ｗ相当から６５Ｗ相当に変更する。電力供給元がＵＳＢ－ＰＤアダプタ３からＡＣアダプタ２へ変更されることで、供給電力が上昇するため、システムパフォーマンスを６５Ｗ相当に上昇させることができる。例えば、ＰＭＵ１０５は、ＣＰＵ１０１の動作クロックを上昇させたり、バッテリ１１の充電電圧を上昇させたりすることでシステムパフォーマンスを６５Ｗ相当に変更する。これにより、パーソナルコンピュータ１の処理能力を向上させることができる。 When the remaining battery level is equal to or higher than the predetermined value or when the remaining battery level is equal to or higher than the predetermined value due to continued charging, the PMU 105 turns off the FET switch 131. Then, the PMU 105 outputs an AC adapter connection notification to the USB-PD controller 103. Thereafter, the PMU 105 receives a voltage drop completion notification from the USB-PD controller 103. Then, the PMU 105 turns on the FET switch 131. Thereafter, the PMU 105 changes the system performance from 60W equivalent to 65W equivalent. Since the power supply source is changed from the USB-PD adapter 3 to the AC adapter 2, the supplied power increases, so that the system performance can be increased to 65 W. For example, the PMU 105 changes the system performance to 65 W by raising the operation clock of the CPU 101 or raising the charging voltage of the battery 11. Thereby, the processing capability of the personal computer 1 can be improved.
　ここで、電力供給と並行してＵＳＢ－ＰＤアダプタ３の電圧を下降又は上昇させると電圧を所定値まで変更するまでに時間がかかり無駄な電力消費が発生してしまう。そこで、本実施例では、ＰＭＵ１０５は、一旦ＵＳＢ－ＰＤアダプタ３からの電力供給を停止した後、ＵＳＢ－ＰＤアダプタ３の電圧を上昇又は下降させ、電圧の上昇又は下降完了後、ＵＳＢ－ＰＤアダプタ３からの電力供給を再開させる。 Here, if the voltage of the USB-PD adapter 3 is lowered or raised in parallel with the power supply, it takes time until the voltage is changed to a predetermined value, and wasteful power consumption occurs. Therefore, in this embodiment, the PMU 105 once stops the power supply from the USB-PD adapter 3, then increases or decreases the voltage of the USB-PD adapter 3, and after the increase or decrease of the voltage is completed, the USB-PD adapter The power supply from 3 is resumed.
　ＡＣアダプタ２が抜去された場合、ＰＭＵ１０５は、ＡＣアダプタ２の抜去を通知するＡＣアダプタ接続信号の入力を受ける。この状態では、パーソナルコンピュータ１は、電圧が降下された状態のＵＳＢ－ＰＤアダプタ３から出力される電力を使って動作することになる。本実施例では、この場合のＵＳＢ－ＰＤアダプタ３は、出力電圧が１５Ｖに降下された状態である。そこで、ＰＭＵ１０５は、システムパフォーマンスをＵＳＢ－ＰＤアダプタ３からの出力電力で動作可能な値に変更する。ＰＭＵ１０５は、システムパフォーマンスを４５Ｗ未満に変更する。ここで、本実施例では、ＵＳＢ－ＰＤアダプタ３の出力電圧が１５Ｖで出力電流が３Ａの場合で動作できるように、システムパフォーマンスを４５Ｗ未満とした。その後、ＰＭＵ１０５は、バッテリ残量が所定値以上か否かを判定する。バッテリ残量が所定値未満の場合、ＰＭＵ１０５は、バッテリ１１の充電を継続する。 When the AC adapter 2 is removed, the PMU 105 receives an AC adapter connection signal that notifies the removal of the AC adapter 2. In this state, the personal computer 1 operates using the power output from the USB-PD adapter 3 in a state where the voltage is lowered. In this embodiment, the USB-PD adapter 3 in this case is in a state where the output voltage is lowered to 15V. Therefore, the PMU 105 changes the system performance to a value operable with the output power from the USB-PD adapter 3. The PMU 105 changes the system performance to less than 45W. Here, in this embodiment, the system performance is set to less than 45 W so that the USB-PD adapter 3 can operate when the output voltage is 15 V and the output current is 3 A. Thereafter, the PMU 105 determines whether or not the remaining battery level is equal to or greater than a predetermined value. When the remaining battery level is less than the predetermined value, the PMU 105 continues to charge the battery 11.
　ここで、バッテリ１１の充電が不十分であると、ＵＳＢ－ＰＤアダプタ３からの電力供給を停止させた場合、瞬断が発生しＣＰＵ１０１などのマザーボード１０上の各部が停止するおそれがある。そこで、本実施例では、ＰＭＵ１０５は、バッテリ１１がマザーボード１０上の各部の動作を一定時間継続できる程度に充電されるまでＵＳＢ－ＰＤアダプタ３からの電力供給を継続させる。 Here, if the battery 11 is not sufficiently charged, when the power supply from the USB-PD adapter 3 is stopped, an instantaneous interruption may occur and each part on the motherboard 10 such as the CPU 101 may stop. Therefore, in this embodiment, the PMU 105 continues the power supply from the USB-PD adapter 3 until the battery 11 is charged to such an extent that the operation of each part on the mother board 10 can be continued for a certain time.
　バッテリ残量が所定値以上の場合又は充電継続によりバッテリ残量が所定値以上となった場合、ＰＭＵ１０５は、ＦＥＴスイッチ１３１をオフにする。そして、ＰＭＵ１０５は、ＡＣアダプタ抜去通知をＵＳＢ－ＰＤコントローラ１０３へ出力する。その後、ＰＭＵ１０５は、電圧上昇完了の通知をＵＳＢ－ＰＤコントローラ１０３から受ける。そして、ＰＭＵ１０５は、ＦＥＴスイッチ１３１をオンにする。その後、ＰＭＵ１０５は、システムパフォーマンスを６５Ｗ相当から６０Ｗ相当に変更する。電力供給元がＡＣアダプタ２からＵＳＢ－ＰＤアダプタ３へ変更されることで、供給電力が低下するため、システムパフォーマンスを６０Ｗ相当に下降させることが好ましい。例えば、ＰＭＵ１０５は、ＣＰＵ１０１の動作クロックを下降させたり、バッテリ１１の充電電圧を低下させたりすることでシステムパフォーマンスを６０Ｗ相当に変更する。このＰＭＵ１０５が、「経路管理部」の一例にあたる。 When the remaining battery level is equal to or higher than the predetermined value or when the remaining battery level is equal to or higher than the predetermined value due to continued charging, the PMU 105 turns off the FET switch 131. Then, the PMU 105 outputs an AC adapter removal notification to the USB-PD controller 103. Thereafter, the PMU 105 receives a notification of the completion of voltage increase from the USB-PD controller 103. Then, the PMU 105 turns on the FET switch 131. Thereafter, the PMU 105 changes the system performance from 65W equivalent to 60W equivalent. Since the power supply is reduced by changing the power supply source from the AC adapter 2 to the USB-PD adapter 3, it is preferable to lower the system performance to 60W or equivalent. For example, the PMU 105 changes the system performance to 60 W by lowering the operation clock of the CPU 101 or lowering the charging voltage of the battery 11. This PMU 105 corresponds to an example of a “route management unit”.
　ダイオード１４１は、整流素子である。ダイオード１４１は、ＡＣアダプタ２と突き当て点１５０との間に配置される。ダイオード１４１は、ＡＣアダプタ２から出力された電気をＣＰＵ電源１０２及び５Ｖ／３．３Ｖ電源１０４へ向けて通過させる。また、ダイオード１４１は、ＡＣアダプタ２から延びる電力供給経路を通ってＡＣアダプタ２へ電気が流れ込むのを防止する。 The diode 141 is a rectifying element. The diode 141 is disposed between the AC adapter 2 and the abutting point 150. The diode 141 allows electricity output from the AC adapter 2 to pass to the CPU power source 102 and the 5V / 3.3V power source 104. The diode 141 prevents electricity from flowing into the AC adapter 2 through the power supply path extending from the AC adapter 2.
　ダイオード１４２は、整流素子である。ダイオード１４２は、ＵＳＢ－ＰＤアダプタ３と突き当て点１５０との間に配置される。ダイオード１４２は、ＵＳＢ－ＰＤアダプタ３から出力された電気をＣＰＵ電源１０２及び５Ｖ／３．３Ｖ電源１０４へ向けて通過させる。また、ダイオード１４２は、ＵＳＢ－ＰＤアダプタ３から延びる電力供給経路を通ってＵＳＢ－ＰＤアダプタ３へ電気が流れ込むのを防止する。 The diode 142 is a rectifying element. The diode 142 is disposed between the USB-PD adapter 3 and the abutment point 150. The diode 142 passes electricity output from the USB-PD adapter 3 toward the CPU power source 102 and the 5V / 3.3V power source 104. The diode 142 prevents electricity from flowing into the USB-PD adapter 3 through the power supply path extending from the USB-PD adapter 3.
　このように、ダイオード１４１の出力とダイオード１４２の出力とは、突き当て点１５０でぶつかり、電圧が高い方が突き当て点１５０からＣＰＵ電源１０２及び５Ｖ／３．３Ｖ電源１０４に供給される。すなわち、ダイオード１４１及び１４２、並びに、突き当て点１５０はダイオードＯＲ回路を形成する。このダイオード１４１及び１４２、並びに、突き当て点１５０を有するダイオードＯＲ回路が、「電力供給回路」の一例にあたる。 Thus, the output of the diode 141 and the output of the diode 142 collide with each other at the abutting point 150, and the higher voltage is supplied from the abutting point 150 to the CPU power source 102 and the 5V / 3.3V power source 104. That is, the diodes 141 and 142 and the abutting point 150 form a diode OR circuit. The diodes 141 and 142 and the diode OR circuit having the butting point 150 correspond to an example of a “power supply circuit”.
　ダイオード１４３は、整流素子である。ダイオード１４３は、チャージャ１０６及びバッテリ１１とＣＰＵ電源１０２及び５Ｖ／３．３Ｖ電源１０４とを結ぶ電力供給経路上に配置される。ダイオード１４３は、バッテリ１１から出力された電気をＣＰＵ電源１０２及び５Ｖ／３．３Ｖ電源１０４へ向けて通過させる。また、ダイオード１４３は、バッテリ１１から延びる電力供給経路を通ってバッテリ１１へ電気が流れ込むのを防止する。 The diode 143 is a rectifying element. The diode 143 is disposed on a power supply path that connects the charger 106 and the battery 11 to the CPU power source 102 and the 5V / 3.3V power source 104. The diode 143 allows electricity output from the battery 11 to pass toward the CPU power source 102 and the 5V / 3.3V power source 104. The diode 143 prevents electricity from flowing into the battery 11 through the power supply path extending from the battery 11.
　コンパレータ１０８は、オペアンプ・コンパレータである。コンパレータ１０８は、－入力端子に対して参照電圧源からの参照電圧（ＶＲＥＦ）の入力を受ける。また、コンパレータ１０８は、＋入力端子に対してＡＣアダプタ２の電圧の入力を受ける。以下では、ＡＣアダプタ２から入力された電圧を「検出用電圧」という。 The comparator 108 is an operational amplifier / comparator. The comparator 108 receives the reference voltage (VREF) from the reference voltage source at the − input terminal. Further, the comparator 108 receives the input of the voltage of the AC adapter 2 with respect to the + input terminal. Hereinafter, the voltage input from the AC adapter 2 is referred to as “detection voltage”.
　そして、コンパレータ１０８は、検出用電圧から参照電圧を減算し、減算結果に正電源電圧（ＶＣＣ）を乗算することで増幅してＰＭＵ１０５へ出力する。すなわち、コンパレータ１０８は、検出用電圧から参照電圧を引いた値が正の場合、正の値を有する信号をＰＭＵ１０５へ出力する。ここでは、正の値に０も含まれるものとする。以下では、正の値を有する信号を「Ｈｉｇｈの信号」という。Ｈｉｇｈの信号は、ＡＣアダプタ２の接続を通知するＡＣアダプタ接続信号である。また、コンパレータ１０８は、検出用電圧から参照電圧を引いた値が負の場合、負の値を有する信号をＰＭＵ１０５へ出力する。以下では、負の値を有する信号を「Ｌｏｗの信号」という。Ｌｏｗの信号は、ＡＣアダプタ２の非接続を通知するＡＣアダプタ接続信号である。 Then, the comparator 108 subtracts the reference voltage from the detection voltage, amplifies the result by multiplying the subtraction result by the positive power supply voltage (VCC), and outputs the result to the PMU 105. That is, when the value obtained by subtracting the reference voltage from the detection voltage is positive, the comparator 108 outputs a signal having a positive value to the PMU 105. Here, it is assumed that 0 is also included in the positive value. Hereinafter, a signal having a positive value is referred to as a “high signal”. The High signal is an AC adapter connection signal that notifies the connection of the AC adapter 2. Further, when the value obtained by subtracting the reference voltage from the detection voltage is negative, the comparator 108 outputs a signal having a negative value to the PMU 105. Hereinafter, a signal having a negative value is referred to as a “Low signal”. The Low signal is an AC adapter connection signal for notifying that the AC adapter 2 is not connected.
　ＦＥＴスイッチ１２２は、Ｐ型ＦＥＴスイッチである。ＦＥＴスイッチ１２２は、ダイオード１４１と突き当て点１５０との間に配置される。ＦＥＴスイッチ１２２のドレインは、ＡＣアダプタ２の出力側に接続される。また、ＦＥＴスイッチ１２２のソースは、ＣＰＵ電源１０２及び５Ｖ／３．３Ｖ電源１０４への入力側に接続される。また、ＦＥＴスイッチ１２２のゲートは、ＦＥＴスイッチ１２１のドレインと接続される。さらに、ＦＥＴスイッチ１２２のゲートとＦＥＴスイッチ１２１とのドレインとを結ぶ経路上から、ＵＳＢ－ＰＤアダプタ３とＦＥＴスイッチ１２２のソースとを結ぶ経路上に繋がる経路が設けられ、その経路上に抵抗１２３が配置される。 FET switch 122 is a P-type FET switch. The FET switch 122 is disposed between the diode 141 and the butting point 150. The drain of the FET switch 122 is connected to the output side of the AC adapter 2. The source of the FET switch 122 is connected to the input side to the CPU power source 102 and the 5V / 3.3V power source 104. The gate of the FET switch 122 is connected to the drain of the FET switch 121. Further, a path connecting from the path connecting the gate of the FET switch 122 and the drain of the FET switch 121 to the path connecting the USB-PD adapter 3 and the source of the FET switch 122 is provided. Is placed.
　ＦＥＴスイッチ１２２は、ＦＥＴスイッチ１２１がオンの場合、ゲート電圧がグランドに低下しオンになる。また、ＦＥＴスイッチ１２２は、ＦＥＴスイッチ１２１がオフの場合、抵抗１２３を経由してＵＳＢ－ＰＤアダプタ３から出力された電圧がゲートに印加されオフになる。 When the FET switch 121 is on, the FET switch 122 is turned on when the gate voltage drops to the ground. Further, when the FET switch 121 is off, the FET switch 122 is turned off when the voltage output from the USB-PD adapter 3 via the resistor 123 is applied to the gate.
　ＦＥＴスイッチ１２１は、Ｎ型ＦＥＴスイッチである。ＦＥＴスイッチ１２１は、ＦＥＴスイッチ１２２のゲートとグランドとの間に配置される。ＦＥＴスイッチ１２１のドレインは、ＦＥＴスイッチ１２２のゲートに接続される。また、ＦＥＴスイッチ１２１のソースはグランドに接続される。また、ＦＥＴスイッチ１２１のゲートは、コンパレータ１０８の出力に接続される。 FET switch 121 is an N-type FET switch. The FET switch 121 is disposed between the gate of the FET switch 122 and the ground. The drain of the FET switch 121 is connected to the gate of the FET switch 122. The source of the FET switch 121 is connected to the ground. The gate of the FET switch 121 is connected to the output of the comparator 108.
　ＦＥＴスイッチ１２１は、コンパレータ１０８からＨｉｇｈの信号が出力された場合、ゲートに印加される電圧が上昇しオンになる。すなわち、ＡＣアダプタ２が接続された場合に、ＦＥＴスイッチ１２１がオンになる。また、ＦＥＴスイッチ１２１は、コンパレータ１０８からＬｏｗの信号が出力された場合、ゲートに印加される電圧が低下しオフになる。すなわち、ＡＣアダプタ２が接続された場合に、ＦＥＴスイッチ１２１がオフになる。 When the High signal is output from the comparator 108, the FET switch 121 is turned on when the voltage applied to the gate rises. That is, when the AC adapter 2 is connected, the FET switch 121 is turned on. Further, when a Low signal is output from the comparator 108, the FET switch 121 is turned off because the voltage applied to the gate decreases. That is, when the AC adapter 2 is connected, the FET switch 121 is turned off.
　まとめると、ＡＣアダプタ２が接続されると、コンパレータ１０８からＨｉｇｈの信号が出力され、ＦＥＴスイッチ１２１がオンになり、ＦＥＴスイッチ１２２がオンになる。これにより、ＡＣアダプタ２から出力された電気が突き当て点１５０に流れる。また、ＡＣアダプタ２が抜去されると、コンパレータ１０８からＬｏｗの信号が出力され、ＦＥＴスイッチ１２１がオフになり、ＦＥＴスイッチ１２２がオフになる。これにより、ＡＣアダプタ２と突き当て点１５０とを結ぶ経路が切断される。そのため、ＵＳＢ－ＰＤアダプタ３から出力された電気は、ダイオード１４１に流れ込まなくなる。すなわち、ダイオード１４１からの漏れ電流が発生しなくなり、コンパレータ１０８に検出用電圧としてＵＳＢ－ＰＤアダプタ３からの出力電圧が入力されることが防止できる。したがって、ＡＣアダプタ２が抜去された場合のＡＣアダプタ２の誤検出を防止することができる。 In summary, when the AC adapter 2 is connected, a high signal is output from the comparator 108, the FET switch 121 is turned on, and the FET switch 122 is turned on. Thereby, the electricity output from the AC adapter 2 flows to the abutment point 150. When the AC adapter 2 is removed, a Low signal is output from the comparator 108, the FET switch 121 is turned off, and the FET switch 122 is turned off. Thereby, the path | route which connects AC adapter 2 and butting point 150 is cut | disconnected. Therefore, electricity output from the USB-PD adapter 3 does not flow into the diode 141. That is, the leakage current from the diode 141 is not generated, and the output voltage from the USB-PD adapter 3 can be prevented from being input to the comparator 108 as a detection voltage. Therefore, erroneous detection of the AC adapter 2 when the AC adapter 2 is removed can be prevented.
　ＦＥＴスイッチ１３２は、Ｐ型ＦＥＴスイッチである。ＦＥＴスイッチ１３２は、ダイオード１４２とＵＳＢ－ＰＤアダプタ３との間に配置される。ＦＥＴスイッチ１３２のソースは、ＵＳＢ－ＰＤアダプタ３の出力側に接続される。また、ＦＥＴスイッチ１３２のドレインは、ダイオード１４２への入力側に接続される。また、ＦＥＴスイッチ１３２のゲートは、ＦＥＴスイッチ１３１のドレインと接続される。さらに、ＦＥＴスイッチ１３２のゲートとＦＥＴスイッチ１３１とのドレインとを結ぶ経路上から、ＵＳＢ－ＰＤアダプタ３とＦＥＴスイッチ１３２のソースとを結ぶ経路上に繋がる経路が設けられ、その経路上に抵抗１３３が配置される。 FET switch 132 is a P-type FET switch. The FET switch 132 is disposed between the diode 142 and the USB-PD adapter 3. The source of the FET switch 132 is connected to the output side of the USB-PD adapter 3. The drain of the FET switch 132 is connected to the input side to the diode 142. The gate of the FET switch 132 is connected to the drain of the FET switch 131. Further, a path connecting from the path connecting the gate of the FET switch 132 and the drain of the FET switch 131 to the path connecting the USB-PD adapter 3 and the source of the FET switch 132 is provided, and a resistor 133 is provided on the path. Is placed.
　ＦＥＴスイッチ１３２は、ＦＥＴスイッチ１３１がオンの場合、ゲート電圧がグランドに低下しオンになる。また、ＦＥＴスイッチ１３２は、ＦＥＴスイッチ１３１がオフの場合、抵抗１３３を経由してＵＳＢ－ＰＤアダプタ３から出力された電圧がゲートに印加されオフになる。 When the FET switch 131 is on, the FET switch 132 is turned on because the gate voltage drops to the ground. Further, when the FET switch 131 is off, the FET switch 132 is turned off when the voltage output from the USB-PD adapter 3 via the resistor 133 is applied to the gate.
　ＦＥＴスイッチ１３１は、Ｎ型ＦＥＴスイッチである。ＦＥＴスイッチ１３１は、ＦＥＴスイッチ１３２のゲートとグランドとの間に配置される。ＦＥＴスイッチ１３１のドレインは、ＦＥＴスイッチ１３２のゲートに接続される。また、ＦＥＴスイッチ１３１のソースはグランドに接続される。また、ＦＥＴスイッチ１３１のゲートは、ＰＭＵ１０５に接続される。 FET switch 131 is an N-type FET switch. The FET switch 131 is disposed between the gate of the FET switch 132 and the ground. The drain of the FET switch 131 is connected to the gate of the FET switch 132. The source of the FET switch 131 is connected to the ground. The gate of the FET switch 131 is connected to the PMU 105.
　ＦＥＴスイッチ１３１は、ゲートにＰＭＵ１０５からＨｉｇｈの電圧が印加された場合にオンになる。また、ＦＥＴスイッチ１３１は、ゲートにＰＭＵ１０５からＬｏｗの電圧が印加された場合にオフになる。 The FET switch 131 is turned on when a high voltage is applied from the PMU 105 to the gate. The FET switch 131 is turned off when a low voltage is applied from the PMU 105 to the gate.
　まとめると、ＰＭＵ１０５によりＨｉｇｈの電圧がＦＥＴスイッチ１３１に印加されると、ＦＥＴスイッチ１３１はオンになり、続いてＦＥＴスイッチ１３２がオンになる。これにより、ＵＳＢ－ＰＤアダプタ３から出力された電気が突き当て点１５０に流れる。また、ＰＭＵ１０５によりＬｏｗの電圧がＦＥＴスイッチ１３１に印加されると、ＦＥＴスイッチ１３１はオフになり、続いてＦＥＴスイッチ１３２がオフになる。これにより、ＵＳＢ－ＰＤアダプタ３とダイオード１４２とを結ぶ経路が切断される。そのため、ＵＳＢ－ＰＤアダプタ３から出力された電気が突き当て点１５０に流れなくなる。すなわち、ＵＳＢ－ＰＤアダプタ３から出力された電力が、ＣＰＵ電源１０２及び５Ｖ／３．３Ｖ電源１０４に供給されなくなる。 In summary, when a high voltage is applied to the FET switch 131 by the PMU 105, the FET switch 131 is turned on, and then the FET switch 132 is turned on. As a result, electricity output from the USB-PD adapter 3 flows to the abutment point 150. Further, when a low voltage is applied to the FET switch 131 by the PMU 105, the FET switch 131 is turned off, and then the FET switch 132 is turned off. As a result, the path connecting the USB-PD adapter 3 and the diode 142 is cut. Therefore, the electricity output from the USB-PD adapter 3 does not flow to the abutment point 150. That is, the power output from the USB-PD adapter 3 is not supplied to the CPU power source 102 and the 5V / 3.3V power source 104.
　図２は、パーソナルコンピュータにおける電力の供給状態の遷移を表す図である。ＵＳＢ－ＰＤアダプタ３から電力供給される状態で、ＵＳＢ－ＰＤアダプタ３が抜去されると遷移２０１が発生し、バッテリ１１から電力供給される状態となる。遷移２０１では、ＦＥＴスイッチ１２１，１２２，１３１及び１３２の切り替えは行われず、単にバッテリ１１から出力された電力がＣＰＵ電源１０２及び５Ｖ／３．３Ｖ電源１０４へ供給されるようになる。 FIG. 2 is a diagram showing the transition of the power supply state in the personal computer. When power is supplied from the USB-PD adapter 3 and the USB-PD adapter 3 is removed, a transition 201 occurs, and power is supplied from the battery 11. In the transition 201, the FET switches 121, 122, 131, and 132 are not switched, and the power output from the battery 11 is simply supplied to the CPU power source 102 and the 5V / 3.3V power source 104.
　逆に、バッテリ１１から電力供給される状態で、ＵＳＢ－ＰＤアダプタ３が接続されると遷移２０２が発生し、ＵＳＢ－ＰＤアダプタ３から電力供給される状態となる。遷移２０２では、ＦＥＴスイッチ１２１，１２２，１３１及び１３２の切り替えは行われず、単にＵＳＢ－ＰＤアダプタ３から出力された電力がＣＰＵ電源１０２及び５Ｖ／３．３Ｖ電源１０４へ供給されるようになる。 Conversely, when the USB-PD adapter 3 is connected in a state where power is supplied from the battery 11, a transition 202 occurs, and power is supplied from the USB-PD adapter 3. In the transition 202, the FET switches 121, 122, 131, and 132 are not switched, and the power output from the USB-PD adapter 3 is simply supplied to the CPU power source 102 and the 5V / 3.3V power source 104.
　また、ＡＣアダプタ２から電力供給される状態で、ＡＣアダプタ２が抜去されると遷移２０３が発生し、バッテリ１１から電力供給される状態となる。遷移２０３では、ＦＥＴスイッチ１２１，１２２，１３１及び１３２の切り替えは行われず、単にバッテリ１１から出力された電力がＣＰＵ電源１０２及び５Ｖ／３．３Ｖ電源１０４へ供給されるようになる。 In addition, when the AC adapter 2 is removed in a state where power is supplied from the AC adapter 2, a transition 203 occurs and power is supplied from the battery 11. In the transition 203, the FET switches 121, 122, 131, and 132 are not switched, and the power output from the battery 11 is simply supplied to the CPU power source 102 and the 5V / 3.3V power source 104.
　逆に、バッテリ１１から電力供給される状態で、ＡＣアダプタ２が接続されると遷移２０４が発生し、ＡＣアダプタ２から電力供給される状態となる。遷移２０４では、ＦＥＴスイッチ１２１，１２２，１３１及び１３２の切り替えは行われず、単にＡＣアダプタ２から出力された電力がＣＰＵ電源１０２及び５Ｖ／３．３Ｖ電源１０４へ供給されるようになる。 Conversely, when the AC adapter 2 is connected in a state where power is supplied from the battery 11, a transition 204 occurs, and power is supplied from the AC adapter 2. In the transition 204, the FET switches 121, 122, 131, and 132 are not switched, and the power output from the AC adapter 2 is simply supplied to the CPU power source 102 and the 5V / 3.3V power source 104.
　また、ＡＣアダプタ２及びＵＳＢ－ＰＤアダプタ３が接続されており、且つ、ＡＣアダプタ２から電力供給される状態で、ＡＣアダプタ２が抜去されると遷移２０５が発生し、ＵＳＢ－ＰＤアダプタ３から電力供給される状態となる。遷移２０５では、図３に示す電源切替処理が行われる。図３は、実施例１に係る電源制御回路におけるＡＣアダプタ抜去時の電源切替処理のフローチャートである。以下、図３を参照して、遷移２０５で実行される電源切替処理の流れを説明する。 In addition, when the AC adapter 2 is removed while the AC adapter 2 and the USB-PD adapter 3 are connected and power is supplied from the AC adapter 2, a transition 205 occurs, and the USB-PD adapter 3 Power is supplied. In transition 205, the power supply switching process shown in FIG. 3 is performed. FIG. 3 is a flowchart of power supply switching processing when the AC adapter is removed in the power supply control circuit according to the first embodiment. Hereinafter, the flow of the power supply switching process executed in the transition 205 will be described with reference to FIG.
　パーソナルコンピュータ１にＡＣアダプタ２及びＵＳＢ－ＰＤアダプタ３が接続されており、且つ、ＡＣアダプタ２から電力供給される状態で、ＡＣアダプタ２が抜去される（ステップＳ１０１）。 The AC adapter 2 is removed while the AC adapter 2 and the USB-PD adapter 3 are connected to the personal computer 1 and power is supplied from the AC adapter 2 (step S101).
　コンパレータ１０８へのＡＣアダプタ２からの検出用電圧の入力が無くなり、検出用電圧が低下する。これにより、参照電圧が検出用電圧より高くなるため、コンパレータ１０８は、Ｌｏｗの信号をＡＣアダプタ接続信号として出力する（ステップＳ１０２）。 The input of the detection voltage from the AC adapter 2 to the comparator 108 is lost, and the detection voltage decreases. Thereby, since the reference voltage becomes higher than the detection voltage, the comparator 108 outputs a Low signal as an AC adapter connection signal (step S102).
　コンパレータ１０８がＬｏｗの信号を出力すると、ＦＥＴスイッチ１２１は、オフになる（ステップＳ１０３）。 When the comparator 108 outputs a Low signal, the FET switch 121 is turned off (step S103).
　ＦＥＴスイッチ１２１がオフになると、ＦＥＴスイッチ１２２がオフになる（ステップＳ１０４）。これにより、ＵＳＢ－ＰＤアダプタ３から出力された電圧によるＡＣアダプタ２の誤検出が防止される。 When the FET switch 121 is turned off, the FET switch 122 is turned off (step S104). Thereby, erroneous detection of the AC adapter 2 due to the voltage output from the USB-PD adapter 3 is prevented.
　その後、ＰＭＵ１０５は、システムパフォーマンスをＵＳＢ－ＰＤアダプタ３からの出力電力で動作可能な値に変更する。具体的には、ＰＭＵ１０５は、システムパフォーマンスを４５Ｗ未満に変更する（ステップＳ１０５）。 After that, the PMU 105 changes the system performance to a value that can be operated with the output power from the USB-PD adapter 3. Specifically, the PMU 105 changes the system performance to less than 45 W (step S105).
　次に、ＰＭＵ１０５は、バッテリ残量が所定値以上か否かを判定する（ステップＳ１０６）。バッテリ残量が所定値未満の場合（ステップＳ１０６：否定）、ＰＭＵ１０５は、６５Ｗ相当のシステムパフォーマンスの状態でバッテリ１１の充電をバッテリ残量が所定値以上になるまで継続する（ステップＳ１０７）。すなわち、ＰＭＵ１０５は、ＵＳＢ－ＰＤアダプタ３からの出力電圧が１５Ｖのままでバッテリ１１の充電を継続する。 Next, the PMU 105 determines whether the remaining battery level is equal to or greater than a predetermined value (step S106). When the remaining battery level is less than the predetermined value (step S106: No), the PMU 105 continues charging the battery 11 in a system performance state equivalent to 65 W until the remaining battery level becomes equal to or higher than the predetermined value (step S107). That is, the PMU 105 continues to charge the battery 11 while the output voltage from the USB-PD adapter 3 remains at 15V.
　バッテリ残量が所定値以上の場合（ステップＳ１０６：肯定）、ＰＭＵ１０５は、ＦＥＴスイッチ１３１をオフにする（ステップＳ１０８）。 When the battery remaining amount is equal to or greater than the predetermined value (Step S106: Yes), the PMU 105 turns off the FET switch 131 (Step S108).
　ＦＥＴスイッチ１３１がオフになると、ＦＥＴスイッチ１３２がオフになる（ステップＳ１０９）。 When the FET switch 131 is turned off, the FET switch 132 is turned off (step S109).
　次に、ＰＭＵ１０５は、ＡＣアダプタ抜去通知をＵＳＢ－ＰＤコントローラ１０３へ出力する。ＵＳＢ－ＰＤコントローラ１０３は、ＡＣアダプタ抜去通知を受けると、出力電力の２０Ｖへの変更をＵＳＢ－ＰＤコントローラ３１に指示する。ＵＳＢ－ＰＤコントローラ３１は、出力電力の２０Ｖへの変更の指示を受けて、ＵＳＢ－ＰＤアダプタ３の出力電圧を２０Ｖに上昇させる（ステップＳ１１０）。 Next, the PMU 105 outputs an AC adapter removal notification to the USB-PD controller 103. Upon receiving the AC adapter removal notification, the USB-PD controller 103 instructs the USB-PD controller 31 to change the output power to 20V. In response to the instruction to change the output power to 20V, the USB-PD controller 31 increases the output voltage of the USB-PD adapter 3 to 20V (step S110).
　次に、ＵＳＢ－ＰＤコントローラ１０３は、電圧上昇完了の通知をＰＭＵ１０５に通知する。ＰＭＵ１０５は、電圧上昇完了の通知を受けて、ＦＥＴスイッチ１３１をオンにする（ステップＳ１１１）。 Next, the USB-PD controller 103 notifies the PMU 105 of a voltage rise completion notification. The PMU 105 receives the notification of the completion of the voltage increase and turns on the FET switch 131 (step S111).
　ＦＥＴスイッチ１３１がオンになると、ＦＥＴスイッチ１３２がオンになる（ステップＳ１１２）。 When the FET switch 131 is turned on, the FET switch 132 is turned on (step S112).
　その後、ＰＭＵ１０５は、システムパフォーマンスを６０Ｗ相当に変更する（ステップＳ１１３）。これにより、パーソナルコンピュータ１は、ＵＳＢ－ＰＤアダプタ３の出力電圧２０Ｖ及び出力電流３Ａで動作することができる。 After that, the PMU 105 changes the system performance to 60 W (step S113). As a result, the personal computer 1 can operate with the output voltage 20 V and the output current 3 A of the USB-PD adapter 3.
　逆に、ＵＳＢ－ＰＤアダプタ３から電力供給される状態で、ＡＣアダプタ２が接続されると遷移２０６が発生し、ＡＣアダプタ２から電力供給される状態となる。遷移２０６では、図４に示す電源切替処理が行われる。図４は、実施例１に係る電源制御回路におけるＡＣアダプタ接続時の電源切替処理のフローチャートである。以下、図４を参照して、遷移２０６で実行される電源切替処理の流れを説明する。 Conversely, when the AC adapter 2 is connected in a state where power is supplied from the USB-PD adapter 3, a transition 206 occurs, and power is supplied from the AC adapter 2. In transition 206, the power supply switching process shown in FIG. 4 is performed. FIG. 4 is a flowchart of the power supply switching process when the AC adapter is connected in the power supply control circuit according to the first embodiment. Hereinafter, with reference to FIG. 4, the flow of the power source switching process executed in the transition 206 will be described.
　パーソナルコンピュータ１にＵＳＢ－ＰＤアダプタ３から電力供給される状態で、ＡＣアダプタ２が接続される（ステップＳ２０１）。 The AC adapter 2 is connected in a state where power is supplied from the USB-PD adapter 3 to the personal computer 1 (step S201).
　ＡＣアダプタ２から出力された電圧が検出用電圧としてコンパレータ１０８へ入力され、検出用電圧が上昇する。これにより、検出用電圧が参照電圧より高くなるため、コンパレータ１０８は、Ｈｉｇｈの信号をＡＣアダプタ接続信号として出力する（ステップＳ２０２）。 The voltage output from the AC adapter 2 is input to the comparator 108 as a detection voltage, and the detection voltage rises. Accordingly, since the detection voltage becomes higher than the reference voltage, the comparator 108 outputs a High signal as an AC adapter connection signal (step S202).
　コンパレータ１０８がＨｉｇｈの信号を出力すると、ＦＥＴスイッチ１２１は、オンになる（ステップＳ２０３）。 When the comparator 108 outputs a high signal, the FET switch 121 is turned on (step S203).
　ＦＥＴスイッチ１２１がオンになると、ＦＥＴスイッチ１２２がオンになる（ステップＳ２０４）。 When the FET switch 121 is turned on, the FET switch 122 is turned on (step S204).
　次に、ＰＭＵ１０５は、バッテリ残量が所定値以上か否かを判定する（ステップＳ２０５）。バッテリ残量が所定値未満の場合（ステップＳ２０５：否定）、ＰＭＵ１０５は、６０Ｗ相当のシステムパフォーマンスの状態でバッテリ１１の充電をバッテリ残量が所定値以上になるまで継続する（ステップＳ２０６）。すなわち、ＰＭＵ１０５は、ＵＳＢ－ＰＤアダプタ３からの出力電圧が２０Ｖのままでバッテリ１１の充電を継続する。 Next, the PMU 105 determines whether the remaining battery level is equal to or greater than a predetermined value (step S205). If the remaining battery level is less than the predetermined value (No at Step S205), the PMU 105 continues charging the battery 11 in a system performance state equivalent to 60 W until the remaining battery level becomes equal to or higher than the predetermined value (Step S206). That is, the PMU 105 continues to charge the battery 11 while the output voltage from the USB-PD adapter 3 remains 20V.
　バッテリ残量が所定値以上の場合（ステップＳ２０５：肯定）、ＰＭＵ１０５は、ＦＥＴスイッチ１３１をオフにする（ステップＳ２０７）。 When the battery remaining amount is equal to or greater than the predetermined value (step S205: Yes), the PMU 105 turns off the FET switch 131 (step S207).
　ＦＥＴスイッチ１３１がオフになると、ＦＥＴスイッチ１３２がオフになる（ステップＳ２０８）。 When the FET switch 131 is turned off, the FET switch 132 is turned off (step S208).
　次に、ＰＭＵ１０５は、ＡＣアダプタ接続通知をＵＳＢ－ＰＤコントローラ１０３へ出力する。ＵＳＢ－ＰＤコントローラ１０３は、ＡＣアダプタ接続通知を受けると、出力電力の１５Ｖへの変更をＵＳＢ－ＰＤコントローラ３１に指示する。ＵＳＢ－ＰＤコントローラ３１は、出力電力の１５Ｖへの変更の指示を受けて、ＵＳＢ－ＰＤアダプタ３の出力電圧を１５Ｖに下降させる（ステップＳ２０９）。 Next, the PMU 105 outputs an AC adapter connection notification to the USB-PD controller 103. Upon receiving the AC adapter connection notification, the USB-PD controller 103 instructs the USB-PD controller 31 to change the output power to 15V. In response to the instruction to change the output power to 15V, the USB-PD controller 31 lowers the output voltage of the USB-PD adapter 3 to 15V (step S209).
　次に、ＵＳＢ－ＰＤコントローラ１０３は、電圧下降完了の通知をＰＭＵ１０５に通知する。ＰＭＵ１０５は、電圧下降完了の通知を受けて、ＦＥＴスイッチ１３１をオンにする（ステップＳ２１０）。 Next, the USB-PD controller 103 notifies the PMU 105 of a voltage drop completion notification. In response to the notification of the voltage drop completion, the PMU 105 turns on the FET switch 131 (step S210).
　ＦＥＴスイッチ１３１がオンになると、ＦＥＴスイッチ１３２がオンになる（ステップＳ２１１）。 When the FET switch 131 is turned on, the FET switch 132 is turned on (step S211).
　その後、ＰＭＵ１０５は、システムパフォーマンスを６５Ｗ相当に変更する（ステップＳ２１２）。これにより、パーソナルコンピュータ１は、２０Ｖ未満のＡＣアダプタ２の出力電圧で動作することができる。 Thereafter, the PMU 105 changes the system performance to 65 W (step S212). Thereby, the personal computer 1 can operate with the output voltage of the AC adapter 2 of less than 20V.
　ここで、本実施例では、瞬断などの障害に対応するためバッテリ１１を十分に充電するまで待機したが、これらの障害の発生を気にしなければ、充電のための待機を行わずに、ＵＳＢ－ＰＤアダプタ３の電圧の変更を行ってもよい。 Here, in the present embodiment, it waits until the battery 11 is sufficiently charged in order to deal with a failure such as a momentary interruption, but if it does not care about the occurrence of these failures, without waiting for charging, The voltage of the USB-PD adapter 3 may be changed.
　以上に説明したように、本実施例に係る電源制御回路は、ＵＳＢ－ＰＤアダプタ及びＡＣアダプタの双方が接続された場合、ＵＳＢ－ＰＤアダプタの出力電圧をＡＣアダプタの出力電圧未満に低下させる。これにより、ＡＣアダプタ及びＵＳＢ－ＰＤアダプタの双方が接続されている状態でも、ＡＣアダプタからの供給電力をシステムの駆動に用いることができ、システムパフォーマンスを向上させることができる。特に、ＡＣアダプタ及びＵＳＢ－ＰＤアダプタの双方が接続されている状態でも、高い電圧でバッテリの充電を行うことができ、バッテリの充電に係る時間を短くすることができる。このように、本実施例に係る電源制御回路は、電子機器の性能の低下を軽減することができる。 As described above, the power supply control circuit according to the present embodiment reduces the output voltage of the USB-PD adapter below the output voltage of the AC adapter when both the USB-PD adapter and the AC adapter are connected. Accordingly, even when both the AC adapter and the USB-PD adapter are connected, the power supplied from the AC adapter can be used for driving the system, and the system performance can be improved. In particular, even when both the AC adapter and the USB-PD adapter are connected, the battery can be charged with a high voltage, and the time required for charging the battery can be shortened. As described above, the power supply control circuit according to the present embodiment can reduce a decrease in the performance of the electronic device.
　また、ダイオードＯＲ回路では、ＵＳＢ－ＰＤアダプタが２０Ｖの電圧を供給している場合に、ダイオードの漏れ電流による漏れ電圧の発生によってＡＣアダプタの挿入を誤検出するおそれがある。特に、大電流の整流によく用いられるショットキーバリアダイオードは、周辺温度に応じて１０ｍＡ程度の漏れ電流を発生させる。そのため、単純にディスチャージ抵抗を配置して漏れ電流を誤検知しないレベルに低減するためにはディスチャージ抵抗の値が小さくなり、ＡＣアダプタを挿入した状態の待機電力が大きくなってしまう。 Also, in the diode OR circuit, when the USB-PD adapter supplies a voltage of 20V, there is a possibility that the insertion of the AC adapter may be erroneously detected due to the generation of the leakage voltage due to the leakage current of the diode. In particular, a Schottky barrier diode often used for rectification of a large current generates a leakage current of about 10 mA depending on the ambient temperature. For this reason, in order to simply dispose the discharge resistor and reduce the leakage current to a level that does not falsely detect, the value of the discharge resistor becomes small, and the standby power with the AC adapter inserted becomes large.
　そこで、周辺温度に応じてディスチャージ抵抗の値を切り替え、全温度に亘って誤検出を回避しながら、待機中などの周辺温度が低い場合に消費電力を抑制する構成が考えられる。しかしながら、周辺温度に応じてディスチャージ抵抗の値を切り替える構成では、ショットキーバリアダイオードと抵抗分とを乗算した値の漏れ電圧が発生する。そのため、誤検出の可能性を抑えるためには、漏れ電流の小さいショットキーバリアダイオードを選択することになるが、適切なショットキーバリアダイオードを見つけることは困難である。また、近年のモバイルデバイスの小型化要求を鑑みると、必ずしも選定したショットキーバリアダイオードが基板に搭載できるとは限らない。また、１００Ｗ、１２０Ｗ級の容量を有するＡＣアダプタの整流に対応したショットキーバリアダイオードは、一般に室内環境でも漏れ電流が大きく待機電力の増大につながるおそれがある。 Therefore, a configuration is conceivable in which the value of the discharge resistor is switched according to the ambient temperature, and power consumption is reduced when the ambient temperature is low, such as during standby, while avoiding false detection over the entire temperature. However, in the configuration in which the value of the discharge resistor is switched according to the ambient temperature, a leakage voltage having a value obtained by multiplying the Schottky barrier diode and the resistance is generated. Therefore, in order to suppress the possibility of erroneous detection, a Schottky barrier diode with a small leakage current is selected, but it is difficult to find an appropriate Schottky barrier diode. In view of the recent demand for miniaturization of mobile devices, the selected Schottky barrier diode cannot always be mounted on the substrate. In addition, a Schottky barrier diode that supports rectification of an AC adapter having a capacity of 100 W or 120 W generally has a large leakage current even in an indoor environment, which may lead to an increase in standby power.
　これに対して、本実施例に係る電源制御回路は、ＡＣアダプタを抜去した場合、ＵＳＢ－ＰＤアダプタからコンパレータへ繋がる経路を切断し、これにより、ＡＣアダプタの未接続の状態でのＡＣアダプタの誤検出を回避することができる。また、ディスチャージ抵抗を用いないためＡＣアダプタを挿入した状態の待機電力が大きくなることが回避でき、消費電力を低減することができる。 In contrast, when the AC adapter is removed, the power supply control circuit according to the present embodiment disconnects the path from the USB-PD adapter to the comparator, and thus the AC adapter is disconnected when the AC adapter is not connected. False detection can be avoided. In addition, since no discharge resistor is used, it is possible to avoid an increase in standby power when the AC adapter is inserted, and power consumption can be reduced.
　ここで、本実施例では、ＡＣアダプタの誤検出の回避のためＡＣアダプタ抜去時に、ＡＣアダプタから出力された電気が経由するダイオードからの出力経路を切断する構成とした。ただし、ＡＣアダプタの誤検出を許容できるのであれば、このダイオードからの出力経路を切断する構成を用いなくてもよい。また、ＡＣアダプタの誤検出を許容できる程度に抑えるために、誤検出を防止する他の構成を用いてもよい。それらの場合にも、本実施例に係る電源制御回路は、電力供給対象とするシステムのパフォーマンスを向上させることは可能である。 Here, in this embodiment, in order to avoid erroneous detection of the AC adapter, when the AC adapter is removed, the output path from the diode through which the electricity output from the AC adapter passes is cut off. However, if it is possible to tolerate erroneous detection of the AC adapter, it is not necessary to use a configuration for cutting the output path from the diode. Moreover, in order to suppress the erroneous detection of the AC adapter to an allowable level, another configuration for preventing the erroneous detection may be used. Also in those cases, the power supply control circuit according to the present embodiment can improve the performance of the system to be supplied with power.
　次に、実施例２について説明する。本実施例に係る電源制御回路も、図１で示される回路構成を有する。本実施例に係る電源制御回路は、ＵＳＢ－ＰＤアダプタ３からの電力供給経路を切断することで、ＵＳＢ－ＰＤアダプタ３の出力電圧をＡＣアダプタ２の出力電圧未満に低下させることが実施例１と異なる。以下では、実施例１と同じ各部の機能については説明を省略する。 Next, Example 2 will be described. The power supply control circuit according to this embodiment also has the circuit configuration shown in FIG. The power supply control circuit according to the present embodiment reduces the output voltage of the USB-PD adapter 3 to less than the output voltage of the AC adapter 2 by cutting the power supply path from the USB-PD adapter 3 according to the first embodiment. And different. In the following, description of the same functions as those of the first embodiment will be omitted.
　ＡＣアダプタ２が抜去された場合、ＰＭＵ１０５は、ＡＣアダプタ接続信号としてＬｏｗの信号の入力をコンパレータ１０８から受ける。そして、ＰＭＵ１０５は、ＦＥＴスイッチ１３１をオフにする。次に、ＰＭＵ１０５は、ＡＣアダプタ抜去通知をＵＳＢ－ＰＤコントローラ１０３へ出力する。その後、ＰＭＵ１０５は、電圧上昇完了通知の入力をＵＳＢ－ＰＤコントローラ１０３から受ける。そして、ＰＭＵ１０５は、ＦＥＴスイッチ１３１をオンにする。その後、ＰＭＵ１０５は、システムパフォーマンスを６０Ｗ相当に変更する。 When the AC adapter 2 is removed, the PMU 105 receives a Low signal input from the comparator 108 as an AC adapter connection signal. Then, the PMU 105 turns off the FET switch 131. Next, the PMU 105 outputs an AC adapter removal notification to the USB-PD controller 103. Thereafter, the PMU 105 receives a voltage rise completion notification from the USB-PD controller 103. Then, the PMU 105 turns on the FET switch 131. Thereafter, the PMU 105 changes the system performance to 60 W or equivalent.
　これに対して、ＵＳＢ－ＰＤアダプタ３が接続された状態でＡＣアダプタ２が接続された場合、ＰＭＵ１０５は、ＡＣアダプタ接続信号としてＨｉｇｈの信号の入力をコンパレータ１０８から受ける。そして、ＰＭＵ１０５は、ＦＥＴスイッチ１３１をオフにする。このように、ＦＥＴスイッチ１３１をオフにすることで、ＵＳＢ－ＰＤアダプタ３が出力した電気が突き当て点１５０に流れなくなる。これにより、ダイオードＯＲ回路におけるＡＣアダプタ２の出力電圧がＵＳＢ－ＰＤアダプタ３に接続される経路の電圧より高くなるため、ＡＣアダプタ２からの出力電力がＣＰＵ電源１０２及び５Ｖ／３．３Ｖ電源１０４に供給されるようになる。その後、ＰＭＵ１０５は、システムパフォーマンスを６５Ｗ相当に変更する。 In contrast, when the AC adapter 2 is connected while the USB-PD adapter 3 is connected, the PMU 105 receives a High signal input from the comparator 108 as an AC adapter connection signal. Then, the PMU 105 turns off the FET switch 131. Thus, by turning off the FET switch 131, the electricity output from the USB-PD adapter 3 does not flow to the abutment point 150. As a result, the output voltage of the AC adapter 2 in the diode OR circuit becomes higher than the voltage of the path connected to the USB-PD adapter 3, so that the output power from the AC adapter 2 is the CPU power supply 102 and the 5V / 3.3V power supply 104. Will be supplied to. Thereafter, the PMU 105 changes the system performance to 65 W or equivalent.
　次に、図５を参照して、本実施例に係る電源制御回路におけるＡＣアダプタ２が抜去された場合の電源切替処理の流れを説明する。図５は、実施例２に係る電源制御回路におけるＡＣアダプタ抜去時の電源切替処理のフローチャートである。 Next, with reference to FIG. 5, the flow of the power supply switching process when the AC adapter 2 in the power supply control circuit according to the present embodiment is removed will be described. FIG. 5 is a flowchart of power supply switching processing when the AC adapter is removed in the power supply control circuit according to the second embodiment.
　パーソナルコンピュータ１にＡＣアダプタ２及びＵＳＢ－ＰＤアダプタ３が接続されており、且つ、ＡＣアダプタ２から電力供給される状態で、ＡＣアダプタ２が抜去される（ステップＳ３０１）。 The AC adapter 2 is removed while the AC adapter 2 and the USB-PD adapter 3 are connected to the personal computer 1 and power is supplied from the AC adapter 2 (step S301).
　コンパレータ１０８へのＡＣアダプタ２からの検出用電圧の入力が無くなり、検出用電圧が低下する。これにより、参照電圧が検出用電圧より高くなるため、コンパレータ１０８は、Ｌｏｗの信号をＡＣアダプタ接続信号として出力する（ステップＳ３０２）。 The input of the detection voltage from the AC adapter 2 to the comparator 108 is lost, and the detection voltage decreases. Accordingly, since the reference voltage becomes higher than the detection voltage, the comparator 108 outputs a Low signal as an AC adapter connection signal (step S302).
　コンパレータ１０８がＬｏｗの信号を出力すると、ＦＥＴスイッチ１２１は、オフになる（ステップＳ３０３）。 When the comparator 108 outputs a Low signal, the FET switch 121 is turned off (step S303).
　ＦＥＴスイッチ１２１がオフになると、ＦＥＴスイッチ１２２がオフになる（ステップＳ３０４）。これにより、ＵＳＢ－ＰＤアダプタ３から出力された電圧によるＡＣアダプタ２の誤検出が防止される。 When the FET switch 121 is turned off, the FET switch 122 is turned off (step S304). Thereby, erroneous detection of the AC adapter 2 due to the voltage output from the USB-PD adapter 3 is prevented.
　次に、ＰＭＵ１０５は、ＦＥＴスイッチ１３１をオフにする（ステップＳ３０５）。 Next, the PMU 105 turns off the FET switch 131 (step S305).
　ＦＥＴスイッチ１３１がオフになると、ＦＥＴスイッチ１３２がオフになる（ステップＳ３０６）。 When the FET switch 131 is turned off, the FET switch 132 is turned off (step S306).
　次に、ＰＭＵ１０５は、ＡＣアダプタ抜去通知をＵＳＢ－ＰＤコントローラ１０３へ出力する。ＵＳＢ－ＰＤコントローラ１０３は、ＡＣアダプタ抜去通知を受けると、出力電力の２０Ｖへの変更をＵＳＢ－ＰＤコントローラ３１に指示する。ＵＳＢ－ＰＤコントローラ３１は、出力電力の２０Ｖへの変更の指示を受けて、ＵＳＢ－ＰＤアダプタ３の出力電圧を２０Ｖに上昇させる（ステップＳ３０７）。 Next, the PMU 105 outputs an AC adapter removal notification to the USB-PD controller 103. Upon receiving the AC adapter removal notification, the USB-PD controller 103 instructs the USB-PD controller 31 to change the output power to 20V. In response to the instruction to change the output power to 20 V, the USB-PD controller 31 increases the output voltage of the USB-PD adapter 3 to 20 V (step S307).
　次に、ＵＳＢ－ＰＤコントローラ１０３は、電圧上昇完了の通知をＰＭＵ１０５に通知する。ＰＭＵ１０５は、電圧上昇完了の通知を受けて、ＦＥＴスイッチ１３１をオンにする（ステップＳ３０８）。 Next, the USB-PD controller 103 notifies the PMU 105 of a voltage rise completion notification. In response to the notification of the completion of the voltage increase, the PMU 105 turns on the FET switch 131 (step S308).
　ＦＥＴスイッチ１３１がオンになると、ＦＥＴスイッチ１３２がオンになる（ステップＳ３０９）。 When the FET switch 131 is turned on, the FET switch 132 is turned on (step S309).
　その後、ＰＭＵ１０５は、システムパフォーマンスを６０Ｗ相当に変更する（ステップＳ３１０）。これにより、パーソナルコンピュータ１は、ＵＳＢ－ＰＤアダプタ３の出力電圧２０Ｖ及び出力電流３Ａで動作することができる。 Thereafter, the PMU 105 changes the system performance to 60 W (step S310). As a result, the personal computer 1 can operate with the output voltage 20 V and the output current 3 A of the USB-PD adapter 3.
　次に、図６を参照して、本実施例に係る電源制御回路におけるＡＣアダプタ２が接続された場合の電源切替処理の流れを説明する。図６は、実施例２に係る電源制御回路におけるＡＣアダプタ接続時の電源切替処理のフローチャートである。 Next, with reference to FIG. 6, the flow of the power supply switching process when the AC adapter 2 in the power supply control circuit according to this embodiment is connected will be described. FIG. 6 is a flowchart of the power supply switching process when the AC adapter is connected in the power supply control circuit according to the second embodiment.
　パーソナルコンピュータ１にＵＳＢ－ＰＤアダプタ３から電力供給される状態で、ＡＣアダプタ２が接続される（ステップＳ４０１）。 The AC adapter 2 is connected in a state where power is supplied from the USB-PD adapter 3 to the personal computer 1 (step S401).
　ＡＣアダプタ２から出力された電圧が検出用電圧としてコンパレータ１０８へ入力され、検出用電圧が上昇する。これにより、検出用電圧が参照電圧より高くなるため、コンパレータ１０８は、Ｈｉｇｈの信号をＡＣアダプタ接続信号として出力する（ステップＳ４０２）。 The voltage output from the AC adapter 2 is input to the comparator 108 as a detection voltage, and the detection voltage rises. Accordingly, since the detection voltage becomes higher than the reference voltage, the comparator 108 outputs a High signal as an AC adapter connection signal (step S402).
　コンパレータ１０８がＨｉｇｈの信号を出力すると、ＦＥＴスイッチ１２１は、オンになる（ステップＳ４０３）。 When the comparator 108 outputs a high signal, the FET switch 121 is turned on (step S403).
　ＦＥＴスイッチ１２１がオンになると、ＦＥＴスイッチ１２２がオンになる（ステップＳ４０４）。 When the FET switch 121 is turned on, the FET switch 122 is turned on (step S404).
　次に、ＰＭＵ１０５は、ＦＥＴスイッチ１３１をオフにする（ステップＳ４０５）。 Next, the PMU 105 turns off the FET switch 131 (step S405).
　ＦＥＴスイッチ１３１がオフになると、ＦＥＴスイッチ１３２がオフになる（ステップＳ４０６）。 When the FET switch 131 is turned off, the FET switch 132 is turned off (step S406).
　その後、ＰＭＵ１０５は、システムパフォーマンスを６５Ｗ相当に変更する（ステップＳ４０７）。これにより、パーソナルコンピュータ１は、２０Ｖ未満のＡＣアダプタ２の出力電圧で動作することができる。 Thereafter, the PMU 105 changes the system performance to 65 W (step S407). Thereby, the personal computer 1 can operate with the output voltage of the AC adapter 2 of less than 20V.
　ここで、本実施例においても、実施例１と同様に、ＡＣアダプタ２の抜去及び接続の何れにおいても、ＰＭＵ１０５は、バッテリ１１が十分に充電されるまで切り替えを待機させてもよい。 Here, also in the present embodiment, as in the first embodiment, the PMU 105 may wait for the switching until the battery 11 is sufficiently charged in either the removal or connection of the AC adapter 2.
　以上に説明したように、本実施例に係る電源制御回路は、ＡＣアダプタが接続された場合、ＵＳＢ－ＰＤアダプタの電力供給経路を切断することで、出力電圧をＡＣアダプタの出力電圧未満に低下させる。これにより、ＡＣアダプタ及びＵＳＢ－ＰＤアダプタの双方が接続されている状態でも、ＡＣアダプタからの供給電力をシステムの駆動に用いることができ、システムパフォーマンスを向上させることができる。 As described above, when the AC adapter is connected, the power supply control circuit according to this embodiment reduces the output voltage to less than the output voltage of the AC adapter by cutting the power supply path of the USB-PD adapter. Let Accordingly, even when both the AC adapter and the USB-PD adapter are connected, the power supplied from the AC adapter can be used for driving the system, and the system performance can be improved.
　１　パーソナルコンピュータ
　２　ＡＣアダプタ
　３　ＵＳＢ－ＰＤアダプタ
　１０　マザーボード
　１１　バッテリ
　３１　ＵＳＢ－ＰＤコントローラ
　１０１　ＣＰＵ
　１０２　ＣＰＵ電源
　１０３　ＵＳＢ－ＰＤコントローラ
　１０４　５Ｖ／３．３Ｖ電源
　１０５　ＰＭＵ
　１０６　チャージャ
　１０８　コンパレータ
　１２１，１２２，１３１，１３２　ＦＥＴスイッチ
　１４１～１４３　ダイオード
　１５０　突き当て点
  1 Personal Computer 2 AC Adapter 3 USB-PD Adapter 10 Motherboard 11 Battery 31 USB-PD Controller 101 CPU
102 CPU power supply 103 USB-PD controller 104 5V / 3.3V power supply 105 PMU
106 Charger 108 Comparator 121, 122, 131, 132 FET switch 141-143 Diode 150 Butting point

Claims (6)

  1. 　第１電源に接続される第１供給経路及び前記第１電源よりも容量の大きい第２電源に接続される第２供給経路のうち電圧の高い方から供給される電力を出力する電力供給回路と、
    　前記第１電源及び前記第２電源の双方が接続された状態で、前記第２供給経路の電圧が前記第１供給経路の電圧未満の場合、前記第２供給経路の電圧が前記第１供給経路の電圧より高くなるように制御する供給電圧制御部と
    　を備えたことを特徴とする電源制御回路。     A power supply circuit that outputs power supplied from a higher voltage among a first supply path connected to a first power supply and a second supply path connected to a second power supply having a larger capacity than the first power supply; ,
    When both the first power source and the second power source are connected, and the voltage of the second supply path is less than the voltage of the first supply path, the voltage of the second supply path is the first supply path. A power supply control circuit comprising: a supply voltage control unit that controls the voltage so as to be higher than the voltage of the power supply.
  2. 　前記供給電圧制御部は、前記第１電源及び前記第２電源の双方が接続された状態で、前記第２供給経路の電圧が前記第１供給経路の電圧未満の場合、前記第１電源の出力電圧を低下させることを特徴とする請求項１に記載の電源制御回路。 When the voltage of the second supply path is less than the voltage of the first supply path in a state where both the first power supply and the second power supply are connected, the supply voltage control unit outputs the first power supply The power supply control circuit according to claim 1, wherein the voltage is lowered.
  3. 　前記供給電圧制御部は、前記第１電源及び前記第２電源の双方が接続された状態で、前記第２供給経路の電圧が前記第１供給経路の電圧未満の場合、前記第１供給経路を切断することを特徴とする請求項１に記載の電源制御回路。 When the voltage of the second supply path is less than the voltage of the first supply path in a state where both the first power supply and the second power supply are connected, the supply voltage control unit determines the first supply path. The power supply control circuit according to claim 1, wherein the power supply control circuit is disconnected.
  4. 　前記第１電源が接続され且つ前記第２電源が未接続の場合、前記第２供給経路を切断する経路管理部をさらに備えたことを特徴とする請求項１～３のいずれか一つに記載の電源制御回路。 The path management unit according to any one of claims 1 to 3, further comprising a path management unit that disconnects the second supply path when the first power source is connected and the second power source is not connected. Power supply control circuit.
  5. 　演算処理部と、
    　第１電源と、
    　前記第１電源よりも容量が大きい第２電源と、
    　前記第１電源又は前記第２電源から供給される電力により充電され、前記第１電源及び前記第２電源が接続されていない場合、前記演算処理部へ電力供給を行うバッテリと、
    　前記第１電源に接続される第１供給経路及び前記第２電源に接続される第２供給経路のうち電圧の高い方から供給される電力を前記演算処理部及び前記バッテリに供給する電力供給回路と、
    　前記第１電源及び前記第２電源の双方が接続された状態で、前記第２供給経路の電圧が前記第１供給経路の電圧未満の場合、前記第２供給経路の電圧が前記第１供給経路の電圧より高くなるように制御する供給電圧制御部と
    　を備えたことを特徴とする電子機器。     An arithmetic processing unit;
    A first power source;
    A second power source having a larger capacity than the first power source;
    A battery that is charged with power supplied from the first power source or the second power source, and that supplies power to the arithmetic processing unit when the first power source and the second power source are not connected;
    A power supply circuit that supplies power supplied from the higher voltage of the first supply path connected to the first power supply and the second supply path connected to the second power supply to the arithmetic processing unit and the battery. When,
    When both the first power source and the second power source are connected, and the voltage of the second supply path is less than the voltage of the first supply path, the voltage of the second supply path is the first supply path. An electronic apparatus comprising: a supply voltage control unit that controls the voltage so as to be higher than the voltage of the electronic device.
  6. 　第１電源が接続され前記第１電源よりも容量の大きい第２電源が未接続の場合、前記第１電源から供給される電力を前記第１電源に接続する第１供給経路から出力し、
    　前記第１電源が未接続で、前記第２電源が接続された場合、前記第２電源から供給される電力を前記第２電源に接続する第２供給経路から出力し、
    　前記第１電源及び前記第２電源の双方が接続された状態で、前記第２供給経路の電圧が前記第１供給経路の電圧未満の場合、前記第２供給経路の電圧が前記第１供給経路の電圧より高くなるように制御し、前記第１供給経路及び前記第２供給経路のうち電圧の高い方から供給される電力を出力する
    　ことを特徴とする電源制御方法。     When a first power source is connected and a second power source having a capacity larger than that of the first power source is not connected, the power supplied from the first power source is output from the first supply path connected to the first power source,
    When the first power source is not connected and the second power source is connected, the power supplied from the second power source is output from the second supply path connected to the second power source,
    When both the first power source and the second power source are connected, and the voltage of the second supply path is less than the voltage of the first supply path, the voltage of the second supply path is the first supply path. The power supply control method, wherein the power is controlled to be higher than the voltage of the first supply path and the second supply path is output from the higher voltage.
PCT/JP2017/035998 2016-10-12 2017-10-03 Power supply control circuit, electronic device, and power supply control method WO2018070306A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2016201283A JP2018063558A (en) 2016-10-12 2016-10-12 Power supply control circuit, electronic device, and power supply control method
JP2016-201283 2016-10-12

Publications (1)

Publication Number Publication Date
WO2018070306A1 true WO2018070306A1 (en) 2018-04-19

Family

ID=61905392

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2017/035998 WO2018070306A1 (en) 2016-10-12 2017-10-03 Power supply control circuit, electronic device, and power supply control method

Country Status (2)

Country Link
JP (1) JP2018063558A (en)
WO (1) WO2018070306A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114928151A (en) * 2021-10-08 2022-08-19 无锡宇宁智能科技有限公司 Power management circuit with battery charging control function

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7175672B2 (en) * 2018-08-10 2022-11-21 Ｄｙｎａｂｏｏｋ株式会社 Electronic device and power control method
JP6620864B1 (en) * 2018-11-13 2019-12-18 富士通クライアントコンピューティング株式会社 Power control apparatus and program
JP7388278B2 (en) * 2020-04-09 2023-11-29 株式会社アイシン Communication control device
JP2022049794A (en) * 2020-09-17 2022-03-30 カシオ計算機株式会社 Electronic device, external device, charging system, charging method, and program
JPWO2022224715A1 (en) 2021-04-21 2022-10-27

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09191241A (en) * 1996-01-10 1997-07-22 Nec Corp Power circuit
JP2000029576A (en) * 1998-07-15 2000-01-28 Toshiba Corp Electronic equipment and power source control method therefor
JP2000284865A (en) * 1999-03-31 2000-10-13 Fujitsu Ltd Power source controller and information processor using it
JP2014160365A (en) * 2013-02-20 2014-09-04 Lenovo Singapore Pte Ltd Control method for energization range and portable type electronic apparatus
JP2015023766A (en) * 2013-07-23 2015-02-02 日本電信電話株式会社 Power supply switching circuit
WO2016013451A1 (en) * 2014-07-22 2016-01-28 ローム株式会社 Charging circuit, electronic device using same, and charger

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09191241A (en) * 1996-01-10 1997-07-22 Nec Corp Power circuit
JP2000029576A (en) * 1998-07-15 2000-01-28 Toshiba Corp Electronic equipment and power source control method therefor
JP2000284865A (en) * 1999-03-31 2000-10-13 Fujitsu Ltd Power source controller and information processor using it
JP2014160365A (en) * 2013-02-20 2014-09-04 Lenovo Singapore Pte Ltd Control method for energization range and portable type electronic apparatus
JP2015023766A (en) * 2013-07-23 2015-02-02 日本電信電話株式会社 Power supply switching circuit
WO2016013451A1 (en) * 2014-07-22 2016-01-28 ローム株式会社 Charging circuit, electronic device using same, and charger

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114928151A (en) * 2021-10-08 2022-08-19 无锡宇宁智能科技有限公司 Power management circuit with battery charging control function
CN114928151B (en) * 2021-10-08 2023-09-26 无锡宇宁智能科技有限公司 Power management circuit with battery charging control function

Also Published As

Publication number Publication date
JP2018063558A (en) 2018-04-19

Similar Documents

Publication Publication Date Title
WO2018070306A1 (en) Power supply control circuit, electronic device, and power supply control method
US9780601B2 (en) Battery assisted power
JP5791007B2 (en) Power supply apparatus and method, and user apparatus
US7932636B2 (en) Automatic start-up circuit and uninterruptible power supply apparatus having such automatic start-up circuit
JP6355410B2 (en) Charging circuit, power management circuit, and electronic device using the same
JP2018011442A (en) Power reception device and control circuit thereof, electronic apparatus, and operation method of power supply system
US9244509B2 (en) Uninterruptible power system and power control system thereof
JP6068366B2 (en) Storage system and control method of secondary battery pack
CN104731293A (en) Power supply device and power supply method thereof
JP6561810B2 (en) Information processing apparatus, expansion unit, and information processing system
JP2022105065A (en) Power supply system
US8897044B2 (en) Electronic device having complete power-saving mechanism
JP6553346B2 (en) Overcurrent detection circuit, USB power supply apparatus using the same, electronic apparatus, overcurrent detection method
US9742131B2 (en) Power transfer systems
TW201616771A (en) Power adapter and electronic system using the same
US20050162017A1 (en) Power supply device for peripheral device
JP6179276B2 (en) Information processing apparatus and power supply monitoring circuit
TWI472775B (en) Dc uninterruptible power system and method for detecting abnormal voltage
JP2008061488A (en) Power supply system equipped with remote control circuit, and method for operating the power supply system
US20190148955A1 (en) Power supply device and power supply method
JP2005080491A (en) Power supply device
US20230029478A1 (en) Battery switch-on circuit
JP2005261142A (en) Charging circuit
EP2725680B1 (en) Electronic device and power supplying control method thereof
US9853493B2 (en) Electronic device and electronic-device control method

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 17860925

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 17860925

Country of ref document: EP

Kind code of ref document: A1