WO2018043337A1 - Large-sized display panel and manufacturing method therefor - Google Patents

Large-sized display panel and manufacturing method therefor Download PDF

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Publication number
WO2018043337A1
WO2018043337A1 PCT/JP2017/030556 JP2017030556W WO2018043337A1 WO 2018043337 A1 WO2018043337 A1 WO 2018043337A1 JP 2017030556 W JP2017030556 W JP 2017030556W WO 2018043337 A1 WO2018043337 A1 WO 2018043337A1
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WO
WIPO (PCT)
Prior art keywords
barrier film
display panel
wiring
flexible substrate
large display
Prior art date
Application number
PCT/JP2017/030556
Other languages
French (fr)
Japanese (ja)
Inventor
守 石▲崎▼
武居　学
Original Assignee
凸版印刷株式会社
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Filing date
Publication date
Application filed by 凸版印刷株式会社 filed Critical 凸版印刷株式会社
Publication of WO2018043337A1 publication Critical patent/WO2018043337A1/en

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/165—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on translational movement of particles in a fluid under the influence of an applied field
    • G02F1/1675—Constructional details
    • G02F1/1679—Gaskets; Spacers; Sealing of cells; Filling or closing of cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/165—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on translational movement of particles in a fluid under the influence of an applied field
    • G02F1/166—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on translational movement of particles in a fluid under the influence of an applied field characterised by the electro-optical or magneto-optical effect
    • G02F1/167—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on translational movement of particles in a fluid under the influence of an applied field characterised by the electro-optical or magneto-optical effect by electrophoresis
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/165—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on translational movement of particles in a fluid under the influence of an applied field
    • G02F1/1675—Constructional details
    • G02F1/16755—Substrates
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/37—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being movable elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/40—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character is selected from a number of characters arranged one beside the other, e.g. on a common carrier plate

Definitions

  • the present invention relates to a large display panel and a manufacturing method thereof.
  • a method for realizing a large display panel there is known a method in which a large number of display panels having a small screen size are connected and tiled to display the entire display panel.
  • a display panel is realized by connecting a plurality of liquid crystal displays (LCD), plasma display panels (PDP), or the like using a glass substrate, the display panels are arranged side by side so that the ends of the display panels are in contact as much as possible.
  • LCD liquid crystal displays
  • PDP plasma display panels
  • the non-display area from the edge of the display area of the display panel to the edge of the panel is called a picture frame.
  • the display area is a two-dimensional area including the entire effective display area, and is equal to the effective display area in a normal display panel.
  • the left picture frame has a dimension B1 from the edge of the display area 2 to the edge of the glass substrate 21.
  • the right frame is a dimension B2 from the edge of the display area 2 to the edge of the glass substrate 21.
  • a non-display area 7N having a width of B1 + B2 is formed in the large display area 7 as shown in FIG. 11B.
  • the large display area is one two-dimensional area including the entire effective display area of a plurality of display panels, and is an area including a plurality of display areas and a non-display area therebetween.
  • the thickness of the display panel is thinner than that of a glass substrate, so that a part of the display panel can be stacked in the thickness direction (Patent Document 1). ).
  • the frame of the joint between the display panels can be reduced to one panel.
  • the left frame width B1 is smaller than the right frame width B2
  • the left frame of another display panel is overlaid on the right frame of one display panel as shown in FIG.
  • the width of the non-display area 7N in the large display area 7 is B1.
  • the display is realized by applying a voltage to the display medium 6 sandwiched between the pixel electrode 2P on the flexible substrate 1 and the counter electrode 5 on the counter substrate 4, so that the portion where the pixel electrode 2P is present is the display area.
  • the flexible substrate 1 having the pixel electrode 2P may be an active matrix type having a thin film transistor array or a direct connection type having no thin film transistor.
  • a wiring 3 for supplying power is provided.
  • a gate wiring, a source wiring, a counter electrode wiring 3COM, and a capacitor wiring are usually included in the wiring.
  • the wiring 3 includes a wiring to each pixel electrode and a counter electrode wiring 3COM.
  • the counter electrode wiring 3 ⁇ / b> COM is connected to the counter electrode 5.
  • the left frame is the sum of the dimension B1 from the display area 2 to the edge of the flexible substrate 1 and the dimension E1 from the edge of the flexible substrate 1 to the edge of the barrier film 8 or 9.
  • the right picture frame is the sum of the dimension B2 from the display area 2 to the edge of the flexible substrate 1 and the dimension E2 from the edge of the flexible substrate 1 to the edge of the barrier film 8 or 9.
  • the left frame width B1 + E1 is smaller than the right frame width B2 + E2
  • the width of the non-display area 7N is B1 + E1. That is, the width of the non-display area 7N of the large display panel is increased by E1 as compared with the case without sealing.
  • the dimensions B1 and B2 from the display area 2 to the edge of the flexible substrate 1 are such that the gate wiring 3G is narrowed and the interval is narrowed, or the gate wiring 3G is drawn out from the source wiring 3S as shown in Patent Document 2. It can be narrowed by pulling out to the same side. When such a method is used, the problem is rather the dimensions E1 and E2 from the edge of the flexible substrate 1 to the edge of the barrier film 8 or 9.
  • the present invention has been made in view of the above situation, and an object of the present invention is to provide a large display panel having a narrow seam width and high display quality even when configured by combining a plurality of panels.
  • One aspect of the present invention for achieving the above object is a large display panel in which a plurality of display panels in which an electrophoretic body is sandwiched between a pixel electrode portion on a flexible substrate and a counter electrode on a counter substrate are combined.
  • the large display panel is composed of a plurality of display panels, and the entire display unit is sandwiched between one front barrier film and one back barrier film and sealed. It is a panel.
  • the plurality of display panels may be combined so that one side of the frame of another display panel is superimposed on one side of the frame of the display panel.
  • An adhesive layer may be provided between the plurality of display panels.
  • a spacer may be provided on a part of the back surface of the plurality of display panels.
  • a transparent spacer may be provided on a part of the surface of the plurality of display panels.
  • wiring is drawn from one side or two sides, and the side from which the wiring is drawn is between the front barrier film and the flexible substrate and between the counter substrate and the electrophoresis body. It is filled with an edge seal, and on the other side, the outer side of the counter substrate, the electrophoretic body and the flexible substrate may be filled with an edge seal between the front barrier film and the back barrier film.
  • a transparent adhesive layer may be provided between the front barrier film and the counter substrate or the transparent spacer.
  • wiring is drawn out from one or two sides, and at the side from which the wiring is drawn, the front barrier film and the front side of the flexible substrate, and the back barrier film and the back side of the flexible substrate are joined. And in the other side, the front barrier film and the back barrier film may be joined.
  • the flexible substrates do not have to overlap each other at the portion where the wiring overlaps the edge of the front barrier film or the back barrier film.
  • a hot melt adhesive may be provided between the back barrier film and the flexible substrate or spacer.
  • Another aspect of the present invention includes a step of manufacturing a flexible substrate having a pixel electrode and a step of bonding a member having an electrophoretic body on the counter electrode of the counter substrate onto the pixel electrode of the flexible substrate.
  • a process for producing a display panel a process for arranging a plurality of display panels on a single back barrier film so that their frames are close to each other, and a method for covering the entire surface of the display unit composed of the plurality of display panels And a step of affixing one front barrier film.
  • a step of manufacturing a plurality of display panels by a step of manufacturing a flexible substrate having a pixel electrode and a step of bonding a member having an electrophoretic body on the counter electrode of the counter substrate on the pixel electrode of the flexible substrate.
  • a step of combining so that one side of the frame of another display panel overlaps on one side of the frame of the display panel, and one surface barrier film so as to cover the entire surface of the display unit composed of a plurality of display panels Is a method for producing a large-sized display panel having at least a process of pasting and a process of pasting one back barrier film so as to cover the entire back surface of the display unit.
  • the combining step may include a step of bonding a plurality of display panels through an adhesive layer.
  • a step of applying a spacer to a part of the back surface of each display panel may be further included.
  • a step of attaching a transparent spacer to a part of the surface of each display panel may be further included.
  • a step of edge-sealing the front barrier film and the back barrier film may be further included.
  • the step of applying the front barrier film may be a step of thermally laminating the front barrier film having a hot melt adhesive.
  • the step of applying the back barrier film may be a step of heat laminating the back barrier film having a hot melt adhesive.
  • a non-display portion between adjacent display areas, that is, a boundary seam is not recognized. can do.
  • FIG. 1 is a plan view and a cross-sectional view showing the structure of a large display panel according to an embodiment of the present invention.
  • FIG. 2A is an explanatory diagram illustrating a manufacturing process of the large display panel of FIG.
  • FIG. 2B is an explanatory diagram illustrating a manufacturing process of the large display panel of FIG.
  • FIG. 2C is an explanatory diagram illustrating a manufacturing process of the large display panel of FIG.
  • FIG. 2D is an explanatory diagram illustrating a manufacturing process of the large display panel of FIG. 1.
  • FIG. 2E is an explanatory diagram illustrating a manufacturing process of the large display panel of FIG.
  • FIG. 2F is an explanatory diagram illustrating a manufacturing process of the large display panel of FIG. 1.
  • FIG. 3 is a plan view and a sectional view showing the structure of a large display panel according to an embodiment of the present invention.
  • FIG. 4A is an explanatory diagram showing a manufacturing process of the large display panel of FIG.
  • FIG. 4B is an explanatory diagram illustrating a manufacturing process of the large display panel of FIG. 3.
  • FIG. 4C is an explanatory diagram illustrating a manufacturing process of the large display panel of FIG. 4D is an explanatory diagram illustrating a manufacturing process of the large display panel of FIG.
  • FIG. 4E is an explanatory diagram illustrating a manufacturing process of the large display panel of FIG. 3.
  • FIG. 4F is an explanatory diagram illustrating a manufacturing process of the large display panel of FIG. 3.
  • FIG. 4A is an explanatory diagram showing a manufacturing process of the large display panel of FIG.
  • FIG. 4B is an explanatory diagram illustrating a manufacturing process of the large display panel of FIG. 3.
  • FIG. 4C is an explanatory diagram illustrating a
  • FIG. 4G is an explanatory diagram showing a manufacturing process of the large display panel of FIG.
  • FIG. 5 is a plan view and a cross-sectional view showing the structure of a large display panel according to an embodiment of the present invention.
  • FIG. 6A is an explanatory diagram showing a manufacturing process of the large display panel of FIG.
  • FIG. 6B is an explanatory diagram showing a manufacturing process of the large display panel of FIG.
  • FIG. 6C is an explanatory diagram illustrating a manufacturing process of the large display panel of FIG. 6D is an explanatory diagram illustrating a manufacturing process of the large display panel of FIG.
  • FIG. 6E is an explanatory diagram showing a manufacturing process of the large display panel of FIG. FIG.
  • FIG. 6F is an explanatory diagram illustrating a manufacturing process of the large display panel of FIG.
  • FIG. 6G is an explanatory diagram showing a manufacturing process of the large display panel of FIG.
  • FIG. 7 is a plan view and a sectional view showing the structure of a large display panel according to an embodiment of the present invention.
  • FIG. 8 is a plan view and a cross-sectional view showing the structure of a large display panel according to an embodiment of the present invention.
  • FIG. 9 is a plan view and a sectional view showing the structure of a large display panel according to an embodiment of the present invention.
  • FIG. 10A is an explanatory view showing a manufacturing process of the large display panel of FIG.
  • FIG. 10B is an explanatory diagram illustrating a manufacturing process of the large display panel of FIG. 9.
  • FIG. 10C is an explanatory view showing a manufacturing process of the large display panel of FIG.
  • FIG. 10D is an explanatory diagram showing a manufacturing process of the large display panel of FIG. 9.
  • FIG. 10E is an explanatory diagram illustrating a manufacturing process of the large display panel of FIG. 9.
  • FIG. 11A is a plan view and a cross-sectional view showing the structure of a conventional display panel.
  • FIG. 11B is a plan view and a cross-sectional view showing the structure of a conventional large display panel.
  • FIG. 12A is a plan view and a cross-sectional view showing the structure of a conventional display panel.
  • FIG. 12B is a plan view and a sectional view showing the structure of a conventional large display panel.
  • FIG. 13A is a plan view and a cross-sectional view showing the structure of a conventional display panel.
  • FIG. 13B is a plan view and a cross-sectional view showing a structure of a conventional large display panel.
  • FIG. 1 is a plan view of a large display panel, a sectional view along AA ′, a sectional view along BB ′, and a sectional view along CC ′.
  • the large display panel has a structure in which the entire large display area is sealed after combining a plurality of display panels. Specifically, as can be seen from the plan view and the AA ′ sectional view, a display medium 6 is sandwiched between the flexible substrate 1 and the counter substrate 4, and a plurality of display panels having a display area 2 are used. The frame B1 of another display panel is combined on the frame B2 of the panel so as to overlap.
  • the display is realized by applying a voltage to the display medium 6 sandwiched between the pixel electrode 2P on the flexible substrate 1 shown in FIG. 2A and the counter electrode 5 on the counter substrate 4 shown in FIG. A portion where the pixel electrode 2P of FIG. 2A is present becomes the display area 2 of FIG.
  • the flexible substrate 1 having the pixel electrode 2P of FIG. 2A may be an active matrix type having a thin film transistor array or a direct connection type having no thin film transistor.
  • a wiring 3 for supplying power is provided.
  • the wiring 3 usually includes a gate wiring, a source wiring, a counter electrode wiring 3COM, and a capacitor wiring.
  • the wiring 3 includes a wiring to each pixel electrode and a counter electrode wiring 3COM.
  • the counter electrode wiring 3 ⁇ / b> COM is connected to the counter electrode 5.
  • the entire display unit including the large display area 7 formed by connecting the display areas 2 is sandwiched between the front barrier film 8 and the back barrier film 9, and the periphery of the display medium 6 is surrounded by the edge seal 10. It is sealed.
  • the display unit of the large display panel is a three-dimensional stacked structure in which a large display area (two-dimensional) including a display area of a plurality of display panels and a non-display unit therebetween is a range, and the counter substrate 4 / It consists of a part of electrode 5 / display medium 6 / pixel electrode 2P / flexible substrate 1.
  • a transparent adhesive layer 12 may be provided between the front barrier film 8 and the counter substrate 4.
  • a hot-melt adhesive 14 is provided between the back barrier film 9 and the flexible substrate 1.
  • the edge seal 10 is formed between the front barrier film 8 and the back barrier film 9 and around the counter substrate 4, the display medium 6, and the flexible substrate 1.
  • the wiring 3 shown in FIG. 2A is drawn downward from the display panel of FIG. It extends outside the edge seal 10.
  • the edge seal 10 is formed between the front barrier film 8 and the flexible substrate 1 and in a region around the counter substrate 4 and the display medium 6.
  • the back barrier film 9 and the flexible substrate 1 are bonded with a hot melt adhesive 14.
  • the flexible substrates 1 overlap each other at the portion where the flexible substrate 1 overlaps the edge of the front barrier film 8 or the edge of the back barrier film 9. It is not to have. Compared with the case where the flexible substrates 1 in this portion overlap each other, the distance between the front barrier film 8 and the back barrier film 9 can be narrowed, and the portion where the wiring 3 is drawn out can be easily sealed.
  • An edge seal 10 seals between the front barrier film 8 and the flexible substrate 1 and between the front barrier film 8 and the back barrier film 9.
  • B1 may be stacked on B2.
  • a tape carrier package (TCP) or a chip-on film (COF) is connected to the wiring 3 on the flexible substrate 1 by an anisotropic conductive film (ACF) or the like.
  • ACF anisotropic conductive film
  • FPC flexible printed circuit board
  • a bare chip is mounted on the wiring 3 on the flexible substrate 1 by ACF or the like, and further, FPC or the like is connected to the wiring 3 that is not connected to the pixel electrode 2P but connected to the input terminal of the bare chip. Connected to the driving device.
  • the entire large panel may be incorporated in the housing (not shown) for improving mechanical strength and decorativeness.
  • FIGS. 2A to 2F An example of a method for manufacturing the large display panel of FIG. 1 is shown in FIGS. 2A to 2F.
  • the wiring 3 directly connected to the pixel electrode 2P and the counter electrode wiring 3COM are formed on the flexible substrate 1.
  • a thin film transistor array having the pixel electrode 2P is formed.
  • the wiring 3 includes a gate wiring, a source wiring, a counter electrode wiring 3COM, and a capacitor wiring.
  • the wiring 3 is formed so as to be drawn downward in the drawing.
  • the flexible substrate polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (PES), polyimide (PI), polyetherimide (PEI), nylon (Ny), or the like can be suitably used.
  • PET polyethylene terephthalate
  • PEN polyethylene naphthalate
  • PES polyethersulfone
  • PI polyimide
  • PEI polyetherimide
  • nylon (Ny) nylon
  • the flexible substrate 1 may be attached to a separately prepared glass substrate to flow the process, and the film may be peeled off during the process.
  • a film that loses its adhesiveness by heating or cooling is preferably used as a medium to be attached to the glass substrate.
  • a metal such as Ag, Au, Pt, Pd, or Cu, or an ink such as C paste or Ag paste is suitable.
  • the wiring part is preferably covered with an organic insulating film such as epoxy or acrylic.
  • the pixel electrode 2P may be formed simultaneously with the wiring 3, or the pixel electrode 2P may be a separate layer so as to be connected to the wiring 3 through the opening of the organic insulating film.
  • metals such as Ag, Au, Pt, Pd, and Cu can be suitably used as the gate wiring and the gate electrode connected thereto, the capacitor wiring and the capacitor electrode connected thereto.
  • an organic insulating film such as epoxy or acrylic can be suitably used.
  • the lower pixel electrode / gate insulating film / capacitor electrode forms a storage capacitor.
  • the storage capacitor is a part for accumulating charges and holding the pixel potential.
  • the semiconductor layer formed between the source electrode and the drain electrode an organic semiconductor or an oxide semiconductor is preferable.
  • a protective layer may cover the semiconductor layer, and a fluorinated resin is suitable as the protective layer.
  • an interlayer insulating film having an opening on the lower pixel electrode and a pixel electrode connected to the lower pixel electrode through the opening are provided.
  • the interlayer insulating film is preferably an organic insulating film such as epoxy or acrylic.
  • an Ag paste or the like is suitable.
  • the display medium 6 side of the front plate having the counter electrode 5 and the display medium 6 on the counter substrate 4 is bonded onto the pixel electrode 2P.
  • the entire region having the plurality of pixel electrodes 2P shown in FIG. 2A becomes the display area 2 shown in FIG. 2B.
  • a part of the display medium 6 is removed in advance and a connecting member 15 (conductive paste, conductive rubber, etc.) shown in the AA ′ cross section of FIG. 5 is electrically connected.
  • PET, PEN, PES, PI, PEI, Ny, or the like can be suitably used.
  • a transparent conductive film such as ITO is suitable for the counter electrode 5.
  • the display medium 6 is preferably an electrophoretic body.
  • a transparent adhesive layer 12 is attached to the surface of the counter substrate 4 in advance.
  • the front barrier film 8 is laminated so as to cover the entire display unit including the large display area 7 including the plurality of display areas 2 and the non-display unit 7N between the display areas 2.
  • the back barrier film 9 with the hot melt adhesive 14 is thermally laminated on the back surface of the display unit.
  • the transparent adhesive 12 a single-layer adhesive or pressure-sensitive adhesive layer and a double-sided tape based on an acrylic film are suitable. Since the surface barrier film 8 requires transparency, a film obtained by forming an inorganic film such as SiO 2 or Al 2 O 3 on a PET film is preferable.
  • the back barrier film 9 does not need to be transparent and is preferably formed by depositing Al on a PET film, but may be formed by depositing an inorganic film such as SiO 2 or Al 2 O 3 .
  • an inorganic film such as SiO 2 or Al 2 O 3 .
  • a thermoplastic resin such as ethylene vinyl acetate is suitable.
  • the material of the edge seal 10 is applied around the front barrier film 8.
  • the edge seal material penetrates between the front barrier film 8 and the back barrier film 9 or between the front barrier film 8 and the flexible substrate 1 and covers the periphery of the display medium 6.
  • the edge seal 10 is cured with heat or light.
  • a heat or photo-curing resin such as silicone, epoxy, acrylic, urethane, or the like is suitable.
  • inorganic fine particles such as silica may be mixed.
  • the hot-melt adhesive 14 in the portion of the back barrier film 9 where the edge seal 10 is to be attached may be removed with a solvent or the like, or the hot-melt adhesive 14 may be mechanically removed. You may sharpen. Or you may use what does not have the hot-melt-adhesive 14 in the part which the edge seal 10 is going to contact among the back barrier films 9 from the beginning. In this way, the large display panel of FIG. 1 is obtained.
  • TCP, COF, or the like can be connected to the wiring 3, and further, FPC can be connected to TCP, COF, etc., and the FPC can be connected to a driving device for driving.
  • the driving IC may be directly mounted on the wiring 3 of the flexible substrate 1.
  • connection of COF, FPC, etc., and mounting of the driving IC may be performed somewhere during the steps shown in FIGS. 2A to 2F. Further, the step of laminating the front barrier film 8 and the step of laminating the back barrier film 9 may be performed in the reverse order.
  • FIG. 3 is a plan view of the large display panel, a cross-sectional view along DD ′, a cross-sectional view along EE ′, and a cross-sectional view along FF ′.
  • the large display panel has a structure in which the entire large display area is sealed after combining a plurality of display panels. Specifically, as can be seen from the plan view and the DD ′ cross-sectional view, a display medium 6 is sandwiched between the flexible substrate 1 and the counter substrate 4, and a plurality of display panels having the display area 2 are used. The frame B1 of another display panel is combined on the frame B2 of the panel so as to overlap.
  • the display is realized by applying a voltage to the display medium 6 sandwiched between the pixel electrode 2P on the flexible substrate 1 shown in FIG. 4A and the counter electrode 5 on the counter substrate 4 shown in FIG.
  • the area having the plurality of pixel electrodes 2P in FIG. 4A is the display area 2 in FIG.
  • the flexible substrate 1 having the pixel electrode 2P of FIG. 4A may be an active matrix type having a thin film transistor array or a direct connection type not having a thin film transistor.
  • a wiring 3 for supplying power is provided.
  • the wiring 3 usually includes the gate wiring 3G, the source wiring 3S, the counter electrode wiring 3COM, and the capacitor wiring 3C.
  • the wiring 3 includes a wiring to each pixel electrode and a counter electrode wiring 3COM.
  • the counter electrode wiring 3 ⁇ / b> COM is connected to the counter electrode 5.
  • an adhesive layer 11 may be provided between the display panel.
  • the adhesive layer 11 has an effect of preventing the positional relationship from shifting after the display panels are combined.
  • the spacer 13 has the effect of aligning the height of the upper surface of the counter substrate 4.
  • the entire display unit including the large display area 7 formed by connecting the display areas 2 is sandwiched between the front barrier film 8 and the back barrier film 9.
  • a hot melt adhesive 14 is provided between the front barrier film 8 and the counter substrate 4.
  • a hot melt adhesive 14 is also provided between the back barrier film 9 and the flexible substrate 1.
  • the front barrier film 8 and the back barrier film 9 are joined together by a hot melt adhesive 14 around the counter substrate 4, the display medium 6, and the flexible substrate 1.
  • the wiring 3 shown in FIG. 4A is drawn downward from the display panel of FIG. It extends outside the front barrier film 8 and the back barrier film 9.
  • the front barrier film 8 and the flexible substrate 1 and the back barrier film 9 and the flexible substrate 1 are bonded with a hot melt adhesive 14.
  • the flexible substrates 1 overlap each other at the portion where the flexible substrate 1 overlaps the edge of the front barrier film 8 or the edge of the back barrier film 9. It is not to have. Compared with the case where the flexible substrates 1 in this portion overlap each other, the distance between the front barrier film 8 and the back barrier film 9 can be narrowed, and the portion where the wiring 3 is drawn out can be easily sealed. A portion where the edge of the front barrier film 8, the edge of the back barrier film 9 and the flexible substrate 1 are in contact with each other is also filled with the hot melt adhesive 14 without a gap.
  • B1 may be stacked on B2.
  • a tape carrier package (TCP) or a chip-on-film (COF) is connected to the wiring 3 on the flexible substrate 1 by an anisotropic conductive film (ACF) or the like.
  • ACF anisotropic conductive film
  • FPC flexible printed circuit board
  • a bare chip is mounted on the wiring 3 on the flexible substrate 1 by ACF or the like, and further, FPC or the like is connected to the wiring 3 that is not connected to the pixel electrode 2P but connected to the input terminal of the bare chip. Connected to the driving device.
  • the entire large panel may be incorporated in the housing (not shown) for improving mechanical strength and decorativeness.
  • FIGS. 4A to 4G An example of a method for manufacturing the large display panel of FIG. 3 is shown in FIGS. 4A to 4G.
  • a thin film transistor array having pixel electrodes 2 ⁇ / b> P is formed on the flexible substrate 1.
  • the wiring 3 of the thin film transistor array (not shown except for the pixel electrode 2P) includes a gate wiring 3G, a source wiring 3S, a counter electrode wiring 3COM, and a capacitor wiring 3C. Or you may have the wiring 3 directly connected to each pixel electrode 2P, and the counter electrode wiring 3COM, without having a thin-film transistor.
  • the wiring 3 is formed so as to be drawn downward in the drawing.
  • the flexible substrate polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (PES), polyimide (PI), polyetherimide (PEI), nylon (Ny), or the like can be suitably used.
  • PET polyethylene terephthalate
  • PEN polyethylene naphthalate
  • PES polyethersulfone
  • PI polyimide
  • PEI polyetherimide
  • nylon (Ny) nylon
  • the flexible substrate 1 may be attached to a separately prepared glass substrate to flow the process, and the film may be peeled off during the process.
  • a film that loses its adhesiveness by heating or cooling is preferably used as a medium to be attached to the glass substrate.
  • metals such as Ag, Au, Pt, Pd, and Cu can be suitably used as the gate wiring 3G and the gate electrode connected thereto, the capacitor wiring 3C and the capacitor electrode connected thereto.
  • the gate insulating film an organic insulating film such as epoxy or acrylic can be suitably used.
  • the source wiring 3S and the source electrode connected thereto, the lower pixel electrode, the drain electrode connected thereto, and the counter electrode wiring 3COM metals such as Ag, Au, Pt, Pd, and Cu can be suitably used.
  • the lower pixel electrode / gate insulating film / capacitor electrode forms a storage capacitor.
  • an organic semiconductor or an oxide semiconductor is preferable.
  • a protective layer may cover the semiconductor layer, and a fluorinated resin is suitable as the protective layer. Furthermore, an interlayer insulating film having an opening on the lower pixel electrode and a pixel electrode connected to the lower pixel electrode through the opening are provided.
  • the interlayer insulating film is preferably an organic insulating film such as epoxy or acrylic.
  • an Ag paste or the like is suitable.
  • a metal such as Ag, Au, Pt, Pd, or Cu, or an ink such as C paste or Ag paste is suitable.
  • the wiring part is preferably covered with an organic insulating film such as epoxy or acrylic.
  • the pixel electrode 2P may be formed simultaneously with the wiring 3, or the pixel electrode 2P may be a separate layer so as to be connected to the wiring 3 through the opening of the organic insulating film.
  • the display medium 6 side of the front plate having the counter electrode 5 and the display medium 6 on the counter substrate 4 is bonded onto the pixel electrode 2P.
  • the region of the pixel electrode 2P shown in FIG. 4A becomes the display area 2 shown in FIG. 4B.
  • a part of the display medium 6 is removed in advance and a connecting member 15 (conductive paste, conductive rubber or the like) shown in the DD ′ cross section of FIG. 3 is attached, so that the counter electrode wiring 3COM and the counter electrode 5 is electrically connected.
  • PET, PEN, PES, PI, PEI, Ny, or the like can be suitably used.
  • a transparent conductive film such as ITO is suitable for the counter electrode 5.
  • the display medium 6 is preferably an electrophoretic body.
  • electrophores such as those in which white particles and black particles are charged in opposite polarities in microcapsules, or those in which differently charged white, black, and red particles are in microcups. be able to.
  • the adhesive layer 11 may be a liquid adhesive or a double-sided tape.
  • spacers 13 are formed on the back surface where the display panels do not overlap each other.
  • a film with a single-sided adhesive is suitable, and an acrylic film is particularly suitable.
  • the adhesive layer 11 a single-layer adhesive or pressure-sensitive adhesive layer or a double-sided tape based on an acrylic film is suitable.
  • the step of forming the spacer 13 on the back surface of each display panel may be performed before the step of stacking and arranging the display panels of FIG. 4D.
  • the front barrier film with the hot-melt-adhesive 14 so that the whole display part including the large sized display area 7 which consists of the non-display part 7N between several display areas 2 and the display areas 2 may be covered like FIG. 4F. 8 is heat laminated.
  • the back barrier film 9 with the hot melt adhesive 14 is thermally laminated at least on the back surface of the display portion. The edge of the front barrier film 8 and the edge of the back barrier film 9 are joined via a hot melt adhesive 14 around the display portion. Only in the portion where the wiring is drawn out, the edge of the front barrier film 8 and the flexible substrate 1 and the edge of the back barrier film 9 and the flexible substrate 1 are also bonded via the hot melt adhesive 14.
  • the surface barrier film 8 requires transparency, a film obtained by forming an inorganic film such as SiO 2 or Al 2 O 3 on a PET film is preferable.
  • the back barrier film 9 does not need to be transparent and is preferably formed by depositing Al on a PET film, but may be formed by depositing an inorganic film such as SiO 2 or Al 2 O 3 .
  • a thermoplastic resin such as ethylene vinyl acetate is suitable. In this way, the large display panel of FIG. 3 is obtained.
  • connection of COF, FPC, or the like, or mounting of a driving IC may be performed somewhere during the steps shown in FIGS. 4A to 4G. Further, the step of laminating the front barrier film 8 and the step of laminating the back barrier film 9 may be performed in the reverse order.
  • FIG. 5 is a plan view of a large display panel, a cross-sectional view along GG ′, a cross-sectional view along HH ′, and a cross-sectional view along II ′.
  • the large display panel has a structure in which the entire large display area is sealed after combining a plurality of display panels. Specifically, as can be seen from the plan view and the GG ′ sectional view, a display medium 6 is sandwiched between the flexible substrate 1 and the counter substrate 4, and a plurality of display panels having the display area 2 are used. The frame B1 of another display panel is combined on the frame B2 of the panel so as to overlap.
  • the display is realized by applying a voltage to the display medium 6 sandwiched between the pixel electrode 2P on the flexible substrate 1 shown in FIG. 6A and the counter electrode 5 on the counter substrate 4 shown in FIG.
  • the entire region having the plurality of pixel electrodes 2P in FIG. 6A becomes the display area 2 in FIG.
  • the flexible substrate 1 having the pixel electrode 2P of FIG. 6A may be an active matrix type having a thin film transistor array or a direct connection type having no thin film transistor.
  • a wiring 3 for supplying power is provided.
  • the wiring 3 usually includes the gate wiring 3G, the source wiring 3S, the counter electrode wiring 3COM, and the capacitor wiring 3C.
  • the wiring 3 includes a wiring to each pixel electrode and a counter electrode wiring 3COM.
  • the counter electrode wiring 3 ⁇ / b> COM is connected to the counter electrode 5.
  • a spacer 13 may be provided on the back surface of the flexible substrate of the display panel other than the bottom of each display panel. Moreover, you may have the transparent spacer 16 on the surface of the opposing board
  • the spacer 13 and the transparent spacer 16 have an effect of keeping the flexible substrate 1, the counter substrate 4, and the surface barrier film 8 described later in a flat shape. By improving the flatness of the front barrier film 8, the visibility of the large display panel can be kept good. Moreover, the stress concerning the front barrier film 8 is reduced, and the sealing performance of the front barrier can be kept good. Further, by keeping the flexible substrate 1 and the counter substrate 4 in a flat plate shape, unexpected stress is applied to the wiring 3, the thin film transistor on the flexible substrate 1, the counter electrode 5 on the counter substrate 4, and the display medium 6. Can be prevented.
  • a transparent adhesive layer 12 is provided between the front barrier film 8 and the counter substrate 4, between the front barrier film 8 and the transparent spacer 16, and between the transparent spacer 16 and the counter substrate 4.
  • the transparent adhesive layer 12 is also provided between the back barrier film 9 and the flexible substrate 1, between the back barrier film 9 and the spacer 14, and between the spacer 14 and the flexible substrate 1.
  • a region between the front barrier film 8 and the back barrier film 9 and around the counter substrate 4, the display medium 6, and the flexible substrate 1 is covered with an edge seal 10.
  • the wiring 3 shown in FIG. 6A is drawn downward from the display panel of FIG. It extends outside the edge seal 10.
  • the back barrier film 9 and the flexible substrate 1 are bonded with a transparent adhesive layer 12.
  • the flexible substrates 1 overlap each other at the portion where the flexible substrate 1 overlaps the edge of the front barrier film 8 or the edge of the back barrier film 9. It is not to have. Compared with the case where the flexible substrates 1 in this portion overlap each other, the distance between the front barrier film 8 and the back barrier film 9 can be narrowed, and the portion where the wiring 3 is drawn out can be easily sealed.
  • An edge seal 10 seals between the front barrier film 8 and the flexible substrate 1 and between the front barrier film 8 and the back barrier film 9.
  • B1 may be stacked on B2.
  • a tape carrier package (TCP) or a chip-on film (COF) is connected to the wiring 3 on the flexible substrate 1 by an anisotropic conductive film (ACF) or the like.
  • ACF anisotropic conductive film
  • FPC flexible printed circuit board
  • a bare chip is mounted on the wiring 3 on the flexible substrate 1 by ACF or the like, and further, FPC or the like is connected to the wiring 3 that is not connected to the pixel electrode 2P but connected to the input terminal of the bare chip. Connected to the driving device.
  • the entire large panel may be incorporated in the housing (not shown) for improving mechanical strength and decorativeness.
  • FIGS. 6A to 6G An example of a method for manufacturing the large display panel of FIG. 5 is shown in FIGS. 6A to 6G.
  • a thin film transistor array having pixel electrodes 2P is formed on a flexible substrate 1.
  • the wiring 3 of the thin film transistor array (not shown except for the pixel electrode 2P) includes a gate wiring 3G, a source wiring 3S, a counter electrode wiring 3COM, and a capacitor wiring 3C. Or you may have the wiring 3 directly connected to each pixel electrode 2P, and the counter electrode wiring 3COM, without having a thin-film transistor.
  • the wiring 3 is formed so as to be drawn downward in the drawing.
  • the flexible substrate polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (PES), polyimide (PI), polyetherimide (PEI), nylon (Ny), or the like can be suitably used.
  • PET polyethylene terephthalate
  • PEN polyethylene naphthalate
  • PES polyethersulfone
  • PI polyimide
  • PEI polyetherimide
  • nylon (Ny) nylon
  • the flexible substrate 1 may be attached to a separately prepared glass substrate to flow the process, and the film may be peeled off during the process.
  • a film that loses its adhesiveness by heating or cooling is preferably used as a medium to be attached to the glass substrate.
  • metals such as Ag, Au, Pt, Pd, and Cu can be suitably used as the gate wiring 3G and the gate electrode connected thereto, the capacitor wiring 3C and the capacitor electrode connected thereto.
  • the gate insulating film an organic insulating film such as epoxy or acrylic can be suitably used.
  • the source wiring 3S and the source electrode connected thereto, the lower pixel electrode, the drain electrode connected thereto, and the counter electrode wiring 3COM metals such as Ag, Au, Pt, Pd, and Cu can be suitably used.
  • the lower pixel electrode / gate insulating film / capacitor electrode forms a storage capacitor.
  • an organic semiconductor or an oxide semiconductor is preferable.
  • a protective layer may cover the semiconductor layer, and a fluorinated resin is suitable as the protective layer. Furthermore, an interlayer insulating film having an opening on the lower pixel electrode and a pixel electrode connected to the lower pixel electrode through the opening are provided.
  • the interlayer insulating film is preferably an organic insulating film such as epoxy or acrylic.
  • an Ag paste or the like is suitable.
  • a metal such as Ag, Au, Pt, Pd, or Cu, or an ink such as C paste or Ag paste is suitable.
  • the wiring part is preferably covered with an organic insulating film such as epoxy or acrylic.
  • the pixel electrode 2P may be formed simultaneously with the wiring 3, or the pixel electrode 2P may be a separate layer so as to be connected to the wiring 3 through the opening of the organic insulating film.
  • the display medium 6 side of the front plate having the counter electrode 5 and the display medium 6 on the counter substrate 4 is bonded onto the pixel electrode 2P.
  • the entire region having the plurality of pixel electrodes 2P shown in FIG. 6A becomes the display area 2 shown in FIG. 6B.
  • a part of the display medium 6 is removed in advance and a connecting member 15 (conductive paste, conductive rubber, etc.) shown in the section GG ′ in FIG. 5 is attached, so that the counter electrode wiring 3COM and the counter electrode 5 is electrically connected.
  • PET, PEN, PES, PI, PEI, Ny, or the like can be suitably used.
  • a transparent conductive film such as ITO is suitable for the counter electrode 5.
  • the display medium 6 is preferably an electrophoretic body.
  • electrophores Various types are used, such as those in which white particles and black particles are charged in opposite polarities in microcapsules, or those in which differently charged white, black, and red particles are in microcups. be able to.
  • a transparent adhesive layer 12 is attached to the surface of the counter substrate 4 in advance.
  • a spacer 13 is bonded to the back surface of the flexible substrate 1 of the display panel other than the lowermost display panel.
  • a film with a single-sided adhesive is suitable.
  • a transparent spacer 16 is bonded to the surface of the counter substrate 4 of the display panel other than the uppermost display panel.
  • the spacer 13 may be transparent or the same film as the transparent spacer 16. The step of sticking the transparent spacer 16 on the surface and the step of sticking the spacer 13 on the back surface may be performed in the reverse order. Or you may perform the process of sticking the spacer 13 or the transparent spacer 16 before the process of stacking and arranging the display panel of FIG. 6C.
  • the front barrier film 8 is laminated so as to cover the entire display section including the large display area 7 including the plurality of display areas 2 and the non-display section 7N between the display areas. Further, after forming the transparent adhesive layer 12 on the back surface, the back barrier film 9 is laminated on the back surface as shown in FIG. 6F.
  • the material of the edge seal 10 is applied around the front barrier film 8.
  • the edge seal material penetrates between the front barrier film 8 and the back barrier film 9 or between the front barrier film 8 and the flexible substrate 1 and covers the periphery of the display medium 6.
  • the edge seal 10 is cured with heat or light.
  • a heat or photo-curing resin such as silicone, epoxy, acrylic, urethane, or the like is suitable.
  • inorganic fine particles such as silica may be mixed. In this way, the large display panel of FIG. 5 is obtained.
  • connection such as COF or FPC, or mounting of a driving IC may be performed somewhere during the steps shown in FIGS. 6A to 6G. Further, the step of laminating the front barrier film 8 and the step of laminating the back barrier film 9 may be performed in the reverse order.
  • FIG. 7 is a plan view of the large display panel, a cross-sectional view along JJ ′, a cross-sectional view along KK ′, and a cross-sectional view along LL ′.
  • the large display panel has a structure in which the entire large display area is sealed after combining a plurality of display panels. Specifically, as can be seen from the plan view and the JJ ′ cross-sectional view, the display medium 6 is sandwiched between the flexible substrate 1 and the counter substrate 4, and a plurality of display panels having the display area 2 are used.
  • the frame B1 of the center display panel is overlaid on the frame B2 of the display panel, and the frame B2 of the center display panel is overlaid on the frame B1 of the right display panel.
  • a spacer 13 is provided on the back surface of the flexible substrate of the display panel other than the bottom of the display panels (the center in FIG. 7). Further, a transparent spacer 16 is provided on the surface of the counter substrate 4 of a display panel (left and right in FIG. 7) other than the top of each panel.
  • the spacer 13 and the transparent spacer 16 have an effect of keeping the flexible substrate 1, the counter substrate 4, and the surface barrier film 8 described later in a flat shape.
  • the spacer 13 and the transparent spacer 16 have an effect of keeping the flexible substrate 1, the counter substrate 4, and the surface barrier film 8 described later in a flat shape.
  • the visibility of the large display panel can be kept good.
  • the stress concerning the front barrier film 8 is reduced, and the sealing performance of the front barrier can be kept good.
  • unexpected stress is applied to the wiring 3, the thin film transistor on the flexible substrate 1, the counter electrode 5 on the counter substrate 4, and the display medium 6. Can be prevented.
  • substrate 4, the display medium 6, and the flexible substrate 1 is covered with the front barrier film 8 and the back barrier film 9 so that the whole display part which has the large sized display area 7 formed by connecting the display area 2 may be covered. It is sandwiched.
  • a transparent adhesive layer 12 is provided between the front barrier film 8 and the counter substrate 4, between the front barrier film 8 and the transparent spacer 16, and between the transparent spacer 16 and the counter substrate 4.
  • the transparent adhesive layer 12 is also provided between the back barrier film 9 and the flexible substrate 1, between the back barrier film 9 and the spacer 14, and between the spacer 14 and the flexible substrate 1.
  • the display medium 6, and the flexible substrate 1 are covered with an edge seal 10.
  • the wiring 3 is drawn downward from the display panel of FIG. It extends outside.
  • the back barrier film 9 and the flexible substrate 1 are bonded with a transparent adhesive layer 12.
  • the flexible substrates 1 overlap each other at the portion where the flexible substrate 1 overlaps the edge of the front barrier film 8 or the edge of the back barrier film 9. It is not to have. Compared with the case where the flexible substrates 1 in this portion overlap each other, the distance between the front barrier film 8 and the back barrier film 9 can be narrowed, and the portion where the wiring 3 is drawn out can be easily sealed.
  • An edge seal 10 seals between the front barrier film 8 and the flexible substrate 1 and between the front barrier film 8 and the back barrier film 9.
  • FIG. 8 is a plan view of the large display panel, a cross-sectional view along MM ′, a cross-sectional view along NN ′, and a cross-sectional view along OO ′.
  • the large display panel has a structure in which the entire large display area is sealed after combining a plurality of display panels. Specifically, as can be seen from the plan view and the MM ′ cross-sectional view, a display medium 6 is sandwiched between the flexible substrate 1 and the counter substrate 4, and a plurality of display panels having the display area 2 are used. On the frame B2 of the panel, two sets that are combined so that the frame B1 of another display panel overlaps are arranged with the sides where no wiring is provided aligned.
  • a spacer 13 is provided on the back surface of the flexible substrate of the display panel other than the bottom of each display panel. Further, a transparent spacer 16 is provided on the surface of the counter substrate 4 of the display panel other than the top of each panel.
  • the spacer 13 and the transparent spacer 16 have an effect of keeping the flexible substrate 1, the counter substrate 4, and the surface barrier film 8 described later in a flat shape. By improving the flatness of the front barrier film 8, the visibility of the large display panel can be kept good. Moreover, the stress concerning the front barrier film 8 is reduced, and the sealing performance of the front barrier can be kept good. Further, by keeping the flexible substrate 1 and the counter substrate 4 in a flat plate shape, unexpected stress is applied to the wiring 3, the thin film transistor on the flexible substrate 1, the counter electrode 5 on the counter substrate 4, and the display medium 6. Can be prevented.
  • the entire display unit having the large display area 7 formed by connecting the display areas 2 is sandwiched between the front barrier film 8 and the back barrier film 9.
  • a transparent adhesive layer 12 is provided between the front barrier film 8 and the counter substrate 4, between the front barrier film 8 and the transparent spacer 16, and between the transparent spacer 16 and the counter substrate 4.
  • the transparent adhesive layer 12 is also provided between the back barrier film 9 and the flexible substrate 1, between the back barrier film 9 and the spacer 14, and between the spacer 14 and the flexible substrate 1.
  • the display medium 6, and the flexible substrate 1 are covered with an edge seal 10.
  • the wiring 3 is drawn in the vertical direction of the display panel of FIG. It extends outside.
  • the back barrier film 9 and the flexible substrate 1 are bonded with a transparent adhesive layer 12.
  • the flexible substrates 1 overlap each other at the portion where the flexible substrate 1 overlaps the edge of the front barrier film 8 or the edge of the back barrier film 9. It is not to have. Compared with the case where the flexible substrates 1 in this portion overlap each other, the distance between the front barrier film 8 and the back barrier film 9 can be narrowed, and the portion where the wiring 3 is drawn out can be easily sealed.
  • An edge seal 10 seals between the front barrier film 8 and the flexible substrate 1 and between the front barrier film 8 and the back barrier film 9.
  • FIG. 9 is a plan view of a large display panel, a cross-sectional view along VV ′, a cross-sectional view along WW ′, and a cross-sectional view along XX ′.
  • This large display panel has a structure in which the entire large display area is sealed by combining a plurality of display panels. Specifically, as can be seen from the plan view and the VV ′ sectional view, a display medium 6 is sandwiched between the flexible substrate 1 and the counter substrate 4, and a plurality of display panels having the display area 2 are used. Other display panels are arranged next to the panel.
  • the gate wiring 3G is devised to be drawn out to the same side as the source wiring 3S.
  • the gate wiring 3G includes a wiring extending in the left-right direction, which is the first direction of the display panel, and a wiring extending in the vertical direction, which is the second direction of the display panel. These two wirings are formed in different layers and are connected by via-hole connection. Accordingly, the frames B1 and B2 from the display area 2 including the plurality of pixel electrodes 2P to the edge of the flexible substrate 1 can be reduced.
  • FIG. 10A in order to make the gate wiring 3G easy to see, only one representative pixel electrode 2P is shown, and the other pixel electrodes 2P are not shown.
  • the frame may be made smaller by reducing the line width and interval of the gate wiring 3G.
  • the counter electrode wiring 3COM is preferably not on the right side of the pixel electrode 2P group but on the lower side. In this way, the flexible substrate 1 having a small frame is obtained.
  • the display is realized by applying a voltage to the display medium 6 sandwiched between the pixel electrode 2P on the flexible substrate 1 shown in FIG. 10A and the counter electrode 5 on the counter substrate 4 shown in FIG.
  • the entire region having the plurality of pixel electrodes 2P in FIG. 10A becomes the display area 2 in FIG.
  • the flexible substrate 1 having the pixel electrode 2P of FIG. 10A may be an active matrix type having a thin film transistor array or a direct connection type not having a thin film transistor.
  • a wiring 3 for supplying power is provided.
  • the wiring 3 usually includes the gate wiring 3G, the source wiring 3S, the counter electrode wiring 3COM, and the capacitor wiring 3C.
  • the wiring 3 includes a wiring to each pixel electrode and a counter electrode wiring 3COM.
  • the counter electrode wiring 3 ⁇ / b> COM is connected to the counter electrode 5.
  • a transparent spacer 16 may be provided on the surface of the counter substrate 4 of each display panel.
  • the entire display unit having the large display area 7 formed by connecting the display areas 2 is sandwiched between the front barrier film 8 and the back barrier film 9.
  • a transparent adhesive layer 12 may be provided between the front barrier film 8 and the counter substrate 4.
  • a transparent adhesive layer 12 is also provided between the back barrier film 9 and the flexible substrate 1.
  • the display medium 6, and the flexible substrate 1 are covered with an edge seal 10.
  • the wiring 3 shown in FIG. 10A is drawn downward from the display panel of FIG. It extends outside the edge seal 10.
  • the back barrier film 9 and the flexible substrate 1 may be bonded with a transparent adhesive layer 12.
  • an edge seal 10 is provided between the front barrier film 8 and the flexible substrate 1 and between the front barrier film 8 and the back barrier film 9. It is sealed.
  • a tape carrier package (TCP) or a chip-on-film (COF) is connected to the wiring 3 on the flexible substrate 1 by an anisotropic conductive film (ACF) or the like.
  • ACF anisotropic conductive film
  • FPC flexible printed circuit board
  • a bare chip is mounted on the wiring 3 on the flexible substrate 1 by ACF or the like, and further, FPC or the like is connected to the wiring 3 that is not connected to the pixel electrode 2P but connected to the input terminal of the bare chip. Connected to the driving device.
  • the flexible substrate 1 can be bent outside the front barrier film 8 and the back barrier film 9 and portions such as TCP, COF, and FPC connected to the flexible substrate 1 with a certain radius of curvature. By bending, it can be used as a horizontally long large display panel such as an electronic shelf label.
  • the entire large panel may be incorporated in the housing (not shown) for improving mechanical strength and decorativeness.
  • FIGS. 10A to 10E An example of a method for manufacturing the large display panel in FIG. 9 is shown in FIGS. 10A to 10E.
  • a thin film transistor array having pixel electrodes 2 ⁇ / b> P is formed on the flexible substrate 1.
  • the wiring 3 of the thin film transistor array (not shown except for one pixel electrode 2P) includes a gate wiring 3G, a source wiring 3S, a counter electrode wiring 3COM, and a capacitor wiring 3C. Or you may have the wiring 3 directly connected to each pixel electrode 2P, and the counter electrode wiring 3COM, without having a thin-film transistor.
  • the wiring 3 is formed so as to be drawn downward in the drawing.
  • the flexible substrate polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (PES), polyimide (PI), polyetherimide (PEI), nylon (Ny), or the like can be suitably used.
  • PET polyethylene terephthalate
  • PEN polyethylene naphthalate
  • PES polyethersulfone
  • PI polyimide
  • PEI polyetherimide
  • nylon (Ny) nylon
  • the flexible substrate 1 may be attached to a separately prepared glass substrate to flow the process, and the film may be peeled off during the process.
  • a film that loses its adhesiveness by heating or cooling is preferably used as a medium to be attached to the glass substrate.
  • metals such as Ag, Au, Pt, Pd, and Cu can be suitably used as the gate wiring 3G and the gate electrode connected thereto, the capacitor wiring 3C and the capacitor electrode connected thereto.
  • the gate insulating film an organic insulating film such as epoxy or acrylic can be suitably used.
  • the source wiring 3S and the source electrode connected thereto, the lower pixel electrode, the drain electrode connected thereto, and the counter electrode wiring 3COM metals such as Ag, Au, Pt, Pd, and Cu can be suitably used.
  • the lower pixel electrode / gate insulating film / capacitor electrode forms a storage capacitor.
  • an organic semiconductor or an oxide semiconductor is preferable.
  • a protective layer may cover the semiconductor layer, and a fluorinated resin is suitable as the protective layer. Furthermore, an interlayer insulating film having an opening on the lower pixel electrode and a pixel electrode connected to the lower pixel electrode through the opening are provided.
  • the interlayer insulating film is preferably an organic insulating film such as epoxy or acrylic.
  • an Ag paste or the like is suitable.
  • a metal such as Ag, Au, Pt, Pd, or Cu, or an ink such as C paste or Ag paste is suitable.
  • the wiring part is preferably covered with an organic insulating film such as epoxy or acrylic.
  • the pixel electrode 2P may be formed simultaneously with the wiring 3, or the pixel electrode 2P may be a separate layer so as to be connected to the wiring 3 through the opening of the organic insulating film.
  • the display medium 6 side of the front plate having the counter electrode 5 and the display medium 6 on the counter substrate 4 is bonded onto the pixel electrode 2P.
  • the entire region having the plurality of pixel electrodes 2P shown in FIG. 10A becomes the display area 2 shown in FIG. 10B.
  • a part of the display medium 6 is removed in advance and a connection member 15 (conductive paste, conductive rubber, etc.) shown in the XX ′ cross section of FIG. 9 is attached, so that the counter electrode wiring 3COM and the counter electrode 5 is electrically connected.
  • PET, PEN, PES, PI, PEI, Ny, or the like can be suitably used.
  • a transparent conductive film such as ITO is suitable for the counter electrode 5.
  • the display medium 6 is preferably an electrophoretic body.
  • electrophores are used, such as those in which white particles and black particles are charged in opposite polarities in microcapsules, or those in which differently charged white, black, and red particles are in microcups. be able to.
  • a transparent adhesive layer 12 is previously attached to the back surface of the flexible substrate 1. However, an opaque adhesive may be used instead of the transparent adhesive layer 12.
  • a plurality of display panels are arranged on one large back barrier film 9 with the edges aligned.
  • the front barrier film 8 is laminated so as to cover the entire display portion having the large display area 7 composed of the plurality of display areas 2 and the non-display portion 7N between the display areas 2.
  • the material of the edge seal 10 is applied around the front barrier film 8.
  • the edge seal material penetrates between the front barrier film 8 and the back barrier film 9 or between the front barrier film 8 and the flexible substrate 1 and covers the periphery of the display medium 6.
  • the edge seal 10 is cured with heat or light.
  • a heat or photo-curing resin such as silicone, epoxy, acrylic, urethane, or the like is suitable.
  • inorganic fine particles such as silica may be mixed. In this way, the large display panel of FIG. 9 is obtained.
  • a COF or FPC or the like it is possible to drive by connecting a COF or FPC or the like to the wiring 3, connecting an FPC to TCP or COF, or the like, and connecting the FPC to a driving device.
  • the driving IC may be directly mounted on the wiring 3 of the flexible substrate 1.
  • connection of COF, FPC, or the like, or mounting of a driving IC may be performed somewhere during the steps shown in FIGS. 10A to 10E.
  • a display panel may be arranged on the front barrier film 8 and the back barrier film 9 may be laminated.
  • a plurality of display panels are sealed with only two components, one large front barrier film 8 and one large back barrier film 9, or one large Since the front barrier film 8, one large back barrier film 9, and one kind of edge seal 10 are sealed with only three parts, a good seal with few connections and high reliability Can be achieved.
  • a display test can be performed in the state of each display panel.
  • FIG. 10B it is possible to perform a display test by supplying power directly to the wiring 3.
  • the bottom gate bottom contact type is described as the thin film transistor.
  • the present invention is not limited to this structure, and thin film transistors having various structures can be applied. .
  • Example 1 The large display panel shown in FIG. 1 was produced according to the procedure shown in FIGS. 2A to 2F.
  • Cu was sputtered on a polyimide film having a thickness of 50 ⁇ m, and pixel electrodes 2P and wirings 3 were formed by photolithography.
  • the wiring 3 has a counter electrode wiring 3COM in addition to the one connected to each pixel electrode 2P (FIG. 2A).
  • a photosensitive solder resist was used as the insulating layer to cover the pixel electrode 2P, the connection part of the counter electrode wiring 3COM, and the connection part other than the connection part with the COF.
  • electroless Ni plating and electroless Au plating were performed to protect the surface of the pixel electrode 2P and the like.
  • a display medium 6 coated on the counter electrode 5 on the counter substrate 4 is prepared, and the display medium 6 in a portion to be connected to the counter electrode wiring 3COM is removed, and the counter electrode at the removed position is removed.
  • An Ag paste was attached as a connecting member 15 on 5.
  • the counter substrate 4 was bonded so as to cover the pixel electrode 2P and to connect the counter electrode wiring 3COM to the counter electrode 4 through the connection member 15 (FIG. 2B).
  • a transparent adhesive layer 12 was formed on the counter substrate 4.
  • a plurality of display panels thus manufactured were used, and a large frame (B1) was superimposed on a wide frame (B2) to form a large display panel (FIG. 2C).
  • the display panels are fixed by the transparent adhesive layer 12.
  • the large display panel has a large display area 7 including a plurality of display areas 2 and a non-display portion 7N.
  • the front barrier film 8 was laminated so as to cover the large display area 7 of the large display panel (FIG. 2D).
  • the front barrier film 8 is fixed to the surface of the counter substrate 4 by the transparent adhesive layer 12.
  • the back barrier film 9 with the hot melt adhesive 14 was heat-laminated with the reverse side (FIG. 2E).
  • the back barrier film 9 is substantially the same shape as the front barrier film 8 and is slightly larger.
  • the back barrier film 9 was fixed to the back surface of the flexible substrate 1 with a hot melt adhesive 14.
  • the ACF was temporarily fixed to the wiring 3, and the output side of the COF of the driving IC was aligned with the wiring 3 and thermocompression bonded.
  • the input side of the COF was also connected to the FPC, and the FPC was connected to the driving device.
  • the width of the non-display portion 7N is small and unnoticeable, so that a good display can be performed as a whole.
  • Example 2 The large display panel shown in FIG. 3 was produced according to the procedure shown in FIGS. 4A to 4G.
  • a PET film was prepared as the flexible substrate 1 and temporarily fixed on a glass substrate via a temporary fixing film.
  • offset printing of Ag ink the gate wiring 3G, the gate electrode connected thereto, the capacitor wiring 3C, and the capacitor electrode connected thereto were formed.
  • an epoxy resin was applied and baked as a gate insulating film.
  • offset printing of Ag ink was performed to form the source wiring 3S, the source electrode connected thereto, the lower pixel electrode, and the drain electrode connected thereto.
  • the organic semiconductor was flexographically printed to form a semiconductor layer, and the fluorinated resin was screen printed to form a protective layer.
  • a photosensitive epoxy was used to form an interlayer insulating film having an opening on the lower pixel electrode.
  • Ag paste was screen-printed to form the pixel electrode 2P (FIG. 4A).
  • the flexible substrate 1 was peeled from the glass substrate.
  • a display medium 6 coated on the counter electrode 5 on the counter substrate 4 is prepared, and the display medium 6 in a portion to be connected to the counter electrode wiring 3COM is removed, and the counter electrode at the removed position is removed.
  • An Ag paste was attached as a connecting member 15 on 5.
  • the counter substrate 4 was bonded so as to cover the pixel electrode 2P and to connect the counter electrode wiring 3COM to the counter electrode 4 through the connection member 15 (FIG. 4B).
  • the large display panel has a large display area 7 including a plurality of display areas 2 and a non-display portion 7N.
  • the spacer 13 was a single-sided adhesive film for aligning the height of the surface of the counter substrate 4 and having a thickness substantially equal to the thickness of the counter substrate 4 + the counter electrode 5 + the display medium 6.
  • the front barrier film 8 with the hot melt adhesive 14 was heat laminated so as to cover the large display area 7 of the large display panel (FIG. 4F).
  • the front barrier film 8 is fixed to the surface of the counter substrate 4 by a hot melt adhesive 14.
  • the back barrier film 9 with the hot melt adhesive 14 was heat-laminated with the reverse side upside down (FIG. 4G).
  • the back barrier film 9 has almost the same shape as the front barrier film 8.
  • the back barrier film 9 was fixed to the back surface of the flexible substrate 1 with a hot melt adhesive 14.
  • the ACF was temporarily fixed to the wiring 3, and the output side of the COF of the driving IC was aligned with the wiring 3 and thermocompression bonded.
  • the input side of the COF was also connected to the FPC, and the FPC was connected to the driving device.
  • the width of the non-display portion 7N is small and unnoticeable, so that a good display can be performed as a whole.
  • Example 3 The large display panel shown in FIG. 5 was produced according to the procedure shown in FIGS. 6A to 6G.
  • a PET film was prepared as the flexible substrate 1 and temporarily fixed on a glass substrate via a temporary fixing film.
  • offset printing of Ag ink the gate wiring 3G, the gate electrode connected thereto, the capacitor wiring 3C, and the capacitor electrode connected thereto were formed.
  • an epoxy resin was applied and baked as a gate insulating film.
  • offset printing of Ag ink was performed to form the source wiring 3S, the source electrode connected thereto, the lower pixel electrode, and the drain electrode connected thereto.
  • the organic semiconductor was flexographically printed to form a semiconductor layer, and the fluorinated resin was screen printed to form a protective layer.
  • a photosensitive epoxy was used to form an interlayer insulating film having an opening on the lower pixel electrode.
  • Ag paste was screen-printed to form pixel electrodes 2P (FIG. 6A).
  • the flexible substrate 1 was peeled from the glass substrate.
  • a display medium 6 coated on the counter electrode 5 on the counter substrate 4 is prepared, and the display medium 6 in a portion to be connected to the counter electrode wiring 3COM is removed, and the counter electrode at the removed position is removed.
  • An Ag paste was attached as a connecting member 15 on 5.
  • the counter substrate 4 was bonded so as to cover the pixel electrode 2P and to connect the counter electrode wiring 3COM to the counter electrode 4 through the connection member 15 (FIG. 6B).
  • a transparent adhesive layer 12 was formed on the counter substrate 4.
  • a plurality of display panels thus produced were used, and a large frame (B1) was stacked on the wide frame (B2) to obtain a large display panel (FIG. 6C).
  • the display panels are fixed by the transparent adhesive layer 12.
  • the large display panel has a large display area 7 including a plurality of display areas 2 and a non-display portion 7N.
  • the spacer 13 was bonded to the back surface of the flexible substrate 1 of the display panel other than the lowermost of the display panels.
  • the transparent spacer 5 was bonded together on the surface of the opposing substrate 4 of display panels other than the top among each display panel (FIG. 6D). The spacer 13 and the transparent spacer 16 are for keeping the flexible substrate 1 to the counter substrate 4 flat.
  • the front barrier film 8 was laminated so as to cover the large display area 7 of the large display panel (FIG. 6E).
  • the front barrier film 8 is fixed to the surface of the counter substrate 4 by the transparent adhesive layer 12.
  • the ACF was temporarily fixed to the wiring 3, and the output side of the COF of the driving IC was aligned with the wiring 3 and thermocompression bonded.
  • the input side of the COF was also connected to the FPC, and the FPC was connected to the driving device.
  • the width of the non-display portion 7N is small and unnoticeable, so that a good display can be performed as a whole.
  • Example 4 The large display panel shown in FIG. 9 was produced by the procedure shown in FIGS. 10A to 10E.
  • a PET film was prepared as the flexible substrate 1 and temporarily fixed on a glass substrate via a temporary fixing film.
  • a portion of the gate wiring 3G extending in the left-right direction of the display panel, a gate electrode connected thereto, a capacitor wiring 3C, and a capacitor electrode connected thereto were formed.
  • a photoresist was applied and baked as a gate insulating film. Then, an opening was formed in the gate insulating film on the portion of the gate wiring 3G extending in the left-right direction of the display panel by exposure and development.
  • a display medium 6 coated on the counter electrode 5 on the counter substrate 4 is prepared, and the display medium 6 in a portion to be connected to the counter electrode wiring 3COM is removed, and the counter electrode at the removed position is removed.
  • An Ag paste was attached as a connecting member 15 on 5.
  • the counter substrate 4 was bonded so as to cover the pixel electrode 2P and to connect the counter electrode wiring 3COM to the counter electrode 4 through the connection member 15 (FIG. 10B).
  • the ACF was temporarily fixed to the wiring 3
  • the output side of the COF of the driving IC was aligned with the wiring 3 and thermocompression bonded (not shown).
  • the input side of the COF was also connected to the FPC (not shown), and the FPC was connected to the driving device to perform a display test. Thereafter, the transparent adhesive layer 12 was formed on the back surface of the display area 2 of the flexible substrate 1 by being removed from the driving device.
  • the large display panel has a large display area 7 including a plurality of display areas 2 and a non-display portion 7N.
  • the front barrier film 8 was laminated so as to cover the large display area 7 of the large display panel (FIG. 10D).
  • the front barrier film 8 is fixed to the surface of the counter substrate 4 by the transparent adhesive layer 12.
  • the FPC was connected to the driving device and driven.
  • the width of the non-display portion 7N is small and unnoticeable, so that a good display can be performed as a whole.
  • the interval between display panels adjacent to each other, that is, the boundary seam is inconspicuous. Can be. Note that the features of each embodiment can be implemented in appropriate combination.
  • the present invention is useful as a large display panel.
  • it is most suitable for display such as an electronic shelf label in which the vertical and horizontal dimensions of the display area are greatly different.

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Abstract

The present invention provides a large-sized display panel with high display quality in which joints cannot be easily recognized. A large-sized display panel is formed by combining a plurality of display panels in each of which an electrophoretic body is sandwiched between a pixel electrode portion on a flexible substrate and a counter electrode on a counter substrate, wherein a display part of the large-sized display panel is configured from the plurality of display panels, and the entire display part is sealed by being sandwiched between one front barrier film and one back barrier film.

Description

大型表示パネル及びその製造方法Large display panel and manufacturing method thereof
　本発明は大型表示パネル及びその製造方法に関する。 The present invention relates to a large display panel and a manufacturing method thereof.
　電子ペーパーの用途として、電子棚札への応用が提案されている。この用途では、表示画面サイズ、特に横幅が大きいものが要望されている。しかしながら、大型の表示パネルを製造するには、歩留まり、製造設備を考慮すると、製造コストが大幅に上昇するという問題が生じる。 As an application of electronic paper, application to electronic shelf labels has been proposed. In this application, a display screen size, particularly one having a large width is desired. However, in order to manufacture a large display panel, there is a problem that the manufacturing cost is significantly increased in consideration of yield and manufacturing equipment.
　大型表示パネルを実現する別の方法として、小さな画面サイズの表示パネルを多数枚連結タイリングして、全体で表示を行う方法が知られている。ガラス基板を用いた液晶ディスプレイ（ＬＣＤ）やプラズマディスプレイパネル（ＰＤＰ）等を複数枚連結して表示パネルを実現する場合、各表示パネルの端部がなるべく接するように横に並べて配置される。 As another method for realizing a large display panel, there is known a method in which a large number of display panels having a small screen size are connected and tiled to display the entire display panel. When a display panel is realized by connecting a plurality of liquid crystal displays (LCD), plasma display panels (PDP), or the like using a glass substrate, the display panels are arranged side by side so that the ends of the display panels are in contact as much as possible.
　しかしながら、このような表示パネルは、有効表示領域の外側に非表示領域があるため、横に並べると画像を表示できない表示パネル間の継ぎ目部分の幅が２パネルの合計になってしまい、継ぎ目が目立ってしまうという問題があった。これについて、詳しく説明する。 However, since such a display panel has a non-display area outside the effective display area, the width of the joint portion between the display panels that cannot display an image when arranged horizontally is the sum of two panels, and the joint is There was a problem of being noticeable. This will be described in detail.
　表示パネルの表示エリアの縁からパネルの縁までの非表示領域を額縁と呼ぶことにする。ここで表示エリアとは、有効表示領域全体を含む２次元エリアであり、通常の表示パネルでは有効表示領域と等しい。例えば図１１Ａの表示パネルの場合、左額縁は、表示エリア２の縁からガラス基板２１の縁までの寸法Ｂ１となる。右額縁は、表示エリア２の縁からガラス基板２１の縁までの寸法Ｂ２となる。この表示パネルを横に並べた大型表示パネルでは、図１１Ｂのように大型表示エリア７内にＢ１＋Ｂ２の幅の非表示領域７Ｎができてしまう。ここで大型表示エリアとは、複数の表示パネルの有効表示領域全体を含む１つの２次元エリアであり、複数の表示エリアと、その間の非表示領域を含むエリアである。 The non-display area from the edge of the display area of the display panel to the edge of the panel is called a picture frame. Here, the display area is a two-dimensional area including the entire effective display area, and is equal to the effective display area in a normal display panel. For example, in the case of the display panel of FIG. 11A, the left picture frame has a dimension B1 from the edge of the display area 2 to the edge of the glass substrate 21. The right frame is a dimension B2 from the edge of the display area 2 to the edge of the glass substrate 21. In a large display panel in which the display panels are arranged horizontally, a non-display area 7N having a width of B1 + B2 is formed in the large display area 7 as shown in FIG. 11B. Here, the large display area is one two-dimensional area including the entire effective display area of a plurality of display panels, and is an area including a plurality of display areas and a non-display area therebetween.
　一方、ガラス基板を用いずフレキシブル基板を用いた表示パネルでは、表示パネルの厚さがガラス基板の時よりも薄いので、表示パネルの一部を、厚さ方向に重ねることができる（特許文献１）。この場合、表示パネル間の継ぎ目の額縁は１パネル分に低減できる。例えば図１２Ａの表示パネルの場合、左額縁幅Ｂ１が、右額縁幅Ｂ２より小さいとすると、ある表示パネルの右額縁の上に、他の表示パネルの左額縁を重ねることにより、図１２Ｂのように大型表示エリア７内の非表示領域７Ｎの幅はＢ１になる。 On the other hand, in a display panel using a flexible substrate without using a glass substrate, the thickness of the display panel is thinner than that of a glass substrate, so that a part of the display panel can be stacked in the thickness direction (Patent Document 1). ). In this case, the frame of the joint between the display panels can be reduced to one panel. For example, in the case of the display panel of FIG. 12A, assuming that the left frame width B1 is smaller than the right frame width B2, the left frame of another display panel is overlaid on the right frame of one display panel as shown in FIG. The width of the non-display area 7N in the large display area 7 is B1.
　なお表示は、フレキシブル基板１上の画素電極２Ｐと、対向基板４上の対向電極５に挟まれた表示媒体６に電圧が印加されることによって実現するので、画素電極２Ｐがある部分が表示エリア２となる。画素電極２Ｐを有するフレキシブル基板１としては、薄膜トランジスタアレイを有するアクティブマトリクス型であってもよいし、薄膜トランジスタを有しない直接接続型でもよい。いずれにおいても、給電するための配線３を有する。アクティブマトリクスの場合には、通常、ゲート配線とソース配線と対向電極配線３ＣＯＭとキャパシタ配線が、配線に含まれる。直接接続型の場合には、各画素電極への配線と、対向電極配線３ＣＯＭが配線３に含まれる。対向電極配線３ＣＯＭは、対向電極５に接続されている。 The display is realized by applying a voltage to the display medium 6 sandwiched between the pixel electrode 2P on the flexible substrate 1 and the counter electrode 5 on the counter substrate 4, so that the portion where the pixel electrode 2P is present is the display area. 2. The flexible substrate 1 having the pixel electrode 2P may be an active matrix type having a thin film transistor array or a direct connection type having no thin film transistor. In any case, a wiring 3 for supplying power is provided. In the case of an active matrix, a gate wiring, a source wiring, a counter electrode wiring 3COM, and a capacitor wiring are usually included in the wiring. In the case of the direct connection type, the wiring 3 includes a wiring to each pixel electrode and a counter electrode wiring 3COM. The counter electrode wiring 3 </ b> COM is connected to the counter electrode 5.
　ところで、表示媒体６や薄膜トランジスタが外界の水分や酸素の影響を受ける場合、水分や酸素を遮断するための封止が必要である。フレキシブルディスプレイの場合、バリアフィルムを用いて封止が行われることが多い。例えば図１３Ａの表示パネルの場合、左額縁が、表示エリア２からフレキシブル基板１の縁までの寸法Ｂ１と、フレキシブル基板１の縁からバリアフィルム８または９の縁までの寸法Ｅ１の和である。右額縁は、表示エリア２からフレキシブル基板１の縁までの寸法Ｂ２と、フレキシブル基板１の縁からバリアフィルム８または９の縁までの寸法Ｅ２の和である。この表示パネルで、左額縁幅Ｂ１＋Ｅ１が右額縁幅Ｂ２＋Ｅ２より小さい場合、ある表示パネルの右額縁の上に、他の表示パネルの左額縁を重ねることにより、図１３Ｂのように大型表示エリア７内の非表示領域７Ｎの幅はＢ１＋Ｅ１になる。即ち、封止がない場合に比べて大型表示パネルの非表示領域７Ｎの幅がＥ１だけ広くなってしまう。 By the way, when the display medium 6 and the thin film transistor are affected by external moisture and oxygen, it is necessary to seal the moisture and oxygen. In the case of a flexible display, sealing is often performed using a barrier film. For example, in the case of the display panel of FIG. 13A, the left frame is the sum of the dimension B1 from the display area 2 to the edge of the flexible substrate 1 and the dimension E1 from the edge of the flexible substrate 1 to the edge of the barrier film 8 or 9. The right picture frame is the sum of the dimension B2 from the display area 2 to the edge of the flexible substrate 1 and the dimension E2 from the edge of the flexible substrate 1 to the edge of the barrier film 8 or 9. In this display panel, when the left frame width B1 + E1 is smaller than the right frame width B2 + E2, by overlapping the left frame of another display panel on the right frame of a certain display panel, as shown in FIG. The width of the non-display area 7N is B1 + E1. That is, the width of the non-display area 7N of the large display panel is increased by E1 as compared with the case without sealing.
　また、表示エリア２からフレキシブル基板１の縁までの寸法Ｂ１、Ｂ２は、ゲート配線３Ｇを細くかつ間隔を狭くするか、あるいは特許文献２に示すようにゲート配線３Ｇをソース配線３Ｓを引き出す辺と同じ辺に引出すことにより、狭くすることが可能である。このような方法を用いる場合、問題になるのはむしろ、フレキシブル基板１の縁からバリアフィルム８または９の縁までの寸法Ｅ１、Ｅ２である。 The dimensions B1 and B2 from the display area 2 to the edge of the flexible substrate 1 are such that the gate wiring 3G is narrowed and the interval is narrowed, or the gate wiring 3G is drawn out from the source wiring 3S as shown in Patent Document 2. It can be narrowed by pulling out to the same side. When such a method is used, the problem is rather the dimensions E1 and E2 from the edge of the flexible substrate 1 to the edge of the barrier film 8 or 9.
特開２０１６－０４７１１３号公報Japanese Patent Laid-Open No. 2016-047113 特開平１１－３０５６８１号公報Japanese Patent Laid-Open No. 11-305681
　上記のように各表示パネルの封止をパネルごとに行っている場合、表示エリア２からフレキシブル基板１の端までの幅Ｂ１だけでなく、フレキシブル基板１の端からバリアフィルム８または９の端までの長さＥ１の分も非表示領域７Ｎになるので、継ぎ目部分が無視できるほどに狭いとは言えなかった。 When each display panel is sealed for each panel as described above, not only the width B1 from the display area 2 to the end of the flexible substrate 1, but also from the end of the flexible substrate 1 to the end of the barrier film 8 or 9 Since the length E1 is also the non-display area 7N, it cannot be said that the joint portion is so narrow that it can be ignored.
　本発明は上記状況を鑑みなされたものであり、複数パネルの組み合わせで構成しても、継ぎ目の幅が狭く表示品質の高い大型表示パネルを提供することを目的とする。 The present invention has been made in view of the above situation, and an object of the present invention is to provide a large display panel having a narrow seam width and high display quality even when configured by combining a plurality of panels.
　上述の目的を達成するための本発明の一局面は、フレキシブル基板上の画素電極部分と対向基板上の対向電極との間に電気泳動体を挟み込んだ表示パネルを、複数組合せた大型表示パネルであって、複数の表示パネルから大型表示パネルの表示部が構成され、表示部は、全体が１枚の表バリアフィルムと１枚の裏バリアフィルムとで挟まれて封止されている、大型表示パネルである。 One aspect of the present invention for achieving the above object is a large display panel in which a plurality of display panels in which an electrophoretic body is sandwiched between a pixel electrode portion on a flexible substrate and a counter electrode on a counter substrate are combined. The large display panel is composed of a plurality of display panels, and the entire display unit is sandwiched between one front barrier film and one back barrier film and sealed. It is a panel.
　上記複数の表示パネルは、表示パネルの額縁の１辺上に、他の表示パネルの額縁の１辺を重ねるように組合せてもよい。 The plurality of display panels may be combined so that one side of the frame of another display panel is superimposed on one side of the frame of the display panel.
　上記複数の表示パネルの間に接着層を有してもよい。 An adhesive layer may be provided between the plurality of display panels.
　上記複数の表示パネルの裏面の一部にスペーサを有してもよい。 A spacer may be provided on a part of the back surface of the plurality of display panels.
　上記複数の表示パネルの表面の一部に透明スペーサを有してもよい。 A transparent spacer may be provided on a part of the surface of the plurality of display panels.
　上記表示部外側の４辺のうち、１辺または２辺から配線が引き出されており、配線が引き出された辺では、表バリアフィルムとフレキシブル基板の間、かつ対向基板および電気泳動体の外側がエッジシールで埋められ、それ以外の辺では、表バリアフィルムと裏バリアフィルムの間、かつ、対向基板・電気泳動体・フレキシブル基板の外側がエッジシールで埋められていてもよい。 Of the four sides outside the display section, wiring is drawn from one side or two sides, and the side from which the wiring is drawn is between the front barrier film and the flexible substrate and between the counter substrate and the electrophoresis body. It is filled with an edge seal, and on the other side, the outer side of the counter substrate, the electrophoretic body and the flexible substrate may be filled with an edge seal between the front barrier film and the back barrier film.
　上記表バリアフィルムと対向基板または透明スペーサの間に透明接着層を有してもよい。 A transparent adhesive layer may be provided between the front barrier film and the counter substrate or the transparent spacer.
　上記表示部外側の４辺のうち、１辺または２辺から配線が引き出されており、配線が引き出された辺では、表バリアフィルムとフレキシブル基板の表側、裏バリアフィルムとフレキシブル基板の裏側が接合し、それ以外の辺では、表バリアフィルムと裏バリアフィルムが接合していてもよい。 Of the four sides outside the display unit, wiring is drawn out from one or two sides, and at the side from which the wiring is drawn, the front barrier film and the front side of the flexible substrate, and the back barrier film and the back side of the flexible substrate are joined. And in the other side, the front barrier film and the back barrier film may be joined.
　上記配線が表バリアフィルムまたは裏バリアフィルムの縁と重なる部分では、フレキシブル基板同士が重なっていなくてもよい。 The flexible substrates do not have to overlap each other at the portion where the wiring overlaps the edge of the front barrier film or the back barrier film.
　上記裏バリアフィルムとフレキシブル基板またはスペーサの間にホットメルト接着剤を有してもよい。 A hot melt adhesive may be provided between the back barrier film and the flexible substrate or spacer.
　本発明の他の局面は、画素電極を有するフレキシブル基板を作製する工程と、対向基板の対向電極上に電気泳動体を有する部材を前記フレキシブル基板の画素電極上に貼り合わせる工程とによって、複数の表示パネルを作製する工程と、１枚の裏バリアフィルム上に複数の表示パネルを互いの額縁が近接するように並べて組み合わせる工程と、複数の表示パネルからなる表示部の全体の表面を覆うように１枚の表バリアフィルムを貼る工程と、を少なくとも有する、大型表示パネルの製造方法である。 Another aspect of the present invention includes a step of manufacturing a flexible substrate having a pixel electrode and a step of bonding a member having an electrophoretic body on the counter electrode of the counter substrate onto the pixel electrode of the flexible substrate. A process for producing a display panel, a process for arranging a plurality of display panels on a single back barrier film so that their frames are close to each other, and a method for covering the entire surface of the display unit composed of the plurality of display panels And a step of affixing one front barrier film. The method for manufacturing a large display panel.
　あるいは、画素電極を有するフレキシブル基板を作製する工程と、対向基板の対向電極上に電気泳動体を有する部材を前記フレキシブル基板の画素電極上に貼り合わせる工程とによって、複数の表示パネルを作製する工程と、表示パネルの額縁の１辺上に他の表示パネルの額縁の１辺を重ねるように組み合わせる工程と、複数の表示パネルからなる表示部の全体の表面を覆うように１枚の表バリアフィルムを貼る工程と、表示部の全体の裏面を覆うように１枚の裏バリアフィルムを貼る工程と、を少なくとも有する、大型表示パネルの製造方法である。 Alternatively, a step of manufacturing a plurality of display panels by a step of manufacturing a flexible substrate having a pixel electrode and a step of bonding a member having an electrophoretic body on the counter electrode of the counter substrate on the pixel electrode of the flexible substrate. And a step of combining so that one side of the frame of another display panel overlaps on one side of the frame of the display panel, and one surface barrier film so as to cover the entire surface of the display unit composed of a plurality of display panels Is a method for producing a large-sized display panel having at least a process of pasting and a process of pasting one back barrier film so as to cover the entire back surface of the display unit.
　組み合わせる工程において、複数の表示パネルを接着層を介して貼り合わせる工程を含んでもよい。 The combining step may include a step of bonding a plurality of display panels through an adhesive layer.
　表バリアフィルムを貼る工程の前に、各表示パネルの裏面の一部にスペーサを貼る工程をさらに含んでもよい。 Before the step of applying the front barrier film, a step of applying a spacer to a part of the back surface of each display panel may be further included.
　表バリアフィルムを貼る工程の前に、各表示パネルの表面の一部に透明スペーサを貼る工程をさらに含んでもよい。 Before the step of attaching the front barrier film, a step of attaching a transparent spacer to a part of the surface of each display panel may be further included.
　表バリアフィルムと裏バリアフィルムとをエッジシールする工程をさらに含んでもよい。 A step of edge-sealing the front barrier film and the back barrier film may be further included.
　表バリアフィルムを貼る工程は、ホットメルト接着剤を有する表バリアフィルムを熱ラミネートする工程であってもよい。 The step of applying the front barrier film may be a step of thermally laminating the front barrier film having a hot melt adhesive.
　裏バリアフィルムを貼る工程は、ホットメルト接着剤を有する裏バリアフィルムを熱ラミネートする工程であってもよい。 The step of applying the back barrier film may be a step of heat laminating the back barrier film having a hot melt adhesive.
　本発明によれば、複数の表示パネルを連結する事により、大きな表示を可能とする大型表示パネルにおいて、相互に隣接した表示エリアの間の非表示部、すなわち境界部の継ぎ目が認識されないようにすることができる。 According to the present invention, in a large display panel that enables a large display by connecting a plurality of display panels, a non-display portion between adjacent display areas, that is, a boundary seam is not recognized. can do.
図１は、本発明の一実施形態に係る大型表示パネルの構造を示す平面図および断面図である。FIG. 1 is a plan view and a cross-sectional view showing the structure of a large display panel according to an embodiment of the present invention. 図２Ａは、図１の大型表示パネルの製造工程を示す説明図である。FIG. 2A is an explanatory diagram illustrating a manufacturing process of the large display panel of FIG. 図２Ｂは、図１の大型表示パネルの製造工程を示す説明図である。FIG. 2B is an explanatory diagram illustrating a manufacturing process of the large display panel of FIG. 図２Ｃは、図１の大型表示パネルの製造工程を示す説明図である。FIG. 2C is an explanatory diagram illustrating a manufacturing process of the large display panel of FIG. 図２Ｄは、図１の大型表示パネルの製造工程を示す説明図である。FIG. 2D is an explanatory diagram illustrating a manufacturing process of the large display panel of FIG. 1. 図２Ｅは、図１の大型表示パネルの製造工程を示す説明図である。FIG. 2E is an explanatory diagram illustrating a manufacturing process of the large display panel of FIG. 図２Ｆは、図１の大型表示パネルの製造工程を示す説明図である。FIG. 2F is an explanatory diagram illustrating a manufacturing process of the large display panel of FIG. 1. 図３は、本発明の一実施形態に係る大型表示パネルの構造を示す平面図および断面図である。FIG. 3 is a plan view and a sectional view showing the structure of a large display panel according to an embodiment of the present invention. 図４Ａは、図３の大型表示パネルの製造工程を示す説明図である。FIG. 4A is an explanatory diagram showing a manufacturing process of the large display panel of FIG. 図４Ｂは、図３の大型表示パネルの製造工程を示す説明図である。FIG. 4B is an explanatory diagram illustrating a manufacturing process of the large display panel of FIG. 3. 図４Ｃは、図３の大型表示パネルの製造工程を示す説明図である。FIG. 4C is an explanatory diagram illustrating a manufacturing process of the large display panel of FIG. 図４Ｄは、図３の大型表示パネルの製造工程を示す説明図である。4D is an explanatory diagram illustrating a manufacturing process of the large display panel of FIG. 図４Ｅは、図３の大型表示パネルの製造工程を示す説明図である。FIG. 4E is an explanatory diagram illustrating a manufacturing process of the large display panel of FIG. 3. 図４Ｆは、図３の大型表示パネルの製造工程を示す説明図である。FIG. 4F is an explanatory diagram illustrating a manufacturing process of the large display panel of FIG. 3. 図４Ｇは、図３の大型表示パネルの製造工程を示す説明図である。FIG. 4G is an explanatory diagram showing a manufacturing process of the large display panel of FIG. 図５は、本発明の一実施形態に係る大型表示パネルの構造を示す平面図および断面図である。FIG. 5 is a plan view and a cross-sectional view showing the structure of a large display panel according to an embodiment of the present invention. 図６Ａは、図５の大型表示パネルの製造工程を示す説明図である。FIG. 6A is an explanatory diagram showing a manufacturing process of the large display panel of FIG. 図６Ｂは、図５の大型表示パネルの製造工程を示す説明図である。FIG. 6B is an explanatory diagram showing a manufacturing process of the large display panel of FIG. 図６Ｃは、図５の大型表示パネルの製造工程を示す説明図である。FIG. 6C is an explanatory diagram illustrating a manufacturing process of the large display panel of FIG. 図６Ｄは、図５の大型表示パネルの製造工程を示す説明図である。6D is an explanatory diagram illustrating a manufacturing process of the large display panel of FIG. 図６Ｅは、図５の大型表示パネルの製造工程を示す説明図である。FIG. 6E is an explanatory diagram showing a manufacturing process of the large display panel of FIG. 図６Ｆは、図５の大型表示パネルの製造工程を示す説明図である。FIG. 6F is an explanatory diagram illustrating a manufacturing process of the large display panel of FIG. 図６Ｇは、図５の大型表示パネルの製造工程を示す説明図である。FIG. 6G is an explanatory diagram showing a manufacturing process of the large display panel of FIG. 図７は、本発明の一実施形態に係る大型表示パネルの構造を示す平面図および断面図である。FIG. 7 is a plan view and a sectional view showing the structure of a large display panel according to an embodiment of the present invention. 図８は、本発明の一実施形態に係る大型表示パネルの構造を示す平面図および断面図である。FIG. 8 is a plan view and a cross-sectional view showing the structure of a large display panel according to an embodiment of the present invention. 図９は、本発明の一実施形態に係る大型表示パネルの構造を示す平面図および断面図である。FIG. 9 is a plan view and a sectional view showing the structure of a large display panel according to an embodiment of the present invention. 図１０Ａは、図９の大型表示パネルの製造工程を示す説明図である。FIG. 10A is an explanatory view showing a manufacturing process of the large display panel of FIG. 図１０Ｂは、図９の大型表示パネルの製造工程を示す説明図である。FIG. 10B is an explanatory diagram illustrating a manufacturing process of the large display panel of FIG. 9. 図１０Ｃは、図９の大型表示パネルの製造工程を示す説明図である。FIG. 10C is an explanatory view showing a manufacturing process of the large display panel of FIG. 図１０Ｄは、図９の大型表示パネルの製造工程を示す説明図である。FIG. 10D is an explanatory diagram showing a manufacturing process of the large display panel of FIG. 9. 図１０Ｅは、図９の大型表示パネルの製造工程を示す説明図である。FIG. 10E is an explanatory diagram illustrating a manufacturing process of the large display panel of FIG. 9. 図１１Ａは、従来の表示パネルの構造を示す平面図および断面図である。FIG. 11A is a plan view and a cross-sectional view showing the structure of a conventional display panel. 図１１Ｂは、従来の大型表示パネルの構造を示す平面図および断面図である。FIG. 11B is a plan view and a cross-sectional view showing the structure of a conventional large display panel. 図１２Ａは、従来の表示パネルの構造を示す平面図および断面図である。FIG. 12A is a plan view and a cross-sectional view showing the structure of a conventional display panel. 図１２Ｂは、従来の大型表示パネルの構造を示す平面図および断面図である。FIG. 12B is a plan view and a sectional view showing the structure of a conventional large display panel. 図１３Ａは、従来の表示パネルの構造を示す平面図および断面図である。FIG. 13A is a plan view and a cross-sectional view showing the structure of a conventional display panel. 図１３Ｂは、従来の大型表示パネルの構造を示す平面図および断面図である。FIG. 13B is a plan view and a cross-sectional view showing a structure of a conventional large display panel.
　以下、図面を参照して本発明の実施形態に係る大型表示パネルを詳しく説明する。ただし各図では、図を見やすくするために寸法を適宜変更しており、縮尺が一定ではない。 Hereinafter, a large display panel according to an embodiment of the present invention will be described in detail with reference to the drawings. However, in each figure, the dimensions are appropriately changed to make the figure easy to see, and the scale is not constant.
（第１の実施形態）
　図１は大型表示パネルの平面図、Ａ－Ａ’に沿った断面図、Ｂ－Ｂ’に沿った断面図、Ｃ－Ｃ’に沿った断面図である。この大型表示パネルは、複数の表示パネルを組合せてから、大型表示エリア全体を封止した構造を有する。具体的には、平面図とＡ－Ａ’断面図を見てわかるように、フレキシブル基板１と対向基板４の間に表示媒体６を挟み込み、表示エリア２を有する表示パネルを複数用い、ある表示パネルの額縁Ｂ２の上に、他の表示パネルの額縁Ｂ１を重ねるように組合せている。 (First embodiment)
FIG. 1 is a plan view of a large display panel, a sectional view along AA ′, a sectional view along BB ′, and a sectional view along CC ′. The large display panel has a structure in which the entire large display area is sealed after combining a plurality of display panels. Specifically, as can be seen from the plan view and the AA ′ sectional view, a display medium 6 is sandwiched between the flexible substrate 1 and the counter substrate 4, and a plurality of display panels having a display area 2 are used. The frame B1 of another display panel is combined on the frame B2 of the panel so as to overlap.
　なお、表示は、図２Ａに示すフレキシブル基板１上の画素電極２Ｐと、図１に示す対向基板４上の対向電極５に挟まれた表示媒体６に電圧が印加されることによって実現されるので、図２Ａの画素電極２Ｐがある部分が図１の表示エリア２となる。図２Ａの画素電極２Ｐを有するフレキシブル基板１としては、薄膜トランジスタアレイを有するアクティブマトリクス型であってもよいし、薄膜トランジスタを有しない直接接続型でもよい。いずれにおいても、給電するための配線３を有する。アクティブマトリクスの場合には、通常、ゲート配線とソース配線と対向電極配線３ＣＯＭとキャパシタ配線が、配線３に含まれる。直接接続型の場合には、各画素電極への配線と、対向電極配線３ＣＯＭが配線３に含まれる。対向電極配線３ＣＯＭは、対向電極５に接続されている。 The display is realized by applying a voltage to the display medium 6 sandwiched between the pixel electrode 2P on the flexible substrate 1 shown in FIG. 2A and the counter electrode 5 on the counter substrate 4 shown in FIG. A portion where the pixel electrode 2P of FIG. 2A is present becomes the display area 2 of FIG. The flexible substrate 1 having the pixel electrode 2P of FIG. 2A may be an active matrix type having a thin film transistor array or a direct connection type having no thin film transistor. In any case, a wiring 3 for supplying power is provided. In the case of the active matrix, the wiring 3 usually includes a gate wiring, a source wiring, a counter electrode wiring 3COM, and a capacitor wiring. In the case of the direct connection type, the wiring 3 includes a wiring to each pixel electrode and a counter electrode wiring 3COM. The counter electrode wiring 3 </ b> COM is connected to the counter electrode 5.
　そして図１のように、表示エリア２が連結されて形成される大型表示エリア７を含む表示部全体が表バリアフィルム８および裏バリアフィルム９で挟まれ、エッジシール１０で表示媒体６の周囲が封止されている。ここで大型表示パネルの表示部とは、複数の表示パネルの表示エリアとその間の非表示部からなる大型表示エリア（２次元）を範囲とした、３次元積層構造であり、対向基板４／対向電極５／表示媒体６／画素電極２Ｐ／フレキシブル基板１の一部からなっている。表バリアフィルム８と対向基板４の間には、透明接着層１２を有していてもよい。裏バリアフィルム９とフレキシブル基板１の間には、ホットメルト接着剤１４を有している。エッジシール１０は、表バリアフィルム８と裏バリアフィルム９の間、かつ、対向基板４・表示媒体６・フレキシブル基板１の周囲に形成されている。 As shown in FIG. 1, the entire display unit including the large display area 7 formed by connecting the display areas 2 is sandwiched between the front barrier film 8 and the back barrier film 9, and the periphery of the display medium 6 is surrounded by the edge seal 10. It is sealed. Here, the display unit of the large display panel is a three-dimensional stacked structure in which a large display area (two-dimensional) including a display area of a plurality of display panels and a non-display unit therebetween is a range, and the counter substrate 4 / It consists of a part of electrode 5 / display medium 6 / pixel electrode 2P / flexible substrate 1. A transparent adhesive layer 12 may be provided between the front barrier film 8 and the counter substrate 4. A hot-melt adhesive 14 is provided between the back barrier film 9 and the flexible substrate 1. The edge seal 10 is formed between the front barrier film 8 and the back barrier film 9 and around the counter substrate 4, the display medium 6, and the flexible substrate 1.
　また、図１の平面図とＣ－Ｃ’断面図を見てわかるように、図２Ａに示す配線３は図１の表示パネルの下方向に引き出されており、この方向のみはフレキシブル基板１がエッジシール１０の外に伸びている。エッジシール１０は、表バリアフィルム８とフレキシブル基板１の間、かつ、対向基板４・表示媒体６の周囲の領域に形成されている。裏バリアフィルム９とフレキシブル基板１の間は、ホットメルト接着剤１４で接着されている。 Further, as can be seen from the plan view of FIG. 1 and the CC ′ cross-sectional view, the wiring 3 shown in FIG. 2A is drawn downward from the display panel of FIG. It extends outside the edge seal 10. The edge seal 10 is formed between the front barrier film 8 and the flexible substrate 1 and in a region around the counter substrate 4 and the display medium 6. The back barrier film 9 and the flexible substrate 1 are bonded with a hot melt adhesive 14.
　さらに、図１の平面図とＢ－Ｂ’断面図を見てわかるように、フレキシブル基板１が表バリアフィルム８の縁または裏バリアフィルム９の縁と重なる部分では、フレキシブル基板１同士が重なりを持たないようになっている。この部分のフレキシブル基板１同士が重なりを持つ場合に比べて表バリアフィルム８と裏バリアフィルム９の間隔を狭くすることができ、配線３を引き出す部分の封止が容易になる。表バリアフィルム８とフレキシブル基板１の間、および表バリアフィルム８と裏バリアフィルム９の間は、エッジシール１０で封止されている。 Further, as can be seen from the plan view of FIG. 1 and the BB ′ cross-sectional view, the flexible substrates 1 overlap each other at the portion where the flexible substrate 1 overlaps the edge of the front barrier film 8 or the edge of the back barrier film 9. It is not to have. Compared with the case where the flexible substrates 1 in this portion overlap each other, the distance between the front barrier film 8 and the back barrier film 9 can be narrowed, and the portion where the wiring 3 is drawn out can be easily sealed. An edge seal 10 seals between the front barrier film 8 and the flexible substrate 1 and between the front barrier film 8 and the back barrier film 9.
　なお、広い額縁Ｂ１の上に狭い額縁Ｂ２を重ねる方が望ましいが、Ｂ２の上にＢ１を重ねてもよい。 Although it is desirable to overlap the narrow frame B2 on the wide frame B1, B1 may be stacked on B2.
　また、図１には記していないが、フレキシブル基板１上の配線３にはテープキャリアパッケージ（ＴＣＰ）またはチップオンフィルム（ＣＯＦ）等が異方導電膜（ＡＣＦ）等によって接続され、ＴＣＰやＣＯＦがフレキシブルプリント基板（ＦＰＣ）等に接続され、ＦＰＣ等が駆動装置に接続される。あるいは、フレキシブル基板１上の配線３に、ベアチップがＡＣＦ等によって実装され、さらに配線３のうち画素電極２Ｐに接続されずベアチップの入力端子に接続された分にＦＰＣ等が接続され、ＦＰＣ等が駆動装置に接続される。 Although not shown in FIG. 1, a tape carrier package (TCP) or a chip-on film (COF) is connected to the wiring 3 on the flexible substrate 1 by an anisotropic conductive film (ACF) or the like. Are connected to a flexible printed circuit board (FPC) or the like, and the FPC or the like is connected to the driving device. Alternatively, a bare chip is mounted on the wiring 3 on the flexible substrate 1 by ACF or the like, and further, FPC or the like is connected to the wiring 3 that is not connected to the pixel electrode 2P but connected to the input terminal of the bare chip. Connected to the driving device.
　表バリアフィルム８や裏バリアフィルム９の外のフレキシブル基板１や、フレキシブル基板１に接続されたＴＣＰ、ＣＯＦ、ＦＰＣ等の部分を、ある曲率半径で折り曲げることが可能である。折り曲げることにより、配線～駆動装置を表示側から見えにくくすることができ、例えば電子棚札等、横長の大型表示パネルとして用いることができる。 It is possible to bend the flexible substrate 1 outside the front barrier film 8 and the back barrier film 9 and portions such as TCP, COF, and FPC connected to the flexible substrate 1 with a certain radius of curvature. By bending, it is possible to make the wiring to the driving device difficult to see from the display side, and for example, it can be used as a horizontally long large display panel such as an electronic shelf label.
　さらに機械強度向上や、装飾性向上のため、大型パネル全体が筐体に組み込まれていてもよい（図示せず）。 Furthermore, the entire large panel may be incorporated in the housing (not shown) for improving mechanical strength and decorativeness.
　図１の大型表示パネルの製造方法の一例を、図２Ａ～図２Ｆに示す。まず図２Ａのように、フレキシブル基板１上に、画素電極２Ｐに直接接続された配線３と、対向電極配線３ＣＯＭを形成する。あるいは、画素電極２Ｐを有する薄膜トランジスタアレイを形成する。薄膜トランジスタアレイの場合、配線３は、ゲート配線、ソース配線、対向電極配線３ＣＯＭ、キャパシタ配線を有する。 An example of a method for manufacturing the large display panel of FIG. 1 is shown in FIGS. 2A to 2F. First, as shown in FIG. 2A, the wiring 3 directly connected to the pixel electrode 2P and the counter electrode wiring 3COM are formed on the flexible substrate 1. Alternatively, a thin film transistor array having the pixel electrode 2P is formed. In the case of the thin film transistor array, the wiring 3 includes a gate wiring, a source wiring, a counter electrode wiring 3COM, and a capacitor wiring.
　配線３は、図面の下方向に引き出すように形成されている。フレキシブル基板１としては、ポリエチレンテレフタレート（ＰＥＴ）、ポリエチレンナフタレート（ＰＥＮ）、ポリエーテルスルホン（ＰＥＳ）、ポリイミド（ＰＩ）、ポリエーテルイミド（ＰＥＩ）、ナイロン（Ｎｙ）等を好適に用いることができる。また、フレキシブル基板１をフィルム基板として用いる以外に、別途用意したガラス基板に貼り付けて工程を流し、途中の工程で剥離してフィルム化してもよい。ガラス基板に貼り付ける媒介としては、加熱または冷却によって粘着性を失うフィルムが好適に用いられる。 The wiring 3 is formed so as to be drawn downward in the drawing. As the flexible substrate 1, polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (PES), polyimide (PI), polyetherimide (PEI), nylon (Ny), or the like can be suitably used. . In addition to using the flexible substrate 1 as a film substrate, it may be attached to a separately prepared glass substrate to flow the process, and the film may be peeled off during the process. As a medium to be attached to the glass substrate, a film that loses its adhesiveness by heating or cooling is preferably used.
　直接接続型の場合、画素電極２Ｐおよび配線３としてはＡｇ、Ａｕ、Ｐｔ、Ｐｄ、Ｃｕ等の金属や、Ｃペースト、Ａｇペースト等のインクが好適である。配線部分をエポキシ、アクリル等の有機絶縁膜で覆うのが好ましい。画素電極２Ｐを配線３と同時に形成してもよいし、有機絶縁膜の開口を介して配線３に接続されるように画素電極２Ｐが別層であってもよい。アクティブマトリクス型の場合、ゲート配線およびそれに接続されたゲート電極、キャパシタ配線およびそれに接続されたキャパシタ電極としては、Ａｇ、Ａｕ、Ｐｔ、Ｐｄ、Ｃｕ等の金属を好適に用いることができる。ゲート絶縁膜としては、エポキシ、アクリル等の有機絶縁膜を好適に用いることができる。ソース配線およびそれに接続されたソース電極、下部画素電極およびそれに接続されたドレイン電極、対向電極配線３ＣＯＭとしては、Ａｇ、Ａｕ、Ｐｔ、Ｐｄ、Ｃｕ等の金属を好適に用いることができる。下部画素電極／ゲート絶縁膜／キャパシタ電極が、蓄積容量をなす。蓄積容量は、電荷を蓄積して画素電位を保持するための部分である。ソース電極とドレイン電極の間に形成する半導体層としては、有機半導体や酸化物半導体が好適である。半導体層の上を、保護層が覆ってもよく、保護層としてはフッ素化樹脂が好適である。さらに、下部画素電極上に開口を有する層間絶縁膜と、該開口を介して下部画素電極に接続された画素電極を有する。層間絶縁膜は、エポキシ、アクリル等の有機絶縁膜が好適である。画素電極としては、Ａｇペースト等が好適である。 In the case of the direct connection type, as the pixel electrode 2P and the wiring 3, a metal such as Ag, Au, Pt, Pd, or Cu, or an ink such as C paste or Ag paste is suitable. The wiring part is preferably covered with an organic insulating film such as epoxy or acrylic. The pixel electrode 2P may be formed simultaneously with the wiring 3, or the pixel electrode 2P may be a separate layer so as to be connected to the wiring 3 through the opening of the organic insulating film. In the case of the active matrix type, metals such as Ag, Au, Pt, Pd, and Cu can be suitably used as the gate wiring and the gate electrode connected thereto, the capacitor wiring and the capacitor electrode connected thereto. As the gate insulating film, an organic insulating film such as epoxy or acrylic can be suitably used. As the source wiring and the source electrode connected thereto, the lower pixel electrode and the drain electrode connected thereto, and the counter electrode wiring 3COM, metals such as Ag, Au, Pt, Pd, and Cu can be suitably used. The lower pixel electrode / gate insulating film / capacitor electrode forms a storage capacitor. The storage capacitor is a part for accumulating charges and holding the pixel potential. As the semiconductor layer formed between the source electrode and the drain electrode, an organic semiconductor or an oxide semiconductor is preferable. A protective layer may cover the semiconductor layer, and a fluorinated resin is suitable as the protective layer. Furthermore, an interlayer insulating film having an opening on the lower pixel electrode and a pixel electrode connected to the lower pixel electrode through the opening are provided. The interlayer insulating film is preferably an organic insulating film such as epoxy or acrylic. As the pixel electrode, an Ag paste or the like is suitable.
　次に、図２Ｂのように、対向基板４上に対向電極５および表示媒体６を有する前面板の表示媒体６側を、前記画素電極２Ｐ上に貼り合わせる。これにより、図２Ａに示す複数の画素電極２Ｐを有する領域全体が図２Ｂに示す表示エリア２となる。またこの時、あらかじめ表示媒体６の一部を除去し、図１のＡ－Ａ’断面に示す接続部材１５（導電ペーストや導電ゴム等）を付けておくことで、対向電極配線３ＣＯＭと対向電極５とを電気的に接続する。対向基板４としては、ＰＥＴ、ＰＥＮ、ＰＥＳ、ＰＩ、ＰＥＩ、Ｎｙ等を好適に用いることができる。対向電極５には、ＩＴＯ等の透明導電膜が好適である。表示媒体６としては、電気泳動体が好適である。互いに逆極性に帯電した白粒子と黒粒子をマイクロカプセルに入れたものや、異なる帯電状態の白粒子・黒粒子・赤粒子をマイクロカップに入れたものなど、様々な方式の電気泳動体を使用することができる。対向基板４の表面には、あらかじめ、透明接着層１２を付けておく。 Next, as shown in FIG. 2B, the display medium 6 side of the front plate having the counter electrode 5 and the display medium 6 on the counter substrate 4 is bonded onto the pixel electrode 2P. Thereby, the entire region having the plurality of pixel electrodes 2P shown in FIG. 2A becomes the display area 2 shown in FIG. 2B. At this time, a part of the display medium 6 is removed in advance and a connecting member 15 (conductive paste, conductive rubber, etc.) shown in the AA ′ cross section of FIG. 5 is electrically connected. As the counter substrate 4, PET, PEN, PES, PI, PEI, Ny, or the like can be suitably used. A transparent conductive film such as ITO is suitable for the counter electrode 5. The display medium 6 is preferably an electrophoretic body. Various types of electrophores are used, such as those in which white and black particles charged in opposite polarities are placed in microcapsules, and those in which differently charged white, black, and red particles are placed in microcups can do. A transparent adhesive layer 12 is attached to the surface of the counter substrate 4 in advance.
　次に、図２Ｃのように、表示パネルを複数個重ねて並べる。さらに、図２Ｄのように、複数の表示エリア２と表示エリア２間の非表示部７Ｎからなる大型表示エリア７を含む表示部の全体を覆うように、表バリアフィルム８をラミネートする。そして、図２Ｅのように、ホットメルト接着剤１４付きの裏バリアフィルム９を表示部の裏面に熱ラミネートする。透明接着剤１２としては、単層の接着剤あるいは粘着剤層や、アクリルフィルムを基材とした両面テープが好適である。表バリアフィルム８としては、透明性が必要なので、ＰＥＴフィルム上にＳｉＯ２やＡｌ２Ｏ３等の無機膜を成膜したものが好適である。裏バリアフィルム９としては、透明である必要はなくＰＥＴフィルム上にＡｌを成膜したものが好適であるが、ＳｉＯ２やＡｌ２Ｏ３等の無機膜を成膜したものでもよい。ホットメルト接着剤１４としては、エチレン酢酸ビニル等の熱可塑性樹脂が好適である。 Next, as shown in FIG. 2C, a plurality of display panels are stacked and arranged. Further, as shown in FIG. 2D, the front barrier film 8 is laminated so as to cover the entire display unit including the large display area 7 including the plurality of display areas 2 and the non-display unit 7N between the display areas 2. Then, as shown in FIG. 2E, the back barrier film 9 with the hot melt adhesive 14 is thermally laminated on the back surface of the display unit. As the transparent adhesive 12, a single-layer adhesive or pressure-sensitive adhesive layer and a double-sided tape based on an acrylic film are suitable. Since the surface barrier film 8 requires transparency, a film obtained by forming an inorganic film such as SiO 2 or Al 2 O 3 on a PET film is preferable. The back barrier film 9 does not need to be transparent and is preferably formed by depositing Al on a PET film, but may be formed by depositing an inorganic film such as SiO 2 or Al 2 O 3 . As the hot melt adhesive 14, a thermoplastic resin such as ethylene vinyl acetate is suitable.
　さらに、図２Ｆのように、表バリアフィルム８の周囲に、エッジシール１０の材料を塗布する。エッジシール材は、表バリアフィルム８と裏バリアフィルム９の間、または表バリアフィルム８とフレキシブル基板１の間に浸入し、表示媒体６の周囲を覆う。この状態で、熱または光でエッジシール１０を硬化させる。エッジシール１０としては、シリコーン、エポキシ、アクリル、ウレタン等の、熱または光硬化性樹脂が好適である。エッジシール１０の材料中には、シリカ等の無機微粒子が混合されていてもよい。なお、エッジシール１０を塗布する前に、裏バリアフィルム９のうちエッジシール１０を付ける予定部分のホットメルト接着剤１４を溶剤等で除去してもよいし、ホットメルト接着剤１４を機械的に削ってもよい。あるいは、最初から裏バリアフィルム９のうち、エッジシール１０が接触する予定の部分にはホットメルト接着剤１４が付いていないものを用いてもよい。このようにして、図１の大型表示パネルが得られる。 Further, as shown in FIG. 2F, the material of the edge seal 10 is applied around the front barrier film 8. The edge seal material penetrates between the front barrier film 8 and the back barrier film 9 or between the front barrier film 8 and the flexible substrate 1 and covers the periphery of the display medium 6. In this state, the edge seal 10 is cured with heat or light. As the edge seal 10, a heat or photo-curing resin such as silicone, epoxy, acrylic, urethane, or the like is suitable. In the material of the edge seal 10, inorganic fine particles such as silica may be mixed. Before applying the edge seal 10, the hot-melt adhesive 14 in the portion of the back barrier film 9 where the edge seal 10 is to be attached may be removed with a solvent or the like, or the hot-melt adhesive 14 may be mechanically removed. You may sharpen. Or you may use what does not have the hot-melt-adhesive 14 in the part which the edge seal 10 is going to contact among the back barrier films 9 from the beginning. In this way, the large display panel of FIG. 1 is obtained.
　図示しないが、この後、配線３にＴＣＰやＣＯＦ等を接続し、さらにＴＣＰやＣＯＦ等にＦＰＣを接続し、ＦＰＣを駆動装置に接続して駆動を行うことができる。あるいは、フレキシブル基板１の配線３上に、駆動用ＩＣを直接実装してもよい。あるいは、ＣＯＦやＦＰＣ等の接続や、駆動用ＩＣの実装を、図２Ａ～図２Ｆに示す工程の間のどこかで行ってもよい。また、表バリアフィルム８をラミネートする工程と、裏バリアフィルム９をラミネートする工程とは、逆の順序で行ってもよい。 Although not shown in the figure, after that, TCP, COF, or the like can be connected to the wiring 3, and further, FPC can be connected to TCP, COF, etc., and the FPC can be connected to a driving device for driving. Alternatively, the driving IC may be directly mounted on the wiring 3 of the flexible substrate 1. Alternatively, connection of COF, FPC, etc., and mounting of the driving IC may be performed somewhere during the steps shown in FIGS. 2A to 2F. Further, the step of laminating the front barrier film 8 and the step of laminating the back barrier film 9 may be performed in the reverse order.
（第２の実施形態）
　図３は大型表示パネルの平面図、Ｄ－Ｄ’に沿った断面図、Ｅ－Ｅ’に沿った断面図、Ｆ－Ｆ’に沿った断面図である。この大型表示パネルは、複数の表示パネルを組合せてから、大型表示エリア全体を封止した構造を有する。具体的には、平面図とＤ－Ｄ’断面図を見てわかるように、フレキシブル基板１と対向基板４の間に表示媒体６を挟み込み、表示エリア２を有する表示パネルを複数用い、ある表示パネルの額縁Ｂ２の上に、他の表示パネルの額縁Ｂ１を重ねるように組合せている。 (Second Embodiment)
FIG. 3 is a plan view of the large display panel, a cross-sectional view along DD ′, a cross-sectional view along EE ′, and a cross-sectional view along FF ′. The large display panel has a structure in which the entire large display area is sealed after combining a plurality of display panels. Specifically, as can be seen from the plan view and the DD ′ cross-sectional view, a display medium 6 is sandwiched between the flexible substrate 1 and the counter substrate 4, and a plurality of display panels having the display area 2 are used. The frame B1 of another display panel is combined on the frame B2 of the panel so as to overlap.
　なお、表示は、図４Ａに示すフレキシブル基板１上の画素電極２Ｐと、図３に示す対向基板４上の対向電極５に挟まれた表示媒体６に電圧が印加されることによって実現されるので、図４Ａの複数の画素電極２Ｐを有する領域が図３の表示エリア２となる。図４Ａの画素電極２Ｐを有するフレキシブル基板１としては、薄膜トランジスタアレイを有するアクティブマトリクス型であってもよいし、薄膜トランジスタを有しない直接接続型でもよい。いずれにおいても、給電するための配線３を有する。アクティブマトリクスの場合には、通常、ゲート配線３Ｇとソース配線３Ｓと対向電極配線３ＣＯＭとキャパシタ配線３Ｃが、配線３に含まれる。直接接続型の場合には、各画素電極への配線と、対向電極配線３ＣＯＭが配線３に含まれる。対向電極配線３ＣＯＭは、対向電極５に接続されている。 The display is realized by applying a voltage to the display medium 6 sandwiched between the pixel electrode 2P on the flexible substrate 1 shown in FIG. 4A and the counter electrode 5 on the counter substrate 4 shown in FIG. The area having the plurality of pixel electrodes 2P in FIG. 4A is the display area 2 in FIG. The flexible substrate 1 having the pixel electrode 2P of FIG. 4A may be an active matrix type having a thin film transistor array or a direct connection type not having a thin film transistor. In any case, a wiring 3 for supplying power is provided. In the case of an active matrix, the wiring 3 usually includes the gate wiring 3G, the source wiring 3S, the counter electrode wiring 3COM, and the capacitor wiring 3C. In the case of the direct connection type, the wiring 3 includes a wiring to each pixel electrode and a counter electrode wiring 3COM. The counter electrode wiring 3 </ b> COM is connected to the counter electrode 5.
　図３のように表示パネルと表示パネルの間に接着層１１を有してもよい。接着層１１は、表示パネル同士を組み合わせた後で、位置関係がずれることを防止する効果がある。さらに、各表示パネルの裏面のうち他の表示パネルと重ならない部分に、スペーサ１３を有してもよい。スペーサ１３は、対向基板４の上面の高さを揃える効果がある。対向基板４の上面を揃えることで、表バリアフィルム８の平面性を向上させることができる。これによって、大型表示パネルの視認性を良好に保つことができる。また、表バリアフィルム８にかかる応力が低減され、表バリアフィルム８の封止性能を良好に保つことができる。 As shown in FIG. 3, an adhesive layer 11 may be provided between the display panel. The adhesive layer 11 has an effect of preventing the positional relationship from shifting after the display panels are combined. Furthermore, you may have the spacer 13 in the part which does not overlap with another display panel among the back surfaces of each display panel. The spacer 13 has the effect of aligning the height of the upper surface of the counter substrate 4. By aligning the upper surface of the counter substrate 4, the planarity of the front barrier film 8 can be improved. Thereby, the visibility of the large display panel can be kept good. Moreover, the stress concerning the front barrier film 8 is reduced, and the sealing performance of the front barrier film 8 can be kept good.
　そして、表示エリア２が連結されて形成される大型表示エリア７を含む表示部全体が表バリアフィルム８および裏バリアフィルム９で挟まれている。表バリアフィルム８と対向基板４の間には、ホットメルト接着剤１４を有している。裏バリアフィルム９とフレキシブル基板１の間にも、ホットメルト接着剤１４を有している。表バリアフィルム８と裏バリアフィルム９は、対向基板４・表示媒体６・フレキシブル基板１の周囲で、ホットメルト接着剤１４によって接合されている。 The entire display unit including the large display area 7 formed by connecting the display areas 2 is sandwiched between the front barrier film 8 and the back barrier film 9. A hot melt adhesive 14 is provided between the front barrier film 8 and the counter substrate 4. A hot melt adhesive 14 is also provided between the back barrier film 9 and the flexible substrate 1. The front barrier film 8 and the back barrier film 9 are joined together by a hot melt adhesive 14 around the counter substrate 4, the display medium 6, and the flexible substrate 1.
　また、図３の平面図とＦ－Ｆ’断面図を見てわかるように、図４Ａに示す配線３は図３の表示パネルの下方向に引き出されており、この方向のみはフレキシブル基板１が表バリアフィルム８や裏バリアフィルム９の外に伸びている。表バリアフィルム８とフレキシブル基板１の間、および、裏バリアフィルム９とフレキシブル基板１の間は、ホットメルト接着剤１４で接着されている。 Further, as can be seen from the plan view of FIG. 3 and the FF ′ cross-sectional view, the wiring 3 shown in FIG. 4A is drawn downward from the display panel of FIG. It extends outside the front barrier film 8 and the back barrier film 9. The front barrier film 8 and the flexible substrate 1 and the back barrier film 9 and the flexible substrate 1 are bonded with a hot melt adhesive 14.
　さらに、図３の平面図とＥ－Ｅ’断面図を見てわかるように、フレキシブル基板１が表バリアフィルム８の縁または裏バリアフィルム９の縁と重なる部分では、フレキシブル基板１同士が重なりを持たないようになっている。この部分のフレキシブル基板１同士が重なりを持つ場合に比べて表バリアフィルム８と裏バリアフィルム９の間隔を狭くすることができ、配線３を引き出す部分の封止が容易になる。表バリアフィルム８の縁と裏バリアフィルム９の縁とフレキシブル基板１の接する部分をも、隙間なくホットメルト接着剤１４で埋められている。 Further, as can be seen from the plan view of FIG. 3 and the EE ′ cross-sectional view, the flexible substrates 1 overlap each other at the portion where the flexible substrate 1 overlaps the edge of the front barrier film 8 or the edge of the back barrier film 9. It is not to have. Compared with the case where the flexible substrates 1 in this portion overlap each other, the distance between the front barrier film 8 and the back barrier film 9 can be narrowed, and the portion where the wiring 3 is drawn out can be easily sealed. A portion where the edge of the front barrier film 8, the edge of the back barrier film 9 and the flexible substrate 1 are in contact with each other is also filled with the hot melt adhesive 14 without a gap.
　なお、広い額縁Ｂ１の上に狭い額縁Ｂ２を重ねる方が望ましいが、Ｂ２の上にＢ１を重ねてもよい。 Although it is desirable to overlap the narrow frame B2 on the wide frame B1, B1 may be stacked on B2.
　また、図３には記していないが、フレキシブル基板１上の配線３にはテープキャリアパッケージ（ＴＣＰ）またはチップオンフィルム（ＣＯＦ）等が異方導電膜（ＡＣＦ）等によって接続され、ＴＣＰやＣＯＦがフレキシブルプリント基板（ＦＰＣ）等に接続され、ＦＰＣ等が駆動装置に接続される。あるいは、フレキシブル基板１上の配線３に、ベアチップがＡＣＦ等によって実装され、さらに配線３のうち画素電極２Ｐに接続されずベアチップの入力端子に接続された分にＦＰＣ等が接続され、ＦＰＣ等が駆動装置に接続される。 Although not shown in FIG. 3, a tape carrier package (TCP) or a chip-on-film (COF) is connected to the wiring 3 on the flexible substrate 1 by an anisotropic conductive film (ACF) or the like. Are connected to a flexible printed circuit board (FPC) or the like, and the FPC or the like is connected to the driving device. Alternatively, a bare chip is mounted on the wiring 3 on the flexible substrate 1 by ACF or the like, and further, FPC or the like is connected to the wiring 3 that is not connected to the pixel electrode 2P but connected to the input terminal of the bare chip. Connected to the driving device.
　表バリアフィルム８や裏バリアフィルム９の外のフレキシブル基板１や、フレキシブル基板１に接続されたＴＣＰ、ＣＯＦ、ＦＰＣ等の部分を、ある曲率半径で折り曲げることが可能である。折り曲げることにより、配線～駆動装置を表示側から見にくくすることができ、例えば電子棚札等、横長の大型表示パネルとして用いることができる。 It is possible to bend the flexible substrate 1 outside the front barrier film 8 and the back barrier film 9 and portions such as TCP, COF, and FPC connected to the flexible substrate 1 with a certain radius of curvature. By bending, it is possible to make the wiring to the driving device difficult to see from the display side, and for example, it can be used as a horizontally large display panel such as an electronic shelf label.
　さらに機械強度向上や、装飾性向上のため、大型パネル全体が筐体に組み込まれていてもよい（図示せず）。 Furthermore, the entire large panel may be incorporated in the housing (not shown) for improving mechanical strength and decorativeness.
　図３の大型表示パネルの製造方法の一例を、図４Ａ～図４Ｇに示す。まず図４Ａのように、フレキシブル基板１上に、画素電極２Ｐを有する薄膜トランジスタアレイを形成する。薄膜トランジスタアレイ（画素電極２Ｐ以外は図示を省略）の配線３は、ゲート配線３Ｇ、ソース配線３Ｓ、対向電極配線３ＣＯＭ、キャパシタ配線３Ｃを有する。あるいは、薄膜トランジスタを有せず、各画素電極２Ｐに直接接続された配線３と、対向電極配線３ＣＯＭを有してもよい。 An example of a method for manufacturing the large display panel of FIG. 3 is shown in FIGS. 4A to 4G. First, as shown in FIG. 4A, a thin film transistor array having pixel electrodes 2 </ b> P is formed on the flexible substrate 1. The wiring 3 of the thin film transistor array (not shown except for the pixel electrode 2P) includes a gate wiring 3G, a source wiring 3S, a counter electrode wiring 3COM, and a capacitor wiring 3C. Or you may have the wiring 3 directly connected to each pixel electrode 2P, and the counter electrode wiring 3COM, without having a thin-film transistor.
　配線３は、図面の下方向に引き出すように形成されている。フレキシブル基板１としては、ポリエチレンテレフタレート（ＰＥＴ）、ポリエチレンナフタレート（ＰＥＮ）、ポリエーテルスルホン（ＰＥＳ）、ポリイミド（ＰＩ）、ポリエーテルイミド（ＰＥＩ）、ナイロン（Ｎｙ）等を好適に用いることができる。また、フレキシブル基板１をフィルム基板として用いる以外に、別途用意したガラス基板に貼り付けて工程を流し、途中の工程で剥離してフィルム化してもよい。ガラス基板に貼り付ける媒介としては、加熱または冷却によって粘着性を失うフィルムが好適に用いられる。 The wiring 3 is formed so as to be drawn downward in the drawing. As the flexible substrate 1, polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (PES), polyimide (PI), polyetherimide (PEI), nylon (Ny), or the like can be suitably used. . In addition to using the flexible substrate 1 as a film substrate, it may be attached to a separately prepared glass substrate to flow the process, and the film may be peeled off during the process. As a medium to be attached to the glass substrate, a film that loses its adhesiveness by heating or cooling is preferably used.
　アクティブマトリクス型の場合、ゲート配線３Ｇおよびそれに接続されたゲート電極、キャパシタ配線３Ｃおよびそれに接続されたキャパシタ電極としては、Ａｇ、Ａｕ、Ｐｔ、Ｐｄ、Ｃｕ等の金属を好適に用いることができる。ゲート絶縁膜としては、エポキシ、アクリル等の有機絶縁膜を好適に用いることができる。ソース配線３Ｓおよびそれに接続されたソース電極、下部画素電極およびそれに接続されたドレイン電極、対向電極配線３ＣＯＭとしては、Ａｇ、Ａｕ、Ｐｔ、Ｐｄ、Ｃｕ等の金属を好適に用いることができる。下部画素電極／ゲート絶縁膜／キャパシタ電極が、蓄積容量をなす。ソース電極とドレイン電極の間に形成する半導体層としては、有機半導体や酸化物半導体が好適である。半導体層の上を、保護層が覆ってもよく、保護層としてはフッ素化樹脂が好適である。さらに、下部画素電極上に開口を有する層間絶縁膜と、該開口を介して下部画素電極に接続された画素電極を有する。層間絶縁膜は、エポキシ、アクリル等の有機絶縁膜が好適である。画素電極としては、Ａｇペースト等が好適である。直接接続型の場合、画素電極２Ｐおよび配線３としてはＡｇ、Ａｕ、Ｐｔ、Ｐｄ、Ｃｕ等の金属や、Ｃペースト、Ａｇペースト等のインクが好適である。配線部分をエポキシ、アクリル等の有機絶縁膜で覆うのが好ましい。画素電極２Ｐを配線３と同時に形成してもよいし、有機絶縁膜の開口を介して配線３に接続されるように画素電極２Ｐが別層であってもよい。 In the case of the active matrix type, metals such as Ag, Au, Pt, Pd, and Cu can be suitably used as the gate wiring 3G and the gate electrode connected thereto, the capacitor wiring 3C and the capacitor electrode connected thereto. As the gate insulating film, an organic insulating film such as epoxy or acrylic can be suitably used. As the source wiring 3S and the source electrode connected thereto, the lower pixel electrode, the drain electrode connected thereto, and the counter electrode wiring 3COM, metals such as Ag, Au, Pt, Pd, and Cu can be suitably used. The lower pixel electrode / gate insulating film / capacitor electrode forms a storage capacitor. As the semiconductor layer formed between the source electrode and the drain electrode, an organic semiconductor or an oxide semiconductor is preferable. A protective layer may cover the semiconductor layer, and a fluorinated resin is suitable as the protective layer. Furthermore, an interlayer insulating film having an opening on the lower pixel electrode and a pixel electrode connected to the lower pixel electrode through the opening are provided. The interlayer insulating film is preferably an organic insulating film such as epoxy or acrylic. As the pixel electrode, an Ag paste or the like is suitable. In the case of the direct connection type, as the pixel electrode 2P and the wiring 3, a metal such as Ag, Au, Pt, Pd, or Cu, or an ink such as C paste or Ag paste is suitable. The wiring part is preferably covered with an organic insulating film such as epoxy or acrylic. The pixel electrode 2P may be formed simultaneously with the wiring 3, or the pixel electrode 2P may be a separate layer so as to be connected to the wiring 3 through the opening of the organic insulating film.
　次に、図４Ｂのように、対向基板４上に対向電極５および表示媒体６を有する前面板の表示媒体６側を、前記画素電極２Ｐ上に貼り合わせる。これにより、図４Ａに示す画素電極２Ｐの領域が図４Ｂに示す表示エリア２となる。またこの時、あらかじめ表示媒体６の一部を除去し、図３のＤ－Ｄ’断面に示す接続部材１５（導電ペーストや導電ゴム等）を付けておくことで、対向電極配線３ＣＯＭと対向電極５とを電気的に接続する。対向基板４としては、ＰＥＴ、ＰＥＮ、ＰＥＳ、ＰＩ、ＰＥＩ、Ｎｙ等を好適に用いることができる。対向電極５には、ＩＴＯ等の透明導電膜が好適である。表示媒体６としては、電気泳動体が好適である。逆極性に帯電した白粒子と黒粒子をマイクロカプセルに入れたものや、異なる帯電状態の白粒子・黒粒子・赤粒子をマイクロカップに入れたものなど、様々な方式の電気泳動体を使用することができる。 Next, as shown in FIG. 4B, the display medium 6 side of the front plate having the counter electrode 5 and the display medium 6 on the counter substrate 4 is bonded onto the pixel electrode 2P. Thereby, the region of the pixel electrode 2P shown in FIG. 4A becomes the display area 2 shown in FIG. 4B. At this time, a part of the display medium 6 is removed in advance and a connecting member 15 (conductive paste, conductive rubber or the like) shown in the DD ′ cross section of FIG. 3 is attached, so that the counter electrode wiring 3COM and the counter electrode 5 is electrically connected. As the counter substrate 4, PET, PEN, PES, PI, PEI, Ny, or the like can be suitably used. A transparent conductive film such as ITO is suitable for the counter electrode 5. The display medium 6 is preferably an electrophoretic body. Various types of electrophores are used, such as those in which white particles and black particles are charged in opposite polarities in microcapsules, or those in which differently charged white, black, and red particles are in microcups. be able to.
　次に、図４Ｃのように、表示パネル同士が重なる部分に、接着層１１を形成した後、図４Ｄのように表示パネル同士を複数個重ねて並べる。接着層１１は、液状の接着剤でもよいし、両面テープでもよい。さらに、図４Ｅのように、表示パネル同士を重ねない位置の裏面に、スペーサ１３を形成する。スペーサ１３としては、片面接着剤付のフィルムが好適であり、特にアクリルフィルムが好適である。接着層１１としては、単層の接着剤あるいは粘着剤層や、アクリルフィルムを基材とした両面テープが好適である。あるいは、スペーサ１３を各表示パネルの裏面に形成する工程は、図４Ｄの表示パネルを重ねて並べる工程の前に行ってもよい。 Next, as shown in FIG. 4C, after the adhesive layer 11 is formed in a portion where the display panels overlap each other, a plurality of display panels are stacked and arranged as shown in FIG. 4D. The adhesive layer 11 may be a liquid adhesive or a double-sided tape. Further, as shown in FIG. 4E, spacers 13 are formed on the back surface where the display panels do not overlap each other. As the spacer 13, a film with a single-sided adhesive is suitable, and an acrylic film is particularly suitable. As the adhesive layer 11, a single-layer adhesive or pressure-sensitive adhesive layer or a double-sided tape based on an acrylic film is suitable. Alternatively, the step of forming the spacer 13 on the back surface of each display panel may be performed before the step of stacking and arranging the display panels of FIG. 4D.
　そして、図４Ｆのように、複数の表示エリア２と表示エリア２間の非表示部７Ｎからなる大型表示エリア７を含む表示部の全体を覆うように、ホットメルト接着剤１４付の表バリアフィルム８を熱ラミネートする。さらに、図４Ｇのように、ホットメルト接着剤１４付きの裏バリアフィルム９を少なくとも表示部の裏面に熱ラミネートする。表バリアフィルム８の縁と裏バリアフィルム９の縁は、表示部の周囲でホットメルト接着剤１４を介して接合される。配線が引き出される部分に限っては、表バリアフィルム８の縁とフレキシブル基板１、裏バリアフィルム９の縁とフレキシブル基板１も、ホットメルト接着剤１４を介して接合される。表バリアフィルム８としては、透明性が必要なので、ＰＥＴフィルム上にＳｉＯ２やＡｌ２Ｏ３等の無機膜を成膜したものが好適である。裏バリアフィルム９としては、透明である必要はなくＰＥＴフィルム上にＡｌを成膜したものが好適であるが、ＳｉＯ２やＡｌ２Ｏ３等の無機膜を成膜したものでもよい。ホットメルト接着剤１４としては、エチレン酢酸ビニル等の熱可塑性樹脂が好適である。このようにして、図３の大型表示パネルが得られる。 And the front barrier film with the hot-melt-adhesive 14 so that the whole display part including the large sized display area 7 which consists of the non-display part 7N between several display areas 2 and the display areas 2 may be covered like FIG. 4F. 8 is heat laminated. Further, as shown in FIG. 4G, the back barrier film 9 with the hot melt adhesive 14 is thermally laminated at least on the back surface of the display portion. The edge of the front barrier film 8 and the edge of the back barrier film 9 are joined via a hot melt adhesive 14 around the display portion. Only in the portion where the wiring is drawn out, the edge of the front barrier film 8 and the flexible substrate 1 and the edge of the back barrier film 9 and the flexible substrate 1 are also bonded via the hot melt adhesive 14. Since the surface barrier film 8 requires transparency, a film obtained by forming an inorganic film such as SiO 2 or Al 2 O 3 on a PET film is preferable. The back barrier film 9 does not need to be transparent and is preferably formed by depositing Al on a PET film, but may be formed by depositing an inorganic film such as SiO 2 or Al 2 O 3 . As the hot melt adhesive 14, a thermoplastic resin such as ethylene vinyl acetate is suitable. In this way, the large display panel of FIG. 3 is obtained.
　図示しないが、この後、配線３にＣＯＦやＦＰＣ等を接続し、さらにＴＣＰやＣＯＦ等にＦＰＣを接続し、ＦＰＣを駆動装置に接続して駆動を行うことができる。あるいは、フレキシブル基板１の配線３上に、駆動用ＩＣを直接実装してもよい。あるいは、ＣＯＦやＦＰＣ等の接続や、駆動用ＩＣの実装を、図４Ａ～図４Ｇに示す工程の間のどこかで行ってもよい。また、表バリアフィルム８をラミネートする工程と、裏バリアフィルム９をラミネートする工程とは、逆の順序で行ってもよい。 Although not shown, it is possible to drive by connecting a COF or FPC or the like to the wiring 3, connecting an FPC to TCP or COF, or the like, and connecting the FPC to a driving device. Alternatively, the driving IC may be directly mounted on the wiring 3 of the flexible substrate 1. Alternatively, connection of COF, FPC, or the like, or mounting of a driving IC may be performed somewhere during the steps shown in FIGS. 4A to 4G. Further, the step of laminating the front barrier film 8 and the step of laminating the back barrier film 9 may be performed in the reverse order.
（第３の実施形態）
　図５は大型表示パネルの平面図、Ｇ－Ｇ’に沿った断面図、Ｈ－Ｈ’に沿った断面図、Ｉ－Ｉ’に沿った断面図である。この大型表示パネルは、複数の表示パネルを組合せてから、大型表示エリア全体を封止した構造を有する。具体的には、平面図とＧ－Ｇ’断面図を見てわかるように、フレキシブル基板１と対向基板４の間に表示媒体６を挟み込み、表示エリア２を有する表示パネルを複数用い、ある表示パネルの額縁Ｂ２の上に、他の表示パネルの額縁Ｂ１を重ねるように組合せている。 (Third embodiment)
FIG. 5 is a plan view of a large display panel, a cross-sectional view along GG ′, a cross-sectional view along HH ′, and a cross-sectional view along II ′. The large display panel has a structure in which the entire large display area is sealed after combining a plurality of display panels. Specifically, as can be seen from the plan view and the GG ′ sectional view, a display medium 6 is sandwiched between the flexible substrate 1 and the counter substrate 4, and a plurality of display panels having the display area 2 are used. The frame B1 of another display panel is combined on the frame B2 of the panel so as to overlap.
　なお、表示は、図６Ａに示すフレキシブル基板１上の画素電極２Ｐと、図５に示す対向基板４上の対向電極５に挟まれた表示媒体６に電圧が印加されることによって実現されるので、図６Ａの複数の画素電極２Ｐを有する領域全体が図５の表示エリア２となる。図６Ａの画素電極２Ｐを有するフレキシブル基板１としては、薄膜トランジスタアレイを有するアクティブマトリクス型であってもよいし、薄膜トランジスタを有しない直接接続型でもよい。いずれにおいても、給電するための配線３を有する。アクティブマトリクス型の場合には、通常、ゲート配線３Ｇとソース配線３Ｓと対向電極配線３ＣＯＭとキャパシタ配線３Ｃが、配線３に含まれる。直接接続型の場合には、各画素電極への配線と、対向電極配線３ＣＯＭが配線３に含まれる。対向電極配線３ＣＯＭは、対向電極５に接続されている。 The display is realized by applying a voltage to the display medium 6 sandwiched between the pixel electrode 2P on the flexible substrate 1 shown in FIG. 6A and the counter electrode 5 on the counter substrate 4 shown in FIG. The entire region having the plurality of pixel electrodes 2P in FIG. 6A becomes the display area 2 in FIG. The flexible substrate 1 having the pixel electrode 2P of FIG. 6A may be an active matrix type having a thin film transistor array or a direct connection type having no thin film transistor. In any case, a wiring 3 for supplying power is provided. In the case of the active matrix type, the wiring 3 usually includes the gate wiring 3G, the source wiring 3S, the counter electrode wiring 3COM, and the capacitor wiring 3C. In the case of the direct connection type, the wiring 3 includes a wiring to each pixel electrode and a counter electrode wiring 3COM. The counter electrode wiring 3 </ b> COM is connected to the counter electrode 5.
　各表示パネルのうち一番下以外の表示パネルのフレキシブル基板の裏面に、スペーサ１３を有してもよい。また、各パネルのうち一番上以外の表示パネルの対向基板４の表面に、透明スペーサ１６を有してもよい。スペーサ１３や透明スペーサ１６は、フレキシブル基板１や対向基板４や後述する表バリアフィルム８を平面状に保つ効果がある。表バリアフィルム８の平面性を向上させることによって、大型表示パネルの視認性を良好に保つことができる。また、表バリアフィルム８にかかる応力が低減され、表バリアの封止性能を良好に保つことができる。また、フレキシブル基板１や対向基板４を平板状に保つことによって、フレキシブル基板１上の配線３や薄膜トランジスタや、対向基板４上の対向電極５や、表示媒体６に想定外の応力がかかることを防止できる。 A spacer 13 may be provided on the back surface of the flexible substrate of the display panel other than the bottom of each display panel. Moreover, you may have the transparent spacer 16 on the surface of the opposing board | substrate 4 of display panels other than the top among each panel. The spacer 13 and the transparent spacer 16 have an effect of keeping the flexible substrate 1, the counter substrate 4, and the surface barrier film 8 described later in a flat shape. By improving the flatness of the front barrier film 8, the visibility of the large display panel can be kept good. Moreover, the stress concerning the front barrier film 8 is reduced, and the sealing performance of the front barrier can be kept good. Further, by keeping the flexible substrate 1 and the counter substrate 4 in a flat plate shape, unexpected stress is applied to the wiring 3, the thin film transistor on the flexible substrate 1, the counter electrode 5 on the counter substrate 4, and the display medium 6. Can be prevented.
　そして、表示エリア２が連結されて形成される大型表示エリア７を含む表示部全体を覆うように表バリアフィルム８および裏バリアフィルム９で対向基板４・表示媒体６・フレキシブル基板１の積層体が挟まれている。表バリアフィルム８と対向基板４の間、表バリアフィルム８と透明スペーサ１６の間、透明スペーサ１６と対向基板４の間には、透明接着層１２を有している。裏バリアフィルム９とフレキシブル基板１の間、裏バリアフィルム９とスペーサ１４の間、スペーサ１４とフレキシブル基板１の間にも、透明接着層１２を有している。表バリアフィルム８と裏バリアフィルム９の間、かつ対向基板４・表示媒体６・フレキシブル基板１の周囲の領域は、エッジシール１０によって覆われている。 And the laminated body of the opposing board | substrate 4, the display medium 6, and the flexible substrate 1 is covered with the front barrier film 8 and the back barrier film 9 so that the whole display part including the large sized display area 7 formed by connecting the display area 2 may be covered. It is sandwiched. A transparent adhesive layer 12 is provided between the front barrier film 8 and the counter substrate 4, between the front barrier film 8 and the transparent spacer 16, and between the transparent spacer 16 and the counter substrate 4. The transparent adhesive layer 12 is also provided between the back barrier film 9 and the flexible substrate 1, between the back barrier film 9 and the spacer 14, and between the spacer 14 and the flexible substrate 1. A region between the front barrier film 8 and the back barrier film 9 and around the counter substrate 4, the display medium 6, and the flexible substrate 1 is covered with an edge seal 10.
　また、図５の平面図とＩ－Ｉ’断面図を見てわかるように、図６Ａに示す配線３は図５の表示パネルの下方向に引き出されており、この方向のみはフレキシブル基板１がエッジシール１０の外に伸びている。裏バリアフィルム９とフレキシブル基板１の間は、透明接着層１２で接着されている。 Further, as can be seen from the plan view of FIG. 5 and the sectional view taken along the line II ′, the wiring 3 shown in FIG. 6A is drawn downward from the display panel of FIG. It extends outside the edge seal 10. The back barrier film 9 and the flexible substrate 1 are bonded with a transparent adhesive layer 12.
　さらに、図５の平面図とＨ－Ｈ’断面図を見てわかるように、フレキシブル基板１が表バリアフィルム８の縁または裏バリアフィルム９の縁と重なる部分では、フレキシブル基板１同士が重なりを持たないようになっている。この部分のフレキシブル基板１同士が重なりを持つ場合に比べて表バリアフィルム８と裏バリアフィルム９の間隔を狭くすることができ、配線３を引き出す部分の封止が容易になる。表バリアフィルム８とフレキシブル基板１の間、および表バリアフィルム８と裏バリアフィルム９の間は、エッジシール１０で封止されている。 Further, as can be seen from the plan view of FIG. 5 and the HH ′ cross-sectional view, the flexible substrates 1 overlap each other at the portion where the flexible substrate 1 overlaps the edge of the front barrier film 8 or the edge of the back barrier film 9. It is not to have. Compared with the case where the flexible substrates 1 in this portion overlap each other, the distance between the front barrier film 8 and the back barrier film 9 can be narrowed, and the portion where the wiring 3 is drawn out can be easily sealed. An edge seal 10 seals between the front barrier film 8 and the flexible substrate 1 and between the front barrier film 8 and the back barrier film 9.
　なお、広い額縁Ｂ１の上に狭い額縁Ｂ２を重ねる方が望ましいが、Ｂ２の上にＢ１を重ねてもよい。 Although it is desirable to overlap the narrow frame B2 on the wide frame B1, B1 may be stacked on B2.
　また、図５には記していないが、フレキシブル基板１上の配線３にはテープキャリアパッケージ（ＴＣＰ）またはチップオンフィルム（ＣＯＦ）等が異方導電膜（ＡＣＦ）等によって接続され、ＴＣＰやＣＯＦがフレキシブルプリント基板（ＦＰＣ）等に接続され、ＦＰＣ等が駆動装置に接続される。あるいは、フレキシブル基板１上の配線３に、ベアチップがＡＣＦ等によって実装され、さらに配線３のうち画素電極２Ｐに接続されずベアチップの入力端子に接続された分にＦＰＣ等が接続され、ＦＰＣ等が駆動装置に接続される。 Although not shown in FIG. 5, a tape carrier package (TCP) or a chip-on film (COF) is connected to the wiring 3 on the flexible substrate 1 by an anisotropic conductive film (ACF) or the like. Are connected to a flexible printed circuit board (FPC) or the like, and the FPC or the like is connected to the driving device. Alternatively, a bare chip is mounted on the wiring 3 on the flexible substrate 1 by ACF or the like, and further, FPC or the like is connected to the wiring 3 that is not connected to the pixel electrode 2P but connected to the input terminal of the bare chip. Connected to the driving device.
　表バリアフィルム８や裏バリアフィルム９の外のフレキシブル基板１や、フレキシブル基板１に接続されたＴＣＰ、ＣＯＦ、ＦＰＣ等の部分を、ある曲率半径で折り曲げることが可能である。折り曲げることにより、配線～駆動装置を表示側から見にくくすることができ、例えば電子棚札等、横長の大型表示パネルとして用いることができる。 It is possible to bend the flexible substrate 1 outside the front barrier film 8 and the back barrier film 9 and portions such as TCP, COF, and FPC connected to the flexible substrate 1 with a certain radius of curvature. By bending, it is possible to make the wiring to the driving device difficult to see from the display side, and for example, it can be used as a horizontally large display panel such as an electronic shelf label.
　さらに機械強度向上や、装飾性向上のため、大型パネル全体が筐体に組み込まれていてもよい（図示せず）。 Furthermore, the entire large panel may be incorporated in the housing (not shown) for improving mechanical strength and decorativeness.
　図５の大型表示パネルの製造方法の一例を、図６Ａ～図６Ｇに示す。まず図６Ａのように、フレキシブル基板１上に、画素電極２Ｐを有する薄膜トランジスタアレイを形成する。薄膜トランジスタアレイ（画素電極２Ｐ以外は図示を省略）の配線３は、ゲート配線３Ｇ、ソース配線３Ｓ、対向電極配線３ＣＯＭ、キャパシタ配線３Ｃを有する。あるいは、薄膜トランジスタを有せず、各画素電極２Ｐに直接接続された配線３と、対向電極配線３ＣＯＭを有してもよい。 An example of a method for manufacturing the large display panel of FIG. 5 is shown in FIGS. 6A to 6G. First, as shown in FIG. 6A, a thin film transistor array having pixel electrodes 2P is formed on a flexible substrate 1. The wiring 3 of the thin film transistor array (not shown except for the pixel electrode 2P) includes a gate wiring 3G, a source wiring 3S, a counter electrode wiring 3COM, and a capacitor wiring 3C. Or you may have the wiring 3 directly connected to each pixel electrode 2P, and the counter electrode wiring 3COM, without having a thin-film transistor.
　配線３は、図面の下方向に引き出すように形成されている。フレキシブル基板１としては、ポリエチレンテレフタレート（ＰＥＴ）、ポリエチレンナフタレート（ＰＥＮ）、ポリエーテルスルホン（ＰＥＳ）、ポリイミド（ＰＩ）、ポリエーテルイミド（ＰＥＩ）、ナイロン（Ｎｙ）等を好適に用いることができる。また、フレキシブル基板１をフィルム基板として用いる以外に、別途用意したガラス基板に貼り付けて工程を流し、途中の工程で剥離してフィルム化してもよい。ガラス基板に貼り付ける媒介としては、加熱または冷却によって粘着性を失うフィルムが好適に用いられる。 The wiring 3 is formed so as to be drawn downward in the drawing. As the flexible substrate 1, polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (PES), polyimide (PI), polyetherimide (PEI), nylon (Ny), or the like can be suitably used. . In addition to using the flexible substrate 1 as a film substrate, it may be attached to a separately prepared glass substrate to flow the process, and the film may be peeled off during the process. As a medium to be attached to the glass substrate, a film that loses its adhesiveness by heating or cooling is preferably used.
　アクティブマトリクス型の場合、ゲート配線３Ｇおよびそれに接続されたゲート電極、キャパシタ配線３Ｃおよびそれに接続されたキャパシタ電極としては、Ａｇ、Ａｕ、Ｐｔ、Ｐｄ、Ｃｕ等の金属を好適に用いることができる。ゲート絶縁膜としては、エポキシ、アクリル等の有機絶縁膜を好適に用いることができる。ソース配線３Ｓおよびそれに接続されたソース電極、下部画素電極およびそれに接続されたドレイン電極、対向電極配線３ＣＯＭとしては、Ａｇ、Ａｕ、Ｐｔ、Ｐｄ、Ｃｕ等の金属を好適に用いることができる。下部画素電極／ゲート絶縁膜／キャパシタ電極が、蓄積容量をなす。ソース電極とドレイン電極の間に形成する半導体層としては、有機半導体や酸化物半導体が好適である。半導体層の上を、保護層が覆ってもよく、保護層としてはフッ素化樹脂が好適である。さらに、下部画素電極上に開口を有する層間絶縁膜と、該開口を介して下部画素電極に接続された画素電極を有する。層間絶縁膜は、エポキシ、アクリル等の有機絶縁膜が好適である。画素電極としては、Ａｇペースト等が好適である。直接接続型の場合、画素電極２Ｐおよび配線３としてはＡｇ、Ａｕ、Ｐｔ、Ｐｄ、Ｃｕ等の金属や、Ｃペースト、Ａｇペースト等のインクが好適である。配線部分をエポキシ、アクリル等の有機絶縁膜で覆うのが好ましい。画素電極２Ｐを配線３と同時に形成してもよいし、有機絶縁膜の開口を介して配線３に接続されるように画素電極２Ｐが別層であってもよい。 In the case of the active matrix type, metals such as Ag, Au, Pt, Pd, and Cu can be suitably used as the gate wiring 3G and the gate electrode connected thereto, the capacitor wiring 3C and the capacitor electrode connected thereto. As the gate insulating film, an organic insulating film such as epoxy or acrylic can be suitably used. As the source wiring 3S and the source electrode connected thereto, the lower pixel electrode, the drain electrode connected thereto, and the counter electrode wiring 3COM, metals such as Ag, Au, Pt, Pd, and Cu can be suitably used. The lower pixel electrode / gate insulating film / capacitor electrode forms a storage capacitor. As the semiconductor layer formed between the source electrode and the drain electrode, an organic semiconductor or an oxide semiconductor is preferable. A protective layer may cover the semiconductor layer, and a fluorinated resin is suitable as the protective layer. Furthermore, an interlayer insulating film having an opening on the lower pixel electrode and a pixel electrode connected to the lower pixel electrode through the opening are provided. The interlayer insulating film is preferably an organic insulating film such as epoxy or acrylic. As the pixel electrode, an Ag paste or the like is suitable. In the case of the direct connection type, as the pixel electrode 2P and the wiring 3, a metal such as Ag, Au, Pt, Pd, or Cu, or an ink such as C paste or Ag paste is suitable. The wiring part is preferably covered with an organic insulating film such as epoxy or acrylic. The pixel electrode 2P may be formed simultaneously with the wiring 3, or the pixel electrode 2P may be a separate layer so as to be connected to the wiring 3 through the opening of the organic insulating film.
　次に、図６Ｂのように、対向基板４上に対向電極５および表示媒体６を有する前面板の表示媒体６側を、前記画素電極２Ｐ上に貼り合わせる。これにより、図６Ａに示す複数の画素電極２Ｐを有する領域全体が図６Ｂに示す表示エリア２となる。またこの時、あらかじめ表示媒体６の一部を除去し、図５のＧ－Ｇ’断面に示す接続部材１５（導電ペーストや導電ゴム等）を付けておくことで、対向電極配線３ＣＯＭと対向電極５とを電気的に接続する。対向基板４としては、ＰＥＴ、ＰＥＮ、ＰＥＳ、ＰＩ、ＰＥＩ、Ｎｙ等を好適に用いることができる。対向電極５には、ＩＴＯ等の透明導電膜が好適である。表示媒体６としては、電気泳動体が好適である。逆極性に帯電した白粒子と黒粒子をマイクロカプセルに入れたものや、異なる帯電状態の白粒子・黒粒子・赤粒子をマイクロカップに入れたものなど、様々な方式の電気泳動体を使用することができる。対向基板４の表面には、あらかじめ、透明接着層１２を付けておく。 Next, as shown in FIG. 6B, the display medium 6 side of the front plate having the counter electrode 5 and the display medium 6 on the counter substrate 4 is bonded onto the pixel electrode 2P. Thus, the entire region having the plurality of pixel electrodes 2P shown in FIG. 6A becomes the display area 2 shown in FIG. 6B. At this time, a part of the display medium 6 is removed in advance and a connecting member 15 (conductive paste, conductive rubber, etc.) shown in the section GG ′ in FIG. 5 is attached, so that the counter electrode wiring 3COM and the counter electrode 5 is electrically connected. As the counter substrate 4, PET, PEN, PES, PI, PEI, Ny, or the like can be suitably used. A transparent conductive film such as ITO is suitable for the counter electrode 5. The display medium 6 is preferably an electrophoretic body. Various types of electrophores are used, such as those in which white particles and black particles are charged in opposite polarities in microcapsules, or those in which differently charged white, black, and red particles are in microcups. be able to. A transparent adhesive layer 12 is attached to the surface of the counter substrate 4 in advance.
　次に、図６Ｃのように、表示パネルを複数個重ねて並べる。さらに、図６Ｄのように、表示パネルのうち最も下以外の表示パネルのフレキシブル基板１の裏面に、スペーサ１３を貼りあわせる。スペーサ１３としては、片面接着剤付のフィルムが好適である。また、表示パネルのうち最も上以外の表示パネルの対向基板４の表面に、透明スペーサ１６を貼り合わせる。透明スペーサ１６としては、片面接着フィルム付の透明フィルムが好適である。スペーサ１３は透明でもよく、透明スペーサ１６と同じフィルムでもよい。透明スペーサ１６を表面に貼る工程と、スペーサ１３を裏面に貼る工程とは、逆の順序で行ってもよい。あるいは、スペーサ１３や透明スペーサ１６を貼る工程は、図６Ｃの表示パネルを重ねて並べる工程の前に行ってもよい。 Next, as shown in FIG. 6C, a plurality of display panels are stacked and arranged. Further, as shown in FIG. 6D, a spacer 13 is bonded to the back surface of the flexible substrate 1 of the display panel other than the lowermost display panel. As the spacer 13, a film with a single-sided adhesive is suitable. Further, a transparent spacer 16 is bonded to the surface of the counter substrate 4 of the display panel other than the uppermost display panel. As the transparent spacer 16, a transparent film with a single-sided adhesive film is suitable. The spacer 13 may be transparent or the same film as the transparent spacer 16. The step of sticking the transparent spacer 16 on the surface and the step of sticking the spacer 13 on the back surface may be performed in the reverse order. Or you may perform the process of sticking the spacer 13 or the transparent spacer 16 before the process of stacking and arranging the display panel of FIG. 6C.
　そして、図６Ｅのように、複数の表示エリア２と表示エリア間の非表示部７Ｎからなる大型表示エリア７を含む表示部の全体を覆うように、表バリアフィルム８をラミネートする。さらに、裏面に透明接着層１２を形成した後、図６Ｆのように、裏バリアフィルム９を裏面にラミネートする。 Then, as shown in FIG. 6E, the front barrier film 8 is laminated so as to cover the entire display section including the large display area 7 including the plurality of display areas 2 and the non-display section 7N between the display areas. Further, after forming the transparent adhesive layer 12 on the back surface, the back barrier film 9 is laminated on the back surface as shown in FIG. 6F.
　さらに、図６Ｇのように、表バリアフィルム８の周囲に、エッジシール１０の材料を塗布する。エッジシール材は、表バリアフィルム８と裏バリアフィルム９の間、または表バリアフィルム８とフレキシブル基板１の間に浸入し、表示媒体６の周囲を覆う。この状態で、熱または光でエッジシール１０を硬化させる。エッジシール１０としては、シリコーン、エポキシ、アクリル、ウレタン等の、熱または光硬化性樹脂が好適である。エッジシール１０の材料中には、シリカ等の無機微粒子が混合されていてもよい。このようにして、図５の大型表示パネルが得られる。 Further, as shown in FIG. 6G, the material of the edge seal 10 is applied around the front barrier film 8. The edge seal material penetrates between the front barrier film 8 and the back barrier film 9 or between the front barrier film 8 and the flexible substrate 1 and covers the periphery of the display medium 6. In this state, the edge seal 10 is cured with heat or light. As the edge seal 10, a heat or photo-curing resin such as silicone, epoxy, acrylic, urethane, or the like is suitable. In the material of the edge seal 10, inorganic fine particles such as silica may be mixed. In this way, the large display panel of FIG. 5 is obtained.
　図示しないが、この後、配線３にＣＯＦやＦＰＣ等を接続し、さらにＴＣＰやＣＯＦ等にＦＰＣを接続し、ＦＰＣを駆動装置に接続して駆動を行うことができる。あるいは、フレキシブル基板１の配線３上に、駆動用ＩＣを直接実装してもよい。あるいは、ＣＯＦやＦＰＣ等の接続や、駆動用ＩＣの実装を、図６Ａ～図６Ｇに示す工程の間のどこかで行ってもよい。また、表バリアフィルム８をラミネートする工程と、裏バリアフィルム９をラミネートする工程とは、逆の順序で行ってもよい。 Although not shown, it is possible to drive by connecting a COF or FPC or the like to the wiring 3, connecting an FPC to TCP or COF, or the like, and connecting the FPC to a driving device. Alternatively, the driving IC may be directly mounted on the wiring 3 of the flexible substrate 1. Alternatively, connection such as COF or FPC, or mounting of a driving IC may be performed somewhere during the steps shown in FIGS. 6A to 6G. Further, the step of laminating the front barrier film 8 and the step of laminating the back barrier film 9 may be performed in the reverse order.
（第４の実施形態）
　図７は大型表示パネルの平面図、Ｊ－Ｊ’に沿った断面図、Ｋ－Ｋ’に沿った断面図、Ｌ－Ｌ’に沿った断面図である。この大型表示パネルは、複数の表示パネルを組合せてから、大型表示エリア全体を封止した構造を有する。具体的には、平面図とＪ－Ｊ’断面図を見てわかるように、フレキシブル基板１と対向基板４の間に表示媒体６を挟み込み、表示エリア２を有する表示パネルを複数用い、左の表示パネルの額縁Ｂ２の上に、中央の表示パネルの額縁Ｂ１を重ね、右の表示パネルの額縁Ｂ１の上に、中央の表示パネルの額縁Ｂ２を重ねるように組合せている。 (Fourth embodiment)
FIG. 7 is a plan view of the large display panel, a cross-sectional view along JJ ′, a cross-sectional view along KK ′, and a cross-sectional view along LL ′. The large display panel has a structure in which the entire large display area is sealed after combining a plurality of display panels. Specifically, as can be seen from the plan view and the JJ ′ cross-sectional view, the display medium 6 is sandwiched between the flexible substrate 1 and the counter substrate 4, and a plurality of display panels having the display area 2 are used. The frame B1 of the center display panel is overlaid on the frame B2 of the display panel, and the frame B2 of the center display panel is overlaid on the frame B1 of the right display panel.
　各表示パネルのうち一番下以外の表示パネル（図７では中央）のフレキシブル基板の裏面に、スペーサ１３を有している。また、各パネルのうち一番上以外の表示パネル（図７では左と右）の対向基板４の表面に、透明スペーサ１６を有している。スペーサ１３や透明スペーサ１６は、フレキシブル基板１や対向基板４や後述する表バリアフィルム８を平面状に保つ効果がある。表バリアフィルム８の平面性を向上させることによって、大型表示パネルの視認性を良好に保つことができる。また、表バリアフィルム８にかかる応力が低減され、表バリアの封止性能を良好に保つことができる。また、フレキシブル基板１や対向基板４を平板状に保つことによって、フレキシブル基板１上の配線３や薄膜トランジスタや、対向基板４上の対向電極５や、表示媒体６に想定外の応力がかかることを防止できる。 A spacer 13 is provided on the back surface of the flexible substrate of the display panel other than the bottom of the display panels (the center in FIG. 7). Further, a transparent spacer 16 is provided on the surface of the counter substrate 4 of a display panel (left and right in FIG. 7) other than the top of each panel. The spacer 13 and the transparent spacer 16 have an effect of keeping the flexible substrate 1, the counter substrate 4, and the surface barrier film 8 described later in a flat shape. By improving the flatness of the front barrier film 8, the visibility of the large display panel can be kept good. Moreover, the stress concerning the front barrier film 8 is reduced, and the sealing performance of the front barrier can be kept good. Further, by keeping the flexible substrate 1 and the counter substrate 4 in a flat plate shape, unexpected stress is applied to the wiring 3, the thin film transistor on the flexible substrate 1, the counter electrode 5 on the counter substrate 4, and the display medium 6. Can be prevented.
　そして、表示エリア２が連結されて形成される大型表示エリア７を有する表示部全体を覆うように表バリアフィルム８および裏バリアフィルム９で対向基板４・表示媒体６・フレキシブル基板１の積層体が挟まれている。表バリアフィルム８と対向基板４の間、表バリアフィルム８と透明スペーサ１６の間、透明スペーサ１６と対向基板４の間には、透明接着層１２を有している。裏バリアフィルム９とフレキシブル基板１の間、裏バリアフィルム９とスペーサ１４の間、スペーサ１４とフレキシブル基板１の間にも、透明接着層１２を有している。表バリアフィルム８と裏バリアフィルム９の間、かつ対向基板４・表示媒体６・フレキシブル基板１の周囲は、エッジシール１０によって覆われている。 And the laminated body of the opposing board | substrate 4, the display medium 6, and the flexible substrate 1 is covered with the front barrier film 8 and the back barrier film 9 so that the whole display part which has the large sized display area 7 formed by connecting the display area 2 may be covered. It is sandwiched. A transparent adhesive layer 12 is provided between the front barrier film 8 and the counter substrate 4, between the front barrier film 8 and the transparent spacer 16, and between the transparent spacer 16 and the counter substrate 4. The transparent adhesive layer 12 is also provided between the back barrier film 9 and the flexible substrate 1, between the back barrier film 9 and the spacer 14, and between the spacer 14 and the flexible substrate 1. Between the front barrier film 8 and the back barrier film 9 and the periphery of the counter substrate 4, the display medium 6, and the flexible substrate 1 are covered with an edge seal 10.
　また、図７の平面図とＬ－Ｌ’断面図を見てわかるように、配線３は図７の表示パネルの下方向に引き出されており、この方向のみはフレキシブル基板１がエッジシール１０の外に伸びている。裏バリアフィルム９とフレキシブル基板１の間は、透明接着層１２で接着されている。 Further, as can be seen from the plan view of FIG. 7 and the LL ′ cross-sectional view, the wiring 3 is drawn downward from the display panel of FIG. It extends outside. The back barrier film 9 and the flexible substrate 1 are bonded with a transparent adhesive layer 12.
　さらに、図７の平面図とＫ－Ｋ’断面図を見てわかるように、フレキシブル基板１が表バリアフィルム８の縁または裏バリアフィルム９の縁と重なる部分では、フレキシブル基板１同士が重なりを持たないようになっている。この部分のフレキシブル基板１同士が重なりを持つ場合に比べて表バリアフィルム８と裏バリアフィルム９の間隔を狭くすることができ、配線３を引き出す部分の封止が容易になる。表バリアフィルム８とフレキシブル基板１の間、および表バリアフィルム８と裏バリアフィルム９の間は、エッジシール１０で封止されている。 Further, as can be seen from the plan view of FIG. 7 and the KK ′ cross-sectional view, the flexible substrates 1 overlap each other at the portion where the flexible substrate 1 overlaps the edge of the front barrier film 8 or the edge of the back barrier film 9. It is not to have. Compared with the case where the flexible substrates 1 in this portion overlap each other, the distance between the front barrier film 8 and the back barrier film 9 can be narrowed, and the portion where the wiring 3 is drawn out can be easily sealed. An edge seal 10 seals between the front barrier film 8 and the flexible substrate 1 and between the front barrier film 8 and the back barrier film 9.
（第５の実施形態）
　図８は大型表示パネルの平面図、Ｍ－Ｍ’に沿った断面図、Ｎ－Ｎ’に沿った断面図、Ｏ－Ｏ’に沿った断面図である。この大型表示パネルは、複数の表示パネルを組合せてから、大型表示エリア全体を封止した構造を有する。具体的には、平面図とＭ－Ｍ’断面図を見てわかるように、フレキシブル基板１と対向基板４の間に表示媒体６を挟み込み、表示エリア２を有する表示パネルを複数用い、ある表示パネルの額縁Ｂ２の上に、他の表示パネルの額縁Ｂ１を重ねるように組み合わせたもの２組を、配線が出ていない辺同士を揃えて並べている。 (Fifth embodiment)
FIG. 8 is a plan view of the large display panel, a cross-sectional view along MM ′, a cross-sectional view along NN ′, and a cross-sectional view along OO ′. The large display panel has a structure in which the entire large display area is sealed after combining a plurality of display panels. Specifically, as can be seen from the plan view and the MM ′ cross-sectional view, a display medium 6 is sandwiched between the flexible substrate 1 and the counter substrate 4, and a plurality of display panels having the display area 2 are used. On the frame B2 of the panel, two sets that are combined so that the frame B1 of another display panel overlaps are arranged with the sides where no wiring is provided aligned.
　各表示パネルのうち一番下以外の表示パネルのフレキシブル基板の裏面に、スペーサ１３を有している。また、各パネルのうち一番上以外の表示パネルの対向基板４の表面に、透明スペーサ１６を有している。スペーサ１３や透明スペーサ１６は、フレキシブル基板１や対向基板４や後述する表バリアフィルム８を平面状に保つ効果がある。表バリアフィルム８の平面性を向上させることによって、大型表示パネルの視認性を良好に保つことができる。また、表バリアフィルム８にかかる応力が低減され、表バリアの封止性能を良好に保つことができる。また、フレキシブル基板１や対向基板４を平板状に保つことによって、フレキシブル基板１上の配線３や薄膜トランジスタや、対向基板４上の対向電極５や、表示媒体６に想定外の応力がかかることを防止できる。 A spacer 13 is provided on the back surface of the flexible substrate of the display panel other than the bottom of each display panel. Further, a transparent spacer 16 is provided on the surface of the counter substrate 4 of the display panel other than the top of each panel. The spacer 13 and the transparent spacer 16 have an effect of keeping the flexible substrate 1, the counter substrate 4, and the surface barrier film 8 described later in a flat shape. By improving the flatness of the front barrier film 8, the visibility of the large display panel can be kept good. Moreover, the stress concerning the front barrier film 8 is reduced, and the sealing performance of the front barrier can be kept good. Further, by keeping the flexible substrate 1 and the counter substrate 4 in a flat plate shape, unexpected stress is applied to the wiring 3, the thin film transistor on the flexible substrate 1, the counter electrode 5 on the counter substrate 4, and the display medium 6. Can be prevented.
　そして、表示エリア２が連結されて形成される大型表示エリア７を有する表示部の全体が表バリアフィルム８および裏バリアフィルム９で挟まれている。表バリアフィルム８と対向基板４の間、表バリアフィルム８と透明スペーサ１６の間、透明スペーサ１６と対向基板４の間には、透明接着層１２を有している。裏バリアフィルム９とフレキシブル基板１の間、裏バリアフィルム９とスペーサ１４の間、スペーサ１４とフレキシブル基板１の間にも、透明接着層１２を有している。表バリアフィルム８と裏バリアフィルム９の間、かつ対向基板４・表示媒体６・フレキシブル基板１の周囲は、エッジシール１０によって覆われている。 The entire display unit having the large display area 7 formed by connecting the display areas 2 is sandwiched between the front barrier film 8 and the back barrier film 9. A transparent adhesive layer 12 is provided between the front barrier film 8 and the counter substrate 4, between the front barrier film 8 and the transparent spacer 16, and between the transparent spacer 16 and the counter substrate 4. The transparent adhesive layer 12 is also provided between the back barrier film 9 and the flexible substrate 1, between the back barrier film 9 and the spacer 14, and between the spacer 14 and the flexible substrate 1. Between the front barrier film 8 and the back barrier film 9 and the periphery of the counter substrate 4, the display medium 6, and the flexible substrate 1 are covered with an edge seal 10.
　また、図８の平面図とＯ－Ｏ’断面図を見てわかるように、配線３は図８の表示パネルの上下方向に引き出されており、この方向のみはフレキシブル基板１がエッジシール１０の外に伸びている。裏バリアフィルム９とフレキシブル基板１の間は、透明接着層１２で接着されている。 Further, as can be seen from the plan view of FIG. 8 and the OO ′ sectional view, the wiring 3 is drawn in the vertical direction of the display panel of FIG. It extends outside. The back barrier film 9 and the flexible substrate 1 are bonded with a transparent adhesive layer 12.
　さらに、図８の平面図とＮ－Ｎ’断面図を見てわかるように、フレキシブル基板１が表バリアフィルム８の縁または裏バリアフィルム９の縁と重なる部分では、フレキシブル基板１同士が重なりを持たないようになっている。この部分のフレキシブル基板１同士が重なりを持つ場合に比べて表バリアフィルム８と裏バリアフィルム９の間隔を狭くすることができ、配線３を引き出す部分の封止が容易になる。表バリアフィルム８とフレキシブル基板１の間、および表バリアフィルム８と裏バリアフィルム９の間は、エッジシール１０で封止されている。 Further, as can be seen from the plan view of FIG. 8 and the NN ′ cross-sectional view, the flexible substrates 1 overlap each other at the portion where the flexible substrate 1 overlaps the edge of the front barrier film 8 or the edge of the back barrier film 9. It is not to have. Compared with the case where the flexible substrates 1 in this portion overlap each other, the distance between the front barrier film 8 and the back barrier film 9 can be narrowed, and the portion where the wiring 3 is drawn out can be easily sealed. An edge seal 10 seals between the front barrier film 8 and the flexible substrate 1 and between the front barrier film 8 and the back barrier film 9.
（第６の実施形態）
　図９は大型表示パネルの平面図、Ｖ－Ｖ’に沿った断面図、Ｗ－Ｗ’に沿った断面図、Ｘ－Ｘ’に沿った断面図である。この大型表示パネルは、複数の表示パネルを組合せて、大型表示エリア全体を封止した構造を有する。具体的には、平面図とＶ－Ｖ’断面図を見てわかるように、フレキシブル基板１と対向基板４の間に表示媒体６を挟み込み、表示エリア２を有する表示パネルを複数用い、ある表示パネルの横に、他の表示パネルを並べるように組合せている。 (Sixth embodiment)
FIG. 9 is a plan view of a large display panel, a cross-sectional view along VV ′, a cross-sectional view along WW ′, and a cross-sectional view along XX ′. This large display panel has a structure in which the entire large display area is sealed by combining a plurality of display panels. Specifically, as can be seen from the plan view and the VV ′ sectional view, a display medium 6 is sandwiched between the flexible substrate 1 and the counter substrate 4, and a plurality of display panels having the display area 2 are used. Other display panels are arranged next to the panel.
　本実施形態の表示パネルは、図１０Ａに示すようにゲート配線３Ｇをソース配線３Ｓと同じ辺に引き出す工夫を行っている。ゲート配線３Ｇは、表示パネルの第１の方向である左右方向に延びる配線と、表示パネルの第２の方向である上下方向に延びる配線とにより構成される。この２つの配線は別の層に形成されており、ビアホール接続によって接続されている。これにより、複数の画素電極２Ｐからなる表示エリア２から、フレキシブル基板１の縁までの額縁Ｂ１、Ｂ２を小さくすることができている。ただし図１０Ａでは、ゲート配線３Ｇを見易くするために、画素電極２Ｐを代表１個しか記載しておらず、他の画素電極２Ｐの記載を省略した。あるいは、図６Ａ同様に横から配線した場合でも、ゲート配線３Ｇの線幅と間隔を小さくすることによって額縁を小さくしてもよい。ただし対向電極配線３ＣＯＭは、画素電極２Ｐ群の右ではなく、下側にするのがよい。このようにして、額縁が小さいフレキシブル基板１を得る。 In the display panel of this embodiment, as shown in FIG. 10A, the gate wiring 3G is devised to be drawn out to the same side as the source wiring 3S. The gate wiring 3G includes a wiring extending in the left-right direction, which is the first direction of the display panel, and a wiring extending in the vertical direction, which is the second direction of the display panel. These two wirings are formed in different layers and are connected by via-hole connection. Accordingly, the frames B1 and B2 from the display area 2 including the plurality of pixel electrodes 2P to the edge of the flexible substrate 1 can be reduced. However, in FIG. 10A, in order to make the gate wiring 3G easy to see, only one representative pixel electrode 2P is shown, and the other pixel electrodes 2P are not shown. Alternatively, even when wiring from the side as in FIG. 6A, the frame may be made smaller by reducing the line width and interval of the gate wiring 3G. However, the counter electrode wiring 3COM is preferably not on the right side of the pixel electrode 2P group but on the lower side. In this way, the flexible substrate 1 having a small frame is obtained.
　なお、表示は、図１０Ａに示すフレキシブル基板１上の画素電極２Ｐと、図９に示す対向基板４上の対向電極５に挟まれた表示媒体６に電圧が印加されることによって実現されるので、図１０Ａの複数の画素電極２Ｐを有する領域全体が図９の表示エリア２となる。図１０Ａの画素電極２Ｐを有するフレキシブル基板１としては、薄膜トランジスタアレイを有するアクティブマトリクス型であってもよいし、薄膜トランジスタを有しない直接接続型でもよい。いずれにおいても、給電するための配線３を有する。アクティブマトリクスの場合には、通常、ゲート配線３Ｇとソース配線３Ｓと対向電極配線３ＣＯＭとキャパシタ配線３Ｃが、配線３に含まれる。直接接続型の場合には、各画素電極への配線と、対向電極配線３ＣＯＭが配線３に含まれる。対向電極配線３ＣＯＭは、対向電極５に接続されている。 The display is realized by applying a voltage to the display medium 6 sandwiched between the pixel electrode 2P on the flexible substrate 1 shown in FIG. 10A and the counter electrode 5 on the counter substrate 4 shown in FIG. The entire region having the plurality of pixel electrodes 2P in FIG. 10A becomes the display area 2 in FIG. The flexible substrate 1 having the pixel electrode 2P of FIG. 10A may be an active matrix type having a thin film transistor array or a direct connection type not having a thin film transistor. In any case, a wiring 3 for supplying power is provided. In the case of an active matrix, the wiring 3 usually includes the gate wiring 3G, the source wiring 3S, the counter electrode wiring 3COM, and the capacitor wiring 3C. In the case of the direct connection type, the wiring 3 includes a wiring to each pixel electrode and a counter electrode wiring 3COM. The counter electrode wiring 3 </ b> COM is connected to the counter electrode 5.
　各表示パネルの対向基板４の表面に、透明スペーサ１６を有してもよい。 A transparent spacer 16 may be provided on the surface of the counter substrate 4 of each display panel.
　そして、表示エリア２が連結されて形成される大型表示エリア７を有する表示部全体が表バリアフィルム８および裏バリアフィルム９で挟まれている。表バリアフィルム８と対向基板４の間には、透明接着層１２を有していてもよい。裏バリアフィルム９とフレキシブル基板１の間にも、透明接着層１２を有している。表バリアフィルム８と裏バリアフィルム９の間、かつ対向基板４・表示媒体６・フレキシブル基板１の周囲は、エッジシール１０によって覆われている。 The entire display unit having the large display area 7 formed by connecting the display areas 2 is sandwiched between the front barrier film 8 and the back barrier film 9. A transparent adhesive layer 12 may be provided between the front barrier film 8 and the counter substrate 4. A transparent adhesive layer 12 is also provided between the back barrier film 9 and the flexible substrate 1. Between the front barrier film 8 and the back barrier film 9 and the periphery of the counter substrate 4, the display medium 6, and the flexible substrate 1 are covered with an edge seal 10.
　また、図９の平面図とＸ－Ｘ’断面図を見てわかるように、図１０Ａに示す配線３は図９の表示パネルの下方向に引き出されており、この方向のみはフレキシブル基板１がエッジシール１０の外に伸びている。裏バリアフィルム９とフレキシブル基板１の間は、透明接着層１２で接着されていてもよい。 Further, as can be seen from the plan view of FIG. 9 and the XX ′ cross-sectional view, the wiring 3 shown in FIG. 10A is drawn downward from the display panel of FIG. It extends outside the edge seal 10. The back barrier film 9 and the flexible substrate 1 may be bonded with a transparent adhesive layer 12.
　さらに、図９の平面図とＷ－Ｗ’断面図を見てわかるように、表バリアフィルム８とフレキシブル基板１の間、および表バリアフィルム８と裏バリアフィルム９の間は、エッジシール１０で封止されている。 Further, as can be seen from the plan view of FIG. 9 and the WW ′ cross-sectional view, an edge seal 10 is provided between the front barrier film 8 and the flexible substrate 1 and between the front barrier film 8 and the back barrier film 9. It is sealed.
　また、図９には記していないが、フレキシブル基板１上の配線３にはテープキャリアパッケージ（ＴＣＰ）またはチップオンフィルム（ＣＯＦ）等が異方導電膜（ＡＣＦ）等によって接続され、ＴＣＰやＣＯＦがフレキシブルプリント基板（ＦＰＣ）等に接続され、ＦＰＣ等が駆動装置に接続される。あるいは、フレキシブル基板１上の配線３に、ベアチップがＡＣＦ等によって実装され、さらに配線３のうち画素電極２Ｐに接続されずベアチップの入力端子に接続された分にＦＰＣ等が接続され、ＦＰＣ等が駆動装置に接続される。 Although not shown in FIG. 9, a tape carrier package (TCP) or a chip-on-film (COF) is connected to the wiring 3 on the flexible substrate 1 by an anisotropic conductive film (ACF) or the like. Are connected to a flexible printed circuit board (FPC) or the like, and the FPC or the like is connected to the driving device. Alternatively, a bare chip is mounted on the wiring 3 on the flexible substrate 1 by ACF or the like, and further, FPC or the like is connected to the wiring 3 that is not connected to the pixel electrode 2P but connected to the input terminal of the bare chip. Connected to the driving device.
　表バリアフィルム８や裏バリアフィルム９の外のフレキシブル基板１や、フレキシブル基板１に接続されたＴＣＰ、ＣＯＦ、ＦＰＣ等の部分を、ある曲率半径で折り曲げることが可能である。折り曲げることにより、例えば電子棚札等、横長の大型表示パネルとして用いることができる。 It is possible to bend the flexible substrate 1 outside the front barrier film 8 and the back barrier film 9 and portions such as TCP, COF, and FPC connected to the flexible substrate 1 with a certain radius of curvature. By bending, it can be used as a horizontally long large display panel such as an electronic shelf label.
　さらに機械強度向上や、装飾性向上のため、大型パネル全体が筐体に組み込まれていてもよい（図示せず）。 Furthermore, the entire large panel may be incorporated in the housing (not shown) for improving mechanical strength and decorativeness.
　図９の大型表示パネルの製造方法の一例を、図１０Ａ～図１０Ｅに示す。まず図１０Ａのように、フレキシブル基板１上に、画素電極２Ｐを有する薄膜トランジスタアレイを形成する。薄膜トランジスタアレイ（画素電極２Ｐの１個以外は図示を省略）の配線３は、ゲート配線３Ｇ、ソース配線３Ｓ、対向電極配線３ＣＯＭ、キャパシタ配線３Ｃを有する。あるいは、薄膜トランジスタを有せず、各画素電極２Ｐに直接接続された配線３と、対向電極配線３ＣＯＭを有してもよい。 An example of a method for manufacturing the large display panel in FIG. 9 is shown in FIGS. 10A to 10E. First, as shown in FIG. 10A, a thin film transistor array having pixel electrodes 2 </ b> P is formed on the flexible substrate 1. The wiring 3 of the thin film transistor array (not shown except for one pixel electrode 2P) includes a gate wiring 3G, a source wiring 3S, a counter electrode wiring 3COM, and a capacitor wiring 3C. Or you may have the wiring 3 directly connected to each pixel electrode 2P, and the counter electrode wiring 3COM, without having a thin-film transistor.
　配線３は、図面の下方向に引き出すように形成されている。フレキシブル基板１としては、ポリエチレンテレフタレート（ＰＥＴ）、ポリエチレンナフタレート（ＰＥＮ）、ポリエーテルスルホン（ＰＥＳ）、ポリイミド（ＰＩ）、ポリエーテルイミド（ＰＥＩ）、ナイロン（Ｎｙ）等を好適に用いることができる。また、フレキシブル基板１をフィルム基板として用いる以外に、別途用意したガラス基板に貼り付けて工程を流し、途中の工程で剥離してフィルム化してもよい。ガラス基板に貼り付ける媒介としては、加熱または冷却によって粘着性を失うフィルムが好適に用いられる。 The wiring 3 is formed so as to be drawn downward in the drawing. As the flexible substrate 1, polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (PES), polyimide (PI), polyetherimide (PEI), nylon (Ny), or the like can be suitably used. . In addition to using the flexible substrate 1 as a film substrate, it may be attached to a separately prepared glass substrate to flow the process, and the film may be peeled off during the process. As a medium to be attached to the glass substrate, a film that loses its adhesiveness by heating or cooling is preferably used.
　アクティブマトリクス型の場合、ゲート配線３Ｇおよびそれに接続されたゲート電極、キャパシタ配線３Ｃおよびそれに接続されたキャパシタ電極としては、Ａｇ、Ａｕ、Ｐｔ、Ｐｄ、Ｃｕ等の金属を好適に用いることができる。ゲート絶縁膜としては、エポキシ、アクリル等の有機絶縁膜を好適に用いることができる。ソース配線３Ｓおよびそれに接続されたソース電極、下部画素電極およびそれに接続されたドレイン電極、対向電極配線３ＣＯＭとしては、Ａｇ、Ａｕ、Ｐｔ、Ｐｄ、Ｃｕ等の金属を好適に用いることができる。下部画素電極／ゲート絶縁膜／キャパシタ電極が、蓄積容量をなす。ソース電極とドレイン電極の間に形成する半導体層としては、有機半導体や酸化物半導体が好適である。半導体層の上を、保護層が覆ってもよく、保護層としてはフッ素化樹脂が好適である。さらに、下部画素電極上に開口を有する層間絶縁膜と、該開口を介して下部画素電極に接続された画素電極を有する。層間絶縁膜は、エポキシ、アクリル等の有機絶縁膜が好適である。画素電極としては、Ａｇペースト等が好適である。直接接続型の場合、画素電極２Ｐおよび配線３としてはＡｇ、Ａｕ、Ｐｔ、Ｐｄ、Ｃｕ等の金属や、Ｃペースト、Ａｇペースト等のインクが好適である。配線部分をエポキシ、アクリル等の有機絶縁膜で覆うのが好ましい。画素電極２Ｐを配線３と同時に形成してもよいし、有機絶縁膜の開口を介して配線３に接続されるように画素電極２Ｐが別層であってもよい。 In the case of the active matrix type, metals such as Ag, Au, Pt, Pd, and Cu can be suitably used as the gate wiring 3G and the gate electrode connected thereto, the capacitor wiring 3C and the capacitor electrode connected thereto. As the gate insulating film, an organic insulating film such as epoxy or acrylic can be suitably used. As the source wiring 3S and the source electrode connected thereto, the lower pixel electrode, the drain electrode connected thereto, and the counter electrode wiring 3COM, metals such as Ag, Au, Pt, Pd, and Cu can be suitably used. The lower pixel electrode / gate insulating film / capacitor electrode forms a storage capacitor. As the semiconductor layer formed between the source electrode and the drain electrode, an organic semiconductor or an oxide semiconductor is preferable. A protective layer may cover the semiconductor layer, and a fluorinated resin is suitable as the protective layer. Furthermore, an interlayer insulating film having an opening on the lower pixel electrode and a pixel electrode connected to the lower pixel electrode through the opening are provided. The interlayer insulating film is preferably an organic insulating film such as epoxy or acrylic. As the pixel electrode, an Ag paste or the like is suitable. In the case of the direct connection type, as the pixel electrode 2P and the wiring 3, a metal such as Ag, Au, Pt, Pd, or Cu, or an ink such as C paste or Ag paste is suitable. The wiring part is preferably covered with an organic insulating film such as epoxy or acrylic. The pixel electrode 2P may be formed simultaneously with the wiring 3, or the pixel electrode 2P may be a separate layer so as to be connected to the wiring 3 through the opening of the organic insulating film.
　次に、図１０Ｂのように、対向基板４上に対向電極５および表示媒体６を有する前面板の表示媒体６側を、前記画素電極２Ｐ上に貼り合わせる。これにより、図１０Ａに示す複数の画素電極２Ｐを有する領域全体が図１０Ｂに示す表示エリア２となる。またこの時、あらかじめ表示媒体６の一部を除去し、図９のＸ－Ｘ’断面に示す接続部材１５（導電ペーストや導電ゴム等）を付けておくことで、対向電極配線３ＣＯＭと対向電極５とを電気的に接続する。対向基板４としては、ＰＥＴ、ＰＥＮ、ＰＥＳ、ＰＩ、ＰＥＩ、Ｎｙ等を好適に用いることができる。対向電極５には、ＩＴＯ等の透明導電膜が好適である。表示媒体６としては、電気泳動体が好適である。逆極性に帯電した白粒子と黒粒子をマイクロカプセルに入れたものや、異なる帯電状態の白粒子・黒粒子・赤粒子をマイクロカップに入れたものなど、様々な方式の電気泳動体を使用することができる。フレキシブル基板１の裏面には、あらかじめ、透明接着層１２を付けておく。ただし、透明接着層１２の代わりに、不透明な接着剤でもよい。 Next, as shown in FIG. 10B, the display medium 6 side of the front plate having the counter electrode 5 and the display medium 6 on the counter substrate 4 is bonded onto the pixel electrode 2P. Thereby, the entire region having the plurality of pixel electrodes 2P shown in FIG. 10A becomes the display area 2 shown in FIG. 10B. At this time, a part of the display medium 6 is removed in advance and a connection member 15 (conductive paste, conductive rubber, etc.) shown in the XX ′ cross section of FIG. 9 is attached, so that the counter electrode wiring 3COM and the counter electrode 5 is electrically connected. As the counter substrate 4, PET, PEN, PES, PI, PEI, Ny, or the like can be suitably used. A transparent conductive film such as ITO is suitable for the counter electrode 5. The display medium 6 is preferably an electrophoretic body. Various types of electrophores are used, such as those in which white particles and black particles are charged in opposite polarities in microcapsules, or those in which differently charged white, black, and red particles are in microcups. be able to. A transparent adhesive layer 12 is previously attached to the back surface of the flexible substrate 1. However, an opaque adhesive may be used instead of the transparent adhesive layer 12.
　次に、図１０Ｃのように、１枚の大型の裏バリアフィルム９上に、表示パネルを複数個縁を揃えて並べる。 Next, as shown in FIG. 10C, a plurality of display panels are arranged on one large back barrier film 9 with the edges aligned.
　そして、図１０Ｄのように、複数の表示エリア２と表示エリア２間の非表示部７Ｎからなる大型表示エリア７を有する表示部の全体を覆うように、表バリアフィルム８をラミネートする。 Then, as shown in FIG. 10D, the front barrier film 8 is laminated so as to cover the entire display portion having the large display area 7 composed of the plurality of display areas 2 and the non-display portion 7N between the display areas 2.
　さらに、図１０Ｅのように、表バリアフィルム８の周囲に、エッジシール１０の材料を塗布する。エッジシール材は、表バリアフィルム８と裏バリアフィルム９の間、または表バリアフィルム８とフレキシブル基板１の間に浸入し、表示媒体６の周囲を覆う。この状態で、熱または光でエッジシール１０を硬化させる。エッジシール１０としては、シリコーン、エポキシ、アクリル、ウレタン等の、熱または光硬化性樹脂が好適である。エッジシール１０の材料中には、シリカ等の無機微粒子が混合されていてもよい。このようにして、図９の大型表示パネルが得られる。 Further, as shown in FIG. 10E, the material of the edge seal 10 is applied around the front barrier film 8. The edge seal material penetrates between the front barrier film 8 and the back barrier film 9 or between the front barrier film 8 and the flexible substrate 1 and covers the periphery of the display medium 6. In this state, the edge seal 10 is cured with heat or light. As the edge seal 10, a heat or photo-curing resin such as silicone, epoxy, acrylic, urethane, or the like is suitable. In the material of the edge seal 10, inorganic fine particles such as silica may be mixed. In this way, the large display panel of FIG. 9 is obtained.
　図示しないが、この後、配線３にＣＯＦやＦＰＣ等を接続し、さらにＴＣＰやＣＯＦ等にＦＰＣを接続し、ＦＰＣを駆動装置に接続して駆動を行うことができる。あるいは、フレキシブル基板１の配線３上に、駆動用ＩＣを直接実装してもよい。あるいは、ＣＯＦやＦＰＣ等の接続や、駆動用ＩＣの実装を、図１０Ａ～図１０Ｅに示す工程の間のどこかで行ってもよい。また、表バリアフィルム８上に表示パネルを並べて、裏バリアフィルム９をラミネートしてもよい。 Although not shown, it is possible to drive by connecting a COF or FPC or the like to the wiring 3, connecting an FPC to TCP or COF, or the like, and connecting the FPC to a driving device. Alternatively, the driving IC may be directly mounted on the wiring 3 of the flexible substrate 1. Alternatively, connection of COF, FPC, or the like, or mounting of a driving IC may be performed somewhere during the steps shown in FIGS. 10A to 10E. Further, a display panel may be arranged on the front barrier film 8 and the back barrier film 9 may be laminated.
　またここではエッジシール１０を用いた封止について示したが、第２の実施形態同様に、ホットメルト接着剤を用いてもよい。 Further, here, the sealing using the edge seal 10 is shown, but a hot melt adhesive may be used as in the second embodiment.
　本発明は、複数の表示パネルを、１枚の大型の表バリアフィルム８と、１枚の大型の裏バリアフィルム９の、２個の部品のみで封止している、あるいは１枚の大型の表バリアフィルム８と、１枚の大型の裏バリアフィルム９と、１種類のエッジシール１０の、３個の部品のみで封止しているので、接続箇所が少なくて信頼性が高い良好な封止が実現できる。また、ＣＯＦやＦＰＣ等の接続や、駆動ＩＣの実装を図１０Ａ～図１０Ｃの間で行った場合、個々の表示パネルの状態で表示テストができる。あるいは図１０Ｂの状態で、配線３に直接給電して表示テストを行うことが可能である。そうして個々の表示パネルを動作確認した後に、大型の表バリアフィルム８と、裏バリアフィルム９とを用いて封止を行うことで、歩留まりを向上させることができるという利点がある。 In the present invention, a plurality of display panels are sealed with only two components, one large front barrier film 8 and one large back barrier film 9, or one large Since the front barrier film 8, one large back barrier film 9, and one kind of edge seal 10 are sealed with only three parts, a good seal with few connections and high reliability Can be achieved. Further, when the connection of COF or FPC or the mounting of the driving IC is performed between FIGS. 10A to 10C, a display test can be performed in the state of each display panel. Alternatively, in the state of FIG. 10B, it is possible to perform a display test by supplying power directly to the wiring 3. Thus, after confirming the operation of each display panel, sealing is performed using the large front barrier film 8 and the back barrier film 9, which has an advantage that the yield can be improved.
　なお、第１～第６の実施の形態では、薄膜トランジスタとしてボトムゲートボトムコンタクト型を用いて説明を行っているが、この構造に限定されるものではなく、様々な構造の薄膜トランジスタを適用可能である。 In the first to sixth embodiments, the bottom gate bottom contact type is described as the thin film transistor. However, the present invention is not limited to this structure, and thin film transistors having various structures can be applied. .
　具体的な実施例について説明する。
（実施例１）
　図１に示す大型表示パネルを、図２Ａ～図２Ｆに示す手順によって作製した。厚さ５０μｍのポリイミドフィルム上にＣｕをスパッタ成膜し、フォトリソによって画素電極２Ｐおよび配線３を形成した。配線３には、各画素電極２Ｐに接続されたもの以外に、対向電極配線３ＣＯＭを有する（図２Ａ）。次に絶縁層として感光性のソルダーレジストを用い、画素電極２Ｐ、対向電極配線３ＣＯＭの接続部、ＣＯＦとの接続部以外を覆った。そして、無電解Ｎｉめっきと無電解Ａｕめっきを行い、画素電極２Ｐ等の表面を保護した。 A specific embodiment will be described.
(Example 1)
The large display panel shown in FIG. 1 was produced according to the procedure shown in FIGS. 2A to 2F. Cu was sputtered on a polyimide film having a thickness of 50 μm, and pixel electrodes 2P and wirings 3 were formed by photolithography. The wiring 3 has a counter electrode wiring 3COM in addition to the one connected to each pixel electrode 2P (FIG. 2A). Next, a photosensitive solder resist was used as the insulating layer to cover the pixel electrode 2P, the connection part of the counter electrode wiring 3COM, and the connection part other than the connection part with the COF. Then, electroless Ni plating and electroless Au plating were performed to protect the surface of the pixel electrode 2P and the like.
　次に、別途、対向基板４上の対向電極５の上に表示媒体６を塗布したものを用意し、対向電極配線３ＣＯＭとの接続予定部の表示媒体６を除去し、除去した位置の対向電極５上に接続部材１５としてＡｇペーストを付けた。その対向基板４を、画素電極２Ｐを覆い、かつ対向電極配線３ＣＯＭが接続部材１５を介して対向電極４に接続されるように貼り合わせた（図２Ｂ）。また、対向基板４の上には、透明接着層１２を形成した。 Next, separately, a display medium 6 coated on the counter electrode 5 on the counter substrate 4 is prepared, and the display medium 6 in a portion to be connected to the counter electrode wiring 3COM is removed, and the counter electrode at the removed position is removed. An Ag paste was attached as a connecting member 15 on 5. The counter substrate 4 was bonded so as to cover the pixel electrode 2P and to connect the counter electrode wiring 3COM to the counter electrode 4 through the connection member 15 (FIG. 2B). A transparent adhesive layer 12 was formed on the counter substrate 4.
　こうして作製した表示パネルを複数用い、広額縁（Ｂ２）の上に狭額縁（Ｂ１）を重ねて大型表示パネルとした（図２Ｃ）。表示パネル間は、透明接着層１２によって固定される。大型表示パネルは、複数の表示エリア２と非表示部７Ｎからなる大型表示エリア７を有する。 A plurality of display panels thus manufactured were used, and a large frame (B1) was superimposed on a wide frame (B2) to form a large display panel (FIG. 2C). The display panels are fixed by the transparent adhesive layer 12. The large display panel has a large display area 7 including a plurality of display areas 2 and a non-display portion 7N.
　さらに、表バリアフィルム８を大型表示パネルの大型表示エリア７を覆うようにラミネートした（図２Ｄ）。表バリアフィルム８は、透明接着層１２によって対向基板４の表面に固定される。 Furthermore, the front barrier film 8 was laminated so as to cover the large display area 7 of the large display panel (FIG. 2D). The front barrier film 8 is fixed to the surface of the counter substrate 4 by the transparent adhesive layer 12.
　また、裏表を逆にして、ホットメルト接着剤１４付きの裏バリアフィルム９を、熱ラミネートした（図２Ｅ）。裏バリアフィルム９は、表バリアフィルム８とほぼ同形でわずかに大きくしてある。裏バリアフィルム９は、ホットメルト接着剤１４によってフレキシブル基板１の裏面に固定された。 Also, the back barrier film 9 with the hot melt adhesive 14 was heat-laminated with the reverse side (FIG. 2E). The back barrier film 9 is substantially the same shape as the front barrier film 8 and is slightly larger. The back barrier film 9 was fixed to the back surface of the flexible substrate 1 with a hot melt adhesive 14.
　そして、裏表を戻し、周囲にエッジシール１０としてアクリル系光硬化樹脂を塗布し、光硬化させた（図２Ｆ）。こうして、本発明の大型表示パネルができた。 Then, the front and back sides were returned, and an acrylic photo-curing resin was applied around the periphery as an edge seal 10 and photocured (FIG. 2F). Thus, the large display panel of the present invention was completed.
　続いて、配線３にＡＣＦを仮固定し、駆動ＩＣのＣＯＦの出力側を配線３に位置合せして加熱圧着した。ＣＯＦの入力側もＦＰＣに接続し、ＦＰＣを駆動装置に接続した。大型表示パネルの大型表示エリア７は、非表示部７Ｎの幅が小さくて目立たず、全体として良好な表示を行うことができた。 Subsequently, the ACF was temporarily fixed to the wiring 3, and the output side of the COF of the driving IC was aligned with the wiring 3 and thermocompression bonded. The input side of the COF was also connected to the FPC, and the FPC was connected to the driving device. In the large display area 7 of the large display panel, the width of the non-display portion 7N is small and unnoticeable, so that a good display can be performed as a whole.
　他の実施例について説明する。
（実施例２）
　図３に示す大型表示パネルを、図４Ａ～図４Ｇに示す手順によって作製した。フレキシブル基板１としてＰＥＴフィルムを用意し、仮固定フィルムを介してガラス基板上に仮固定した。次に、Ａｇインクをオフセット印刷することによって、ゲート配線３Ｇ、それに接続されたゲート電極、キャパシタ配線３Ｃ、それに接続されたキャパシタ電極を形成した。次に、ゲート絶縁膜としてエポキシ樹脂を塗布・焼成した。次に、Ａｇインクをオフセット印刷することによって、ソース配線３Ｓ、それに接続されたソース電極、下部画素電極、それに接続されたドレイン電極を形成した。次に、有機半導体をフレキソ印刷して半導体層を形成し、フッ素化樹脂をスクリーン印刷して保護層を形成した。次に、感光性エポキシを用い、下部画素電極上に開口を有する層間絶縁膜を形成した。次に、Ａｇペーストをスクリーン印刷して、画素電極２Ｐを形成した（図４Ａ）。ここで、フレキシブル基板１をガラス基板から剥離した。 Another embodiment will be described.
(Example 2)
The large display panel shown in FIG. 3 was produced according to the procedure shown in FIGS. 4A to 4G. A PET film was prepared as the flexible substrate 1 and temporarily fixed on a glass substrate via a temporary fixing film. Next, by performing offset printing of Ag ink, the gate wiring 3G, the gate electrode connected thereto, the capacitor wiring 3C, and the capacitor electrode connected thereto were formed. Next, an epoxy resin was applied and baked as a gate insulating film. Next, offset printing of Ag ink was performed to form the source wiring 3S, the source electrode connected thereto, the lower pixel electrode, and the drain electrode connected thereto. Next, the organic semiconductor was flexographically printed to form a semiconductor layer, and the fluorinated resin was screen printed to form a protective layer. Next, a photosensitive epoxy was used to form an interlayer insulating film having an opening on the lower pixel electrode. Next, Ag paste was screen-printed to form the pixel electrode 2P (FIG. 4A). Here, the flexible substrate 1 was peeled from the glass substrate.
　次に、別途、対向基板４上の対向電極５の上に表示媒体６を塗布したものを用意し、対向電極配線３ＣＯＭとの接続予定部の表示媒体６を除去し、除去した位置の対向電極５上に接続部材１５としてＡｇペーストを付けた。その対向基板４を、画素電極２Ｐを覆い、かつ対向電極配線３ＣＯＭが接続部材１５を介して対向電極４に接続されるように貼り合わせた（図４Ｂ）。 Next, separately, a display medium 6 coated on the counter electrode 5 on the counter substrate 4 is prepared, and the display medium 6 in a portion to be connected to the counter electrode wiring 3COM is removed, and the counter electrode at the removed position is removed. An Ag paste was attached as a connecting member 15 on 5. The counter substrate 4 was bonded so as to cover the pixel electrode 2P and to connect the counter electrode wiring 3COM to the counter electrode 4 through the connection member 15 (FIG. 4B).
　次に、各表示パネルの重なる予定の部分にあらかじめ接着層１１を形成しておき（図４Ｃ）、広額縁（Ｂ２）の上に狭額縁（Ｂ１）を重ねて大型表示パネルとした（図４Ｄ）。大型表示パネルは、複数の表示エリア２と非表示部７Ｎからなる大型表示エリア７を有する。 Next, an adhesive layer 11 is formed in advance on the portion of each display panel that is to overlap (FIG. 4C), and a narrow frame (B1) is stacked on the wide frame (B2) to form a large display panel (FIG. 4D). ). The large display panel has a large display area 7 including a plurality of display areas 2 and a non-display portion 7N.
　さらに、表示パネル同士が重ならない部分の裏面に、スペーサ１３を形成した（図４Ｅ）。スペーサ１３は、対向基板４の表面の高さを揃えるためのものであり、対向基板４＋対向電極５＋表示媒体６の厚さとほぼ同等の厚さを有する、片面接着フィルムである。 Furthermore, a spacer 13 was formed on the back surface of the portion where the display panels do not overlap (FIG. 4E). The spacer 13 is a single-sided adhesive film for aligning the height of the surface of the counter substrate 4 and having a thickness substantially equal to the thickness of the counter substrate 4 + the counter electrode 5 + the display medium 6.
　次に、ホットメルト接着剤１４付きの表バリアフィルム８を大型表示パネルの大型表示エリア７を覆うように熱ラミネートした（図４Ｆ）。表バリアフィルム８は、ホットメルト接着剤１４によって対向基板４の表面に固定される。 Next, the front barrier film 8 with the hot melt adhesive 14 was heat laminated so as to cover the large display area 7 of the large display panel (FIG. 4F). The front barrier film 8 is fixed to the surface of the counter substrate 4 by a hot melt adhesive 14.
　また、裏表を逆にして、ホットメルト接着剤１４付きの裏バリアフィルム９を、熱ラミネートした（図４Ｇ）。裏バリアフィルム９は、表バリアフィルム８とほぼ同形にしてある。裏バリアフィルム９は、ホットメルト接着剤１４によってフレキシブル基板１の裏面に固定された。こうして、本発明の大型表示パネルができた。 Also, the back barrier film 9 with the hot melt adhesive 14 was heat-laminated with the reverse side upside down (FIG. 4G). The back barrier film 9 has almost the same shape as the front barrier film 8. The back barrier film 9 was fixed to the back surface of the flexible substrate 1 with a hot melt adhesive 14. Thus, the large display panel of the present invention was completed.
　続いて、配線３にＡＣＦを仮固定し、駆動ＩＣのＣＯＦの出力側を配線３に位置合せして加熱圧着した。ＣＯＦの入力側もＦＰＣに接続し、ＦＰＣを駆動装置に接続した。大型表示パネルの大型表示エリア７は、非表示部７Ｎの幅が小さくて目立たず、全体として良好な表示を行うことができた。 Subsequently, the ACF was temporarily fixed to the wiring 3, and the output side of the COF of the driving IC was aligned with the wiring 3 and thermocompression bonded. The input side of the COF was also connected to the FPC, and the FPC was connected to the driving device. In the large display area 7 of the large display panel, the width of the non-display portion 7N is small and unnoticeable, so that a good display can be performed as a whole.
　他の実施例について説明する。
（実施例３）
　図５に示す大型表示パネルを、図６Ａ～図６Ｇに示す手順によって作製した。フレキシブル基板１としてＰＥＴフィルムを用意し、仮固定フィルムを介してガラス基板上に仮固定した。次に、Ａｇインクをオフセット印刷することによって、ゲート配線３Ｇ、それに接続されたゲート電極、キャパシタ配線３Ｃ、それに接続されたキャパシタ電極を形成した。次に、ゲート絶縁膜としてエポキシ樹脂を塗布・焼成した。次に、Ａｇインクをオフセット印刷することによって、ソース配線３Ｓ、それに接続されたソース電極、下部画素電極、それに接続されたドレイン電極を形成した。次に、有機半導体をフレキソ印刷して半導体層を形成し、フッ素化樹脂をスクリーン印刷して保護層を形成した。次に、感光性エポキシを用い、下部画素電極上に開口を有する層間絶縁膜を形成した。次に、Ａｇペーストをスクリーン印刷して、画素電極２Ｐを形成した（図６Ａ）。ここで、フレキシブル基板１をガラス基板から剥離した。 Another embodiment will be described.
(Example 3)
The large display panel shown in FIG. 5 was produced according to the procedure shown in FIGS. 6A to 6G. A PET film was prepared as the flexible substrate 1 and temporarily fixed on a glass substrate via a temporary fixing film. Next, by performing offset printing of Ag ink, the gate wiring 3G, the gate electrode connected thereto, the capacitor wiring 3C, and the capacitor electrode connected thereto were formed. Next, an epoxy resin was applied and baked as a gate insulating film. Next, offset printing of Ag ink was performed to form the source wiring 3S, the source electrode connected thereto, the lower pixel electrode, and the drain electrode connected thereto. Next, the organic semiconductor was flexographically printed to form a semiconductor layer, and the fluorinated resin was screen printed to form a protective layer. Next, a photosensitive epoxy was used to form an interlayer insulating film having an opening on the lower pixel electrode. Next, Ag paste was screen-printed to form pixel electrodes 2P (FIG. 6A). Here, the flexible substrate 1 was peeled from the glass substrate.
　次に、別途、対向基板４上の対向電極５の上に表示媒体６を塗布したものを用意し、対向電極配線３ＣＯＭとの接続予定部の表示媒体６を除去し、除去した位置の対向電極５上に接続部材１５としてＡｇペーストを付けた。その対向基板４を、画素電極２Ｐを覆い、かつ対向電極配線３ＣＯＭが接続部材１５を介して対向電極４に接続されるように貼り合わせた（図６Ｂ）。また、対向基板４の上には、透明接着層１２を形成した。 Next, separately, a display medium 6 coated on the counter electrode 5 on the counter substrate 4 is prepared, and the display medium 6 in a portion to be connected to the counter electrode wiring 3COM is removed, and the counter electrode at the removed position is removed. An Ag paste was attached as a connecting member 15 on 5. The counter substrate 4 was bonded so as to cover the pixel electrode 2P and to connect the counter electrode wiring 3COM to the counter electrode 4 through the connection member 15 (FIG. 6B). A transparent adhesive layer 12 was formed on the counter substrate 4.
　こうして作製した表示パネルを複数用い、広額縁（Ｂ２）の上に狭額縁（Ｂ１）を重ねて大型表示パネルとした（図６Ｃ）。表示パネル間は、透明接着層１２によって固定される。大型表示パネルは、複数の表示エリア２と非表示部７Ｎからなる大型表示エリア７を有する。 A plurality of display panels thus produced were used, and a large frame (B1) was stacked on the wide frame (B2) to obtain a large display panel (FIG. 6C). The display panels are fixed by the transparent adhesive layer 12. The large display panel has a large display area 7 including a plurality of display areas 2 and a non-display portion 7N.
　さらに、各表示パネルのうち最も下以外の表示パネルのフレキシブル基板１の裏面に、スペーサ１３を貼り合わせた。また、各表示パネルのうち最も上以外の表示パネルの対向基板４の表面に、透明スペーサ５を貼り合わせた（図６Ｄ）。スペーサ１３および透明スペーサ１６は、フレキシブル基板１～対向基板４を平坦に保つためのものである。 Furthermore, the spacer 13 was bonded to the back surface of the flexible substrate 1 of the display panel other than the lowermost of the display panels. Moreover, the transparent spacer 5 was bonded together on the surface of the opposing substrate 4 of display panels other than the top among each display panel (FIG. 6D). The spacer 13 and the transparent spacer 16 are for keeping the flexible substrate 1 to the counter substrate 4 flat.
　次に、表バリアフィルム８を大型表示パネルの大型表示エリア７を覆うようにラミネートした（図６Ｅ）。表バリアフィルム８は、透明接着層１２によって対向基板４の表面に固定される。 Next, the front barrier film 8 was laminated so as to cover the large display area 7 of the large display panel (FIG. 6E). The front barrier film 8 is fixed to the surface of the counter substrate 4 by the transparent adhesive layer 12.
　また、裏表を逆にして、裏面に透明接着層１２を貼り合わせた後、裏バリアフィルム９をラミネートした（図６Ｆ）。 Further, the front and back sides were reversed, and the transparent adhesive layer 12 was bonded to the back side, and then the back barrier film 9 was laminated (FIG. 6F).
　そして、裏表を戻し、周囲にエッジシール１０としてアクリル系光硬化樹脂を塗布し、光硬化させた（図６Ｇ）。こうして、本発明の大型表示パネルができた。 Then, the front and back sides were returned, and an acrylic photo-curing resin was applied around the periphery as an edge seal 10 and photocured (FIG. 6G). Thus, the large display panel of the present invention was completed.
　続いて、配線３にＡＣＦを仮固定し、駆動ＩＣのＣＯＦの出力側を配線３に位置合せして加熱圧着した。ＣＯＦの入力側もＦＰＣに接続し、ＦＰＣを駆動装置に接続した。大型表示パネルの大型表示エリア７は、非表示部７Ｎの幅が小さくて目立たず、全体として良好な表示を行うことができた。 Subsequently, the ACF was temporarily fixed to the wiring 3, and the output side of the COF of the driving IC was aligned with the wiring 3 and thermocompression bonded. The input side of the COF was also connected to the FPC, and the FPC was connected to the driving device. In the large display area 7 of the large display panel, the width of the non-display portion 7N is small and unnoticeable, so that a good display can be performed as a whole.
　他の実施例について説明する。
（実施例４）
　図９に示す大型表示パネルを、図１０Ａ～図１０Ｅに示す手順によって作製した。フレキシブル基板１としてＰＥＴフィルムを用意し、仮固定フィルムを介してガラス基板上に仮固定した。次に、Ａｇインクをオフセット印刷することによって、ゲート配線３Ｇのうち表示パネルの左右方向に延びる部分、それに接続されたゲート電極、キャパシタ配線３Ｃ、それに接続されたキャパシタ電極を形成した。次に、ゲート絶縁膜としてフォトレジストを塗布・焼成した。そして露光・現像により、ゲート配線３Ｇのうち表示パネルの左右方向に延びる部分上のゲート絶縁膜に開口を形成した。次に、Ａｇインクをオフセット印刷することによって、ソース配線３Ｓ、それに接続されたソース電極、下部画素電極、それに接続されたドレイン電極、ゲート配線３Ｇのうち表示パネルの上下方向に延びる部分を形成した。この結果、ゲート配線３Ｇのうち表示パネルの上下方向に延びる部分は、表示パネルの左右方向に延びる部分とビアホール接続された。次に、有機半導体をフレキソ印刷して半導体層を形成し、フッ素化樹脂をスクリーン印刷して保護層を形成した。次に、感光性エポキシを用い、下部画素電極上に開口を有する層間絶縁膜を形成した。次に、Ａｇペーストをスクリーン印刷して、画素電極２Ｐを形成した（図１０Ａ）。ここで、フレキシブル基板１をガラス基板から剥離した。 Another embodiment will be described.
Example 4
The large display panel shown in FIG. 9 was produced by the procedure shown in FIGS. 10A to 10E. A PET film was prepared as the flexible substrate 1 and temporarily fixed on a glass substrate via a temporary fixing film. Next, by offset printing of Ag ink, a portion of the gate wiring 3G extending in the left-right direction of the display panel, a gate electrode connected thereto, a capacitor wiring 3C, and a capacitor electrode connected thereto were formed. Next, a photoresist was applied and baked as a gate insulating film. Then, an opening was formed in the gate insulating film on the portion of the gate wiring 3G extending in the left-right direction of the display panel by exposure and development. Next, offset printing of Ag ink was performed to form the source wiring 3S, the source electrode connected thereto, the lower pixel electrode, the drain electrode connected thereto, and the gate wiring 3G extending in the vertical direction of the display panel. . As a result, a portion of the gate wiring 3G that extends in the vertical direction of the display panel is connected to a portion that extends in the horizontal direction of the display panel via holes. Next, the organic semiconductor was flexographically printed to form a semiconductor layer, and the fluorinated resin was screen printed to form a protective layer. Next, a photosensitive epoxy was used to form an interlayer insulating film having an opening on the lower pixel electrode. Next, Ag paste was screen-printed to form the pixel electrode 2P (FIG. 10A). Here, the flexible substrate 1 was peeled from the glass substrate.
　次に、別途、対向基板４上の対向電極５の上に表示媒体６を塗布したものを用意し、対向電極配線３ＣＯＭとの接続予定部の表示媒体６を除去し、除去した位置の対向電極５上に接続部材１５としてＡｇペーストを付けた。その対向基板４を、画素電極２Ｐを覆い、かつ対向電極配線３ＣＯＭが接続部材１５を介して対向電極４に接続されるように貼り合わせた（図１０Ｂ）。 Next, separately, a display medium 6 coated on the counter electrode 5 on the counter substrate 4 is prepared, and the display medium 6 in a portion to be connected to the counter electrode wiring 3COM is removed, and the counter electrode at the removed position is removed. An Ag paste was attached as a connecting member 15 on 5. The counter substrate 4 was bonded so as to cover the pixel electrode 2P and to connect the counter electrode wiring 3COM to the counter electrode 4 through the connection member 15 (FIG. 10B).
　ここで配線３にＡＣＦを仮固定し、駆動ＩＣのＣＯＦの出力側を配線３に位置合せして加熱圧着した（図示せず）。ＣＯＦの入力側もＦＰＣに接続し（図示せず）、ＦＰＣを駆動装置に接続して表示テストした。その後、駆動装置から外して、フレキシブル基板１のうち表示エリア２の裏面には、透明接着層１２を形成した。 Here, the ACF was temporarily fixed to the wiring 3, the output side of the COF of the driving IC was aligned with the wiring 3 and thermocompression bonded (not shown). The input side of the COF was also connected to the FPC (not shown), and the FPC was connected to the driving device to perform a display test. Thereafter, the transparent adhesive layer 12 was formed on the back surface of the display area 2 of the flexible substrate 1 by being removed from the driving device.
　こうして作製した表示パネルを複数用い、１枚の大型裏バリアフィルム９の上に縁を揃えて並べた（図１０Ｃ）。大型表示パネルは、複数の表示エリア２と非表示部７Ｎからなる大型表示エリア７を有する。 Using a plurality of display panels thus fabricated, the edges were aligned on one large back barrier film 9 (FIG. 10C). The large display panel has a large display area 7 including a plurality of display areas 2 and a non-display portion 7N.
　次に、表バリアフィルム８を大型表示パネルの大型表示エリア７を覆うようにラミネートした（図１０Ｄ）。表バリアフィルム８は、透明接着層１２によって対向基板４の表面に固定される。 Next, the front barrier film 8 was laminated so as to cover the large display area 7 of the large display panel (FIG. 10D). The front barrier film 8 is fixed to the surface of the counter substrate 4 by the transparent adhesive layer 12.
　そして、周囲にエッジシール１０としてアクリル系光硬化樹脂を塗布し、光硬化させた（図１０Ｅ）。こうして、本発明の大型表示パネルができた。 Then, an acrylic photo-curing resin was applied as an edge seal 10 around the periphery and photocured (FIG. 10E). Thus, the large display panel of the present invention was completed.
　続いて、ＦＰＣを駆動装置に接続して駆動を実施した。大型表示パネルの大型表示エリア７は、非表示部７Ｎの幅が小さくて目立たず、全体として良好な表示を行うことができた。 Subsequently, the FPC was connected to the driving device and driven. In the large display area 7 of the large display panel, the width of the non-display portion 7N is small and unnoticeable, so that a good display can be performed as a whole.
　以上のように、本発明によれば、複数の表示パネルを連結する事により、大きな表示を可能とする大型表示パネルにおいて、相互に隣接した表示パネルの間隔、すなわち境界部の継ぎ目を認識目立たないようにすることができる。なお、各実施形態の特徴は、適宜組み合わせて実施することができる。 As described above, according to the present invention, in a large display panel that enables a large display by connecting a plurality of display panels, the interval between display panels adjacent to each other, that is, the boundary seam is inconspicuous. Can be. Note that the features of each embodiment can be implemented in appropriate combination.
　本発明は、大型表示パネルとして有用である。特に、電子棚札のように、表示エリアの縦横寸法が大きく異なる表示に最適である。 The present invention is useful as a large display panel. In particular, it is most suitable for display such as an electronic shelf label in which the vertical and horizontal dimensions of the display area are greatly different.
　１　　フレキシブル基板
　２　　表示エリア
　２Ｐ　画素電極
　３　　配線
　３Ｇ　ゲート配線
　３Ｓ　ソース配線
　３Ｃ　キャパシタ配線
　３ＣＯＭ　対向電極配線
　４　　対向基板
　５　　対向電極
　６　　表示媒体
　７　　大型表示エリア
　７Ｎ　大型表示エリア内の非表示部
　８　　表バリアフィルム
　９　　裏バリアフィルム
　１０　　エッジシール
　１１　　接着層
　１２　　透明接着層
　１３　　スペーサ
　１４　　ホットメルト接着剤
　１５　　接続部材
　１６　　透明スペーサ
　２１　　ガラス基板 DESCRIPTION OF SYMBOLS 1 Flexible substrate 2 Display area 2P Pixel electrode 3 Wiring 3G Gate wiring 3S Source wiring 3C Capacitor wiring 3COM Counter electrode wiring 4 Counter substrate 5 Counter electrode 6 Display medium 7 Large display area 7N Non-display part in large display area 8 Table barrier film 9 Back barrier film 10 Edge seal 11 Adhesive layer 12 Transparent adhesive layer 13 Spacer 14 Hot melt adhesive 15 Connection member 16 Transparent spacer 21 Glass substrate

Claims (18)

  1. 　フレキシブル基板上の画素電極部分と対向基板上の対向電極との間に電気泳動体を挟み込んだ表示パネルを、複数組合せた大型表示パネルであって、
    　複数の前記表示パネルから前記大型表示パネルの表示部が構成され、
    　前記表示部は、全体が１枚の表バリアフィルムと１枚の裏バリアフィルムとで挟まれて封止されている、大型表示パネル。     A large display panel that combines a plurality of display panels in which an electrophoretic body is sandwiched between a pixel electrode portion on a flexible substrate and a counter electrode on a counter substrate,
    A display unit of the large display panel is configured from a plurality of the display panels,
    The display unit is a large display panel that is entirely sandwiched and sealed between one front barrier film and one back barrier film.
  2. 　前記表示部は、前記表示パネルの額縁の１辺上に、他の前記表示パネルの額縁の１辺を重ねるように組合せて構成される、請求項１に記載の大型表示パネル。 The large display panel according to claim 1, wherein the display unit is configured to be combined so that one side of a frame of another display panel is overlapped on one side of a frame of the display panel.
  3. 　前記複数の表示パネルの間に接着層を有する、請求項２に記載の大型表示パネル。 The large display panel according to claim 2, wherein an adhesive layer is provided between the plurality of display panels.
  4. 　前記複数の表示パネルの裏面の一部にスペーサを有する、請求項２または３に記載の大型表示パネル。 The large display panel according to claim 2 or 3, further comprising a spacer on a part of the back surface of the plurality of display panels.
  5. 　前記複数の表示パネルの表面の一部に透明スペーサを有する、請求項２～４のいずれか１項に記載の大型表示パネル。 The large display panel according to any one of claims 2 to 4, further comprising a transparent spacer on a part of the surface of the plurality of display panels.
  6. 　前記表示部外側の４辺のうち、１辺または２辺から配線が引き出されており、前記配線が引き出された辺では、前記表バリアフィルムと前記フレキシブル基板の間、かつ前記対向基板および前記電気泳動体の外側がエッジシールで埋められ、それ以外の辺では、前記表バリアフィルムと前記裏バリアフィルムの間、かつ、前記対向基板・前記電気泳動体・前記フレキシブル基板の外側がエッジシールで埋められている、請求項１～５のいずれか１項に記載の大型表示パネル。 Of the four sides outside the display unit, wiring is drawn from one side or two sides, and the side from which the wiring is drawn is between the front barrier film and the flexible substrate, and between the counter substrate and the electric The outer side of the electrophoretic body is filled with an edge seal, and the other side is filled with an edge seal between the front barrier film and the back barrier film and outside the counter substrate, the electrophoretic body, and the flexible substrate. The large display panel according to any one of claims 1 to 5, wherein:
  7. 　前記表バリアフィルムと前記対向基板または前記透明スペーサの間に透明接着層を有する、請求項５に記載の大型表示パネル。 The large display panel according to claim 5, further comprising a transparent adhesive layer between the front barrier film and the counter substrate or the transparent spacer.
  8. 　前記表示部外側の４辺のうち、１辺または２辺から配線が引き出されており、前記配線が引き出された辺では、前記表バリアフィルムと前記フレキシブル基板の表側、前記裏バリアフィルムと前記フレキシブル基板の裏側が接合し、それ以外の辺では、前記表バリアフィルムと前記裏バリアフィルムが接合している、請求項１～５のいずれか１項に記載の大型表示パネル。 Of the four sides outside the display unit, wiring is drawn out from one side or two sides. In the side from which the wiring is drawn out, the front barrier film and the front side of the flexible substrate, the back barrier film and the flexible side The large display panel according to any one of claims 1 to 5, wherein the back side of the substrate is bonded, and the front barrier film and the back barrier film are bonded to each other side.
  9. 　前記配線が前記表バリアフィルムまたは前記裏バリアフィルムの縁と重なる部分では、前記フレキシブル基板同士が重なっていない、請求項６～８のいずれか１項に記載の大型表示パネル。 The large display panel according to any one of claims 6 to 8, wherein the flexible substrates do not overlap each other at a portion where the wiring overlaps an edge of the front barrier film or the back barrier film.
  10. 　前記裏バリアフィルムと前記フレキシブル基板または前記スペーサの間にホットメルト接着剤を有する、請求項４に記載の大型表示パネル。 The large display panel according to claim 4, wherein a hot melt adhesive is provided between the back barrier film and the flexible substrate or the spacer.
  11. 　画素電極を有するフレキシブル基板を作製する工程と、対向基板の対向電極上に電気泳動体を有する部材を貼り合わせる工程とによって、複数の表示パネルを作製する工程と、
    　１枚の裏バリアフィルム上に前記複数の表示パネルを互いの額縁が近接するように並べて組み合わせる工程と、
    　複数の前記表示パネルからなる表示部の全体の表面を覆うように１枚の表バリアフィルムを貼る工程と、を少なくとも有する、大型表示パネルの製造方法。     A step of producing a plurality of display panels by a step of producing a flexible substrate having a pixel electrode and a step of attaching a member having an electrophoretic body to the opposite electrode of the opposite substrate;
    A step of arranging the plurality of display panels on a single back barrier film so that their frames are close together,
    And a step of affixing one front barrier film so as to cover the entire surface of the display unit including the plurality of display panels.
  12. 　画素電極を有するフレキシブル基板を作製する工程と、対向基板の対向電極上に電気泳動体を有する部材を貼り合わせる工程とによって、複数の表示パネルを作製する工程と、
    　前記表示パネルの額縁の１辺上に他の前記表示パネルの額縁の１辺を重ねるように組み合わせる工程と、
    　複数の前記表示パネルからなる表示部の全体の表面を覆うように１枚の表バリアフィルムを貼る工程と、
    　前記表示部の全体の裏面を覆うように１枚の裏バリアフィルムを貼る工程と、を少なくとも有する、大型表示パネルの製造方法。     A step of producing a plurality of display panels by a step of producing a flexible substrate having a pixel electrode and a step of attaching a member having an electrophoretic body to the opposite electrode of the opposite substrate;
    A step of combining so that one side of the other frame of the display panel overlaps on one side of the frame of the display panel;
    A step of affixing one front barrier film so as to cover the entire surface of the display unit composed of a plurality of the display panels;
    And a step of attaching a single back barrier film so as to cover the entire back surface of the display unit.
  13. 　前記組み合わせる工程において、複数の前記表示パネルを接着層を介して貼り合わせる工程を含む、請求項１１または１２に記載の大型表示パネルの製造方法。 The method for manufacturing a large display panel according to claim 11 or 12, wherein the combining step includes a step of bonding a plurality of the display panels through an adhesive layer.
  14. 　前記表バリアフィルムを貼る工程の前に、各前記表示パネルの裏面の一部にスペーサを貼る工程をさらに含む、請求項１２または１３に記載の大型表示パネルの製造方法。 The method for manufacturing a large display panel according to claim 12 or 13, further comprising a step of attaching a spacer to a part of the back surface of each display panel before the step of applying the front barrier film.
  15. 　前記表バリアフィルムを貼る工程の前に、各前記表示パネルの表面の一部に透明スペーサを貼る工程をさらに含む、請求項１２～１４のいずれか１項に記載の大型表示パネルの製造方法。 The method for manufacturing a large display panel according to any one of claims 12 to 14, further comprising a step of applying a transparent spacer to a part of the surface of each display panel before the step of applying the front barrier film.
  16. 　前記表バリアフィルムと前記裏バリアフィルムとをエッジシールする工程をさらに含む、請求項１１～１５のいずれか１項に記載の大型表示パネルの製造方法。 The method for manufacturing a large display panel according to any one of claims 11 to 15, further comprising a step of edge-sealing the front barrier film and the back barrier film.
  17. 　前記表バリアフィルムを貼る工程は、ホットメルト接着剤を有する表バリアフィルムを熱ラミネートする工程である、請求項１１～１６のいずれか１項に記載の大型表示パネルの製造方法。 The method for producing a large display panel according to any one of claims 11 to 16, wherein the step of attaching the front barrier film is a step of heat laminating a front barrier film having a hot melt adhesive.
  18. 　前記裏バリアフィルムを貼る工程は、ホットメルト接着剤を有する裏バリアフィルムを熱ラミネートする工程である、請求項１２～１６のいずれか１項に記載の大型表示パネルの製造方法。 The method for producing a large display panel according to any one of claims 12 to 16, wherein the step of applying the back barrier film is a step of thermally laminating a back barrier film having a hot melt adhesive.
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