WO2018018371A1 - 多核芯片电压计算方法及*** - Google Patents
多核芯片电压计算方法及*** Download PDFInfo
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- WO2018018371A1 WO2018018371A1 PCT/CN2016/091594 CN2016091594W WO2018018371A1 WO 2018018371 A1 WO2018018371 A1 WO 2018018371A1 CN 2016091594 W CN2016091594 W CN 2016091594W WO 2018018371 A1 WO2018018371 A1 WO 2018018371A1
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- threads
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- allocation policy
- core chip
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
Definitions
- the present invention relates to the field of electronic chips, and in particular, to a multi-core chip voltage calculation method and system.
- the chip also has its own unique place. In a broad sense, as long as it is a semiconductor wafer manufactured by microfabrication, it can be called a chip, and there is no circuit inside.
- a semiconductor light source chip for example, a mechanical chip such as a MEMS gyroscope; or a biochip such as a DNA chip.
- the intersection of the chip and the integrated circuit is on the "circuit on the silicon wafer.”
- the chipset is a series of interrelated chipsets that are interdependent and can play a bigger role, such as the processor inside the computer and the North-South Bridge chipset, the RF, baseband and power management chipset in the phone. .
- a multi-core chip voltage calculation method is provided, which solves the shortcomings that the prior art cannot realize voltage calculation and management.
- a multi-core chip voltage calculation method comprising the following steps:
- the voltage of each core is calculated based on the number of threads.
- the obtaining, according to the allocation policy, the number of threads of each kernel is specific, including:
- the number of threads per core is allocated according to the load balancing allocation policy.
- the obtaining, according to the allocation policy, the number of threads of each kernel is specific, including:
- the number of threads per core is allocated based on the number-averaged allocation policy.
- a multi-core chip voltage calculation system comprising:
- the obtaining unit is configured to acquire a total thread of the multi-core chip
- An allocation unit for knowing the number of threads of each kernel according to an allocation policy
- the allocating unit is specifically configured to allocate a number of threads of each core according to a load balancing allocation policy.
- the allocating unit is specifically configured to allocate a number of threads of each core according to a quantity-averaged allocation policy.
- the technical solution provided by the specific embodiment of the present invention acquires the total thread of the multi-core chip, learns the number of threads of each core according to the allocation strategy, and calculates the voltage of each core according to the number of threads, so it has the advantages of realizing multi-core chip voltage calculation and management. .
- FIG. 1 is a flow chart of a method for calculating a multi-core chip voltage according to the present invention
- FIG. 2 is a structural diagram of a multi-core chip voltage calculation system provided by the present invention.
- FIG. 1 is a flowchart of a multi-core chip voltage calculation method according to a first preferred embodiment of the present invention. The method is implemented by an electronic chip. The method is as shown in FIG. 1 and includes the following steps:
- Step S101 Acquire a total thread of the multi-core chip
- Step S102 Obtain a number of threads of each kernel according to an allocation policy.
- Step S103 Calculate the voltage of each core according to the number of threads.
- the technical solution provided by the specific embodiment of the present invention acquires the total thread of the multi-core chip, learns the number of threads of each core according to the allocation strategy, and calculates the voltage of each core according to the number of threads, so it has the advantages of realizing multi-core chip voltage calculation and management. .
- the implementation method of the foregoing step S102 may be specifically:
- the number of threads per core is allocated according to the load balancing allocation policy.
- the implementation method of the foregoing step S103 may be specifically:
- the number of threads per core is allocated based on the number-averaged allocation policy.
- FIG. 2 is a multi-core chip voltage calculation system according to a second preferred embodiment of the present invention.
- the system includes:
- the obtaining unit 201 is configured to acquire a total thread of the multi-core chip
- the allocating unit 202 is configured to learn the number of threads of each kernel according to the allocation policy
- the calculating unit 203 is configured to calculate the voltage of each core according to the number of threads.
- the technical solution provided by the specific embodiment of the present invention acquires the total thread of the multi-core chip, learns the number of threads of each core according to the allocation strategy, and calculates the voltage of each core according to the number of threads, so it has the advantages of realizing multi-core chip voltage calculation and management. .
- the foregoing allocating unit 202 is specifically configured to allocate a number of threads of each core according to a load balancing allocation policy.
- the foregoing allocating unit 202 is specifically configured to allocate, according to the number-averaged allocation policy, the number of threads of each core.
- Computer readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one location to another.
- a storage medium may be any available media that can be accessed by a computer.
- the computer readable medium may include random access memory (Random) Access Memory, RAM), Read-Only Memory (ROM), Electrically Erasable Programmable Read Only Memory (Electrically Erasable Programmable Read-Only Memory, EEPROM), Compact Disc Read-Only Memory, CD-ROM, or other optical disc storage, magnetic storage medium or other magnetic storage device, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer. Also. Any connection may suitably be a computer readable medium.
- a disk and a disc include a compact disc (CD), a laser disc, a compact disc, a digital versatile disc (DVD), a floppy disk, and a Blu-ray disc, wherein the disc is usually magnetically copied, and the disc is The laser is used to optically replicate the data. Combinations of the above should also be included within the scope of the computer readable media.
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Abstract
一种多核芯片电压计算方法及***,所述方法包括如下步骤:获取多核芯片的总线程(101);依据分配策略获知每个内核的线程数量(102);依据该线程数量计算每个核的电压(103)。所述方法及***具有电压计算和管理的优点。
Description
本发明涉及电子芯片领域,尤其涉及一种多核芯片电压计算方法及***。
芯片也有它独特的地方,广义上,只要是使用微细加工手段制造出来的半导体片子,都可以叫做芯片,里面并不一定有电路。比如半导体光源芯片;比如机械芯片,如MEMS陀螺仪;或者生物芯片如DNA芯片。在通讯与信息技术中,当把范围局限到硅集成电路时,芯片和集成电路的交集就是在“硅晶片上的电路”上。芯片组,则是一系列相互关联的芯片组合,它们相互依赖,组合在一起能发挥更大的作用,比如计算机里面的处理器和南北桥芯片组,手机里面的射频、基带和电源管理芯片组。
现有的芯片无法实现电压的计算和管理。
提供一种多核芯片电压计算方法,其解决了现有技术无法实现电压的计算和管理缺点。
一方面,提供一种多核芯片电压计算方法,所述方法包括如下步骤:
获取多核芯片的总线程;
依据分配策略获知每个内核的线程数量;
依据该线程数量计算每个核的电压。
可选的,所述依据分配策略获知每个内核的线程数量具体,包括:
依据负载均衡的分配策略分配每个核的线程数量。
可选的,所述依据分配策略获知每个内核的线程数量具体,包括:
依据数量均分的分配策略分配每个核的线程数量。
第二方面,提供一种多核芯片电压计算***,所述***包括:
获取单元,用于获取多核芯片的总线程;
分配单元,用于依据分配策略获知每个内核的线程数量;
计算单元,用于依据该线程数量计算每个核的电压。
可选的,所述分配单元,具体用于依据负载均衡的分配策略分配每个核的线程数量。
可选的,所述分配单元,具体用于依据数量均分的分配策略分配每个核的线程数量。
本发明具体实施方式提供的技术方案获取多核芯片的总线程,依据分配策略获知每个内核的线程数量,依据该线程数量计算每个核的电压,所以其具有实现多核芯片电压计算和管理的优点。
为了更清楚地说明本发明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1为本发明提供的一种多核芯片电压计算方法的流程图;
图2为本发明提供的一种多核芯片电压计算***的结构图。
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
参阅图1,图1为本发明第一较佳实施方式提供的一种多核芯片电压计算方法的流程图,该方法由电子芯片来完成,该方法如图1所示,包括如下步骤:
步骤S101、获取多核芯片的总线程;
步骤S102、依据分配策略获知每个内核的线程数量;
步骤S103、依据该线程数量计算每个核的电压。
本发明具体实施方式提供的技术方案获取多核芯片的总线程,依据分配策略获知每个内核的线程数量,依据该线程数量计算每个核的电压,所以其具有实现多核芯片电压计算和管理的优点。
可选的,上述步骤S102的实现方法具体可以为:
依据负载均衡的分配策略分配每个核的线程数量。
可选的,上述步骤S103的实现方法具体可以为:
依据数量均分的分配策略分配每个核的线程数量。
参阅图2,图2为本发明第二较佳实施方式提供的一种多核芯片电压计算***,该***包括:
获取单元201,用于获取多核芯片的总线程;
分配单元202,用于依据分配策略获知每个内核的线程数量;
计算单元203,用于依据该线程数量计算每个核的电压。
本发明具体实施方式提供的技术方案获取多核芯片的总线程,依据分配策略获知每个内核的线程数量,依据该线程数量计算每个核的电压,所以其具有实现多核芯片电压计算和管理的优点。
可选的,上述分配单元202,具体用于依据负载均衡的分配策略分配每个核的线程数量。
可选的,上述分配单元202,具体用于依据数量均分的分配策略分配每个核的线程数量。
需要说明的是,对于前述的各方法实施方式或实施例,为了简单描述,故将其都表述为一系列的动作组合,但是本领域技术人员应该知悉,本发明并不受所描述的动作顺序的限制,因为根据本发明,某些步骤可以采用其他顺序或者同时进行。其次,本领域技术人员也应该知悉,说明书中所描述实施方式或实施例均属于优选实施例,所涉及的动作和单元并不一定是本发明所必须的。
在上述实施例中,对各个实施例的描述都各有侧重,某个实施例中没有详述的部分,可以参见其他实施例的相关描述。
本发明实施例方法中的步骤可以根据实际需要进行顺序调整、合并和删减。
本发明实施例装置中的单元可以根据实际需要进行合并、划分和删减。本领域的技术人员可以将本说明书中描述的不同实施例以及不同实施例的特征进行结合或组合。
通过以上的实施方式的描述,所属领域的技术人员可以清楚地了解到本发明可以用硬件实现,或固件实现,或它们的组合方式来实现。当使用软件实现时,可以将上述功能存储在计算机可读介质中或作为计算机可读介质上的一个或多个指令或代码进行传输。计算机可读介质包括计算机存储介质和通信介质,其中通信介质包括便于从一个地方向另一个地方传送计算机程序的任何介质。存储介质可以是计算机能够存取的任何可用介质。以此为例但不限于:计算机可读介质可以包括随机存取存储器(Random
Access Memory,RAM)、只读存储器(Read-Only Memory,ROM)、电可擦可编程只读存储器(Electrically
Erasable Programmable Read-Only Memory,EEPROM)、只读光盘(Compact Disc Read-Only
Memory,CD-ROM)或其他光盘存储、磁盘存储介质或者其他磁存储设备、或者能够用于携带或存储具有指令或数据结构形式的期望的程序代码并能够由计算机存取的任何其他介质。此外。任何连接可以适当的成为计算机可读介质。例如,如果软件是使用同轴电缆、光纤光缆、双绞线、数字用户线(Digital
Subscriber
Line,DSL)或者诸如红外线、无线电和微波之类的无线技术从网站、服务器或者其他远程源传输的,那么同轴电缆、光纤光缆、双绞线、DSL或者诸如红外线、无线和微波之类的无线技术包括在所属介质的定影中。如本发明所使用的,盘(Disk)和碟(disc)包括压缩光碟(CD)、激光碟、光碟、数字通用光碟(DVD)、软盘和蓝光光碟,其中盘通常磁性的复制数据,而碟则用激光来光学的复制数据。上面的组合也应当包括在计算机可读介质的保护范围之内。
总之,以上所述仅为本发明技术方案的较佳实施例而已,并非用于限定本发明的保护范围。凡在本发明的精神和原则之内,所作的任何修改、等同替换、改进等,均应包含在本发明的保护范围之内。
Claims (6)
- 一种多核芯片电压计算方法,其特征在于,所述方法包括如下步骤:获取多核芯片的总线程;依据分配策略获知每个内核的线程数量;依据该线程数量计算每个核的电压。
- 根据权利要求1所述的方法,其特征在于,所述依据分配策略获知每个内核的线程数量具体,包括:依据负载均衡的分配策略分配每个核的线程数量。
- 根据权利要求1所述的方法,其特征在于,所述依据分配策略获知每个内核的线程数量具体,包括:依据数量均分的分配策略分配每个核的线程数量。
- 一种多核芯片电压计算***,其特征在于,所述***包括:获取单元,用于获取多核芯片的总线程;分配单元,用于依据分配策略获知每个内核的线程数量;计算单元,用于依据该线程数量计算每个核的电压。
- 根据权利要求4所述的***,其特征在于,所述分配单元,具体用于依据负载均衡的分配策略分配每个核的线程数量。
- 根据权利要求4所述的***,其特征在于,所述分配单元,具体用于依据数量均分的分配策略分配每个核的线程数量。
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