WO2018002766A1 - Display device and moving body - Google Patents

Display device and moving body Download PDF

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Publication number
WO2018002766A1
WO2018002766A1 PCT/IB2017/053615 IB2017053615W WO2018002766A1 WO 2018002766 A1 WO2018002766 A1 WO 2018002766A1 IB 2017053615 W IB2017053615 W IB 2017053615W WO 2018002766 A1 WO2018002766 A1 WO 2018002766A1
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WO
WIPO (PCT)
Prior art keywords
circuit
signal
function
display device
display
Prior art date
Application number
PCT/IB2017/053615
Other languages
French (fr)
Japanese (ja)
Inventor
黒川義元
Original Assignee
株式会社半導体エネルギー研究所
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Publication of WO2018002766A1 publication Critical patent/WO2018002766A1/en

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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B60—VEHICLES IN GENERAL
    • B60K—ARRANGEMENT OR MOUNTING OF PROPULSION UNITS OR OF TRANSMISSIONS IN VEHICLES; ARRANGEMENT OR MOUNTING OF PLURAL DIVERSE PRIME-MOVERS IN VEHICLES; AUXILIARY DRIVES FOR VEHICLES; INSTRUMENTATION OR DASHBOARDS FOR VEHICLES; ARRANGEMENTS IN CONNECTION WITH COOLING, AIR INTAKE, GAS EXHAUST OR FUEL SUPPLY OF PROPULSION UNITS IN VEHICLES
    • B60K35/00—Instruments specially adapted for vehicles; Arrangement of instruments in or on vehicles
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B60—VEHICLES IN GENERAL
    • B60R—VEHICLES, VEHICLE FITTINGS, OR VEHICLE PARTS, NOT OTHERWISE PROVIDED FOR
    • B60R11/00—Arrangements for holding or mounting articles, not otherwise provided for
    • B60R11/02—Arrangements for holding or mounting articles, not otherwise provided for for radio sets, television sets, telephones, or the like; Arrangement of controls thereof
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/02—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory

Definitions

  • One embodiment of the present invention relates to a display device.
  • One embodiment of the present invention relates to a semiconductor device.
  • One embodiment of the present invention also relates to a moving object.
  • one embodiment of the present invention is not limited to the above technical field.
  • the technical field of one embodiment of the invention disclosed in this specification and the like relates to an object, a method, or a manufacturing method.
  • one embodiment of the present invention relates to a process, a machine, a manufacture, or a composition (composition of matter). Therefore, the technical field of one embodiment of the present invention disclosed in this specification more specifically includes a semiconductor device, a display device, a liquid crystal display device, a light-emitting device, a lighting device, a power storage device, a memory device, a circuit, an arithmetic circuit, These driving methods or manufacturing methods thereof can be given as an example.
  • Patent Document 1 describes an image display device and method using a liquid crystal display device and an image processing system that can display a subject as it is directly viewed under illumination conditions at the time of display.
  • an object of one embodiment of the present invention is to provide a display device whose display quality is hardly affected by a use environment.
  • it is an object to provide a display device that can reduce power consumption.
  • Another object of one embodiment of the present invention is to provide a semiconductor device such as a peripheral circuit that can reduce power consumption. Another object of one embodiment of the present invention is to provide a semiconductor device such as a peripheral circuit whose size can be suppressed. Alternatively, according to one embodiment of the present invention, it is an object to provide a novel circuit.
  • an object of one embodiment of the present invention is to provide a novel semiconductor device or the like. Note that the description of these problems does not disturb the existence of other problems. Note that one embodiment of the present invention does not necessarily have to solve all of these problems. Issues other than these will be apparent from the description of the specification, drawings, claims, etc., and other issues can be extracted from the descriptions of the specification, drawings, claims, etc. It is.
  • One embodiment of the present invention includes a first display element, a second display element, a signal processing circuit, and an arithmetic circuit.
  • the signal processing circuit corrects the first signal in accordance with the first parameter.
  • a function of correcting the second signal according to the second parameter and the arithmetic circuit uses the function of generating the first parameter by arithmetic processing using the neural network and the neural network.
  • the first display element uses the first signal corrected in the signal processing circuit, and displays the gradation using the reflection of light.
  • the second display element has a function of using the second signal corrected in the signal processing circuit and displaying a gray scale according to the intensity of light emission.
  • the fourth circuit and the fifth circuit the first circuit having a function of outputting the third signal to the third circuit via the second circuit, and the third circuit.
  • the fourth circuit has a function of outputting the fourth signal to the outside, and the fifth circuit has a function of generating a sixth signal from the difference between the fifth signal and the fourth signal.
  • the analog memory is a display device including a transistor having a metal oxide in a channel formation region.
  • the first signal is preferably a signal for adjusting the color of the display device
  • the second signal is a signal for adjusting the number of gradations of the display device.
  • one embodiment of the present invention is a display device mounted on a moving body, which includes a display element, a signal processing circuit, an arithmetic circuit, and a first photosensor, and the signal processing circuit includes:
  • the arithmetic circuit has a function of correcting the first signal according to the parameter, and the arithmetic circuit is based on information from the first photosensor and information from the second photosensor provided in the moving body.
  • the display element has a function of displaying a gray scale using the first signal corrected in the signal processing circuit, and the arithmetic circuit has the first function.
  • the third circuit has a function of outputting a signal corresponding to the amount of current of the input signal
  • the fifth circuit has a function of outputting to the fifth circuit via the circuit
  • the fifth circuit has a function of outputting the fourth signal according to the current amount of the input signal to the outside.
  • the circuit has a function of generating a sixth signal from a difference between the fifth signal and the fourth signal, the fourth signal is a parameter
  • the fifth signal is a signal input from the outside.
  • an analog memory for storing data corresponding to a weighting factor, a writing circuit for changing data, and an input signal are weighted according to the data.
  • the analog memory is a display device including a transistor including a metal oxide in a channel formation region.
  • one embodiment of the present invention is a display device mounted on a moving body, which includes a first display element, a second display element, a signal processing circuit, an arithmetic circuit, and a first optical sensor.
  • the signal processing circuit has a function of correcting the first signal in accordance with the first parameter and a function of correcting the second signal in accordance with the second parameter.
  • a function for generating a first parameter by an arithmetic process using a neural network based on information from the optical sensor of the first and information from a second optical sensor provided on the moving body, and based on the information
  • a function of generating a second parameter by arithmetic processing using a neural network uses the first signal corrected by the signal processing circuit and reflects light.
  • the display element uses a second signal corrected in the signal processing circuit and has a function of displaying a gray scale according to the intensity of light emission.
  • the arithmetic circuit includes a first circuit, a second circuit, and a third circuit.
  • the first circuit has a function of outputting the third signal to the third circuit via the second circuit, and the third circuit.
  • This circuit has a function of outputting a signal corresponding to the current amount of the input signal to the fifth circuit via the fourth circuit, and the fifth circuit has a function of outputting the current amount of the input signal.
  • the fifth circuit has a function of generating a sixth signal from a difference between the fifth signal and the fourth signal, and a fourth circuit corresponding to the fourth signal.
  • the signal is at least one of the first parameter and the second parameter
  • the fifth signal is an externally input signal
  • the fourth circuit and the fourth circuit are each an analog memory that stores data corresponding to a weighting factor, a writing circuit that changes data, and a multiplication that outputs an input signal as a signal weighted according to the data
  • the analog memory is a display device including a transistor including a metal oxide in a channel formation region.
  • a plurality of second photosensors are provided, and a plurality of types of photosensors having a function of acquiring light intensity information of light having different wavelengths are provided as the plurality of second photosensors. preferable.
  • one embodiment of the present invention is a moving object including a display device, and the display device includes a display element, a signal processing circuit, an arithmetic circuit, and a first optical sensor, and the moving object is
  • the signal processing circuit has a function of correcting the first signal according to the parameter
  • the arithmetic circuit has information from the first photosensor and information from the second photosensor.
  • the display element has a function of generating gradation by using the first signal corrected in the signal processing circuit.
  • the arithmetic circuit includes a first circuit, a second circuit, a third circuit, a fourth circuit, and a fifth circuit. The first circuit outputs the third signal to the second circuit.
  • the third circuit has a function of outputting to the third circuit, and the third circuit has a current amount of the input signal.
  • the fifth circuit has a function of generating a sixth signal from a difference between the fifth signal and the fourth signal, the fourth signal is a parameter, and the fifth signal Is a signal input from the outside.
  • Each of the second circuit and the fourth circuit is an analog memory for storing data corresponding to a weighting factor, a writing circuit for changing data, and an input signal.
  • the analog memory is a moving body having a transistor having a metal oxide in a channel formation region.
  • the multiplication circuit outputs a weighted signal according to data.
  • a display device in which display quality is hardly affected by a use environment can be provided.
  • a display device with low power consumption can be provided with the above structure.
  • a semiconductor device such as a peripheral circuit that can reduce power consumption can be provided.
  • a semiconductor device such as a peripheral circuit whose size can be suppressed can be provided by the above structure.
  • a novel circuit can be provided.
  • a novel semiconductor device or the like can be provided. Note that the description of these effects does not disturb the existence of other effects. Note that one embodiment of the present invention does not necessarily have all of these effects. It should be noted that the effects other than these are naturally obvious from the description of the specification, drawings, claims, etc., and it is possible to extract the other effects from the descriptions of the specification, drawings, claims, etc. It is.
  • FIG. 6 illustrates a configuration example of a display device.
  • FIG. 6 illustrates a configuration example of a display device.
  • FIG. 6 illustrates an example of a block diagram.
  • FIG. 6 illustrates an example of a block diagram.
  • 10A and 10B each illustrate an example of a block diagram and an example of a circuit diagram.
  • FIG. 6 illustrates an example of a circuit diagram.
  • FIG. 6 illustrates a configuration example of a display device.
  • FIG. 6 illustrates a configuration example of a display device.
  • FIG. 10 illustrates a configuration example of a pixel of a display device.
  • FIG. 10 illustrates a configuration example of a pixel of a display device.
  • FIG. 10 illustrates a configuration example of a pixel of a display device.
  • FIG. 10 illustrates a configuration example of a pixel of a display device.
  • FIG. 14 illustrates an example of a cross-sectional structure of a display device. The figure which shows an example of the external appearance of a display apparatus. The figure which shows an example of the cross-section of an optical sensor.
  • FIG. 14 illustrates an example of an electronic device.
  • FIG. 14 illustrates an example of an electronic device.
  • the figure which shows an example of a moving body The figure which shows an example of a moving body.
  • FIG. 10 is a circuit diagram illustrating a pixel. 6 is a timing chart illustrating operation of a pixel. 6 is a timing chart illustrating operation of a pixel.
  • a semiconductor device refers to a device using semiconductor characteristics, and includes a circuit including a semiconductor element (a transistor, a diode, or the like), a device including the circuit, or the like. In addition, it refers to all devices that can function by utilizing semiconductor characteristics. For example, an integrated circuit and a chip including the integrated circuit are examples of a semiconductor device.
  • a memory device, a display device, a light-emitting device, a lighting device, an electronic device, or the like may be a semiconductor device or may have a semiconductor device.
  • X and Y are connected, X and Y are electrically connected, and X and Y function. And the case where X and Y are directly connected are disclosed in this specification and the like. Therefore, it is not limited to a predetermined connection relationship, for example, the connection relationship shown in the figure or text, and anything other than the connection relation shown in the figure or text is also described in the figure or text.
  • X and Y are objects (for example, devices, elements, circuits, wirings, electrodes, terminals, conductive films, layers, etc.).
  • the transistor has three terminals called gate, source, and drain.
  • the gate is a node that functions as a control node for controlling the conduction state of the transistor.
  • One of the two input / output nodes functioning as a source or a drain serves as a source and the other serves as a drain depending on the type of the transistor and the potential applied to each terminal. Therefore, in this specification and the like, the terms source and drain can be used interchangeably.
  • two terminals other than the gate may be referred to as a first terminal and a second terminal.
  • a node can be restated as a terminal, a wiring, an electrode, a conductive layer, a conductor, an impurity region, or the like depending on a circuit configuration, a device structure, or the like. Further, a terminal, a wiring, or the like can be referred to as a node.
  • the voltage indicates a potential difference between a certain potential and a reference potential (for example, a ground potential (GND) or a source potential).
  • a reference potential for example, a ground potential (GND) or a source potential.
  • a voltage can be rephrased as a potential. Note that the potential is relative. Therefore, even if it is described as a ground potential, it may not necessarily mean 0V.
  • film and layer can be interchanged with each other depending on the case or circumstances.
  • the term “insulating film” may be changed to the term “insulating layer” in some cases.
  • a metal oxide when a metal oxide can form a transistor having at least one of an amplifying function, a rectifying function, and a switching function, a metal oxide semiconductor (OS for short) or an oxide semiconductor write.
  • each circuit block in the block diagram shown in the drawing specifies the positional relationship for the sake of explanation. Even if it is shown that different functions are realized by different circuit blocks, the same circuit is used in the actual circuit block. In some cases, different functions are provided in the block. Also, the function of each circuit block is to specify the function for explanation, and even if it is shown as one circuit block, the processing performed in one circuit block is performed in a plurality of circuit blocks in the actual circuit block. In some cases, it is provided.
  • FIG. 1 is a block diagram illustrating a structure of a display device 200 according to one embodiment of the present invention.
  • a display device 200 illustrated in FIG. 1 includes a display unit 102 including a reflective display element 101 such as a liquid crystal element, and a display unit 104 including a light emitting display element 103 such as an EL element.
  • the display unit 102 has an area overlapping with the display unit 104. In the overlapping area, light emitted from the light emitting display element 103 of the display unit 104 passes through the display unit 102. Alternatively, external light that has passed through the display unit 104 enters the display unit 102 in the overlapping region.
  • the display device 200 illustrated in FIG. 1 includes a drive circuit (SD105a) having a function of controlling input of an image signal to the display unit 102 and a drive circuit having a function of controlling input of an image signal to the display unit 104. (SD105b).
  • SD105a a drive circuit having a function of controlling input of an image signal to the display unit 102
  • SD105b a drive circuit having a function of controlling input of an image signal to the display unit 104.
  • the display device 200 illustrated in FIG. 1 includes a drive circuit (SD105a) having a function of controlling input of an image signal to the display unit 102 and a drive circuit having a function of controlling input of an image signal to the display unit 104.
  • the display unit 102 can display an image by controlling the gradation of the reflective display element 101. Further, the display unit 104 can display an image by controlling the gradation of the light emitting display element 103.
  • an image can be displayed using one or both of the display portion 102 and the display portion 104.
  • the display unit 102 uses the reflective display element 101, external light can be used as a light source when displaying the image.
  • external light can be used, power consumption of the display device 200 can be suppressed by displaying an image only on the display unit 102.
  • the display unit 104 uses the light-emitting display element 103, an image can be displayed without preparing a separate light source or using external light.
  • the display quality of the image can be improved even when the intensity of external light is low. That is, high display quality can be ensured regardless of the use environment of the display device 200.
  • an image can be displayed using both the display portion 102 and the display portion 104.
  • the number of gradations of an image that can be displayed on the display device 200 can be increased.
  • the range of the color gamut of an image that can be displayed on the display device 200 can be expanded.
  • the display device 200 includes a controller (CTL 106) having a function of generating an image signal supplied to the SD 105a and an image signal supplied to the SD 105b from the image data Vdata.
  • the CTL 106 also has a function of performing various corrections on the input image data Vdata by signal processing.
  • the function of performing various corrections on the image data Vdata can be said to be a function of performing various corrections on the image signal Vsiga and the image signal Vsigb.
  • the image signal Vsiga generated by the CTL 106 is supplied to the SD 105a.
  • the image signal Vsigb generated by the CTL 106 is supplied to the SD 105a.
  • gamma correction that matches the characteristics of the reflective display element 101
  • luminance correction that matches the deterioration characteristics of the light-emitting display element 103, and the like can be performed.
  • usage conditions such as the intensity of external light in the usage environment of the display device 200, the incident angle of external light incident on the display device 200, and user preferences. The color and the number of gradations can be adjusted according to the above.
  • the CTL 106 includes a signal processing circuit (SPC 108) and an arithmetic circuit (AIC 107).
  • the AIC 107 uses the signal Sig-ld including information on usage conditions such as the intensity of external light in the usage environment of the display device 200 described above, the incident angle of external light incident on the display device 200, and user preferences.
  • the signal Vsiga and the image signal Vsigb have a function of calculating parameters for adjusting the color and the number of gradations.
  • the SPC 108 has a function of adjusting the color and the number of gradations of the image signal Vsiga and the image signal Vsigb using the parameters calculated by the AIC 107.
  • the AIC 107 has a function of performing analog arithmetic processing using analog data, similarly to information processing of analog data executed in a brain having neurons as basic elements.
  • FIG. 2 shows an example of a more detailed configuration of the display device 200.
  • FIG. 2 illustrates an input device 109 having a function of supplying usage condition information to the display device 200 and a host 185 in addition to the display device 200.
  • the input device 109 may be included in the display device 200.
  • the CTL 106 includes an interface 150, a frame memory 151, a decoder 152, a sensor controller 153, a signal controller 154, a clock generation circuit 155, an image processing unit 160, a memory 170, a timing controller 173, and a register 175.
  • the input device 109 various sensors such as an optical sensor 143, an open / close sensor 144, and an acceleration sensor 146 can be used.
  • a touch panel 181, a keyboard 182, a pointing device 183, or the like can be used as the input device 109.
  • the input device 109 may be appropriately selected according to the type of usage conditions supplied to the display device 200.
  • the information obtained by the optical sensor 143 is used as the use condition information. it can.
  • information obtained from the touch panel 181, keyboard 182, pointing device 183, or the like can be used as usage condition information as the input device 109. .
  • the interface 150 has a function of controlling input of image data Vdata from the host 185 and various control signals Sigcon to the CTL 106.
  • the host 185 includes a CPU (Central Processing Unit) or a GPU (Graphics Processing Unit).
  • the frame memory 151 has a function of storing image data input to the CTL 106.
  • the decoder 152 has a function of expanding the compressed image data when the image data stored in the frame memory 151 is in a compressed state. Note that the decoder 152 may be electrically connected to the frame memory 151 so as to decompress the image data before being stored in the frame memory 151.
  • the image processing unit 160 has a function of performing various kinds of image processing on the image data and generating an image signal.
  • the image processing includes correction for adjusting the color and the number of gradations according to the use conditions.
  • Other examples of various image processing performed by the image processing unit 160 include gamma correction, adjustment of the luminance of the light emitting display element 103 in accordance with the deterioration of the light emitting display element 103, and the like.
  • the image processing unit 160 includes an SPC 108 and an AIC 107.
  • the AIC 107 has a function of calculating parameter values for adjusting the color and the number of gradations using the information on the use conditions, and the SPC 108 uses the parameter values to adjust the color and gradation. It has a function of adjusting the number of image data or image signals.
  • each table value corresponds to the above parameter.
  • the value defining the function form corresponds to the parameter.
  • the AIC 107 may have a neural network which will be described later, and have a function of performing supervised learning.
  • the parameters can be optimized by the AIC 107 learning using the input usage condition information as teacher data.
  • information on usage conditions such as an incident angle of external light detected by a sensor, an intensity of external light, and an angle of a display device corresponds to learning data.
  • parameters reflecting user preferences such as color and gradation selected by the user correspond to teacher data.
  • the AIC 107 can output parameters that seem to be appropriate for the usage condition information during use. Image processing may be performed in the SPC 108 using the output parameters.
  • the memory 170 has a function of temporarily storing image signals.
  • the image signal generated by the image processing unit 160 is supplied to the SD 105a or SD 105b via the memory 170.
  • the timing controller 173 has a function of generating timing signals used in the operations of the SD 105 a, SD 105 b, the display unit 102, and the display unit 104.
  • the clock generation circuit 155 has a function of generating a clock signal used in the CTL 106.
  • the signal controller 154 has a function of controlling various circuits in the CTL 106 using various control signals Sigcon input via the interface 150.
  • the CTL 106 may include a power controller having a function of controlling power supply to various circuits in the CTL 106.
  • temporarily shutting off power supply to an unused circuit is referred to as power gating.
  • the register 175 stores data used for the operation of the CTL 106.
  • the data stored in the register 175 includes parameters used by the image processing unit 160 to perform correction processing, parameters used by the timing controller 173 to generate waveforms of various timing signals, and the like.
  • the register 175 may include a scan chain register including a plurality of registers.
  • the sensor controller 153 generates a signal including usage condition information based on information obtained by the optical sensor 143, the open / close sensor 144, or the acceleration sensor 146.
  • the signal is supplied to the image processing unit 160 via the signal controller 154 or not via the signal controller 154.
  • the optical sensor 143 has a function of obtaining light intensity information.
  • the acceleration sensor 146 has a function of obtaining information on the tilt of the display device 200.
  • a gyro sensor or the like may be used as a module for obtaining tilt information.
  • the open / close sensor 144 has a function of obtaining information on an angle between a case where the display device 200 is supported and another case.
  • the display device 200 may have a function of obtaining information on the angle between the housings.
  • the signal controller 154 has a function of determining whether one of the display unit 102 and the display unit 104 is used for displaying an image, or both, according to the use condition information obtained in the input device 109. Have.
  • the display unit 102 displays the image on the display unit 102 and the display unit 104.
  • the signal controller 154 can control various circuits in the CTL 106.
  • the display unit 104 of the display unit 102 and the display unit 104 displays an image.
  • the signal controller 154 can control various circuits in the CTL 106.
  • the signal controller 154 increases the number of gradations of an image that can be displayed on the display device 200 or expands the range of the color gamut of the image that can be displayed on the display device 200 in accordance with the use condition information obtained by the input device 109.
  • the signal controller 154 can control various circuits in the CTL 106 so as to display an image on both the display unit 102 and the display unit 104.
  • the display unit 102 using a reflective display element and the display unit 104 using a light-emitting display element can display different images.
  • many liquid crystal elements and electronic paper that can be applied to a reflective display element have a slow operation speed (it takes time to display a picture). Therefore, a still image as a background can be displayed on the display unit 102 using a reflective display element, and a moving mouse pointer image or the like can be displayed on the display unit 104 using a light-emitting display element.
  • the display device 200 can achieve both smooth video display and low power consumption.
  • the frame memory 151 may be provided with an area for storing image data to be displayed on each of the reflective display element 101 and the light emitting display element 103.
  • This embodiment can be implemented in appropriate combination with any of the other embodiments.
  • a CNN Convolutional Neural Network
  • a perceptron type neural network can be used for the arithmetic circuit according to one embodiment of the present invention.
  • the AIC 107 which is an arithmetic circuit preferably has a neural network as a configuration.
  • a neural network as a configuration.
  • an example is shown in which a multilayer hierarchical perceptron is used as a neural network.
  • the neural network includes neurons and synapses that connect the neurons.
  • a model of the neuron 50 and the synapse 60 is shown in FIG.
  • the i- th input be x i
  • the i-th synaptic weight be w i .
  • Data of weights w 1 to w L included in the synapse 60 are set for the inputs x 1 to x L.
  • the output from the neuron 50 outputs “H” (referred to as high level or H level) when the threshold value ⁇ O is exceeded (this phenomenon is called “ignition” as will be described later).
  • FIG. 1 A model of the multilayer hierarchical perceptron is shown in FIG.
  • Inputs x 1 to x L are output from the input layer IL.
  • the hidden layer HL has a hidden synapse HS and a hidden neuron HN.
  • the output layer OL has an output synapse OS and an output neuron ON.
  • the inputs x 1 to x L are given to the hidden neuron HN as a value corresponding to the product of the weight coefficient held by the hidden synapse HS.
  • the output from the hidden neurons HN is a product of the weighting factors output synapse OS holds, and the threshold theta H, as a value corresponding to, provided to each output neuron ON. From the respective output neuron ON, outputs y 1 to y n are output.
  • the multilayer hierarchical perceptron may have a plurality of hidden layers HL.
  • the inputs x 1 to x L data such as an incident angle and an angle of external light detected by a sensor included in the display device, an angle of the display device, and the like are given.
  • the output y 1 through y n it can be obtained a parameter for setting the brightness of the display device, the color tone, and the like.
  • FIG. 4 is a block diagram illustrating an example of a more specific neural network included in the AIC 107.
  • 4A shows an input neuron circuit IN, a hidden neuron circuit HN, an output neuron circuit ON, a hidden synapse circuit HS, an output synapse circuit OS, a hidden error circuit HE, and an output error circuit OE.
  • the input layer IL has an input neuron circuit IN
  • the hidden layer HL has a hidden neuron circuit HN
  • a hidden synapse circuit HS a hidden error circuit HE
  • the output layer OL has an output.
  • It has an error circuit OE, an output neuron circuit ON, and an output synapse circuit OS.
  • Signal I corresponds to an input signal
  • signal T corresponds to a teacher signal T
  • signal O corresponds to an output signal.
  • the hidden layer HL illustrated in FIG. 4A may have two or more layers as illustrated in FIG. With this configuration, more complicated learning can be performed.
  • the color adjustment of the display device 200 and the number of gradations are output. Can be obtained.
  • FIG. 5 is a block diagram showing an example of a detailed configuration of the neural network shown in FIG.
  • FIG. 5 shows L (N is a natural number) input neuron circuits IN constituting a neural network, m (m is a natural number) hidden neuron circuits HN, n (n is a natural number) output neuron circuits ON, ( L + 1) ⁇ m hidden synapse circuits HS, (m + 1) ⁇ n output synapse circuits OS, m hidden error circuits HE, and n output error circuits OE are illustrated.
  • the input neuron circuit IN [i] amplifies an input signal I [i] from the outside of the neural network with an amplifier or the like, and generates an output signal x [i].
  • FIG. 6A shows the configuration of the hidden synapse circuit HS [j, i] (j and i are natural numbers).
  • the hidden synapse circuit HS [j, i] includes an analog memory AM1, a multiplication circuit MUL1, and a multiplication circuit MUL2.
  • the analog memory AM1 has a function of storing data corresponding to the weighting factor w [j, i] and outputting a corresponding voltage.
  • the multiplication circuit MUL1 multiplies the output signal x [i] of the input neuron circuit IN by the weight coefficient w [j, i] of the analog memory AM1, and generates the output signal w [j, i] x [i]. .
  • a current corresponding to the multiplication result is supplied as the output signal w [j, i] x [i].
  • the multiplication circuit MUL2 multiplies the output signal x [i] of the input neuron circuit IN and the output signal dx [j] of the hidden error circuit HE [j] to generate a signal dw.
  • a current corresponding to the multiplication result is supplied as the signal dw.
  • the signal dw is supplied as a current corresponding to a change in the weighting factor w [j, i] stored in the analog memory AM1. That is, the multiplication circuit MUL2 corresponds to a writing circuit that changes data in the analog memory AM1.
  • the input signal x [0] is ⁇ 1
  • the weighting factors w [1, 0] to w [m, 0] are ⁇ H [1. ]
  • To ⁇ H [m] are given, and the output signals w [1, 0] x [0] to w [m, 0] x [0] are ⁇ H [1] to ⁇ H [m]. ] Is supplied.
  • the hidden synapse circuit HS may be simply referred to as a circuit.
  • [I] may be an input signal X, and the input signal may be converted into a voltage by the resistor 121 to have an amplifier that generates an output signal y [j].
  • the output signal y (j) of the amplifier has a characteristic that becomes f H (X) in Expression (1) when the input signal X is a variable, or a characteristic that can be approximated to the characteristic.
  • f H (X) that is, the output signal y [j] approaches 1, that is, “H” (high level, referred to as H level).
  • H level high level
  • FIG. 6B shows the configuration of the output synapse circuit OS [k, j].
  • the output synapse circuit OS [k, j] includes an analog memory AM2, a multiplication circuit MUL3, a multiplication circuit MUL4, and a multiplication circuit MUL5.
  • the analog memory AM2 has a function of storing data corresponding to the weighting coefficient v [k, j] and outputting a corresponding voltage.
  • the multiplication circuit MUL3 multiplies the output signal y [j] of the hidden neuron circuit HN [j] by the weight coefficient v [k, j] of the analog memory AM2, and outputs the output signal v [k, j] y [j].
  • the current corresponding to the multiplication result is output.
  • the multiplication circuit MUL4 multiplies the output signal y [j] of the hidden neuron circuit HN [j] by the output signal dy [k] of the output error circuit OE [k], and corresponds to the multiplication result as a signal dv.
  • a current is supplied to the analog memory AM2.
  • the signal dv is supplied as a current corresponding to the change in the weighting coefficient v [k, j] stored in the analog memory AM2.
  • the multiplication circuit MUL5 multiplies the output signal dy [k] of the output error circuit OE [k] by the weight coefficient v [k, j] of the analog memory AM, and outputs the output signal v [k, j] dy [k].
  • a current corresponding to the multiplication result is supplied.
  • the input signal y [0] is ⁇ 1
  • the weighting coefficients v [1, 0] to v [n, 0] are ⁇ O [1. ] to theta O [n] are given, as the output signal v [1,0] y [0] to v [n, 0] y [ 0], - ⁇ O [1] to - [theta] O [n ] Is supplied.
  • the output synapse circuit OS may be simply referred to as a circuit.
  • FIG. 6C shows a configuration of the analog memory AM applicable to the analog memories AM1 and AM2 in the hidden synapse circuit HS [j, i] and the output synapse circuit OS [k, j].
  • the analog memory AM includes a transistor Tr15 and a capacitive element C.
  • An ideal analog memory can be formed by using the transistor Tr15 as an oxide semiconductor that has an extremely low off-state current. Accordingly, there is no need to mount a large-scale capacitor element for storing data, and there is no need to restore analog data by a periodic refresh operation, so that the chip area and power consumption can be reduced. . Since the current corresponding to the changed amount is supplied when the data is updated, the above-described ⁇ v or ⁇ w (constant) is changed by adjusting the period during which the signal line WL is set to “H”. be able to.
  • FIG. 7A shows the configuration of the output neuron circuit ON [k].
  • [J] is an input signal Y, and the input signal Y is converted into a voltage by a resistor 111 to generate an output signal O [k].
  • the output signal O [k] of the amplifier 112 has a characteristic that becomes f O (Y) in Expression (2) or a characteristic that can be approximated to the characteristic when the input signal Y is a variable.
  • ⁇ j 1 to m v [k, j]
  • y [j] is the threshold ⁇
  • O [k] is exceeded, f O (Y), that is, the output signal O [k] approaches 1, that is, becomes “H”, which causes the output neuron circuit ON [k] to fire.
  • the threshold value ⁇ O [k] corresponds to a threshold value when the output neuron circuit ON [k] fires.
  • weighting factors w [j, i] so that desired output signals O [1] to O [n] are obtained for the input signals I [1] to I [L].
  • Storing data corresponding to v [k, j] in each analog memory AM1, AM2 corresponds to learning.
  • an arbitrary value is given as an initial value to the weighting factors w [j, i] and v [k, j], and input data used for learning is input to the input signals I [1] to I [ L], a teacher signal as an output expected value is given to the input signals T [1] to T [n] of the output neuron circuit, and the output signals O [1] to O [n] of the output neuron circuit and the input signal T [ 1] to T [n] is converged to the weighting coefficients w [j, i] and v [k, j] that minimize the sum of squared errors.
  • the teacher signal is a signal having teacher data.
  • an optimum parameter for example, a parameter that seems to be suitable for the use conditions of the display device 200 can be output as an output signal.
  • the difference between the teacher signal T [k] and the output signal O [k] is acquired by the amplifier 113 and output as the difference signal ey [k].
  • ⁇ w is a constant.
  • the output neuron circuit ON may be simply referred to as a circuit.
  • FIG. 7B shows the configuration of the output error circuit OE [k].
  • An amplifier 122 that converts the voltage into a voltage by 121 and generates a signal Y is provided.
  • FIG. 7C shows the configuration of the hidden error circuit HE [j].
  • the weighting factors w [j, i] and v [k, j] can be updated.
  • the input signals I [1] to I [I] Data corresponding to weighting factors w [j, i] and v [k, j] are stored in each analog memory so that desired output signals O [1] to O [n] can be obtained for [L]. can do. That is, the AIC 107 that is an arithmetic circuit can be learned.
  • learning data is given as an input signal of the input neuron circuit
  • a teacher signal corresponding to the learning data is given as an input signal of the output neuron circuit
  • the data in the analog memory is updated according to the error signal.
  • the target data is given as an input signal of the input neuron circuit by learning
  • the target data that is, the use conditions such as the intensity of the external light in the use environment of the display device 200 and the incident angle of the external light incident on the display device 200
  • the display device 200 can output parameters for performing color adjustment, gradation number adjustment, and the like according to the user's preference.
  • the calculation of the weighted sum and the update amount of the weighting coefficient in the neural network can be performed.
  • each weighting factor of the feature extraction filter can be set using a random number. For example, when sensing the incident angle of external light, it is possible to extract a feature amount even if the data obtained from the sensor is not necessarily data indicating a peak corresponding to the incident angle of external light. Therefore, when forming a light-shielding film to control the angle of external light incident on the sensor, even if the layout accuracy of the light-shielding film is not high, optimal parameters are set again by machine learning of the neural network, and the incident angle The exact value of can be obtained. Therefore, it is possible to obtain an accurate value of the incident angle while suppressing the manufacturing cost of the light shielding film.
  • Various parameters obtained by machine learning in the neural network can be stored in a controller register.
  • This embodiment can be implemented in appropriate combination with any of the other embodiments.
  • the operation of the arithmetic circuit means that the learning data is input to the arithmetic circuit having the neural network described in the above embodiment, the learning data is input to the arithmetic circuit, and then the target data is input to the arithmetic circuit. This refers to the process until the parameter corresponding to the data is output.
  • 8 and 9 are flowcharts showing the operation of the arithmetic circuit. In the following description, the operation of the arithmetic circuit having the neural network shown in FIG. 5 will be described as an example.
  • step S1-1 learning data is input to the input neuron circuit IN from the outside.
  • the learning data corresponds to the input signals I [1] to I [L] shown in FIG.
  • the learning data here is, for example, data on usage conditions such as the incident angle of external light detected by the sensor, the intensity of external light, and the angle of the display device in the display device shown in the first embodiment.
  • the number of input neuron circuits IN to be input is determined.
  • the input neuron circuit IN which is not necessary for inputting the learning data is preferably configured to input data whose output signal x is a fixed value.
  • learning data I [i] there are L types of learning data, and the i-th value of the learning data is described as learning data I [i]. It is assumed that learning data I [1] to learning data I [L] are input to input neuron circuits IN [1] to IN [L], respectively.
  • step S1-2 the output signals x [1] to x [L] are input to the hidden synapse circuits HS [1,1] to HS [1, L] from the input neuron circuits IN [1] to IN [L].
  • a signal x [0] having a constant value is input to the hidden synapse circuits HS [1, 0] to HS [m, 0].
  • the hidden synapse circuits HS [1, 0] to HS [1, L] multiply the output signal x [i] by the weighting factor w [1, i] held in the analog memory AM1.
  • i] x [i] is output to the hidden error circuit HE [1] and the hidden neuron circuit HN [1].
  • the above operation is also performed in the hidden synapse circuits HS [m, 0] to HS [m, L], and the output signal w [m, i] x [i] is converted into the hidden error circuit HE [m] and the hidden neuron circuit. Output to HN [m].
  • step S1-3 In step S1-3, ⁇ w [1, i] x [i], which is the sum of the output signals of the hidden synapse circuits HS [1, 0] to HS [1, L], is input to the hidden neuron circuit HN [1]. Is done. Similarly, ⁇ w [m, i] x [i], which is the sum of the output signals of the hidden synapse circuits HS [m, 0] to HS [m, L], is input to the hidden neuron circuit HN [m].
  • the number of hidden neuron circuits HN [1] to HN [m] can be changed according to the learning data. It is preferable that the hidden neuron circuit HN which is not necessary is configured to input data whose output signal y is a fixed value. Further, it is preferable to apply a configuration such as blocking the supply of power to the hidden neuron circuit HN.
  • the number of hidden neuron circuits HN is m
  • the input value of the jth hidden neuron circuit HN is described as ⁇ w [j, i] x [i].
  • step S1-4 output signals y [1] to y [m] are input from the hidden neuron circuits HN [1] to HN [m] to the output synapse circuits OS [1,1] to OS [1, m].
  • a signal y [0] having a constant value is input to the output synapse circuits OS [1, 0] to OS [n, 0].
  • the output synapse circuits OS [1, 0] to OS [1, m] output signals v [1, j] obtained by multiplying the output signal y [j] by the weighting factor v [1, j] held in the analog memory AM2.
  • y [j] is output to the output error circuits OE [1] and ON [1].
  • step S1-5 In step S1-5, ⁇ v [1, j] y [j], which is the sum of the output signals of the output synapse circuits OS [1,0] to OS [1, m], is input to the output neuron circuit ON [1]. Is done. Similarly, ⁇ v [n, j] y [j], which is the sum of output signals of the output synapse circuits OS [n, 0] to OS [n, m], is input to the output neuron circuit ON [n]. The output neuron circuits ON [1] to [n] output output signals O [1] to O [n].
  • the output neuron circuit ON [1] includes ⁇ v [1, j] y [j] which is the sum of output signals of the output synapse circuits OS [1, 0] to OS [1, m] and an external teacher signal T [ 1], the differential signal ey [1] is output to the output error circuit OE [1].
  • the output neuron circuit ON [n] includes ⁇ v [n, j] y [j] that is a sum of output signals of the output synapse circuits OS [n, 0] to OS [n, m] and an external teacher. Based on the signal T [n], the differential signal ey [n] is output to the output error circuit OE [n].
  • step S1-6 In step S1-6, ⁇ v [1, j, which is the sum of the difference signal ey [1] from the output neuron circuit ON [1] and the output signals of the output synapse circuits OS [1, 0] to OS [1, m]. ] Y [j] is input to the output error circuit OE [1].
  • the output error circuit OE [1] outputs the output signal dy [1] obtained by multiplying the difference signal ey [1] by a signal obtained by differentiating ⁇ v [1, j] y [j], and outputs the output signal dy [1]. Output to [1, 0] to OS [1, m].
  • step S1-6 ⁇ v [n, which is the sum of the difference signal ey [n] from the output neuron circuit ON [n] and the output signals of the output synapse circuits OS [n, 0] to OS [n, m].
  • J] y [j] are input to the output error circuit OE [n].
  • the output error circuit OE [n] outputs an output signal dy [n] obtained by multiplying the difference signal ey [n] by a signal obtained by differentiating ⁇ v [n, j] y [j] to the hidden synapse circuit OS. Output to [n, 0] to OS [n, m].
  • step S1-7 the weighting coefficient v [1, j] held in the analog memory AM2 in the output synapse circuits OS [1, 0] to OS [1, m] based on the output signal dy [1]. Update. Similarly, in step S1-7, based on the output signal dy [n], the weighting factor v [n, held in the analog memory AM2 in the output synapse circuits OS [n, 0] to OS [n, m]. j] is updated.
  • the output signals dy [1] to dy [n] are added to the updated weighting factors v [1,1] to v [n, 1].
  • the output signals v [1,1] dy [1] to v [n, 1] dy [n] multiplied by are output to the hidden error circuit HE [1].
  • the output signals dy [1] to dy [n] are applied to the updated weight coefficients v [1, m] to v [n, m].
  • the multiplied output signals v [1, m] dy [1] to v [n, 1] dy [n] are output to the hidden error circuit HE [m].
  • step S1-8 In step S1-8, ⁇ w [1, i] x [i], which is the sum of the output signals of the hidden synapse circuits HS [1, 0] to HS [1, L], and the output synapse circuit OS [1, 1].
  • the ex [1] that is the sum of the output signals of OS [n, 1] is input to the hidden error circuit HE [1].
  • the hidden error circuit HE [1] generates an output signal dx [1] obtained by multiplying the signal ex [1] by a signal obtained by differentiating on the basis of ⁇ w [1, i] x [i]. Output to circuits HS [1, 0] to HS [1, L].
  • step S1-8 ⁇ w [m, i] x [i], which is the sum of the output signals of the hidden synapse circuits HS [m, 0] to HS [m, L], and the output synapse circuit OS [1, m] to ex [m], which is the sum of the output signals of OS [n, m], is input to the hidden error circuit HE [m].
  • the hidden error circuit HE [m] generates an output signal dx [m] obtained by multiplying the signal ex [m] by a signal obtained by differentiating the signal ex [m] based on ⁇ w [m, i] x [i]. Output to the circuits HS [m, 0] to HS [m, L].
  • step S1-9 In step S1-9, based on the output signal dx [1], the weighting factor w [1, i] held in the analog memory AM1 in the hidden synapse circuits HS [1, 0] to HS [1, L]. To update the weighting coefficient dw [1, i]. Similarly, in step S1-9, based on the output signal dx [m], the weighting factor w [m, held in the analog memory AM1 in the hidden synapse circuits HS [m, 0] to OS [m, L]. i] is updated with the weighting coefficient dw [m, i].
  • steps S1-2 to S1-9 are repeated a predetermined number of times based on the updated weighting factors dw [1, i] to dw [m, i].
  • step S1-10 it is determined whether steps S1-2 to S1-9 have been repeated a predetermined number of times. When the predetermined number of times is reached, the learning for the learning data is terminated.
  • the predetermined number of times here is ideally repeated until the error between the output signals O [1] to O [n] and the teacher signals T [1] to T [n] falls within a specified value. Although it is preferable, it may be an arbitrary number determined empirically.
  • step S1-11 it is determined whether or not learning has been performed on all learning data. If there is unfinished learning data, steps S1-1 to S1-10 are repeated, and if learning has been completed for all the learning data, the process is terminated. In addition, about the learning data once learned, it is good also as a structure which learns again after the learning with respect to all the learning data is completed.
  • hidden layers that is, hidden synapse circuits and hidden neuron circuits in multiple layers.
  • the weighting factor can be updated repeatedly, so that the learning efficiency can be improved.
  • step S2-1 target data is input to the input neuron circuit IN from the outside.
  • step S2-2 output signals x [1] to x corresponding to the target data are transferred from the input neuron circuits IN [1] to IN [L] to the hidden synapse circuits HS [1, 1] to IN [1, L]. [L] is input.
  • step S2-2 a signal x [0] having a constant value is input to the hidden synapse circuits HS [1, 0] to HS [m, 0].
  • the hidden synapse circuits HS [1, 0] to HS [1, L] multiply the output signal x [i] by the weight coefficient w [1, i] held in the learning step S1-9.
  • [1, i] x [i] is output to the hidden neuron circuit HN [1].
  • the above-described operation is also performed in the hidden synapse circuits HS [m, 0] to HS [m, L], and the output signal w [m, i] x [i] is output to the hidden neuron circuit HN [m].
  • step S2-3 the hidden neuron circuit HN [1] is input with ⁇ w [1, i] x [i], which is the sum of output signals of the hidden synapse circuits HS [1, 0] to HS [1, L]. Is done. Similarly, ⁇ w [m, i] x [i], which is the sum of the output signals of the hidden synapse circuits HS [m, 0] to HS [m, L], is input to the hidden neuron circuit HN [m].
  • step S2-4 output signals y [1] to y [m] are input from the hidden neuron circuits HN [1] to HN [m] to the output synapse circuits OS [1,1] to OS [n, 1].
  • a signal y [0] having a constant value is input to the output synapse circuits OS [1, 0] to OS [n, 0].
  • the output synapse circuits OS [1, 0] to OS [1, m] output signals v [1, j] obtained by multiplying the output signal y [j] by the weighting factor v [1, j] held in the analog memory AM2.
  • j] y [j] is output to the output neuron circuit ON [1].
  • step S2-5 In step S2-5, ⁇ v [1, j] y [j], which is the sum of output signals of the output synapse circuits OS [1,0] to OS [1, m], is input to the output neuron circuit ON [1]. Is done. Similarly, ⁇ v [n, j] y [j], which is the sum of output signals of the output synapse circuits OS [n, 0] to OS [n, m], is input to the output neuron circuit ON [n]. The output neuron circuits ON [1] to [n] output output signals O [1] to O [n].
  • the output data O [1] to O [n] that are output are the target data, that is, the external light in the usage environment of the display device 200.
  • Parameters for setting intensity, brightness, color tone, and the like according to usage conditions such as intensity, an incident angle of external light incident on the display device 200, and user preferences can be output.
  • the arithmetic circuit having the neural network shown in FIG. 5 learns the learning data, and then corresponds to the target data. Can be output.
  • the hierarchical perceptron neural network can be displayed according to the user's preference.
  • display quality that does not depend on external light can be provided.
  • This embodiment can be implemented in appropriate combination with any of the other embodiments.
  • Embodiment 4 a structural example of a display device using a reflective display element and a light-emitting display element will be described. Note that in this embodiment, a structure example of a display device is described using a case where a liquid crystal element is used as a reflective display element and a light-emitting element using an EL material is used as a light-emitting display element.
  • FIG. 10A illustrates an example of a cross-sectional structure of the display device 200 according to one embodiment of the present invention.
  • a display device 200 illustrated in FIG. 10A includes a light-emitting display element 103, a reflective display element 101, a transistor 205 having a function of controlling current supply to the light-emitting display element 103, and a reflective display element.
  • a transistor 206 having a function of controlling supply of a voltage to the transistor 101.
  • the light emitting display element 103, the reflective display element 101, the transistor 205, and the transistor 206 are located between the substrate 201 and the substrate 202.
  • a liquid crystal element is used as the reflective display element 101.
  • the reflective display element 101 includes a pixel electrode 207, a common electrode 208, and a liquid crystal layer 209.
  • the pixel electrode 207 is electrically connected to the transistor 206. Then, the orientation of the liquid crystal layer 209 is controlled according to the voltage applied between the pixel electrode 207 and the common electrode 208.
  • FIG. 10A illustrates a case where the pixel electrode 207 has a function of reflecting visible light and the common electrode 208 has a function of transmitting visible light, and light incident from the substrate 202 side is illustrated. As indicated by a white arrow, the light is reflected from the pixel electrode 207 and is emitted again from the substrate 202 side.
  • the light emitting display element 103 is electrically connected to the transistor 205. Light emitted from the light emitting display element 103 is emitted to the substrate 202 side.
  • FIG. 10A illustrates the case where the pixel electrode 207 has a function of reflecting visible light and the common electrode 208 has a function of transmitting visible light; thus, the light is emitted from the light-emitting display element 103.
  • the emitted light passes through a region that does not overlap with the pixel electrode 207 as indicated by a white arrow, passes through a region where the common electrode 208 is located, and is emitted from the substrate 202 side.
  • the transistor 205 and the transistor 206 are located in the same layer 210, and the layer 210 including the transistor 205 and the transistor 206 includes the reflective display element 101. A region between the light emitting display elements 103 is provided. Note that at least when the semiconductor layer included in the transistor 205 and the semiconductor layer included in the transistor 206 are located on the same insulating surface, it can be said that the transistor 205 and the transistor 206 are included in the same layer 210. .
  • the transistor 205 and the transistor 206 can be manufactured through a common manufacturing process.
  • FIG. 10B illustrates an example of a cross-sectional structure of another structure of the display device 200 according to one embodiment of the present invention.
  • the display device 200 illustrated in FIG. 10B is different in structure from the display device 200 illustrated in FIG. 10A in that the transistor 205 and the transistor 206 are included in different layers.
  • the display device 200 illustrated in FIG. 10B includes a layer 210a including the transistor 205 and a layer 210b including the transistor 206.
  • the layer 210a and the layer 210b each include the reflective display element 101. And a region between the light-emitting display element 103.
  • the layer 210a is closer to the light-emitting display element 103 side than the layer 210b. Note that at least when the semiconductor layer included in the transistor 205 and the semiconductor layer included in the transistor 206 are located on different insulating surfaces, it can be said that the transistor 205 and the transistor 206 are included in different layers.
  • the transistor 205 and various wirings electrically connected to the transistor 205 can be partially overlapped with the transistor 206 and various wirings electrically connected to the transistor 206, so that the pixel
  • the size of the display device 200 can be kept small, and high definition of the display device 200 can be realized.
  • FIG. 11A illustrates an example of a cross-sectional structure of another structure of the display device 200 according to one embodiment of the present invention.
  • a display device 200 illustrated in FIG. 11A is different from the display device 200 illustrated in FIG. 10A in that the transistor 205 and the transistor 206 are included in different layers.
  • the display device 200 illustrated in FIG. 11A has the same structure as the display device 200 illustrated in FIG. 10B in that the layer 210a including the transistor 205 is closer to the substrate 201 than the light-emitting display element 103 is. Is different.
  • the display device 200 illustrated in FIG. 11A includes a layer 210 a including the transistor 205 and a layer 210 b including the transistor 206.
  • the layer 210 a has a region between the light emitting display element 103 and the substrate 201.
  • the layer 210 b has a region between the reflective display element 101 and the light emitting display element 103.
  • the transistor 205 and various wirings electrically connected to the transistor 205 are connected to each other, and the transistor 206 and various wirings electrically connected to the transistor 206 are more connected than in the case of FIG. Since many pixels can be overlapped, the size of the pixel can be reduced and high definition of the display device 200 can be realized.
  • FIG. 11B illustrates an example of a cross-sectional structure of another structure of the display device 200 according to one embodiment of the present invention.
  • the display device 200 illustrated in FIG. 11B has the same structure as the display device 200 illustrated in FIG. 10A in that the transistor 205 and the transistor 206 are included in the same layer.
  • the display device 200 illustrated in FIG. 11B is illustrated in FIG. 10A in that a layer including the transistor 205 and the transistor 206 is closer to the substrate 201 than the light-emitting display element 103 is.
  • the configuration is different from the display device 200.
  • the display device 200 illustrated in FIG. 11B includes the layer 210 including the transistor 205 and the transistor 206.
  • the layer 210 has a region between the light emitting display element 103 and the substrate 201.
  • the reflective display element 101 is closer to the substrate 202 side than the light emitting display element 103.
  • the transistor 205 and the transistor 206 can be manufactured through a common manufacturing process.
  • a wiring for electrically connecting the reflective display element 101 and the transistor 206 and a wiring for electrically connecting the light-emitting display element 103 and the transistor 205 are provided on the same side with respect to the layer 210. That's fine.
  • a wiring for electrically connecting the reflective display element 101 and the transistor 206 can be formed over the semiconductor layer of the transistor 206, and the electrical connection between the light-emitting display element 103 and the transistor 205 can be achieved.
  • a wiring for performing easy connection can be formed over the semiconductor layer of the transistor 205.
  • the manufacturing process can be simplified as compared with the case of the display device 200 illustrated in FIG.
  • FIGS. 10 and 11 illustrate a cross-sectional structure in which one light-emitting display element 103 corresponds to two reflective display elements 101, a display device according to one embodiment of the present invention is provided.
  • One reflective display element 101 may have a cross-sectional structure in which one light emitting display element 103 corresponds to one reflective display element 101, and a plurality of light emitting display elements may correspond to one reflective display element 101.
  • 103 may have a corresponding cross-sectional structure.
  • the pixel electrode 207 included in the reflective display element 101 has a function of reflecting visible light
  • the pixel electrode 207 has a function of transmitting visible light. May be.
  • a light source such as a backlight or a front light may be provided in the display device 200, or the light emitting display element 103 may be used as a light source when an image is displayed using the reflective display element 101.
  • This embodiment can be implemented in appropriate combination with any of the other embodiments.
  • Embodiment 5 a structural example of a pixel included in a display device using a reflective display element and a light-emitting display element will be described. Note that in this embodiment, the structure of the pixel 300 according to one embodiment of the present invention is described by using as an example the case where a liquid crystal element is used as a reflective display element and a light-emitting element using an EL material is used as a light-emitting display element. An example will be described.
  • a pixel 300 illustrated in FIG. 12A includes a pixel 350 and a pixel 351.
  • the pixel 350 includes a liquid crystal element 301
  • the pixel 351 includes a light emitting element 302.
  • the reflective display element 101 described in the above embodiment can be used as the liquid crystal element 301
  • the light-emitting display element 103 described in the above embodiment can be used as the light-emitting display element 103.
  • the pixel 350 includes a liquid crystal element 301, a transistor 303 having a function of controlling voltage applied to the liquid crystal element 301, and a capacitor 304.
  • the gate is electrically connected to the wiring GL
  • one of the source and the drain is electrically connected to the wiring SL
  • the other of the source and the drain is electrically connected to the pixel electrode of the liquid crystal element 301.
  • the common electrode of the liquid crystal element 301 is electrically connected to a wiring or an electrode to which a predetermined potential is supplied.
  • the capacitor 304 one electrode is electrically connected to the pixel electrode of the liquid crystal element 301, and the other electrode is electrically connected to a wiring or an electrode to which a predetermined potential is supplied.
  • the pixel 351 includes a light-emitting element 302, a transistor 305 having a function of controlling current supplied to the light-emitting element 302, and a transistor 306 having a function of controlling supply of a potential to the gate of the transistor 305.
  • the gate of the transistor 306 is electrically connected to the wiring GE, one of the source and the drain is electrically connected to the wiring DL, and the other of the source and the drain is electrically connected to the gate of the transistor 305.
  • the transistor 305 one of a source and a drain is electrically connected to the wiring AL, and the other of the source and the drain is electrically connected to the light-emitting element 302.
  • the capacitor 307 one electrode is electrically connected to the wiring AL and the other electrode is electrically connected to the gate of the transistor 305.
  • an image signal corresponding to the liquid crystal element 301 is supplied to the wiring SL, and an image signal corresponding to the light-emitting element 302 is supplied to the wiring DL, so that the pixel 300 is displayed.
  • the gradation and the gradation displayed by the light emitting element 302 can be individually controlled.
  • FIG. 12A illustrates a configuration example of the pixel 300 including one pixel 350 including the liquid crystal element 301 and one pixel 351 including the light-emitting element 302; however, the pixel 300 includes a plurality of pixels 350. Alternatively, the pixel 300 may include a plurality of pixels 351.
  • FIG. 12B illustrates a configuration example of the pixel 300 in the case where the pixel 300 includes one pixel 351 and four pixels 351.
  • a pixel 300 illustrated in FIG. 12B includes a pixel 351 including a liquid crystal element 301 and pixels 351 a to 351 b each including a light-emitting element 302.
  • the structure of the pixel 350 illustrated in FIG. 12A can be referred to for the structure of the pixel 350 illustrated in FIG.
  • a pixel 351a to a pixel 351b illustrated in FIG. 12B each include a light-emitting element 302 and a transistor 305 having a function of controlling current supplied to the light-emitting element 302, as in the pixel 351 illustrated in FIG.
  • the transistor 306 has a function of controlling the supply of potential to the gate of the transistor 305, and the capacitor 307.
  • the light emitted from the light emitting element 302 included in each of the pixels 351a to 351b has wavelengths in different regions, so that a color image can be displayed on the display device.
  • the gate of the transistor 306 included in the pixel 351a and the gate of the transistor 306 included in the pixel 351c are electrically connected to the wiring GEb.
  • the gate of the transistor 306 included in the pixel 351b and the gate of the transistor 306 included in the pixel 351d are electrically connected to the wiring GEa.
  • one of the source and the drain of the transistor 306 included in the pixel 351a and one of the source and the drain of the transistor 306 included in the pixel 351b are electrically connected to the wiring DLa. It is connected to the.
  • one of a source and a drain of the transistor 306 included in the pixel 351c and one of a source and a drain of the transistor 306 included in the pixel 351d are electrically connected to the wiring DLb.
  • one of the source and the drain of all the transistors 305 is electrically connected to the wiring AL.
  • the pixel 351a and the pixel 351c share the wiring GEb
  • the pixel 351b and the pixel 351d share the wiring GEa
  • the pixel 351a to pixel All of 351b may share one wiring GE.
  • FIG. 13A illustrates a configuration example of the pixel 300 which is different from that in FIG. A pixel 300 illustrated in FIG. 13A is different from the pixel 300 illustrated in FIG. 12A in that the transistor 305 included in the pixel 351 includes a back gate.
  • the back gate of the transistor 305 is electrically connected to the gate (front gate). Since the pixel 300 illustrated in FIG. 13A has the above structure, the threshold voltage of the transistor 305 can be prevented from shifting, and the reliability of the transistor 305 can be improved. In addition, the pixel 300 illustrated in FIG. 13A has the above structure, whereby the on-state current of the transistor 305 can be increased while the size of the transistor 305 is reduced.
  • the pixel 300 may include a plurality of pixels 350 illustrated in FIG. 13A or a plurality of pixels 351 illustrated in FIG. May be.
  • the pixel 300 illustrated in FIG. 13A and the four pixels 351 may be provided as in the pixel 300 illustrated in FIG.
  • the connection relationship between the various wirings and the four pixels 351 can refer to the pixel 300 illustrated in FIG.
  • FIG. 13B illustrates a configuration example of the pixel 300 which is different from that in FIG.
  • a pixel 300 illustrated in FIG. 13B is different from the pixel 300 illustrated in FIG. 12A in that the transistor 305 included in the pixel 351 includes a back gate.
  • 13B is different from the pixel 300 in FIG. 13A in that the back gate of the transistor 305 is electrically connected to the light-emitting element 302 instead of the gate.
  • the threshold voltage of the transistor 305 can be prevented from shifting, and the reliability of the transistor 305 can be improved.
  • the pixel 300 may include a plurality of pixels 350 illustrated in FIG. 13B or a plurality of pixels 351 illustrated in FIG. May be. Specifically, the pixel 300 illustrated in FIG. 13B and the four pixels 351 may be included as in the pixel 300 illustrated in FIG. In that case, the connection relationship between the various wirings and the four pixels 351 can refer to the pixel 300 illustrated in FIG.
  • FIG. 14 illustrates a configuration example of the pixel 300 which is different from that in FIG.
  • a pixel 300 illustrated in FIG. 14 includes a pixel 350 and a pixel 351, and the structure of the pixel 351 is different from that in FIG.
  • a pixel 351 illustrated in FIG. 14 includes a light-emitting element 302, a transistor 305 having a function of controlling current supplied to the light-emitting element 302, and a transistor having a function of controlling supply of a potential to the gate of the transistor 305.
  • the transistor 305, the transistor 306, and the transistor 308 each have a back gate.
  • the transistor 306 has a gate (front gate) electrically connected to the wiring ML, a back gate electrically connected to the wiring GE, and one of a source and a drain electrically connected to the wiring DL, The other of the drains is electrically connected to the gate and front gate of the transistor 305.
  • one of a source and a drain is electrically connected to the wiring AL, and the other of the source and the drain is electrically connected to the light-emitting element 302.
  • a gate front gate
  • a back gate is electrically connected to the wiring GE
  • one of a source and a drain is electrically connected to the wiring ML
  • the other is electrically connected to the light emitting element 302.
  • one electrode is electrically connected to the wiring AL and the other electrode is electrically connected to the gate of the transistor 305.
  • FIG. 14 illustrates a configuration example of the pixel 300 including one pixel 350 including the liquid crystal element 301 and one pixel 351 including the light-emitting element 302, but the pixel 300 includes a plurality of pixels 350. Alternatively, the pixel 300 may include a plurality of pixels 351.
  • FIG. 15 illustrates a configuration example of the pixel 300 in the case where the pixel 300 includes one pixel 351 and four pixels 351.
  • a pixel 300 illustrated in FIG. 15 includes a pixel 351 including a liquid crystal element 301 and pixels 351 a to 351 b each including a light-emitting element 302.
  • the configuration of the pixel 350 illustrated in FIG. 14 can be referred to for the configuration of the pixel 350 illustrated in FIG.
  • the pixel 351 a to the pixel 351 b illustrated in FIG. 15 are provided with the light-emitting element 302, the transistor 305 having a function of controlling current supplied to the light-emitting element 302, and the gate of the transistor 305.
  • a transistor 306 having a function of controlling the supply of the potential of the light-emitting element
  • a transistor 308 having a function of supplying a predetermined potential to the pixel electrode of the light-emitting element 302, and a capacitor 307.
  • the light emitted from the light emitting element 302 included in each of the pixels 351a to 351b has wavelengths in different regions, so that a color image can be displayed on the display device.
  • the gate of the transistor 306 included in the pixel 351a and the gate of the transistor 306 included in the pixel 351b are electrically connected to the wiring MLa.
  • the gate of the transistor 306 included in the pixel 351c and the gate of the transistor 306 included in the pixel 351d are electrically connected to the wiring MLb.
  • the back gate of the transistor 306 included in the pixel 351a and the back gate of the transistor 306 included in the pixel 351c are electrically connected to the wiring GEb.
  • the back gate of the transistor 306 included in the pixel 351b and the back gate of the transistor 306 included in the pixel 351d are electrically connected to the wiring GEa.
  • one of a source and a drain of the transistor 306 included in the pixel 351a and one of a source and a drain of the transistor 306 included in the pixel 351b are electrically connected to the wiring DLa.
  • one of a source and a drain of the transistor 306 included in the pixel 351c and one of a source and a drain of the transistor 306 included in the pixel 351d are electrically connected to the wiring DLb.
  • the back gate of the transistor 308 included in the pixel 351a and the back gate of the transistor 308 included in the pixel 351c are electrically connected to the wiring GEb.
  • the back gate of the transistor 308 included in the pixel 351b and the back gate of the transistor 308 included in the pixel 351d are electrically connected to the wiring GEa.
  • the gate and the source or drain of the transistor 308 included in the pixel 351a are electrically connected to the wiring MLa, and the gate and source or drain of the transistor 308 included in the pixel 351b are included. Is electrically connected to the wiring MLa.
  • the gate and the source or the drain of the transistor 308 included in the pixel 351c are electrically connected to the wiring MLb, and the gate and the one of the source and the drain included in the pixel 351b are electrically connected to the wiring MLb. It is connected.
  • one of the sources and drains of all the transistors 305 is electrically connected to the wiring AL.
  • the pixel 351a and the pixel 351c share the wiring GEb
  • the pixel 351b and the pixel 351d share the wiring GEa, but all of the pixels 351a to 351b are shared. May share one wiring GE. In this case, it is preferable that the pixels 351a to 351b be electrically connected to four different wirings DL.
  • the driver circuit can be temporarily stopped when the display screen does not need to be rewritten (that is, when a still image is displayed) (hereinafter referred to as “idling”). This is called “stop” or “IDS drive”.)
  • IDS drive The power consumption of the display device 200 can be reduced by the IDS driving.
  • This embodiment can be implemented in appropriate combination with any of the other embodiments.
  • the display device 200 illustrated in FIG. 4A is described as an example, and a specific structure example of the display device 200 using a reflective display element and a light-emitting display element is described.
  • FIG. 16 shows an example of a cross-sectional structure of the display device 200.
  • a display device 200 illustrated in FIG. 16 has a structure in which a display portion 102 and a display portion 104 are stacked between a substrate 250 and a substrate 251. Specifically, in FIG. 16, the display portion 102 and the display portion 104 are bonded by an adhesive layer 252.
  • FIG. 16 illustrates the light-emitting element 302, the transistor 305, and the capacitor 307 included in the pixel of the display portion 102, and the transistor 309 included in the driver circuit of the display portion 102.
  • a liquid crystal element 301 included in a pixel of the display portion 104, a transistor 303, a capacitor 304, and a transistor 310 included in a driver circuit of the display portion 104 are illustrated.
  • the transistor 305 includes a conductive layer 311 having a function as a back gate, an insulating layer 312 over the conductive layer 311, a semiconductor layer 313 overlapping with the conductive layer 311 over the insulating layer 312, and an insulating layer 316 over the semiconductor layer 313.
  • the conductive layer 315 is electrically connected to the conductive layer 319
  • the conductive layer 319 is electrically connected to the conductive layer 320.
  • the conductive layer 319 is formed in the same layer as the conductive layer 317
  • the conductive layer 320 is formed in the same layer as the conductive layer 311.
  • a conductive layer 321 that functions as a back gate of the transistor 306 is located in the same layer as the conductive layers 311 and 320.
  • An insulating layer 312 is located over the conductive layer 321, and a semiconductor layer 322 having a region overlapping with the conductive layer 321 is located over the insulating layer 312.
  • the semiconductor layer 322 includes a channel formation region of the transistor 306 (not shown).
  • An insulating layer 318 is located over the semiconductor layer 322, and a conductive layer 323 is located over the insulating layer 318.
  • the conductive layer 323 is electrically connected to the semiconductor layer 322, and the conductive layer 323 functions as a source electrode or a drain of the transistor 306 (not illustrated).
  • the transistor 309 has a structure similar to that of the transistor 305, detailed description thereof is omitted.
  • An insulating layer 324 is located over the transistor 305, the conductive layer 323, and the transistor 309, and an insulating layer 325 is located over the insulating layer 324.
  • a conductive layer 326 and a conductive layer 327 are located over the insulating layer 325.
  • the conductive layer 326 is electrically connected to the conductive layer 314, and the conductive layer 327 is electrically connected to the conductive layer 327.
  • An insulating layer 328 is located over the conductive layers 326 and 327, and a conductive layer 329 is located over the insulating layer 328.
  • the conductive layer 329 is electrically connected to the conductive layer 326 and functions as a pixel electrode of the light-emitting element 302.
  • the insulating layer 330 is located over the conductive layer 329, the EL layer 331 is located over the insulating layer 330, and the conductive layer 332 having a function as a counter electrode is located over the EL layer 331.
  • the conductive layer 329, the EL layer 331, and the conductive layer 332 are electrically connected to each other in the opening portion of the insulating layer 330, and a region where the conductive layer 329, the EL layer 331, and the conductive layer 332 are electrically connected is provided. It functions as the light emitting element 302.
  • the light-emitting element 302 has a top-emission structure that emits light in the direction indicated by the dashed arrow from the conductive layer 332 side.
  • One of the conductive layers 329 and 332 functions as an anode and the other functions as a cathode.
  • a voltage higher than the threshold voltage of the light-emitting element 302 is applied between the conductive layer 329 and the conductive layer 332, holes are injected into the EL layer 331 from the anode side and electrons are injected from the cathode side.
  • the injected electrons and holes are recombined in the EL layer 331, and the light-emitting substance contained in the EL layer 331 emits light.
  • the insulating layer 318 is preferably formed using an insulating material containing oxygen, and the insulating layer 324 is formed of water, hydrogen, or the like. It is desirable to use a material in which impurities are difficult to diffuse.
  • the insulating layer 325 or the insulating layer 330 when the insulating layer 325 or the insulating layer 330 is exposed at an end portion of the display device, display is performed on the light-emitting element 302 or the like through the insulating layer 325 or the insulating layer 330. Impurities such as moisture may enter from the outside of the device. When the light emitting element 302 is deteriorated due to the entry of impurities, the display device is deteriorated. Therefore, as illustrated in FIG. 16, it is preferable that the insulating layer 325 and the insulating layer 330 be not positioned at the end portion of the display device.
  • the light-emitting element 302 overlaps with the colored layer 334 with the adhesive layer 333 interposed therebetween.
  • the spacer 335 overlaps with the light shielding layer 336 with the adhesive layer 333 interposed therebetween.
  • FIG. 16 shows a case where there is a gap between the conductive layer 332 and the light shielding layer 336, they may be in contact with each other.
  • the colored layer 334 is a colored layer that transmits light in a specific wavelength range.
  • a color filter that transmits light in a red, green, blue, or yellow wavelength range can be used.
  • one embodiment of the present invention is not limited to the color filter method, and a color separation method, a color conversion method, a quantum dot method, or the like may be applied.
  • the transistor 303 includes a conductive layer 340 functioning as a back gate, an insulating layer 341 over the conductive layer 340, a semiconductor layer 342 overlapping with the conductive layer 340 over the insulating layer 341, and the semiconductor layer 342.
  • a conductive layer 346 and a conductive layer 347 A conductive layer 346 and a conductive layer 347.
  • the conductive layer 348 is located in the same layer as the conductive layer 340.
  • An insulating layer 341 is located over the conductive layer 348, and a conductive layer 347 is located over the insulating layer 341 in a region overlapping with the conductive layer 348.
  • a region where the conductive layer 347, the insulating layer 341, and the conductive layer 348 overlap with each other functions as the capacitor 304.
  • the transistor 310 has a structure similar to that of the transistor 303, detailed description thereof is omitted.
  • An insulating layer 360 is located over the transistor 303, the capacitor 304, and the transistor 310, and a conductive layer 349 is located over the insulating layer 330.
  • the conductive layer 349 is electrically connected to the conductive layer 347 and functions as a pixel electrode of the liquid crystal element 301.
  • An alignment film 364 is located over the conductive layer 349.
  • a conductive layer 361 having a function as a common electrode is located on the substrate 251. Specifically, in FIG. 16, the insulating layer 363 is bonded to the substrate 251 with the adhesive layer 362 interposed therebetween, and the conductive layer 361 is positioned on the insulating layer 363. An alignment film 365 is positioned on the conductive layer 361, and a liquid crystal layer 366 is positioned between the alignment film 364 and the alignment film 365.
  • the conductive layer 349 has a function of reflecting visible light
  • the conductive layer 361 has a function of transmitting visible light, so that light incident from the substrate 251 side can be transmitted as indicated by a dashed arrow. The light can be reflected from the layer 349 and emitted from the substrate 251 side.
  • a material containing one kind selected from indium (In), zinc (Zn), and tin (Sn) may be used.
  • indium oxide, indium tin oxide (ITO: Indium Tin Oxide) indium zinc oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, Indium tin oxide containing titanium oxide, indium tin oxide containing silicon oxide (ITSO), zinc oxide, zinc oxide containing gallium, and the like can be given.
  • a film containing graphene can also be used. The film containing graphene can be formed, for example, by reducing a film containing graphene oxide formed in a film shape.
  • Examples of the conductive material that reflects visible light include aluminum, silver, and alloys containing these metal materials.
  • a metal material such as gold, platinum, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, or palladium, or an alloy containing these metal materials can be used.
  • lanthanum, neodymium, germanium, or the like may be added to the metal material or alloy.
  • Alloys containing aluminum such as aluminum and titanium alloys, aluminum and nickel alloys, aluminum and neodymium alloys, aluminum, nickel, and lanthanum alloys (Al-Ni-La), silver and copper alloys, An alloy containing silver such as an alloy of silver, palladium, and copper (also referred to as Ag-Pd-Cu, APC), an alloy of silver and magnesium, or the like may be used.
  • FIG. 16 illustrates the structure of a display device using a top-gate transistor having a back gate
  • the display device according to one embodiment of the present invention may use a transistor without a back gate.
  • a back gate transistor may be used.
  • crystallinity of a semiconductor material used for the transistor there is no particular limitation on the crystallinity of a semiconductor material used for the transistor, and any of an amorphous semiconductor and a semiconductor having crystallinity (a microcrystalline semiconductor, a polycrystalline semiconductor, a single crystal semiconductor, or a semiconductor partially including a crystal region) is used. May be used. It is preferable to use a crystalline semiconductor because deterioration of transistor characteristics can be suppressed.
  • an oxide semiconductor can be used as a semiconductor material used for the transistor.
  • an oxide semiconductor containing indium can be used.
  • the semiconductor layer is represented by an In-M-Zn-based oxide containing at least indium, zinc, and M (metal such as aluminum, titanium, gallium, germanium, yttrium, zirconium, lanthanum, cerium, tin, neodymium, or hafnium). It is preferable to include a film. In addition, in order to reduce variation in electrical characteristics of the transistor including the oxide semiconductor, a stabilizer is preferably included together with the transistor.
  • Examples of the stabilizer include the metals described in M above, and examples include gallium, tin, hafnium, aluminum, and zirconium.
  • Other stabilizers include lanthanoids such as lanthanum, cerium, praseodymium, neodymium, samarium, europium, gadolinium, terbium, dysprosium, holmium, erbium, thulium, ytterbium, and lutetium.
  • an oxide semiconductor included in the semiconductor layer for example, an In—Ga—Zn-based oxide, an In—Al—Zn-based oxide, an In—Sn—Zn-based oxide, an In—Hf—Zn-based oxide, an In— La-Zn oxide, In-Ce-Zn oxide, In-Pr-Zn oxide, In-Nd-Zn oxide, In-Sm-Zn oxide, In-Eu-Zn oxide In-Gd-Zn-based oxide, In-Tb-Zn-based oxide, In-Dy-Zn-based oxide, In-Ho-Zn-based oxide, In-Er-Zn-based oxide, In-Tm -Zn oxide, In-Yb-Zn oxide, In-Lu-Zn oxide, In-Sn-Ga-Zn oxide, In-Hf-Ga-Zn oxide, In-Al- Ga-Zn-based oxide, In-Sn-Al-Zn-based oxide, In-Sn-Hf-Zn
  • an In—Ga—Zn-based oxide means an oxide containing In, Ga, and Zn as its main components, and there is no limitation on the ratio of In, Ga, and Zn. Moreover, metal elements other than In, Ga, and Zn may be contained.
  • a display device using a liquid crystal element as a reflective display element is illustrated, but as a reflective display element, in addition to a liquid crystal element, a shutter-type MEMS (Micro Electro Mechanical System) element is used.
  • An optical interference type MEMS device, a microcapsule method, an electrophoresis method, an electrowetting method, an electronic powder fluid (registered trademark) method, or the like can be used.
  • a self-luminous light-emitting element such as OLED (Organic Light Emitting Diode), LED (Light Emitting Diode), or QLED (Quantum-dot Light Emitting Diode) can be used.
  • OLED Organic Light Emitting Diode
  • LED Light Emitting Diode
  • QLED Quadantum-dot Light Emitting Diode
  • liquid crystal element for example, a liquid crystal element to which a vertical alignment (VA) mode is applied can be used.
  • VA vertical alignment
  • MVA Multi-Domain Vertical Alignment
  • PVA Plasma Vertical Alignment
  • ASV Advanced Super View
  • liquid crystal elements to which various modes are applied can be used.
  • VA mode Transmission Nematic
  • IPS In-Plane-Switching
  • FFS Ringe Field Switching
  • ASM Analy Symmetrical Aligned Micro-cell
  • FLC Ferroelectric Liquid Crystal
  • AFLC Antiferroelectric Liquid Crystal
  • thermotropic liquid crystal As the liquid crystal used in the liquid crystal element, a thermotropic liquid crystal, a low molecular liquid crystal, a polymer liquid crystal, a polymer dispersed liquid crystal (PDLC), a ferroelectric liquid crystal, an antiferroelectric liquid crystal, or the like is used. Can do. These liquid crystal materials exhibit a cholesteric phase, a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase, and the like depending on conditions.
  • liquid crystal material either a positive type liquid crystal or a negative type liquid crystal may be used, and an optimal liquid crystal material may be used according to an applied mode or design.
  • An alignment film can be provided to control the alignment of the liquid crystal.
  • liquid crystal exhibiting a blue phase for which an alignment film is unnecessary may be used.
  • the blue phase is one of the liquid crystal phases.
  • a liquid crystal composition mixed with several percent by weight or more of a chiral agent is used for the liquid crystal layer in order to improve the temperature range.
  • a liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent has a short response speed and is optically isotropic.
  • a liquid crystal composition including a liquid crystal exhibiting a blue phase and a chiral agent does not require alignment treatment and has a small viewing angle dependency. Further, since it is not necessary to provide an alignment film, a rubbing process is not required, so that electrostatic breakdown caused by the rubbing process can be prevented, and defects or breakage of the liquid crystal display device during the manufacturing process can be reduced. .
  • This embodiment can be implemented in appropriate combination with any of the other embodiments.
  • FIG. 17A illustrates an example of an appearance of the display device 200 according to one embodiment of the present invention.
  • a display device 200 illustrated in FIG. 17A includes a pixel portion 501 over a substrate 500, a pixel scan line driver circuit 502 including a reflective display element, and a pixel scan line driver circuit including a light emitting display element. 503.
  • the IC 504 includes a pixel signal line driver circuit having a reflective display element, and is electrically connected to the pixel portion 501 through a wiring 506.
  • the IC 505 includes a pixel signal line driver circuit having a light-emitting display element, and is electrically connected to the pixel portion 501 through a wiring 506.
  • the FPC 508 is electrically connected to the IC 504, and the FPC 509 is electrically connected to the IC 505.
  • the FPC 510 is electrically connected to the scan line driver circuit 502 through the wiring 511.
  • the FPC 510 is electrically connected to the scan line driver circuit 503 through the wiring 512.
  • a pixel 513 corresponds to a display area 514 of a liquid crystal element, a display area 515 of a light emitting element corresponding to yellow, a display area 516 of a light emitting element corresponding to green, and a red color.
  • a display area 517 of the light emitting element and a display area 518 of the light emitting element corresponding to blue are included.
  • the amount of current flowing per area of the light emitting element is the smallest for the light emitting elements corresponding to yellow. Is required.
  • the display area 516 of the light emitting element corresponding to green, the display area 517 of the light emitting element corresponding to red, and the display area 518 of the light emitting element corresponding to blue have substantially the same area.
  • the area of the display area 515 of the light emitting element corresponding to yellow is slightly small, it is possible to display black with good color reproducibility.
  • This embodiment can be implemented in appropriate combination with any of the other embodiments.
  • the optical sensor can be formed on a substrate constituting the display device or may be formed on a substrate prepared separately from the display device.
  • FIG. 18 shows an example of a cross-sectional structure of an optical sensor.
  • An optical sensor 600 shown in FIG. 18 includes a plurality of photodiodes PD arranged in one direction on the same plane. 18 illustrates a configuration in which photodiodes PD1 to PD11 are arranged in one direction as the plurality of photodiodes PD.
  • a light shielding film 601 having an opening is located on the photodiodes PD1 to PD11, and a light shielding film 602 having an opening is located on the light shielding film 601.
  • the values of the light incident angles ⁇ 1 to ⁇ 11 in the photodiodes PD1 to PD11 can be controlled.
  • the light shielding film 601 and the light shielding film 602 are stacked is illustrated in this embodiment mode, more light shielding films may be provided over the light shielding film 601 and the light shielding film 602.
  • the range of the incident angle of light that can be sensed by each photodiode PD can be narrowed, and the accuracy of the incident angle of light that can be sensed by the optical sensor 600 is improved. Can be increased.
  • FIG. 18 shows a configuration example of an optical sensor 600 including a plurality of photodiodes PD arranged in one direction and a light shielding film 601 and a light shielding film 602 having openings corresponding to the photodiodes PD.
  • a plurality of younger photodiodes PD arranged in a first direction, and a plurality of second photodiodes PD arranged in a second direction A light shielding film 601 and a light shielding film 602 each having an opening corresponding to the photodiode PD of the brother 1 and an opening corresponding to the photodiode PD of the brother 2 may be provided.
  • FIG. 19A illustrates an example of an electronic device using the display device according to one embodiment of the present invention.
  • FIG. 19A illustrates a tablet information terminal 6200 which includes a housing 6221, a display device 6222, operation buttons 6223, and a speaker 6224.
  • a function as a position input device may be added to the display device 6222 according to one embodiment of the present invention.
  • the function as a position input device can be added by providing a touch panel on the display device.
  • the function as a position input device can be added by providing a photoelectric conversion element called a photosensor in a pixel portion of a display device.
  • the operation button 6223 can include any one of a power switch for starting the information terminal 6200, a button for operating an application of the information terminal 6200, a volume adjustment button, a switch for turning on or off the display device 6222, and the like.
  • the number of operation buttons 6223 is four, but the number and arrangement of the operation buttons of the information terminal 6200 are not limited thereto.
  • the information terminal 6200 includes an optical sensor 6225X and an optical sensor 6225Y that measure an incident angle of external light.
  • the optical sensor 6225X and the optical sensor 6225Y are arranged on the bezel of the housing 6221.
  • the optical sensor 6225X is disposed on one of the two short sides of the bezel of the housing 6221
  • the optical sensor 6225Y is disposed on one of the two long sides of the bezel of the housing 6221.
  • the incident angle and illuminance of external light are measured by the optical sensor 6225X and the optical sensor 6225Y, and the color adjustment and gradation adjustment of an image displayed on the display device 6222 are performed based on the data. It can be performed.
  • the arrangement location of the optical sensor 6225X and the optical sensor 6225Y is not limited to the information terminal 6200 illustrated in FIG.
  • the optical sensor 6225X is arranged on both of the two short sides of the bezel of the housing 6221, and the optical sensor 6225Y is 2 in the bezel of the housing 6221. It may be arranged on both long sides.
  • optical sensor 6225X and the optical sensor 6225Y the configuration illustrated in FIG. 18 can be applied.
  • the information terminal 6200 illustrated in FIG. 19A includes a sensor (force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, Even a configuration having a function of measuring magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, smell, infrared rays, etc.) Good.
  • a measuring device having a sensor for measuring the inclination such as a gyro sensor or an acceleration sensor, the direction of the information terminal 6200 shown in FIG. ) Can be automatically switched according to the orientation of the information terminal 6200.
  • the color of the image data projected on the display device 6222 can be adjusted more accurately.
  • the gradation can be adjusted.
  • an imaging sensor is provided in the housing 6221 to acquire information on the position of the user's eyes (or the direction of the line of sight) with respect to the information terminal 6200 and combine the information on the tilt, the incident angle of external light, and the illuminance.
  • the color and gradation of the image displayed on the display device 6222 can be adjusted more accurately.
  • the information terminal 6200 illustrated in FIG. 19A may have a microphone and a speaker. With this configuration, for example, the information terminal 6200 can be provided with a call function such as a mobile phone. Although not illustrated, the information terminal 6200 illustrated in FIG. 19A may have a camera. Although not illustrated, the information terminal 6200 illustrated in FIG. 19A may have a structure including a light-emitting device for use in flashlight or lighting.
  • the information terminal 6200 illustrated in FIG. 19A may include a device that acquires biological information such as a fingerprint, a vein, an iris, or a voiceprint. By applying this configuration, an information terminal 6200 having a biometric authentication function can be realized.
  • the information terminal 6200 illustrated in FIG. 19A may have a microphone.
  • the information terminal 6200 can be provided with a call function.
  • the information terminal 6200 can be provided with a voice decoding function.
  • the information terminal 6200 can have a function of operating the information terminal 6200 by voice recognition, a function of reading a voice or a conversation and creating a conversation record, and the like. . Thereby, it can utilize, for example as minutes preparations, such as a meeting.
  • This embodiment can be implemented in appropriate combination with any of the other embodiments.
  • FIG. 20 illustrates a specific example of an electronic device using the display device according to one embodiment of the present invention.
  • FIG. 20A illustrates a portable game machine, which includes a housing 5001, a housing 5002, a display device 5003 according to one embodiment of the present invention, a display device 5004 according to one embodiment of the present invention, a microphone 5005, a speaker 5006, and operation keys. 5007, stylus 5008, and the like.
  • the portable game machine illustrated in FIG. 20A includes two display devices, which are a display device 5003 and a display device 5004.
  • the number of display devices included in the portable game machine is as follows. It is not limited to.
  • an image with high display quality is displayed on the display device 5003 and the display device 5004 without being influenced by the intensity of external light in a use environment. Can be displayed, and power consumption can also be reduced.
  • FIG. 20B illustrates a wristwatch-type portable information terminal, which includes a housing 5201, a display device 5202 according to one embodiment of the present invention, a belt 5203, an optical sensor 5204, a switch 5205, and the like.
  • FIG. 20C illustrates a tablet personal computer including a housing 5301, a housing 5302, a display device 5303 according to one embodiment of the present invention, an optical sensor 5304, an optical sensor 5305, a switch 5306, and the like.
  • the display device 5303 is supported by a housing 5301 and a housing 5302. Since the display device 5303 is formed using a flexible substrate, the display device 5303 has a function of flexibly bending the shape. By changing the angle between the housing 5301 and the housing 5302 at the hinges 5307 and 5308, the display device 5303 can be folded so that the housing 5301 and the housing 5302 overlap with each other.
  • an open / close sensor may be incorporated, and the change in the angle may be used as information on the use condition in the display device 5303.
  • the optical sensor 5304 is attached to the housing 5301, and the optical sensor 5305 is attached to the housing 5302.
  • information on the incident angle of external light to the display device 5303 in the region supported by the housing 5301 and information on the incident angle of external light on the display device 5303 in the region supported by the housing 5302 are displayed. Both of them can be used as information on usage conditions in the display device 5303.
  • the display device 5303 according to one embodiment of the present invention for a tablet personal computer an image with high display quality can be displayed on the display device 5303 without being influenced by the intensity of external light in the usage environment. Power consumption can also be suppressed.
  • FIG. 20D illustrates a video camera, which includes a housing 5801, a housing 5802, a display device 5803 according to one embodiment of the present invention, operation keys 5804, a lens 5805, a connection portion 5806, and the like.
  • the operation key 5804 and the lens 5805 are provided in the housing 5801
  • the display device 5803 is provided in the housing 5802.
  • the housing 5801 and the housing 5802 are connected to each other by a connection portion 5806.
  • An angle between the housing 5801 and the housing 5802 can be changed by the connection portion 5806.
  • the video on the display device 5803 may be switched in accordance with the angle between the housing 5801 and the housing 5802 in the connection portion 5806.
  • an image with high display quality can be displayed on the display device 5803 without depending on the intensity of external light in the usage environment, and power consumption can be reduced. Can be suppressed.
  • FIG. 20E illustrates a wristwatch-type portable information terminal including a housing 5701 having a curved surface, a display device 5702 according to one embodiment of the present invention, and the like.
  • the display device 5702 can be supported by a housing 5701 having a curved surface, and is flexible, light, and easy to use.
  • An information terminal can be provided.
  • the display device 5702 according to one embodiment of the present invention for the wristwatch-type portable information terminal an image with high display quality can be displayed on the display device 5702 without being influenced by the intensity of external light in the usage environment. And power consumption can be reduced.
  • FIG. 20F illustrates a mobile phone.
  • a display device 5902, a microphone 5907, a speaker 5904, a camera 5903, an external connection portion 5906, and an operation button 5905 according to one embodiment of the present invention are provided in a housing 5901 having a curved surface. Is provided.
  • the display device 5902 according to one embodiment of the present invention for a mobile phone, an image with high display quality can be displayed on the display device 5902 without depending on the intensity of external light in the usage environment, and power consumption can be reduced. Can be suppressed.
  • This embodiment can be implemented in appropriate combination with any of the other embodiments.
  • FIG. 21A shows an example in which a learning function is installed in the image processing unit 800. Specifically, this can be realized by mounting the AIC 107 (FIGS. 4 to 7) as hardware HARD in the image processing unit 800. Note that the configuration of the image processing unit 800 can adopt the configuration of the image processing unit 160 of FIG. 2 as appropriate.
  • learning data D1 for example, data corresponding to external light intensity
  • teacher data D2 for example, data corresponding to color, brightness, etc. selected by the user
  • the learning data and the teacher data are also referred to as a learning signal and a teacher signal, respectively.
  • the specific learning method is to perform calculation (product-sum operation) using a neural network and change the weighting coefficient so that the error between the output and the teacher data D2 is reduced. Good.
  • the method described in the second embodiment can be used as the weighting coefficient changing method.
  • the obtained weighting coefficient is stored in the analog memory AM of the AIC 107 in the image processing unit 800.
  • the configuration described in FIG. 6C can be adopted as appropriate for the configuration of the analog memory AM.
  • Image Processing Method in FIG. 21A When image processing (image correction) is performed after completion of learning, that is, during normal operation, newly acquired input data D3 (for example, data corresponding to external light intensity) is input to the image processing unit 800, and the input data D3 Then, calculation using a neural network is performed using the weighting coefficient, and parameters suitable for image processing are acquired. The calculation is performed using the circuits shown in FIGS. 6 and 7A in the AIC 107 as described with reference to FIGS.
  • the parameters obtained by the calculation by the neural network after completion of the learning will be values close to data corresponding to the user's favorite color, brightness, and the like. That is, by performing image processing based on the parameters, it is possible to generate a display image that matches the user's preference.
  • a circuit that realizes a learning function can be provided as hardware HARD in the image processing unit 800.
  • learning means hardware or software
  • FIG. 21B shows an example in which a learning function is installed in the host 801.
  • a learning function is installed in the host 801 as software SOFT.
  • a function for acquiring parameters suitable for image processing is installed in the image processing unit 800 as hardware HARD. Note that the configuration of the host 801 can employ the configuration of the host 185 in FIG. 2 as appropriate.
  • a program for learning as software SOFT (also referred to as a learning program) is stored in the host 801.
  • the program for performing the learning is configured so that the calculation by the neural network described with reference to FIGS. 3 to 5 can be realized. Specifically, arithmetic processing for performing input / output in the neuron and arithmetic processing for changing the weighting coefficient need only be programmed.
  • the arithmetic processing for performing input / output in the neuron can be realized by performing arithmetic operations of the circuit shown in FIG. 6 and FIG. Therefore, the program only needs to be configured to realize arithmetic processing of these circuits and a plurality of expressions related thereto.
  • the arithmetic processing for changing the weighting factor can be realized by performing arithmetic operations of FIGS. 7B and 7C and a plurality of expressions related thereto in the AIC 107. Therefore, the program only needs to be configured to realize arithmetic processing of these circuits and a plurality of expressions related thereto.
  • the image processing unit 800 is provided with a circuit for acquiring parameters suitable for image processing as hardware HARD. Specifically, an AIC 107 (FIGS. 4 to 7) is provided. The point that the learning function is not installed in the image processing unit 800 is different from the configuration of FIG.
  • the calculation results of the neural network correspond to the hardware HARD and the software SOFT. More specifically, in both cases, the same output may be obtained with respect to the same input, or the output within the required error range may be obtained. More specifically, the input (voltage) applied to the hardware HARD corresponds to the input (digital data) applied to the software SOFT, and the output (voltage or current) of the hardware HARD corresponds to the output (digital data) of the software SOFT. If you do.
  • the host 801 stores learning data D1 (for example, data corresponding to external light intensity) and teacher data D2 (for example, a color selected by the user, Data corresponding to luminance and the like) is input.
  • learning data D1 for example, data corresponding to external light intensity
  • teacher data D2 for example, a color selected by the user, Data corresponding to luminance and the like
  • calculation (product-sum operation) using the neural network shown in FIGS. 3 to 5 is performed by a learning program in software SOFT, and the weighting coefficient is changed.
  • the method described in the second embodiment can be used as the weighting coefficient changing method.
  • the obtained weighting coefficient is output from the host 801 and stored in the analog memory AM of the AIC 107 in the image processing unit 800.
  • the configuration of the analog memory AM the configuration of the analog memory AM in FIG. 6C can be adopted as appropriate.
  • the point that learning is performed by software SOFT is different from the configuration of FIG.
  • Image processing (normal operation) after completion of learning can be performed in the same manner as the configuration of FIG. That is, using the hardware HARD in the image processing unit 800 (the circuit shown in FIG. 6 and FIG. 7A in the AIC 107), the neural network calculation is performed using the newly acquired input data D3 and the weighting coefficient. Get suitable parameters for. As described above, since the hardware HARD is used in the image processing unit 800 instead of the software SOFT, the calculation can be performed efficiently.
  • the learning function may not be installed in the host 801.
  • the learning function may be installed in another circuit shown in FIG. 2 or may be installed in a circuit not shown in FIG.
  • the learning function may be installed in hardware or in both software and hardware.
  • the configuration of the present embodiment is not limited to that relating to image processing, and can be applied to a wide range of fields.
  • a function can be applied, or the configuration of this embodiment can be applied.
  • This embodiment can be implemented in appropriate combination with any of the other embodiments.
  • FIG. 28 illustrate an example in which a display device according to one embodiment of the present invention is mounted on an automobile as an application example of the electronic device.
  • FIG. 22 shows a view of the vehicle body 1000 from above.
  • the vehicle body 1000 has an optical sensor.
  • the optical sensor has a function of acquiring information such as light wavelength, light intensity, and light intensity for each wavelength, and the information is input as learning data to the arithmetic circuit according to one embodiment of the present invention.
  • the optical sensor for example, a phototransistor, a photosensor, an image sensor, or the like can be used.
  • an optical sensor shown in FIG. 18 can be applied.
  • the optical sensor shown in FIG. 18 can detect the incident angle of light, illuminance, and the like.
  • the optical sensor 1004L and the optical sensor 1004R can be provided on the front bumper. Further, for example, as shown in FIG. Further, in the case of a vehicle body not provided with a side mirror such as a so-called mirrorless car, it can be provided at a location where a camera for the side mirror is provided. Further, for example, as shown in FIG.
  • the optical sensor 1004 has a function of detecting external light, for example, and thus is preferably provided outside the vehicle body 1000, but the optical sensor 1004 may be provided inside the vehicle body 1000.
  • the optical sensor 1004 can be provided in the window portion 1002 or the like. Note that when the optical sensor 1004 is provided in the window portion 1002, the window portion 1002 in the front surface of the optical sensor 1004 and in the vicinity thereof has sufficient light transmittance so that the detection accuracy of the optical sensor 1004 does not deteriorate. Is preferred.
  • the optical sensor 1004 can be provided on the front bumper, and another optical sensor can be provided on the window portion 1002. Further, for example, the optical sensor 1004 can be provided on the roof, and another optical sensor can be provided on the front bumper.
  • positioning number, or shape of an optical sensor is not limited to FIG.
  • the optical sensors In order to accurately measure the ambient light environment, it is preferable to arrange the optical sensors on two or more surfaces of the vehicle body 1000, and more information on the ambient light environment can be acquired as more surfaces are disposed. In addition, it is preferable to arrange a plurality of optical sensors on one surface of a surface of the vehicle body 1000 having a large area such as a side surface. On the other hand, by suppressing the number of optical sensors arranged to a small number, it is possible to reduce the number of parts such as power supply wiring and signal wiring for the sensor, and it is possible to reduce the weight and cost of the vehicle body.
  • the optical sensor 1004 it is preferable to provide a plurality of types of optical sensors capable of detecting light intensities having different wavelengths.
  • the sun which is a light source
  • the optical sensor 1004 it is possible to acquire light source information in more detail.
  • the vehicle body 1000 includes the optical sensors arranged on two or more surfaces of the vehicle body 1000, so that the external light environment of the vehicle body can be accurately measured.
  • the user of the vehicle body enters the field of view at the same time not only on the display surface but also around the display unit during use. Therefore, it is possible to improve the visibility of the user and improve the display quality by accurately measuring the ambient light environment around the vehicle body.
  • by accurately measuring the ambient light environment around the vehicle body it is possible to display optimally for the user, thus eliminating unnecessary high brightness display and reducing power consumption. it can.
  • a display unit that performs corrected display using information obtained by a sensor or the like as learning data will be described.
  • FIG. 23 is a diagram illustrating the periphery of a windshield in a car interior.
  • FIG. 23 illustrates a display unit 1051D attached to a pillar in addition to the display unit 1051A, the display unit 1051B, and the display unit 1051C attached to the dashboard.
  • the display units 1051A to 1051C can provide display images including various other information such as navigation information, speedometers and tachometers, travel distances, oil supply amounts, gear states, and air conditioner settings. Since these display images are corrected based on the information obtained by the sensors as described above, it is possible to freely arrange the vehicle to improve its design, regardless of the influence of the surrounding environment such as external light. The display image is easy for the user to visually recognize. In addition, the display items, layout, and the like displayed on the display unit can be appropriately changed according to the user's preference, and the design can be improved.
  • the display portions 1051A to 1051C can also be used as lighting devices.
  • the field of view (dead angle) blocked by the pillar can be complemented. That is, by displaying a captured image of a camera or the like provided on the outside of the automobile, the blind spot can be compensated and safety can be improved. In addition, by displaying a video that complements the invisible part, it is possible to perform safety confirmation more naturally and without a sense of incongruity.
  • the display portion 1051D can also be used as a lighting device.
  • FIG. 24 shows the interior of an automobile in which bench seats are used for the driver seat and the passenger seat.
  • FIG. 24 illustrates a display unit 1052A provided in the door unit, a display unit 1052B provided in the handle, and a display unit 1052C provided in the center of the seat surface of the bench seat.
  • the field of view blocked by the door can be complemented.
  • the display unit 1052B and the display unit 1052C can provide a display image including various information such as navigation information, a meter such as a speedometer and a tachometer, a travel distance, a fuel supply amount, a gear state, and an air conditioner setting. Since these display images are corrected based on the information obtained by the sensor or the like as described above, the display images are easily visible to the user regardless of the influence of the surrounding environment such as external light. Yes. In addition, display items, layouts, and the like displayed on the display unit can be changed as appropriate according to the user's preference.
  • the display portion 1052B and the display portion 1052C can be used as a lighting device.
  • a display unit when a display unit is arranged everywhere in a vehicle interior and the display unit is used as a lighting device, it is also effective to use a means for transmitting an emergency signal to the outside of the vehicle. For example, when the health state of the user (driver) is detected by a sensor or the like, it is possible to blink the display unit with the maximum brightness.
  • the display unit described above can be attached to a curved surface.
  • the display portion 1051A to the display portion 1051C and the display portion 1052A to the display portion 1052C can be attached to any place in the interior of a car. That is, even a curved surface such as a dashboard 1012 and a pillar 1015 illustrated in FIG. 25A can be attached. Therefore, as shown in FIG. 25B, a display portion 1060 may be provided on the surface inside the vehicle body other than the window portion 1061. With this configuration, an image outside the vehicle other than the window portion 1061 can be displayed, so that the blind spot can be compensated and safety can be improved.
  • FIG. 25B when the display portion is provided on the surface inside the vehicle body other than the window portion 1061, the outside of the vehicle body is shown in FIG. 26A depending on the position of the display portion.
  • a plurality of cameras 1071L, cameras 1072L, cameras 1073L, cameras 1071R, cameras 1072R, and cameras 1073R are preferably provided. Note that it is preferable to mount two or more cameras side by side because information on the distance to the object can be obtained. In addition, by providing these cameras, it can also serve as the above-described optical sensor, and the number of parts can be reduced.
  • FIGS. 25B and 26A an image of the outside of the vehicle other than the window portion 1061 can be displayed as shown in FIG. Therefore, it is possible to make a moving body that compensates the user's blind spot and has improved safety.
  • the display position of the meter or the like can be changed by disposing the display portion in various places.
  • the display position can be freely switched, the display position can be changed so that the user can easily see according to the surrounding environment such as outside light.
  • the display position can be changed to an optimal position according to the user's preference and physique.
  • the left optical sensor detects stronger light than the right optical sensor. It will be.
  • the right photosensor detects light that is stronger than the left photosensor.
  • the light sensor arranged in the vehicle body can detect suddenly generated light such as headlights and street lamps of other vehicles more accurately than the light sensor arranged in the display device.
  • the image is not corrected.
  • the result can be stored as a weighting factor.
  • a plurality of types of optical sensors may be provided so that light of different wavelengths can be detected between the optical sensor arranged on the vehicle body and the optical sensor arranged on the display device. For example, it is possible to detect external light such as sunlight with a light sensor arranged in the display device, and to detect light suddenly generated with a light sensor arranged in the vehicle body. By using a plurality of types of sensors, it is possible to learn by using information from optical sensors arranged on the vehicle body in a complementary manner.
  • the optical sensor has been described.
  • other sensors force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current,
  • a configuration having a function of measuring voltage, power, radiation, flow rate, humidity, gradient, vibration, smell, infrared rays, or the like may be used.
  • display that is more suitable for the user can be performed by combining the light sensor and the time sensor.
  • a dedicated sensor it is also possible to detect the surrounding environment such as external light using other sensors in the vehicle body, a camera, a radar, and the like.
  • front surveillance camera / radar, rear surveillance camera / radar, side surveillance camera / radar, driver surveillance camera, vehicle position sensor, front inter-vehicle distance / obstacle sensor, rear inter-vehicle distance / obstacle sensor, side inter-vehicle distance / An obstacle sensor, a drive recorder, etc. can be used.
  • it is preferable to use a camera because more information can be obtained.
  • the camera functions as a sensor the number of parts can be reduced and the cost can be reduced.
  • the weight of the vehicle body can be reduced, and the energy and cost for movement or transportation can be reduced.
  • using a camera as an optical sensor and using a display device according to one embodiment of the present invention for a display portion can minimize an increase in parts. Is preferable.
  • FIG. 28 is a block diagram showing a communication environment in the vehicle body. As shown in FIG. 28, information obtained from the camera 1033R, the camera 1033L, the optical sensor 1034, and the optical sensor 1035 can be output to the arithmetic circuit 1032 and the information obtained from the arithmetic circuit 1032 can be displayed on the display portion 1031. Is possible. Note that the location, number, or shape of sensors, circuits, display units, and the like are not limited to the vehicle body shown in FIG.
  • the position of the display unit on the vehicle body can be provided at various positions. It may be outside the vehicle or inside the vehicle. When provided outside the vehicle, the effect of the surrounding environment such as outside light is greater than when provided outside the vehicle, so that the effect obtained by applying the above-described display device is greater. Further, since the vehicle body has many curves when provided in the vehicle, it is preferable to provide a display device along the vehicle body, and it is preferable to use a flexible display device.
  • the display unit is not limited to a hybrid (composite) display device using a reflective display element and a light-emitting surface element, and various display devices can be applied.
  • a display using a liquid crystal element a shutter-type MEMS (Micro Electro Mechanical System) element, an optical interference-type MEMS element, a microcapsule method, an electrophoresis method, an electrowetting method, an electropowder fluid (registered trademark) method, etc.
  • An element, OLED (Organic Light Emitting Diode), LED (Light Emitting Diode), QLED (Quantum-Dot Emitting Diode), etc. are applicable.
  • a hybrid display device using a reflective display element and a light-emitting surface element has a function of projecting an image by illuminating the light-emitting element and a function of projecting an image by reflecting environmental light.
  • the display performance can be greatly changed according to the surrounding environment. Therefore, it is easy to adjust a user's visibility to a preferable state, and it can use suitably for a mobile body.
  • the moving body to which the display device according to one embodiment of the present invention can be used can be used for a moving body having a surface on which a display portion can be provided. Specific examples of these moving objects are shown in FIGS.
  • FIG. 27A illustrates an automobile 1301.
  • the automobile 1301 has a window portion 1311.
  • the moving body according to one embodiment of the present invention can be used for the automobile 1301 including the window portion 1311.
  • the display unit installed in the automobile 1301 can perform a display corrected based on information on the surrounding environment obtained by a sensor, a camera, and the like. A display that is easy to visually recognize can be realized.
  • a camera when a camera is used, an image outside the automobile 1301 can be displayed on a display unit in the automobile 1301. Therefore, the automobile 1301 can have a blind spot other than the window portion 1311 reduced.
  • FIG. 27B shows a bus 1302.
  • the bus 1302 has a window portion 1311.
  • the moving body according to one embodiment of the present invention can be used for the bus 1302 including the window portion 1311.
  • the display unit installed on the bus 1302 can perform a display corrected based on information on the surrounding environment obtained by a sensor, a camera, and the like. A display that is easy to visually recognize can be realized.
  • an image outside the bus 1302 can be displayed on a display portion in the bus 1302. Therefore, the bus 1302 in which blind spots other than the window portion 1311 are reduced can be obtained.
  • FIG. 27C illustrates a train 1303.
  • the train 1303 has a window portion 1311.
  • the moving body according to one embodiment of the present invention can be used for the train 1303 including the window portion 1311.
  • the display unit installed in the train 1303 can perform a display corrected based on information on the surrounding environment obtained by sensors, cameras, and the like. A display that is easy to visually recognize can be realized. In the case of using a camera, an image outside the train 1303 can be displayed on a display portion in the train 1303. Therefore, it can be set as the train 1303 by which the blind spot except the window part 1311 was reduced.
  • FIG. 27D illustrates an airplane 1304.
  • the airplane 1304 has a window portion 1311.
  • the moving body according to one embodiment of the present invention can be used for the airplane 1304 including the window portion 1311.
  • the display unit installed in the airplane 1304 can perform a display corrected based on information on the surrounding environment obtained by a sensor, a camera, and the like. A display that is easy to visually recognize can be realized. Further, when a camera is used, an image outside the airplane 1304 can be displayed on a display portion inside the airplane 1304. Therefore, the airplane 1304 can have a blind spot other than the window portion 1311 reduced.
  • the display device according to one embodiment of the present invention is not limited to the above-described moving object, and can be mounted on various electronic devices. Further, a building may be applied as a housing in which the optical sensor is provided.
  • a plurality of optical sensors are provided on a wall surface provided with the display, and information acquired by the optical sensors is supplied to an arithmetic circuit of the display device. You may enter.
  • the display device according to one embodiment of the present invention is used as a display integrated with a unit bus, a plurality of sensors can be provided in the unit bus.
  • This embodiment can be implemented in appropriate combination with any of the other embodiments.
  • the display device of one embodiment of the present invention includes the pixel 1500.
  • the pixels 1500 are arranged in a matrix, and the pixel 1500 in the m-th row and the n-th column (m and n are natural numbers) is represented as a pixel 1500 (m, n).
  • FIG. 29 is a circuit diagram illustrating an example of a circuit configuration of the pixel 1500 (m, n).
  • the pixel 1500 (m, n) includes a transistor M1, a transistor M2, a transistor M3, a capacitor Cs1, a capacitor Cs2, a liquid crystal element 1501, and a light-emitting element 1502.
  • One of a source and a drain of the transistor M1 is electrically connected to one electrode of the capacitor Cs1 and one electrode of the liquid crystal element 1501.
  • One of the source and the drain of the transistor M2 is electrically connected to the gate of the transistor M3 and one electrode of the capacitor Cs2.
  • One of a source and a drain of the transistor M3 is electrically connected to one electrode of the light-emitting element 1502.
  • a parasitic capacitance Cs_S is generated between one electrode of the capacitive element Cs1 and one electrode of the capacitive element Cs2.
  • the other of the source and the drain of the transistor M1 is electrically connected to the wiring Data_L [n].
  • a gate of the transistor M1 is electrically connected to the wiring Scan_L [m].
  • the other of the source and the drain of the transistor M2 is electrically connected to the wiring Data_E [n].
  • a gate of the transistor M2 is electrically connected to the wiring Scan_E [m].
  • the other of the source and the drain of the transistor M3 and the other electrode of the capacitor Cs2 are electrically connected to the wiring ANODE.
  • the other electrode of the capacitor Cs1 is electrically connected to the wiring CSCOM.
  • the other electrode of the liquid crystal element 1501 is electrically connected to the wiring TCOM.
  • the other electrode of the light-emitting element 1502 is electrically connected to the wiring VCOM.
  • the wiring Data_L electrically connected to the pixel 1500 in the n-th column is referred to as wiring Data_L [n]
  • the wiring Data_E electrically connected to the pixel 1500 in the n-th column is wired. It is described as Data_E [n].
  • a wiring Scan_L that is electrically connected to the pixel 1500 in the m-th row is referred to as a wiring Scan_L [m]
  • a wiring Scan_E that is electrically connected to the pixel 1500 in the m-th row is referred to as a wiring Scan_E [m]. It describes.
  • a data signal having a potential corresponding to data written to the pixel 1500 in the n-th column is supplied to the wiring Data_L [n] and the wiring Data_E [n].
  • a selection signal for selecting the pixel 1500 in the m-th row is supplied to the wiring Scan_L [m] and the wiring Scan_E [m]. Note that a constant potential can be supplied to the wiring ANODE, the wiring CSCOM, the wiring TCOM, and the wiring VCOM, for example.
  • the transistor M1 has a function of controlling data writing to the pixel 1500 (m, n) through the wiring Data_L [n] by switching between an on state and an off state.
  • the transistor M2 has a function of controlling data writing to the pixel 1500 (m, n) through the wiring Data_E [n] by switching between an on state and an off state.
  • the transistor M3 functions as a driving transistor that controls current supplied to the light-emitting element 1502.
  • the capacitor Cs1 has a function of holding data written to the pixel 1500 (m, n) through the wiring Data_L [n].
  • the capacitor Cs2 has a function of holding data written to the pixel 1500 (m, n) through the wiring Data_E [n].
  • the liquid crystal element 1501 has a function of controlling light reflection or light transmission.
  • the liquid crystal element 1501 is preferably a so-called reflective liquid crystal element that controls reflection of light.
  • the liquid crystal element 1501 may have a structure in which a reflective film, a liquid crystal element, and a polarizing plate are combined, a structure using a micro electro mechanical system (MEMS), or the like.
  • MEMS micro electro mechanical system
  • the liquid crystal element 1501 may be a transmissive liquid crystal element having no reflective film.
  • the light-emitting element 1502 has a function of emitting light.
  • the light-emitting element 1502 includes an OLED (Organic Light Emitting Diode), an LED (Light Emitting Diode), a QLED (Quantum-Light Emitting Diode), an IEL (Inorganic Semiconductor Luminescent Light Emitting Semiconductor), and the like.
  • An element can be used.
  • the light and light emitted from the light emitting element as described above are not affected by external light in luminance and chromaticity. For this reason, an image with high color reproducibility (wide color gamut) and high contrast can be displayed. That is, a high-quality image can be displayed.
  • the transistor M3 when the transistor M3 includes a back gate, that is, the transistor M3 includes a plurality of gates, reliability or driving ability of the transistor M3 can be improved.
  • the current drive capability of the transistor M3 can be improved by electrically connecting the back gate of the transistor M3 to the gate of the transistor M3 (also referred to as a first gate or a front gate). it can.
  • the potential on the back channel side of the transistor M3 can be fixed by electrically connecting the back gate of the transistor M3 to one or the other of the source and the drain of the transistor M3.
  • the transistors M1 to M3 preferably include a metal oxide.
  • a transistor including a metal oxide can have a relatively high field effect mobility, and thus can be driven at high speed.
  • the off-state current of a transistor including a metal oxide film is extremely small. Therefore, even when the refresh rate of the display device of one embodiment of the present invention is reduced, the brightness of the displayed image can be maintained and power consumption can be reduced.
  • FIG. 30 is a timing chart illustrating a driving method of the pixel 10.
  • the potential of the wiring SP_L the potential of the wiring Scan_L [1], the potential of the wiring Scan_L [2], the potential of the wiring Scan_L [3], the potential of the wiring Scan_L [4], the potential of the wiring Scan_E [1], The potential of Scan_E [2], the potential of the wiring Data_L, and the potential of the wiring Data_E are shown.
  • the wiring SP_L has a function of supplying a start pulse.
  • the wiring Data_L represents the wiring Data_L [1] to the wiring Data_L [p], for example.
  • B indicates a blanking period, and the number indicates which row has the potential corresponding to the data written to the pixel 10.
  • a period described as 1 in Data_L indicates that the potential of the wiring Data_L is a potential corresponding to data to be written to the pixels 10 in the first row.
  • a period described as 1 in Data_E indicates that the potential of the wiring Data_E is a potential corresponding to data to be written to the pixels 10 in the first row.
  • the transistors M1 and M2 are n-channel transistors in the timing chart illustrated in FIG. 30 and the like. That is, the transistor M1 is turned on by applying a high potential to the wiring Scan_L, and the transistor M1 is turned off by applying a low potential to the wiring Scan_L. In addition, the transistor M2 is turned on by applying a high potential to the wiring Scan_E, and the transistor M2 is turned off by applying a low potential to the wiring Scan_E.
  • the low potential can be a ground potential, for example.
  • the transistors M1 and M2 may be p-channel transistors.
  • the transistor M1 is turned on by applying a low potential to the wiring Scan_L, and the transistor M1 is turned off by applying a high potential to the wiring Scan_L.
  • the transistor M2 is turned on by applying a low potential to the wiring Scan_E, and the transistor M2 is turned off by applying a high potential to the wiring Scan_E.
  • the transistor M3 either an n-channel transistor or a p-channel transistor may be used.
  • the pixels 1500 in each row are sequentially selected by sequentially applying a high potential to the wiring Scan_L electrically connected to the pixels 1500 in each row, and the transistors M1 provided in the pixels 1500 in each row are connected. Turn on sequentially.
  • data is sequentially written to the pixels 1500 in each row through the wiring Data_L.
  • the pixel 1500 in which data is written is brought into a holding state when the transistor M1 is turned off. As described above, an image can be displayed by the liquid crystal element 1501.
  • the pixels 1500 in each row are sequentially selected, and the transistors provided in the pixels 1500 in each row M2 is sequentially turned on. Accordingly, data is sequentially written to the pixels 1500 in each row through the wiring Data_E.
  • the pixel 1500 in which data is written is brought into a holding state when the transistor M2 is turned off.
  • the amount of current flowing between the source and the drain of the transistor M3 is controlled in accordance with written data (the potential of the data signal supplied from the wiring Data_E), and the light-emitting element 1502 has luminance according to the amount of flowing current. Emits light. As described above, an image can be displayed by the light-emitting element 1502.
  • the display device of one embodiment of the present invention can display an image using at least one of the liquid crystal element 1501 and the light-emitting element 1502.
  • the liquid crystal element 1501 can improve visibility in an environment where the intensity of external light is strong.
  • the light-emitting element 1502 can improve visibility in an environment where the intensity of external light is weak.
  • the display device of one embodiment of the present invention may display an image using both the liquid crystal element 1501 and the light-emitting element 1502.
  • the display device of one embodiment of the present invention may display an image using both the liquid crystal element 1501 and the light-emitting element 1502.
  • the period during which Scan_L is at a high potential and the period during which Scan_E is at a high potential are made equal, but they need not be equal.
  • the period in which Scan_L is at a high potential may be shorter than the period in which Scan_E is at a high potential.
  • data is written to the pixel 1500 in the m-th row through the wiring Data_L, and then data is written into the pixel 1500 in the m-th row through the wiring Data_E.
  • This embodiment can be implemented in appropriate combination with any of the other embodiments.

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Abstract

Provided is a display device in which display quality is not readily affected by the intensity of external light. An image signal for a display element is corrected in accordance with a parameter obtained by computation processing using a neural network. In a computation circuit, a first circuit outputs a third signal to a third circuit via a second circuit, the third circuit outputs a signal corresponding to the amount of current of the signal input thereto to a fifth circuit via a fourth circuit, the fifth circuit outputs a fourth signal externally, and the fifth circuit generates a sixth signal from the difference between a fifth signal and the fourth signal. The second circuit and the fourth circuit are each provided with an analog memory for storing data corresponding to a weighting coefficient, a write circuit for altering the data, and a multiplier circuit for outputting the input signal as a signal that has been weighted in accordance with the data. The analog memory is provided with a transistor having an oxide semiconductor in a channel forming region.

Description

表示装置、移動体Display device, moving body
本発明の一態様は表示装置に関する。また、本発明の一態様は半導体装置に関する。また、本発明の一態様は移動体に関する。 One embodiment of the present invention relates to a display device. One embodiment of the present invention relates to a semiconductor device. One embodiment of the present invention also relates to a moving object.
なお、本発明の一態様は、上記の技術分野に限定されない。本明細書等で開示する発明の一態様の技術分野は、物、方法、または、製造方法に関するものである。または、本発明の一態様は、プロセス、マシン、マニュファクチャ、または、組成物（コンポジション・オブ・マター）に関するものである。そのため、より具体的に本明細書で開示する本発明の一態様の技術分野としては、半導体装置、表示装置、液晶表示装置、発光装置、照明装置、蓄電装置、記憶装置、回路、演算回路、それらの駆動方法、または、それらの製造方法、を一例として挙げることができる。 Note that one embodiment of the present invention is not limited to the above technical field. The technical field of one embodiment of the invention disclosed in this specification and the like relates to an object, a method, or a manufacturing method. Alternatively, one embodiment of the present invention relates to a process, a machine, a manufacture, or a composition (composition of matter). Therefore, the technical field of one embodiment of the present invention disclosed in this specification more specifically includes a semiconductor device, a display device, a liquid crystal display device, a light-emitting device, a lighting device, a power storage device, a memory device, a circuit, an arithmetic circuit, These driving methods or manufacturing methods thereof can be given as an example.
液晶表示装置や電子ペーパーなどのバックライトや外光などを利用して表示を行う表示装置の場合、使用環境における外光の強度により表示品質が左右されやすい。下記の特許文献１には、表示時の照明状況下に被写体を置いて直接見たように表示できる、液晶表示装置を用いた画像表示装置および方法ならびに画像処理システムについて記載されている。 In the case of a display device that performs display using backlight or external light such as a liquid crystal display device or electronic paper, display quality is easily affected by the intensity of external light in the usage environment. Patent Document 1 below describes an image display device and method using a liquid crystal display device and an image processing system that can display a subject as it is directly viewed under illumination conditions at the time of display.
特開２００２−２２１９３１号公報JP 2002-221931 A
使用環境における外光の強度に表示品質が左右されにくい表示装置を提供するためには、使用環境に合わせて、階調の調整、調色などの補正が必要になる。また、階調の調整、調色の補正には、表示装置に入射する外光の角度や、利用者の嗜好なども反映させることが求められる。 In order to provide a display device whose display quality is hardly affected by the intensity of external light in the usage environment, it is necessary to make adjustments such as gradation adjustment and toning according to the usage environment. In addition, the adjustment of gradation and the correction of toning are required to reflect the angle of external light incident on the display device, the user's preference, and the like.
また、表示装置の性能を評価する上で消費電力が低いこと、周辺回路の大きさが抑えられることは重要である。 In evaluating the performance of the display device, it is important that the power consumption is low and the size of the peripheral circuit is suppressed.
上述したような技術的背景のもと、本発明の一態様は、使用環境に表示品質が左右されにくい表示装置の提供を課題とする。或いは、本発明の一態様は、消費電力を低く抑えることができる表示装置の提供を課題とする。 In view of the technical background described above, an object of one embodiment of the present invention is to provide a display device whose display quality is hardly affected by a use environment. Alternatively, according to one embodiment of the present invention, it is an object to provide a display device that can reduce power consumption.
或いは、本発明の一態様は、消費電力を低く抑えることができる周辺回路などの半導体装置の提供を課題とする。或いは、本発明の一態様は、大きさを抑えられる周辺回路などの半導体装置の提供を課題とする。或いは、本発明の一態様は、新規な回路の提供を課題とする。 Another object of one embodiment of the present invention is to provide a semiconductor device such as a peripheral circuit that can reduce power consumption. Another object of one embodiment of the present invention is to provide a semiconductor device such as a peripheral circuit whose size can be suppressed. Alternatively, according to one embodiment of the present invention, it is an object to provide a novel circuit.
なお、本発明の一態様は、新規な半導体装置などの提供を、課題の一つとする。なお、これらの課題の記載は、他の課題の存在を妨げるものではない。なお、本発明の一態様は、必ずしも、これらの課題の全てを解決する必要はない。なお、これら以外の課題は、明細書、図面、請求項などの記載から、自ずと明らかとなるものであり、明細書、図面、請求項などの記載から、これら以外の課題を抽出することが可能である。 Note that an object of one embodiment of the present invention is to provide a novel semiconductor device or the like. Note that the description of these problems does not disturb the existence of other problems. Note that one embodiment of the present invention does not necessarily have to solve all of these problems. Issues other than these will be apparent from the description of the specification, drawings, claims, etc., and other issues can be extracted from the descriptions of the specification, drawings, claims, etc. It is.
本発明の一態様は、第１の表示素子と、第２の表示素子と、信号処理回路と、演算回路と、を有し、信号処理回路は、第１の信号を第１のパラメータに従って補正する機能と、第２の信号を第２のパラメータに従って補正する機能と、を有し、演算回路は、ニューラルネットワークを用いた演算処理により第１のパラメータを生成する機能と、ニューラルネットワークを用いた演算処理により第２のパラメータを生成する機能と、を有し、第１の表示素子は、信号処理回路において補正された第１の信号を用い、かつ光の反射を利用して階調を表示する機能を有し、第２の表示素子は、信号処理回路において補正された第２の信号を用い、かつ発光の強度により階調を表示する機能を有し、該演算回路は、第１の回路、第２の回路、第３の回路、第４の回路および第５の回路を有し、第１の回路は、第３の信号を、第２の回路を介して、第３の回路に出力する機能を有し、第３の回路は、入力される信号の電流量に応じた信号を、第４の回路を介して、第５の回路に出力する機能を有し、第５の回路は、入力される信号の電流量に応じた第４の信号を外部へ出力する機能を有し、第５の回路は、第５の信号と第４の信号との差分から第６の信号を生成する機能を有し、第４の信号は、第１のパラメータおよび第２のパラメータの少なくともいずれか一であり、第５の信号は、外部から入力される信号であり、第２の回路および第４の回路はそれぞれ、重み係数に相当するデータを記憶するアナログメモリと、データを変更する書込回路と、入力される信号を、データに応じて重み付けをした信号として出力する乗算回路と、を有し、アナログメモリは、チャネル形成領域に金属酸化物を有するトランジスタを有する表示装置である。 One embodiment of the present invention includes a first display element, a second display element, a signal processing circuit, and an arithmetic circuit. The signal processing circuit corrects the first signal in accordance with the first parameter. And a function of correcting the second signal according to the second parameter, and the arithmetic circuit uses the function of generating the first parameter by arithmetic processing using the neural network and the neural network. The first display element uses the first signal corrected in the signal processing circuit, and displays the gradation using the reflection of light. The second display element has a function of using the second signal corrected in the signal processing circuit and displaying a gray scale according to the intensity of light emission. Circuit, second circuit, third time The fourth circuit and the fifth circuit, the first circuit having a function of outputting the third signal to the third circuit via the second circuit, and the third circuit. Has a function of outputting a signal according to the current amount of the input signal to the fifth circuit via the fourth circuit, and the fifth circuit corresponds to the current amount of the input signal. The fourth circuit has a function of outputting the fourth signal to the outside, and the fifth circuit has a function of generating a sixth signal from the difference between the fifth signal and the fourth signal. Is at least one of the first parameter and the second parameter, the fifth signal is an externally input signal, and the second circuit and the fourth circuit respectively correspond to weighting factors Analog memory for storing data, writing circuit for changing data, and input signal weighted according to data Anda multiplication circuit for outputting as a signal, the analog memory is a display device including a transistor having a metal oxide in a channel formation region.
また、上記構成において、複数のセンサを有し、複数のセンサからの信号は、第１の回路に入力され、複数のセンサは、少なくとも光センサ、または加速度センサのいずれかを含むことが好ましい。また、上記構成において、第１の信号は、表示装置の色を、第２の信号は、表示装置の階調数を、それぞれ調整する信号であることが好ましい。 In the above structure, it is preferable that a plurality of sensors are included, signals from the plurality of sensors are input to the first circuit, and the plurality of sensors include at least one of an optical sensor and an acceleration sensor. In the above structure, the first signal is preferably a signal for adjusting the color of the display device, and the second signal is a signal for adjusting the number of gradations of the display device.
又は、本発明の一態様は、移動体に搭載される表示装置であって、表示素子と、信号処理回路と、演算回路と、第１の光センサと、を有し、信号処理回路は、第１の信号をパラメータに従って補正する機能を有し、演算回路は、第１の光センサからの情報と、移動体に設けられた第２の光センサからの情報とをもとに、ニューラルネットワークを用いた演算処理によりパラメータを生成する機能を有し、表示素子は、信号処理回路において補正された第１の信号を用いて階調を表示する機能を有し、演算回路は、第１の回路、第２の回路、第３の回路、第４の回路および第５の回路を有し、第１の回路は、第３の信号を、第２の回路を介して、第３の回路に出力する機能を有し、第３の回路は、入力される信号の電流量に応じた信号を、第４の回路を介して、第５の回路に出力する機能を有し、第５の回路は、入力される信号の電流量に応じた第４の信号を外部へ出力する機能を有し、第５の回路は、第５の信号と第４の信号との差分から第６の信号を生成する機能を有し、第４の信号は、パラメータであり、第５の信号は、外部から入力される信号であり、第２の回路および第４の回路はそれぞれ、重み係数に相当するデータを記憶するアナログメモリと、データを変更する書込回路と、入力される信号を、データに応じて重み付けをした信号として出力する乗算回路と、を有し、アナログメモリは、チャネル形成領域に金属酸化物を有するトランジスタを有する表示装置である。 Alternatively, one embodiment of the present invention is a display device mounted on a moving body, which includes a display element, a signal processing circuit, an arithmetic circuit, and a first photosensor, and the signal processing circuit includes: The arithmetic circuit has a function of correcting the first signal according to the parameter, and the arithmetic circuit is based on information from the first photosensor and information from the second photosensor provided in the moving body. The display element has a function of displaying a gray scale using the first signal corrected in the signal processing circuit, and the arithmetic circuit has the first function. A circuit, a second circuit, a third circuit, a fourth circuit, and a fifth circuit. The first circuit sends the third signal to the third circuit through the second circuit. The third circuit has a function of outputting a signal corresponding to the amount of current of the input signal, The fifth circuit has a function of outputting to the fifth circuit via the circuit, and the fifth circuit has a function of outputting the fourth signal according to the current amount of the input signal to the outside. The circuit has a function of generating a sixth signal from a difference between the fifth signal and the fourth signal, the fourth signal is a parameter, and the fifth signal is a signal input from the outside. In each of the second circuit and the fourth circuit, an analog memory for storing data corresponding to a weighting factor, a writing circuit for changing data, and an input signal are weighted according to the data. The analog memory is a display device including a transistor including a metal oxide in a channel formation region.
又は、本発明の一態様は、移動体に搭載される表示装置であって、第１の表示素子と、第２の表示素子と、信号処理回路と、演算回路と、第１の光センサと、を有し、信号処理回路は、第１の信号を第１のパラメータに従って補正する機能と、第２の信号を第２のパラメータに従って補正する機能と、を有し、演算回路は、第１の光センサからの情報と、移動体に設けられた第２の光センサからの情報とをもとに、ニューラルネットワークを用いた演算処理により第１のパラメータを生成する機能と、情報をもとに、ニューラルネットワークを用いた演算処理により第２のパラメータを生成する機能と、を有し、第１の表示素子は、信号処理回路において補正された第１の信号を用い、かつ光の反射を利用して階調を表示する機能を有し、第２の表示素子は、信号処理回路において補正された第２の信号を用い、かつ発光の強度により階調を表示する機能を有し、演算回路は、第１の回路、第２の回路、第３の回路、第４の回路および第５の回路を有し、第１の回路は、第３の信号を、第２の回路を介して、第３の回路に出力する機能を有し、第３の回路は、入力される信号の電流量に応じた信号を、第４の回路を介して、第５の回路に出力する機能を有し、第５の回路は、入力される信号の電流量に応じた第４の信号を外部へ出力する機能を有し、第５の回路は、第５の信号と第４の信号との差分から第６の信号を生成する機能を有し、第４の信号は、第１のパラメータおよび第２のパラメータの少なくともいずれか一であり、第５の信号は、外部から入力される信号であり、第２の回路および第４の回路はそれぞれ、重み係数に相当するデータを記憶するアナログメモリと、データを変更する書込回路と、入力される信号を、データに応じて重み付けをした信号として出力する乗算回路と、を有し、アナログメモリは、チャネル形成領域に金属酸化物を有するトランジスタを有する表示装置である。 Alternatively, one embodiment of the present invention is a display device mounted on a moving body, which includes a first display element, a second display element, a signal processing circuit, an arithmetic circuit, and a first optical sensor. The signal processing circuit has a function of correcting the first signal in accordance with the first parameter and a function of correcting the second signal in accordance with the second parameter. A function for generating a first parameter by an arithmetic process using a neural network based on information from the optical sensor of the first and information from a second optical sensor provided on the moving body, and based on the information And a function of generating a second parameter by arithmetic processing using a neural network, and the first display element uses the first signal corrected by the signal processing circuit and reflects light. It has a function to display gradation using The display element uses a second signal corrected in the signal processing circuit and has a function of displaying a gray scale according to the intensity of light emission. The arithmetic circuit includes a first circuit, a second circuit, and a third circuit. The first circuit has a function of outputting the third signal to the third circuit via the second circuit, and the third circuit. This circuit has a function of outputting a signal corresponding to the current amount of the input signal to the fifth circuit via the fourth circuit, and the fifth circuit has a function of outputting the current amount of the input signal. And the fifth circuit has a function of generating a sixth signal from a difference between the fifth signal and the fourth signal, and a fourth circuit corresponding to the fourth signal. The signal is at least one of the first parameter and the second parameter, the fifth signal is an externally input signal, The fourth circuit and the fourth circuit are each an analog memory that stores data corresponding to a weighting factor, a writing circuit that changes data, and a multiplication that outputs an input signal as a signal weighted according to the data The analog memory is a display device including a transistor including a metal oxide in a channel formation region.
また、上記構成において、第２の光センサを複数有し、複数の第２の光センサとして、互いに異なる波長の光の光強度の情報を取得する機能を有する複数種類の光センサを有することが好ましい。 Further, in the above configuration, a plurality of second photosensors are provided, and a plurality of types of photosensors having a function of acquiring light intensity information of light having different wavelengths are provided as the plurality of second photosensors. preferable.
又は、本発明の一態様は、表示装置を有する移動体であって、表示装置は、表示素子と、信号処理回路と、演算回路と、第１の光センサと、を有し、移動体は第２の光センサを有し、信号処理回路は、第１の信号をパラメータに従って補正する機能を有し、演算回路は、第１の光センサからの情報と、第２の光センサからの情報とをもとに、ニューラルネットワークを用いた演算処理によりパラメータを生成する機能を有し、表示素子は、信号処理回路において補正された第１の信号を用いて階調を表示する機能を有し、演算回路は、第１の回路、第２の回路、第３の回路、第４の回路および第５の回路を有し、第１の回路は、第３の信号を、第２の回路を介して、第３の回路に出力する機能を有し、第３の回路は、入力される信号の電流量に応じた信号を、第４の回路を介して、第５の回路に出力する機能を有し、第５の回路は、入力される信号の電流量に応じた第４の信号を外部へ出力する機能を有し、第５の回路は、第５の信号と第４の信号との差分から第６の信号を生成する機能を有し、第４の信号は、パラメータであり、第５の信号は、外部から入力される信号であり、第２の回路および第４の回路はそれぞれ、重み係数に相当するデータを記憶するアナログメモリと、データを変更する書込回路と、入力される信号を、データに応じて重み付けをした信号として出力する乗算回路と、を有し、アナログメモリは、チャネル形成領域に金属酸化物を有するトランジスタを有する移動体である。 Alternatively, one embodiment of the present invention is a moving object including a display device, and the display device includes a display element, a signal processing circuit, an arithmetic circuit, and a first optical sensor, and the moving object is The signal processing circuit has a function of correcting the first signal according to the parameter, and the arithmetic circuit has information from the first photosensor and information from the second photosensor. Based on the above, the display element has a function of generating gradation by using the first signal corrected in the signal processing circuit. The arithmetic circuit includes a first circuit, a second circuit, a third circuit, a fourth circuit, and a fifth circuit. The first circuit outputs the third signal to the second circuit. The third circuit has a function of outputting to the third circuit, and the third circuit has a current amount of the input signal. A function of outputting a corresponding signal to the fifth circuit via the fourth circuit, and the fifth circuit outputs the fourth signal according to the current amount of the input signal to the outside. The fifth circuit has a function of generating a sixth signal from a difference between the fifth signal and the fourth signal, the fourth signal is a parameter, and the fifth signal Is a signal input from the outside. Each of the second circuit and the fourth circuit is an analog memory for storing data corresponding to a weighting factor, a writing circuit for changing data, and an input signal. The analog memory is a moving body having a transistor having a metal oxide in a channel formation region. The multiplication circuit outputs a weighted signal according to data.
本発明の一態様では、上記構成により、使用環境に表示品質が左右されにくい表示装置を提供できる。或いは、本発明の一態様では、上記構成により、消費電力を低く抑えることができる表示装置を提供できる。 In one embodiment of the present invention, with the above structure, a display device in which display quality is hardly affected by a use environment can be provided. Alternatively, according to one embodiment of the present invention, a display device with low power consumption can be provided with the above structure.
本発明の一態様では、上記構成により、消費電力を低く抑えることができる周辺回路などの半導体装置を提供できる。或いは、本発明の一態様では、上記構成により、大きさを抑えられる周辺回路などの半導体装置を提供できる。或いは、本発明の一態様では、新規な回路を提供できる。 In one embodiment of the present invention, with the above structure, a semiconductor device such as a peripheral circuit that can reduce power consumption can be provided. Alternatively, according to one embodiment of the present invention, a semiconductor device such as a peripheral circuit whose size can be suppressed can be provided by the above structure. Alternatively, in one embodiment of the present invention, a novel circuit can be provided.
なお、本発明の一態様により、新規な半導体装置などを提供することができる。なお、これらの効果の記載は、他の効果の存在を妨げるものではない。なお、本発明の一態様は、必ずしも、これらの効果の全てを有する必要はない。なお、これら以外の効果は、明細書、図面、請求項などの記載から、自ずと明らかとなるものであり、明細書、図面、請求項などの記載から、これら以外の効果を抽出することが可能である。 Note that according to one embodiment of the present invention, a novel semiconductor device or the like can be provided. Note that the description of these effects does not disturb the existence of other effects. Note that one embodiment of the present invention does not necessarily have all of these effects. It should be noted that the effects other than these are naturally obvious from the description of the specification, drawings, claims, etc., and it is possible to extract the other effects from the descriptions of the specification, drawings, claims, etc. It is.
表示装置の構成例を示す図。FIG. 6 illustrates a configuration example of a display device. 表示装置の構成例を示す図。FIG. 6 illustrates a configuration example of a display device. ニューラルネットワークの構成例を示す図。The figure which shows the structural example of a neural network. ブロック図の一例を説明する図。FIG. 6 illustrates an example of a block diagram. ブロック図の一例を説明する図。FIG. 6 illustrates an example of a block diagram. ブロック図の一例、および回路図の一例を説明する図。10A and 10B each illustrate an example of a block diagram and an example of a circuit diagram. 回路図の一例を説明する図。FIG. 6 illustrates an example of a circuit diagram. フローチャートの一例を説明する図。The figure explaining an example of a flowchart. フローチャートの一例を説明する図。The figure explaining an example of a flowchart. 表示装置の構成例を示す図。FIG. 6 illustrates a configuration example of a display device. 表示装置の構成例を示す図。FIG. 6 illustrates a configuration example of a display device. 表示装置の画素の構成例を示す図。FIG. 10 illustrates a configuration example of a pixel of a display device. 表示装置の画素の構成例を示す図。FIG. 10 illustrates a configuration example of a pixel of a display device. 表示装置の画素の構成例を示す図。FIG. 10 illustrates a configuration example of a pixel of a display device. 表示装置の画素の構成例を示す図。FIG. 10 illustrates a configuration example of a pixel of a display device. 表示装置の断面構造の一例を示す図。FIG. 14 illustrates an example of a cross-sectional structure of a display device. 表示装置の外観の一例を示す図。The figure which shows an example of the external appearance of a display apparatus. 光センサの断面構造の一例を示す図。The figure which shows an example of the cross-section of an optical sensor. 電子機器の一例を示す図。FIG. 14 illustrates an example of an electronic device. 電子機器の一例を示す図。FIG. 14 illustrates an example of an electronic device. 回路の構成例を示す図。The figure which shows the structural example of a circuit. 移動体の一例を示す図。The figure which shows an example of a moving body. 移動体の一例を示す図。The figure which shows an example of a moving body. 移動体の一例を示す図。The figure which shows an example of a moving body. 移動体の一例を示す図。The figure which shows an example of a moving body. 移動体の一例を示す図。The figure which shows an example of a moving body. 移動体の一例を示す図。The figure which shows an example of a moving body. 移動体の一例を示す図。The figure which shows an example of a moving body. 画素を説明する回路図。FIG. 10 is a circuit diagram illustrating a pixel. 画素の動作を説明するタイミングチャート。6 is a timing chart illustrating operation of a pixel. 画素の動作を説明するタイミングチャート。6 is a timing chart illustrating operation of a pixel.
以下では、本発明の実施の形態について図面を用いて詳細に説明する。ただし、本発明は以下の説明に限定されず、本発明の趣旨及びその範囲から逸脱することなくその形態及び詳細を様々に変更し得ることは、当業者であれば容易に理解される。したがって、本発明は、以下に示す実施の形態の記載内容に限定して解釈されるものではない。 Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it will be easily understood by those skilled in the art that modes and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the description of the embodiments below.
また、本明細書等において、半導体装置とは、半導体特性を利用した装置であり、半導体素子（トランジスタ、ダイオード等）を含む回路、同回路を有する装置等をいう。また、半導体特性を利用することで機能しうる装置全般をいう。例えば、集積回路、集積回路を備えたチップは、半導体装置の一例である。また、記憶装置、表示装置、発光装置、照明装置及び電子機器等は、それ自体が半導体装置である場合があり、又は半導体装置を有している場合がある。 In this specification and the like, a semiconductor device refers to a device using semiconductor characteristics, and includes a circuit including a semiconductor element (a transistor, a diode, or the like), a device including the circuit, or the like. In addition, it refers to all devices that can function by utilizing semiconductor characteristics. For example, an integrated circuit and a chip including the integrated circuit are examples of a semiconductor device. In addition, a memory device, a display device, a light-emitting device, a lighting device, an electronic device, or the like may be a semiconductor device or may have a semiconductor device.
また、本明細書等において、ＸとＹとが接続されている、と明示的に記載されている場合は、ＸとＹとが電気的に接続されている場合と、ＸとＹとが機能的に接続されている場合と、ＸとＹとが直接接続されている場合とが、本明細書等に開示されているものとする。したがって、所定の接続関係、例えば、図または文章に示された接続関係に限定されず、図または文章に示された接続関係以外のものも、図または文章に記載されているものとする。Ｘ、Ｙは、対象物（例えば、装置、素子、回路、配線、電極、端子、導電膜、層、など）であるとする。 In addition, in this specification and the like, when it is explicitly described that X and Y are connected, X and Y are electrically connected, and X and Y function. And the case where X and Y are directly connected are disclosed in this specification and the like. Therefore, it is not limited to a predetermined connection relationship, for example, the connection relationship shown in the figure or text, and anything other than the connection relation shown in the figure or text is also described in the figure or text. X and Y are objects (for example, devices, elements, circuits, wirings, electrodes, terminals, conductive films, layers, etc.).
トランジスタは、ゲート、ソース、およびドレインと呼ばれる３つの端子を有する。ゲートは、トランジスタの導通状態を制御する制御ノードとして機能するノードである。ソースまたはドレインとして機能する２つの入出力ノードは、トランジスタの型及び各端子に与えられる電位の高低によって、一方がソースとなり他方がドレインとなる。このため、本明細書等においては、ソースやドレインの用語は、入れ替えて用いることができるものとする。また、本明細書等では、ゲート以外の２つの端子を第１端子、第２端子と呼ぶ場合がある。 The transistor has three terminals called gate, source, and drain. The gate is a node that functions as a control node for controlling the conduction state of the transistor. One of the two input / output nodes functioning as a source or a drain serves as a source and the other serves as a drain depending on the type of the transistor and the potential applied to each terminal. Therefore, in this specification and the like, the terms source and drain can be used interchangeably. In this specification and the like, two terminals other than the gate may be referred to as a first terminal and a second terminal.
ノードは、回路構成やデバイス構造等に応じて、端子、配線、電極、導電層、導電体、不純物領域等と言い換えることが可能である。また、端子、配線等をノードと言い換えることが可能である。 A node can be restated as a terminal, a wiring, an electrode, a conductive layer, a conductor, an impurity region, or the like depending on a circuit configuration, a device structure, or the like. Further, a terminal, a wiring, or the like can be referred to as a node.
電圧は、ある電位と、基準の電位（例えば接地電位（ＧＮＤ）またはソース電位）との電位差のことを示す場合が多い。よって、電圧を電位と言い換えることが可能である。なお、電位とは、相対的なものである。よって、接地電位と記載されていても、必ずしも、０Ｖを意味しない場合もある。 In many cases, the voltage indicates a potential difference between a certain potential and a reference potential (for example, a ground potential (GND) or a source potential). Thus, a voltage can be rephrased as a potential. Note that the potential is relative. Therefore, even if it is described as a ground potential, it may not necessarily mean 0V.
本明細書等において、「膜」という言葉と「層」という言葉とは、場合によっては、または、状況に応じて、互いに入れ替えることが可能である。例えば、「導電層」という用語を「導電膜」という用語に変更することが可能な場合がある。例えば、「絶縁膜」という用語を、「絶縁層」という用語に変更することが可能な場合がある。 In this specification and the like, the terms “film” and “layer” can be interchanged with each other depending on the case or circumstances. For example, it may be possible to change the term “conductive layer” to the term “conductive film”. For example, the term “insulating film” may be changed to the term “insulating layer” in some cases.
本明細書等において、“第１”、“第２”、“第３”という序数詞は構成要素の混同を避けるために付す場合があり、その場合は数的に限定するものではなく、また順序を限定するものでもない。 In this specification and the like, the ordinal numbers “first”, “second”, and “third” may be added to avoid confusion between components, in which case the numerical order is not limited and the order is not limited. It is not intended to limit.
本明細書等において、金属酸化物（ｍｅｔａｌ　ｏｘｉｄｅ）が、増幅作用、整流作用、及びスイッチ作用の少なくとも１つを有するトランジスタを構成し得る場合、ｍｅｔａｌ　ｏｘｉｄｅ　ｓｅｍｉｃｏｎｄｕｃｔｏｒ（略してＯＳ）又は酸化物半導体と表記する。 In this specification and the like, when a metal oxide can form a transistor having at least one of an amplifying function, a rectifying function, and a switching function, a metal oxide semiconductor (OS for short) or an oxide semiconductor write.
図面において、大きさ、層の厚さ、又は領域は、明瞭化のために誇張されている場合がある。よって、必ずしもそのスケールに限定されない。なお図面は、理想的な例を模式的に示したものであり、図面に示す形状又は値などに限定されない。例えば、ノイズによる信号、電圧、若しくは電流のばらつき、又は、タイミングのずれによる信号、電圧、若しくは電流のばらつきなどを含むことが可能である。 In the drawings, the size, layer thickness, or region may be exaggerated for clarity. Therefore, it is not necessarily limited to the scale. The drawings schematically show an ideal example, and are not limited to the shapes or values shown in the drawings. For example, variation in signal, voltage, or current due to noise, variation in signal, voltage, or current due to timing shift can be included.
本明細書において、「上に」、「下に」などの配置を示す語句は、構成同士の位置関係を、図面を参照して説明するために、便宜上用いている場合がある。また、構成同士の位置関係は、各構成を描写する方向に応じて適宜変化するものである。従って、明細書で説明した語句に限定されず、状況に応じて適切に言い換えることができる。 In this specification, terms and phrases such as “above” and “below” may be used for convenience in describing the positional relationship between components with reference to the drawings. Moreover, the positional relationship between components changes suitably according to the direction which draws each structure. Therefore, the present invention is not limited to the words and phrases described in the specification, and can be appropriately rephrased depending on the situation.
図面に記載したブロック図の各回路ブロックの配置は、説明のため位置関係を特定するものであり、異なる回路ブロックで別々の機能を実現するよう示していても、実際の回路ブロックにおいては同じ回路ブロック内で別々の機能を実現しうるように設けられている場合もある。また各回路ブロックの機能は、説明のため機能を特定するものであり、一つの回路ブロックとして示していても、実際の回路ブロックにおいては一つの回路ブロックで行う処理を、複数の回路ブロックで行うよう設けられている場合もある。 The layout of each circuit block in the block diagram shown in the drawing specifies the positional relationship for the sake of explanation. Even if it is shown that different functions are realized by different circuit blocks, the same circuit is used in the actual circuit block. In some cases, different functions are provided in the block. Also, the function of each circuit block is to specify the function for explanation, and even if it is shown as one circuit block, the processing performed in one circuit block is performed in a plurality of circuit blocks in the actual circuit block. In some cases, it is provided.
（実施の形態１）
図１に、本発明の一態様に係る表示装置２００の構成を、ブロック図で示す。図１に示す表示装置２００は、液晶素子などの反射型表示素子１０１を有する表示部１０２と、ＥＬ素子などの発光型表示素子１０３を有する表示部１０４とを有する。表示部１０２は表示部１０４と重なる領域を有している。そして、上記重なる領域において、表示部１０４の発光型表示素子１０３から発せられた光が、表示部１０２を通過する構成を有している。或いは、上記重なる領域において、表示部１０４を通過した外光が表示部１０２に入射する構成を有している。 (Embodiment 1)
FIG. 1 is a block diagram illustrating a structure of a display device 200 according to one embodiment of the present invention. A display device 200 illustrated in FIG. 1 includes a display unit 102 including a reflective display element 101 such as a liquid crystal element, and a display unit 104 including a light emitting display element 103 such as an EL element. The display unit 102 has an area overlapping with the display unit 104. In the overlapping area, light emitted from the light emitting display element 103 of the display unit 104 passes through the display unit 102. Alternatively, external light that has passed through the display unit 104 enters the display unit 102 in the overlapping region.
また、図１に示す表示装置２００は、表示部１０２への画像信号の入力を制御する機能を有する駆動回路（ＳＤ１０５ａ）と、表示部１０４への画像信号の入力を制御する機能を有する駆動回路（ＳＤ１０５ｂ）とを有する。ＳＤ１０５ａにより表示部１０２に入力された画像信号に従って、反射型表示素子１０１は階調が制御される。また、ＳＤ１０５ｂにより表示部１０４に入力された画像信号に従って、発光型表示素子１０３は階調が制御される。 In addition, the display device 200 illustrated in FIG. 1 includes a drive circuit (SD105a) having a function of controlling input of an image signal to the display unit 102 and a drive circuit having a function of controlling input of an image signal to the display unit 104. (SD105b). In accordance with the image signal input to the display unit 102 by the SD 105a, the gradation of the reflective display element 101 is controlled. Further, the gradation of the light emitting display element 103 is controlled according to the image signal input to the display unit 104 by the SD 105b.
そして、反射型表示素子１０１が階調を制御されることにより、表示部１０２は画像を表示することができる。また、発光型表示素子１０３が階調を制御されることにより、表示部１０４は画像を表示することができる。 Then, the display unit 102 can display an image by controlling the gradation of the reflective display element 101. Further, the display unit 104 can display an image by controlling the gradation of the light emitting display element 103.
本発明の一態様に係る表示装置２００では、表示部１０２と表示部１０４のうち、いずれか一つ、または両方を用いて画像を表示できる。表示部１０２においてのみ画像を表示する場合は、表示部１０２では反射型表示素子１０１を用いているため、画像を表示する際に光源として外光を利用することができる。外光を利用する場合、表示部１０２においてのみ画像の表示を行うことで、表示装置２００の消費電力を抑えることができる。また、表示部１０４では発光型表示素子１０３を用いているため、別途光源を用意する、或いは外光を利用することなく、画像の表示を行うことができる。よって、表示部１０２と表示部１０４のうち、表示部１０４においてのみ画像を表示することで、外光の強度が低い場合でも画像の表示品質を高くすることができる。すなわち、表示装置２００の使用環境に左右されずに高い表示品質を確保することができる。 In the display device 200 according to one embodiment of the present invention, an image can be displayed using one or both of the display portion 102 and the display portion 104. When an image is displayed only on the display unit 102, since the display unit 102 uses the reflective display element 101, external light can be used as a light source when displaying the image. When external light is used, power consumption of the display device 200 can be suppressed by displaying an image only on the display unit 102. In addition, since the display unit 104 uses the light-emitting display element 103, an image can be displayed without preparing a separate light source or using external light. Therefore, by displaying an image only on the display unit 104 of the display unit 102 and the display unit 104, the display quality of the image can be improved even when the intensity of external light is low. That is, high display quality can be ensured regardless of the use environment of the display device 200.
また、本発明の一態様に係る表示装置２００では、表示部１０２と表示部１０４の両方を用いて画像を表示することも可能である。上記構成により、表示装置２００において表示できる画像の階調数を高めることができる。或いは、表示装置２００において表示できる画像の色域の範囲を広げることができる。 In the display device 200 according to one embodiment of the present invention, an image can be displayed using both the display portion 102 and the display portion 104. With the above configuration, the number of gradations of an image that can be displayed on the display device 200 can be increased. Alternatively, the range of the color gamut of an image that can be displayed on the display device 200 can be expanded.
また、本発明の一態様に係る表示装置２００は、ＳＤ１０５ａに供給する画像信号と、ＳＤ１０５ｂに供給する画像信号とを、画像データＶｄａｔａから生成する機能を有するコントローラ（ＣＴＬ１０６）を有する。具体的に、ＣＴＬ１０６は、信号処理により、入力された画像データＶｄａｔａに各種の補正を施す機能も有する。画像データＶｄａｔａに各種の補正を施す機能とは、言い換えると、画像信号Ｖｓｉｇａと画像信号Ｖｓｉｇｂとに各種の補正を施す機能とも言える。ＣＴＬ１０６により生成された画像信号Ｖｓｉｇａは、ＳＤ１０５ａに供給される。また、ＣＴＬ１０６により生成された画像信号Ｖｓｉｇｂは、ＳＤ１０５ａに供給される。 In addition, the display device 200 according to one embodiment of the present invention includes a controller (CTL 106) having a function of generating an image signal supplied to the SD 105a and an image signal supplied to the SD 105b from the image data Vdata. Specifically, the CTL 106 also has a function of performing various corrections on the input image data Vdata by signal processing. In other words, the function of performing various corrections on the image data Vdata can be said to be a function of performing various corrections on the image signal Vsiga and the image signal Vsigb. The image signal Vsiga generated by the CTL 106 is supplied to the SD 105a. The image signal Vsigb generated by the CTL 106 is supplied to the SD 105a.
なお、上記補正として、反射型表示素子１０１の特性に合わせたガンマ補正、発光型表示素子１０３の劣化特性に合わせた輝度補正などを行うことができる。本発明の一態様に係る表示装置２００では、上記補正の他に、表示装置２００の使用環境における外光の強度、表示装置２００に入射する外光の入射角、利用者の嗜好などの使用条件に合わせて、色の調整、階調数の調整を行うこともできる。 Note that as the correction, gamma correction that matches the characteristics of the reflective display element 101, luminance correction that matches the deterioration characteristics of the light-emitting display element 103, and the like can be performed. In the display device 200 according to one embodiment of the present invention, in addition to the above correction, usage conditions such as the intensity of external light in the usage environment of the display device 200, the incident angle of external light incident on the display device 200, and user preferences. The color and the number of gradations can be adjusted according to the above.
本発明の一態様に係る表示装置２００は、ＣＴＬ１０６が信号処理回路（ＳＰＣ１０８）と、演算回路（ＡＩＣ１０７）とを有している。ＡＩＣ１０７は、上述した表示装置２００の使用環境における外光の強度、表示装置２００に入射する外光の入射角、利用者の嗜好などの使用条件を情報として含む信号Ｓｉｇ−ｌｄを用いて、画像信号Ｖｓｉｇａと画像信号Ｖｓｉｇｂに色の調整、階調数の調整を施すためのパラメータを算出する機能を有する。ＳＰＣ１０８は、ＡＩＣ１０７において算出されたパラメータを用いて、画像信号Ｖｓｉｇａと画像信号Ｖｓｉｇｂに色の調整、階調数の調整を施す機能を有する。 In the display device 200 according to one embodiment of the present invention, the CTL 106 includes a signal processing circuit (SPC 108) and an arithmetic circuit (AIC 107). The AIC 107 uses the signal Sig-ld including information on usage conditions such as the intensity of external light in the usage environment of the display device 200 described above, the incident angle of external light incident on the display device 200, and user preferences. The signal Vsiga and the image signal Vsigb have a function of calculating parameters for adjusting the color and the number of gradations. The SPC 108 has a function of adjusting the color and the number of gradations of the image signal Vsiga and the image signal Vsigb using the parameters calculated by the AIC 107.
なお、上記使用条件などの情報は、アナログデータである場合が多い。本発明の一態様では、ＡＩＣ１０７が、ニューロンを基本的な素子とする脳において実行されるアナログデータの情報処理と同様に、アナログデータを用いてアナログ演算処理を行う機能を有する。上記構成により、アナログデータをデジタルデータに変換することなく、或いはアナログデータをデジタルデータに変換する頻度を極力抑えつつ、演算処理を行うことができる。よって、膨大な量の演算処理を実行する必要がなくなり、演算回路の規模を小さく抑えることができ、演算処理に要する時間を抑えることができる。したがって、ＣＴＬ１０６の回路規模を小さく抑え、消費電力を抑えつつ、使用条件に合わせた画像信号の色の調整、階調数の調整を実行することができる。 The information such as the use conditions is often analog data. In one embodiment of the present invention, the AIC 107 has a function of performing analog arithmetic processing using analog data, similarly to information processing of analog data executed in a brain having neurons as basic elements. With the above configuration, it is possible to perform arithmetic processing without converting analog data into digital data or while suppressing the frequency of converting analog data into digital data as much as possible. Therefore, it is not necessary to perform a huge amount of arithmetic processing, the scale of the arithmetic circuit can be reduced, and the time required for the arithmetic processing can be suppressed. Therefore, it is possible to execute the adjustment of the color of the image signal and the adjustment of the number of gradations according to the use conditions while reducing the circuit scale of the CTL 106 and reducing the power consumption.
次いで、図２に、表示装置２００のより詳細な構成の一例を示す。具体的に、図２には、表示装置２００に加えて、使用条件の情報を表示装置２００に供給する機能を有する入力装置１０９と、ホスト１８５とを図示している。入力装置１０９は、表示装置２００に含まれていても良い。 Next, FIG. 2 shows an example of a more detailed configuration of the display device 200. Specifically, FIG. 2 illustrates an input device 109 having a function of supplying usage condition information to the display device 200 and a host 185 in addition to the display device 200. The input device 109 may be included in the display device 200.
ＣＴＬ１０６は、インターフェース１５０、フレームメモリ１５１、デコーダ１５２、センサコントローラ１５３、信号コントローラ１５４、クロック生成回路１５５、画像処理部１６０、メモリ１７０、タイミングコントローラ１７３、レジスタ１７５を有する。 The CTL 106 includes an interface 150, a frame memory 151, a decoder 152, a sensor controller 153, a signal controller 154, a clock generation circuit 155, an image processing unit 160, a memory 170, a timing controller 173, and a register 175.
また、入力装置１０９として、光センサ１４３、開閉センサ１４４、加速度センサ１４６などの各種センサを用いることができる。或いは、入力装置１０９として、タッチパネル１８１、キーボード１８２、ポインティングデバイス１８３などを用いることができる。入力装置１０９は、表示装置２００に供給する使用条件の種類に合わせて、適宜選択すれば良い。 As the input device 109, various sensors such as an optical sensor 143, an open / close sensor 144, and an acceleration sensor 146 can be used. Alternatively, a touch panel 181, a keyboard 182, a pointing device 183, or the like can be used as the input device 109. The input device 109 may be appropriately selected according to the type of usage conditions supplied to the display device 200.
例えば、表示装置２００の使用環境における外光の強度、または表示装置２００に入射する外光の入射角を使用条件として用いる場合、光センサ１４３で得られた情報を使用条件の情報として用いることができる。また、利用者の嗜好や利用者からの命令などを使用条件として用いる場合、入力装置１０９として、タッチパネル１８１、キーボード１８２、ポインティングデバイス１８３などで得られた情報を使用条件の情報として用いることができる。 For example, when the external light intensity in the use environment of the display device 200 or the incident angle of the external light incident on the display device 200 is used as the use condition, the information obtained by the optical sensor 143 is used as the use condition information. it can. In addition, when using user preferences, user commands, or the like as usage conditions, information obtained from the touch panel 181, keyboard 182, pointing device 183, or the like can be used as usage condition information as the input device 109. .
また、インターフェース１５０は、ホスト１８５からの画像データＶｄａｔａや各種の制御信号ＳｉｇｃｏｎのＣＴＬ１０６への入力を制御する機能を有する。ホスト１８５は、ＣＰＵ（Ｃｅｎｔｒａｌ　Ｐｒｏｃｅｓｓｉｎｇ　Ｕｎｉｔ）またはＧＰＵ（Ｇｒａｐｈｉｃｓ　Ｐｒｏｃｅｓｓｉｎｇ　Ｕｎｉｔ）などを有している。フレームメモリ１５１は、ＣＴＬ１０６に入力された画像データを格納する機能を有する。デコーダ１５２は、フレームメモリ１５１に格納された画像データが圧縮された状態である場合に、圧縮された画像データを伸長する機能を有する。なお、デコーダ１５２は、フレームメモリ１５１に格納される前の画像データを伸長するように、フレームメモリ１５１に電気的に接続されていてもよい。 The interface 150 has a function of controlling input of image data Vdata from the host 185 and various control signals Sigcon to the CTL 106. The host 185 includes a CPU (Central Processing Unit) or a GPU (Graphics Processing Unit). The frame memory 151 has a function of storing image data input to the CTL 106. The decoder 152 has a function of expanding the compressed image data when the image data stored in the frame memory 151 is in a compressed state. Note that the decoder 152 may be electrically connected to the frame memory 151 so as to decompress the image data before being stored in the frame memory 151.
画像処理部１６０は、画像データに対して各種の画像処理を行い、画像信号を生成する機能を有する。上記画像処理には、使用条件に合わせて色の調整、階調数の調整を行う補正も含まれる。なお、画像処理部１６０が行う各種の画像処理の他の例としては、ガンマ補正、発光型表示素子１０３の劣化に合わせた発光型表示素子１０３の輝度の調整などが挙げられる。 The image processing unit 160 has a function of performing various kinds of image processing on the image data and generating an image signal. The image processing includes correction for adjusting the color and the number of gradations according to the use conditions. Other examples of various image processing performed by the image processing unit 160 include gamma correction, adjustment of the luminance of the light emitting display element 103 in accordance with the deterioration of the light emitting display element 103, and the like.
そして、画像処理部１６０は、ＳＰＣ１０８とＡＩＣ１０７とを有する。ＡＩＣ１０７は、使用条件の情報を用いて色の調整、階調数の調整を行うためのパラメータの値を算出する機能を有し、ＳＰＣ１０８は、上記パラメータの値を用いて色の調整、階調数の調整を画像データ或いは画像信号に施す機能を有する。 The image processing unit 160 includes an SPC 108 and an AIC 107. The AIC 107 has a function of calculating parameter values for adjusting the color and the number of gradations using the information on the use conditions, and the SPC 108 uses the parameter values to adjust the color and gradation. It has a function of adjusting the number of image data or image signals.
なお、補正にはテーブル方式、関数近似法などを用いることが可能であり、これらの方式を併用することも可能である。テーブル方式の場合、各テーブル値が上記パラメータに相当する。また、関数近似方式の場合、関数形を定義する値が上記パラメータに相当する。 Note that a table method, a function approximation method, or the like can be used for the correction, and these methods can be used in combination. In the table method, each table value corresponds to the above parameter. In the case of the function approximation method, the value defining the function form corresponds to the parameter.
そして、本発明の一態様では、ＡＩＣ１０７が、後述するニューラルネットワークを構成として有し、教師あり学習を行う機能を有していても良い。入力された使用条件の情報を教師データとしてＡＩＣ１０７が学習を行うことで、パラメータを最適化することができる。この場合、具体的に、センサで検知された外光の入射角、外光の強度、表示装置の角度などの使用条件の情報が、学習データに相当する。また、利用者が選んだ色、階調などの利用者の嗜好が反映されたパラメータが、教師データに相当する。ＡＩＣ１０７が学習した後は、利用時において、使用条件の情報に対してふさわしいと思われるパラメータを、ＡＩＣ１０７が出力できるようになる。出力された当該パラメータを用いて、ＳＰＣ１０８において画像処理を行えばよい。 In one embodiment of the present invention, the AIC 107 may have a neural network which will be described later, and have a function of performing supervised learning. The parameters can be optimized by the AIC 107 learning using the input usage condition information as teacher data. In this case, specifically, information on usage conditions such as an incident angle of external light detected by a sensor, an intensity of external light, and an angle of a display device corresponds to learning data. Also, parameters reflecting user preferences such as color and gradation selected by the user correspond to teacher data. After the AIC 107 learns, the AIC 107 can output parameters that seem to be appropriate for the usage condition information during use. Image processing may be performed in the SPC 108 using the output parameters.
メモリ１７０は、画像信号を一時的に格納する機能を有する。画像処理部１６０で生成された画像信号は、メモリ１７０を経て、ＳＤ１０５ａまたはＳＤ１０５ｂに供給される。タイミングコントローラ１７３は、ＳＤ１０５ａ、ＳＤ１０５ｂ、表示部１０２、表示部１０４の動作で使用するタイミング信号を生成する機能を有する。 The memory 170 has a function of temporarily storing image signals. The image signal generated by the image processing unit 160 is supplied to the SD 105a or SD 105b via the memory 170. The timing controller 173 has a function of generating timing signals used in the operations of the SD 105 a, SD 105 b, the display unit 102, and the display unit 104.
クロック生成回路１５５は、ＣＴＬ１０６で使用されるクロック信号を生成する機能を有する。信号コントローラ１５４は、インターフェース１５０を介して入力される各種制御信号Ｓｉｇｃｏｎを用いて、ＣＴＬ１０６内の各種回路を制御する機能を有する。また、ＣＴＬ１０６は、ＣＴＬ１０６内の各種回路への電源供給を制御する機能を有する電源用のコントローラを有していても良い。以下、使われていない回路への電源供給を一時的に遮断することを、パワーゲーティングと呼ぶ。 The clock generation circuit 155 has a function of generating a clock signal used in the CTL 106. The signal controller 154 has a function of controlling various circuits in the CTL 106 using various control signals Sigcon input via the interface 150. The CTL 106 may include a power controller having a function of controlling power supply to various circuits in the CTL 106. Hereinafter, temporarily shutting off power supply to an unused circuit is referred to as power gating.
レジスタ１７５は、ＣＴＬ１０６の動作に用いられるデータを格納する。レジスタ１７５が格納するデータには、画像処理部１６０が補正処理を行うために使用するパラメータ、タイミングコントローラ１７３が各種タイミング信号の波形生成に用いるパラメータなどがある。レジスタ１７５は、複数のレジスタで構成されるスキャンチェーンレジスタを備えていても良い。 The register 175 stores data used for the operation of the CTL 106. The data stored in the register 175 includes parameters used by the image processing unit 160 to perform correction processing, parameters used by the timing controller 173 to generate waveforms of various timing signals, and the like. The register 175 may include a scan chain register including a plurality of registers.
センサコントローラ１５３は、光センサ１４３、開閉センサ１４４、または加速度センサ１４６で得られた情報を基に、使用条件の情報を含む信号を生成する。当該信号は、信号コントローラ１５４を介して、或いは信号コントローラ１５４を介さずに、画像処理部１６０に供給される。 The sensor controller 153 generates a signal including usage condition information based on information obtained by the optical sensor 143, the open / close sensor 144, or the acceleration sensor 146. The signal is supplied to the image processing unit 160 via the signal controller 154 or not via the signal controller 154.
なお、光センサ１４３は光の強度の情報を得る機能を有する。加速度センサ１４６は、表示装置２００の傾きの情報を得る機能を有する。なお、傾きの情報を得るモジュールとして、例えばジャイロセンサなどを用いてもよい。開閉センサ１４４は、表示装置２００が支持されている筐体と、別の筐体との間の角度の情報を得る機能を有する。或いは、表示装置２００が可撓性を有し、２つの筐体によって表示装置２００が支持されている場合に、筐体間の角度の情報を得る機能を有していても良い。 Note that the optical sensor 143 has a function of obtaining light intensity information. The acceleration sensor 146 has a function of obtaining information on the tilt of the display device 200. For example, a gyro sensor or the like may be used as a module for obtaining tilt information. The open / close sensor 144 has a function of obtaining information on an angle between a case where the display device 200 is supported and another case. Alternatively, when the display device 200 is flexible and the display device 200 is supported by two housings, the display device 200 may have a function of obtaining information on the angle between the housings.
また、信号コントローラ１５４は、入力装置１０９において得られる使用条件の情報に従って、画像の表示に、表示部１０２及び表示部１０４のどちらか一つを用いるのか、或いは両方を用いるのかを、定める機能を有する。 In addition, the signal controller 154 has a function of determining whether one of the display unit 102 and the display unit 104 is used for displaying an image, or both, according to the use condition information obtained in the input device 109. Have.
例えば、外光の強度が高く、反射型表示素子を用いた表示部１０２で十分高いコントラストの画像が表示できる場合は、表示部１０２及び表示部１０４のうち表示部１０２において画像の表示を行うように、信号コントローラ１５４はＣＴＬ１０６内の各種回路を制御することができる。また、外光の強度が低く、反射型表示素子を用いた表示部１０２で十分高いコントラストの画像が表示できない場合は、表示部１０２及び表示部１０４のうち表示部１０４において画像の表示を行うように、信号コントローラ１５４はＣＴＬ１０６内の各種回路を制御することができる。 For example, in the case where the intensity of external light is high and an image with sufficiently high contrast can be displayed on the display unit 102 using a reflective display element, the display unit 102 displays the image on the display unit 102 and the display unit 104. In addition, the signal controller 154 can control various circuits in the CTL 106. In addition, when the intensity of external light is low and the display unit 102 using the reflective display element cannot display a sufficiently high contrast image, the display unit 104 of the display unit 102 and the display unit 104 displays an image. In addition, the signal controller 154 can control various circuits in the CTL 106.
或いは、信号コントローラ１５４は、入力装置１０９において得られる使用条件の情報に従って、表示装置２００において表示できる画像の階調数を高める、或いは、表示装置２００において表示できる画像の色域の範囲を広げる場合は、表示部１０２及び表示部１０４の両方において画像の表示を行うように、信号コントローラ１５４はＣＴＬ１０６内の各種回路を制御することができる。 Alternatively, the signal controller 154 increases the number of gradations of an image that can be displayed on the display device 200 or expands the range of the color gamut of the image that can be displayed on the display device 200 in accordance with the use condition information obtained by the input device 109. The signal controller 154 can control various circuits in the CTL 106 so as to display an image on both the display unit 102 and the display unit 104.
また、反射型表示素子を用いた表示部１０２と、発光型表示素子を用いた表示部１０４とは、互いに異なる画像を表示することもできる。一般に、反射型表示素子に適用できる液晶素子や電子ペーパー等は、動作速度が遅いものが多い（絵を表示するまでに時間を要する。）。そのため、反射型表示素子を用いた表示部１０２に背景となる静止画を表示し、発光型表示素子を用いた表示部１０４に動きのあるマウスポインタの画像等を表示することができる。この場合、表示部１０２においてＩＤＳ駆動を行うことで、表示装置２００は、なめらかな動画表示と低消費電力を両立することができる。この場合、フレームメモリ１５１には、反射型表示素子１０１と発光型表示素子１０３、それぞれに表示する画像データを保存する領域を設ければよい。 In addition, the display unit 102 using a reflective display element and the display unit 104 using a light-emitting display element can display different images. In general, many liquid crystal elements and electronic paper that can be applied to a reflective display element have a slow operation speed (it takes time to display a picture). Therefore, a still image as a background can be displayed on the display unit 102 using a reflective display element, and a moving mouse pointer image or the like can be displayed on the display unit 104 using a light-emitting display element. In this case, by performing IDS driving in the display unit 102, the display device 200 can achieve both smooth video display and low power consumption. In this case, the frame memory 151 may be provided with an area for storing image data to be displayed on each of the reflective display element 101 and the light emitting display element 103.
本実施の形態は、他の実施の形態と適宜組み合わせて実施することが可能である。 This embodiment can be implemented in appropriate combination with any of the other embodiments.
（実施の形態２）
本実施の形態では、演算回路を構成するニューラルネットワークの一例について説明する。 (Embodiment 2)
In the present embodiment, an example of a neural network that constitutes an arithmetic circuit will be described.
本発明の一態様に係る演算回路に、畳み込み演算の特徴抽出フィルターや全結合演算回路を有する、ＣＮＮ（Ｃｏｎｖｏｌｕｔｉｏｎａｌ　Ｎｅｕｒａｌ　Ｎｅｔｗｏｒｋ）を用いることができる。また、本発明の一態様に係る演算回路に、パーセプトロン型のニューラルネットワークを用いることができる。当該ニューラルネットワークを用いることで、画像データの補正に用いるパラメータを機械学習により決定することができる。 For the arithmetic circuit according to one embodiment of the present invention, a CNN (Convolutional Neural Network) including a feature extraction filter for convolution arithmetic and a fully coupled arithmetic circuit can be used. In addition, a perceptron type neural network can be used for the arithmetic circuit according to one embodiment of the present invention. By using the neural network, parameters used for correcting image data can be determined by machine learning.
演算回路であるＡＩＣ１０７は、構成としてニューラルネットワークを有することが好ましい。本実施の形態では、ニューラルネットワークとして、多層型階層型パーセプトロンを用いる例を示す。 The AIC 107 which is an arithmetic circuit preferably has a neural network as a configuration. In this embodiment, an example is shown in which a multilayer hierarchical perceptron is used as a neural network.
ニューラルネットワークは、ニューロンと、ニューロン間を接続するシナプスと、を有する。ニューロン５０とシナプス６０のモデルを図３（Ａ）に示す。第ｉの入力をｘｉ、第ｉのシナプスの重みをｗｉとする。入力ｘ１乃至ｘＬに対して、シナプス６０が有する重みｗ１乃至ｗＬのデータが設定される。ニューロン５０には、入力と重みの積（ｘｉｗｉ）をｉ＝１乃至Ｌについて足し合わせた値（ｘ１ｗ１＋ｘ２ｗ２＋…＋ｘＬｗＬ）が与えられる。ニューロン５０からの出力は、しきい値θＯを超えた場合に”Ｈ”（ハイレベル、Ｈレベルという）を出力する（後述する通り、この現象を「発火」と呼ぶ）。 The neural network includes neurons and synapses that connect the neurons. A model of the neuron 50 and the synapse 60 is shown in FIG. Let the i- th input be x i and the i-th synaptic weight be w i . Data of weights w 1 to w L included in the synapse 60 are set for the inputs x 1 to x L. The neuron 50 is given a value (x 1 w 1 + x 2 w 2 +... + X L w L ) obtained by adding the product of the input and weight (x i w i ) for i = 1 to L. The output from the neuron 50 outputs “H” (referred to as high level or H level) when the threshold value θ O is exceeded (this phenomenon is called “ignition” as will be described later).
多層型階層型パーセプトロンのモデルを図３（Ｂ）に示す。入力層ＩＬから、入力ｘ１乃至ｘＬが出力される。隠れ層ＨＬは隠れシナプスＨＳと隠れニューロンＨＮを有する。出力層ＯＬは、出力シナプスＯＳと出力ニューロンＯＮを有する。入力ｘ１乃至ｘＬは、隠れシナプスＨＳが保持する重み係数との積に応じた値として、隠れニューロンＨＮに与えられる。隠れニューロンＨＮからの出力は、出力シナプスＯＳが保持する重み係数との積と、しきい値θＨと、に応じた値として、それぞれの出力ニューロンＯＮへ与えられる。それぞれの出力ニューロンＯＮから、出力ｙ１乃至ｙｎが出力される。多層型階層型パーセプトロンにおいて、隠れ層ＨＬを複数有してもよい。 A model of the multilayer hierarchical perceptron is shown in FIG. Inputs x 1 to x L are output from the input layer IL. The hidden layer HL has a hidden synapse HS and a hidden neuron HN. The output layer OL has an output synapse OS and an output neuron ON. The inputs x 1 to x L are given to the hidden neuron HN as a value corresponding to the product of the weight coefficient held by the hidden synapse HS. The output from the hidden neurons HN is a product of the weighting factors output synapse OS holds, and the threshold theta H, as a value corresponding to, provided to each output neuron ON. From the respective output neuron ON, outputs y 1 to y n are output. The multilayer hierarchical perceptron may have a plurality of hidden layers HL.
本発明の一態様の演算回路は例えば、入力ｘ１乃至ｘＬとして、表示装置が有するセンサで検知された外光の入射角および角度、表示装置の角度、等のデータを与えられることにより、出力ｙ１乃至ｙｎとして、表示装置の輝度、色調、等を設定するためのパラメータを得ることができる。 In the arithmetic circuit of one embodiment of the present invention, for example, as the inputs x 1 to x L , data such as an incident angle and an angle of external light detected by a sensor included in the display device, an angle of the display device, and the like are given. as the output y 1 through y n, it can be obtained a parameter for setting the brightness of the display device, the color tone, and the like.
図４は、ＡＩＣ１０７が有する、より具体的なニューラルネットワークの一例を示すブロック図である。図４（Ａ）では、入力ニューロン回路ＩＮ、隠れニューロン回路ＨＮ、出力ニューロン回路ＯＮ、隠れシナプス回路ＨＳ、出力シナプス回路ＯＳ、隠れ誤差回路ＨＥ、および出力誤差回路ＯＥを図示している。図４（Ａ）に示す構成において、入力層ＩＬは、入力ニューロン回路ＩＮを有し、隠れ層ＨＬは隠れニューロン回路ＨＮ、隠れシナプス回路ＨＳ、隠れ誤差回路ＨＥを有し、出力層ＯＬは出力誤差回路ＯＥ、出力ニューロン回路ＯＮ、出力シナプス回路ＯＳを有する。なお信号Ｉは入力信号、信号Ｔは教師信号Ｔ、信号Ｏは出力信号に相当する。 FIG. 4 is a block diagram illustrating an example of a more specific neural network included in the AIC 107. 4A shows an input neuron circuit IN, a hidden neuron circuit HN, an output neuron circuit ON, a hidden synapse circuit HS, an output synapse circuit OS, a hidden error circuit HE, and an output error circuit OE. In the configuration shown in FIG. 4A, the input layer IL has an input neuron circuit IN, the hidden layer HL has a hidden neuron circuit HN, a hidden synapse circuit HS, a hidden error circuit HE, and the output layer OL has an output. It has an error circuit OE, an output neuron circuit ON, and an output synapse circuit OS. Signal I corresponds to an input signal, signal T corresponds to a teacher signal T, and signal O corresponds to an output signal.
なお図４（Ａ）に示す隠れ層ＨＬは、図４（Ｂ）に示すように２層以上としてもよい。当該構成とすることで、より複雑な学習を行うことができる。 Note that the hidden layer HL illustrated in FIG. 4A may have two or more layers as illustrated in FIG. With this configuration, more complicated learning can be performed.
ここで、入力として例えば表示装置２００の使用環境における外光の強度、表示装置２００に入射する外光の入射角、等を与えることにより、出力として、表示装置２００の色の調整、階調数の調整、等を施すためのパラメータを得ることができる。 Here, by giving, for example, the intensity of external light in the usage environment of the display device 200, the incident angle of external light incident on the display device 200, and the like as input, the color adjustment of the display device 200 and the number of gradations are output. Can be obtained.
図５は、図４に示すニューラルネットワークの詳細な構成の一例を示すブロック図である。図５には、ニューラルネットワークを構成するＬ個（Ｌは自然数）の入力ニューロン回路ＩＮ、ｍ個（ｍは自然数）の隠れニューロン回路ＨＮ、ｎ個（ｎは自然数）の出力ニューロン回路ＯＮ、（Ｌ＋１）×ｍ個の隠れシナプス回路ＨＳ、（ｍ＋１）×ｎ個の出力シナプス回路ＯＳ、ｍ個の隠れ誤差回路ＨＥ、およびｎ個の出力誤差回路ＯＥを図示している。 FIG. 5 is a block diagram showing an example of a detailed configuration of the neural network shown in FIG. FIG. 5 shows L (N is a natural number) input neuron circuits IN constituting a neural network, m (m is a natural number) hidden neuron circuits HN, n (n is a natural number) output neuron circuits ON, ( L + 1) × m hidden synapse circuits HS, (m + 1) × n output synapse circuits OS, m hidden error circuits HE, and n output error circuits OE are illustrated.
以下、図５に示す回路ブロックについて説明する。 Hereinafter, the circuit block shown in FIG. 5 will be described.
入力ニューロン回路ＩＮ［ｉ］はニューラルネットワークの外部からの入力信号Ｉ［ｉ］をアンプ等で増幅し、出力信号ｘ［ｉ］を生成する。 The input neuron circuit IN [i] amplifies an input signal I [i] from the outside of the neural network with an amplifier or the like, and generates an output signal x [i].
図６（Ａ）は、隠れシナプス回路ＨＳ［ｊ，ｉ］（ｊ，ｉは自然数）の構成を示している。隠れシナプス回路ＨＳ［ｊ，ｉ］は、アナログメモリＡＭ１、乗算回路ＭＵＬ１及び乗算回路ＭＵＬ２、から構成される。アナログメモリＡＭ１は、重み係数ｗ［ｊ，ｉ］に相当するデータを格納し、対応する電圧を出力する機能を有する。乗算回路ＭＵＬ１は、入力ニューロン回路ＩＮの出力信号ｘ［ｉ］とアナログメモリＡＭ１の重み係数ｗ［ｊ，ｉ］との乗算を行い、出力信号ｗ［ｊ，ｉ］ｘ［ｉ］を生成する。なお、出力信号ｗ［ｊ，ｉ］ｘ［ｉ］として、乗算結果に対応した電流が供給される。乗算回路ＭＵＬ２は、入力ニューロン回路ＩＮの出力信号ｘ［ｉ］と隠れ誤差回路ＨＥ［ｊ］の出力信号ｄｘ［ｊ］との乗算を行い、信号ｄｗを生成する。信号ｄｗとして、乗算結果に対応した電流が供給される。信号ｄｗは、アナログメモリＡＭ１に格納された重み係数ｗ［ｊ，ｉ］の変更分に相当する電流として供給される。つまり乗算回路ＭＵＬ２は、アナログメモリＡＭ１のデータを変更する書込回路に相当する。なお、隠れシナプス回路ＨＳ［１，０］乃至ＨＳ［ｍ，０］において、入力信号ｘ［０］は−１、重み係数ｗ［１，０］乃至ｗ［ｍ，０］はθＨ［１］乃至θＨ［ｍ］が与えられており、出力信号ｗ［１，０］ｘ［０］乃至ｗ［ｍ，０］ｘ［０］として、−θＨ［１］乃至−θＨ［ｍ］に相当する電流が供給される。なお隠れシナプス回路ＨＳは、単に回路という場合がある。 FIG. 6A shows the configuration of the hidden synapse circuit HS [j, i] (j and i are natural numbers). The hidden synapse circuit HS [j, i] includes an analog memory AM1, a multiplication circuit MUL1, and a multiplication circuit MUL2. The analog memory AM1 has a function of storing data corresponding to the weighting factor w [j, i] and outputting a corresponding voltage. The multiplication circuit MUL1 multiplies the output signal x [i] of the input neuron circuit IN by the weight coefficient w [j, i] of the analog memory AM1, and generates the output signal w [j, i] x [i]. . A current corresponding to the multiplication result is supplied as the output signal w [j, i] x [i]. The multiplication circuit MUL2 multiplies the output signal x [i] of the input neuron circuit IN and the output signal dx [j] of the hidden error circuit HE [j] to generate a signal dw. A current corresponding to the multiplication result is supplied as the signal dw. The signal dw is supplied as a current corresponding to a change in the weighting factor w [j, i] stored in the analog memory AM1. That is, the multiplication circuit MUL2 corresponds to a writing circuit that changes data in the analog memory AM1. In the hidden synapse circuits HS [1, 0] to HS [m, 0], the input signal x [0] is −1, and the weighting factors w [1, 0] to w [m, 0] are θ H [1. ] To θ H [m] are given, and the output signals w [1, 0] x [0] to w [m, 0] x [0] are −θ H [1] to −θ H [m]. ] Is supplied. The hidden synapse circuit HS may be simply referred to as a circuit.
隠れニューロン回路ＨＮ［ｊ］は、各隠れシナプス回路ＨＳ［ｊ，ｉ］の出力信号ｗ［ｊ，ｉ］ｘ［ｉ］（電流）の和Σｉ＝０~Ｌｗ［ｊ，ｉ］ｘ［ｉ］を入力信号Ｘとし、当該入力信号を抵抗１２１により電圧に変換し、出力信号ｙ［ｊ］を生成するアンプを有する構成とすればよい。ここでアンプの出力信号ｙ（ｊ）は、入力信号Ｘを変数とすると式（１）のｆＨ（Ｘ）となる特性、あるいは、当該特性に近似できる特性とする。 The hidden neuron circuit HN [j] is a sum Σ i = 0 to L w [j, i] x of the output signals w [j, i] x [i] (currents) of the respective hidden synapse circuits HS [j, i]. [I] may be an input signal X, and the input signal may be converted into a voltage by the resistor 121 to have an amplifier that generates an output signal y [j]. Here, the output signal y (j) of the amplifier has a characteristic that becomes f H (X) in Expression (1) when the input signal X is a variable, or a characteristic that can be approximated to the characteristic.
Figure JPOXMLDOC01-appb-M000001
Figure JPOXMLDOC01-appb-M000001
式（１）においてαＨは任意の定数で、Ｘ＝０における出力信号の変化率に相当する。入力信号ＸであるΣｉ＝０~Ｌｗ［ｊ，ｉ］ｘ［ｉ］が０を超えた場合、すなわちΣｉ＝１~Ｌｗ［ｊ，ｉ］ｘ［ｉ］が閾値θＨ［ｊ］を超えた場合に、ｆＨ（Ｘ）、すなわち出力信号ｙ［ｊ］は１に近づく、つまり”Ｈ”（ハイレベル、Ｈレベルという）となるが、これを、隠れニューロン回路ＨＮ［ｊ］が発火する、と表現する。すなわち、閾値θＨは隠れニューロン回路ＨＮ［ｊ］が発火する際の閾値に相当する。 In Expression (1), α H is an arbitrary constant and corresponds to the rate of change of the output signal when X = 0. When Σ i = 0 to L w [j, i] x [i], which is the input signal X, exceeds 0, that is, Σ i = 1 to L w [j, i] x [i] is the threshold θ H [ If j] is exceeded, f H (X), that is, the output signal y [j] approaches 1, that is, “H” (high level, referred to as H level). j] is ignited. That is, the threshold value θ H corresponds to a threshold value when the hidden neuron circuit HN [j] is fired.
図６（Ｂ）は、出力シナプス回路ＯＳ［ｋ，ｊ］の構成を示している。出力シナプス回路ＯＳ［ｋ，ｊ］は、アナログメモリＡＭ２、乗算回路ＭＵＬ３、乗算回路ＭＵＬ４、および乗算回路ＭＵＬ５、から構成される。アナログメモリＡＭ２は、重み係数ｖ［ｋ，ｊ］に相当するデータを格納し、対応する電圧を出力する機能を有する。乗算回路ＭＵＬ３は、隠れニューロン回路ＨＮ［ｊ］の出力信号ｙ［ｊ］とアナログメモリＡＭ２の重み係数ｖ［ｋ，ｊ］との乗算を行い、出力信号ｖ［ｋ，ｊ］ｙ［ｊ］として、乗算結果に対応した電流を出力する。乗算回路ＭＵＬ４からは、隠れニューロン回路ＨＮ［ｊ］の出力信号ｙ［ｊ］と出力誤差回路ＯＥ［ｋ］の出力信号ｄｙ［ｋ］との乗算を行い、信号ｄｖとして、乗算結果に対応した電流がアナログメモリＡＭ２に供給される。信号ｄｖは、アナログメモリＡＭ２に格納された重み係数ｖ［ｋ，ｊ］の変更分に相当する電流として供給される。乗算回路ＭＵＬ５は、出力誤差回路ＯＥ［ｋ］の出力信号ｄｙ［ｋ］とアナログメモリＡＭの重み係数ｖ［ｋ，ｊ］との乗算を行い、出力信号ｖ［ｋ，ｊ］ｄｙ［ｋ］として、乗算結果に対応した電流を供給する。なお、出力シナプス回路ＯＳ［１，０］乃至ＯＳ［ｎ，０］において、入力信号ｙ［０］は−１、重み係数ｖ［１，０］乃至ｖ［ｎ，０］はθＯ［１］乃至θＯ［ｎ］が与えられており、出力信号ｖ［１，０］ｙ［０］乃至ｖ［ｎ，０］ｙ［０］として、−θＯ［１］乃至−θＯ［ｎ］に相当する電流が供給される。なお出力シナプス回路ＯＳは、単に回路という場合がある。 FIG. 6B shows the configuration of the output synapse circuit OS [k, j]. The output synapse circuit OS [k, j] includes an analog memory AM2, a multiplication circuit MUL3, a multiplication circuit MUL4, and a multiplication circuit MUL5. The analog memory AM2 has a function of storing data corresponding to the weighting coefficient v [k, j] and outputting a corresponding voltage. The multiplication circuit MUL3 multiplies the output signal y [j] of the hidden neuron circuit HN [j] by the weight coefficient v [k, j] of the analog memory AM2, and outputs the output signal v [k, j] y [j]. The current corresponding to the multiplication result is output. The multiplication circuit MUL4 multiplies the output signal y [j] of the hidden neuron circuit HN [j] by the output signal dy [k] of the output error circuit OE [k], and corresponds to the multiplication result as a signal dv. A current is supplied to the analog memory AM2. The signal dv is supplied as a current corresponding to the change in the weighting coefficient v [k, j] stored in the analog memory AM2. The multiplication circuit MUL5 multiplies the output signal dy [k] of the output error circuit OE [k] by the weight coefficient v [k, j] of the analog memory AM, and outputs the output signal v [k, j] dy [k]. A current corresponding to the multiplication result is supplied. In the output synapse circuits OS [1, 0] to OS [n, 0], the input signal y [0] is −1, and the weighting coefficients v [1, 0] to v [n, 0] are θ O [1. ] to theta O [n] are given, as the output signal v [1,0] y [0] to v [n, 0] y [ 0], -θ O [1] to - [theta] O [n ] Is supplied. The output synapse circuit OS may be simply referred to as a circuit.
図６（Ｃ）は、隠れシナプス回路ＨＳ［ｊ，ｉ］、出力シナプス回路ＯＳ［ｋ，ｊ］におけるアナログメモリＡＭ１、ＡＭ２に適用可能なアナログメモリＡＭの構成を示す。アナログメモリＡＭは、トランジスタＴｒ１５と容量素子Ｃから構成される。トランジスタＴｒ１５を、極めてオフ電流が低い酸化物半導体を用いたトランジスタとすることで、理想的なアナログメモリが構成できる。したがって、記憶保持のための大規模な容量素子を搭載する必要が無く、また、定期的なリフレッシュ動作によるアナログデータの回復の必要が無いため、チップ面積の縮小、消費電力の低減が可能となる。なお、データ更新の際、変更分に相当する電流が供給される構成のため、信号線ＷＬを”Ｈ”とする期間を調整することで、上述のηｖ若しくはηｗ（定数）を変更することができる。 FIG. 6C shows a configuration of the analog memory AM applicable to the analog memories AM1 and AM2 in the hidden synapse circuit HS [j, i] and the output synapse circuit OS [k, j]. The analog memory AM includes a transistor Tr15 and a capacitive element C. An ideal analog memory can be formed by using the transistor Tr15 as an oxide semiconductor that has an extremely low off-state current. Accordingly, there is no need to mount a large-scale capacitor element for storing data, and there is no need to restore analog data by a periodic refresh operation, so that the chip area and power consumption can be reduced. . Since the current corresponding to the changed amount is supplied when the data is updated, the above-described η v or η w (constant) is changed by adjusting the period during which the signal line WL is set to “H”. be able to.
図７（Ａ）は、出力ニューロン回路ＯＮ［ｋ］の構成を示している。出力ニューロン回路ＯＮ［ｋ］は、各出力シナプス回路ＯＳ［ｋ，ｊ］の出力信号ｖ［ｋ，ｊ］ｙ［ｊ］（電流）の和Σｊ＝０~ｍｖ［ｋ，ｊ］ｙ［ｊ］を入力信号Ｙとし、当該入力信号を抵抗１１１により電圧に変換し、出力信号Ｏ［ｋ］を生成するアンプ１１２を有している。ここで、アンプ１１２の出力信号Ｏ［ｋ］は、入力信号Ｙを変数とすると式（２）のｆＯ（Ｙ）となる特性、あるいは、当該特性に近似できる特性とする。 FIG. 7A shows the configuration of the output neuron circuit ON [k]. The output neuron circuit ON [k] has a sum Σ j = 0 to m v [k, j] y of the output signal v [k, j] y [j] (current) of each output synapse circuit OS [k, j]. [J] is an input signal Y, and the input signal Y is converted into a voltage by a resistor 111 to generate an output signal O [k]. Here, the output signal O [k] of the amplifier 112 has a characteristic that becomes f O (Y) in Expression (2) or a characteristic that can be approximated to the characteristic when the input signal Y is a variable.
Figure JPOXMLDOC01-appb-M000002
Figure JPOXMLDOC01-appb-M000002
式（２）においてαＯは任意の定数で、Ｙ＝０における出力信号の変化率に相当する。ここで入力信号ＹであるΣｊ＝０~ｍｖ［ｋ，ｊ］ｙ［ｊ］が０を超えた場合、すなわちΣｊ＝１~ｍｖ［ｋ，ｊ］ｙ［ｊ］が閾値θＯ［ｋ］を超えた場合に、ｆＯ（Ｙ）、すなわち出力信号Ｏ［ｋ］は１に近づく、つまり”Ｈ”となるが、これを、出力ニューロン回路ＯＮ［ｋ］が発火する、と表現する。すなわち、閾値θＯ［ｋ］は出力ニューロン回路ＯＮ［ｋ］が発火する際の閾値に相当する。 In Expression (2), α O is an arbitrary constant and corresponds to the rate of change of the output signal when Y = 0. Here, when Σ j = 0 to m v [k, j] y [j], which is the input signal Y, exceeds 0, that is, Σ j = 1 to m v [k, j] y [j] is the threshold θ When O [k] is exceeded, f O (Y), that is, the output signal O [k] approaches 1, that is, becomes “H”, which causes the output neuron circuit ON [k] to fire. It expresses. That is, the threshold value θ O [k] corresponds to a threshold value when the output neuron circuit ON [k] fires.
図５に示すニューラルネットワークにおいて、入力信号Ｉ［１］乃至Ｉ［Ｌ］に対して所望の出力信号Ｏ［１］乃至Ｏ［ｎ］が得られるように、重み係数ｗ［ｊ，ｉ］、ｖ［ｋ，ｊ］に相当するデータを各アナログメモリＡＭ１、ＡＭ２に格納することが学習に相当する。より具体的には、重み係数ｗ［ｊ，ｉ］、ｖ［ｋ，ｊ］に初期値として任意の値を与え、学習に用いる入力データを入力ニューロン回路の入力信号Ｉ［１］乃至Ｉ［Ｌ］に与え、出力期待値として教師信号を出力ニューロン回路の入力信号Ｔ［１］乃至Ｔ［ｎ］に与え、出力ニューロン回路の出力信号Ｏ［１］乃至Ｏ［ｎ］と入力信号Ｔ［１］乃至Ｔ［ｎ］との２乗誤差和が最小となるような重み係数ｗ［ｊ，ｉ］、ｖ［ｋ，ｊ］に収束させていくことが学習に相当する。 In the neural network shown in FIG. 5, weighting factors w [j, i], so that desired output signals O [1] to O [n] are obtained for the input signals I [1] to I [L]. Storing data corresponding to v [k, j] in each analog memory AM1, AM2 corresponds to learning. More specifically, an arbitrary value is given as an initial value to the weighting factors w [j, i] and v [k, j], and input data used for learning is input to the input signals I [1] to I [ L], a teacher signal as an output expected value is given to the input signals T [1] to T [n] of the output neuron circuit, and the output signals O [1] to O [n] of the output neuron circuit and the input signal T [ 1] to T [n] is converged to the weighting coefficients w [j, i] and v [k, j] that minimize the sum of squared errors.
ここで、教師信号とは、教師データを有する信号である。学習のために教師信号を外部信号として与えることにより、最適なパラメータ、例えば表示装置２００の使用条件に対してふさわしいと思われるパラメータを出力信号として出力することができる。 Here, the teacher signal is a signal having teacher data. By providing a teacher signal as an external signal for learning, an optimum parameter, for example, a parameter that seems to be suitable for the use conditions of the display device 200 can be output as an output signal.
ここで、重み係数ｖ［ｋ，ｊ］の勾配は、式（３）の関係となる。 Here, the gradient of the weighting coefficient v [k, j] has the relationship of Expression (3).
Figure JPOXMLDOC01-appb-M000003
Figure JPOXMLDOC01-appb-M000003
なお、式（３）において、Ｙ＝α０Σｊ＝０~ｍｖ［ｋ，ｊ］ｙ［ｊ］）である。よって、重み係数ｖ［ｋ，ｊ］は、ηｖ・ｅｙ［ｋ］・ｆＯ’（Ｙ）・ｙ［ｊ］に相当する分だけ値を変化させればよいことになる。なお、ηｖは定数である。 In equation (3), Y = α 0 Σ j = 0 to mv [k, j] y [j]). Therefore, the weight coefficient v [k, j] only needs to be changed by an amount corresponding to η v · ey [k] · f O ′ (Y) · y [j]. Note that η v is a constant.
また、重み係数ｗ［ｊ，ｉ］の勾配は、式（４）の関係となる。 In addition, the gradient of the weight coefficient w [j, i] has the relationship of Expression (4).
Figure JPOXMLDOC01-appb-M000004
Figure JPOXMLDOC01-appb-M000004
なお、式（４）において、Ｘ＝αＨΣｊ＝０~ｍｗ［ｊ，ｉ］ｘ［ｉ］、Ｙ＝α０Σｊ＝０~ｍｖ［ｋ，ｊ］ｙ［ｊ］である。重み係数ｗ［ｊ，ｉ］は、ｎｗ・（Σｊ＝０~ｍｅｙ［ｋ］・ｆＯ’（Ｙ）・ｖ［ｋ，ｊ］）・ｆＨ’（Ｘ）・ｘ［ｉ］に相当する分だけ値を変化させればよいことになる。図７（Ａ）の出力ニューロン回路ＯＮ［ｋ］において、教師信号Ｔ［ｋ］と出力信号Ｏ［ｋ］との差分をアンプ１１３で取得し、差分信号ｅｙ［ｋ］として出力する。なお、ηｗは定数である。なお出力ニューロン回路ＯＮは、単に回路という場合がある。 In equation (4), X = α H Σ j = 0 to m w [j, i] x [i], Y = α 0 Σ j = 0 to m v [k, j] y [j] is there. The weighting factor w [j, i] is n w · (Σ j = 0 to me y [k] · f O ′ (Y) · v [k, j]) · f H ′ (X) · x [i ], It is sufficient to change the value by an amount corresponding to []. In the output neuron circuit ON [k] of FIG. 7A, the difference between the teacher signal T [k] and the output signal O [k] is acquired by the amplifier 113 and output as the difference signal ey [k]. Note that η w is a constant. Note that the output neuron circuit ON may be simply referred to as a circuit.
図７（Ｂ）は、出力誤差回路ＯＥ［ｋ］の構成を示している。出力誤差回路ＯＥ［ｋ］は、出力シナプス回路ＯＳ［ｋ，ｊ］の出力信号ｖ［ｋ，ｊ］ｙ［ｊ］（電流）の和である信号Σｊ＝０~ｍｖ［ｋ，ｊ］ｙ［ｊ］と、出力ニューロン回路ＯＮ［ｋ］の出力信号である差分信号ｅｙ［ｋ］と、を入力信号とし、Σｊ＝０~ｍｖ［ｋ，ｊ］ｙ［ｊ］を抵抗１２１により電圧に変換し、信号Ｙを生成するアンプ１２２を有している。 FIG. 7B shows the configuration of the output error circuit OE [k]. The output error circuit OE [k] is a signal Σ j = 0 to m v [k, j, which is the sum of the output signals v [k, j] y [j] (current) of the output synapse circuit OS [k, j]. Y [j] and the differential signal ey [k], which is the output signal of the output neuron circuit ON [k], are input signals, and Σ j = 0 to m v [k, j] y [j] is a resistance An amplifier 122 that converts the voltage into a voltage by 121 and generates a signal Y is provided.
図７（Ｃ）は、隠れ誤差回路ＨＥ［ｊ］の構成を示している。隠れ誤差回路ＨＥ［ｊ］は、隠れシナプス回路ＨＳ［ｊ，ｉ］の出力信号ｗ［ｊ，ｉ］ｘ［ｉ］（電流）の和である信号Σｉ＝０~Ｌｗ［ｊ，ｉ］ｘ［ｉ］と、出力シナプス回路ＯＳ［ｋ，ｊ］の出力信号であるｖ［ｋ，ｊ］ｄｙ［ｋ］、つまり電流ｅｙ［ｋ］・ｆＯ’（Ｙ）・ｖ［ｋ，ｊ］の和である信号Σｋ＝１~Ｌｖ［ｋ，ｊ］ｄｙ［ｋ］＝Σｋ＝１~Ｌｅｙ［ｋ］・ｆＯ’（Ｙ）・ｖ［ｋ，ｊ］＝ｅｘ［ｊ］と、を入力信号とし、Σｉ＝０~Ｌｗ［ｊ，ｉ］ｘ［ｉ］を抵抗１３１により電圧に変換し、信号Ｘを生成するアンプ１３２と、ｅｘ［ｊ］を抵抗１３３により電圧に変換し、信号ＥＸを生成するアンプ１３４と、を有している。 FIG. 7C shows the configuration of the hidden error circuit HE [j]. The hidden error circuit HE [j] is a signal Σ i = 0 to L w [j, i which is the sum of the output signals w [j, i] x [i] (current) of the hidden synapse circuit HS [j, i]. ] X [i] and v [k, j] dy [k] which is an output signal of the output synapse circuit OS [k, j], that is, current ey [k] · f O ′ (Y) · v [k, j] signal Σ k = 1˜L v [k, j] dy [k] = Σ k = 1˜L ey [k] · f O ′ (Y) · v [k, j] = ex [J] as an input signal, Σ i = 0 to L w [j, i] x [i] is converted into a voltage by a resistor 131, and an amplifier 132 for generating a signal X and ex [j] as a resistor And an amplifier 134 that converts the voltage into a voltage by 133 and generates a signal EX.
以上のように、図５に示すニューラルネットワークにおいて、重み係数ｗ［ｊ，ｉ］、ｖ［ｋ，ｊ］を更新していくことができ、該ニューラルネットワークにおいて、入力信号Ｉ［１］乃至Ｉ［Ｌ］に対して所望の出力信号Ｏ［１］乃至Ｏ［ｎ］が得られるような、重み係数ｗ［ｊ，ｉ］、ｖ［ｋ，ｊ］に相当するデータを各アナログメモリに格納することができる。すなわち、演算回路であるＡＩＣ１０７の学習が可能となる。 As described above, in the neural network shown in FIG. 5, the weighting factors w [j, i] and v [k, j] can be updated. In the neural network, the input signals I [1] to I [I] Data corresponding to weighting factors w [j, i] and v [k, j] are stored in each analog memory so that desired output signals O [1] to O [n] can be obtained for [L]. can do. That is, the AIC 107 that is an arithmetic circuit can be learned.
ＡＩＣ１０７が有するニューラルネットワークにおいて、入力ニューロン回路の入力信号として学習データを与え、出力ニューロン回路の入力信号として当該学習データに対応する教師信号を与え、誤差信号に応じてアナログメモリのデータを更新することで学習する。学習により、入力ニューロン回路の入力信号として対象データを与えた時に、対象データ、すなわち表示装置２００の使用環境における外光の強度、表示装置２００に入射する外光の入射角、等の使用条件に合わせて、表示装置２００において、利用者の嗜好に合った色の調整、階調数の調整、等を施すためのパラメータを、出力することができる。 In the neural network of the AIC 107, learning data is given as an input signal of the input neuron circuit, a teacher signal corresponding to the learning data is given as an input signal of the output neuron circuit, and the data in the analog memory is updated according to the error signal. Learn with. When the target data is given as an input signal of the input neuron circuit by learning, the target data, that is, the use conditions such as the intensity of the external light in the use environment of the display device 200 and the incident angle of the external light incident on the display device 200 In addition, the display device 200 can output parameters for performing color adjustment, gradation number adjustment, and the like according to the user's preference.
以上のような構成とすることで、アナログ回路で構成し、回路規模を縮小でき、アナログメモリのデータ保持にリフレッシュ動作が不要な、階層型ニューラルネットワークを利用した演算回路を提供することができる。 With the above configuration, it is possible to provide an arithmetic circuit using a hierarchical neural network that includes an analog circuit, can reduce the circuit scale, and does not require a refresh operation for holding data in the analog memory.
以上のように、本発明の一態様に係る演算回路を用いることで、ニューラルネットワークにおける重み付け和の演算と重み係数の更新量の演算を行うことができる。 As described above, by using the arithmetic circuit according to one embodiment of the present invention, the calculation of the weighted sum and the update amount of the weighting coefficient in the neural network can be performed.
なお、特徴抽出フィルターの各重み係数の値を、乱数を用いて設定することが可能である。例えば、外光の入射角をセンシングする場合、センサから得られるデータが必ずしも外光の入射角に応じたピークを示すデータではなくても、特徴量を抽出することが可能である。よって、センサに入射する外光の角度を制御するための遮光膜を形成する際、遮光膜のレイアウトの精度が高くない場合でも、ニューラルネットワークの機械学習によって最適なパラメータを設定しなおし、入射角の正確な値が得られるようにすることができる。したがって、遮光膜の作製コストを抑えつつ、入射角の正確な値を得ることができる。 Note that the value of each weighting factor of the feature extraction filter can be set using a random number. For example, when sensing the incident angle of external light, it is possible to extract a feature amount even if the data obtained from the sensor is not necessarily data indicating a peak corresponding to the incident angle of external light. Therefore, when forming a light-shielding film to control the angle of external light incident on the sensor, even if the layout accuracy of the light-shielding film is not high, optimal parameters are set again by machine learning of the neural network, and the incident angle The exact value of can be obtained. Therefore, it is possible to obtain an accurate value of the incident angle while suppressing the manufacturing cost of the light shielding film.
当該ニューラルネットワークでの機械学習により得られた各種のパラメータは、コントローラのレジスタに格納することができる。 Various parameters obtained by machine learning in the neural network can be stored in a controller register.
本実施の形態は、他の実施の形態と適宜組み合わせて実施することが可能である。 This embodiment can be implemented in appropriate combination with any of the other embodiments.
（実施の形態３）
本実施の形態では、図５に示すニューラルネットワークを有する演算回路の動作例について説明する。 (Embodiment 3)
In this embodiment, an operation example of an arithmetic circuit including the neural network illustrated in FIG. 5 is described.
＜動作例＞
演算回路の動作とは、上記実施の形態で説明したニューラルネットワークを有する演算回路に学習データを入力し、演算回路に該学習データを学ばせた後、演算回路に対象データを入力して、対象データに対応したパラメータを出力するまでのことをいう。図８及び図９に、演算回路の動作を示すフローチャートを示す。なお以下の説明では、図５に示すニューラルネットワークを有する演算回路の動作を一例として説明する。 <Operation example>
The operation of the arithmetic circuit means that the learning data is input to the arithmetic circuit having the neural network described in the above embodiment, the learning data is input to the arithmetic circuit, and then the target data is input to the arithmetic circuit. This refers to the process until the parameter corresponding to the data is output. 8 and 9 are flowcharts showing the operation of the arithmetic circuit. In the following description, the operation of the arithmetic circuit having the neural network shown in FIG. 5 will be described as an example.
＜＜学習＞＞
初めに演算回路がデータを学習する動作について、図５、図８を用いて説明する。 << Learning >>
First, an operation in which the arithmetic circuit learns data will be described with reference to FIGS.
〔ステップＳ１−１〕
ステップＳ１−１では、入力ニューロン回路ＩＮに外部から学習データが入力される。学習データは、図５でいう入力信号Ｉ［１］乃至Ｉ［Ｌ］に相当する。なお、ここでの学習データとは、実施の形態１に示す表示装置においては例えば、センサで検知された外光の入射角、外光の強度、表示装置の角度などの使用条件のデータであり、その学習データの種類に応じて、入力される入力ニューロン回路ＩＮの個数が決まる。当該学習データの入力に必要の無い入力ニューロン回路ＩＮには出力信号ｘが固定値となるデータを入力する構成が好ましい。また、当該入力ニューロン回路ＩＮへの電源の供給を遮断するなどの構成を適用するのが好ましい。ここでは、学習データの種類はＬ個あり、学習データのｉ個目の値を学習データＩ［ｉ］と記載する。学習データＩ［１］乃至学習データＩ［Ｌ］が、それぞれ入力ニューロン回路ＩＮ［１］乃至ＩＮ［Ｌ］に入力されるとする。 [Step S1-1]
In step S1-1, learning data is input to the input neuron circuit IN from the outside. The learning data corresponds to the input signals I [1] to I [L] shown in FIG. Note that the learning data here is, for example, data on usage conditions such as the incident angle of external light detected by the sensor, the intensity of external light, and the angle of the display device in the display device shown in the first embodiment. Depending on the type of learning data, the number of input neuron circuits IN to be input is determined. The input neuron circuit IN which is not necessary for inputting the learning data is preferably configured to input data whose output signal x is a fixed value. In addition, it is preferable to apply a configuration such as blocking the supply of power to the input neuron circuit IN. Here, there are L types of learning data, and the i-th value of the learning data is described as learning data I [i]. It is assumed that learning data I [1] to learning data I [L] are input to input neuron circuits IN [1] to IN [L], respectively.
〔ステップＳ１−２〕
ステップＳ１−２では、入力ニューロン回路ＩＮ［１］乃至ＩＮ［Ｌ］から隠れシナプス回路ＨＳ［１，１］乃至ＨＳ［１，Ｌ］に出力信号ｘ［１］乃至ｘ［Ｌ］が入力される。ステップＳ１−２では、隠れシナプス回路ＨＳ［１，０］乃至ＨＳ［ｍ，０］に値が一定の信号ｘ［０］が入力される。隠れシナプス回路ＨＳ［１，０］乃至ＨＳ［１，Ｌ］は、出力信号ｘ［ｉ］に、アナログメモリＡＭ１に保持された重み係数ｗ［１，ｉ］を乗じた出力信号ｗ［１，ｉ］ｘ［ｉ］を、隠れ誤差回路ＨＥ［１］および隠れニューロン回路ＨＮ［１］に出力する。 [Step S1-2]
In step S1-2, the output signals x [1] to x [L] are input to the hidden synapse circuits HS [1,1] to HS [1, L] from the input neuron circuits IN [1] to IN [L]. The In step S1-2, a signal x [0] having a constant value is input to the hidden synapse circuits HS [1, 0] to HS [m, 0]. The hidden synapse circuits HS [1, 0] to HS [1, L] multiply the output signal x [i] by the weighting factor w [1, i] held in the analog memory AM1. i] x [i] is output to the hidden error circuit HE [1] and the hidden neuron circuit HN [1].
前述の動作は、隠れシナプス回路ＨＳ［ｍ，０］乃至ＨＳ［ｍ，Ｌ］でも行われ、出力信号ｗ［ｍ，ｉ］ｘ［ｉ］を、隠れ誤差回路ＨＥ［ｍ］および隠れニューロン回路ＨＮ［ｍ］に出力する。 The above operation is also performed in the hidden synapse circuits HS [m, 0] to HS [m, L], and the output signal w [m, i] x [i] is converted into the hidden error circuit HE [m] and the hidden neuron circuit. Output to HN [m].
〔ステップＳ１−３〕
ステップＳ１−３では、隠れニューロン回路ＨＮ［１］に、隠れシナプス回路ＨＳ［１，０］乃至ＨＳ［１，Ｌ］の出力信号の和であるΣｗ［１，ｉ］ｘ［ｉ］が入力される。同様に隠れニューロン回路ＨＮ［ｍ］に、隠れシナプス回路ＨＳ［ｍ，０］乃至ＨＳ［ｍ，Ｌ］の出力信号の和であるΣｗ［ｍ，ｉ］ｘ［ｉ］が入力される。 [Step S1-3]
In step S1-3, Σw [1, i] x [i], which is the sum of the output signals of the hidden synapse circuits HS [1, 0] to HS [1, L], is input to the hidden neuron circuit HN [1]. Is done. Similarly, Σw [m, i] x [i], which is the sum of the output signals of the hidden synapse circuits HS [m, 0] to HS [m, L], is input to the hidden neuron circuit HN [m].
なお、隠れニューロン回路ＨＮ［１］乃至ＨＮ［ｍ］の個数は学習データに応じて変更することも可能である。必要の無い隠れニューロン回路ＨＮには出力信号ｙが固定値となるデータを入力する構成が好ましい。また、当該隠れニューロン回路ＨＮへの電源の供給を遮断するなどの構成を適用するのが好ましい。ここでは、隠れニューロン回路ＨＮの個数はｍ個あり、ｊ番目の隠れニューロン回路ＨＮの入力値をΣｗ［ｊ，ｉ］ｘ［ｉ］と記載する。 Note that the number of hidden neuron circuits HN [1] to HN [m] can be changed according to the learning data. It is preferable that the hidden neuron circuit HN which is not necessary is configured to input data whose output signal y is a fixed value. Further, it is preferable to apply a configuration such as blocking the supply of power to the hidden neuron circuit HN. Here, the number of hidden neuron circuits HN is m, and the input value of the jth hidden neuron circuit HN is described as Σw [j, i] x [i].
〔ステップＳ１−４〕
ステップＳ１−４では、隠れニューロン回路ＨＮ［１］乃至ＨＮ［ｍ］から出力シナプス回路ＯＳ［１，１］乃至ＯＳ［１，ｍ］に出力信号ｙ［１］乃至ｙ［ｍ］が入力される。ステップＳ１−４では、出力シナプス回路ＯＳ［１，０］乃至ＯＳ［ｎ，０］に値が一定の信号ｙ［０］が入力される。出力シナプス回路ＯＳ［１，０］乃至ＯＳ［１，ｍ］は、出力信号ｙ［ｊ］に、アナログメモリＡＭ２に保持された重み係数ｖ［１，ｊ］を乗じた出力信号ｖ［１，ｊ］ｙ［ｊ］を、出力誤差回路ＯＥ［１］およびＯＮ［１］に出力する。 [Step S1-4]
In step S1-4, output signals y [1] to y [m] are input from the hidden neuron circuits HN [1] to HN [m] to the output synapse circuits OS [1,1] to OS [1, m]. The In step S1-4, a signal y [0] having a constant value is input to the output synapse circuits OS [1, 0] to OS [n, 0]. The output synapse circuits OS [1, 0] to OS [1, m] output signals v [1, j] obtained by multiplying the output signal y [j] by the weighting factor v [1, j] held in the analog memory AM2. j] y [j] is output to the output error circuits OE [1] and ON [1].
前述の動作は、出力シナプス回路ＯＳ［ｎ，０］乃至ＯＳ［ｎ，ｍ］でも行われ、出力信号ｖ［ｎ，ｊ］ｙ［ｊ］を、出力誤差回路ＯＥ［ｎ］およびＯＮ［ｎ］に出力する。 The above-described operation is also performed in the output synapse circuits OS [n, 0] to OS [n, m], and the output signal v [n, j] y [j] is converted into the output error circuits OE [n] and ON [n]. ].
〔ステップＳ１−５〕
ステップＳ１−５では、出力ニューロン回路ＯＮ［１］に、出力シナプス回路ＯＳ［１，０］乃至ＯＳ［１，ｍ］の出力信号の和であるΣｖ［１，ｊ］ｙ［ｊ］が入力される。同様に出力ニューロン回路ＯＮ［ｎ］に、出力シナプス回路ＯＳ［ｎ，０］乃至ＯＳ［ｎ，ｍ］の出力信号の和であるΣｖ［ｎ，ｊ］ｙ［ｊ］が入力される。出力ニューロン回路ＯＮ［１］乃至［ｎ］は、出力信号Ｏ［１］乃至Ｏ［ｎ］を出力する。 [Step S1-5]
In step S1-5, Σv [1, j] y [j], which is the sum of the output signals of the output synapse circuits OS [1,0] to OS [1, m], is input to the output neuron circuit ON [1]. Is done. Similarly, Σv [n, j] y [j], which is the sum of output signals of the output synapse circuits OS [n, 0] to OS [n, m], is input to the output neuron circuit ON [n]. The output neuron circuits ON [1] to [n] output output signals O [1] to O [n].
出力ニューロン回路ＯＮ［１］は、出力シナプス回路ＯＳ［１，０］乃至ＯＳ［１，ｍ］の出力信号の和であるΣｖ［１，ｊ］ｙ［ｊ］および外部からの教師信号Ｔ［１］をもとに、差分信号ｅｙ［１］を出力誤差回路ＯＥ［１］に出力する。同様に、出力ニューロン回路ＯＮ［ｎ］は、出力シナプス回路ＯＳ［ｎ，０］乃至ＯＳ［ｎ，ｍ］の出力信号の和であるΣｖ［ｎ，ｊ］ｙ［ｊ］および外部からの教師信号Ｔ［ｎ］をもとに、差分信号ｅｙ［ｎ］を出力誤差回路ＯＥ［ｎ］に出力する。 The output neuron circuit ON [1] includes Σv [1, j] y [j] which is the sum of output signals of the output synapse circuits OS [1, 0] to OS [1, m] and an external teacher signal T [ 1], the differential signal ey [1] is output to the output error circuit OE [1]. Similarly, the output neuron circuit ON [n] includes Σv [n, j] y [j] that is a sum of output signals of the output synapse circuits OS [n, 0] to OS [n, m] and an external teacher. Based on the signal T [n], the differential signal ey [n] is output to the output error circuit OE [n].
〔ステップＳ１−６〕
ステップＳ１−６では、出力ニューロン回路ＯＮ［１］から差分信号ｅｙ［１］、および出力シナプス回路ＯＳ［１，０］乃至ＯＳ［１，ｍ］の出力信号の和であるΣｖ［１，ｊ］ｙ［ｊ］が、出力誤差回路ＯＥ［１］に入力される。出力誤差回路ＯＥ［１］は、差分信号ｅｙ［１］に、Σｖ［１，ｊ］ｙ［ｊ］を微分することで得られる信号を乗じた出力信号ｄｙ［１］を、出力シナプス回路ＯＳ［１，０］乃至ＯＳ［１，ｍ］に出力する。 [Step S1-6]
In step S1-6, Σv [1, j, which is the sum of the difference signal ey [1] from the output neuron circuit ON [1] and the output signals of the output synapse circuits OS [1, 0] to OS [1, m]. ] Y [j] is input to the output error circuit OE [1]. The output error circuit OE [1] outputs the output signal dy [1] obtained by multiplying the difference signal ey [1] by a signal obtained by differentiating Σv [1, j] y [j], and outputs the output signal dy [1]. Output to [1, 0] to OS [1, m].
同様にステップＳ１−６では、出力ニューロン回路ＯＮ［ｎ］から差分信号ｅｙ［ｎ］、および出力シナプス回路ＯＳ［ｎ，０］乃至ＯＳ［ｎ，ｍ］の出力信号の和であるΣｖ［ｎ，ｊ］ｙ［ｊ］が、出力誤差回路ＯＥ［ｎ］に入力される。出力誤差回路ＯＥ［ｎ］は、差分信号ｅｙ［ｎ］に、Σｖ［ｎ，ｊ］ｙ［ｊ］を微分することで得られる信号を乗じた出力信号ｄｙ［ｎ］を、隠れシナプス回路ＯＳ［ｎ，０］乃至ＯＳ［ｎ，ｍ］に出力する。 Similarly, in step S1-6, Σv [n, which is the sum of the difference signal ey [n] from the output neuron circuit ON [n] and the output signals of the output synapse circuits OS [n, 0] to OS [n, m]. , J] y [j] are input to the output error circuit OE [n]. The output error circuit OE [n] outputs an output signal dy [n] obtained by multiplying the difference signal ey [n] by a signal obtained by differentiating Σv [n, j] y [j] to the hidden synapse circuit OS. Output to [n, 0] to OS [n, m].
〔ステップＳ１−７〕
ステップＳ１−７では、出力信号ｄｙ［１］をもとに、出力シナプス回路ＯＳ［１，０］乃至ＯＳ［１，ｍ］内のアナログメモリＡＭ２に保持された重み係数ｖ［１，ｊ］を更新する。同様にステップＳ１−７では、出力信号ｄｙ［ｎ］をもとに、出力シナプス回路ＯＳ［ｎ，０］乃至ＯＳ［ｎ，ｍ］内のアナログメモリＡＭ２に保持された重み係数ｖ［ｎ，ｊ］を更新する。 [Step S1-7]
In step S1-7, the weighting coefficient v [1, j] held in the analog memory AM2 in the output synapse circuits OS [1, 0] to OS [1, m] based on the output signal dy [1]. Update. Similarly, in step S1-7, based on the output signal dy [n], the weighting factor v [n, held in the analog memory AM2 in the output synapse circuits OS [n, 0] to OS [n, m]. j] is updated.
加えて、出力シナプス回路ＯＳ［１，１］乃至ＯＳ［ｎ，１］では、更新した重み係数ｖ［１，１］乃至ｖ［ｎ，１］に出力信号ｄｙ［１］乃至ｄｙ［ｎ］を乗じた出力信号ｖ［１，１］ｄｙ［１］乃至ｖ［ｎ，１］ｄｙ［ｎ］を、隠れ誤差回路ＨＥ［１］に出力する。同様に出力シナプス回路ＯＳ［１，ｍ］乃至ＯＳ［ｎ，ｍ］では、更新した重み係数ｖ［１，ｍ］乃至ｖ［ｎ，ｍ］に出力信号ｄｙ［１］乃至ｄｙ［ｎ］を乗じた出力信号ｖ［１，ｍ］ｄｙ［１］乃至ｖ［ｎ，１］ｄｙ［ｎ］を、隠れ誤差回路ＨＥ［ｍ］に出力する。 In addition, in the output synapse circuits OS [1,1] to OS [n, 1], the output signals dy [1] to dy [n] are added to the updated weighting factors v [1,1] to v [n, 1]. The output signals v [1,1] dy [1] to v [n, 1] dy [n] multiplied by are output to the hidden error circuit HE [1]. Similarly, in the output synapse circuits OS [1, m] to OS [n, m], the output signals dy [1] to dy [n] are applied to the updated weight coefficients v [1, m] to v [n, m]. The multiplied output signals v [1, m] dy [1] to v [n, 1] dy [n] are output to the hidden error circuit HE [m].
〔ステップＳ１−８〕
ステップＳ１−８では、隠れシナプス回路ＨＳ［１，０］乃至ＨＳ［１，Ｌ］の出力信号の和であるΣｗ［１，ｉ］ｘ［ｉ］、および出力シナプス回路ＯＳ［１，１］乃至ＯＳ［ｎ，１］の出力信号の和であるｅｘ［１］が、隠れ誤差回路ＨＥ［１］に入力される。隠れ誤差回路ＨＥ［１］は、信号ｅｘ［１］に、Σｗ［１，ｉ］ｘ［ｉ］をもとに微分することで得られる信号を乗じた出力信号ｄｘ［１］を、隠れシナプス回路ＨＳ［１，０］乃至ＨＳ［１，Ｌ］に出力する。 [Step S1-8]
In step S1-8, Σw [1, i] x [i], which is the sum of the output signals of the hidden synapse circuits HS [1, 0] to HS [1, L], and the output synapse circuit OS [1, 1]. The ex [1] that is the sum of the output signals of OS [n, 1] is input to the hidden error circuit HE [1]. The hidden error circuit HE [1] generates an output signal dx [1] obtained by multiplying the signal ex [1] by a signal obtained by differentiating on the basis of Σw [1, i] x [i]. Output to circuits HS [1, 0] to HS [1, L].
同様にステップＳ１−８では、隠れシナプス回路ＨＳ［ｍ，０］乃至ＨＳ［ｍ，Ｌ］の出力信号の和であるΣｗ［ｍ，ｉ］ｘ［ｉ］、および出力シナプス回路ＯＳ［１，ｍ］乃至ＯＳ［ｎ，ｍ］の出力信号の和であるｅｘ［ｍ］が、隠れ誤差回路ＨＥ［ｍ］に入力される。隠れ誤差回路ＨＥ［ｍ］は、信号ｅｘ［ｍ］に、Σｗ［ｍ，ｉ］ｘ［ｉ］をもとに微分することで得られる信号を乗じた出力信号ｄｘ［ｍ］を、隠れシナプス回路ＨＳ［ｍ，０］乃至ＨＳ［ｍ，Ｌ］に出力する。 Similarly, in step S1-8, Σw [m, i] x [i], which is the sum of the output signals of the hidden synapse circuits HS [m, 0] to HS [m, L], and the output synapse circuit OS [1, m] to ex [m], which is the sum of the output signals of OS [n, m], is input to the hidden error circuit HE [m]. The hidden error circuit HE [m] generates an output signal dx [m] obtained by multiplying the signal ex [m] by a signal obtained by differentiating the signal ex [m] based on Σw [m, i] x [i]. Output to the circuits HS [m, 0] to HS [m, L].
〔ステップＳ１−９〕
ステップＳ１−９では、出力信号ｄｘ［１］をもとに、隠れシナプス回路ＨＳ［１，０］乃至ＨＳ［１，Ｌ］内のアナログメモリＡＭ１に保持された重み係数ｗ［１，ｉ］を重み係数ｄｗ［１，ｉ］更新する。同様にステップＳ１−９では、出力信号ｄｘ［ｍ］をもとに、隠れシナプス回路ＨＳ［ｍ，０］乃至ＯＳ［ｍ，Ｌ］内のアナログメモリＡＭ１に保持された重み係数ｗ［ｍ，ｉ］を重み係数ｄｗ［ｍ，ｉ］を更新する。 [Step S1-9]
In step S1-9, based on the output signal dx [1], the weighting factor w [1, i] held in the analog memory AM1 in the hidden synapse circuits HS [1, 0] to HS [1, L]. To update the weighting coefficient dw [1, i]. Similarly, in step S1-9, based on the output signal dx [m], the weighting factor w [m, held in the analog memory AM1 in the hidden synapse circuits HS [m, 0] to OS [m, L]. i] is updated with the weighting coefficient dw [m, i].
以降は、更新された重み係数ｄｗ［１，ｉ］乃至ｄｗ［ｍ，ｉ］をもとに、ステップＳ１−２乃至Ｓ１−９を所定の回数繰り返す。 Thereafter, steps S1-2 to S1-9 are repeated a predetermined number of times based on the updated weighting factors dw [1, i] to dw [m, i].
〔ステップＳ１−１０〕
ステップＳ１−１０では、ステップＳ１−２乃至Ｓ１−９を所定の回数を繰り返したかどうかの判定が行われる。所定の回数に達したとき当該学習データに対する学習を終了する。 [Step S1-10]
In step S1-10, it is determined whether steps S1-2 to S1-9 have been repeated a predetermined number of times. When the predetermined number of times is reached, the learning for the learning data is terminated.
なお、ここでの所定の回数は、理想的には出力信号Ｏ［１］乃至Ｏ［ｎ］と教師信号Ｔ［１］乃至Ｔ［ｎ］との誤差が規定値内に収まるまで繰り返すことが好ましいが、経験的に決めた任意の回数としてもよい。 Note that the predetermined number of times here is ideally repeated until the error between the output signals O [1] to O [n] and the teacher signals T [1] to T [n] falls within a specified value. Although it is preferable, it may be an arbitrary number determined empirically.
〔ステップＳ１−１１〕
ステップＳ１−１１では、全ての学習データにおいて学習したか否かを判定する。未終了の学習データがある場合はステップＳ１−１乃至Ｓ１−１０を繰り返し、全ての学習データについて学習を終了した場合には終了する。なお、一度学習した学習データについて、一通り全ての学習データに対する学習が終った後に、再度学習する構成としてもよい。 [Step S1-11]
In step S1-11, it is determined whether or not learning has been performed on all learning data. If there is unfinished learning data, steps S1-1 to S1-10 are repeated, and if learning has been completed for all the learning data, the process is terminated. In addition, about the learning data once learned, it is good also as a structure which learns again after the learning with respect to all the learning data is completed.
階層型パーセプトロンのニューラルネットワークでは、隠れ層、すなわち隠れシナプス回路および隠れニューロン回路を多層に設けることが好ましい。隠れシナプス回路および隠れニューロン回路を多層に設ける場合、重み係数の更新を繰り返し行うことができるため、学習効率を高めることができる。 In a hierarchical perceptron neural network, it is preferable to provide hidden layers, that is, hidden synapse circuits and hidden neuron circuits in multiple layers. When the hidden synapse circuit and the hidden neuron circuit are provided in multiple layers, the weighting factor can be updated repeatedly, so that the learning efficiency can be improved.
＜＜パラメータの出力＞＞
次に、先にデータを学習させた図５のニューラルネットワークを有する演算回路に、対象データを入力して、結果を出力する動作について、図９を用いて説明する。 << Parameter output >>
Next, the operation of inputting the target data and outputting the result to the arithmetic circuit having the neural network of FIG. 5 in which the data has been learned will be described with reference to FIG.
〔ステップＳ２−１〕
ステップＳ２−１では、入力ニューロン回路ＩＮに外部から対象データが入力される。 [Step S2-1]
In step S2-1, target data is input to the input neuron circuit IN from the outside.
〔ステップＳ２−２〕
ステップＳ２−２では、入力ニューロン回路ＩＮ［１］乃至ＩＮ［Ｌ］から隠れシナプス回路ＨＳ［１，１］乃至ＩＮ［１，Ｌ］に、対象データに相当する出力信号ｘ［１］乃至ｘ［Ｌ］が入力される。ステップＳ２−２では、隠れシナプス回路ＨＳ［１，０］乃至ＨＳ［ｍ，０］に値が一定の信号ｘ［０］が入力される。隠れシナプス回路ＨＳ［１，０］乃至ＨＳ［１，Ｌ］は、出力信号ｘ［ｉ］に、学習のステップＳ１−９で保持された重み係数ｗ［１，ｉ］を乗じた出力信号ｗ［１，ｉ］ｘ［ｉ］を、隠れニューロン回路ＨＮ［１］に出力する。 [Step S2-2]
In step S2-2, output signals x [1] to x corresponding to the target data are transferred from the input neuron circuits IN [1] to IN [L] to the hidden synapse circuits HS [1, 1] to IN [1, L]. [L] is input. In step S2-2, a signal x [0] having a constant value is input to the hidden synapse circuits HS [1, 0] to HS [m, 0]. The hidden synapse circuits HS [1, 0] to HS [1, L] multiply the output signal x [i] by the weight coefficient w [1, i] held in the learning step S1-9. [1, i] x [i] is output to the hidden neuron circuit HN [1].
前述の動作は、隠れシナプス回路ＨＳ［ｍ，０］乃至ＨＳ［ｍ，Ｌ］でも行われ、出力信号ｗ［ｍ，ｉ］ｘ［ｉ］を、隠れニューロン回路ＨＮ［ｍ］に出力する。 The above-described operation is also performed in the hidden synapse circuits HS [m, 0] to HS [m, L], and the output signal w [m, i] x [i] is output to the hidden neuron circuit HN [m].
〔ステップＳ２−３〕
ステップＳ２−３では、隠れニューロン回路ＨＮ［１］に、隠れシナプス回路ＨＳ［１，０］乃至ＨＳ［１，Ｌ］の出力信号の和であるΣｗ［１，ｉ］ｘ［ｉ］が入力される。同様に隠れニューロン回路ＨＮ［ｍ］に、隠れシナプス回路ＨＳ［ｍ，０］乃至ＨＳ［ｍ，Ｌ］の出力信号の和であるΣｗ［ｍ，ｉ］ｘ［ｉ］が入力される。 [Step S2-3]
In step S2-3, the hidden neuron circuit HN [1] is input with Σw [1, i] x [i], which is the sum of output signals of the hidden synapse circuits HS [1, 0] to HS [1, L]. Is done. Similarly, Σw [m, i] x [i], which is the sum of the output signals of the hidden synapse circuits HS [m, 0] to HS [m, L], is input to the hidden neuron circuit HN [m].
〔ステップＳ２−４〕
ステップＳ２−４では、隠れニューロン回路ＨＮ［１］乃至ＨＮ［ｍ］から出力シナプス回路ＯＳ［１，１］乃至ＯＳ［ｎ，１］に出力信号ｙ［１］乃至ｙ［ｍ］が入力される。ステップＳ２−４では、出力シナプス回路ＯＳ［１，０］乃至ＯＳ［ｎ，０］に値が一定の信号ｙ［０］が入力される。出力シナプス回路ＯＳ［１，０］乃至ＯＳ［１，ｍ］は、出力信号ｙ［ｊ］に、アナログメモリＡＭ２に保持された重み係数ｖ［１，ｊ］を乗じた出力信号ｖ［１，ｊ］ｙ［ｊ］を、出力ニューロン回路ＯＮ［１］に出力する。 [Step S2-4]
In step S2-4, output signals y [1] to y [m] are input from the hidden neuron circuits HN [1] to HN [m] to the output synapse circuits OS [1,1] to OS [n, 1]. The In step S2-4, a signal y [0] having a constant value is input to the output synapse circuits OS [1, 0] to OS [n, 0]. The output synapse circuits OS [1, 0] to OS [1, m] output signals v [1, j] obtained by multiplying the output signal y [j] by the weighting factor v [1, j] held in the analog memory AM2. j] y [j] is output to the output neuron circuit ON [1].
前述の動作は、出力シナプス回路ＯＳ［ｎ，０］乃至ＯＳ［ｎ，ｍ］でも行われ、出力信号ｖ［ｎ，ｊ］ｙ［ｊ］を、出力ニューロン回路ＯＮ［ｎ］に出力する。 The above-described operation is also performed in the output synapse circuits OS [n, 0] to OS [n, m], and the output signal v [n, j] y [j] is output to the output neuron circuit ON [n].
〔ステップＳ２−５〕
ステップＳ２−５では、出力ニューロン回路ＯＮ［１］に、出力シナプス回路ＯＳ［１，０］乃至ＯＳ［１，ｍ］の出力信号の和であるΣｖ［１，ｊ］ｙ［ｊ］が入力される。同様に出力ニューロン回路ＯＮ［ｎ］に、出力シナプス回路ＯＳ［ｎ，０］乃至ＯＳ［ｎ，ｍ］の出力信号の和であるΣｖ［ｎ，ｊ］ｙ［ｊ］が入力される。出力ニューロン回路ＯＮ［１］乃至［ｎ］は、出力信号Ｏ［１］乃至Ｏ［ｎ］を出力する。 [Step S2-5]
In step S2-5, Σv [1, j] y [j], which is the sum of output signals of the output synapse circuits OS [1,0] to OS [1, m], is input to the output neuron circuit ON [1]. Is done. Similarly, Σv [n, j] y [j], which is the sum of output signals of the output synapse circuits OS [n, 0] to OS [n, m], is input to the output neuron circuit ON [n]. The output neuron circuits ON [1] to [n] output output signals O [1] to O [n].
ここで、各重み係数は学習したデータに基づき値が決定されているため、出力された出力信号Ｏ［１］乃至Ｏ［ｎ］として、対象データ、すなわち表示装置２００の使用環境における外光の強度、表示装置２００に入射する外光の入射角、利用者の嗜好などの使用条件に合わせた輝度、色調、等を設定するためのパラメータを出力することができる。 Here, since the value of each weighting factor is determined based on the learned data, the output data O [1] to O [n] that are output are the target data, that is, the external light in the usage environment of the display device 200. Parameters for setting intensity, brightness, color tone, and the like according to usage conditions such as intensity, an incident angle of external light incident on the display device 200, and user preferences can be output.
上記のステップＳ１−１乃至ステップＳ１−１０、及びステップＳ２−１乃至ステップＳ２−５を行うことによって、図５に示すニューラルネットワークを有する演算回路に学習データを学習させ、その後、対象データに対応した信号を出力することができる。 By performing the above steps S1-1 to S1-10 and steps S2-1 to S2-5, the arithmetic circuit having the neural network shown in FIG. 5 learns the learning data, and then corresponds to the target data. Can be output.
上記の動作を行うことによって、階層型パーセプトロンのニューラルネットワークを、ユーザの好みに合わせた表示とすることができる。また、外光に依存しない表示品位を提供することができる。 By performing the above operation, the hierarchical perceptron neural network can be displayed according to the user's preference. In addition, display quality that does not depend on external light can be provided.
本実施の形態は、他の実施の形態と適宜組み合わせて実施することが可能である。 This embodiment can be implemented in appropriate combination with any of the other embodiments.
（実施の形態４）
本実施の形態では、反射型表示素子と発光型表示素子とを用いた表示装置の構成例について説明する。なお、本実施の形態では、反射型表示素子として液晶素子を用い、発光型表示素子としてＥＬ材料を用いた発光素子を用いる場合を例に挙げて、表示装置の構成例について説明する。 (Embodiment 4)
In this embodiment, a structural example of a display device using a reflective display element and a light-emitting display element will be described. Note that in this embodiment, a structure example of a display device is described using a case where a liquid crystal element is used as a reflective display element and a light-emitting element using an EL material is used as a light-emitting display element.
図１０（Ａ）に、本発明の一態様に係る表示装置２００の断面の構造を一例として示す。図１０（Ａ）に示す表示装置２００は、発光型表示素子１０３と、反射型表示素子１０１と、発光型表示素子１０３への電流の供給を制御する機能を有するトランジスタ２０５と、反射型表示素子１０１への電圧の供給を制御する機能を有するトランジスタ２０６とを有する。そして、発光型表示素子１０３と、反射型表示素子１０１と、トランジスタ２０５と、トランジスタ２０６とは、基板２０１と基板２０２の間に位置する。ここで反射型表示素子１０１として、液晶素子を用いる。 FIG. 10A illustrates an example of a cross-sectional structure of the display device 200 according to one embodiment of the present invention. A display device 200 illustrated in FIG. 10A includes a light-emitting display element 103, a reflective display element 101, a transistor 205 having a function of controlling current supply to the light-emitting display element 103, and a reflective display element. A transistor 206 having a function of controlling supply of a voltage to the transistor 101. The light emitting display element 103, the reflective display element 101, the transistor 205, and the transistor 206 are located between the substrate 201 and the substrate 202. Here, a liquid crystal element is used as the reflective display element 101.
また、表示装置２００において反射型表示素子１０１は、画素電極２０７と、共通電極２０８と、液晶層２０９とを有する。画素電極２０７は、トランジスタ２０６に電気的に接続されている。そして、画素電極２０７と共通電極２０８の間に印加される電圧にしたがって液晶層２０９の配向が制御される。なお、図１０（Ａ）では、画素電極２０７が可視光を反射する機能を有し、共通電極２０８が可視光を透過する機能を有する場合を例示しており、基板２０２側から入射した光が白抜きの矢印で示すように画素電極２０７において反射し、再び基板２０２側から放射される。 In the display device 200, the reflective display element 101 includes a pixel electrode 207, a common electrode 208, and a liquid crystal layer 209. The pixel electrode 207 is electrically connected to the transistor 206. Then, the orientation of the liquid crystal layer 209 is controlled according to the voltage applied between the pixel electrode 207 and the common electrode 208. Note that FIG. 10A illustrates a case where the pixel electrode 207 has a function of reflecting visible light and the common electrode 208 has a function of transmitting visible light, and light incident from the substrate 202 side is illustrated. As indicated by a white arrow, the light is reflected from the pixel electrode 207 and is emitted again from the substrate 202 side.
また、発光型表示素子１０３は、トランジスタ２０５に電気的に接続されている。発光型表示素子１０３から発せられる光は、基板２０２側に放射される。なお、図１０（Ａ）では、画素電極２０７が可視光を反射する機能を有し、共通電極２０８が可視光を透過する機能を有する場合を例示しているため、発光型表示素子１０３から発せられる光は、白抜きの矢印で示すように画素電極２０７と重ならない領域を通過し、共通電極２０８が位置する領域を通過して、基板２０２側から放射される。 The light emitting display element 103 is electrically connected to the transistor 205. Light emitted from the light emitting display element 103 is emitted to the substrate 202 side. Note that FIG. 10A illustrates the case where the pixel electrode 207 has a function of reflecting visible light and the common electrode 208 has a function of transmitting visible light; thus, the light is emitted from the light-emitting display element 103. The emitted light passes through a region that does not overlap with the pixel electrode 207 as indicated by a white arrow, passes through a region where the common electrode 208 is located, and is emitted from the substrate 202 side.
そして、図１０（Ａ）に示す表示装置２００では、トランジスタ２０５とトランジスタ２０６とが同一の層２１０に位置しており、トランジスタ２０５とトランジスタ２０６とが含まれる層２１０は、反射型表示素子１０１と発光型表示素子１０３の間の領域を有する。なお、少なくとも、トランジスタ２０５が有する半導体層と、トランジスタ２０６が有する半導体層とが同一の絶縁表面上に位置している場合、トランジスタ２０５とトランジスタ２０６とが同一の層２１０に含まれていると言える。 In the display device 200 illustrated in FIG. 10A, the transistor 205 and the transistor 206 are located in the same layer 210, and the layer 210 including the transistor 205 and the transistor 206 includes the reflective display element 101. A region between the light emitting display elements 103 is provided. Note that at least when the semiconductor layer included in the transistor 205 and the semiconductor layer included in the transistor 206 are located on the same insulating surface, it can be said that the transistor 205 and the transistor 206 are included in the same layer 210. .
上記構成により、トランジスタ２０５とトランジスタ２０６とを共通の作製工程で作製することができる。 With the above structure, the transistor 205 and the transistor 206 can be manufactured through a common manufacturing process.
次いで、図１０（Ｂ）に、本発明の一態様に係る表示装置２００の別の構成について、断面の構造を一例として示す。図１０（Ｂ）に示す表示装置２００は、トランジスタ２０５とトランジスタ２０６とが異なる層に含まれている点において、図１０（Ａ）に示す表示装置２００と構成が異なる。 Next, FIG. 10B illustrates an example of a cross-sectional structure of another structure of the display device 200 according to one embodiment of the present invention. The display device 200 illustrated in FIG. 10B is different in structure from the display device 200 illustrated in FIG. 10A in that the transistor 205 and the transistor 206 are included in different layers.
具体的に、図１０（Ｂ）に示す表示装置２００では、トランジスタ２０５が含まれる層２１０ａと、トランジスタ２０６が含まれる層２１０ｂとを有し、層２１０ａと層２１０ｂとは、反射型表示素子１０１と発光型表示素子１０３の間の領域を有する。そして、図１０（Ｂ）に示す表示装置２００では、層２１０ａが層２１０ｂよりも発光型表示素子１０３側に近い。なお、少なくとも、トランジスタ２０５が有する半導体層と、トランジスタ２０６が有する半導体層とが異なる絶縁表面上に位置している場合、トランジスタ２０５とトランジスタ２０６とが異なる層に含まれていると言える。 Specifically, the display device 200 illustrated in FIG. 10B includes a layer 210a including the transistor 205 and a layer 210b including the transistor 206. The layer 210a and the layer 210b each include the reflective display element 101. And a region between the light-emitting display element 103. In the display device 200 illustrated in FIG. 10B, the layer 210a is closer to the light-emitting display element 103 side than the layer 210b. Note that at least when the semiconductor layer included in the transistor 205 and the semiconductor layer included in the transistor 206 are located on different insulating surfaces, it can be said that the transistor 205 and the transistor 206 are included in different layers.
上記構成により、トランジスタ２０５と、トランジスタ２０５に電気的に接続される各種配線とを、トランジスタ２０６と、トランジスタ２０６に電気的に接続される各種配線とを、部分的に重ねることができるため、画素のサイズを小さく抑え、表示装置２００の高精細化を実現することができる。 With the above structure, the transistor 205 and various wirings electrically connected to the transistor 205 can be partially overlapped with the transistor 206 and various wirings electrically connected to the transistor 206, so that the pixel The size of the display device 200 can be kept small, and high definition of the display device 200 can be realized.
次いで、図１１（Ａ）に、本発明の一態様に係る表示装置２００の別の構成について、断面の構造を一例として示す。図１１（Ａ）に示す表示装置２００は、トランジスタ２０５とトランジスタ２０６とが異なる層含まれている点において、図１０（Ａ）に示す表示装置２００と構成が異なる。そして、図１１（Ａ）に示す表示装置２００は、トランジスタ２０５が含まれる層２１０ａが、発光型表示素子１０３よりも基板２０１側に近い点において、図１０（Ｂ）に示す表示装置２００と構成が異なる。 Next, FIG. 11A illustrates an example of a cross-sectional structure of another structure of the display device 200 according to one embodiment of the present invention. A display device 200 illustrated in FIG. 11A is different from the display device 200 illustrated in FIG. 10A in that the transistor 205 and the transistor 206 are included in different layers. The display device 200 illustrated in FIG. 11A has the same structure as the display device 200 illustrated in FIG. 10B in that the layer 210a including the transistor 205 is closer to the substrate 201 than the light-emitting display element 103 is. Is different.
具体的に、図１１（Ａ）に示す表示装置２００では、トランジスタ２０５が含まれる層２１０ａと、トランジスタ２０６が含まれる層２１０ｂとを有する。そして、層２１０ａは、発光型表示素子１０３と基板２０１との間の領域を有する。また、層２１０ｂは、反射型表示素子１０１と発光型表示素子１０３の間の領域を有する。 Specifically, the display device 200 illustrated in FIG. 11A includes a layer 210 a including the transistor 205 and a layer 210 b including the transistor 206. The layer 210 a has a region between the light emitting display element 103 and the substrate 201. The layer 210 b has a region between the reflective display element 101 and the light emitting display element 103.
上記構成により、トランジスタ２０５と、トランジスタ２０５に電気的に接続される各種配線とを、トランジスタ２０６と、トランジスタ２０６に電気的に接続される各種配線とを、図１０（Ｂ）の場合よりもより多く重ねることができるため、画素のサイズを小さく抑え、表示装置２００の高精細化を実現することができる。 With the above structure, the transistor 205 and various wirings electrically connected to the transistor 205 are connected to each other, and the transistor 206 and various wirings electrically connected to the transistor 206 are more connected than in the case of FIG. Since many pixels can be overlapped, the size of the pixel can be reduced and high definition of the display device 200 can be realized.
次いで、図１１（Ｂ）に、本発明の一態様に係る表示装置２００の別の構成について、断面の構造を一例として示す。図１１（Ｂ）に示す表示装置２００は、トランジスタ２０５とトランジスタ２０６とが同一の層に含まれている点では、図１０（Ａ）に示す表示装置２００と構成は同じである。ただし、図１１（Ｂ）に示す表示装置２００は、トランジスタ２０５とトランジスタ２０６とが含まれている層が、発光型表示素子１０３よりも基板２０１側に近い点において、図１０（Ａ）に示す表示装置２００と構成が異なる。 Next, FIG. 11B illustrates an example of a cross-sectional structure of another structure of the display device 200 according to one embodiment of the present invention. The display device 200 illustrated in FIG. 11B has the same structure as the display device 200 illustrated in FIG. 10A in that the transistor 205 and the transistor 206 are included in the same layer. Note that the display device 200 illustrated in FIG. 11B is illustrated in FIG. 10A in that a layer including the transistor 205 and the transistor 206 is closer to the substrate 201 than the light-emitting display element 103 is. The configuration is different from the display device 200.
具体的に、図１１（Ｂ）に示す表示装置２００では、トランジスタ２０５とトランジスタ２０６とが含まれる層２１０を有する。そして、層２１０は、発光型表示素子１０３と基板２０１との間の領域を有する。また、反射型表示素子１０１は、発光型表示素子１０３よりも基板２０２側に近い。 Specifically, the display device 200 illustrated in FIG. 11B includes the layer 210 including the transistor 205 and the transistor 206. The layer 210 has a region between the light emitting display element 103 and the substrate 201. In addition, the reflective display element 101 is closer to the substrate 202 side than the light emitting display element 103.
上記構成により、トランジスタ２０５とトランジスタ２０６とを共通の作製工程で作製することができる。また、反射型表示素子１０１とトランジスタ２０６の電気的な接続を行う配線と、発光型表示素子１０３とトランジスタ２０５の電気的な接続を行う配線とが、層２１０に対して同一の側に設ければよい。具体的には、上記配線を、反射型表示素子１０１とトランジスタ２０６の電気的な接続を行う配線を、トランジスタ２０６の半導体層上に形成でき、なおかつ、発光型表示素子１０３とトランジスタ２０５の電気的な接続を行う配線を、トランジスタ２０５の半導体層上に形成することができる。よって、図１０（Ａ）に示す表示装置２００の場合に比べて作成工程を簡素化することができる。 With the above structure, the transistor 205 and the transistor 206 can be manufactured through a common manufacturing process. In addition, a wiring for electrically connecting the reflective display element 101 and the transistor 206 and a wiring for electrically connecting the light-emitting display element 103 and the transistor 205 are provided on the same side with respect to the layer 210. That's fine. Specifically, a wiring for electrically connecting the reflective display element 101 and the transistor 206 can be formed over the semiconductor layer of the transistor 206, and the electrical connection between the light-emitting display element 103 and the transistor 205 can be achieved. A wiring for performing easy connection can be formed over the semiconductor layer of the transistor 205. Thus, the manufacturing process can be simplified as compared with the case of the display device 200 illustrated in FIG.
なお、図１０及び図１１では、２つの反射型表示素子１０１に対して１つの発光型表示素子１０３が対応している断面構造を例示しているが、本発明の一態様に係る表示装置は、１つの反射型表示素子１０１に対して１つの発光型表示素子１０３が対応している断面構造を有していても良いし、１つの反射型表示素子１０１に対して複数の発光型表示素子１０３が対応している断面構造を有していても良い。 10 and 11 illustrate a cross-sectional structure in which one light-emitting display element 103 corresponds to two reflective display elements 101, a display device according to one embodiment of the present invention is provided. One reflective display element 101 may have a cross-sectional structure in which one light emitting display element 103 corresponds to one reflective display element 101, and a plurality of light emitting display elements may correspond to one reflective display element 101. 103 may have a corresponding cross-sectional structure.
また、図１０及び図１１では、反射型表示素子１０１が有する画素電極２０７が、可視光を反射する機能を有する場合を例示しているが、画素電極２０７は可視光を透過する機能を有していても良い。この場合、バックライトやフロントライトなどの光源を表示装置２００に設けても良いし、反射型表示素子１０１を用いて画像を表示する際に発光型表示素子１０３を光源として用いても良い。 10 and 11 illustrate the case where the pixel electrode 207 included in the reflective display element 101 has a function of reflecting visible light, the pixel electrode 207 has a function of transmitting visible light. May be. In this case, a light source such as a backlight or a front light may be provided in the display device 200, or the light emitting display element 103 may be used as a light source when an image is displayed using the reflective display element 101.
本実施の形態は、他の実施の形態と適宜組み合わせて実施することが可能である。 This embodiment can be implemented in appropriate combination with any of the other embodiments.
（実施の形態５）
本実施の形態では、反射型表示素子と発光型表示素子とを用いた表示装置が有する、画素の構成例について説明する。なお、本実施の形態では、反射型表示素子として液晶素子を用い、発光型表示素子としてＥＬ材料を用いた発光素子を用いる場合を例に挙げて、本発明の一態様に係る画素３００の構成例について説明する。 (Embodiment 5)
In this embodiment, a structural example of a pixel included in a display device using a reflective display element and a light-emitting display element will be described. Note that in this embodiment, the structure of the pixel 300 according to one embodiment of the present invention is described by using as an example the case where a liquid crystal element is used as a reflective display element and a light-emitting element using an EL material is used as a light-emitting display element. An example will be described.
図１２（Ａ）に示す画素３００は、画素３５０と画素３５１とを有する。そして、画素３５０は液晶素子３０１を有し、画素３５１は発光素子３０２を有する。液晶素子３０１として、先の実施の形態に述べた反射型表示素子１０１、発光型表示素子１０３として先の実施の形態に述べた発光型表示素子１０３を、それぞれ用いることができる。 A pixel 300 illustrated in FIG. 12A includes a pixel 350 and a pixel 351. The pixel 350 includes a liquid crystal element 301, and the pixel 351 includes a light emitting element 302. The reflective display element 101 described in the above embodiment can be used as the liquid crystal element 301, and the light-emitting display element 103 described in the above embodiment can be used as the light-emitting display element 103.
具体的に、画素３５０は、液晶素子３０１と、液晶素子３０１に印加する電圧を制御する機能を有するトランジスタ３０３と、容量素子３０４とを有する。そして、トランジスタ３０３は、ゲートが配線ＧＬに電気的に接続され、ソース又はドレインの一方が配線ＳＬに電気的に接続され、ソース又はドレインの他方が液晶素子３０１の画素電極に電気的に接続されている。また、液晶素子３０１の共通電極は、所定の電位が供給される配線または電極に電気的に接続されている。また、容量素子３０４は、一方の電極が、液晶素子３０１の画素電極に電気的に接続され、他方の電極が、所定の電位が供給される配線または電極に電気的に接続されている。 Specifically, the pixel 350 includes a liquid crystal element 301, a transistor 303 having a function of controlling voltage applied to the liquid crystal element 301, and a capacitor 304. In the transistor 303, the gate is electrically connected to the wiring GL, one of the source and the drain is electrically connected to the wiring SL, and the other of the source and the drain is electrically connected to the pixel electrode of the liquid crystal element 301. ing. The common electrode of the liquid crystal element 301 is electrically connected to a wiring or an electrode to which a predetermined potential is supplied. In the capacitor 304, one electrode is electrically connected to the pixel electrode of the liquid crystal element 301, and the other electrode is electrically connected to a wiring or an electrode to which a predetermined potential is supplied.
また、具体的に、画素３５１は、発光素子３０２と、発光素子３０２に供給する電流を制御する機能を有するトランジスタ３０５と、トランジスタ３０５のゲートへの電位の供給を制御する機能を有するトランジスタ３０６と、容量素子３０７とを有する。そして、トランジスタ３０６は、ゲートが配線ＧＥに電気的に接続され、ソース又はドレインの一方が配線ＤＬに電気的に接続され、ソース又はドレインの他方がトランジスタ３０５のゲートに電気的に接続されている。トランジスタ３０５は、ソース又はドレインの一方が配線ＡＬに電気的に接続され、ソース又はドレインの他方が発光素子３０２に電気的に接続されている。容量素子３０７は、一方の電極が配線ＡＬに電気的に接続され、他方の電極がトランジスタ３０５のゲートに電気的に接続されている。 Specifically, the pixel 351 includes a light-emitting element 302, a transistor 305 having a function of controlling current supplied to the light-emitting element 302, and a transistor 306 having a function of controlling supply of a potential to the gate of the transistor 305. And a capacitor 307. The gate of the transistor 306 is electrically connected to the wiring GE, one of the source and the drain is electrically connected to the wiring DL, and the other of the source and the drain is electrically connected to the gate of the transistor 305. . In the transistor 305, one of a source and a drain is electrically connected to the wiring AL, and the other of the source and the drain is electrically connected to the light-emitting element 302. In the capacitor 307, one electrode is electrically connected to the wiring AL and the other electrode is electrically connected to the gate of the transistor 305.
図１２（Ａ）に示す画素３００では、液晶素子３０１に対応した画像信号を配線ＳＬに供給し、発光素子３０２に対応した画像信号を配線ＤＬに供給することで、液晶素子３０１によって表示される階調と、発光素子３０２によって表示される階調とを個別に制御することができる。 In the pixel 300 illustrated in FIG. 12A, an image signal corresponding to the liquid crystal element 301 is supplied to the wiring SL, and an image signal corresponding to the light-emitting element 302 is supplied to the wiring DL, so that the pixel 300 is displayed. The gradation and the gradation displayed by the light emitting element 302 can be individually controlled.
なお、図１２（Ａ）では、液晶素子３０１を有する画素３５０と、発光素子３０２を有する画素３５１とを一つずつ有する画素３００の構成例を示したが、画素３００が複数の画素３５０を有していても良いし、或いは画素３００が複数の画素３５１を有していても良い。 Note that FIG. 12A illustrates a configuration example of the pixel 300 including one pixel 350 including the liquid crystal element 301 and one pixel 351 including the light-emitting element 302; however, the pixel 300 includes a plurality of pixels 350. Alternatively, the pixel 300 may include a plurality of pixels 351.
図１２（Ｂ）に、画素３００が一の画素３５１と、４つの画素３５１を有している場合の、画素３００の構成例を示す。 FIG. 12B illustrates a configuration example of the pixel 300 in the case where the pixel 300 includes one pixel 351 and four pixels 351.
具体的に図１２（Ｂ）に示す画素３００は、液晶素子３０１を有する画素３５１と、発光素子３０２をそれぞれ有する画素３５１ａ乃至画素３５１ｂとを有する。 Specifically, a pixel 300 illustrated in FIG. 12B includes a pixel 351 including a liquid crystal element 301 and pixels 351 a to 351 b each including a light-emitting element 302.
図１２（Ｂ）に示す画素３５０の構成については、図１２（Ａ）に示す画素３５０の構成を参照することができる。 The structure of the pixel 350 illustrated in FIG. 12A can be referred to for the structure of the pixel 350 illustrated in FIG.
また、図１２（Ｂ）に示す画素３５１ａ乃至画素３５１ｂは、図１２（Ａ）に示す画素３５１と同様に、発光素子３０２と、発光素子３０２に供給する電流を制御する機能を有するトランジスタ３０５と、トランジスタ３０５のゲートへの電位の供給を制御する機能を有するトランジスタ３０６と、容量素子３０７とをそれぞれ有する。そして、画素３５１ａ乃至画素３５１ｂがそれぞれ有する発光素子３０２から発せられる光が、異なる領域の波長を有することで、表示装置においてカラーの画像を表示することが可能になる。 A pixel 351a to a pixel 351b illustrated in FIG. 12B each include a light-emitting element 302 and a transistor 305 having a function of controlling current supplied to the light-emitting element 302, as in the pixel 351 illustrated in FIG. The transistor 306 has a function of controlling the supply of potential to the gate of the transistor 305, and the capacitor 307. The light emitted from the light emitting element 302 included in each of the pixels 351a to 351b has wavelengths in different regions, so that a color image can be displayed on the display device.
また、図１２（Ｂ）に示す画素３５１ａ乃至画素３５１ｂでは、画素３５１ａの有するトランジスタ３０６のゲートと、画素３５１ｃの有するトランジスタ３０６のゲートとが、配線ＧＥｂに電気的に接続されている。また、画素３５１ｂの有するトランジスタ３０６のゲートと、画素３５１ｄの有するトランジスタ３０６のゲートとが、配線ＧＥａに電気的に接続されている。 In the pixels 351a to 351b illustrated in FIG. 12B, the gate of the transistor 306 included in the pixel 351a and the gate of the transistor 306 included in the pixel 351c are electrically connected to the wiring GEb. In addition, the gate of the transistor 306 included in the pixel 351b and the gate of the transistor 306 included in the pixel 351d are electrically connected to the wiring GEa.
また、図１２（Ｂ）に示す画素３５１ａ乃至画素３５１ｂでは、画素３５１ａの有するトランジスタ３０６のソース又はドレインの一方と、画素３５１ｂの有するトランジスタ３０６のソース又はドレインの一方とが、配線ＤＬａに電気的に接続されている。また、画素３５１ｃの有するトランジスタ３０６のソース又はドレインの一方と、画素３５１ｄの有するトランジスタ３０６のソース又はドレインの一方とが、配線ＤＬｂに電気的に接続されている。 In addition, in the pixels 351a to 351b illustrated in FIG. 12B, one of the source and the drain of the transistor 306 included in the pixel 351a and one of the source and the drain of the transistor 306 included in the pixel 351b are electrically connected to the wiring DLa. It is connected to the. In addition, one of a source and a drain of the transistor 306 included in the pixel 351c and one of a source and a drain of the transistor 306 included in the pixel 351d are electrically connected to the wiring DLb.
また、図１２（Ｂ）に示す画素３５１ａ乃至画素３５１ｂでは、全てのトランジスタ３０５のソース又はドレインの一方が、配線ＡＬに電気的に接続されている。 In the pixels 351a to 351b illustrated in FIG. 12B, one of the source and the drain of all the transistors 305 is electrically connected to the wiring AL.
上述したように、図１２（Ｂ）に示す画素３５１ａ乃至画素３５１ｂでは、画素３５１ａと画素３５１ｃが配線ＧＥｂを共有し、画素３５１ｂと画素３５１ｄが配線ＧＥａを共有しているが、画素３５１ａ乃至画素３５１ｂの全てが一の配線ＧＥを共有していても良い。この場合、画素３５１ａ乃至画素３５１ｂは、互いに異なる４つの配線ＤＬに電気的に接続されるようにすることが望ましい。 As described above, in the pixels 351a to 351b illustrated in FIG. 12B, the pixel 351a and the pixel 351c share the wiring GEb, and the pixel 351b and the pixel 351d share the wiring GEa, but the pixel 351a to pixel All of 351b may share one wiring GE. In this case, it is preferable that the pixels 351a to 351b be electrically connected to four different wirings DL.
次いで、図１３（Ａ）に、図１２（Ａ）とは異なる画素３００の構成例を示す。図１３（Ａ）に示す画素３００は、画素３５１が有するトランジスタ３０５がバックゲートを有する点において、図１２（Ａ）に示す画素３００と構成が異なる。 Next, FIG. 13A illustrates a configuration example of the pixel 300 which is different from that in FIG. A pixel 300 illustrated in FIG. 13A is different from the pixel 300 illustrated in FIG. 12A in that the transistor 305 included in the pixel 351 includes a back gate.
具体的に、図１３（Ａ）に示す画素３００では、トランジスタ３０５のバックゲートがゲート（フロントゲート）に電気的に接続されている。図１３（Ａ）に示す画素３００は、上記構成を有することにより、トランジスタ３０５の閾値電圧がシフトするのを抑えることができ、トランジスタ３０５の信頼性を高めることができる。また、図１３（Ａ）に示す画素３００は、上記構成を有することにより、トランジスタ３０５のサイズを小さく抑えつつ、トランジスタ３０５のオン電流を高めることができる。 Specifically, in the pixel 300 illustrated in FIG. 13A, the back gate of the transistor 305 is electrically connected to the gate (front gate). Since the pixel 300 illustrated in FIG. 13A has the above structure, the threshold voltage of the transistor 305 can be prevented from shifting, and the reliability of the transistor 305 can be improved. In addition, the pixel 300 illustrated in FIG. 13A has the above structure, whereby the on-state current of the transistor 305 can be increased while the size of the transistor 305 is reduced.
なお、本発明の一態様に係る表示装置では、画素３００が、図１３（Ａ）に示す画素３５０を複数有していても良いし、或いは図１３（Ａ）に示す画素３５１を複数有していても良い。具体的には、図１２（Ｂ）に示した画素３００と同様に、図１３（Ａ）に示す１つの画素３５０と、４つの画素３５１とを有していても良い。その場合、各種配線と４つの画素３５１との接続関係は、図１２（Ｂ）に示した画素３００を参照することができる。 Note that in the display device according to one embodiment of the present invention, the pixel 300 may include a plurality of pixels 350 illustrated in FIG. 13A or a plurality of pixels 351 illustrated in FIG. May be. Specifically, the pixel 300 illustrated in FIG. 13A and the four pixels 351 may be provided as in the pixel 300 illustrated in FIG. In that case, the connection relationship between the various wirings and the four pixels 351 can refer to the pixel 300 illustrated in FIG.
次いで、図１３（Ｂ）に、図１２（Ａ）とは異なる画素３００の構成例を示す。図１３（Ｂ）に示す画素３００は、画素３５１が有するトランジスタ３０５がバックゲートを有する点において、図１２（Ａ）に示す画素３００と構成が異なる。そして、図１３（Ｂ）に示す画素３００では、トランジスタ３０５のバックゲートがゲートではなく発光素子３０２に電気的に接続されている点において、図１３（Ａ）に示す画素３００と構成が異なる。 Next, FIG. 13B illustrates a configuration example of the pixel 300 which is different from that in FIG. A pixel 300 illustrated in FIG. 13B is different from the pixel 300 illustrated in FIG. 12A in that the transistor 305 included in the pixel 351 includes a back gate. 13B is different from the pixel 300 in FIG. 13A in that the back gate of the transistor 305 is electrically connected to the light-emitting element 302 instead of the gate.
図１３（Ｂ）に示す画素３００は、上記構成を有することにより、トランジスタ３０５の閾値電圧がシフトするのを抑えることができ、トランジスタ３０５の信頼性を高めることができる。 Since the pixel 300 illustrated in FIG. 13B has the above structure, the threshold voltage of the transistor 305 can be prevented from shifting, and the reliability of the transistor 305 can be improved.
なお、本発明の一態様に係る表示装置では、画素３００が、図１３（Ｂ）に示す画素３５０を複数有していても良いし、或いは図１３（Ｂ）に示す画素３５１を複数有していても良い。具体的には、図１２（Ｂ）に示した画素３００と同様に、図１３（Ｂ）に示す１つの画素３５０と、４つの画素３５１とを有していても良い。その場合、各種配線と４つの画素３５１との接続関係は、図１２（Ｂ）に示した画素３００を参照することができる。 Note that in the display device according to one embodiment of the present invention, the pixel 300 may include a plurality of pixels 350 illustrated in FIG. 13B or a plurality of pixels 351 illustrated in FIG. May be. Specifically, the pixel 300 illustrated in FIG. 13B and the four pixels 351 may be included as in the pixel 300 illustrated in FIG. In that case, the connection relationship between the various wirings and the four pixels 351 can refer to the pixel 300 illustrated in FIG.
次いで、図１４に、図１２（Ａ）とは異なる画素３００の構成例を示す。図１４に示す画素３００は、画素３５０と画素３５１とを有し、画素３５１の構成が図１２（Ａ）とは異なる。 Next, FIG. 14 illustrates a configuration example of the pixel 300 which is different from that in FIG. A pixel 300 illustrated in FIG. 14 includes a pixel 350 and a pixel 351, and the structure of the pixel 351 is different from that in FIG.
具体的に、図１４に示す画素３５１は、発光素子３０２と、発光素子３０２に供給する電流を制御する機能を有するトランジスタ３０５と、トランジスタ３０５のゲートへの電位の供給を制御する機能を有するトランジスタ３０６と、発光素子３０２の画素電極に所定の電位を供給する機能を有するトランジスタ３０８と、容量素子３０７とを有する。また、トランジスタ３０５と、トランジスタ３０６と、トランジスタ３０８とは、それぞれバックゲートを有する。 Specifically, a pixel 351 illustrated in FIG. 14 includes a light-emitting element 302, a transistor 305 having a function of controlling current supplied to the light-emitting element 302, and a transistor having a function of controlling supply of a potential to the gate of the transistor 305. 306, a transistor 308 having a function of supplying a predetermined potential to the pixel electrode of the light-emitting element 302, and a capacitor 307. In addition, the transistor 305, the transistor 306, and the transistor 308 each have a back gate.
そして、トランジスタ３０６は、ゲート（フロントゲート）が配線ＭＬに電気的に接続され、バックゲートが配線ＧＥに電気的に接続され、ソース又はドレインの一方が配線ＤＬに電気的に接続され、ソース又はドレインの他方がトランジスタ３０５のゲート及びフロントゲートに電気的に接続されている。トランジスタ３０５は、ソース又はドレインの一方が配線ＡＬに電気的に接続され、ソース又はドレインの他方が発光素子３０２に電気的に接続されている。
トランジスタ３０８は、ゲート（フロントゲート）が配線ＭＬに電気的に接続され、バックゲートが配線ＧＥに電気的に接続され、ソース又はドレインの一方が配線ＭＬに電気的に接続され、ソース又はドレインの他方が発光素子３０２に電気的に接続されている。容量素子３０７は、一方の電極が配線ＡＬに電気的に接続され、他方の電極がトランジスタ３０５のゲートに電気的に接続されている。 The transistor 306 has a gate (front gate) electrically connected to the wiring ML, a back gate electrically connected to the wiring GE, and one of a source and a drain electrically connected to the wiring DL, The other of the drains is electrically connected to the gate and front gate of the transistor 305. In the transistor 305, one of a source and a drain is electrically connected to the wiring AL, and the other of the source and the drain is electrically connected to the light-emitting element 302.
In the transistor 308, a gate (front gate) is electrically connected to the wiring ML, a back gate is electrically connected to the wiring GE, and one of a source and a drain is electrically connected to the wiring ML, and The other is electrically connected to the light emitting element 302. In the capacitor 307, one electrode is electrically connected to the wiring AL and the other electrode is electrically connected to the gate of the transistor 305.
なお、図１４では、液晶素子３０１を有する画素３５０と、発光素子３０２を有する画素３５１とを一つずつ有する画素３００の構成例を示したが、画素３００が複数の画素３５０を有していても良いし、或いは画素３００が複数の画素３５１を有していても良い。 Note that FIG. 14 illustrates a configuration example of the pixel 300 including one pixel 350 including the liquid crystal element 301 and one pixel 351 including the light-emitting element 302, but the pixel 300 includes a plurality of pixels 350. Alternatively, the pixel 300 may include a plurality of pixels 351.
図１５に、画素３００が一の画素３５１と、４つの画素３５１を有している場合の、画素３００の構成例を示す。 FIG. 15 illustrates a configuration example of the pixel 300 in the case where the pixel 300 includes one pixel 351 and four pixels 351.
具体的に図１５に示す画素３００は、液晶素子３０１を有する画素３５１と、発光素子３０２をそれぞれ有する画素３５１ａ乃至画素３５１ｂとを有する。 Specifically, a pixel 300 illustrated in FIG. 15 includes a pixel 351 including a liquid crystal element 301 and pixels 351 a to 351 b each including a light-emitting element 302.
図１５に示す画素３５０の構成については、図１４に示す画素３５０の構成を参照することができる。 The configuration of the pixel 350 illustrated in FIG. 14 can be referred to for the configuration of the pixel 350 illustrated in FIG.
また、図１５に示す画素３５１ａ乃至画素３５１ｂは、図１４に示す画素３５１と同様に、発光素子３０２と、発光素子３０２に供給する電流を制御する機能を有するトランジスタ３０５と、トランジスタ３０５のゲートへの電位の供給を制御する機能を有するトランジスタ３０６と、発光素子３０２の画素電極に所定の電位を供給する機能を有するトランジスタ３０８と、容量素子３０７とをそれぞれ有する。そして、画素３５１ａ乃至画素３５１ｂがそれぞれ有する発光素子３０２から発せられる光が、異なる領域の波長を有することで、表示装置においてカラーの画像を表示することが可能になる。 In addition, as in the pixel 351 illustrated in FIG. 14, the pixel 351 a to the pixel 351 b illustrated in FIG. 15 are provided with the light-emitting element 302, the transistor 305 having a function of controlling current supplied to the light-emitting element 302, and the gate of the transistor 305. A transistor 306 having a function of controlling the supply of the potential of the light-emitting element, a transistor 308 having a function of supplying a predetermined potential to the pixel electrode of the light-emitting element 302, and a capacitor 307. The light emitted from the light emitting element 302 included in each of the pixels 351a to 351b has wavelengths in different regions, so that a color image can be displayed on the display device.
また、図１５に示す画素３５１ａ乃至画素３５１ｂでは、画素３５１ａの有するトランジスタ３０６のゲートと、画素３５１ｂの有するトランジスタ３０６のゲートとが、配線ＭＬａに電気的に接続されている。また、画素３５１ｃの有するトランジスタ３０６のゲートと、画素３５１ｄの有するトランジスタ３０６のゲートとが、配線ＭＬｂに電気的に接続されている。 In the pixels 351a to 351b illustrated in FIG. 15, the gate of the transistor 306 included in the pixel 351a and the gate of the transistor 306 included in the pixel 351b are electrically connected to the wiring MLa. In addition, the gate of the transistor 306 included in the pixel 351c and the gate of the transistor 306 included in the pixel 351d are electrically connected to the wiring MLb.
また、図１５に示す画素３５１ａ乃至画素３５１ｂでは、画素３５１ａの有するトランジスタ３０６のバックゲートと、画素３５１ｃの有するトランジスタ３０６のバックゲートとが、配線ＧＥｂに電気的に接続されている。また、画素３５１ｂの有するトランジスタ３０６のバックゲートと、画素３５１ｄの有するトランジスタ３０６のバックゲートとが、配線ＧＥａに電気的に接続されている。 In the pixels 351a to 351b illustrated in FIG. 15, the back gate of the transistor 306 included in the pixel 351a and the back gate of the transistor 306 included in the pixel 351c are electrically connected to the wiring GEb. In addition, the back gate of the transistor 306 included in the pixel 351b and the back gate of the transistor 306 included in the pixel 351d are electrically connected to the wiring GEa.
また、図１５に示す画素３５１ａ乃至画素３５１ｂでは、画素３５１ａの有するトランジスタ３０６のソース又はドレインの一方と、画素３５１ｂの有するトランジスタ３０６のソース又はドレインの一方とが、配線ＤＬａに電気的に接続されている。また、画素３５１ｃの有するトランジスタ３０６のソース又はドレインの一方と、画素３５１ｄの有するトランジスタ３０６のソース又はドレインの一方とが、配線ＤＬｂに電気的に接続されている。 In the pixel 351a to the pixel 351b illustrated in FIG. 15, one of a source and a drain of the transistor 306 included in the pixel 351a and one of a source and a drain of the transistor 306 included in the pixel 351b are electrically connected to the wiring DLa. ing. In addition, one of a source and a drain of the transistor 306 included in the pixel 351c and one of a source and a drain of the transistor 306 included in the pixel 351d are electrically connected to the wiring DLb.
また、図１５に示す画素３５１ａ乃至画素３５１ｂでは、画素３５１ａの有するトランジスタ３０８のバックゲートと、画素３５１ｃの有するトランジスタ３０８のバックゲートとが、配線ＧＥｂに電気的に接続されている。また、画素３５１ｂの有するトランジスタ３０８のバックゲートと、画素３５１ｄの有するトランジスタ３０８のバックゲートとが、配線ＧＥａに電気的に接続されている。 In the pixel 351a to the pixel 351b illustrated in FIG. 15, the back gate of the transistor 308 included in the pixel 351a and the back gate of the transistor 308 included in the pixel 351c are electrically connected to the wiring GEb. In addition, the back gate of the transistor 308 included in the pixel 351b and the back gate of the transistor 308 included in the pixel 351d are electrically connected to the wiring GEa.
また、図１５に示す画素３５１ａ乃至画素３５１ｂでは、画素３５１ａの有するトランジスタ３０８のゲートとソース又はドレインの一方とが配線ＭＬａに電気的に接続され、画素３５１ｂの有するトランジスタ３０８のゲートとソース又はドレインの一方とが、配線ＭＬａに電気的に接続されている。また、画素３５１ｃの有するトランジスタ３０８のゲートとソース又はドレインの一方とが配線ＭＬｂに電気的に接続され、画素３５１ｂの有するトランジスタ３０８のゲートとソース又はドレインの一方とが、配線ＭＬｂに電気的に接続されている。 In the pixel 351a to the pixel 351b illustrated in FIG. 15, the gate and the source or drain of the transistor 308 included in the pixel 351a are electrically connected to the wiring MLa, and the gate and source or drain of the transistor 308 included in the pixel 351b are included. Is electrically connected to the wiring MLa. In addition, the gate and the source or the drain of the transistor 308 included in the pixel 351c are electrically connected to the wiring MLb, and the gate and the one of the source and the drain included in the pixel 351b are electrically connected to the wiring MLb. It is connected.
また、図１５に示す画素３５１ａ乃至画素３５１ｂでは、全てのトランジスタ３０５のソース又はドレインの一方が、配線ＡＬに電気的に接続されている。 In the pixels 351a to 351b illustrated in FIG. 15, one of the sources and drains of all the transistors 305 is electrically connected to the wiring AL.
上述したように、図１５に示す画素３５１ａ乃至画素３５１ｂでは、画素３５１ａと画素３５１ｃが配線ＧＥｂを共有し、画素３５１ｂと画素３５１ｄが配線ＧＥａを共有しているが、画素３５１ａ乃至画素３５１ｂの全てが一の配線ＧＥを共有していても良い。この場合、画素３５１ａ乃至画素３５１ｂは、互いに異なる４つの配線ＤＬに電気的に接続されるようにすることが望ましい。 As described above, in the pixels 351a to 351b illustrated in FIG. 15, the pixel 351a and the pixel 351c share the wiring GEb, and the pixel 351b and the pixel 351d share the wiring GEa, but all of the pixels 351a to 351b are shared. May share one wiring GE. In this case, it is preferable that the pixels 351a to 351b be electrically connected to four different wirings DL.
なお、画素３５０に、オフ電流が低いトランジスタを用いることで、表示画面を書き換える必要がない場合（すなわち静止画を表示する場合）、一時的に駆動回路を停止することができる（以下、「アイドリングストップ」、もしくは「ＩＤＳ駆動」と呼ぶ。）。ＩＤＳ駆動によって、表示装置２００の消費電力を低減することができる。 Note that by using a transistor with low off-state current for the pixel 350, the driver circuit can be temporarily stopped when the display screen does not need to be rewritten (that is, when a still image is displayed) (hereinafter referred to as “idling”). This is called “stop” or “IDS drive”.) The power consumption of the display device 200 can be reduced by the IDS driving.
本実施の形態は、他の実施の形態と適宜組み合わせて実施することが可能である。 This embodiment can be implemented in appropriate combination with any of the other embodiments.
（実施の形態６）
本実施の形態では、図４（Ａ）に示した表示装置２００を例に挙げて、反射型表示素子と発光型表示素子とを用いた表示装置２００の具体的な構成例について説明する。 (Embodiment 6)
In this embodiment, the display device 200 illustrated in FIG. 4A is described as an example, and a specific structure example of the display device 200 using a reflective display element and a light-emitting display element is described.
図１６に、表示装置２００の断面構造の一例を示す。 FIG. 16 shows an example of a cross-sectional structure of the display device 200.
図１６に示す表示装置２００は、基板２５０と基板２５１の間に、表示部１０２と、表示部１０４とが積層された構成を有する。具体的に図１６では、表示部１０２と表示部１０４とが接着層２５２により接着されている。 A display device 200 illustrated in FIG. 16 has a structure in which a display portion 102 and a display portion 104 are stacked between a substrate 250 and a substrate 251. Specifically, in FIG. 16, the display portion 102 and the display portion 104 are bonded by an adhesive layer 252.
そして、図１６では、表示部１０２の画素が有する発光素子３０２、トランジスタ３０５、及び容量素子３０７と、表示部１０２の駆動回路が有するトランジスタ３０９とを図示している。また、図１６では、表示部１０４の画素が有する液晶素子３０１と、トランジスタ３０３と、容量素子３０４と、表示部１０４の駆動回路が有するトランジスタ３１０とを図示している。 16 illustrates the light-emitting element 302, the transistor 305, and the capacitor 307 included in the pixel of the display portion 102, and the transistor 309 included in the driver circuit of the display portion 102. In FIG. 16, a liquid crystal element 301 included in a pixel of the display portion 104, a transistor 303, a capacitor 304, and a transistor 310 included in a driver circuit of the display portion 104 are illustrated.
トランジスタ３０５は、バックゲートとしての機能を有する導電層３１１と、導電層３１１上の絶縁層３１２と、絶縁層３１２上において導電層３１１と重なる半導体層３１３と、半導体層３１３上の絶縁層３１６と、絶縁層３１６上に位置し、ゲートとしての機能を有する導電層３１７と、導電層３１７上に位置する絶縁層３１８のさらに上に位置し、半導体層３１３と電気的に接続されている導電層３１４及び導電層３１５と、を有する。 The transistor 305 includes a conductive layer 311 having a function as a back gate, an insulating layer 312 over the conductive layer 311, a semiconductor layer 313 overlapping with the conductive layer 311 over the insulating layer 312, and an insulating layer 316 over the semiconductor layer 313. , A conductive layer 317 which functions as a gate and is located on the insulating layer 316, and a conductive layer which is further above the insulating layer 318 located on the conductive layer 317 and electrically connected to the semiconductor layer 313 314 and a conductive layer 315.
また、導電層３１５は、導電層３１９と電気的に接続され、導電層３１９は導電層３２０に電気的に接続されている。導電層３１９は導電層３１７と同一の層に形成されており、導電層３２０は導電層３１１と同一の層に形成されている。 In addition, the conductive layer 315 is electrically connected to the conductive layer 319, and the conductive layer 319 is electrically connected to the conductive layer 320. The conductive layer 319 is formed in the same layer as the conductive layer 317, and the conductive layer 320 is formed in the same layer as the conductive layer 311.
また、導電層３１１及び導電層３２０と同一の層に、トランジスタ３０６（図示せず）のバックゲートとしての機能を有する導電層３２１が位置している。導電層３２１上には絶縁層３１２が位置し、絶縁層３１２上には導電層３２１と重なる領域を有する半導体層３２２が位置する。半導体層３２２にはトランジスタ３０６（図示せず）のチャネル形成領域が含まれる。半導体層３２２上には絶縁層３１８が位置し、絶縁層３１８上には導電層３２３が位置する。導電層３２３は半導体層３２２に電気的に接続されており、導電層３２３はトランジスタ３０６（図示せず）のソース電極またはドレインとしての機能を有する。 In addition, a conductive layer 321 that functions as a back gate of the transistor 306 (not illustrated) is located in the same layer as the conductive layers 311 and 320. An insulating layer 312 is located over the conductive layer 321, and a semiconductor layer 322 having a region overlapping with the conductive layer 321 is located over the insulating layer 312. The semiconductor layer 322 includes a channel formation region of the transistor 306 (not shown). An insulating layer 318 is located over the semiconductor layer 322, and a conductive layer 323 is located over the insulating layer 318. The conductive layer 323 is electrically connected to the semiconductor layer 322, and the conductive layer 323 functions as a source electrode or a drain of the transistor 306 (not illustrated).
トランジスタ３０９は、トランジスタ３０５と同様の構成を有するので、詳細な説明は割愛する。 Since the transistor 309 has a structure similar to that of the transistor 305, detailed description thereof is omitted.
トランジスタ３０５、導電層３２３、トランジスタ３０９上には、絶縁層３２４が位置し、絶縁層３２４上には絶縁層３２５が位置する。絶縁層３２５上には導電層３２６及び導電層３２７が位置する。導電層３２６は導電層３１４と電気的に接続されており、導電層３２７は導電層３２７と電気的に接続されている。導電層３２６及び導電層３２７上には絶縁層３２８が位置し、絶縁層３２８上には導電層３２９が位置する。導電層３２９は導電層３２６に電気的に接続されており、発光素子３０２の画素電極としての機能を有する。 An insulating layer 324 is located over the transistor 305, the conductive layer 323, and the transistor 309, and an insulating layer 325 is located over the insulating layer 324. A conductive layer 326 and a conductive layer 327 are located over the insulating layer 325. The conductive layer 326 is electrically connected to the conductive layer 314, and the conductive layer 327 is electrically connected to the conductive layer 327. An insulating layer 328 is located over the conductive layers 326 and 327, and a conductive layer 329 is located over the insulating layer 328. The conductive layer 329 is electrically connected to the conductive layer 326 and functions as a pixel electrode of the light-emitting element 302.
導電層３２７と絶縁層３２８と導電層３２９とが重なる領域が、容量素子３０７として機能する。 A region where the conductive layer 327, the insulating layer 328, and the conductive layer 329 overlap functions as the capacitor 307.
導電層３２９上には絶縁層３３０が位置し、絶縁層３３０上にはＥＬ層３３１が位置し、ＥＬ層３３１上には対向電極としての機能を有する導電層３３２が位置する。導電層３２９とＥＬ層３３１と導電層３３２とは、絶縁層３３０の開口部において電気的に接続されており、導電層３２９とＥＬ層３３１と導電層３３２とが電気的に接続された領域が発光素子３０２として機能する。発光素子３０２は、導電層３３２側から破線の矢印で示す方向に光を放射する、トップエミッション構造を有する。 The insulating layer 330 is located over the conductive layer 329, the EL layer 331 is located over the insulating layer 330, and the conductive layer 332 having a function as a counter electrode is located over the EL layer 331. The conductive layer 329, the EL layer 331, and the conductive layer 332 are electrically connected to each other in the opening portion of the insulating layer 330, and a region where the conductive layer 329, the EL layer 331, and the conductive layer 332 are electrically connected is provided. It functions as the light emitting element 302. The light-emitting element 302 has a top-emission structure that emits light in the direction indicated by the dashed arrow from the conductive layer 332 side.
導電層３２９と導電層３３２とは、一方が陽極として機能し、他方が陰極として機能する。導電層３２９と導電層３３２の間に、発光素子３０２の閾値電圧より高い電圧を印加すると、ＥＬ層３３１に陽極側から正孔が注入され、陰極側から電子が注入される。注入された電子と正孔はＥＬ層３３１において再結合し、ＥＬ層３３１に含まれる発光物質が発光する。 One of the conductive layers 329 and 332 functions as an anode and the other functions as a cathode. When a voltage higher than the threshold voltage of the light-emitting element 302 is applied between the conductive layer 329 and the conductive layer 332, holes are injected into the EL layer 331 from the anode side and electrons are injected from the cathode side. The injected electrons and holes are recombined in the EL layer 331, and the light-emitting substance contained in the EL layer 331 emits light.
なお、半導体層３１３、３２２に酸化物半導体を用いる場合、表示装置の信頼性を高めるには、絶縁層３１８は酸素を含む絶縁材料を用いることが望ましく、絶縁層３２４には水又は水素などの不純物が拡散しにくい材料を用いることが望ましい。 Note that in the case where an oxide semiconductor is used for the semiconductor layers 313 and 322, in order to increase the reliability of the display device, the insulating layer 318 is preferably formed using an insulating material containing oxygen, and the insulating layer 324 is formed of water, hydrogen, or the like. It is desirable to use a material in which impurities are difficult to diffuse.
絶縁層３２５または絶縁層３３０として有機材料を用いる場合、絶縁層３２５または絶縁層３３０が表示装置の端部に露出していると、絶縁層３２５または絶縁層３３０を介して発光素子３０２等に表示装置の外部から水分等の不純物が侵入する恐れがある。不純物の侵入により、発光素子３０２が劣化すると、表示装置の劣化につながる。そのため、図１６に示すように、絶縁層３２５及び絶縁層３３０が、表示装置の端部に位置しないことが好ましい。 In the case where an organic material is used for the insulating layer 325 or the insulating layer 330, when the insulating layer 325 or the insulating layer 330 is exposed at an end portion of the display device, display is performed on the light-emitting element 302 or the like through the insulating layer 325 or the insulating layer 330. Impurities such as moisture may enter from the outside of the device. When the light emitting element 302 is deteriorated due to the entry of impurities, the display device is deteriorated. Therefore, as illustrated in FIG. 16, it is preferable that the insulating layer 325 and the insulating layer 330 be not positioned at the end portion of the display device.
発光素子３０２は、接着層３３３を介して着色層３３４と重なる。スペーサ３３５は、接着層３３３を介して遮光層３３６と重なる。図１６では、導電層３３２と遮光層３３６との間に隙間がある場合を示しているが、これらが接していてもよい。 The light-emitting element 302 overlaps with the colored layer 334 with the adhesive layer 333 interposed therebetween. The spacer 335 overlaps with the light shielding layer 336 with the adhesive layer 333 interposed therebetween. Although FIG. 16 shows a case where there is a gap between the conductive layer 332 and the light shielding layer 336, they may be in contact with each other.
着色層３３４は特定の波長域の光を透過する有色層である。例えば、赤色、緑色、青色、又は黄色の波長域の光を透過するカラーフィルタなどを用いることができる。 The colored layer 334 is a colored layer that transmits light in a specific wavelength range. For example, a color filter that transmits light in a red, green, blue, or yellow wavelength range can be used.
なお、本発明の一態様は、カラーフィルタ方式に限られず、塗り分け方式、色変換方式、又は量子ドット方式等を適用してもよい。 Note that one embodiment of the present invention is not limited to the color filter method, and a color separation method, a color conversion method, a quantum dot method, or the like may be applied.
表示部１０４において、トランジスタ３０３は、バックゲートとしての機能を有する導電層３４０と、導電層３４０上の絶縁層３４１と、絶縁層３４１上において導電層３４０と重なる半導体層３４２と、半導体層３４２上の絶縁層３４３と、絶縁層３４３上に位置し、ゲートとしての機能を有する導電層３４４と、導電層３４４上に位置する絶縁層３４５のさらに上に位置し、半導体層３４２と電気的に接続されている導電層３４６及び導電層３４７と、を有する。 In the display portion 104, the transistor 303 includes a conductive layer 340 functioning as a back gate, an insulating layer 341 over the conductive layer 340, a semiconductor layer 342 overlapping with the conductive layer 340 over the insulating layer 341, and the semiconductor layer 342. The insulating layer 343, the conductive layer 344 which functions as a gate and is located over the insulating layer 343, and the insulating layer 345 which is located over the conductive layer 344 and electrically connected to the semiconductor layer 342 A conductive layer 346 and a conductive layer 347.
また、導電層３４０と同一の層に導電層３４８が位置する。導電層３４８上には絶縁層３４１が位置し、絶縁層３４１上には導電層３４８と重なる領域に導電層３４７が位置する。導電層３４７と絶縁層３４１と導電層３４８とが重なる領域が、容量素子３０４として機能する。 In addition, the conductive layer 348 is located in the same layer as the conductive layer 340. An insulating layer 341 is located over the conductive layer 348, and a conductive layer 347 is located over the insulating layer 341 in a region overlapping with the conductive layer 348. A region where the conductive layer 347, the insulating layer 341, and the conductive layer 348 overlap with each other functions as the capacitor 304.
トランジスタ３１０は、トランジスタ３０３と同様の構成を有するので、詳細な説明は割愛する。 Since the transistor 310 has a structure similar to that of the transistor 303, detailed description thereof is omitted.
トランジスタ３０３、容量素子３０４、トランジスタ３１０上には、絶縁層３６０が位置し、絶縁層３３０上には導電層３４９が位置する。導電層３４９は導電層３４７と電気的に接続されており、液晶素子３０１の画素電極としての機能を有する。導電層３４９上には配向膜３６４が位置する。 An insulating layer 360 is located over the transistor 303, the capacitor 304, and the transistor 310, and a conductive layer 349 is located over the insulating layer 330. The conductive layer 349 is electrically connected to the conductive layer 347 and functions as a pixel electrode of the liquid crystal element 301. An alignment film 364 is located over the conductive layer 349.
基板２５１には、共通電極としての機能を有する導電層３６１が位置する。具体的に、図１６では、基板２５１上に接着層３６２を介して絶縁層３６３が接着されており、絶縁層３６３上に導電層３６１が位置する。そして、導電層３６１上には配向膜３６５が位置し、配向膜３６４と配向膜３６５の間には液晶層３６６が位置する。 A conductive layer 361 having a function as a common electrode is located on the substrate 251. Specifically, in FIG. 16, the insulating layer 363 is bonded to the substrate 251 with the adhesive layer 362 interposed therebetween, and the conductive layer 361 is positioned on the insulating layer 363. An alignment film 365 is positioned on the conductive layer 361, and a liquid crystal layer 366 is positioned between the alignment film 364 and the alignment film 365.
図１６では、導電層３４９が可視光を反射する機能を有し、導電層３６１が可視光を透過する機能を有することで、破線の矢印で示すように基板２５１側から入射した光を、導電層３４９において反射させ、基板２５１側から放射させることができる。 In FIG. 16, the conductive layer 349 has a function of reflecting visible light, and the conductive layer 361 has a function of transmitting visible light, so that light incident from the substrate 251 side can be transmitted as indicated by a dashed arrow. The light can be reflected from the layer 349 and emitted from the substrate 251 side.
可視光を透過する導電性材料としては、例えば、インジウム（Ｉｎ）、亜鉛（Ｚｎ）、錫（Ｓｎ）の中から選ばれた一種を含む材料を用いるとよい。具体的には、酸化インジウム、インジウム錫酸化物（ＩＴＯ：Ｉｎｄｉｕｍ　Ｔｉｎ　Ｏｘｉｄｅ）、インジウム亜鉛酸化物、酸化タングステンを含むインジウム酸化物、酸化タングステンを含むインジウム亜鉛酸化物、酸化チタンを含むインジウム酸化物、酸化チタンを含むインジウム錫酸化物、酸化シリコンを含むインジウム錫酸化物（ＩＴＳＯ）、酸化亜鉛、ガリウムを含む酸化亜鉛などが挙げられる。なお、グラフェンを含む膜を用いることもできる。グラフェンを含む膜は、例えば膜状に形成された酸化グラフェンを含む膜を還元して形成することができる。 As the conductive material that transmits visible light, for example, a material containing one kind selected from indium (In), zinc (Zn), and tin (Sn) may be used. Specifically, indium oxide, indium tin oxide (ITO: Indium Tin Oxide), indium zinc oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, Indium tin oxide containing titanium oxide, indium tin oxide containing silicon oxide (ITSO), zinc oxide, zinc oxide containing gallium, and the like can be given. Note that a film containing graphene can also be used. The film containing graphene can be formed, for example, by reducing a film containing graphene oxide formed in a film shape.
可視光を反射する導電性材料としては、例えば、アルミニウム、銀、またはこれらの金属材料を含む合金等が挙げられる。そのほか、金、白金、ニッケル、タングステン、クロム、モリブデン、鉄、コバルト、銅、もしくはパラジウム等の金属材料、またはこれら金属材料を含む合金を用いることができる。また、上記金属材料または合金に、ランタン、ネオジム、またはゲルマニウム等が添加されていてもよい。アルミニウムとチタンの合金、アルミニウムとニッケルの合金、アルミニウムとネオジムの合金、アルミニウム、ニッケル、及びランタンの合金（Ａｌ−Ｎｉ−Ｌａ）等のアルミニウムを含む合金（アルミニウム合金）、銀と銅の合金、銀とパラジウムと銅の合金（Ａｇ−Ｐｄ−Ｃｕ、ＡＰＣとも記す）、銀とマグネシウムの合金等の銀を含む合金を用いてもよい。 Examples of the conductive material that reflects visible light include aluminum, silver, and alloys containing these metal materials. In addition, a metal material such as gold, platinum, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, or palladium, or an alloy containing these metal materials can be used. In addition, lanthanum, neodymium, germanium, or the like may be added to the metal material or alloy. Alloys containing aluminum such as aluminum and titanium alloys, aluminum and nickel alloys, aluminum and neodymium alloys, aluminum, nickel, and lanthanum alloys (Al-Ni-La), silver and copper alloys, An alloy containing silver such as an alloy of silver, palladium, and copper (also referred to as Ag-Pd-Cu, APC), an alloy of silver and magnesium, or the like may be used.
なお、図１６では、バックゲートを有するトップゲート方のトランジスタを用いた表示装置の構成について説明したが、本発明の一態様に係る表示装置はバックゲートを有さないトランジスタを用いていても良いし、バックゲート型のトランジスタを用いていても良い。 Note that although FIG. 16 illustrates the structure of a display device using a top-gate transistor having a back gate, the display device according to one embodiment of the present invention may use a transistor without a back gate. In addition, a back gate transistor may be used.
トランジスタに用いる半導体材料の結晶性についても特に限定されず、非晶質半導体、結晶性を有する半導体（微結晶半導体、多結晶半導体、単結晶半導体、又は一部に結晶領域を有する半導体）のいずれを用いてもよい。結晶性を有する半導体を用いると、トランジスタ特性の劣化を抑制できるため好ましい。 There is no particular limitation on the crystallinity of a semiconductor material used for the transistor, and any of an amorphous semiconductor and a semiconductor having crystallinity (a microcrystalline semiconductor, a polycrystalline semiconductor, a single crystal semiconductor, or a semiconductor partially including a crystal region) is used. May be used. It is preferable to use a crystalline semiconductor because deterioration of transistor characteristics can be suppressed.
また、トランジスタに用いる半導体材料としては、酸化物半導体を用いることができる。代表的には、インジウムを含む酸化物半導体などを適用できる。 As a semiconductor material used for the transistor, an oxide semiconductor can be used. Typically, an oxide semiconductor containing indium can be used.
特にシリコンよりもバンドギャップが広く、且つキャリア密度の小さい半導体材料を用いると、トランジスタのオフ状態における電流を低減できるため好ましい。 In particular, it is preferable to use a semiconductor material having a wider band gap and lower carrier density than silicon because current in the off-state of the transistor can be reduced.
半導体層は、例えば少なくともインジウム、亜鉛及びＭ（アルミニウム、チタン、ガリウム、ゲルマニウム、イットリウム、ジルコニウム、ランタン、セリウム、スズ、ネオジムまたはハフニウム等の金属）を含むＩｎ−Ｍ−Ｚｎ系酸化物で表記される膜を含むことが好ましい。また、該酸化物半導体を用いたトランジスタの電気特性のばらつきを減らすため、それらと共に、スタビライザーを含むことが好ましい。 The semiconductor layer is represented by an In-M-Zn-based oxide containing at least indium, zinc, and M (metal such as aluminum, titanium, gallium, germanium, yttrium, zirconium, lanthanum, cerium, tin, neodymium, or hafnium). It is preferable to include a film. In addition, in order to reduce variation in electrical characteristics of the transistor including the oxide semiconductor, a stabilizer is preferably included together with the transistor.
スタビライザーとしては、上記Ｍで記載の金属を含め、例えば、ガリウム、スズ、ハフニウム、アルミニウム、またはジルコニウム等がある。また、他のスタビライザーとしては、ランタノイドである、ランタン、セリウム、プラセオジム、ネオジム、サマリウム、ユウロピウム、ガドリニウム、テルビウム、ジスプロシウム、ホルミウム、エルビウム、ツリウム、イッテルビウム、ルテチウム等がある。 Examples of the stabilizer include the metals described in M above, and examples include gallium, tin, hafnium, aluminum, and zirconium. Other stabilizers include lanthanoids such as lanthanum, cerium, praseodymium, neodymium, samarium, europium, gadolinium, terbium, dysprosium, holmium, erbium, thulium, ytterbium, and lutetium.
半導体層を構成する酸化物半導体として、例えば、Ｉｎ−Ｇａ−Ｚｎ系酸化物、Ｉｎ−Ａｌ−Ｚｎ系酸化物、Ｉｎ−Ｓｎ−Ｚｎ系酸化物、Ｉｎ−Ｈｆ−Ｚｎ系酸化物、Ｉｎ−Ｌａ−Ｚｎ系酸化物、Ｉｎ−Ｃｅ−Ｚｎ系酸化物、Ｉｎ−Ｐｒ−Ｚｎ系酸化物、Ｉｎ−Ｎｄ−Ｚｎ系酸化物、Ｉｎ−Ｓｍ−Ｚｎ系酸化物、Ｉｎ−Ｅｕ−Ｚｎ系酸化物、Ｉｎ−Ｇｄ−Ｚｎ系酸化物、Ｉｎ−Ｔｂ−Ｚｎ系酸化物、Ｉｎ−Ｄｙ−Ｚｎ系酸化物、Ｉｎ−Ｈｏ−Ｚｎ系酸化物、Ｉｎ−Ｅｒ−Ｚｎ系酸化物、Ｉｎ−Ｔｍ−Ｚｎ系酸化物、Ｉｎ−Ｙｂ−Ｚｎ系酸化物、Ｉｎ−Ｌｕ−Ｚｎ系酸化物、Ｉｎ−Ｓｎ−Ｇａ−Ｚｎ系酸化物、Ｉｎ−Ｈｆ−Ｇａ−Ｚｎ系酸化物、Ｉｎ−Ａｌ−Ｇａ−Ｚｎ系酸化物、Ｉｎ−Ｓｎ−Ａｌ−Ｚｎ系酸化物、Ｉｎ−Ｓｎ−Ｈｆ−Ｚｎ系酸化物、Ｉｎ−Ｈｆ−Ａｌ−Ｚｎ系酸化物を用いることができる。 As an oxide semiconductor included in the semiconductor layer, for example, an In—Ga—Zn-based oxide, an In—Al—Zn-based oxide, an In—Sn—Zn-based oxide, an In—Hf—Zn-based oxide, an In— La-Zn oxide, In-Ce-Zn oxide, In-Pr-Zn oxide, In-Nd-Zn oxide, In-Sm-Zn oxide, In-Eu-Zn oxide In-Gd-Zn-based oxide, In-Tb-Zn-based oxide, In-Dy-Zn-based oxide, In-Ho-Zn-based oxide, In-Er-Zn-based oxide, In-Tm -Zn oxide, In-Yb-Zn oxide, In-Lu-Zn oxide, In-Sn-Ga-Zn oxide, In-Hf-Ga-Zn oxide, In-Al- Ga-Zn-based oxide, In-Sn-Al-Zn-based oxide, In-Sn-Hf-Zn-based Product, can be used In-Hf-Al-Zn-based oxide.
なお、ここで、Ｉｎ−Ｇａ−Ｚｎ系酸化物とは、ＩｎとＧａとＺｎを主成分として有する酸化物という意味であり、ＩｎとＧａとＺｎの比率は問わない。また、ＩｎとＧａとＺｎ以外の金属元素が入っていてもよい。 Note that here, an In—Ga—Zn-based oxide means an oxide containing In, Ga, and Zn as its main components, and there is no limitation on the ratio of In, Ga, and Zn. Moreover, metal elements other than In, Ga, and Zn may be contained.
なお、本実施の形態では、反射型表示素子として液晶素子を用いた表示装置の構成を例示したが、反射型表示素子として、液晶素子のほかに、シャッター方式のＭＥＭＳ（Ｍｉｃｒｏ　Ｅｌｅｃｔｒｏ　Ｍｅｃｈａｎｉｃａｌ　Ｓｙｓｔｅｍ）素子、光干渉方式のＭＥＭＳ素子、マイクロカプセル方式、電気泳動方式、エレクトロウェッティング方式、電子粉流体（登録商標）方式等を適用した表示素子などを用いることができる。 Note that in this embodiment, the structure of a display device using a liquid crystal element as a reflective display element is illustrated, but as a reflective display element, in addition to a liquid crystal element, a shutter-type MEMS (Micro Electro Mechanical System) element is used. An optical interference type MEMS device, a microcapsule method, an electrophoresis method, an electrowetting method, an electronic powder fluid (registered trademark) method, or the like can be used.
また、発光型表示素子として、例えばＯＬＥＤ（Ｏｒｇａｎｉｃ　Ｌｉｇｈｔ　Ｅｍｉｔｔｉｎｇ　Ｄｉｏｄｅ）、ＬＥＤ（Ｌｉｇｈｔ　Ｅｍｉｔｔｉｎｇ　Ｄｉｏｄｅ）、ＱＬＥＤ（Ｑｕａｎｔｕｍ−ｄｏｔ　Ｌｉｇｈｔ　Ｅｍｉｔｔｉｎｇ　Ｄｉｏｄｅ）などの自発光性の発光素子を用いることができる。 Further, as the light-emitting display element, for example, a self-luminous light-emitting element such as OLED (Organic Light Emitting Diode), LED (Light Emitting Diode), or QLED (Quantum-dot Light Emitting Diode) can be used.
液晶素子としては、例えば垂直配向（ＶＡ：Ｖｅｒｔｉｃａｌ　Ａｌｉｇｎｍｅｎｔ）モードが適用された液晶素子を用いることができる。垂直配向モードとしては、ＭＶＡ（Ｍｕｌｔｉ−Ｄｏｍａｉｎ　Ｖｅｒｔｉｃａｌ　Ａｌｉｇｎｍｅｎｔ）モード、ＰＶＡ（Ｐａｔｔｅｒｎｅｄ　Ｖｅｒｔｉｃａｌ　Ａｌｉｇｎｍｅｎｔ）モード、ＡＳＶ（Ａｄｖａｎｃｅｄ　Ｓｕｐｅｒ　Ｖｉｅｗ）モードなどを用いることができる。 As the liquid crystal element, for example, a liquid crystal element to which a vertical alignment (VA) mode is applied can be used. As the vertical alignment mode, MVA (Multi-Domain Vertical Alignment) mode, PVA (Patterned Vertical Alignment) mode, ASV (Advanced Super View) mode, or the like can be used.
また、液晶素子には、様々なモードが適用された液晶素子を用いることができる。例えばＶＡモードのほかに、ＴＮ（Ｔｗｉｓｔｅｄ　Ｎｅｍａｔｉｃ）モード、ＩＰＳ（Ｉｎ−Ｐｌａｎｅ−Ｓｗｉｔｃｈｉｎｇ）モード、ＦＦＳ（Ｆｒｉｎｇｅ　Ｆｉｅｌｄ　Ｓｗｉｔｃｈｉｎｇ）モード、ＡＳＭ（Ａｘｉａｌｌｙ　Ｓｙｍｍｅｔｒｉｃ　ａｌｉｇｎｅｄ　Ｍｉｃｒｏ−ｃｅｌｌ）モード、ＯＣＢ（Ｏｐｔｉｃａｌｌｙ　Ｃｏｍｐｅｎｓａｔｅｄ　Ｂｉｒｅｆｒｉｎｇｅｎｃｅ）モード、ＦＬＣ（Ｆｅｒｒｏｅｌｅｃｔｒｉｃ　Ｌｉｑｕｉｄ　Ｃｒｙｓｔａｌ）モード、ＡＦＬＣ（ＡｎｔｉＦｅｒｒｏｅｌｅｃｔｒｉｃ　Ｌｉｑｕｉｄ　Ｃｒｙｓｔａｌ）モード等が適用された液晶素子を用いることができる。 As the liquid crystal element, liquid crystal elements to which various modes are applied can be used. For example, in addition to the VA mode, TN (Twisted Nematic) mode, IPS (In-Plane-Switching) mode, FFS (Fringe Field Switching) mode, ASM (Axially Symmetrical Aligned Micro-cell) mode A liquid crystal element to which an FLC (Ferroelectric Liquid Crystal) mode, an AFLC (Antiferroelectric Liquid Crystal) mode, or the like is applied can be used.
なお、液晶素子に用いる液晶としては、サーモトロピック液晶、低分子液晶、高分子液晶、高分子分散型液晶（ＰＤＬＣ：Ｐｏｌｙｍｅｒ　Ｄｉｓｐｅｒｓｅｄ　Ｌｉｑｕｉｄ　Ｃｒｙｓｔａｌ）、強誘電性液晶、反強誘電性液晶等を用いることができる。これらの液晶材料は、条件により、コレステリック相、スメクチック相、キュービック相、カイラルネマチック相、等方相等を示す。 As the liquid crystal used in the liquid crystal element, a thermotropic liquid crystal, a low molecular liquid crystal, a polymer liquid crystal, a polymer dispersed liquid crystal (PDLC), a ferroelectric liquid crystal, an antiferroelectric liquid crystal, or the like is used. Can do. These liquid crystal materials exhibit a cholesteric phase, a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase, and the like depending on conditions.
また、液晶材料としては、ポジ型の液晶、またはネガ型の液晶のいずれを用いてもよく、適用するモードや設計に応じて最適な液晶材料を用いればよい。 Further, as the liquid crystal material, either a positive type liquid crystal or a negative type liquid crystal may be used, and an optimal liquid crystal material may be used according to an applied mode or design.
また、液晶の配向を制御するため、配向膜を設けることができる。なお、横電界方式を採用する場合、配向膜を用いないブルー相を示す液晶を用いてもよい。ブルー相は液晶相の一つであり、コレステリック液晶を昇温していくと、コレステリック相から等方相へ転移する直前に発現する相である。ブルー相は狭い温度範囲でしか発現しないため、温度範囲を改善するために数重量％以上のカイラル剤を混合させた液晶組成物を液晶層に用いる。ブルー相を示す液晶とカイラル剤とを含む液晶組成物は、応答速度が短く、光学的等方性である。また、ブルー相を示す液晶とカイラル剤とを含む液晶組成物は、配向処理が不要であり、視野角依存性が小さい。また配向膜を設けなくてもよいのでラビング処理も不要となるため、ラビング処理によって引き起こされる静電破壊を防止することができ、作製工程中の液晶表示装置の不良や破損を軽減することができる。 An alignment film can be provided to control the alignment of the liquid crystal. Note that in the case of employing a horizontal electric field mode, liquid crystal exhibiting a blue phase for which an alignment film is unnecessary may be used. The blue phase is one of the liquid crystal phases. When the temperature of the cholesteric liquid crystal is increased, the blue phase appears immediately before the transition from the cholesteric phase to the isotropic phase. Since the blue phase appears only in a narrow temperature range, a liquid crystal composition mixed with several percent by weight or more of a chiral agent is used for the liquid crystal layer in order to improve the temperature range. A liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent has a short response speed and is optically isotropic. In addition, a liquid crystal composition including a liquid crystal exhibiting a blue phase and a chiral agent does not require alignment treatment and has a small viewing angle dependency. Further, since it is not necessary to provide an alignment film, a rubbing process is not required, so that electrostatic breakdown caused by the rubbing process can be prevented, and defects or breakage of the liquid crystal display device during the manufacturing process can be reduced. .
本実施の形態は、他の実施の形態と適宜組み合わせて実施することが可能である。 This embodiment can be implemented in appropriate combination with any of the other embodiments.
（実施の形態７）
次いで、図１７（Ａ）に、本発明の一態様に係る表示装置２００の、外観の一例を示す。図１７（Ａ）に示す表示装置２００は、基板５００上に画素部５０１と、反射型表示素子を有する画素用の走査線駆動回路５０２と、発光型表示素子を有する画素用の走査線駆動回路５０３と、を有する。また、ＩＣ５０４は反射型表示素子を有する画素用の信号線駆動回路を有し、配線５０６を介して画素部５０１に電気的に接続されている。また、ＩＣ５０５は発光型表示素子を有する画素用の信号線駆動回路を有し、配線５０６を介して画素部５０１に電気的に接続されている。 (Embodiment 7)
Next, FIG. 17A illustrates an example of an appearance of the display device 200 according to one embodiment of the present invention. A display device 200 illustrated in FIG. 17A includes a pixel portion 501 over a substrate 500, a pixel scan line driver circuit 502 including a reflective display element, and a pixel scan line driver circuit including a light emitting display element. 503. The IC 504 includes a pixel signal line driver circuit having a reflective display element, and is electrically connected to the pixel portion 501 through a wiring 506. The IC 505 includes a pixel signal line driver circuit having a light-emitting display element, and is electrically connected to the pixel portion 501 through a wiring 506.
また、ＦＰＣ５０８はＩＣ５０４に電気的に接続されており、ＦＰＣ５０９はＩＣ５０５に電気的に接続されている。ＦＰＣ５１０は配線５１１を介して走査線駆動回路５０２に電気的に接続されている。また、ＦＰＣ５１０は配線５１２を介して走査線駆動回路５０３に電気的に接続されている。 The FPC 508 is electrically connected to the IC 504, and the FPC 509 is electrically connected to the IC 505. The FPC 510 is electrically connected to the scan line driver circuit 502 through the wiring 511. The FPC 510 is electrically connected to the scan line driver circuit 503 through the wiring 512.
次いで、反射型表示素子として液晶素子を用い、発光型表示素子として発光素子を用いる場合を例に挙げて、画素部５０１が有する画素５１３における、液晶素子の表示領域のレイアウトと、発光素子の表示領域のレイアウトとを、図１７（Ｂ）に示す。 Next, taking as an example the case where a liquid crystal element is used as the reflective display element and the light emitting element is used as the light emitting display element, the layout of the display region of the liquid crystal element and the display of the light emitting element in the pixel 513 included in the pixel portion 501 are described. The layout of the area is shown in FIG.
具体的に図１７（Ｂ）では、画素５１３が、液晶素子の表示領域５１４と、黄色に対応する発光素子の表示領域５１５と、緑色に対応する発光素子の表示領域５１６と、赤色に対応する発光素子の表示領域５１７と、青色に対応する発光素子の表示領域５１８とを有する。 Specifically, in FIG. 17B, a pixel 513 corresponds to a display area 514 of a liquid crystal element, a display area 515 of a light emitting element corresponding to yellow, a display area 516 of a light emitting element corresponding to green, and a red color. A display area 517 of the light emitting element and a display area 518 of the light emitting element corresponding to blue are included.
なお、緑色、青色、赤色、黄色にそれぞれ対応する発光素子を用いて色再現性の良い黒を表示する際、発光素子の面積あたりに流れる電流量は、黄色に対応する発光素子が最も小さいことが求められる。図１７（Ｂ）では、緑色に対応する発光素子の表示領域５１６と、赤色に対応する発光素子の表示領域５１７と、青色に対応する発光素子の表示領域５１８とが、ほぼ同等の面積を有し、それらに対して黄色に対応する発光素子の表示領域５１５の面積はやや小さいため、色再現性の良い黒を表示することが可能である。 When displaying black with good color reproducibility using light emitting elements corresponding to green, blue, red, and yellow, the amount of current flowing per area of the light emitting element is the smallest for the light emitting elements corresponding to yellow. Is required. In FIG. 17B, the display area 516 of the light emitting element corresponding to green, the display area 517 of the light emitting element corresponding to red, and the display area 518 of the light emitting element corresponding to blue have substantially the same area. However, since the area of the display area 515 of the light emitting element corresponding to yellow is slightly small, it is possible to display black with good color reproducibility.
本実施の形態は、他の実施の形態と適宜組み合わせて実施することが可能である。 This embodiment can be implemented in appropriate combination with any of the other embodiments.
（実施の形態８）
本実施の形態では、表示装置に入射する光の角度を検知するための、光センサの構成例について説明する。 (Embodiment 8)
In this embodiment, a configuration example of an optical sensor for detecting an angle of light incident on a display device will be described.
上記光センサは、表示装置を構成する基板上に形成することもできるし、表示装置と別に用意した基板上に形成されていても良い。図１８に、光センサの断面構造を一例として示す。 The optical sensor can be formed on a substrate constituting the display device or may be formed on a substrate prepared separately from the display device. FIG. 18 shows an example of a cross-sectional structure of an optical sensor.
図１８に示す光センサ６００は、同いつの平面上において一の方向に並べられた、複数のフォトダイオードＰＤを有する。なお、図１８では、複数のフォトダイオードＰＤとしてフォトダイオードＰＤ１乃至ＰＤ１１が一方向に並んでいる構成を例示している。 An optical sensor 600 shown in FIG. 18 includes a plurality of photodiodes PD arranged in one direction on the same plane. 18 illustrates a configuration in which photodiodes PD1 to PD11 are arranged in one direction as the plurality of photodiodes PD.
そして、フォトダイオードＰＤ１乃至ＰＤ１１上には、開口部を有する遮光膜６０１が位置し、遮光膜６０１上には開口部を有する遮光膜６０２が位置する。開口部を有する遮光膜６０１と遮光膜６０２とを重ねることで、フォトダイオードＰＤ１乃至ＰＤ１１のそれぞれにおける光の入射角α１乃至α１１の値を制御することができる。 A light shielding film 601 having an opening is located on the photodiodes PD1 to PD11, and a light shielding film 602 having an opening is located on the light shielding film 601. By overlapping the light shielding film 601 having the opening and the light shielding film 602, the values of the light incident angles α1 to α11 in the photodiodes PD1 to PD11 can be controlled.
なお、本実施の形態では、遮光膜６０１と遮光膜６０２とを積層する場合を例示しているが、より多くの遮光膜を遮光膜６０１及び遮光膜６０２上に設けても良い。多くの遮光膜を遮光膜６０１及び遮光膜６０２上に設けることで、各フォトダイオードＰＤが感知できる光の入射角の範囲を狭めることができ、光センサ６００が感知できる光の入射角の精度を高めることができる。 Note that although the case where the light shielding film 601 and the light shielding film 602 are stacked is illustrated in this embodiment mode, more light shielding films may be provided over the light shielding film 601 and the light shielding film 602. By providing many light-shielding films on the light-shielding film 601 and the light-shielding film 602, the range of the incident angle of light that can be sensed by each photodiode PD can be narrowed, and the accuracy of the incident angle of light that can be sensed by the optical sensor 600 is improved. Can be increased.
また、図１８では、一の方向に並べられた複数のフォトダイオードＰＤと、それに対応する開口部を有する遮光膜６０１及び遮光膜６０２とを有する光センサ６００の構成例を示している。本発明の一態様では上記構成の他に、例えば、第１の方向に並べられた複数の弟１のフォトダイオードＰＤと、第２の方向に並べられた複数の第２のフォトダイオードＰＤと、弟１のフォトダイオードＰＤに対応する開口部及び弟２のフォトダイオードＰＤに対応する開口部を有する遮光膜６０１及び遮光膜６０２とを有していても良い。 FIG. 18 shows a configuration example of an optical sensor 600 including a plurality of photodiodes PD arranged in one direction and a light shielding film 601 and a light shielding film 602 having openings corresponding to the photodiodes PD. In one embodiment of the present invention, in addition to the above-described configuration, for example, a plurality of younger photodiodes PD arranged in a first direction, and a plurality of second photodiodes PD arranged in a second direction, A light shielding film 601 and a light shielding film 602 each having an opening corresponding to the photodiode PD of the brother 1 and an opening corresponding to the photodiode PD of the brother 2 may be provided.
次いで、図１９（Ａ）に、本発明の一態様に係る表示装置を用いた電子機器の一例を示す。図１９（Ａ）は、タブレット型の情報端末６２００であり、筐体６２２１、表示装置６２２２、操作ボタン６２２３、スピーカ６２２４を有する。また、本発明の一態様に係る表示装置６２２２に、位置入力装置としての機能を付加しても良い。また、位置入力装置としての機能は、表示装置にタッチパネルを設けることで付加することができる。あるいは、位置入力装置としての機能は、フォトセンサとも呼ばれる光電変換素子を表示装置の画素部に設けることでも、付加することができる。また、操作ボタン６２２３に情報端末６２００を起動する電源スイッチ、情報端末６２００のアプリケーションを操作するボタン、音量調整ボタン、又は表示装置６２２２を点灯、あるいは消灯するスイッチなどのいずれかを備えることができる。また、図１９（Ａ）に示した情報端末６２００では、操作ボタン６２２３の数を４個示しているが、情報端末６２００の有する操作ボタンの数及び配置は、これに限定されない。 Next, FIG. 19A illustrates an example of an electronic device using the display device according to one embodiment of the present invention. FIG. 19A illustrates a tablet information terminal 6200 which includes a housing 6221, a display device 6222, operation buttons 6223, and a speaker 6224. Further, a function as a position input device may be added to the display device 6222 according to one embodiment of the present invention. The function as a position input device can be added by providing a touch panel on the display device. Alternatively, the function as a position input device can be added by providing a photoelectric conversion element called a photosensor in a pixel portion of a display device. Further, the operation button 6223 can include any one of a power switch for starting the information terminal 6200, a button for operating an application of the information terminal 6200, a volume adjustment button, a switch for turning on or off the display device 6222, and the like. In the information terminal 6200 illustrated in FIG. 19A, the number of operation buttons 6223 is four, but the number and arrangement of the operation buttons of the information terminal 6200 are not limited thereto.
また、情報端末６２００は、外光の入射角度を測定する光センサ６２２５Ｘ及び光センサ６２２５Ｙを有する。光センサ６２２５Ｘ及び光センサ６２２５Ｙは、筐体６２２１のベゼルに配置されている。特に、光センサ６２２５Ｘは、筐体６２２１のベゼルにおいて２つある短辺の一方に配置され、光センサ６２２５Ｙは、筐体６２２１のベゼルにおいて２つある長辺の一方に配置されている。本発明の一態様では、光センサ６２２５Ｘ及び光センサ６２２５Ｙによって外光の入射角度、照度を測定して、それらのデータを基づいて、表示装置６２２２に表示する画像の色の調整と階調の調整を行うことができる。 In addition, the information terminal 6200 includes an optical sensor 6225X and an optical sensor 6225Y that measure an incident angle of external light. The optical sensor 6225X and the optical sensor 6225Y are arranged on the bezel of the housing 6221. In particular, the optical sensor 6225X is disposed on one of the two short sides of the bezel of the housing 6221, and the optical sensor 6225Y is disposed on one of the two long sides of the bezel of the housing 6221. In one embodiment of the present invention, the incident angle and illuminance of external light are measured by the optical sensor 6225X and the optical sensor 6225Y, and the color adjustment and gradation adjustment of an image displayed on the display device 6222 are performed based on the data. It can be performed.
また、光センサ６２２５Ｘ及び光センサ６２２５Ｙの配置箇所は、図１９（Ａ）に示した情報端末６２００に限定されない。例えば、図１９（Ｂ）に示す情報端末６２０１のように、光センサ６２２５Ｘは、筐体６２２１のベゼルにおいて２つある短辺の両方に配置され、光センサ６２２５Ｙは、筐体６２２１のベゼルにおいて２つある長辺の両方に配置されてもよい。 Further, the arrangement location of the optical sensor 6225X and the optical sensor 6225Y is not limited to the information terminal 6200 illustrated in FIG. For example, as in the information terminal 6201 illustrated in FIG. 19B, the optical sensor 6225X is arranged on both of the two short sides of the bezel of the housing 6221, and the optical sensor 6225Y is 2 in the bezel of the housing 6221. It may be arranged on both long sides.
なお、光センサ６２２５Ｘ及び光センサ６２２５Ｙとして、図１８に示した構成を適用することができる。 Note that as the optical sensor 6225X and the optical sensor 6225Y, the configuration illustrated in FIG. 18 can be applied.
また、図示していないが、図１９（Ａ）に示した情報端末６２００は、筐体６２２１の内部にセンサ（力、変位、位置、速度、加速度、角速度、回転数、距離、光、液、磁気、温度、化学物質、音声、時間、硬度、電場、電流、電圧、電力、放射線、流量、湿度、傾度、振動、におい又は赤外線などを測定する機能を含むもの）を有する構成であってもよい。特に、ジャイロセンサ、加速度センサなどの傾きを測定するセンサを有する測定装置を設けることで、図１９（Ａ）に示す情報端末６２００の向き（鉛直方向に対して情報端末がどの向きに向いているか）を判断して、表示装置６２２２の画面表示を、情報端末６２００の向きに応じて自動的に切り替えるようにすることができる。 Although not illustrated, the information terminal 6200 illustrated in FIG. 19A includes a sensor (force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, Even a configuration having a function of measuring magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, smell, infrared rays, etc.) Good. In particular, by providing a measuring device having a sensor for measuring the inclination, such as a gyro sensor or an acceleration sensor, the direction of the information terminal 6200 shown in FIG. ) Can be automatically switched according to the orientation of the information terminal 6200.
また、該傾きの情報と、先述した光センサ６２２５Ｘ及び光センサ６２２５Ｙから得た外光の入射角度、及び照度の情報を組み合わせることによって、より正確に表示装置６２２２に映す画像データの色の調整と階調の調整を行うことができる。この場合、筐体６２２１に撮像センサを設けて、情報端末６２００に対する使用者の眼の位置（あるいは視線の方向）の情報を取得し、該傾き、外光の入射角度、及び照度の情報を組み合わせることによって、より更に正確に、表示装置６２２２に表示する画像の色の調整と階調の調整を行うことができる。 Further, by combining the information on the tilt with the information on the incident angle and the illuminance of the external light obtained from the optical sensor 6225X and the optical sensor 6225Y, the color of the image data projected on the display device 6222 can be adjusted more accurately. The gradation can be adjusted. In this case, an imaging sensor is provided in the housing 6221 to acquire information on the position of the user's eyes (or the direction of the line of sight) with respect to the information terminal 6200 and combine the information on the tilt, the incident angle of external light, and the illuminance. Thus, the color and gradation of the image displayed on the display device 6222 can be adjusted more accurately.
また、自動的に色の調整と階調の調整を行う方法として、ニューラルネットワークを利用した方法がある。 Further, as a method for automatically adjusting the color and the gradation, there is a method using a neural network.
また、図示していないが、図１９（Ａ）に示した情報端末６２００は、マイク及びスピーカを有する構成であってもよい。この構成により、例えば、情報端末６２００に携帯電話のような通話機能を付することができる。また、図示していないが、図１９（Ａ）に示した情報端末６２００は、カメラを有する構成であってもよい。また、図示していないが、図１９（Ａ）に示した情報端末６２００は、フラッシュライト、又は照明の用途として発光装置を有する構成であってもよい。 Although not illustrated, the information terminal 6200 illustrated in FIG. 19A may have a microphone and a speaker. With this configuration, for example, the information terminal 6200 can be provided with a call function such as a mobile phone. Although not illustrated, the information terminal 6200 illustrated in FIG. 19A may have a camera. Although not illustrated, the information terminal 6200 illustrated in FIG. 19A may have a structure including a light-emitting device for use in flashlight or lighting.
また、図示していないが、図１９（Ａ）に示した情報端末６２００は、指紋、静脈、虹彩、又は声紋など生体情報を取得する装置を有する構成であってもよい。この構成を適用することによって、生体認証機能を有する情報端末６２００を実現することができる。 Although not illustrated, the information terminal 6200 illustrated in FIG. 19A may include a device that acquires biological information such as a fingerprint, a vein, an iris, or a voiceprint. By applying this configuration, an information terminal 6200 having a biometric authentication function can be realized.
また、図示していないが、図１９（Ａ）に示した情報端末６２００は、マイクを有する構成であってもよい。この構成を適用することによって、情報端末６２００に通話機能を付することができる。また、情報端末６２００に音声解読機能を付することができる場合がある。情報端末６２００に音声解読機能を設けることで、音声認識によって情報端末６２００を操作する機能、更には、音声や会話を判読して会話録を作成する機能、などを情報端末６２００に有することができる。これにより、例えば、会議などの議事録作成として活用することができる。 Although not illustrated, the information terminal 6200 illustrated in FIG. 19A may have a microphone. By applying this configuration, the information terminal 6200 can be provided with a call function. In some cases, the information terminal 6200 can be provided with a voice decoding function. By providing the information terminal 6200 with a voice decoding function, the information terminal 6200 can have a function of operating the information terminal 6200 by voice recognition, a function of reading a voice or a conversation and creating a conversation record, and the like. . Thereby, it can utilize, for example as minutes preparations, such as a meeting.
本実施の形態は、他の実施の形態と適宜組み合わせて実施することが可能である。 This embodiment can be implemented in appropriate combination with any of the other embodiments.
（実施の形態９）
図２０に、本発明の一態様に係る表示装置を用いた電子機器の具体例を示す。 (Embodiment 9)
FIG. 20 illustrates a specific example of an electronic device using the display device according to one embodiment of the present invention.
図２０（Ａ）は携帯型ゲーム機であり、筐体５００１、筐体５００２、本発明の一態様に係る表示装置５００３、発明の一態様に係る表示装置５００４、マイクロホン５００５、スピーカ５００６、操作キー５００７、スタイラス５００８等を有する。なお、図２０（Ａ）に示した携帯型ゲーム機は、表示装置５００３と表示装置５００４とで示す二つの表示装置を有しているが、携帯型ゲーム機が有する表示装置の数は、これに限定されない。携帯型ゲーム機に本発明の一態様に係る表示装置５００３及び表示装置５００４を用いることで、使用環境における外光の強度に左右されずに、表示装置５００３及び表示装置５００４に表示品質の高い画像を表示することができ、消費電力も抑えることができる。 FIG. 20A illustrates a portable game machine, which includes a housing 5001, a housing 5002, a display device 5003 according to one embodiment of the present invention, a display device 5004 according to one embodiment of the present invention, a microphone 5005, a speaker 5006, and operation keys. 5007, stylus 5008, and the like. Note that the portable game machine illustrated in FIG. 20A includes two display devices, which are a display device 5003 and a display device 5004. The number of display devices included in the portable game machine is as follows. It is not limited to. By using the display device 5003 and the display device 5004 according to one embodiment of the present invention for a portable game machine, an image with high display quality is displayed on the display device 5003 and the display device 5004 without being influenced by the intensity of external light in a use environment. Can be displayed, and power consumption can also be reduced.
図２０（Ｂ）は腕時計型の携帯情報端末であり、筐体５２０１、本発明の一態様に係る表示装置５２０２、ベルト５２０３、光センサ５２０４、スイッチ５２０５等を有する。腕時計型の携帯情報端末に本発明の一態様に係る表示装置５２０２を用いることで、使用環境における外光の強度に左右されずに、表示装置５２０２に表示品質の高い画像を表示することができ、消費電力も抑えることができる。 FIG. 20B illustrates a wristwatch-type portable information terminal, which includes a housing 5201, a display device 5202 according to one embodiment of the present invention, a belt 5203, an optical sensor 5204, a switch 5205, and the like. By using the display device 5202 according to one embodiment of the present invention for a wristwatch-type portable information terminal, an image with high display quality can be displayed on the display device 5202 regardless of the intensity of external light in the usage environment. And power consumption can be reduced.
図２０（Ｃ）はタブレット型のパーソナルコンピュータであり、筐体５３０１、筐体５３０２、本発明の一態様に係る表示装置５３０３、光センサ５３０４、光センサ５３０５、スイッチ５３０６等を有する。表示装置５３０３は、筐体５３０１及び筐体５３０２によって支持されている。そして、表示装置５３０３は可撓性を有する基板を用いて形成されているため形状をフレキシブルに曲げることができる機能を有する。筐体５３０１と筐体５３０２の間の角度をヒンジ５３０７及び５３０８において変更することで、筐体５３０１と筐体５３０２が重なるように、表示装置５３０３を折りたたむことができる。図示してはいないが、開閉センサを内蔵させ、上記角度の変化を表示装置５３０３において使用条件の情報として用いても良い。また、光センサ５３０４は筐体５３０１に付いており、光センサ５３０５は筐体５３０２に付いている。上記構成により、筐体５３０１に支持されている領域における表示装置５３０３への外光の入射角の情報と、筐体５３０２に支持されている領域における表示装置５３０３への外光の入射角の情報とを、共に表示装置５３０３における使用条件の情報として用いることができる。タブレット型のパーソナルコンピュータに本発明の一態様に係る表示装置５３０３を用いることで、使用環境における外光の強度に左右されずに、表示装置５３０３に表示品質の高い画像を表示することができ、消費電力も抑えることができる。 FIG. 20C illustrates a tablet personal computer including a housing 5301, a housing 5302, a display device 5303 according to one embodiment of the present invention, an optical sensor 5304, an optical sensor 5305, a switch 5306, and the like. The display device 5303 is supported by a housing 5301 and a housing 5302. Since the display device 5303 is formed using a flexible substrate, the display device 5303 has a function of flexibly bending the shape. By changing the angle between the housing 5301 and the housing 5302 at the hinges 5307 and 5308, the display device 5303 can be folded so that the housing 5301 and the housing 5302 overlap with each other. Although not shown, an open / close sensor may be incorporated, and the change in the angle may be used as information on the use condition in the display device 5303. The optical sensor 5304 is attached to the housing 5301, and the optical sensor 5305 is attached to the housing 5302. With the above structure, information on the incident angle of external light to the display device 5303 in the region supported by the housing 5301 and information on the incident angle of external light on the display device 5303 in the region supported by the housing 5302 are displayed. Both of them can be used as information on usage conditions in the display device 5303. By using the display device 5303 according to one embodiment of the present invention for a tablet personal computer, an image with high display quality can be displayed on the display device 5303 without being influenced by the intensity of external light in the usage environment. Power consumption can also be suppressed.
図２０（Ｄ）はビデオカメラであり、筐体５８０１、筐体５８０２、本発明の一態様に係る表示装置５８０３、操作キー５８０４、レンズ５８０５、接続部５８０６等を有する。操作キー５８０４及びレンズ５８０５は筐体５８０１に設けられており、表示装置５８０３は筐体５８０２に設けられている。そして、筐体５８０１と筐体５８０２とは、接続部５８０６により接続されており、筐体５８０１と筐体５８０２の間の角度は、接続部５８０６により変更が可能である。表示装置５８０３における映像を、接続部５８０６における筐体５８０１と筐体５８０２との間の角度に従って切り替える構成としても良い。ビデオカメラに本発明の一態様に係る表示装置５８０３を用いることで、使用環境における外光の強度に左右されずに、表示装置５８０３に表示品質の高い画像を表示することができ、消費電力も抑えることができる。 FIG. 20D illustrates a video camera, which includes a housing 5801, a housing 5802, a display device 5803 according to one embodiment of the present invention, operation keys 5804, a lens 5805, a connection portion 5806, and the like. The operation key 5804 and the lens 5805 are provided in the housing 5801, and the display device 5803 is provided in the housing 5802. The housing 5801 and the housing 5802 are connected to each other by a connection portion 5806. An angle between the housing 5801 and the housing 5802 can be changed by the connection portion 5806. The video on the display device 5803 may be switched in accordance with the angle between the housing 5801 and the housing 5802 in the connection portion 5806. By using the display device 5803 according to one embodiment of the present invention for a video camera, an image with high display quality can be displayed on the display device 5803 without depending on the intensity of external light in the usage environment, and power consumption can be reduced. Can be suppressed.
図２０（Ｅ）は腕時計型の携帯情報端末であり、曲面を有する筐体５７０１、本発明の一態様に係る表示装置５７０２等を有する。本発明の一態様に係る表示装置５７０２に可撓性を有する基板を用いることで、曲面を有する筐体５７０１に表示装置５７０２を支持させることができ、フレキシブルかつ軽くて使い勝手の良い腕時計型の携帯情報端末を提供することができる。そして、腕時計型の携帯情報端末に本発明の一態様に係る表示装置５７０２を用いることで、使用環境における外光の強度に左右されずに、表示装置５７０２に表示品質の高い画像を表示することができ、消費電力も抑えることができる。 FIG. 20E illustrates a wristwatch-type portable information terminal including a housing 5701 having a curved surface, a display device 5702 according to one embodiment of the present invention, and the like. By using a flexible substrate for the display device 5702 according to one embodiment of the present invention, the display device 5702 can be supported by a housing 5701 having a curved surface, and is flexible, light, and easy to use. An information terminal can be provided. By using the display device 5702 according to one embodiment of the present invention for the wristwatch-type portable information terminal, an image with high display quality can be displayed on the display device 5702 without being influenced by the intensity of external light in the usage environment. And power consumption can be reduced.
図２０（Ｆ）は携帯電話であり、曲面を有する筐体５９０１に、本発明の一態様に係る表示装置５９０２、マイク５９０７、スピーカ５９０４、カメラ５９０３、外部接続部５９０６、操作用のボタン５９０５が設けられている。携帯電話に本発明の一態様に係る表示装置５９０２を用いることで、使用環境における外光の強度に左右されずに、表示装置５９０２に表示品質の高い画像を表示することができ、消費電力も抑えることができる。 FIG. 20F illustrates a mobile phone. A display device 5902, a microphone 5907, a speaker 5904, a camera 5903, an external connection portion 5906, and an operation button 5905 according to one embodiment of the present invention are provided in a housing 5901 having a curved surface. Is provided. By using the display device 5902 according to one embodiment of the present invention for a mobile phone, an image with high display quality can be displayed on the display device 5902 without depending on the intensity of external light in the usage environment, and power consumption can be reduced. Can be suppressed.
本実施の形態は、他の実施の形態と適宜組み合わせて実施することが可能である。 This embodiment can be implemented in appropriate combination with any of the other embodiments.
（実施の形態１０）
本実施の形態では、ニューラルネットワークの構成の一例を説明する。特に、学習を行う機能（学習機能又は学習手段ともいう）を、装置に対してどのように搭載するかについて述べる。 (Embodiment 10)
In the present embodiment, an example of the configuration of a neural network will be described. In particular, a description will be given of how a function for performing learning (also referred to as a learning function or learning means) is installed in the apparatus.
図２１（Ａ）は、学習機能を画像処理部８００に搭載した例である。具体的には、画像処理部８００内に、ハードウェアＨＡＲＤとしてＡＩＣ１０７（図４乃至図７）を搭載することで実現できる。なお、画像処理部８００の構成は、図２の画像処理部１６０の構成を適宜採用することができる。 FIG. 21A shows an example in which a learning function is installed in the image processing unit 800. Specifically, this can be realized by mounting the AIC 107 (FIGS. 4 to 7) as hardware HARD in the image processing unit 800. Note that the configuration of the image processing unit 800 can adopt the configuration of the image processing unit 160 of FIG. 2 as appropriate.
＜図２１（Ａ）における学習の方法＞
学習を行う際は、画像処理部８００に、学習データＤ１（例えば、外光強度などに対応したデータ）及び教師データＤ２（例えば、利用者が選んだ色彩、輝度などに対応したデータ）が入力される。学習データ及び教師データを、それぞれを学習信号及び教師信号ともいう。 <Learning Method in FIG. 21A>
When learning is performed, learning data D1 (for example, data corresponding to external light intensity) and teacher data D2 (for example, data corresponding to color, brightness, etc. selected by the user) are input to the image processing unit 800. Is done. The learning data and the teacher data are also referred to as a learning signal and a teacher signal, respectively.
具体的な学習の方法は、図３乃至図５を用いて説明したとおり、ニューラルネットワークによる計算（積和演算）を行い、出力と教師データＤ２との誤差が小さくなるよう重み係数を変更すればよい。重み係数の変更方法には、実施の形態２で説明した方法が利用できる。学習終了時、得られた重み係数は画像処理部８００におけるＡＩＣ１０７のアナログメモリＡＭに保存される。アナログメモリＡＭの構成は、図６（Ｃ）に記載した構成を適宜採用することができる。 As described with reference to FIGS. 3 to 5, the specific learning method is to perform calculation (product-sum operation) using a neural network and change the weighting coefficient so that the error between the output and the teacher data D2 is reduced. Good. The method described in the second embodiment can be used as the weighting coefficient changing method. At the end of learning, the obtained weighting coefficient is stored in the analog memory AM of the AIC 107 in the image processing unit 800. The configuration described in FIG. 6C can be adopted as appropriate for the configuration of the analog memory AM.
＜図２１（Ａ）における画像処理の方法＞
学習終了後に画像処理（画像補正）を行う際、すなわち通常動作時には、新たに取得した入力データＤ３（例えば、外光強度などに対応するデータ）が画像処理部８００に入力され、当該入力データＤ３及び重み係数を用いてニューラルネットワークによる計算を行い、画像処理に適したパラメータを取得する。計算は、図３乃至図５を用いて説明したとおり、ＡＩＣ１０７における、図６、図７（Ａ）に示す回路を用いて行う。 <Image Processing Method in FIG. 21A>
When image processing (image correction) is performed after completion of learning, that is, during normal operation, newly acquired input data D3 (for example, data corresponding to external light intensity) is input to the image processing unit 800, and the input data D3 Then, calculation using a neural network is performed using the weighting coefficient, and parameters suitable for image processing are acquired. The calculation is performed using the circuits shown in FIGS. 6 and 7A in the AIC 107 as described with reference to FIGS.
ここで、学習終了後にニューラルネットワークによる計算で得られたパラメータは、利用者の好みの色彩、輝度などに対応したデータに近い値となることが期待される。すなわち、当該パラメータに基づいて画像処理を行うことで、利用者の嗜好に合わせた表示画像を生成することができる。 Here, it is expected that the parameters obtained by the calculation by the neural network after completion of the learning will be values close to data corresponding to the user's favorite color, brightness, and the like. That is, by performing image processing based on the parameters, it is possible to generate a display image that matches the user's preference.
図２１（Ａ）の構成を採用することで、画像処理部８００内に、学習機能を実現する回路をハードウェアＨＡＲＤとして設けることが可能である。その結果、学習を行う手段（ハードウェア又はソフトウェア）を別途設ける必要がなくなるため、ニューラルネットワークの簡略化又は高速化を実現することができる。 By adopting the configuration in FIG. 21A, a circuit that realizes a learning function can be provided as hardware HARD in the image processing unit 800. As a result, it is not necessary to separately provide learning means (hardware or software), so that the neural network can be simplified or speeded up.
図２１（Ｂ）は、学習機能をホスト８０１に搭載した例である。この例では、ホスト８０１内に、学習機能をソフトウェアＳＯＦＴとして搭載する。そして、画像処理部８００内に、画像処理に適したパラメータを取得する機能を、ハードウェアＨＡＲＤとして搭載する。なお、ホスト８０１の構成は、図２のホスト１８５の構成を適宜採用することができる。 FIG. 21B shows an example in which a learning function is installed in the host 801. In this example, a learning function is installed in the host 801 as software SOFT. A function for acquiring parameters suitable for image processing is installed in the image processing unit 800 as hardware HARD. Note that the configuration of the host 801 can employ the configuration of the host 185 in FIG. 2 as appropriate.
＜図２１（Ｂ）におけるホストの構成＞
ホスト８０１内には、ソフトウェアＳＯＦＴとして学習を行うためのプログラム（学習プログラムともいう）が格納されている。 <Host Configuration in FIG. 21B>
A program for learning as software SOFT (also referred to as a learning program) is stored in the host 801.
学習を行うためのプログラムは、図３乃至図５を用いて説明したニューラルネットワークによる計算を実現できるように構成されていることが好ましい。具体的には、ニューロンにおける入出力を行うための演算処理と、重み係数の変更を行うための演算処理とが、プログラムされていればよい。 It is preferable that the program for performing the learning is configured so that the calculation by the neural network described with reference to FIGS. 3 to 5 can be realized. Specifically, arithmetic processing for performing input / output in the neuron and arithmetic processing for changing the weighting coefficient need only be programmed.
ここで、ニューロンにおける入出力を行うための演算処理は、ＡＩＣ１０７における、図６、図７（Ａ）に示す回路及びそれに関する複数の式の演算を行うことで実現できる。そのため、プログラムとしては、これらの回路及びそれに関する複数の式の演算処理を実現できるように構成されていればよい。 Here, the arithmetic processing for performing input / output in the neuron can be realized by performing arithmetic operations of the circuit shown in FIG. 6 and FIG. Therefore, the program only needs to be configured to realize arithmetic processing of these circuits and a plurality of expressions related thereto.
また、重み係数の変更を行うための演算処理は、ＡＩＣ１０７における、図７（Ｂ）、（Ｃ）及びそれに関する複数の式の演算を行うことで実現できる。そのため、プログラムとしては、これらの回路及びそれに関する複数の式の演算処理を実現できるように構成されていればよい。 In addition, the arithmetic processing for changing the weighting factor can be realized by performing arithmetic operations of FIGS. 7B and 7C and a plurality of expressions related thereto in the AIC 107. Therefore, the program only needs to be configured to realize arithmetic processing of these circuits and a plurality of expressions related thereto.
＜図２１（Ｂ）における画像処理部の構成＞
一方、画像処理部８００内には、ハードウェアＨＡＲＤとして、画像処理に適したパラメータを取得するための回路が設けられている。具体的には、ＡＩＣ１０７（図４乃至図７）が設けられている。画像処理部８００内に学習機能を搭載しない点が、図２１（Ａ）の構成と異なる。 <Configuration of Image Processing Unit in FIG. 21B>
On the other hand, the image processing unit 800 is provided with a circuit for acquiring parameters suitable for image processing as hardware HARD. Specifically, an AIC 107 (FIGS. 4 to 7) is provided. The point that the learning function is not installed in the image processing unit 800 is different from the configuration of FIG.
なお、ハードウェアＨＡＲＤとソフトウェアＳＯＦＴとにおいて、ニューラルネットワークの計算結果が対応していることが好ましい。具体的には、両者において、同一の入力に対して同一の出力が得られるように構成されているか、あるいは、要求される誤差の範囲内の出力が得られるように構成されていればよい。より具体的には、ハードウェアＨＡＲＤに与える入力（電圧）がソフトウェアＳＯＦＴに与える入力（デジタルデータ）に対応し、ハードウェアＨＡＲＤの出力（電圧もしくは電流）がソフトウェアＳＯＦＴの出力（デジタルデータ）に対応していればよい。 Note that it is preferable that the calculation results of the neural network correspond to the hardware HARD and the software SOFT. More specifically, in both cases, the same output may be obtained with respect to the same input, or the output within the required error range may be obtained. More specifically, the input (voltage) applied to the hardware HARD corresponds to the input (digital data) applied to the software SOFT, and the output (voltage or current) of the hardware HARD corresponds to the output (digital data) of the software SOFT. If you do.
＜図２１（Ｂ）における学習の方法＞
学習を行う際は、図２１（Ａ）の構成とは異なり、ホスト８０１に、学習データＤ１（例えば、外光強度などに対応するデータ）及び教師データＤ２（例えば、利用者の選んだ色彩、輝度などに対応するデータ）が入力される。 <Learning Method in FIG. 21B>
When performing learning, unlike the configuration of FIG. 21A, the host 801 stores learning data D1 (for example, data corresponding to external light intensity) and teacher data D2 (for example, a color selected by the user, Data corresponding to luminance and the like) is input.
具体的な学習の方法は、ソフトウェアＳＯＦＴにおける学習プログラムによって、図３乃至５で示したニューラルネットワークによる計算（積和演算）を行い、重み係数の変更を行う。重み係数の変更方法には、実施の形態２で説明した方法が利用できる。学習終了時、得られた重み係数は、ホスト８０１から出力され、画像処理部８００におけるＡＩＣ１０７のアナログメモリＡＭに保存される。アナログメモリＡＭの構成は、図６（Ｃ）のアナログメモリＡＭの構成を適宜採用することができる。学習をソフトウェアＳＯＦＴによって行う点が、図２１（Ａ）の構成と異なる。 As a specific learning method, calculation (product-sum operation) using the neural network shown in FIGS. 3 to 5 is performed by a learning program in software SOFT, and the weighting coefficient is changed. The method described in the second embodiment can be used as the weighting coefficient changing method. At the end of learning, the obtained weighting coefficient is output from the host 801 and stored in the analog memory AM of the AIC 107 in the image processing unit 800. As the configuration of the analog memory AM, the configuration of the analog memory AM in FIG. 6C can be adopted as appropriate. The point that learning is performed by software SOFT is different from the configuration of FIG.
＜図２１（Ｂ）おける画像処理の方法＞
学習終了後の画像処理（通常動作）は、図２１（Ａ）の構成と同様に行うことができる。すなわち、画像処理部８００内のハードウェアＨＡＲＤ（ＡＩＣ１０７における、図６、図７（Ａ）に示す回路）を用いて、新たに取得した入力データＤ３と重み係数によるニューラルネットワーク計算を行い、画像処理に適したパラメータを取得する。このように、ソフトウェアＳＯＦＴではなく、画像処理部８００においてハードウェアＨＡＲＤを用いて行うため、効率良く演算が行える。 <Image Processing Method in FIG. 21B>
Image processing (normal operation) after completion of learning can be performed in the same manner as the configuration of FIG. That is, using the hardware HARD in the image processing unit 800 (the circuit shown in FIG. 6 and FIG. 7A in the AIC 107), the neural network calculation is performed using the newly acquired input data D3 and the weighting coefficient. Get suitable parameters for. As described above, since the hardware HARD is used in the image processing unit 800 instead of the software SOFT, the calculation can be performed efficiently.
このように、図２１（Ｂ）の構成では、通常動作時に必要のない学習機能を、ハードウェアＨＡＲＤから切り離し、プログラムとしてソフトウェアＳＯＦＴに搭載することで、通常動作時に効率的な演算が実行できる。 In this way, in the configuration of FIG. 21B, a learning function that is not necessary during normal operation is separated from the hardware HARD and installed in the software SOFT as a program, so that efficient computation can be executed during normal operation.
図２１（Ｂ）の構成を採用することで、画像処理を行う機能をハードウェアＨＡＲＤに搭載し、学習機能をソフトウェアＳＯＦＴに搭載するというように、両者において搭載する機能を切り分けることができる。その結果、ニューラルネットワークの効率化、又は、画像処理部８００の低消費電力化を実現することができる。 By adopting the configuration shown in FIG. 21B, it is possible to separate the functions to be mounted in both, such as mounting a function for performing image processing in the hardware HARD and mounting a learning function in the software SOFT. As a result, the efficiency of the neural network or the reduction in power consumption of the image processing unit 800 can be realized.
なお、学習機能は、ホスト８０１に搭載しなくてもよい。例えば、学習機能を、図２に示す他の回路に搭載しても良く、また、図２に示さない回路に搭載してもよい。また、学習機能は、ハードウェアに搭載しても良く、ソフトウェアとハードウェアの両方に搭載しても良い。 The learning function may not be installed in the host 801. For example, the learning function may be installed in another circuit shown in FIG. 2 or may be installed in a circuit not shown in FIG. In addition, the learning function may be installed in hardware or in both software and hardware.
また、本実施の形態の構成は、画像処理に関するものに限定されず、幅広い分野に応用することが可能である。 The configuration of the present embodiment is not limited to that relating to image processing, and can be applied to a wide range of fields.
例えば、空調における温度や風量の調整、照明における明るさや色合いの調整、椅子や机等の家具における高さや角度の調整、など様々な装置の調整を行う際に、本発明の一態様に係る学習機能を適用すること、又は、本実施の形態の構成を適用することができる。 For example, when adjusting various devices such as adjustment of temperature and air volume in air conditioning, adjustment of brightness and hue in lighting, adjustment of height and angle in furniture such as chairs and desks, learning according to one embodiment of the present invention A function can be applied, or the configuration of this embodiment can be applied.
本実施の形態は、他の実施の形態と適宜組み合わせて実施することが可能である。 This embodiment can be implemented in appropriate combination with any of the other embodiments.
（実施の形態１１）
図２２乃至図２６、図２８では、電子機器の応用例として、本発明の一態様に係る表示装置を自動車に搭載した例について図示している。 (Embodiment 11)
22 to 26 and FIG. 28 illustrate an example in which a display device according to one embodiment of the present invention is mounted on an automobile as an application example of the electronic device.
図２２には、車体１０００を上方からみた図を示す。車体１０００は、光センサを有する。光センサは、光の波長、光の強度、波長毎の光強度等の情報を取得する機能を有し、該情報は、学習データとして本発明の一態様に係る演算回路へと入力される。光センサとしては、例えばフォトトランジスタ、フォトセンサ、イメージセンサ等を用いることができる。例えば、図１８に示す光センサを適用することができる。図１８に示す光センサは、光の入射角度、照度等を検出することができる。 FIG. 22 shows a view of the vehicle body 1000 from above. The vehicle body 1000 has an optical sensor. The optical sensor has a function of acquiring information such as light wavelength, light intensity, and light intensity for each wavelength, and the information is input as learning data to the arithmetic circuit according to one embodiment of the present invention. As the optical sensor, for example, a phototransistor, a photosensor, an image sensor, or the like can be used. For example, an optical sensor shown in FIG. 18 can be applied. The optical sensor shown in FIG. 18 can detect the incident angle of light, illuminance, and the like.
例えば図２２（Ａ）に示すように、光センサ１００４Ｌおよび光センサ１００４Ｒをフロントバンパーに設けることができる。また、例えば図２２（Ｂ）に示すようにサイドミラーに設けることができる。また、いわゆるミラーレスカーなどのサイドミラーを設けない車体の場合、サイドミラー用のカメラが設けられている箇所に設けることもできる。また、例えば図２２（Ｃ）に示すようにルーフに設けることができる。 For example, as shown in FIG. 22A, the optical sensor 1004L and the optical sensor 1004R can be provided on the front bumper. Further, for example, as shown in FIG. Further, in the case of a vehicle body not provided with a side mirror such as a so-called mirrorless car, it can be provided at a location where a camera for the side mirror is provided. Further, for example, as shown in FIG.
光センサ１００４は、例えば外光を検出する機能を有するので、車体１０００の外側に設けることが好ましいが、光センサ１００４を車体１０００の内側に設けてもよい。光センサ１００４を車体１０００の内側に設ける場合、光センサ１００４を窓部１００２等に設けることができる。なお、光センサ１００４を窓部１００２に設ける場合、光センサの１００４の検出精度が低下しないように、光センサ１００４の正面およびその近傍の領域の窓部１００２は十分な光の透過率を有することが好ましい。 The optical sensor 1004 has a function of detecting external light, for example, and thus is preferably provided outside the vehicle body 1000, but the optical sensor 1004 may be provided inside the vehicle body 1000. When the optical sensor 1004 is provided inside the vehicle body 1000, the optical sensor 1004 can be provided in the window portion 1002 or the like. Note that when the optical sensor 1004 is provided in the window portion 1002, the window portion 1002 in the front surface of the optical sensor 1004 and in the vicinity thereof has sufficient light transmittance so that the detection accuracy of the optical sensor 1004 does not deteriorate. Is preferred.
また、例えば、光センサ１００４をフロントバンパーに設け、他の光センサを窓部１００２に設けることができる。また、例えば光センサ１００４をルーフに設け、他の光センサをフロントバンパーに設けることができる。 Further, for example, the optical sensor 1004 can be provided on the front bumper, and another optical sensor can be provided on the window portion 1002. Further, for example, the optical sensor 1004 can be provided on the roof, and another optical sensor can be provided on the front bumper.
光センサは複数設けることが好ましい。光センサを複数設けることにより、光源の位置や入射方向等を正確に検出することができるなど、検出精度を向上させることができる。また、光センサを複数設ける場合、対称的な場所に設けることにより、光センサが検出できる領域を大きくすることができ、安全性をより向上させることができる。 It is preferable to provide a plurality of optical sensors. By providing a plurality of optical sensors, it is possible to improve the detection accuracy, such as being able to accurately detect the position and incident direction of the light source. In addition, when a plurality of photosensors are provided, by providing the photosensors at symmetrical locations, the area that can be detected by the photosensors can be increased, and safety can be further improved.
なお、光センサの配置箇所、配置個数、又は形状は、図２２に限定されない。外光環境を精度よく測定するためには光センサを車体１０００の二以上の面に配置することが好ましく、配置される面が多いほどより多くの外光環境の情報を取得することができる。また、車体１０００のうち、側面等の、面積が大きい面においては一つの面に複数の光センサを配置することが好ましい。一方、光センサの配置個数を少なく抑えることで、センサ用の電源配線や信号配線等の部品を少なくすることができ、車体を軽量化やコスト削減をすることが可能となる。 In addition, the arrangement | positioning location, arrangement | positioning number, or shape of an optical sensor is not limited to FIG. In order to accurately measure the ambient light environment, it is preferable to arrange the optical sensors on two or more surfaces of the vehicle body 1000, and more information on the ambient light environment can be acquired as more surfaces are disposed. In addition, it is preferable to arrange a plurality of optical sensors on one surface of a surface of the vehicle body 1000 having a large area such as a side surface. On the other hand, by suppressing the number of optical sensors arranged to a small number, it is possible to reduce the number of parts such as power supply wiring and signal wiring for the sensor, and it is possible to reduce the weight and cost of the vehicle body.
また、光センサ１００４として、互いに異なる波長の光強度を検出可能な複数種類の光センサを設けることが好ましい。自動車を太陽光の存在下で使用する場合、光源である太陽は、朝方、昼間、夕方で各々特有の異なる光のスペクトルを有する。また、自動車を屋内やトンネル内等の太陽光の存在しない屋外で使用する場合、光源となる蛍街灯、車のヘッドライト等の呈する光は、太陽光のスペクトルとは異なる波長を有する。そこで、光センサ１００４として、互いに異なる波長の光を検出可能な複数種類の光センサを設けることで、より詳細に光源の情報を取得することができる。得られた光源の情報を学習データとして上述したニューラルネットワークを用いて環境の経時変化を含めて学習することにより、突発的な変化の影響を軽減し、利用者が視認しやすい表示を行うことができる。 In addition, as the optical sensor 1004, it is preferable to provide a plurality of types of optical sensors capable of detecting light intensities having different wavelengths. When an automobile is used in the presence of sunlight, the sun, which is a light source, has a different spectrum of light that is unique in the morning, daytime, and evening. In addition, when an automobile is used indoors or outdoors, such as in a tunnel, where sunlight does not exist, light exhibited by a fluorescent lamp or a car headlight as a light source has a wavelength different from the spectrum of sunlight. Therefore, by providing a plurality of types of optical sensors capable of detecting light of different wavelengths as the optical sensor 1004, it is possible to acquire light source information in more detail. By learning the information of the obtained light source as learning data using the above-mentioned neural network, including changes over time in the environment, it is possible to reduce the influence of sudden changes and to make the display easy for the user to visually recognize. it can.
本実施の形態の車体１０００は、車体１０００の二以上の面に配置された光センサを有することで、車体の外光環境を精度よく測定することができる。車体の使用者は、使用時に表示面のみならず、表示部の周囲も同時に視界に入る。そのため、車体の周囲の外光環境を精度よく測定することにより、使用者の視認性の向上および表示品質の向上を実現することができる。また、車体の周囲の外光環境を精度よく測定することにより、使用者にとって最適な表示を行うことができるため、不必要な高い輝度の表示等を行うことがなくなり、消費電力の低減を実現できる。 The vehicle body 1000 according to the present embodiment includes the optical sensors arranged on two or more surfaces of the vehicle body 1000, so that the external light environment of the vehicle body can be accurately measured. The user of the vehicle body enters the field of view at the same time not only on the display surface but also around the display unit during use. Therefore, it is possible to improve the visibility of the user and improve the display quality by accurately measuring the ambient light environment around the vehicle body. In addition, by accurately measuring the ambient light environment around the vehicle body, it is possible to display optimally for the user, thus eliminating unnecessary high brightness display and reducing power consumption. it can.
このようにセンサ等によって得られた情報等を学習データとして、補正された表示を行う表示部について説明する。 A display unit that performs corrected display using information obtained by a sensor or the like as learning data will be described.
例えば図２３は、自動車の室内におけるフロントガラス周辺を表す図である。図２３では、ダッシュボードに取り付けられた表示部１０５１Ａ、表示部１０５１Ｂ、表示部１０５１Ｃの他、ピラーに取り付けられた表示部１０５１Ｄを図示している。 For example, FIG. 23 is a diagram illustrating the periphery of a windshield in a car interior. FIG. 23 illustrates a display unit 1051D attached to a pillar in addition to the display unit 1051A, the display unit 1051B, and the display unit 1051C attached to the dashboard.
表示部１０５１Ａ乃至表示部１０５１Ｃは、ナビゲーション情報、スピードメーターやタコメーター、走行距離、給油量、ギア状態、エアコンの設定など、その他様々な情報を含む表示画像を提供することができる。これらの表示画像は、上述したようにセンサ等によって得られた情報に基づき補正されたものであるので、外光等の周辺環境の影響によらず、自動車のデザイン性を高める自由な配置が可能であり、かつ、利用者が視認しやすい表示画像となっている。また、表示部に表示される表示項目やレイアウトなどは、使用者の好みに合わせて適宜変更することができ、デザイン性を高めることが可能である。表示部１０５１Ａ乃至表示部１０５１Ｃは、照明装置として用いることも可能である。 The display units 1051A to 1051C can provide display images including various other information such as navigation information, speedometers and tachometers, travel distances, oil supply amounts, gear states, and air conditioner settings. Since these display images are corrected based on the information obtained by the sensors as described above, it is possible to freely arrange the vehicle to improve its design, regardless of the influence of the surrounding environment such as external light. The display image is easy for the user to visually recognize. In addition, the display items, layout, and the like displayed on the display unit can be appropriately changed according to the user's preference, and the design can be improved. The display portions 1051A to 1051C can also be used as lighting devices.
表示部１０５１Ｄには、車体に設けられたカメラ等からの映像を映し出すことによって、ピラーで遮られた視界（死角）を補完することができる。すなわち、自動車の外側に設けられたカメラ等の撮像画像を表示することによって、死角を補い、安全性を高めることができる。また、見えない部分を補完する映像を表示することによって、より自然に違和感なく安全確認を行うことができる。表示部１０５１Ｄは、照明装置として用いることも可能である。 By displaying an image from a camera or the like provided on the vehicle body on the display unit 1051D, the field of view (dead angle) blocked by the pillar can be complemented. That is, by displaying a captured image of a camera or the like provided on the outside of the automobile, the blind spot can be compensated and safety can be improved. In addition, by displaying a video that complements the invisible part, it is possible to perform safety confirmation more naturally and without a sense of incongruity. The display portion 1051D can also be used as a lighting device.
また図２４は、運転席と助手席にベンチシートを採用した自動車の室内を示している。図２４では、ドア部に設けられた表示部１０５２Ａ、ハンドルに設けられた表示部１０５２Ｂ、ベンチシートの座面の中央部に設けられた表示部１０５２Ｃを図示している。 FIG. 24 shows the interior of an automobile in which bench seats are used for the driver seat and the passenger seat. FIG. 24 illustrates a display unit 1052A provided in the door unit, a display unit 1052B provided in the handle, and a display unit 1052C provided in the center of the seat surface of the bench seat.
表示部１０５２Ａに、例えば、車体に設けられたカメラの撮像画像を表示することによって、ドアで遮られた視界を補完することができる。 For example, by displaying a captured image of a camera provided on the vehicle body on the display unit 1052A, the field of view blocked by the door can be complemented.
表示部１０５２Ｂおよび表示部１０５２Ｃは、ナビゲーション情報、スピードメーターやタコメーター等のメーター、走行距離、給油量、ギア状態、エアコンの設定など、その他様々な情報を含む表示画像を提供することができる。これらの表示画像は、上述したようにセンサ等によって得られた情報に基づき補正されたものであるので、外光等の周辺環境の影響によらず、利用者が視認しやすい表示画像となっている。また、表示部に表示される表示項目やレイアウトなどは、使用者の好みに合わせて適宜変更することができる。表示部１０５２Ｂおよび表示部１０５２Ｃは、照明装置として用いることも可能である。 The display unit 1052B and the display unit 1052C can provide a display image including various information such as navigation information, a meter such as a speedometer and a tachometer, a travel distance, a fuel supply amount, a gear state, and an air conditioner setting. Since these display images are corrected based on the information obtained by the sensor or the like as described above, the display images are easily visible to the user regardless of the influence of the surrounding environment such as external light. Yes. In addition, display items, layouts, and the like displayed on the display unit can be changed as appropriate according to the user's preference. The display portion 1052B and the display portion 1052C can be used as a lighting device.
図２５、図２６に示すように自動車の室内のあらゆる場所に表示部を配置し、表示部を照明装置として用いる場合、車外への緊急信号を伝える手段とすることも有効である。例えば、使用者（運転者）の健康状態をセンサ等で検出した場合、表示部の輝度を最大として点滅させることも可能である。 As shown in FIG. 25 and FIG. 26, when a display unit is arranged everywhere in a vehicle interior and the display unit is used as a lighting device, it is also effective to use a means for transmitting an emergency signal to the outside of the vehicle. For example, when the health state of the user (driver) is detected by a sensor or the like, it is possible to blink the display unit with the maximum brightness.
上述した表示部は、湾曲した面に取り付けることが可能である。例えば、上述した表示部１０５１Ａ乃至表示部１０５１Ｃおよび表示部１０５２Ａ乃至表示部１０５２Ｃのように、自動車の室内のあらゆる場所に取り付けることが可能である。つまり図２５（Ａ）に示すダッシュボード１０１２やピラー１０１５のように、湾曲した面であっても取り付けることが可能である。そのため、図２５（Ｂ）に図示するように窓部１０６１以外の車体の内部の表面に表示部１０６０を設ける構成とすることも可能である。当該構成とすることで、窓部１０６１以外の自動車の外側の画像を表示できるため、死角を補い、安全性を高めることができる。 The display unit described above can be attached to a curved surface. For example, the display portion 1051A to the display portion 1051C and the display portion 1052A to the display portion 1052C can be attached to any place in the interior of a car. That is, even a curved surface such as a dashboard 1012 and a pillar 1015 illustrated in FIG. 25A can be attached. Therefore, as shown in FIG. 25B, a display portion 1060 may be provided on the surface inside the vehicle body other than the window portion 1061. With this configuration, an image outside the vehicle other than the window portion 1061 can be displayed, so that the blind spot can be compensated and safety can be improved.
図２５（Ｂ）のように、窓部１０６１以外の車体の内部の表面に表示部を設ける構成とする場合、表示部の位置に応じて、図２６（Ａ）に図示するように車体の外側に複数のカメラ１０７１Ｌ、カメラ１０７２Ｌ、カメラ１０７３Ｌ、カメラ１０７１Ｒ、カメラ１０７２Ｒ、カメラ１０７３Ｒを設けることが好ましい。なおカメラは２以上並べて取り付けることで、対象物との距離に関する情報も得られるため好ましい。また、これらのカメラを設けることにより、上述した光センサの役割を兼ねることができ、部品数を削減することが可能となる。 As shown in FIG. 25B, when the display portion is provided on the surface inside the vehicle body other than the window portion 1061, the outside of the vehicle body is shown in FIG. 26A depending on the position of the display portion. A plurality of cameras 1071L, cameras 1072L, cameras 1073L, cameras 1071R, cameras 1072R, and cameras 1073R are preferably provided. Note that it is preferable to mount two or more cameras side by side because information on the distance to the object can be obtained. In addition, by providing these cameras, it can also serve as the above-described optical sensor, and the number of parts can be reduced.
図２５（Ｂ）および図２６（Ａ）の構成とすることで、図２６（Ｂ）に図示するように窓部１０６１以外の自動車の外側の画像を表示できる。そのため、ユーザの死角を補い、安全性を高められた移動体とすることができる。 With the structure shown in FIGS. 25B and 26A, an image of the outside of the vehicle other than the window portion 1061 can be displayed as shown in FIG. Therefore, it is possible to make a moving body that compensates the user's blind spot and has improved safety.
また窓部１０６１以外の車体の内部の表面に表示部１０６０を設ける構成では、色々な場所に表示部を配置することで、メーターなどの表示位置を変更可能とすることができる。この場合、表示位置を自由に切り替えることができるため、外光等の周辺の環境に応じて、利用者が見えやすいように表示位置を変更することができる。また、利用者の好みや体格等によって最適な位置に表示位置を変更することができる。 In the configuration in which the display portion 1060 is provided on the surface inside the vehicle body other than the window portion 1061, the display position of the meter or the like can be changed by disposing the display portion in various places. In this case, since the display position can be freely switched, the display position can be changed so that the user can easily see according to the surrounding environment such as outside light. In addition, the display position can be changed to an optimal position according to the user's preference and physique.
また、表示装置に配置された光センサと、車体に配置された光センサとの両方からの情報に応じて学習することで、より効果的に画像補正を行うことができる。その具体例を説明する。 In addition, it is possible to perform image correction more effectively by learning according to information from both the optical sensor disposed in the display device and the optical sensor disposed in the vehicle body. A specific example will be described.
表示装置に配置する光センサは、配置できる数に制限がある場合がある。そのため、表示部付近の外光の強度を効果的に検出できる反面、外光の入射方向を識別するのが困難な可能性がある。例えば、他の車のライトや街灯など突発的に生じる光についても、入射方向が識別できない場合、表示設定の変更の要否を安定して判定できない可能性がある。そして、突発的に生じる光に対して過度に表示設定の変更を行った場合、かえって利用者が視認しにくくなるおそれがあることは、上述のとおりである。 There may be a limit to the number of photosensors arranged in the display device. Therefore, while the intensity of external light in the vicinity of the display unit can be detected effectively, it may be difficult to identify the incident direction of external light. For example, for suddenly generated light such as lights from other cars and street lights, if the incident direction cannot be identified, it may not be possible to stably determine whether or not the display setting needs to be changed. As described above, when the display setting is excessively changed with respect to suddenly generated light, the user may not be able to visually recognize the display setting.
そこで、車体に配置された光センサを用いることでこの問題を解決することができる。 Therefore, this problem can be solved by using an optical sensor arranged on the vehicle body.
例えば、車体の左右に配置された光センサを用い、左側を走る他の車のヘッドライトの光を検出する例を考えると、左側の光センサの方が右側の光センサより強い光を検出することになる。また、街灯の光が右側から照射される例を考えると、右側の光センサの方が左側の光センサより強い光を検出することになる。 For example, consider the example of detecting the light from the headlights of other cars running on the left side using the optical sensors arranged on the left and right of the vehicle body. The left optical sensor detects stronger light than the right optical sensor. It will be. Considering an example in which streetlight light is irradiated from the right side, the right photosensor detects light that is stronger than the left photosensor.
このように、車体に配置された光センサは、表示装置に配置された光センサより、他の車のヘッドライトや街灯などの突発的に生じる光を精度よく検出することができる。 Thus, the light sensor arranged in the vehicle body can detect suddenly generated light such as headlights and street lamps of other vehicles more accurately than the light sensor arranged in the display device.
そして、表示装置及び車体に配置されたセンサからの情報を基づいて学習する際、車体に配置されたセンサが突発的に生じた光を検出した場合には画像補正を行わないというように学習させ、その結果を重み係数として保存することができる。 When learning based on information from the display device and the sensor disposed on the vehicle body, if the sensor disposed on the vehicle body detects suddenly generated light, the image is not corrected. The result can be stored as a weighting factor.
このように、表示装置に配置された光センサと、車体に配置された光センサとの両方からの情報に応じて学習を行うことで、表示装置に配置された光センサのみでは困難である高度な学習を行うことができる。 In this way, by performing learning according to information from both the optical sensor arranged in the display device and the optical sensor arranged in the vehicle body, it is difficult to achieve only the optical sensor arranged in the display device. Can learn.
また、車体に配置された光センサと、表示装置に配置された光センサとにおいて異なる波長の光検出できるように複数種類の光センサを設けてもよい。例えば、表示装置に配置された光センサで太陽光などの外光を検出し、車体に配置された光センサで突発的に生じる光を検出することも可能である。複数種類のセンサを用いることで、車体に配置された光センサからの情報を相補的に利用して学習することができる。 Further, a plurality of types of optical sensors may be provided so that light of different wavelengths can be detected between the optical sensor arranged on the vehicle body and the optical sensor arranged on the display device. For example, it is possible to detect external light such as sunlight with a light sensor arranged in the display device, and to detect light suddenly generated with a light sensor arranged in the vehicle body. By using a plurality of types of sensors, it is possible to learn by using information from optical sensors arranged on the vehicle body in a complementary manner.
また、上記では、光センサについて説明したが、他のセンサ（力、変位、位置、速度、加速度、角速度、回転数、距離、磁気、温度、化学物質、音声、時間、硬度、電場、電流、電圧、電力、放射線、流量、湿度、傾度、振動、におい又は赤外線などを測定する機能を含むもの）を有する構成であってもよい。例えば、外光は時間によって、波長や強度、入射角度などが大きく変化するので、光センサと時間センサとを組み合わせることにより、使用者にとってより適した表示を行うことができる。 In the above description, the optical sensor has been described. However, other sensors (force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, A configuration having a function of measuring voltage, power, radiation, flow rate, humidity, gradient, vibration, smell, infrared rays, or the like may be used. For example, since the wavelength, intensity, incident angle, and the like of outside light greatly change depending on time, display that is more suitable for the user can be performed by combining the light sensor and the time sensor.
また、専用のセンサを設置するだけでなく、車体における他のセンサ、カメラ、レーダ等を用いて、外光等の周辺環境を検出することも可能である。例えば、前方監視カメラ・レーダ、後方監視カメラ・レーダ、側方監視カメラ・レーダ、ドライバー監視カメラ、車両位置センサ、前方車間距離・障害物センサ、後方車間距離・障害物センサ、側方車間距離・障害物センサ、ドライブレコーダー等を用いることができる。特に、カメラを用いることでより多くの情報を得ることができ、好ましい。また、センサの機能をカメラが担うなど、機能を兼ねることにより、部品数を削減することができ、コスト削減が可能である。また、車体の軽量化を実現することができ、移動または輸送にかかるエネルギーやコストを削減することができる。例えば、カメラモニタリングシステムを採用したいわゆるミラーレスカーの場合、カメラを光センサとして用い、表示部に本発明の一態様に係る表示装置を用いることは、部品の増加を最小限に抑えることができ、好適である。 In addition to installing a dedicated sensor, it is also possible to detect the surrounding environment such as external light using other sensors in the vehicle body, a camera, a radar, and the like. For example, front surveillance camera / radar, rear surveillance camera / radar, side surveillance camera / radar, driver surveillance camera, vehicle position sensor, front inter-vehicle distance / obstacle sensor, rear inter-vehicle distance / obstacle sensor, side inter-vehicle distance / An obstacle sensor, a drive recorder, etc. can be used. In particular, it is preferable to use a camera because more information can be obtained. In addition, since the camera functions as a sensor, the number of parts can be reduced and the cost can be reduced. In addition, the weight of the vehicle body can be reduced, and the energy and cost for movement or transportation can be reduced. For example, in the case of a so-called mirrorless car adopting a camera monitoring system, using a camera as an optical sensor and using a display device according to one embodiment of the present invention for a display portion can minimize an increase in parts. Is preferable.
また、センサ、カメラ、レーダ、表示装置等の車体内の通信環境は、種々の通信規格を適用することができる。例えば、Ｅｔｈｅｒｎａｔ、ＣＡＮ、ＬＩＮ、ＭＯＳＴ、ＦｌｅｘＲａｙ等が挙げられる。特に、Ｅｔｈｅｒｎａｔは、高速通信を実現することができるため好適である。図２８は、車体における通信環境を示すブロック図である。図２８に示すように、カメラ１０３３Ｒ、カメラ１０３３Ｌ、光センサ１０３４、光センサ１０３５から得られた情報を演算回路１０３２へ出力し、演算回路１０３２から得られた情報を表示部１０３１に表示することが可能である。なお、センサ、回路、表示部等の配置箇所、配置個数、又は形状は、図２８に示す車体に限定されない。 Various communication standards can be applied to the communication environment in the vehicle body such as a sensor, a camera, a radar, and a display device. For example, Ethernet, CAN, LIN, MOST, FlexRay and the like can be mentioned. In particular, Ethernet is preferable because high-speed communication can be realized. FIG. 28 is a block diagram showing a communication environment in the vehicle body. As shown in FIG. 28, information obtained from the camera 1033R, the camera 1033L, the optical sensor 1034, and the optical sensor 1035 can be output to the arithmetic circuit 1032 and the information obtained from the arithmetic circuit 1032 can be displayed on the display portion 1031. Is possible. Note that the location, number, or shape of sensors, circuits, display units, and the like are not limited to the vehicle body shown in FIG.
また、車体における表示部の位置も種々の位置に設けることができる。車外であってもよいし、車内であってもよい。車外に設ける場合、車内に設ける場合よりも外光等の周辺環境の影響が大きいため、上述した表示装置を適用することにより得られる効果はより大きくなる。また、車内に設ける場合、車体は曲線が多いため、車体に沿った表示装置を設けることが好ましく、可撓性を有する表示装置を用いることが好ましい。 Further, the position of the display unit on the vehicle body can be provided at various positions. It may be outside the vehicle or inside the vehicle. When provided outside the vehicle, the effect of the surrounding environment such as outside light is greater than when provided outside the vehicle, so that the effect obtained by applying the above-described display device is greater. Further, since the vehicle body has many curves when provided in the vehicle, it is preferable to provide a display device along the vehicle body, and it is preferable to use a flexible display device.
なお、表示部は、反射型表示素子と発光型表素子とを用いたハイブリッド（複合型）表示装置に限られず、種々の表示装置を適用することが可能である。例えば、液晶素子、シャッター方式のＭＥＭＳ（Ｍｉｃｒｏ　Ｅｌｅｃｔｒｏ　Ｍｅｃｈａｎｉｃａｌ　Ｓｙｓｔｅｍ）素子、光干渉式のＭＥＭＳ素子、マイクロカプセル方式、電気泳動方式、エレクトロウェッティング方式、電子粉流体（登録商標）方式等を適用した表示素子、ＯＬＥＤ（Ｏｒｇａｎｉｃ　Ｌｉｇｈｔ　Ｅｍｉｔｔｉｎｇ　Ｄｉｏｄｅ）、ＬＥＤ（Ｌｉｇｈｔ　Ｅｍｉｔｔｉｎｇ　Ｄｉｏｄｅ）、ＱＬＥＤ（Ｑｕａｎｔｕｍ−ｄｏｔ　Ｌｉｇｈｔ　Ｅｍｉｔｔｉｎｇ　Ｄｉｏｄｅ）等を適用することができる。中でも、反射型表示素子と発光型表素子とを用いたハイブリッド（複合型）表示装置は、発光素子を光らせて画像を映す機能と、環境の光を反射して画像を映す機能とを有するため、周辺環境に合わせて表示性能を大きく変化させることができる。よって、利用者の視認性を好ましい状態に調整しやすく、移動体に好適に用いることができる。 Note that the display unit is not limited to a hybrid (composite) display device using a reflective display element and a light-emitting surface element, and various display devices can be applied. For example, a display using a liquid crystal element, a shutter-type MEMS (Micro Electro Mechanical System) element, an optical interference-type MEMS element, a microcapsule method, an electrophoresis method, an electrowetting method, an electropowder fluid (registered trademark) method, etc. An element, OLED (Organic Light Emitting Diode), LED (Light Emitting Diode), QLED (Quantum-Dot Emitting Diode), etc. are applicable. In particular, a hybrid display device using a reflective display element and a light-emitting surface element has a function of projecting an image by illuminating the light-emitting element and a function of projecting an image by reflecting environmental light. The display performance can be greatly changed according to the surrounding environment. Therefore, it is easy to adjust a user's visibility to a preferable state, and it can use suitably for a mobile body.
＜移動体の例＞
移動体の例について説明する。 <Example of moving body>
An example of the moving body will be described.
本発明の一態様に係る表示装置を適用可能な移動体は、表示部を設けることができる表面を有している移動体に用いることができる。これら移動体の具体例を図２７（Ａ）乃至（Ｄ）に示す。 The moving body to which the display device according to one embodiment of the present invention can be used can be used for a moving body having a surface on which a display portion can be provided. Specific examples of these moving objects are shown in FIGS.
図２７（Ａ）は自動車１３０１である。自動車１３０１は、窓部１３１１を有する。本発明の一態様に係る移動体は、窓部１３１１を有する自動車１３０１に用いることができる。自動車１３０１に設置された表示部は、センサ、カメラ等によって得られた周辺環境の情報に基づき補正された表示を行うことができるので、外光等の周辺環境の影響によらず、利用者が視認しやすい表示を実現することができる。また、カメラを用いる場合、自動車１３０１内の表示部に自動車１３０１の外の画像を表示させることができる。そのため、窓部１３１１以外での死角が低減された自動車１３０１とすることができる。 FIG. 27A illustrates an automobile 1301. The automobile 1301 has a window portion 1311. The moving body according to one embodiment of the present invention can be used for the automobile 1301 including the window portion 1311. The display unit installed in the automobile 1301 can perform a display corrected based on information on the surrounding environment obtained by a sensor, a camera, and the like. A display that is easy to visually recognize can be realized. In addition, when a camera is used, an image outside the automobile 1301 can be displayed on a display unit in the automobile 1301. Therefore, the automobile 1301 can have a blind spot other than the window portion 1311 reduced.
図２７（Ｂ）はバス１３０２である。バス１３０２は、窓部１３１１を有する。本発明の一態様に係る移動体は、窓部１３１１を有するバス１３０２に用いることができる。バス１３０２に設置された表示部は、センサ、カメラ等によって得られた周辺環境の情報に基づき補正された表示を行うことができるので、外光等の周辺環境の影響によらず、利用者が視認しやすい表示を実現することができる。また、カメラを用いる場合、バス１３０２内の表示部にバス１３０２の外の画像を表示させることができる。そのため、窓部１３１１以外での死角が低減されたバス１３０２とすることができる。 FIG. 27B shows a bus 1302. The bus 1302 has a window portion 1311. The moving body according to one embodiment of the present invention can be used for the bus 1302 including the window portion 1311. The display unit installed on the bus 1302 can perform a display corrected based on information on the surrounding environment obtained by a sensor, a camera, and the like. A display that is easy to visually recognize can be realized. In addition, when a camera is used, an image outside the bus 1302 can be displayed on a display portion in the bus 1302. Therefore, the bus 1302 in which blind spots other than the window portion 1311 are reduced can be obtained.
図２７（Ｃ）は電車１３０３である。電車１３０３は、窓部１３１１を有する。本発明の一態様に係る移動体は、窓部１３１１を有する電車１３０３に用いることができる。電車１３０３に設置された表示部は、センサ、カメラ等によって得られた周辺環境の情報に基づき補正された表示を行うことができるので、外光等の周辺環境の影響によらず、利用者が視認しやすい表示を実現することができる。また、カメラを用いる場合、電車１３０３内の表示部に電車１３０３の外の画像を表示させることができる。そのため、窓部１３１１以外での死角が低減された電車１３０３とすることができる。 FIG. 27C illustrates a train 1303. The train 1303 has a window portion 1311. The moving body according to one embodiment of the present invention can be used for the train 1303 including the window portion 1311. The display unit installed in the train 1303 can perform a display corrected based on information on the surrounding environment obtained by sensors, cameras, and the like. A display that is easy to visually recognize can be realized. In the case of using a camera, an image outside the train 1303 can be displayed on a display portion in the train 1303. Therefore, it can be set as the train 1303 by which the blind spot except the window part 1311 was reduced.
図２７（Ｄ）は飛行機１３０４である。飛行機１３０４は、窓部１３１１を有する。本発明の一態様に係る移動体は、窓部１３１１を有する飛行機１３０４に用いることができる。飛行機１３０４に設置された表示部は、センサ、カメラ等によって得られた周辺環境の情報に基づき補正された表示を行うことができるので、外光等の周辺環境の影響によらず、利用者が視認しやすい表示を実現することができる。また、カメラを用いる場合、飛行機１３０４内の表示部に飛行機１３０４の外の画像を表示させることができる。そのため、窓部１３１１以外での死角が低減された飛行機１３０４とすることができる。 FIG. 27D illustrates an airplane 1304. The airplane 1304 has a window portion 1311. The moving body according to one embodiment of the present invention can be used for the airplane 1304 including the window portion 1311. The display unit installed in the airplane 1304 can perform a display corrected based on information on the surrounding environment obtained by a sensor, a camera, and the like. A display that is easy to visually recognize can be realized. Further, when a camera is used, an image outside the airplane 1304 can be displayed on a display portion inside the airplane 1304. Therefore, the airplane 1304 can have a blind spot other than the window portion 1311 reduced.
なお、本発明の一態様に係る表示装置は、上述した移動体に限らず、各種電子機器に搭載することが可能である。また、光センサを設ける筐体として建造物を適用してもよい。例えば、本発明の一態様に係る表示装置を壁掛け型のディスプレイとして用いる場合には、ディスプレイの設けられた壁面に複数の光センサを設け、該光センサが取得した情報を表示装置の演算回路へ入力てもよい。または、本発明の一態様に係る表示装置をユニットバスと一体型のディスプレイとして用いる場合には、ユニットバス内に複数のセンサを設けることもできる。 Note that the display device according to one embodiment of the present invention is not limited to the above-described moving object, and can be mounted on various electronic devices. Further, a building may be applied as a housing in which the optical sensor is provided. For example, in the case where the display device according to one embodiment of the present invention is used as a wall-mounted display, a plurality of optical sensors are provided on a wall surface provided with the display, and information acquired by the optical sensors is supplied to an arithmetic circuit of the display device. You may enter. Alternatively, when the display device according to one embodiment of the present invention is used as a display integrated with a unit bus, a plurality of sensors can be provided in the unit bus.
本実施の形態は、他の実施の形態と適宜組み合わせて実施することが可能である。 This embodiment can be implemented in appropriate combination with any of the other embodiments.
（実施の形態１２）
＜画素の回路構成＞
本発明の一態様の表示装置は画素１５００を有する。画素１５００はマトリクス状に配置されており、ｍ行ｎ列目（ｍ、ｎは自然数）の画素１５００を画素１５００（ｍ，ｎ）と表記する。 (Embodiment 12)
<Pixel circuit configuration>
The display device of one embodiment of the present invention includes the pixel 1500. The pixels 1500 are arranged in a matrix, and the pixel 1500 in the m-th row and the n-th column (m and n are natural numbers) is represented as a pixel 1500 (m, n).
図２９は、画素１５００（ｍ，ｎ）の回路構成の一例を説明する回路図である。画素１５００（ｍ，ｎ）は、トランジスタＭ１と、トランジスタＭ２と、トランジスタＭ３と、容量素子Ｃｓ１と、容量素子Ｃｓ２と、液晶素子１５０１と、発光素子１５０２と、を有する。 FIG. 29 is a circuit diagram illustrating an example of a circuit configuration of the pixel 1500 (m, n). The pixel 1500 (m, n) includes a transistor M1, a transistor M2, a transistor M3, a capacitor Cs1, a capacitor Cs2, a liquid crystal element 1501, and a light-emitting element 1502.
トランジスタＭ１のソースまたはドレインの一方は、容量素子Ｃｓ１の一方の電極および液晶素子１５０１の一方の電極と電気的に接続されている。トランジスタＭ２のソースまたはドレインの一方は、トランジスタＭ３のゲートおよび容量素子Ｃｓ２の一方の電極と電気的に接続されている。トランジスタＭ３のソースまたはドレインの一方は、発光素子１５０２の一方の電極と電気的に接続されている。 One of a source and a drain of the transistor M1 is electrically connected to one electrode of the capacitor Cs1 and one electrode of the liquid crystal element 1501. One of the source and the drain of the transistor M2 is electrically connected to the gate of the transistor M3 and one electrode of the capacitor Cs2. One of a source and a drain of the transistor M3 is electrically connected to one electrode of the light-emitting element 1502.
なお、容量素子Ｃｓ１の一方の電極と、容量素子Ｃｓ２の一方の電極との間で寄生容量Ｃｓ＿Ｓが発生する。 Note that a parasitic capacitance Cs_S is generated between one electrode of the capacitive element Cs1 and one electrode of the capacitive element Cs2.
トランジスタＭ１のソースまたはドレインの他方は、配線Ｄａｔａ＿Ｌ［ｎ］と電気的に接続されている。トランジスタＭ１のゲートは、配線Ｓｃａｎ＿Ｌ［ｍ］と電気的に接続されている。トランジスタＭ２のソースまたはドレインの他方は、配線Ｄａｔａ＿Ｅ［ｎ］と電気的に接続されている。トランジスタＭ２のゲートは、配線Ｓｃａｎ＿Ｅ［ｍ］と電気的に接続されている。トランジスタＭ３のソースまたはドレインの他方および容量素子Ｃｓ２の他方の電極は、配線ＡＮＯＤＥと電気的に接続されている。容量素子Ｃｓ１の他方の電極は、配線ＣＳＣＯＭと電気的に接続されている。液晶素子１５０１の他方の電極は、配線ＴＣＯＭと電気的に接続されている。発光素子１５０２の他方の電極は、配線ＶＣＯＭと電気的に接続されている。 The other of the source and the drain of the transistor M1 is electrically connected to the wiring Data_L [n]. A gate of the transistor M1 is electrically connected to the wiring Scan_L [m]. The other of the source and the drain of the transistor M2 is electrically connected to the wiring Data_E [n]. A gate of the transistor M2 is electrically connected to the wiring Scan_E [m]. The other of the source and the drain of the transistor M3 and the other electrode of the capacitor Cs2 are electrically connected to the wiring ANODE. The other electrode of the capacitor Cs1 is electrically connected to the wiring CSCOM. The other electrode of the liquid crystal element 1501 is electrically connected to the wiring TCOM. The other electrode of the light-emitting element 1502 is electrically connected to the wiring VCOM.
本明細書等において、ｎ列目の画素１５００と電気的に接続されている配線Ｄａｔａ＿Ｌを配線Ｄａｔａ＿Ｌ［ｎ］と記載し、ｎ列目の画素１５００と電気的に接続されている配線Ｄａｔａ＿Ｅを配線Ｄａｔａ＿Ｅ［ｎ］と記載する。また、ｍ行目の画素１５００と電気的に接続されている配線Ｓｃａｎ＿Ｌを配線Ｓｃａｎ＿Ｌ［ｍ］と記載し、ｍ行目の画素１５００と電気的に接続されている配線Ｓｃａｎ＿Ｅを配線Ｓｃａｎ＿Ｅ［ｍ］と記載する。 In this specification and the like, the wiring Data_L electrically connected to the pixel 1500 in the n-th column is referred to as wiring Data_L [n], and the wiring Data_E electrically connected to the pixel 1500 in the n-th column is wired. It is described as Data_E [n]. In addition, a wiring Scan_L that is electrically connected to the pixel 1500 in the m-th row is referred to as a wiring Scan_L [m], and a wiring Scan_E that is electrically connected to the pixel 1500 in the m-th row is referred to as a wiring Scan_E [m]. It describes.
配線Ｄａｔａ＿Ｌ［ｎ］および配線Ｄａｔａ＿Ｅ［ｎ］には、ｎ列目の画素１５００に書き込まれるデータに対応する電位のデータ信号が供給される。配線Ｓｃａｎ＿Ｌ［ｍ］および配線Ｓｃａｎ＿Ｅ［ｍ］には、ｍ行目の画素１５００を選択するための選択信号が供給される。なお、配線ＡＮＯＤＥ、配線ＣＳＣＯＭ、配線ＴＣＯＭおよび配線ＶＣＯＭには、例えば定電位を供給することができる。 A data signal having a potential corresponding to data written to the pixel 1500 in the n-th column is supplied to the wiring Data_L [n] and the wiring Data_E [n]. A selection signal for selecting the pixel 1500 in the m-th row is supplied to the wiring Scan_L [m] and the wiring Scan_E [m]. Note that a constant potential can be supplied to the wiring ANODE, the wiring CSCOM, the wiring TCOM, and the wiring VCOM, for example.
トランジスタＭ１は、オン状態とオフ状態とを切り替えることにより、配線Ｄａｔａ＿Ｌ［ｎ］を介した画素１５００（ｍ，ｎ）へのデータの書き込みを制御する機能を有する。トランジスタＭ２は、オン状態とオフ状態とを切り替えることにより、配線Ｄａｔａ＿Ｅ［ｎ］を介した画素１５００（ｍ，ｎ）へのデータの書き込みを制御する機能を有する。トランジスタＭ３は、発光素子１５０２に与えられる電流を制御する、駆動トランジスタとしての機能を有する。 The transistor M1 has a function of controlling data writing to the pixel 1500 (m, n) through the wiring Data_L [n] by switching between an on state and an off state. The transistor M2 has a function of controlling data writing to the pixel 1500 (m, n) through the wiring Data_E [n] by switching between an on state and an off state. The transistor M3 functions as a driving transistor that controls current supplied to the light-emitting element 1502.
容量素子Ｃｓ１は、配線Ｄａｔａ＿Ｌ［ｎ］を介して画素１５００（ｍ，ｎ）に書き込まれたデータを保持する機能を有する。容量素子Ｃｓ２は、配線Ｄａｔａ＿Ｅ［ｎ］を介して画素１５００（ｍ，ｎ）に書き込まれたデータを保持する機能を有する。 The capacitor Cs1 has a function of holding data written to the pixel 1500 (m, n) through the wiring Data_L [n]. The capacitor Cs2 has a function of holding data written to the pixel 1500 (m, n) through the wiring Data_E [n].
液晶素子１５０１は、光の反射または光の透過を制御する機能を有する。特に、液晶素子１５０１を光の反射を制御する、いわゆる反射型の液晶素子とすることが好ましい。液晶素子１５０１を反射型の液晶素子とすることで、外光を用いて画像を表示することが可能となるため、本発明の一態様の表示装置の消費電力を低減することができる。例えば、液晶素子１５０１としては、反射膜と液晶素子と偏光板とを組み合わせた構成、またはマイクロ・エレクトロ・メカニカル・システム（ＭＥＭＳ）を用いる構成等とすればよい。なお、液晶素子１５０１として、反射膜を有しない透過型の液晶素子としてもよい。 The liquid crystal element 1501 has a function of controlling light reflection or light transmission. In particular, the liquid crystal element 1501 is preferably a so-called reflective liquid crystal element that controls reflection of light. When the liquid crystal element 1501 is a reflective liquid crystal element, an image can be displayed using external light; thus, power consumption of the display device of one embodiment of the present invention can be reduced. For example, the liquid crystal element 1501 may have a structure in which a reflective film, a liquid crystal element, and a polarizing plate are combined, a structure using a micro electro mechanical system (MEMS), or the like. Note that the liquid crystal element 1501 may be a transmissive liquid crystal element having no reflective film.
発光素子１５０２は、発光する機能を有する。例えば、発光素子１５０２としては、ＯＬＥＤ（Ｏｒｇａｎｉｃ　Ｌｉｇｈｔ　Ｅｍｉｔｔｉｎｇ　Ｄｉｏｄｅ）、ＬＥＤ（Ｌｉｇｈｔ　Ｅｍｉｔｔｉｎｇ　Ｄｉｏｄｅ）、ＱＬＥＤ（Ｑｕａｎｔｕｍ−ｄｏｔ　Ｌｉｇｈｔ　Ｅｍｉｔｔｉｎｇ　Ｄｉｏｄｅ）、ＩＥＬ（Ｉｎｏｒｇａｎｉｃ　Ｅｌｅｃｔｒｏ−Ｌｕｍｉｎｅｓｃｅｎｃｅ）、半導体レーザ等の自発光性の発光素子を用いることができる。以上に示すような発光素子から発せられる光は、その輝度や色度が外光に左右されることがない。このため、色再現性が高く（色域が広く）、かつコントラストの高い画像を表示することができる。つまり、高品位な画像を表示することができる。 The light-emitting element 1502 has a function of emitting light. For example, the light-emitting element 1502 includes an OLED (Organic Light Emitting Diode), an LED (Light Emitting Diode), a QLED (Quantum-Light Emitting Diode), an IEL (Inorganic Semiconductor Luminescent Light Emitting Semiconductor), and the like. An element can be used. The light and light emitted from the light emitting element as described above are not affected by external light in luminance and chromaticity. For this reason, an image with high color reproducibility (wide color gamut) and high contrast can be displayed. That is, a high-quality image can be displayed.
なお、図２９に示すように、トランジスタＭ３がバックゲートを有する構成、すなわちトランジスタＭ３が複数のゲートを有する構成とすることで、トランジスタＭ３の信頼性または駆動能力を向上させることができる。例えば、図２９に示すように、トランジスタＭ３のバックゲートをトランジスタＭ３のゲート（第１のゲートまたはフロントゲートともいう）と電気的に接続することで、トランジスタＭ３の電流駆動能力を向上させることができる。また、図示しないが、トランジスタＭ３のバックゲートをトランジスタＭ３のソースまたはドレインの一方または他方と電気的に接続することで、トランジスタＭ３のバックチャネル側の電位を固定することができる。 Note that as illustrated in FIG. 29, when the transistor M3 includes a back gate, that is, the transistor M3 includes a plurality of gates, reliability or driving ability of the transistor M3 can be improved. For example, as shown in FIG. 29, the current drive capability of the transistor M3 can be improved by electrically connecting the back gate of the transistor M3 to the gate of the transistor M3 (also referred to as a first gate or a front gate). it can. Although not illustrated, the potential on the back channel side of the transistor M3 can be fixed by electrically connecting the back gate of the transistor M3 to one or the other of the source and the drain of the transistor M3.
また、トランジスタＭ１乃至Ｍ３は、金属酸化物を有すると好ましい。金属酸化物を有するトランジスタは、比較的高い電界効果移動度が得られるため、高速駆動が可能となる。また、金属酸化物膜を有するトランジスタのオフ電流は、極めて小さい。したがって、本発明の一態様の表示装置のリフレッシュレートを下げても、表示される画像の輝度の維持が可能となり、消費電力を低減することができる。 The transistors M1 to M3 preferably include a metal oxide. A transistor including a metal oxide can have a relatively high field effect mobility, and thus can be driven at high speed. In addition, the off-state current of a transistor including a metal oxide film is extremely small. Therefore, even when the refresh rate of the display device of one embodiment of the present invention is reduced, the brightness of the displayed image can be maintained and power consumption can be reduced.
＜画素の駆動方法＞
図３０は、画素１０の駆動方法を示すタイミングチャートである。図３０では、配線ＳＰ＿Ｌの電位、配線Ｓｃａｎ＿Ｌ［１］の電位、配線Ｓｃａｎ＿Ｌ［２］の電位、配線Ｓｃａｎ＿Ｌ［３］の電位、配線Ｓｃａｎ＿Ｌ［４］の電位、配線Ｓｃａｎ＿Ｅ［１］の電位、配線Ｓｃａｎ＿Ｅ［２］の電位、配線Ｄａｔａ＿Ｌの電位および配線Ｄａｔａ＿Ｅの電位を示す。なお、配線ＳＰ＿Ｌはスタートパルスを供給する機能を有する。また、例えば本発明の一態様の表示装置がｐ列分（ｐは２以上の整数）の画素１５００を有する場合、配線Ｄａｔａ＿Ｌは例えば配線Ｄａｔａ＿Ｌ［１］乃至配線Ｄａｔａ＿Ｌ［ｐ］を示し、配線Ｄａｔａ＿Ｅは例えば配線Ｄａｔａ＿Ｅ［１］乃至配線Ｄａｔａ＿Ｅ［ｐ］を示す。 <Pixel driving method>
FIG. 30 is a timing chart illustrating a driving method of the pixel 10. In FIG. 30, the potential of the wiring SP_L, the potential of the wiring Scan_L [1], the potential of the wiring Scan_L [2], the potential of the wiring Scan_L [3], the potential of the wiring Scan_L [4], the potential of the wiring Scan_E [1], The potential of Scan_E [2], the potential of the wiring Data_L, and the potential of the wiring Data_E are shown. Note that the wiring SP_L has a function of supplying a start pulse. For example, in the case where the display device of one embodiment of the present invention includes p columns of pixels 1500 (p is an integer greater than or equal to 2), the wiring Data_L represents the wiring Data_L [1] to the wiring Data_L [p], for example. Denotes, for example, the wiring Data_E [1] to the wiring Data_E [p].
配線Ｄａｔａ＿Ｌおよび配線Ｄａｔａ＿Ｅにおいて、Ｂは帰線期間を示し、数字はどの行の画素１０に書き込むデータに対応する電位となっているかを示す。例えば、Ｄａｔａ＿Ｌにおいて１と記載されている期間は、配線Ｄａｔａ＿Ｌの電位が１行目の画素１０に書き込むデータに対応する電位となっていることを示す。また、例えばＤａｔａ＿Ｅにおいて１と記載されている期間は、配線Ｄａｔａ＿Ｅの電位が１行目の画素１０に書き込むデータに対応する電位となっていることを示す。 In the wiring Data_L and the wiring Data_E, B indicates a blanking period, and the number indicates which row has the potential corresponding to the data written to the pixel 10. For example, a period described as 1 in Data_L indicates that the potential of the wiring Data_L is a potential corresponding to data to be written to the pixels 10 in the first row. For example, a period described as 1 in Data_E indicates that the potential of the wiring Data_E is a potential corresponding to data to be written to the pixels 10 in the first row.
なお、図３０等に示すタイミングチャートにおいて、トランジスタＭ１およびトランジスタＭ２をｎチャネル型トランジスタとした場合の駆動方法を説明する。つまり、配線Ｓｃａｎ＿Ｌに高電位を印加することによりトランジスタＭ１がオン状態となり、配線Ｓｃａｎ＿Ｌに低電位を印加することによりトランジスタＭ１がオフ状態となる。また、配線Ｓｃａｎ＿Ｅに高電位を印加することによりトランジスタＭ２がオン状態となり、配線Ｓｃａｎ＿Ｅに低電位を印加することによりトランジスタＭ２がオフ状態となる。なお、低電位とは、例えば接地電位とすることができる。 Note that a driving method in the case where the transistors M1 and M2 are n-channel transistors in the timing chart illustrated in FIG. 30 and the like is described. That is, the transistor M1 is turned on by applying a high potential to the wiring Scan_L, and the transistor M1 is turned off by applying a low potential to the wiring Scan_L. In addition, the transistor M2 is turned on by applying a high potential to the wiring Scan_E, and the transistor M2 is turned off by applying a low potential to the wiring Scan_E. Note that the low potential can be a ground potential, for example.
トランジスタＭ１およびトランジスタＭ２は、ｐチャネル型トランジスタとしてもよい。この場合、つまり、配線Ｓｃａｎ＿Ｌに低電位を印加することによりトランジスタＭ１がオン状態となり、配線Ｓｃａｎ＿Ｌに高電位を印加することによりトランジスタＭ１がオフ状態となる。また、配線Ｓｃａｎ＿Ｅに低電位を印加することによりトランジスタＭ２がオン状態となり、配線Ｓｃａｎ＿Ｅに高電位を印加することによりトランジスタＭ２がオフ状態となる。また、トランジスタＭ３についても、ｎチャネル型トランジスタおよびｐチャネル型トランジスタのいずれを用いてもよい。 The transistors M1 and M2 may be p-channel transistors. In this case, that is, the transistor M1 is turned on by applying a low potential to the wiring Scan_L, and the transistor M1 is turned off by applying a high potential to the wiring Scan_L. In addition, the transistor M2 is turned on by applying a low potential to the wiring Scan_E, and the transistor M2 is turned off by applying a high potential to the wiring Scan_E. As the transistor M3, either an n-channel transistor or a p-channel transistor may be used.
図３０に示すように、各行の画素１５００と電気的に接続されている配線Ｓｃａｎ＿Ｌに順次高電位を印加することにより各行の画素１５００を順次選択し、各行の画素１５００に設けられたトランジスタＭ１を順次オン状態にする。これにより、配線Ｄａｔａ＿Ｌを介して各行の画素１５００に順次データを書き込む。データが書き込まれた画素１５００は、トランジスタＭ１がオフ状態となることで保持状態となる。以上により、液晶素子１５０１により画像を表示できる。 As shown in FIG. 30, the pixels 1500 in each row are sequentially selected by sequentially applying a high potential to the wiring Scan_L electrically connected to the pixels 1500 in each row, and the transistors M1 provided in the pixels 1500 in each row are connected. Turn on sequentially. Thus, data is sequentially written to the pixels 1500 in each row through the wiring Data_L. The pixel 1500 in which data is written is brought into a holding state when the transistor M1 is turned off. As described above, an image can be displayed by the liquid crystal element 1501.
また、図３０に示すように、各行の画素１５００と電気的に接続されている配線Ｓｃａｎ＿Ｅに順次高電位を印加することにより各行の画素１５００を順次選択し、各行の画素１５００に設けられたトランジスタＭ２を順次オン状態にする。これにより、配線Ｄａｔａ＿Ｅを介して各行の画素１５００に順次データを書き込む。データが書き込まれた画素１５００は、トランジスタＭ２がオフ状態となることで保持状態となる。さらに、書き込まれたデータ（配線Ｄａｔａ＿Ｅから供給されたデータ信号の電位）に応じてトランジスタＭ３のソースとドレインの間に流れる電流量が制御され、発光素子１５０２は、流れる電流量に応じた輝度で発光する。以上により、発光素子１５０２により画像を表示できる。 In addition, as illustrated in FIG. 30, by sequentially applying a high potential to the wiring Scan_E electrically connected to the pixels 1500 in each row, the pixels 1500 in each row are sequentially selected, and the transistors provided in the pixels 1500 in each row M2 is sequentially turned on. Accordingly, data is sequentially written to the pixels 1500 in each row through the wiring Data_E. The pixel 1500 in which data is written is brought into a holding state when the transistor M2 is turned off. Further, the amount of current flowing between the source and the drain of the transistor M3 is controlled in accordance with written data (the potential of the data signal supplied from the wiring Data_E), and the light-emitting element 1502 has luminance according to the amount of flowing current. Emits light. As described above, an image can be displayed by the light-emitting element 1502.
なお、本発明の一態様の表示装置は、液晶素子１５０１および発光素子１５０２の少なくとも一方を用いて画像を表示することができる。例えば、液晶素子１５０１は、外光の強度が強い環境下において視認性を向上させることができる。一方で発光素子１５０２は、外光の強度が弱い環境下において視認性を向上させることができる。 Note that the display device of one embodiment of the present invention can display an image using at least one of the liquid crystal element 1501 and the light-emitting element 1502. For example, the liquid crystal element 1501 can improve visibility in an environment where the intensity of external light is strong. On the other hand, the light-emitting element 1502 can improve visibility in an environment where the intensity of external light is weak.
なお、本発明の一態様の表示装置は、液晶素子１５０１および発光素子１５０２の双方を用いて画像を表示してもよい。液晶素子１５０１および発光素子１５０２の双方を用いて画像を表示することにより、外光の強度の強弱に関わらず視認性を向上させることができる。 Note that the display device of one embodiment of the present invention may display an image using both the liquid crystal element 1501 and the light-emitting element 1502. By displaying an image using both the liquid crystal element 1501 and the light-emitting element 1502, visibility can be improved regardless of the intensity of external light.
図３０では、Ｓｃａｎ＿Ｌが高電位となる期間と、Ｓｃａｎ＿Ｅが高電位となる期間とを等しくしたが、等しくしなくてもよい。例えば、図３１に示すように、Ｓｃａｎ＿Ｌが高電位となる期間を、Ｓｃａｎ＿Ｅが高電位となる期間より短くしてもよい。図３１では、配線Ｄａｔａ＿Ｌを介してｍ行目の画素１５００にデータが書き込まれた後、配線Ｄａｔａ＿Ｅを介してｍ行目の画素１５００にデータが書き込まれる。これにより、容量素子Ｃｓ２に保持されたデータが寄生容量Ｃｓ＿Ｓにより変動することを抑制することができる。したがって、発光素子１５０２により表示される画像に黒浮きが発生することを抑制することができ、当該画像のコントラスト比を高めることができる。 In FIG. 30, the period during which Scan_L is at a high potential and the period during which Scan_E is at a high potential are made equal, but they need not be equal. For example, as illustrated in FIG. 31, the period in which Scan_L is at a high potential may be shorter than the period in which Scan_E is at a high potential. In FIG. 31, data is written to the pixel 1500 in the m-th row through the wiring Data_L, and then data is written into the pixel 1500 in the m-th row through the wiring Data_E. Thereby, it is possible to suppress the data held in the capacitive element Cs2 from fluctuating due to the parasitic capacitance Cs_S. Therefore, it is possible to suppress the occurrence of black floating in the image displayed by the light emitting element 1502, and to increase the contrast ratio of the image.
本実施の形態は、他の実施の形態と適宜組み合わせて実施することが可能である。 This embodiment can be implemented in appropriate combination with any of the other embodiments.
１０１　　反射型表示素子
１０２　　表示部
１０３　　発光型表示素子
１０４　　表示部
１０５ａ　　ＳＤ
１０５ｂ　　ＳＤ
１０６　　ＣＴＬ
１０７　　ＡＩＣ
１０８　　ＳＰＣ
１０９　　入力装置
１１１　　抵抗
１１２　　アンプ
１１３　　アンプ
１２１　　抵抗
１２２　　アンプ
１３１　　抵抗
１３２　　アンプ
１３３　　抵抗
１３４　　アンプ
１４３　　光センサ
１４４　　開閉センサ
１４６　　加速度センサ
１５０　　インターフェース
１５１　　フレームメモリ
１５２　　デコーダ
１５３　　センサコントローラ
１５４　　信号コントローラ
１５５　　クロック生成回路
１６０　　画像処理部
１７０　　メモリ
１７３　　タイミングコントローラ
１７５　　レジスタ
１８１　　タッチパネル
１８２　　キーボード
１８３　　ポインティングデバイス
１８５　　ホスト
２００　　表示装置
２０１　　基板
２０２　　基板
２０５　　トランジスタ
２０６　　トランジスタ
２０７　　画素電極
２０８　　共通電極
２０９　　液晶層
２１０　　層
２１０ａ　　層
２１０ｂ　　層
２５０　　基板
２５１　　基板
２５２　　接着層
３００　　画素
３０１　　液晶素子
３０２　　発光素子
３０３　　トランジスタ
３０４　　容量素子
３０５　　トランジスタ
３０６　　トランジスタ
３０７　　容量素子
３０８　　トランジスタ
３０９　　トランジスタ
３１０　　トランジスタ
３１１　　導電層
３１２　　絶縁層
３１３　　半導体層
３１４　　導電層
３１５　　導電層
３１６　　絶縁層
３１７　　導電層
３１８　　絶縁層
３１９　　導電層
３２０　　導電層
３２１　　導電層
３２２　　半導体層
３２３　　導電層
３２４　　絶縁層
３２５　　絶縁層
３２６　　導電層
３２７　　導電層
３２８　　絶縁層
３２９　　導電層
３３０　　絶縁層
３３１　　ＥＬ層
３３２　　導電層
３３３　　接着層
３３４　　着色層
３３５　　スペーサ
３３６　　遮光層
３４０　　導電層
３４１　　絶縁層
３４２　　半導体層
３４３　　絶縁層
３４４　　導電層
３４５　　絶縁層
３４６　　導電層
３４７　　導電層
３４８　　導電層
３４９　　導電層
３５０　　画素
３５１　　画素
３５１ａ　　画素
３５１ｂ　　画素
３５１ｃ　　画素
３５１ｄ　　画素
３６０　　絶縁層
３６１　　導電層
３６２　　接着層
３６３　　絶縁層
３６４　　配向膜
３６５　　配向膜
３６６　　液晶層
５００　　基板
５０１　　画素部
５０２　　走査線駆動回路
５０３　　走査線駆動回路
５０４　　ＩＣ
５０５　　ＩＣ
５０６　　配線
５０８　　ＦＰＣ
５０９　　ＦＰＣ
５１０　　ＦＰＣ
５１１　　配線
５１２　　配線
５１３　　画素
５１４　　表示領域
５１５　　表示領域
５１６　　表示領域
５１７　　表示領域
５１８　　表示領域
６００　　光センサ
６０１　　遮光膜
６０２　　遮光膜
８００　　画像処理部
８０１　　ホスト
１０００　　車体
１００２　　窓部
１００４　　光センサ
１００４Ｌ　　光センサ
１００４Ｒ　　光センサ
１０１２　　ダッシュボード
１０１５　　ピラー
１０３１　表示部
１０３２　演算回路
１０３３Ｌ　　カメラ
１０３３Ｒ　　カメラ
１０３４　　光センサ
１０３５　　光センサ
１０５１Ａ　　表示部
１０５１Ｂ　　表示部
１０５１Ｃ　　表示部
１０５１Ｄ　　表示部
１０５２Ａ　　表示部
１０５２Ｂ　　表示部
１０５２Ｃ　　表示部
１０６０　　表示部
１０６１　　窓部
１０７１Ｌ　　カメラ
１０７１Ｒ　　カメラ
１０７２Ｌ　　カメラ
１０７２Ｒ　　カメラ
１０７３Ｌ　　カメラ
１０７３Ｒ　　カメラ
１３０１　　自動車
１３０２　　バス
１３０３　　電車
１３０４　　飛行機
１３１１　　窓部
１５００　　画素
１５０１　　液晶素子
１５０２　　発光素子
５００１　　筐体
５００２　　筐体
５００３　　表示装置
５００４　　表示装置
５００５　　マイクロホン
５００６　　スピーカ
５００７　　操作キー
５００８　　スタイラス
５２０１　　筐体
５２０２　　表示装置
５２０３　　ベルト
５２０４　　光センサ
５２０５　　スイッチ
５３０１　　筐体
５３０２　　筐体
５３０３　　表示装置
５３０４　　光センサ
５３０５　　光センサ
５３０６　　スイッチ
５３０７　　ヒンジ
５７０１　　筐体
５７０２　　表示装置
５８０１　　筐体
５８０２　　筐体
５８０３　　表示装置
５８０４　　操作キー
５８０５　　レンズ
５８０６　　接続部
５９０１　　筐体
５９０２　　表示装置
５９０３　　カメラ
５９０４　　スピーカ
５９０５　　ボタン
５９０６　　外部接続部
５９０７　　マイク
６２００　　情報端末
６２０１　　情報端末
６２２１　　筐体
６２２２　　表示装置
６２２３　　操作ボタン
６２２４　　スピーカ
６２２５Ｘ　　光センサ
６２２５Ｙ　　光センサ DESCRIPTION OF SYMBOLS 101 Reflective display element 102 Display part 103 Light emitting display element 104 Display part 105a SD
105b SD
106 CTL
107 AIC
108 SPC
109 Input Device 111 Resistor 112 Amplifier 113 Amplifier 121 Resistor 122 Amplifier 131 Resistor 132 Amplifier 133 Resistor 134 Amplifier 143 Optical Sensor 144 Open / Close Sensor 146 Acceleration Sensor 150 Interface 151 Frame Memory 152 Decoder 153 Sensor Controller 154 Signal Controller 155 Clock Generation Circuit 160 Image Processing Unit 170 memory 173 timing controller 175 register 181 touch panel 182 keyboard 183 pointing device 185 host 200 display device 201 substrate 202 substrate 205 transistor 206 transistor 207 pixel electrode 208 common electrode 209 liquid crystal layer 210 layer 210a layer 210b layer 250 substrate 251 substrate 252 adhesive layer 300 pixels 01 liquid crystal element 302 light emitting element 303 transistor 304 capacitor element 305 transistor 306 transistor 307 capacitor element 308 transistor 309 transistor 310 transistor 311 conductive layer 312 insulating layer 313 semiconductor layer 314 conductive layer 315 conductive layer 316 insulating layer 317 conductive layer 318 insulating layer 319 conductive Layer 320 conductive layer 321 conductive layer 322 semiconductor layer 323 conductive layer 324 insulating layer 325 insulating layer 326 conductive layer 327 conductive layer 328 insulating layer 329 conductive layer 330 insulating layer 331 EL layer 332 conductive layer 333 adhesive layer 334 colored layer 335 spacer 336 light shielding Layer 340 Conductive layer 341 Insulating layer 342 Semiconductor layer 343 Insulating layer 344 Conductive layer 345 Insulating layer 346 Conductive layer 347 Conductive layer 348 Conductive layer 349 Conductive layer 3 50 pixel 351 pixel 351a pixel 351b pixel 351c pixel 351d pixel 360 insulating layer 361 conductive layer 362 adhesive layer 363 insulating layer 364 alignment film 365 alignment film 366 liquid crystal layer 500 substrate 501 pixel portion 502 scanning line driving circuit 503 scanning line driving circuit 504 IC
505 IC
506 Wiring 508 FPC
509 FPC
510 FPC
511 wiring 512 wiring 513 pixel 514 display area 515 display area 516 display area 517 display area 518 display area 600 photosensor 601 shading film 602 shading film 800 image processing unit 801 host 1000 car body 1002 window unit 1004 photosensor 1004L photosensor 1004R photosensor 1012 Dashboard 1015 Pillar 1031 Display unit 1032 Arithmetic circuit 1033L Camera 1033R Camera 1034 Photosensor 1035 Photosensor 1051A Display unit 1051B Display unit 1051C Display unit 1051D Display unit 1052A Display unit 1052B Display unit 1052C Display unit 1060 Display unit 1061 Window unit 1071L Camera 1071R Camera 1072L Camera 1072R Camera 1073L Camera 1073R Camera 130 Automobile 1302 Bus 1303 Train 1304 Airplane 1311 Window portion 1500 Pixel 1501 Liquid crystal element 1502 Light emitting element 5001 Case 5002 Case 5003 Display device 5004 Display device 5005 Microphone 5006 Speaker 5007 Operation key 5008 Stylus 5201 Case 5202 Display device 5203 Belt 5204 Optical sensor 5205 Switch 5301 Case 5302 Case 5303 Display device 5304 Photosensor 5305 Photosensor 5306 Switch 5307 Hinge 5701 Case 5702 Display device 5801 Case 5802 Case 5803 Display device 5804 Operation key 5805 Lens 5806 Connection unit 5901 Case 5902 Display device 5903 Camera 5904 Speaker 5905 Button 5906 External connection unit 590 7 Microphone 6200 Information terminal 6201 Information terminal 6221 Case 6222 Display device 6223 Operation button 6224 Speaker 6225X Optical sensor 6225Y Optical sensor

Claims (7)

  1. 　第１の表示素子と、第２の表示素子と、信号処理回路と、演算回路と、を有し、
    　前記信号処理回路は、第１の信号を第１のパラメータに従って補正する機能と、第２の信号を第２のパラメータに従って補正する機能と、を有し、
    　前記演算回路は、ニューラルネットワークを用いた演算処理により前記第１のパラメータを生成する機能と、前記ニューラルネットワークを用いた演算処理により前記第２のパラメータを生成する機能と、を有し、
    　前記第１の表示素子は、前記信号処理回路において補正された前記第１の信号を用い、かつ光の反射を利用して階調を表示する機能を有し、
    　前記第２の表示素子は、前記信号処理回路において補正された前記第２の信号を用い、かつ発光の強度により階調を表示する機能を有し、
    　前記演算回路は、第１の回路、第２の回路、第３の回路、第４の回路および第５の回路を有し、
    　前記第１の回路は、第３の信号を、前記第２の回路を介して、前記第３の回路に出力する機能を有し、
    　前記第３の回路は、入力される信号の電流量に応じた信号を、前記第４の回路を介して、前記第５の回路に出力する機能を有し、
    　前記第５の回路は、入力される信号の電流量に応じた第４の信号を外部へ出力する機能を有し、
    　前記第５の回路は、第５の信号と前記第４の信号との差分から第６の信号を生成する機能を有し、
    　前記第４の信号は、前記第１のパラメータおよび前記第２のパラメータの少なくともいずれか一であり、
    　前記第５の信号は、外部から入力される信号であり、
    　前記第２の回路および第４の回路はそれぞれ、
    　重み係数に相当するデータを記憶するアナログメモリと、
    　前記データを変更する書込回路と、
    　入力される信号を、前記データに応じて重み付けをした信号として出力する乗算回路と、
    　を有し、
    　前記アナログメモリは、チャネル形成領域に金属酸化物を有するトランジスタを有する表示装置。     A first display element, a second display element, a signal processing circuit, and an arithmetic circuit;
    The signal processing circuit has a function of correcting the first signal according to the first parameter, and a function of correcting the second signal according to the second parameter,
    The arithmetic circuit has a function of generating the first parameter by arithmetic processing using a neural network, and a function of generating the second parameter by arithmetic processing using the neural network,
    The first display element has a function of displaying gradation using the first signal corrected in the signal processing circuit and utilizing reflection of light,
    The second display element has a function of using the second signal corrected in the signal processing circuit and displaying a gradation according to the intensity of light emission.
    The arithmetic circuit includes a first circuit, a second circuit, a third circuit, a fourth circuit, and a fifth circuit,
    The first circuit has a function of outputting a third signal to the third circuit via the second circuit;
    The third circuit has a function of outputting a signal according to a current amount of an input signal to the fifth circuit via the fourth circuit,
    The fifth circuit has a function of outputting a fourth signal corresponding to the amount of current of the input signal to the outside,
    The fifth circuit has a function of generating a sixth signal from a difference between the fifth signal and the fourth signal;
    The fourth signal is at least one of the first parameter and the second parameter;
    The fifth signal is a signal input from the outside,
    The second circuit and the fourth circuit are respectively
    An analog memory for storing data corresponding to the weighting factor;
    A writing circuit for changing the data;
    A multiplier circuit for outputting an input signal as a signal weighted according to the data;
    Have
    The analog memory is a display device including a transistor including a metal oxide in a channel formation region.
  2. 　請求項１において、
    　複数のセンサを有し、
    　前記複数のセンサからの信号は、前記第１の回路に入力され、
    　前記複数のセンサは、少なくとも光センサと加速度センサのいずれか一を含む表示装置。     In claim 1,
    Have multiple sensors,
    Signals from the plurality of sensors are input to the first circuit,
    The plurality of sensors include a display device including at least one of an optical sensor and an acceleration sensor.
  3. 　請求項１において、
    　前記第１の信号は、前記表示装置が表示する画像の色を、前記第２の信号は、前記表示装置が表示する画像の階調数を、それぞれ調整する信号である表示装置。     In claim 1,
    The display device, wherein the first signal is a signal for adjusting a color of an image displayed on the display device, and the second signal is a signal for adjusting a gradation number of an image displayed on the display device.
  4. 　移動体に搭載される表示装置であって、
    　表示素子と、信号処理回路と、演算回路と、第１の光センサと、を有し、
    　前記信号処理回路は、第１の信号をパラメータに従って補正する機能を有し、
    　前記演算回路は、前記第１の光センサからの情報と、前記移動体に設けられた第２の光センサからの情報とをもとに、ニューラルネットワークを用いた演算処理により前記パラメータを生成する機能を有し、
    　前記表示素子は、前記信号処理回路において補正された前記第１の信号を用いて階調を表示する機能を有し、
    　前記演算回路は、第１の回路、第２の回路、第３の回路、第４の回路および第５の回路を有し、
    　前記第１の回路は、第３の信号を、前記第２の回路を介して、前記第３の回路に出力する機能を有し、
    　前記第３の回路は、入力される信号の電流量に応じた信号を、前記第４の回路を介して、前記第５の回路に出力する機能を有し、
    　前記第５の回路は、入力される信号の電流量に応じた第４の信号を外部へ出力する機能を有し、
    　前記第５の回路は、第５の信号と前記第４の信号との差分から第６の信号を生成する機能を有し、
    　前記第４の信号は、前記パラメータであり、
    　前記第５の信号は、外部から入力される信号であり、
    　前記第２の回路および第４の回路はそれぞれ、
    　重み係数に相当するデータを記憶するアナログメモリと、
    　前記データを変更する書込回路と、
    　入力される信号を、前記データに応じて重み付けをした信号として出力する乗算回路と、
    　を有し、
    　前記アナログメモリは、チャネル形成領域に金属酸化物を有するトランジスタを有する表示装置。     A display device mounted on a moving body,
    A display element, a signal processing circuit, an arithmetic circuit, and a first photosensor;
    The signal processing circuit has a function of correcting the first signal according to a parameter,
    The arithmetic circuit generates the parameter by arithmetic processing using a neural network based on information from the first optical sensor and information from a second optical sensor provided on the moving body. Has function,
    The display element has a function of displaying gradation using the first signal corrected in the signal processing circuit,
    The arithmetic circuit includes a first circuit, a second circuit, a third circuit, a fourth circuit, and a fifth circuit,
    The first circuit has a function of outputting a third signal to the third circuit via the second circuit;
    The third circuit has a function of outputting a signal according to a current amount of an input signal to the fifth circuit via the fourth circuit,
    The fifth circuit has a function of outputting a fourth signal corresponding to the amount of current of the input signal to the outside,
    The fifth circuit has a function of generating a sixth signal from a difference between the fifth signal and the fourth signal;
    The fourth signal is the parameter;
    The fifth signal is a signal input from the outside,
    The second circuit and the fourth circuit are respectively
    An analog memory for storing data corresponding to the weighting factor;
    A writing circuit for changing the data;
    A multiplier circuit for outputting an input signal as a signal weighted according to the data;
    Have
    The analog memory is a display device including a transistor including a metal oxide in a channel formation region.
  5. 　移動体に搭載される表示装置であって、
    　第１の表示素子と、第２の表示素子と、信号処理回路と、演算回路と、第１の光センサと、を有し、
    　前記信号処理回路は、第１の信号を第１のパラメータに従って補正する機能と、第２の信号を第２のパラメータに従って補正する機能と、を有し、
    　前記演算回路は、前記第１の光センサからの情報と、前記移動体に設けられた第２の光センサからの情報とをもとに、ニューラルネットワークを用いた演算処理により前記第１のパラメータを生成する機能と、前記情報をもとに、前記ニューラルネットワークを用いた演算処理により前記第２のパラメータを生成する機能と、を有し、
    　前記第１の表示素子は、前記信号処理回路において補正された前記第１の信号を用い、かつ光の反射を利用して階調を表示する機能を有し、
    　前記第２の表示素子は、前記信号処理回路において補正された前記第２の信号を用い、かつ発光の強度により階調を表示する機能を有し、
    　前記演算回路は、第１の回路、第２の回路、第３の回路、第４の回路および第５の回路を有し、
    　前記第１の回路は、第３の信号を、前記第２の回路を介して、前記第３の回路に出力する機能を有し、
    　前記第３の回路は、入力される信号の電流量に応じた信号を、前記第４の回路を介して、前記第５の回路に出力する機能を有し、
    　前記第５の回路は、入力される信号の電流量に応じた第４の信号を外部へ出力する機能を有し、
    　前記第５の回路は、第５の信号と前記第４の信号との差分から第６の信号を生成する機能を有し、
    　前記第４の信号は、前記第１のパラメータおよび前記第２のパラメータの少なくともいずれか一であり、前記第５の信号は、外部から入力される信号であり、
    　前記第２の回路および第４の回路はそれぞれ、
    　重み係数に相当するデータを記憶するアナログメモリと、
    　前記データを変更する書込回路と、
    　入力される信号を、前記データに応じて重み付けをした信号として出力する乗算回路と、
    　を有し、
    　前記アナログメモリは、チャネル形成領域に金属酸化物を有するトランジスタを有する表示装置。     A display device mounted on a moving body,
    A first display element, a second display element, a signal processing circuit, an arithmetic circuit, and a first photosensor;
    The signal processing circuit has a function of correcting the first signal according to the first parameter, and a function of correcting the second signal according to the second parameter,
    The arithmetic circuit is configured to calculate the first parameter by arithmetic processing using a neural network based on information from the first optical sensor and information from a second optical sensor provided on the moving body. And a function of generating the second parameter by arithmetic processing using the neural network based on the information,
    The first display element has a function of displaying gradation using the first signal corrected in the signal processing circuit and utilizing reflection of light,
    The second display element has a function of using the second signal corrected in the signal processing circuit and displaying a gradation according to the intensity of light emission.
    The arithmetic circuit includes a first circuit, a second circuit, a third circuit, a fourth circuit, and a fifth circuit,
    The first circuit has a function of outputting a third signal to the third circuit via the second circuit;
    The third circuit has a function of outputting a signal according to a current amount of an input signal to the fifth circuit via the fourth circuit,
    The fifth circuit has a function of outputting a fourth signal corresponding to the amount of current of the input signal to the outside,
    The fifth circuit has a function of generating a sixth signal from a difference between the fifth signal and the fourth signal;
    The fourth signal is at least one of the first parameter and the second parameter, and the fifth signal is an externally input signal,
    The second circuit and the fourth circuit are respectively
    An analog memory for storing data corresponding to the weighting factor;
    A writing circuit for changing the data;
    A multiplier circuit for outputting an input signal as a signal weighted according to the data;
    Have
    The analog memory is a display device including a transistor including a metal oxide in a channel formation region.
  6. 　請求項４又は請求項５において、
    　前記第２の光センサを複数有し、
    　前記複数の前記第２の光センサとして、互いに異なる波長の光の光強度の情報を取得する機能を有する複数種類の光センサを有する表示装置。     In claim 4 or claim 5,
    A plurality of the second photosensors;
    A display device having a plurality of types of photosensors having a function of acquiring light intensity information of light having different wavelengths as the plurality of second photosensors.
  7. 　表示装置を有する移動体であって、
    　前記表示装置は、表示素子と、信号処理回路と、演算回路と、第１の光センサと、を有し、
    　前記移動体は第２の光センサを有し、
    　前記信号処理回路は、第１の信号をパラメータに従って補正する機能を有し、
    　前記演算回路は、前記第１の光センサからの情報と、前記第２の光センサからの情報とをもとに、ニューラルネットワークを用いた演算処理により前記パラメータを生成する機能を有し、
    　前記表示素子は、前記信号処理回路において補正された前記第１の信号を用いて階調を表示する機能を有し、
    　前記演算回路は、第１の回路、第２の回路、第３の回路、第４の回路および第５の回路を有し、
    　前記第１の回路は、第３の信号を、前記第２の回路を介して、前記第３の回路に出力する機能を有し、
    　前記第３の回路は、入力される信号の電流量に応じた信号を、前記第４の回路を介して、前記第５の回路に出力する機能を有し、
    　前記第５の回路は、入力される信号の電流量に応じた第４の信号を外部へ出力する機能を有し、
    　前記第５の回路は、第５の信号と前記第４の信号との差分から第６の信号を生成する機能を有し、
    　前記第４の信号は、前記パラメータであり、
    　前記第５の信号は、外部から入力される信号であり、
    　前記第２の回路および第４の回路はそれぞれ、
    　重み係数に相当するデータを記憶するアナログメモリと、
    　前記データを変更する書込回路と、
    　入力される信号を、前記データに応じて重み付けをした信号として出力する乗算回路と、を有し、
    　前記アナログメモリは、チャネル形成領域に金属酸化物を有するトランジスタを有する移動体。     A moving body having a display device,
    The display device includes a display element, a signal processing circuit, an arithmetic circuit, and a first photosensor,
    The moving body includes a second optical sensor;
    The signal processing circuit has a function of correcting the first signal according to a parameter,
    The arithmetic circuit has a function of generating the parameter by arithmetic processing using a neural network based on information from the first photosensor and information from the second photosensor;
    The display element has a function of displaying gradation using the first signal corrected in the signal processing circuit,
    The arithmetic circuit includes a first circuit, a second circuit, a third circuit, a fourth circuit, and a fifth circuit,
    The first circuit has a function of outputting a third signal to the third circuit via the second circuit;
    The third circuit has a function of outputting a signal according to a current amount of an input signal to the fifth circuit via the fourth circuit,
    The fifth circuit has a function of outputting a fourth signal corresponding to the amount of current of the input signal to the outside,
    The fifth circuit has a function of generating a sixth signal from a difference between the fifth signal and the fourth signal;
    The fourth signal is the parameter;
    The fifth signal is a signal input from the outside,
    The second circuit and the fourth circuit are respectively
    An analog memory for storing data corresponding to the weighting factor;
    A writing circuit for changing the data;
    A multiplication circuit that outputs an input signal as a signal weighted according to the data,
    The analog memory includes a transistor including a transistor including a metal oxide in a channel formation region.
PCT/IB2017/053615 2016-06-30 2017-06-19 Display device and moving body WO2018002766A1 (en)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04216160A (en) * 1990-12-17 1992-08-06 Nippon Telegr & Teleph Corp <Ntt> Neural network circuit
JPH08292752A (en) * 1995-04-20 1996-11-05 Nec Corp Automatic luminance adjustment device
JP2011154358A (en) * 2009-12-28 2011-08-11 Semiconductor Energy Lab Co Ltd Liquid crystal display device and method of manufacturing the same
WO2011142202A1 (en) * 2010-05-12 2011-11-17 シャープ株式会社 Display device
JP2013008936A (en) * 2010-10-29 2013-01-10 Semiconductor Energy Lab Co Ltd Semiconductor memory device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04216160A (en) * 1990-12-17 1992-08-06 Nippon Telegr & Teleph Corp <Ntt> Neural network circuit
JPH08292752A (en) * 1995-04-20 1996-11-05 Nec Corp Automatic luminance adjustment device
JP2011154358A (en) * 2009-12-28 2011-08-11 Semiconductor Energy Lab Co Ltd Liquid crystal display device and method of manufacturing the same
WO2011142202A1 (en) * 2010-05-12 2011-11-17 シャープ株式会社 Display device
JP2013008936A (en) * 2010-10-29 2013-01-10 Semiconductor Energy Lab Co Ltd Semiconductor memory device

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