WO2017206209A1 - 液晶面板的数据驱动电路及驱动方法 - Google Patents
液晶面板的数据驱动电路及驱动方法 Download PDFInfo
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- WO2017206209A1 WO2017206209A1 PCT/CN2016/086640 CN2016086640W WO2017206209A1 WO 2017206209 A1 WO2017206209 A1 WO 2017206209A1 CN 2016086640 W CN2016086640 W CN 2016086640W WO 2017206209 A1 WO2017206209 A1 WO 2017206209A1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3685—Details of drivers for data electrodes
- G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3685—Details of drivers for data electrodes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3696—Generation of voltages supplied to electrode drivers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/66—Digital/analogue converters
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0291—Details of output amplifiers or buffers arranged for use in a driving circuit
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0271—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping
- G09G2320/0276—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping for the purpose of adaptation to the characteristics of a display device, i.e. gamma correction
Definitions
- the present invention relates to the field of liquid crystal technology, and in particular, to a data driving circuit and a driving method for a liquid crystal panel.
- a driving circuit of a TFT (Thin Film Transistor) liquid crystal panel includes a data driving circuit.
- the function of the data driving circuit is to provide a signal to the data line after the TFT switch is turned on, and charge the pixel electrode to the corresponding gray scale voltage.
- the end of the data drive circuit is comprised of a buffer amplifier to take over the analog signal with a low load input and to drive the large load of the pixel array with amplified output capability. To reduce the power dissipation on the buffer amplifier, the supply voltage of the buffer amplifier is typically loaded in a half-voltage drive.
- the pixel load to be driven by the data driving circuit is also increasing, the power consumption of the buffer amplifier is increased, and the temperature of the data driving circuit is increased.
- the existing half-pressure driving method is insufficient to cope with the problem of a large increase in power consumption, which will result in greatly reduced reliability of the liquid crystal panel product.
- the present invention provides a data driving circuit and a driving method for a liquid crystal panel, which can reduce power consumption of the buffer amplifier.
- a data driving circuit of a liquid crystal panel comprising a digital signal module, a gamma reference voltage module, a comparator, a power voltage module, a selector, a digital-to-analog converter, and a buffer amplifier;
- the digital signal module is configured to provide a digital input signal, And transmitting the digital input signal to the comparator and the digital to analog converter, the digital input signal having a digital input signal voltage Ud;
- the gamma reference voltage a module for providing a set of gamma reference voltage signals and transmitting the set of gamma reference voltage signals to the comparator, the set of gamma reference voltage signals having a set of gamma reference voltages ⁇ G1, G2, ...Gi,...,Gn ⁇ , wherein the i-th gamma reference voltage signal has an i-th gamma reference voltage Gi, n is a positive integer greater than 1, said ⁇ G1, G2, ...
- the comparator is configured to receive the digital input signal sent by the digital signal module, and the group of gamma sent by the gamma reference voltage module a horse reference voltage signal; comparing the digital input signal with the set of gamma reference voltage signals to determine a specific determination of the Ud in the ⁇ G1, G2, ...
- Vb of the positive power supply voltage signal sent by the selector and the Va of the negative power supply voltage signal further satisfy: Vb ⁇ Ub, Va ⁇ Ua, and Ub is taken when Vb is different from Va With Ua.
- the specific value range determined by the comparator is Ud ⁇ (Gi, Gi+1), and the comparator generates the control indicating the specific value range Ud ⁇ (Gi, Gi+1) And transmitting the control signal to the selector;
- the Vb of the positive supply voltage signal is Gn-1, and the Va of the negative supply voltage signal is Ua.
- the set of gamma reference voltage signals provided by the gamma reference voltage module includes 14 gamma reference voltage signals.
- a driving method of a liquid crystal panel comprising: a digital signal module transmitting a digital input signal to a comparator and a digital-to-analog converter, the digital input signal having a digital input signal voltage Ud; a gamma reference power
- the voltage module sends a set of gamma reference voltage signals to the comparator, the set of gamma reference voltage signals having a set of gamma reference voltages ⁇ G1, G2, . . . , Gi, . . . , Gn ⁇ , where i
- the gamma reference voltage signal has an i-th gamma reference voltage Gi, n is a positive integer greater than 1, and the ⁇ G1, G2, ...
- Va ⁇ Ud ⁇ Vb, and Vb - Va ⁇ Ub - Ua send the positive supply voltage signal and the negative supply voltage signal to a buffer amplifier; the digital to analog converter receives the digital input signal; The digital input signal is digital-to-analog converted to obtain an analog input signal, and the analog input signal is sent to the buffer amplifier; the buffer amplifier receives the positive power supply voltage signal, Said negative supply voltage signal and the analog input signal, and signal processing.
- Vb and the Va further satisfy: Vb ⁇ Ub, Va ⁇ Ua, and the Vb is different from the Va, and the Ub and the Ua are respectively taken.
- the selector selects an i-1th gamma reference from the set of gamma reference voltage signals according to the control signal.
- the set of gamma reference voltage signals comprises 14 gamma reference voltage signals.
- the comparator compares the digital input signal with a set of gamma reference voltage signals to determine the specificity of the digital input signal voltage in a set of gamma reference voltages. A range of values is then generated to generate a control signal indicative of the particular range of values.
- the selector selects two signals from a set of gamma reference voltage signals, a first power supply voltage signal, and a second power supply voltage signal according to the control signal, respectively, as a positive power supply voltage signal and a negative power supply signal of the buffer amplifier.
- the positive power supply voltage signal and the negative power supply signal respectively take the second power voltage signal and the first power voltage signal, and the voltage of the positive and negative power voltages of the buffer amplifier
- the difference is smaller than the voltage difference between the positive power supply voltage and the negative power supply voltage in the half-voltage driving mode, thereby reducing the power consumption of the buffer amplifier, reducing the temperature rise of the buffer amplifier and the entire data driving circuit, thereby improving the temperature.
- FIG. 1 is a schematic structural view of a buffer amplifier for loading a power supply voltage by a half voltage driving method in the prior art.
- FIG. 2 is a schematic structural diagram of a data driving circuit according to an embodiment of the present invention.
- FIG. 3 is a schematic diagram showing the positional relationship of the voltages of the voltage signals provided by the power supply voltage module of FIG. 2 on the number axis.
- FIG. 4 is a schematic structural view of the buffer amplifier of FIG. 2.
- FIG. 5 is a schematic diagram showing the position of the positive power supply voltage of the positive power supply voltage signal selected by the selector of FIG. 2 and the negative power supply voltage of the negative power supply voltage signal on the number axis.
- FIG. 6 is a schematic diagram showing still another position of the positive power supply voltage of the positive power supply voltage signal selected by the selector of FIG. 2 and the negative power supply voltage of the negative power supply voltage signal on the number axis.
- FIG. 7 is a schematic diagram showing still another position of the positive power supply voltage of the positive power supply voltage signal selected by the selector of FIG. 2 and the negative power supply voltage of the negative power supply voltage signal on the number axis.
- FIG. 8 is a schematic diagram showing still another position of the positive power supply voltage of the positive power supply voltage signal selected by the selector of FIG. 2 and the negative power supply voltage of the negative power supply voltage signal on the number axis.
- FIG. 9 is a schematic diagram showing still another position of the positive power supply voltage of the positive power supply voltage signal selected by the selector of FIG. 2 and the negative power supply voltage of the negative power supply voltage signal on the number axis.
- FIG. 10 is a schematic diagram showing still another position on the number axis of the positive power supply voltage of the positive power supply voltage signal and the negative power supply voltage of the negative power supply voltage signal selected by the selector of FIG. 2.
- FIG. 11 is a schematic flowchart of a driving method according to an embodiment of the present invention.
- the end of the data drive circuit (Source drive IC) of the liquid crystal panel is composed of a buffer amplifier.
- the data drive circuit drives the pixel load, which will consume power and generate heat during operation. Most of the power consumption of the entire data drive circuit is concentrated on the buffer amplifier, so it is necessary to consider reducing the buffer Circuit design for large power consumption.
- a buffer amplifier has a signal input, a signal output, a positive supply voltage terminal, and a negative supply voltage terminal.
- the positive supply voltage was AVDD and the negative supply voltage was GND.
- the power consumption on the buffer amplifier depends on the voltage difference between the positive and negative supply voltages. In the power supply voltage loading mode of the above buffer amplifier, since the voltage difference between the positive and negative power supply voltages is large, that is, the result of AVDD-GND is large, The power consumption of the buffer amplifier is very high.
- the power supply voltage of the buffer amplifier is loaded by a half voltage driving method.
- the input terminal voltage of the buffer amplifier is Ud
- the output terminal voltage is Yn
- the positive power supply voltage is AVDD
- the negative power supply voltage is hAVDD
- the negative power supply is The voltage hAVDD is approximately equal to half the positive supply voltage AVDD.
- the existing half-pressure driving method is insufficient to cope with the problem of a large increase in power consumption, which will result in greatly reduced reliability of the liquid crystal panel product.
- the data driving circuit 100 of the liquid crystal panel of the first embodiment of the present invention includes: a digital signal module 101, a comparator 102, a gamma reference voltage module 103, a power supply voltage module 104, a selector 105, and digital-to-analog conversion.
- the device 106 and the buffer amplifier 107 includes: a digital signal module 101, a comparator 102, a gamma reference voltage module 103, a power supply voltage module 104, a selector 105, and digital-to-analog conversion.
- the device 106 and the buffer amplifier 107 includes: a digital signal module 101, a comparator 102, a gamma reference voltage module 103, a power supply voltage module 104, a selector 105, and digital-to-analog conversion.
- the digital signal module 101 is electrically connected to the comparator 102 and the digital-to-analog converter 106 for providing a digital input signal and transmitting the digital input signal to the comparator 102 and the digital-to-analog converter 106.
- the digital input signal includes a digital signal carrying color information having a digital input signal voltage Ud.
- the gamma reference voltage module 103 is electrically coupled to the comparator 102 for providing a set of gamma reference voltage signals and transmitting the set of gamma reference voltage signals to the comparator 102.
- the set of gamma reference voltage signals has a set of gamma reference voltages ⁇ G1, G2, . . . , Gi, . . . , Gn ⁇ , n being a positive integer greater than one.
- the i-th gamma reference voltage signal has an i-th gamma reference voltage Gi.
- the ⁇ G1, G2, ..., Gi, ..., Gn ⁇ are sequentially arranged in descending order from G1 to Gn.
- the set of gamma reference voltages is a set of reference voltages for which the liquid crystal panel performs gray scale display.
- the set of gamma reference voltage signals includes 14 gamma reference voltage signals; correspondingly, the set of gamma reference voltages includes 14 gamma reference voltages.
- the specific values of the respective gamma reference voltages Gi are determined according to actual conditions, and are not limited to the numerical values listed in the above description.
- the set of gamma reference voltage signals may include other numbers of gamma reference voltage signals, depending on the actual situation; correspondingly, the set of gamma reference voltages may include other numbers of gamma reference voltages.
- the set of gamma reference voltage signals includes 16 or 20 gamma reference voltage signals
- the set of gamma reference voltages includes 16 or 20 gamma reference voltages.
- the buffer amplifier amplifies the input digital input signal voltage Ud by 1:1, that is, the output terminal voltage Yn of the buffer amplifier is equal to the digital input signal voltage Ud.
- the output terminal voltage Yn has the following relationship with the set of gamma reference voltages ⁇ G1, G2, ..., Gi, ..., Gn ⁇ : G1 ⁇ Yn ⁇ Gn.
- Yn may be between any two adjacent gamma reference voltages in ⁇ G1, G2, ... Gi, ..., Gn ⁇ ; it may also be ⁇ G1, G2, ... Gi,... , any gamma reference voltage in Gn ⁇ .
- the digital input signal voltage Ud and the set of gamma reference voltages ⁇ G1, G2, ..., Gi, ..., Gn ⁇ also have the following relationship: G1 ⁇ Ud ⁇ Gn. That is, Ud can be between any two adjacent gamma reference voltages in ⁇ G1, G2, ... Gi, ..., Gn ⁇ ; it can also be ⁇ G1, G2, ... Gi, ..., Gn ⁇ Any of the gamma reference voltages.
- the comparator 102 is electrically connected to the digital signal module 101, the gamma reference voltage module 103, and the selector 105.
- the comparator 102 is configured to receive the digital input signal sent by the digital signal module 101, and the set of gamma reference voltage signals sent by the gamma reference voltage module 103; and receive the digital input signal and the set of gamma After the horse reference voltage signal, the digital input signal is compared with the set of gamma reference voltage signals to determine a specificity of the Ud in the ⁇ G1, G2, ... Gi, ..., Gn ⁇ a range of values; generating a control signal indicating the specific range of values, and transmitting the control signal to the selector 105.
- the comparator 102 performs a logical comparison operation on the received digital input signal with the set of gamma reference voltage signals to determine the specific range of values.
- the specific value range refers to a specific value position of Ud in ⁇ G1, G2, ..., Gi, ..., Gn ⁇ , that is, Ud is in ⁇ G1, G2, ... Gi, ..., Gn ⁇ . Between two adjacent gamma reference voltages; or equal to a certain gamma reference voltage in ⁇ G1, G2, ... Gi, ..., Gn ⁇ .
- the comparator 102 After determining the specific value range, the comparator 102 generates a control signal indicating the specific value range, and sends the control signal to the selector 105 to control the selector 105 to perform the next signal processing.
- the power voltage module 104 is electrically connected to the selector 105.
- the power voltage module 104 is configured to provide the set of gamma reference voltage signals, the first power voltage signal, and the second power voltage signal to the selector 105. number.
- the power voltage module 104 can obtain the set of gamma reference voltage signals through the other circuit units in the data driving circuit 100, and the set of gamma reference voltage signals acquired and provided by the power voltage module 104, and the gamma reference.
- the set of gamma reference voltage signals that the voltage module 103 can provide are the same.
- the power voltage module 104 is further electrically connected to the gamma reference voltage module 103, and the power voltage module 104 obtains the set of gamma reference voltage signals from the gamma reference voltage module 103.
- the first power voltage signal and the second power voltage signal are both power supply voltages that are loaded when the buffer amplifier 107 adopts a half voltage driving mode.
- the first power voltage signal is a negative power voltage signal when the buffer amplifier 107 adopts a half voltage driving mode, and the first power voltage signal has a first power voltage Ua.
- the second power voltage signal is a positive power voltage signal when the buffer amplifier 107 is in a half voltage driving mode, and the second power voltage signal has a second power voltage Ub.
- the buffer amplifier 107 since the liquid crystal in the liquid crystal panel needs to be driven in a polarity inversion manner, that is, the electric fields applied to the liquid crystal are opposite in direction at different times. Therefore, the buffer amplifier 107 also needs to provide positive and negative output voltages to drive the liquid crystal. Moreover, the output terminal voltage Yn of the buffer amplifier 107 is between the positive power supply voltage and the negative power supply voltage (ie, the digital input signal voltage Ud is between the positive power supply voltage and the negative power supply voltage).
- the positive power supply voltage terminal of the buffer amplifier 107 when it is necessary to provide a positive output voltage, the positive power supply voltage terminal of the buffer amplifier 107 is loaded with the positive power supply voltage AVDD, and the negative power supply voltage terminal is loaded with the negative power supply voltage hAVDD, and there is 0 ⁇ hAVDD ⁇ Ud ⁇ AVDD;
- the positive supply voltage terminal of the buffer amplifier 107 is loaded with the positive supply voltage hAVDD, and the negative supply voltage terminal is loaded with the negative supply voltage GND.
- 0 GND ⁇ Ud ⁇ hAVDD.
- AVDD and hAVDD are the conventional supply voltage values of the buffer amplifier 107, which are determined according to actual needs.
- AVDD 16V and hAVDD ⁇ 8V, but it should be understood that the present invention is not limited to this.
- FIG. 3 shows the magnitude relationship of the power supply voltages AVDD, hAVDD, and GND of the buffer amplifier 107 on the number axis with the set of gamma reference voltages ⁇ G1, G2, . . . , Gi, . . . , Gn ⁇ .
- the selector 105 is electrically connected to the comparator 102, the power supply voltage module 104, and the buffer amplifier 107.
- the selector 105 is configured to receive the control signal sent by the comparator 102, and the set of gamma reference voltage signals, the first power voltage signal, and the second power voltage signal sent by the power voltage module 104;
- the control signal selects two signals from the set of gamma reference voltage signals, the first power voltage signal, and the second power voltage signal, respectively, as positive voltage signals and negatives of the buffer amplifier a power supply voltage signal, wherein the positive power supply voltage signal and the negative power supply voltage signal respectively take the first power voltage signal and the second power voltage signal, and the positive power voltage signal has a positive power voltage Vb.
- the negative supply voltage signal has a negative supply voltage Va such that Va ⁇ Ud ⁇ Vb, and Vb - Va ⁇ Ub - Ua; the positive supply voltage signal and the negative supply voltage signal are transmitted to the buffer amplifier 107.
- the control signal indicates the specific range of values of Ud.
- the selector 105 selects two signals from the set of gamma reference voltage signals as the positive power supply voltage signal and the negative power supply voltage signal of the buffer amplifier 107 according to the specific value range of the Ud carried by the control signal; Or selecting a signal from the set of gamma reference voltage signals as the positive power voltage signal or the negative power voltage signal, and selecting a signal from the first power voltage signal and the second power voltage signal As the negative power supply voltage signal or the positive power supply voltage signal.
- the first power voltage signal and the second power voltage signal cannot be simultaneously selected as the negative power voltage signal and the positive power voltage signal, respectively. As shown in FIG.
- the positive power supply voltage signal and the negative power supply voltage signal selected by the selector 105 are both derived from the power supply voltage module 104, as described above, the digital input signal voltage Ud and the positive The positive power supply voltage Vb of the power supply voltage signal and the negative power supply voltage Va of the negative power supply voltage signal satisfy the following relationship: Va ⁇ Ud ⁇ Vb. To ensure that the voltage difference of the power supply voltage of the buffer amplifier 107 at this time is smaller than the voltage difference when driving with a half voltage, it is only necessary to satisfy Vb-Va ⁇ Ub-Ua.
- Va Ua
- Vb is the ⁇ G1, G2, ... Gi, ..., Gn ⁇
- Va is the first power supply voltage Ua.
- the selector 105 is specifically configured to use the set of gamma reference voltage signals ⁇ G1, G2, ... Gi, ..., Gn ⁇ provided from the power voltage module 104 according to the control signal sent by the comparator 102.
- the i-1th gamma reference voltage signal and the i+1th gamma reference voltage signal are selected as the positive power supply voltage signal of the buffer amplifier 107 and the negative power supply voltage signal, respectively.
- Vb Gi-1
- Vb-Va ⁇ AVDD - hAVDD the voltage difference of the power supply voltage on the buffer amplifier 107 is Vb - Va ⁇ AVDD - hAVDD.
- the selector 105 selects two gamma reference voltage signals as positive and negative power supply voltage signals of the buffer amplifier 107, and causes the voltages of the positive and negative power supply voltage signals to be respectively on the number axis. Located on both sides adjacent to the digital input signal voltage Ud, the positive and negative supply voltage differentials applied to the buffer amplifier 107 can be reduced, thereby reducing the power consumption of the buffer amplifier 107.
- the specific value range determined by the comparator 102 is Ud ⁇ (Gi, different from the foregoing first embodiment. Gi+1),
- the selector 105 is specifically configured to use the set of gamma reference voltage signals ⁇ G1, G2, ... Gi, ..., Gn ⁇ provided from the power voltage module 104 according to the control signal sent by the comparator 102.
- the i-th gamma reference voltage signal and the i+1th gamma reference voltage signal are selected as the positive power supply voltage signal of the buffer amplifier 107 and the negative power supply voltage signal, respectively.
- Vb Gi
- Va Gi+1
- i 1, 2,3,...,n-1.
- Vb and Va are respectively distributed on the numerical axis on both sides adjacent to Ud.
- the selector 105 selects two gamma reference voltage signals as positive and negative power supply voltage signals of the buffer amplifier 107, and causes voltages of the positive and negative power supply voltage signals.
- the positive and negative power supply voltage differentials applied to the buffer amplifier 107 can be reduced, thereby reducing the power consumption of the buffer amplifier 107.
- the description will not be repeated again.
- the device 105 is specifically configured to select, according to the control signal sent by the comparator 102, the second power voltage signal provided by the power voltage module 104 as the positive power voltage signal of the buffer amplifier 107; and provide the power voltage module 104
- the second gamma reference voltage signal is selected from the set of gamma reference voltage signals as the negative supply voltage signal of the buffer amplifier 107.
- the selector 105 selects two gamma reference voltage signals as positive and negative power supply voltage signals of the buffer amplifier 107, and causes voltages of the positive and negative power supply voltage signals.
- the positive and negative power supply voltage differentials applied to the buffer amplifier 107 can be reduced, thereby reducing the power consumption of the buffer amplifier 107. For the sake of brevity, it will not be repeated here.
- the device 105 is specifically configured to select, according to the control signal sent by the comparator 102, the first power voltage signal provided by the power voltage module 104 as the negative power voltage signal of the buffer amplifier 107; and provide the power voltage module 104
- An n-1th gamma reference voltage signal is selected from the set of gamma reference voltage signals as the positive supply voltage signal of the buffer amplifier 107.
- Vb Gn-1
- the selector 105 selects two gamma reference voltage signals as positive and negative power supply voltage signals of the buffer amplifier 107, and causes the voltages of the positive and negative power supply voltage signals to be respectively
- the two axes on the adjacent sides of the digital input signal voltage Ud can reduce the voltage difference between the positive and negative power supply voltages applied to the buffer amplifier 107, thereby reducing the power consumption of the buffer amplifier 107.
- it will not be repeated here.
- the digital to analog converter 106 is electrically coupled to both the digital signal module 101 and the buffer amplifier 107.
- the digital-to-analog converter 106 is configured to receive the digital input signal sent by the digital signal module 101; perform digital-to-analog conversion on the digital input signal to obtain an analog input signal, and send the analog input signal to the buffer amplifier 107.
- the buffer amplifier 107 is electrically connected to both the digital to analog converter 106 and the selector 105.
- the buffer amplifier 107 is configured to receive the positive power voltage signal, the negative power voltage signal, and the analog input signal sent by the digital-to-analog converter 106 sent by the selector 105, and perform corresponding signal processing. From the above, in the present embodiment, the voltage difference between the positive power supply voltage and the negative power supply voltage of the buffer amplifier 107 is smaller than the positive power supply voltage and the negative power supply voltage differential voltage in the half voltage driving mode. Therefore, the power consumption of the buffer amplifier 107 is reduced.
- the comparator compares the digital input signal with a set of gamma reference voltage signals to determine a specific range of values of the digital input signal voltage in a set of gamma reference voltages, and then A control signal is generated indicating the specific range of values.
- the selector selects two signals from a set of gamma reference voltage signals, a first power supply voltage signal, and a second power supply voltage signal according to the control signal, respectively, as a positive power supply voltage signal and a negative power supply signal of the buffer amplifier.
- the positive power supply voltage signal and the negative power supply signal respectively take the second power voltage signal and the first power voltage signal, and the voltage of the positive and negative power voltages of the buffer amplifier
- the difference is smaller than the voltage difference between the positive power supply voltage and the negative power supply voltage in the half-voltage driving mode, thereby reducing the power consumption of the buffer amplifier, reducing the temperature rise of the buffer amplifier and the entire data driving circuit, thereby improving the temperature.
- the voltage interval of Vb-Va can be combined with Ub.
- the voltage intervals of -Ua overlap, and Ud is located in the portion where the two voltage intervals overlap.
- the selector 105 selects two gamma reference voltage signals of the set of gamma reference voltage signals as the positive power supply voltage signal and the negative power supply voltage signal, respectively, and ensures positive and negative power supplies.
- the voltage difference Vb-Va of the voltage is smaller than the voltage difference hAVDD-GND of the positive and negative power supply voltages in the half voltage driving mode, so that the power consumption of the buffer amplifier 107 can be reduced.
- the selector 105 selects two gamma reference voltage signals of the set of gamma reference voltage signals as the positive power supply voltage signal and the negative power supply voltage signal, respectively, and ensures The voltage difference Vb-Va between the positive and negative power supply voltages is smaller than the voltage difference AVDD-hAVDD of the positive and negative power supply voltages in the half voltage driving mode, so that the power consumption of the buffer amplifier 107 can be reduced.
- the comparator compares the digital input signal with a set of gamma reference voltage signals to determine a specific range of values of the digital input signal voltage in a set of gamma reference voltages, and then A control signal is generated indicating the specific range of values.
- the selector selects two signals from a set of gamma reference voltage signals according to the control signal, respectively as a positive power supply voltage signal and a negative power supply signal of the buffer amplifier, so that the positive power supply voltage and the negative power supply voltage of the buffer amplifier are
- the voltage difference is smaller than the voltage difference between the positive power supply voltage and the negative power supply voltage in the half voltage driving mode, thereby reducing the power consumption of the buffer amplifier, reducing the temperature rise of the buffer amplifier and the entire data driving circuit, and further Improve the reliability of the LCD panel.
- the driving method 200 of the liquid crystal panel provided by the method embodiment of the present invention includes:
- the digital signal module sends a digital input signal to the comparator and the digital-to-analog converter, the digital input signal has a digital input signal voltage Ud;
- the gamma reference voltage module sends a set of gamma reference voltage signals to the comparator, the set of gamma reference voltage signals having a set of gamma reference voltages ⁇ G1, G2, ... Gi, ..., Gn ⁇ , wherein the i-th gamma reference voltage signal has an i-th gamma reference voltage Gi, n is a positive integer greater than 1, and the ⁇ G1, G2, ... Gi, ..., Gn ⁇ are sequentially descended from G1 to Gn Arrange, G1 ⁇ Ud ⁇ Gn;
- the comparator receives the digital input signal, and the set of gamma reference voltage signals; comparing the digital input signal with the set of gamma reference voltage signals to determine that the Ud is in the a specific value range in ⁇ G1, G2, ... Gi, ..., Gn ⁇ ; generating a control signal indicating the specific value range, and transmitting the control signal to the selector;
- the power voltage module sends the set of gamma reference voltage signals, the first power voltage signal and the second power voltage signal to the selector, the first power voltage signal having a first power voltage Ua, the
- the selector receives the control signal, the set of gamma reference voltage signals, the first power voltage signal, and the second power voltage signal; according to the control signal from the set of gamma Two signals are selected from the reference voltage signal, the first power voltage signal, and the second power voltage signal, respectively, as a positive power voltage signal and a negative power voltage signal of the buffer amplifier, the positive power voltage signal and the The first power voltage signal and the second power voltage signal are respectively taken when the negative power voltage signal is different, the positive power voltage signal has a positive power voltage Vb, and the negative power voltage signal has a negative power voltage Va, such that Va ⁇ Ud ⁇ Vb, and Vb-Va ⁇ Ub-Ua; transmitting the positive power supply voltage signal and the negative power supply voltage signal to a buffer amplifier;
- the digital-to-analog converter receives the digital input signal; performing digital-to-analog conversion on the digital input signal to obtain an analog input signal, and transmitting the analog input signal to the buffer amplifier;
- the buffer amplifier receives the positive power voltage signal, the negative power voltage signal, and the analog input signal, and performs signal processing.
- the digital signal module sends a digital input signal to the comparator
- the gamma reference voltage module sends a set of gamma reference voltage signals to the comparator, after the comparator receives the two signals,
- a comparison operation is performed to determine a specific range of values of the Ud in the ⁇ G1, G2, ..., Gi, ..., Gn ⁇ .
- the specific value range refers to a specific value position of the Ud in the ⁇ G1, G2, ..., Gi, ..., Gn ⁇
- the specific value range includes one of the following two conditions: Ud Between Between two adjacent gamma reference voltages in ⁇ G1, G2, ... Gi, ..., Gn ⁇ , or Ud equals one of ⁇ G1, G2, ...
- the supply voltage module transmits the set of gamma reference voltage signals, the first supply voltage signal, and the second supply voltage signal to the comparator.
- the first power voltage signal is a negative power voltage signal when the buffer amplifier adopts a half voltage driving mode, and the first power voltage signal has a first power voltage Ua, and Ua may take GND (ie, 0) or hAVDD.
- the second power voltage signal is a positive power voltage signal when the buffer amplifier adopts a half voltage driving mode, and the second power voltage signal has a second power voltage Ub, and Ub may take hAVDD or AVDD.
- the selector After the selector receives the control signal, the set of gamma reference voltage signals, the first power voltage signal, and the second power voltage signal, according to the control signal, from the set of gamma Two signals are selected from the reference voltage signal, the first power voltage signal, and the second power voltage signal, respectively, as a positive power voltage signal and a negative power voltage signal of the buffer amplifier, and the buffer amplifier is
- the positive power supply voltage Vb and the negative power supply voltage Va satisfy the following relationship: Va ⁇ Ud ⁇ Vb, and Vb - Va ⁇ Ub - Ua.
- the first power voltage signal and the second power voltage signal are respectively taken when the positive power voltage signal is different from the negative power voltage signal.
- the digital signal module also sends the digital input signal to the digital-to-analog converter, and after receiving the digital input signal, the digital-to-analog converter performs digital-to-analog conversion processing on the digital input signal to generate an analog input. Signaling and transmitting the analog input signal to the buffer amplifier.
- the positive and negative power supply voltage terminals of the buffer amplifier respectively load the positive power supply voltage signal and the negative power supply voltage signal, and the signal input end of the buffer amplifier receives the analog input signal, and performs corresponding signals on the analog input signal. Signal processing.
- the comparator compares the digital input signal with a set of gamma reference voltage signals to determine a specific range of values of the digital input signal voltage in a set of gamma reference voltages, and then A control signal is generated indicating the specific range of values.
- the selector selects two signals from a set of gamma reference voltage signals, a first power supply voltage signal, and a second power supply voltage signal according to the control signal, respectively, as a positive power supply voltage signal and a negative power supply signal of the buffer amplifier.
- the positive power supply voltage signal and the negative power supply signal respectively take the second power voltage signal and the first power voltage signal, and the positive power supply voltage and the negative power supply of the buffer amplifier are
- the voltage difference of the voltage is smaller than the voltage difference between the positive power supply voltage and the negative power supply voltage in the half voltage driving mode, thereby reducing the power consumption of the buffer amplifier and reducing the temperature rise of the buffer amplifier and the entire data driving circuit. This further improves the reliability of the liquid crystal panel.
- the Vb and the Va further satisfy: Vb ⁇ Ub, Va ⁇ Ua, and the Vb is different from the Va, and the Ub and the Ub are respectively taken Ua.
- the specific value range indicated by the control signal is Ud ⁇ (Gi, Gi+1).
- the voltage interval of Vb-Va may overlap with the voltage interval of Ub-Ua.
- Ud is located in the portion where the two voltage intervals overlap.
- Vb and Va are respectively two gamma reference voltages in the ⁇ G1, G2, ..., Gi, ..., Gn ⁇ .
- the selector selects two gamma reference voltage signals of the set of gamma reference voltage signals as the positive power supply voltage signal and the negative power supply voltage signal, respectively, and ensures positive and negative
- the voltage difference Vb-Va of the power supply voltage is smaller than the voltage difference hAVDD-GND of the positive and negative power supply voltages in the half voltage driving mode, the power consumption of the buffer amplifier can be reduced.
- Ua hAVDD
- Ub AVDD
- Va ⁇ Ua ⁇ Vb ⁇ Ub At this time, Vb and Va are respectively two gamma reference voltages in the ⁇ G1, G2, ..., Gi, ..., Gn ⁇ .
- the selector selects two gamma reference voltage signals of the set of gamma reference voltage signals as the positive power supply voltage signal and the negative supply voltage signal, respectively, and It is possible to reduce the power consumption of the buffer amplifier 107 by ensuring that the voltage difference Vb-Va between the positive and negative power supply voltages is smaller than the voltage difference AVDD-hAVDD of the positive and negative power supply voltages in the half voltage driving mode.
- each execution body in the driving method 200 of the method embodiment of the present invention may correspond to each module in the data driving circuit 100 of the device embodiment of the present invention, and the corresponding flow of the driving method 200 is respectively performed by the data driving circuit 100.
- the above and other operations and/or functions of the various modules in the module are implemented. For the sake of brevity, it will not be repeated here.
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Abstract
一种液晶面板的数据驱动电路,包括数字信号模块(101)、伽马基准电压模块(103)、比较器(102)、电源电压模块(104)、选择器(105)、数模转换器(106)以及缓冲放大器(107)。还公开了一种液晶面板的驱动方法。该数据驱动电路和驱动方法,能够减少缓冲放大器的功耗,降低数据驱动电路的温升,提升液晶面板的可靠性。
Description
本申请要求于2016年5月30日提交中国专利局、申请号为201610373125.8、发明名称为“液晶面板的数据驱动电路及驱动方法”的中国专利申请的优先权,上述在先申请的内容以引入的方式并入本文本中。
本发明涉及液晶技术领域,尤其涉及一种液晶面板的数据驱动电路及驱动方法。
TFT(Thin Film Transistor,薄膜晶体管)液晶面板的驱动电路包括数据驱动电路。数据驱动电路的功能是在TFT开关打开后,向数据线提供信号,把像素电极充电至相应的灰阶电压。通常,数据驱动电路的末端由缓冲放大器构成,以利用低负载输入端承接模拟信号,而以放大的输出能力驱动像素阵列的大负载。为了降低缓冲放大器上的功耗,缓冲放大器的电源电压一般采用半压驱动的方式加载。
随着液晶面板的尺寸及解析度不断增加,数据驱动电路所要驱动的像素负载也越来越大,缓冲放大器的功耗随之增大、数据驱动电路的温度上升。而现有的半压驱动方式已经不足以应对功耗大幅增加的问题,这将导致液晶面板产品的可靠性大大降低。
发明内容
有鉴于此,本发明提供了一种液晶面板的数据驱动电路及驱动方法,能够降低缓冲放大器的功耗。
一种液晶面板的数据驱动电路,包括数字信号模块、伽马基准电压模块、比较器、电源电压模块、选择器、数模转换器以及缓冲放大器;所述数字信号模块用于提供数字输入信号,并向所述比较器与所述数模转换器发送所述数字输入信号,所述数字输入信号具有数字输入信号电压Ud;所述伽马基准电压
模块用于提供一组伽马基准电压信号,并向所述比较器发送所述一组伽马基准电压信号,所述一组伽马基准电压信号具有一组伽马基准电压{G1,G2,...Gi,…,Gn},其中第i伽马基准电压信号具有第i伽马基准电压Gi,n为大于1的正整数,所述{G1,G2,...Gi,…,Gn}从G1到Gn依次按降序排列,G1≤Ud≤Gn;所述比较器用于接收所述数字信号模块发送的所述数字输入信号,以及所述伽马基准电压模块发送的所述一组伽马基准电压信号;将所述数字输入信号与所述一组伽马基准电压信号进行比较,以确定所述Ud在所述{G1,G2,...Gi,…,Gn}中的具体取值范围;生成指示所述具体取值范围的控制信号,并向所述选择器发送所述控制信号;所述电源电压模块用于向所述选择器提供所述一组伽马基准电压信号、第一电源电压信号和第二电源电压信号,所述第一电源电压信号具有第一电源电压Ua,所述第二电源电压信号具有第二电源电压Ub,其中0≤Ua<Ud<Ub,且当Ua=0时,Ua<Gn,Ub<G1;当Ua>0时,Ua>Gn,Ub>G1;所述选择器用于接收所述比较器发送的所述控制信号,以及所述电源电压模块发送的所述一组伽马基准电压信号、所述第一电源电压信号与所述第二电源电压信号;根据所述控制信号从所述一组伽马基准电压信号、所述第一电源电压信号以及所述第二电源电压信号中选出两个信号,分别作为所述缓冲放大器的正电源电压信号与负电源电压信号,所述正电源电压信号与所述负电源电压信号不同时分别取所述第一电源电压信号与所述第二电源电压信号,所述正电源电压信号具有正电源电压Vb,所述负电源电压信号具有负电源电压Va,使得Va<Ud<Vb,且Vb-Va<Ub-Ua;向所述缓冲放大器发送所述正电源电压信号与所述负电源电压信号;所述数模转换器用于接收所述数字信号模块发送的所述数字输入信号;对所述数字输入信号进行数模转换得到模拟输入信号,并向所述缓冲放大器发送所述模拟输入信号;所述缓冲放大器用于接收所述选择器发送的所述正电源电压信号、所述负电源电压信号,以及所述数模转换器发送的所述模拟输入信号,并进行信号处理。
其中,所述选择器发送的所述正电源电压信号的所述Vb与所述负电源电压信号的所述Va进一步还满足:Vb≤Ub,Va≥Ua,且Vb与Va不同时分别取Ub与Ua。
其中,所述比较器确定的所述具体取值范围为Ud=Gi,所述比较器生成指
示所述具体取值范围Ud=Gi的所述控制信号,并向所述选择器发送所述控制信号;所述选择器具体用于根据所述比较器发送的所述控制信号,从所述电源电压模块提供的所述一组伽马基准电压信号中选出第i-1伽马基准电压信号与第i+1伽马基准电压信号,分别作为所述缓冲放大器的所述正电源电压信号与所述负电源电压信号,所述正电源电压信号的所述Vb=Gi-1,所述负电源电压信号的所述Va=Gi+1,其中,i=2,3,4,…,n-1。
其中,所述比较器确定的所述具体取值范围为Ud∈(Gi,Gi+1),所述比较器生成指示所述具体取值范围Ud∈(Gi,Gi+1)的所述控制信号,并向所述选择器发送所述控制信号;所述选择器具体用于根据所述比较器发送的所述控制信号,从所述电源电压模块提供的所述一组伽马基准电压信号中选出第i伽马基准电压信号与第i+1伽马基准电压信号,分别作为所述缓冲放大器的所述正电源电压信号与所述负电源电压信号,所述正电源电压信号的所述Vb=Gi,所述负电源电压信号的所述Va=Gi+1,其中,i=1,2,3,…,n-1。
其中,所述比较器确定的所述具体取值范围为Ud=G1;所述选择器具体用于选出所述电源电压模块提供的所述第二电源电压信号作为所述缓冲放大器的所述正电源电压信号;以及从所述电源电压模块提供的所述一组伽马基准电压信号中选出第2伽马基准电压信号,作为所述缓冲放大器的所述负电源电压信号,所述正电源电压信号的所述Vb=Ub,所述负电源电压信号的所述Va=G2。
其中,所述比较器确定的所述具体取值范围为Ud=Gn;所述选择器具体用于从所述电源电压模块提供的所述一组伽马基准电压信号中选出第n-1伽马基准电压信号,作为所述缓冲放大器的所述正电源电压信号;以及选出所述电源电压模块提供的所述第一电源电压信号,作为所述缓冲放大器的所述负电源电压信号,所述正电源电压信号的所述Vb=Gn-1,所述负电源电压信号的所述Va=Ua。
其中,所述伽马基准电压模块提供的所述一组伽马基准电压信号包括14个伽马基准电压信号。
一种液晶面板的驱动方法,包括:数字信号模块向比较器与数模转换器发送数字输入信号,所述数字输入信号具有数字输入信号电压Ud;伽马基准电
压模块向所述比较器发送一组伽马基准电压信号,所述一组伽马基准电压信号具有一组伽马基准电压{G1,G2,...Gi,…,Gn},其中第i伽马基准电压信号具有第i伽马基准电压Gi,n为大于1的正整数,所述{G1,G2,...Gi,…,Gn}从G1到Gn依次按降序排列,G1≤Ud≤Gn;所述比较器接收所述数字输入信号,以及所述一组伽马基准电压信号;将所述数字输入信号与所述一组伽马基准电压信号进行比较,以确定所述Ud在所述{G1,G2,...Gi,…,Gn}中的具体取值范围;生成指示所述具体取值范围的控制信号,并向选择器发送所述控制信号;电源电压模块向所述选择器发送所述一组伽马基准电压信号、第一电源电压信号和第二电源电压信号,所述第一电源电压信号具有第一电源电压Ua,所述第二电源电压信号具有第二电源电压Ub,其中0≤Ua<Ud<Ub,且当Ua=0时,Ua<Gn,Ub<G1;当Ua>0时,Ua>Gn,Ub>G1;所述选择器接收所述控制信号、所述一组伽马基准电压信号、所述第一电源电压信号以及所述第二电源电压信号;根据所述控制信号从所述一组伽马基准电压信号、所述第一电源电压信号以及所述第二电源电压信号中选出两个信号,分别作为缓冲放大器的正电源电压信号与负电源电压信号,所述正电源电压信号与所述负电源电压信号不同时分别取所述第一电源电压信号与所述第二电源电压信号,所述正电源电压信号具有正电源电压Vb,所述负电源电压信号具有负电源电压Va,使得Va<Ud<Vb,且Vb-Va<Ub-Ua;向缓冲放大器发送所述正电源电压信号与所述负电源电压信号;所述数模转换器接收所述数字输入信号;对所述数字输入信号进行数模转换得到模拟输入信号,并向所述缓冲放大器发送所述模拟输入信号;所述缓冲放大器接收所述正电源电压信号、所述负电源电压信号以及所述模拟输入信号,并进行信号处理。
其中,所述Vb与所述Va进一步还满足:Vb≤Ub,Va≤Ua,且所述Vb与所述Va不同时分别取所述Ub与所述Ua。
其中,当所述控制信号指示的所述具体取值范围为Ud=Gi时,所述选择器根据所述控制信号从所述一组伽马基准电压信号中选出第i-1伽马基准电压信号与第i+1伽马基准电压信号,分别作为所述缓冲放大器的所述正电源电压信号与所述负电源电压信号,其中,Vb=Gi-1,Va=Gi+1,i=2,3,4,…,n-1。
其中,当所述控制信号指示的所述具体取值范围为Ud∈(Gi,Gi+1)时,所
述选择器根据所述控制信号从所述一组伽马基准电压信号中选出第i伽马基准电压信号与第i+1伽马基准电压信号,分别作为所述缓冲放大器的所述正电源电压信号与所述负电源电压信号,其中,Vb=Gi,Va=Gi+1,i=1,2,3,…,n-1。
其中,当所述控制信号指示的所述具体取值范围为Ud=G1时,所述选择器根据所述控制信号选出所述第二电源电压信号,作为所述缓冲放大器的所述正电源电压信号;以及根据所述控制信号从所述一组伽马基准电压信号中选出第2伽马基准电压信号,作为所述缓冲放大器的所述负电源电压信号,其中,Vb=Ub,Va=G2。
其中,当所述控制信号指示的所述具体取值范围为Ud=Gn时,所述选择器根据所述控制信号从所述一组伽马基准电压信号中选出第n-1伽马基准电压信号,作为所述缓冲放大器的所述正电源电压信号;以及根据所述控制信号选出所述第一电源电压信号,作为所述缓冲放大器的所述负电源电压信号,其中,Vb=Gn-1,Va=Ua。
其中,所述一组伽马基准电压信号包括14个伽马基准电压信号。
由此,本发明提供的液晶面板的数据驱动电路及驱动方法,比较器将数字输入信号与一组伽马基准电压信号进行比较以确定数字输入信号电压在一组伽马基准电压中的具体取值范围,然后生成指示所述具体取值范围的控制信号。选择器根据所述控制信号,从一组伽马基准电压信号、第一电源电压信号及第二电源电压信号中选出两个信号,分别作为缓冲放大器的正电源电压信号与负电源信号。其中,所述正电源电压信号与所述负电源信号不同时分别取所述第二电源电压信号及所述第一电源电压信号,且使得所述缓冲放大器的正电源电压与负电源电压的压差小于采用半压驱动方式下的正电源电压与负电源电压的压差,从而减小了所述缓冲放大器的功耗,降低了所述缓冲放大器以及整个数据驱动电路的温升,进而提升了液晶面板的可靠性。
为了更清楚地说明本发明实施例中的技术方案,下面将对实施例中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还
可以根据这些附图获得其他的附图。
图1是现有技术中采用半压驱动方式加载电源电压的缓冲放大器的结构示意图。
图2是本发明实施例提供的数据驱动电路的结构示意图。
图3是图2中的电源电压模块所能提供的各电压信号的电压在数轴上的位置关系示意图。
图4是图2中的缓冲放大器的结构示意图。
图5是图2中的选择器选择出的正电源电压信号的正电源电压与负电源电压信号的负电源电压在数轴上的位置示意图。
图6是图2中的选择器选择出的正电源电压信号的正电源电压与负电源电压信号的负电源电压在数轴上的又一位置示意图。
图7是图2中的选择器选择出的正电源电压信号的正电源电压与负电源电压信号的负电源电压在数轴上的又一位置示意图。
图8是图2中的选择器选择出的正电源电压信号的正电源电压与负电源电压信号的负电源电压在数轴上的又一位置示意图。
图9是图2中的选择器选择出的正电源电压信号的正电源电压与负电源电压信号的负电源电压在数轴上的又一位置示意图。
图10是图2中的选择器选择出的正电源电压信号的正电源电压与负电源电压信号的负电源电压在数轴上的又一位置示意图。
图11是本发明实施例提供的驱动方法的示意性流程图。
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
目前,液晶面板的数据驱动电路(Source drive IC)末端由缓冲放大器构成。数据驱动电路驱动像素负载,其在工作时将消耗功率、产生热量。而整个数据驱动电路的大部分功耗都集中在缓冲放大器上,因此需要考虑降低缓冲放
大器功耗的电路设计。
通常,缓冲放大器具有信号输入端、信号输出端、正电源电压端和负电源电压端。之前的技术中,正电源电压为AVDD,负电源电压为GND。缓冲放大器上的功耗取决于正、负电源电压的压差,而上述缓冲放大器的电源电压加载方式中,由于正、负电源电压的压差很大,即AVDD-GND的结果较大,因此缓冲放大器的功耗很高。
现有技术中为了达到上述降功耗的目的,采用半压驱动的方式加载缓冲放大器的电源电压。具体的,如图1所示,在缓冲放大器的一种电源电压加载方式中,缓冲放大器的输入端电压为Ud,输出端电压为Yn,正电源电压为AVDD,负电源电压为hAVDD,负电源电压hAVDD约等于正电源电压AVDD的一半。通过在AVDD与GND之间再建立一个电压基准位置hAVDD,使得AVDD-hAVDD的结果相比AVDD-GND较小,从而减少了压差,降低了缓冲放大器的功耗。但是,随着液晶面板的尺寸及解析度不断增加,数据驱动电路所要驱动的像素负载也越来越大,缓冲放大器的功耗随之增大、数据驱动电路的温度上升。而现有的半压驱动方式已经不足以应对功耗大幅增加的问题,这将导致液晶面板产品的可靠性大大降低。
如图2所示,本发明第一实施例的液晶面板的数据驱动电路100包括:数字信号模块101、比较器102、伽马基准电压模块103、电源电压模块104、选择器105、数模转换器106以及缓冲放大器107。
其中,数字信号模块101与比较器102、数模转换器106均电连接,用于提供数字输入信号,并向比较器102与数模转换器106发送所述数字输入信号。所述数字输入信号包括携带有颜色信息的数字信号,所述数字输入信号具有数字输入信号电压Ud。
伽马基准电压模块103与比较器102电性相连,用于提供一组伽马基准电压信号,并向比较器102发送所述一组伽马基准电压信号。所述一组伽马基准电压信号具有一组伽马基准电压{G1,G2,...Gi,…,Gn},n为大于1的正整数。其中第i伽马基准电压信号具有第i伽马基准电压Gi。所述{G1,G2,...Gi,…,Gn}从G1到Gn依次按降序排列。所述一组伽马基准电压为液晶面板进行灰阶显示的一组参考电压。本实施例中,所述一组伽马基准电压信号包括14个伽马基准电压信号;相应的,所述一组伽马基准电压包括14个伽马基准电压。例
如,G1=15V,G2=14V,G3=13V,G7=7V,G14=1V。各伽马基准电压Gi的具体值根据实际情况予以确定,并不限于上述描述中所列举的数值。在其他实施例中,根据实际情况,所述一组伽马基准电压信号可以包括其他数量的伽马基准电压信号;相应的,所述一组伽马基准电压可以包括其他数量的伽马基准电压。例如,所述一组伽马基准电压信号中包括16或20个伽马基准电压信号,所述一组伽马基准电压包括16或20个伽马基准电压。
在本发明描述的数据驱动电路中,缓冲放大器对输入的数字输入信号电压Ud做1:1的放大,即缓冲放大器的输出端电压Yn与数字输入信号电压Ud相等。而通常,输出端电压Yn与所述一组伽马基准电压{G1,G2,...Gi,…,Gn}具有如下关系:G1≤Yn≤Gn。具体而言,Yn可以介于{G1,G2,...Gi,…,Gn}中任意两个相邻的伽马基准电压之间;还可以为{G1,G2,...Gi,…,Gn}中的任一伽马基准电压。因此,数字输入信号电压Ud与所述一组伽马基准电压{G1,G2,...Gi,…,Gn}也具有如下关系:G1≤Ud≤Gn。即Ud可以介于{G1,G2,...Gi,…,Gn}中任意两个相邻的伽马基准电压之间;还可以为{G1,G2,...Gi,…,Gn}中的任一伽马基准电压。
比较器102与数字信号模块101、伽马基准电压模块103以及选择器105均电连接。比较器102用于接收数字信号模块101发送的所述数字输入信号,以及伽马基准电压模块103发送的所述一组伽马基准电压信号;在接收所述数字输入信号与所述一组伽马基准电压信号之后,将所述数字输入信号与所述一组伽马基准电压信号进行比较,以确定所述Ud在所述{G1,G2,...Gi,…,Gn}中的具体取值范围;生成指示所述具体取值范围的控制信号,并向选择器105发送所述控制信号。具体的,比较器102对接收到的所述数字输入信号与所述一组伽马基准电压信号进行逻辑比较运算,以确定所述具体取值范围。所述具体取值范围是指Ud在{G1,G2,...Gi,…,Gn}中的具体取值位置,即Ud介于{G1,G2,...Gi,…,Gn}中的某两个相邻的伽马基准电压之间;或等于{G1,G2,...Gi,…,Gn}中的某个伽马基准电压。比较器102确定所述具体取值范围后,生成指示所述具体取值范围的控制信号,并向选择器105发送所述控制信号,以控制选择器105进行下一步的信号处理。
电源电压模块104与选择器105电性连接。电源电压模块104用于向选择器105提供所述一组伽马基准电压信号、第一电源电压信号和第二电源电压信
号。其中,电源电压模块104可通过数据驱动电路100中的其他电路单元获得所述一组伽马基准电压信号,电源电压模块104获取并提供的所述一组伽马基准电压信号,与伽马基准电压模块103所能提供的所述一组伽马基准电压信号相同。优选的,在其他本实施例中,电源电压模块104还与伽马基准电压模块103电性相连,电源电压模块104从伽马基准电压模块103获取所述一组伽马基准电压信号。
所述第一电源电压信号与所述第二电源电压信号均为缓冲放大器107采用半压驱动方式时加载的电源电压。其中,所述第一电源电压信号为缓冲放大器107采用半压驱动方式时的负电源电压信号,所述第一电源电压信号具有第一电源电压Ua。所述第二电源电压信号为缓冲放大器107采用半压驱动方式时的正电源电压信号,所述第二电源电压信号具有第二电源电压Ub。其中Ud、{G1,G2,...Gi,…,Gn}、Ua及Ub满足:0≤Ua<Ud<Ub,且当Ua=0时,Ua<Gn,Ub<G1;当Ua>0时,Ua>Gn,Ub>G1。
具体的,由于液晶面板中的液晶需要使用极性反转的方式驱动,即在不同的时间,施加在液晶上的电场方向相反。因此缓冲放大器107也需提供正、负两种极性的输出电压以驱动液晶。并且,缓冲放大器107的输出端电压Yn介于正电源电压与负电源电压之间(即数字输入信号电压Ud介于正电源电压与负电源电压之间)。由此,在采用半压驱动的情况下,需要提供正极性的输出电压时,缓冲放大器107的正电源电压端加载正电源电压AVDD、负电源电压端加载负电源电压hAVDD,此时有0<hAVDD<Ud<AVDD;需要提供负极性的输出电压时,缓冲放大器107的正电源电压端加载正电源电压hAVDD、负电源电压端加载负电源电压GND,此时有0=GND<Ud<hAVDD。综合可得0≤Ua<Ud<Ub。AVDD与hAVDD为缓冲放大器107的常规电源电压数值,其根据实际需要予以确定。本实施例中,AVDD=16V,hAVDD≈8V,但是应理解,本发明实际上并不限于此。
图3示出了缓冲放大器107的电源电压AVDD、hAVDD及GND,与所述一组伽马基准电压{G1,G2,...Gi,…,Gn}在数轴上的大小关系。结合图3可知如下关系式:当Ua=GND=0时,Ua=GND<Gn,Ub=hAVDD<G1,此时缓冲放
大器107提供负极性的输出电压;当Ua=hAVDD>0时,Ua=hAVDD>Gn,Ub=AVDD>G1,此时缓冲放大器107提供正极性的输出电压。
因此综上可得:0≤Ua<Ud<Ub,且当Ua=0时,Ua<Gn,Ub<G1;当Ua>0时,Ua>Gn,Ub>G1。
选择器105与比较器102、电源电压模块104及缓冲放大器107均电连接。选择器105用于接收比较器102发送的所述控制信号,以及电源电压模块104发送的所述一组伽马基准电压信号、所述第一电源电压信号与所述第二电源电压信号;根据所述控制信号从所述一组伽马基准电压信号、所述第一电源电压信号以及所述第二电源电压信号中选出两个信号,分别作为所述缓冲放大器的正电源电压信号与负电源电压信号,所述正电源电压信号与所述负电源电压信号不同时分别取所述第一电源电压信号与所述第二电源电压信号,所述正电源电压信号具有正电源电压Vb,所述负电源电压信号具有负电源电压Va,使得Va<Ud<Vb,且Vb-Va<Ub-Ua;向缓冲放大器107发送所述正电源电压信号与所述负电源电压信号。
具体而言,所述控制信号指示了Ud的所述具体取值范围。选择器105根据所述控制信号所携带的Ud的所述具体取值范围,从所述一组伽马基准电压信号选择两个信号分别作为缓冲放大器107的正电源电压信号与负电源电压信号;或者从所述一组伽马基准电压信号选择一个信号作为所述正电源电压信号或所述负电源电压信号,再从所述第一电源电压信号与所述第二电源电压信号中选择一个信号作为所述负电源电压信号或所述正电源电压信号。但不能同时选择所述第一电源电压信号与所述第二电源电压信号分别作为所述负电源电压信号与所述正电源电压信号。如图4所示,由于选择器105选出的所述正电源电压信号与所述负电源电压信号均来源于电源电压模块104,由上所述,所述数字输入信号电压Ud与所述正电源电压信号的正电源电压Vb,以及所述负电源电压信号的负电源电压Va满足如下关系式:Va<Ud<Vb。而要保证此时缓冲放大器107电源电压的压差小于采用半压驱动时的压差,只需满足Vb-Va<Ub-Ua即可。
本发明实施例中,在满足上述关系式Vb-Va<Ub-Ua的前提下,Vb<Ub且Va>Ua,此时Vb与Va分别为所述{G1,G2,...Gi,…,Gn}中的两个伽马基准电压;或者Vb=Ub且Va>Ua,此时Vb为所述第二电源电压Ub,Va为所述
{G1,G2,...Gi,…,Gn}的一个伽马基准电压;或者Vb<Ub且Va=Ua,此时Vb为所述{G1,G2,...Gi,…,Gn}中的一个伽马基准电压,Va为所述第一电源电压Ua。
如图5所示,优选的,在本发明实施例的第一种实施方式中,比较器102确定的所述具体取值范围为Ud=Gi,之后比较器102生成指示所述具体取值范围Ud=Gi的所述控制信号,并向选择器105发送所述控制信号。此时,选择器105具体用于根据比较器102发送的所述控制信号,从电源电压模块104提供的所述一组伽马基准电压信号{G1,G2,...Gi,…,Gn}中选出第i-1伽马基准电压信号与第i+1伽马基准电压信号,分别作为缓冲放大器107的所述正电源电压信号与所述负电源电压信号。其中,Vb=Gi-1,Va=Gi+1,i=2,3,4,…,n-1。即,Vb与Va在数轴上分别分布于与Ud相邻的两侧。例如,本实施例中,将采用半压驱动方式的缓冲放大器107上加载的正、负电源电压压差AVDD-hAVDD作为比较对象,则有:Gb=AVDD=16V,Ga=hAVDD≈8V,n=14。当i=5时,Ud=G5=11V,Vb=G4=12V,Va=G6=10V,则Vb-Va=G4-G6=12V-10V=2V;而Gb-Ga=AVDD-hAVDD≈16V-8V≈8V。由计算可知,Vb-Va<AVDD-hAVDD。又例如,当i=2时,Ud=G2=14V,Vb=G1=15V,Va=G3=13V,则Vb-Va=G1-G3=15V-13V=2V;而Gb-Ga=AVDD-hAVDD≈16V-8V≈8V。同样的,由计算可知,Vb-Va<AVDD-hAVDD。再例如,当i=13时,Ud=G13=2V,Vb=G12=3V,Va=G14=1V,则Vb-Va=G12-G14=3V-1V=2V;而Gb-Ga=AVDD-hAVDD≈16V-8V≈8V。同样的,由计算可知,Vb-Va<AVDD-hAVDD。由此可见,缓冲放大器107上的电源电压的压差Vb-Va<AVDD-hAVDD。类似的,将采用半压驱动方式的缓冲放大器107上加载的正、负电源电压压差hAVDD-GND作为比较对象,同样会得出Vb-Va<hAVDD-GND。为了简洁,此处不再重新举例描述。从而,本实施例的数据驱动电路100,选择器105选择两个伽马基准电压信号作为缓冲放大器107的正、负电源电压信号,并且使得所述正、负电源电压信号的电压分别在数轴上位于数字输入信号电压Ud相邻的两侧,就能够减小缓冲放大器107上加载的正、负电源电压压差,从而降低缓冲放大器107的功耗。
如图6所示,优选的,在本发明实施例的第二种实施方式中,与上述第一种实施方式不同的是,比较器102确定的所述具体取值范围为Ud∈(Gi,Gi+1),
此时,选择器105具体用于根据比较器102发送的所述控制信号,从电源电压模块104提供的所述一组伽马基准电压信号{G1,G2,...Gi,…,Gn}中选出第i伽马基准电压信号与第i+1伽马基准电压信号,分别作为缓冲放大器107的所述正电源电压信号与所述负电源电压信号。其中,Vb=Gi,Va=Gi+1,i=1,2,3,…,n-1。即,Vb与Va在数轴上分别分布于与Ud相邻的两侧。与上述分析类似,本实施方式中的数据驱动电路100,选择器105选择两个伽马基准电压信号作为缓冲放大器107的正、负电源电压信号,并且使得所述正、负电源电压信号的电压分别在数轴上位于数字输入信号电压Ud相邻的两侧,就能够减小缓冲放大器107上加载的正、负电源电压压差,从而降低缓冲放大器107的功耗。为了简洁,再次不再重新举例说明。
如图7所示,优选的,在本发明实施例的第三种实施方式中,与上述第一种实施方式不同的是,比较器102确定的所述具体取值范围为Ud=G1,选择器105具体用于根据比较器102发送的所述控制信号,选出电源电压模块104提供的所述第二电源电压信号作为缓冲放大器107的所述正电源电压信号;以及从电源电压模块104提供的所述一组伽马基准电压信号中选出第2伽马基准电压信号,作为缓冲放大器107的所述负电源电压信号。其中,Vb=Ub=AVDD,Va=G2。即,Vb与Va在数轴上分别分布于与Ud相邻的两侧。与上述分析类似,本实施方式中的数据驱动电路100,选择器105选择两个伽马基准电压信号作为缓冲放大器107的正、负电源电压信号,并且使得所述正、负电源电压信号的电压分别在数轴上位于数字输入信号电压Ud相邻的两侧,就能够减小缓冲放大器107上加载的正、负电源电压压差,从而降低缓冲放大器107的功耗。为了简洁,此处不再重新举例说明。
如图8所示,优选的,在本发明实施例的第四种实施方式中,与上述第一种实施方式不同的是,比较器102确定的所述具体取值范围为Ud=Gn,选择器105具体用于根据比较器102发送的所述控制信号,选出电源电压模块104提供的所述第一电源电压信号作为缓冲放大器107的所述负电源电压信号;以及从电源电压模块104提供的所述一组伽马基准电压信号中选出第n-1伽马基准电压信号,作为缓冲放大器107的所述正电源电压信号。其中,Vb=Gn-1,Va=Ua=GND。即,Vb与Va在数轴上分别分布于与Ud相邻的两侧。与上述
分析类似,本实施方式中的数据驱动电路100,选择器105选择两个伽马基准电压信号作为缓冲放大器107的正、负电源电压信号,并且使得所述正、负电源电压信号的电压分别在数轴上位于数字输入信号电压Ud相邻的两侧,就能够减小缓冲放大器107上加载的正、负电源电压压差,从而降低缓冲放大器107的功耗。为了简洁,此处不再重新举例说明。
数模转换器106与数字信号模块101及缓冲放大器107均电连接。数模转换器106用于接收数字信号模块101发送的所述数字输入信号;对所述数字输入信号进行数模转换得到模拟输入信号,并向缓冲放大器107发送所述模拟输入信号。
缓冲放大器107与数模转换器106及选择器105均电连接。缓冲放大器107用于接收选择器105发送的所述正电源电压信号、所述负电源电压信号,以及数模转换器106发送的所述模拟输入信号,并进行相应的信号处理。由上所述,本实施例中,缓冲放大器107的正电源电压与负电源电压的压差小于采用半压驱动方式下的正电源电压与负电源电压压差。因此缓冲放大器107的功耗得以降低。
因此,本发明第一实施例的数据驱动电路,比较器将数字输入信号与一组伽马基准电压信号进行比较以确定数字输入信号电压在一组伽马基准电压中的具体取值范围,然后生成指示所述具体取值范围的控制信号。选择器根据所述控制信号,从一组伽马基准电压信号、第一电源电压信号及第二电源电压信号中选出两个信号,分别作为缓冲放大器的正电源电压信号与负电源信号。其中,所述正电源电压信号与所述负电源信号不同时分别取所述第二电源电压信号及所述第一电源电压信号,且使得所述缓冲放大器的正电源电压与负电源电压的压差小于采用半压驱动方式下的正电源电压与负电源电压的压差,从而减小了所述缓冲放大器的功耗,降低了所述缓冲放大器以及整个数据驱动电路的温升,进而提升了液晶面板的可靠性。
在本发明的第二实施例中,在满足上述第一实施例的关系式Vb-Va<Ub-Ua的前提下,与上述第一实施例不同的是:Vb-Va的电压区间可以与Ub-Ua的电压区间相交叠,Ud位于两个电压区间交叠的部分内。
具体的,在本第二实施例的第一种实施方式中,如图9所示,若采用半压驱动方式,当缓冲放大器107提供负极性的输出电压时,如上所述,Ua=GND,Ub=hAVDD,而本实施方式中有Ua<Va<Ub<Vb。此时,Vb与Va分别为所述{G1,G2,...Gi,…,Gn}中的两个伽马基准电压。此种情况下,选择器105选择所述一组伽马基准电压信号中的两个伽马基准电压信号,分别作为所述正电源电压信号与所述负电源电压信号,并保证正、负电源电压的压差Vb-Va比采用半压驱动方式时正、负电源电压的压差hAVDD-GND小,就能够降低缓冲放大器107的功耗。
或者,具体的,在本第二实施例的第二种实施方式中,如图10所示,若采用半压驱动方式,当缓冲放大器107提供正极性的输出电压时,如上所述,Ua=hAVDD,Ub=AVDD。而而本实施方式中有Va<Ua<Vb<Ub。此时Vb与Va分别为所述{G1,G2,...Gi,…,Gn}中的两个伽马基准电压。同样的,在此种情况下,选择器105选择所述一组伽马基准电压信号中的两个伽马基准电压信号,分别作为所述正电源电压信号与所述负电源电压信号,并保证正、负电源电压的压差Vb-Va比采用半压驱动方式时正、负电源电压的压差AVDD-hAVDD小,就能够降低缓冲放大器107的功耗。
因此,本发明第二实施例的数据驱动电路,比较器将数字输入信号与一组伽马基准电压信号进行比较以确定数字输入信号电压在一组伽马基准电压中的具体取值范围,然后生成指示所述具体取值范围的控制信号。选择器根据所述控制信号,从一组伽马基准电压信号中选出两个信号,分别作为缓冲放大器的正电源电压信号与负电源信号,使得所述缓冲放大器的正电源电压与负电源电压的压差小于采用半压驱动方式下的正电源电压与负电源电压的压差,从而减小了所述缓冲放大器的功耗,降低了所述缓冲放大器以及整个数据驱动电路的温升,进而提升了液晶面板的可靠性。
上文结合图1至图10,详细描述了本发明实施例提供的液晶面板的数据驱动电路。下文将结合图11描述本发明实施例提供的液晶面板的驱动方法。
如图11所示,本发明方法实施例提供的液晶面板的驱动方法200包括:
S210,数字信号模块向比较器与数模转换器发送数字输入信号,所述数字输入信号具有数字输入信号电压Ud;
S220,伽马基准电压模块向所述比较器发送一组伽马基准电压信号,所述一组伽马基准电压信号具有一组伽马基准电压{G1,G2,...Gi,…,Gn},其中第i伽马基准电压信号具有第i伽马基准电压Gi,n为大于1的正整数,所述{G1,G2,...Gi,…,Gn}从G1到Gn依次按降序排列,G1≤Ud≤Gn;
S230,所述比较器接收所述数字输入信号,以及所述一组伽马基准电压信号;将所述数字输入信号与所述一组伽马基准电压信号进行比较,以确定所述Ud在所述{G1,G2,...Gi,…,Gn}中的具体取值范围;生成指示所述具体取值范围的控制信号,并向选择器发送所述控制信号;
S240,电源电压模块向所述选择器发送所述一组伽马基准电压信号、第一电源电压信号和第二电源电压信号,所述第一电源电压信号具有第一电源电压Ua,所述第二电源电压信号具有第二电源电压Ub,其中0≤Ua<Ud<Ub,且当Ua=0时,Ua<Gn,Ub<G1;当Ua>0时,Ua>Gn,Ub>G1;
S250,所述选择器接收所述控制信号、所述一组伽马基准电压信号、所述第一电源电压信号以及所述第二电源电压信号;根据所述控制信号从所述一组伽马基准电压信号、所述第一电源电压信号以及所述第二电源电压信号中选出两个信号,分别作为缓冲放大器的正电源电压信号与负电源电压信号,所述正电源电压信号与所述负电源电压信号不同时分别取所述第一电源电压信号与所述第二电源电压信号,所述正电源电压信号具有正电源电压Vb,所述负电源电压信号具有负电源电压Va,使得Va<Ud<Vb,且Vb-Va<Ub-Ua;向缓冲放大器发送所述正电源电压信号与所述负电源电压信号;
S260,所述数模转换器接收所述数字输入信号;对所述数字输入信号进行数模转换得到模拟输入信号,并向所述缓冲放大器发送所述模拟输入信号;
S270,所述缓冲放大器接收所述正电源电压信号、所述负电源电压信号以及所述模拟输入信号,并进行信号处理。
具体的,所述数字信号模块向所述比较器发送数字输入信号,所述伽马基准电压模块向所述比较器发送一组伽马基准电压信号,所述比较器接收上述两种信号后,对其进行比较运算,以确定所述Ud在所述{G1,G2,...Gi,…,Gn}中的具体取值范围。所述具体取值范围是指所述Ud在所述{G1,G2,...Gi,…,Gn}中的具体取值位置,所述具体取值范围包括如下两种情况之一:Ud介于
{G1,G2,...Gi,…,Gn}中的某两个相邻的伽马基准电压之间,或者Ud等于{G1,G2,...Gi,…,Gn}中的某个伽马基准电压。所述比较器确定所述具体取值范围后,生成指示所述具体取值范围的控制信号,并向所述选择器发送所述控制信号。所述电源电压模块向所述比较器发送所述一组伽马基准电压信号、所述第一电源电压信号和所述第二电源电压信号。所述第一电源电压信号为所述缓冲放大器采用半压驱动方式时的负电源电压信号,所述第一电源电压信号具有第一电源电压Ua,Ua可取GND(即0)或hAVDD。所述第二电源电压信号为所述缓冲放大器采用半压驱动方式时的正电源电压信号,所述第二电源电压信号具有第二电源电压Ub,Ub可取hAVDD或AVDD。其中Ud、{G1,G2,...Gi,…,Gn}、Ua及Ub满足:0≤Ua<Ud<Ub,且当Ua=0时,Ua<Gn,Ub<G1;当Ua>0时,Ua>Gn,Ub>G1。所述选择器接收所述控制信号、所述一组伽马基准电压信号、所述第一电源电压信号以及所述第二电源电压信号后,根据所述控制信号,从所述一组伽马基准电压信号、所述第一电源电压信号以及所述第二电源电压信号中选出两个信号,分别作为所述缓冲放大器的正电源电压信号与负电源电压信号,并使得所述缓冲放大器的正电源电压Vb与负电源电压Va满足如下关系:Va<Ud<Vb,且Vb-Va<Ub-Ua。同时,所述正电源电压信号与所述负电源电压信号不同时分别取所述第一电源电压信号与所述第二电源电压信号。所述数字信号模块也向所述数模转换器发送所述数字输入信号,所述数模转换器接收所述数字输入信号后,对所述数字输入信号进行数模转换处理,以生成模拟输入信号,并向所述缓冲放大器发送所述模拟输入信号。所述缓冲放大器的正、负电源电压端分别加载所述正电源电压信号与负电源电压信号,所述缓冲放大器的信号输入端接收所述模拟输入信号,并对所述模拟输入信号进行相应的信号处理。
由此,本发明方法实施例的驱动方法200,比较器将数字输入信号与一组伽马基准电压信号进行比较以确定数字输入信号电压在一组伽马基准电压中的具体取值范围,然后生成指示所述具体取值范围的控制信号。选择器根据所述控制信号,从一组伽马基准电压信号、第一电源电压信号及第二电源电压信号中选出两个信号,分别作为缓冲放大器的正电源电压信号与负电源信号。其中,所述正电源电压信号与所述负电源信号不同时分别取所述第二电源电压信号及所述第一电源电压信号,且使得所述缓冲放大器的正电源电压与负电源电
压的压差小于采用半压驱动方式下的正电源电压与负电源电压的压差,从而减小了所述缓冲放大器的功耗,降低了所述缓冲放大器以及整个数据驱动电路的温升,进而提升了液晶面板的可靠性。
本方法实施例中,在S250中,优选的,所述Vb与所述Va进一步还满足:Vb≤Ub,Va≤Ua,且所述Vb与所述Va不同时分别取所述Ub与所述Ua。
进一步的,在S230中,所述控制信号指示的所述具体取值范围为Ud=Gi。相应的,在S250中,所述选择器根据所述控制信号从所述一组伽马基准电压信号中选出第i-1伽马基准电压信号与第i+1伽马基准电压信号,分别作为所述缓冲放大器的所述正电源电压信号与所述负电源电压信号,其中,Vb=Gi-1,Va=Gi+1,i=2,3,4,…,n-1。
或者,进一步的,在S230中,所述控制信号指示的所述具体取值范围为Ud∈(Gi,Gi+1)。相应的,在S250中,所述选择器根据所述控制信号从所述一组伽马基准电压信号中选出第i伽马基准电压信号与第i+1伽马基准电压信号,分别作为所述缓冲放大器的所述正电源电压信号与所述负电源电压信号,其中,Vb=Gi,Va=Gi+1,i=1,2,3,…,n-1。
或者,进一步的,在S230中,所述控制信号指示的所述具体取值范围为Ud=G1。相应的,在S250中,所述选择器根据所述控制信号选出所述第二电源电压信号,作为所述缓冲放大器的所述正电源电压信号;以及根据所述控制信号从所述一组伽马基准电压信号中选出第2伽马基准电压信号,作为所述缓冲放大器的所述负电源电压信号,其中,Vb=Ub=AVDD,Va=G2。
或者,进一步的,在S230中,所述控制信号指示的所述具体取值范围为Ud=Gn。相应的,在S250中,所述选择器根据所述控制信号从所述一组伽马基准电压信号中选出第n-1伽马基准电压信号,作为所述缓冲放大器的所述正电源电压信号;以及根据所述控制信号选出所述第一电源电压信号,作为所述缓冲放大器的所述负电源电压信号,其中,Vb=Gn-1,Va=Ua=GND。
或者,本方法实施例中,在S250中,优选的,在满足上述关系式Vb-Va<Ub-Ua的前提下,进一步的,Vb-Va的电压区间可以与Ub-Ua的电压区间相交叠,Ud位于两个电压区间交叠的部分内。
具体的,Ua=GND,Ub=hAVDD,Ua<Va<Ub<Vb。此时,Vb与Va分别为所述{G1,G2,...Gi,…,Gn}中的两个伽马基准电压。此种情况下,所述选择器选择所述一组伽马基准电压信号中的两个伽马基准电压信号,分别作为所述正电源电压信号与所述负电源电压信号,并保证正、负电源电压的压差Vb-Va比采用半压驱动方式时正、负电源电压的压差hAVDD-GND小,就能够降低所述缓冲放大器的功耗。
或者,具体的,Ua=hAVDD,Ub=AVDD,Va<Ua<Vb<Ub。此时Vb与Va分别为所述{G1,G2,...Gi,…,Gn}中的两个伽马基准电压。同样的,在此种情况下,所述选择器选择所述一组伽马基准电压信号中的两个伽马基准电压信号,分别作为所述正电源电压信号与所述负电源电压信号,并保证正、负电源电压的压差Vb-Va比采用半压驱动方式时正、负电源电压的压差AVDD-hAVDD小,就能够降低缓冲放大器107的功耗。
可以理解的是,本发明方法实施例的驱动方法200中的各个执行主体可对应于本发明装置实施例的数据驱动电路100中的各个模块,并且驱动方法200的相应流程分别由数据驱动电路100中的各个模块的上述和其他操作和/或功能予以实现。为了简洁,在此不再赘述。
以上所述,仅为本发明的具体实施方式,但本发明的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本发明揭露的技术范围内,可轻易的想到各种等效的修改或替换,这些修改或替换都应涵盖在本发明的保护范围之内。因此,本发明的保护范围应以权利要求的保护范围为准。
Claims (14)
- 一种液晶面板的数据驱动电路,其中,包括数字信号模块、伽马基准电压模块、比较器、电源电压模块、选择器、数模转换器以及缓冲放大器;所述数字信号模块用于提供数字输入信号,并向所述比较器与所述数模转换器发送所述数字输入信号,所述数字输入信号具有数字输入信号电压Ud;所述伽马基准电压模块用于提供一组伽马基准电压信号,并向所述比较器发送所述一组伽马基准电压信号,所述一组伽马基准电压信号具有一组伽马基准电压{G1,G2,...Gi,…,Gn},其中第i伽马基准电压信号具有第i伽马基准电压Gi,n为大于1的正整数,所述{G1,G2,...Gi,…,Gn}从G1到Gn依次按降序排列,G1≤Ud≤Gn;所述比较器用于接收所述数字信号模块发送的所述数字输入信号,以及所述伽马基准电压模块发送的所述一组伽马基准电压信号;将所述数字输入信号与所述一组伽马基准电压信号进行比较,以确定所述Ud在所述{G1,G2,...Gi,…,Gn}中的具体取值范围;生成指示所述具体取值范围的控制信号,并向所述选择器发送所述控制信号;所述电源电压模块用于向所述选择器提供所述一组伽马基准电压信号、第一电源电压信号和第二电源电压信号,所述第一电源电压信号具有第一电源电压Ua,所述第二电源电压信号具有第二电源电压Ub,其中0≤Ua<Ud<Ub,且当Ua=0时,Ua<Gn,Ub<G1;当Ua>0时,Ua>Gn,Ub>G1;所述选择器用于接收所述比较器发送的所述控制信号,以及所述电源电压模块发送的所述一组伽马基准电压信号、所述第一电源电压信号与所述第二电源电压信号;根据所述控制信号从所述一组伽马基准电压信号、所述第一电源电压信号以及所述第二电源电压信号中选出两个信号,分别作为所述缓冲放大器的正电源电压信号与负电源电压信号,所述正电源电压信号与所述负电源电压信号不同时分别取所述第一电源电压信号与所述第二电源电压信号,所述正电源电压信号具有正电源电压Vb,所述负电源电压信号具有负电源电压Va,使得Va<Ud<Vb,且Vb-Va<Ub-Ua;向所述缓冲放大器发送所述正电源电压信号与所述负电源电压信号;所述数模转换器用于接收所述数字信号模块发送的所述数字输入信号;对所述数字输入信号进行数模转换得到模拟输入信号,并向所述缓冲放大器发送所述模拟输入信号;所述缓冲放大器用于接收所述选择器发送的所述正电源电压信号、所述负电源电压信号,以及所述数模转换器发送的所述模拟输入信号,并进行信号处理。
- 根据权利要求1所述的数据驱动电路,其中,所述选择器发送的所述正电源电压信号的所述Vb与所述负电源电压信号的所述Va进一步还满足:Vb≤Ub,Va≥Ua,且Vb与Va不同时分别取Ub与Ua。
- 根据权利要求2所述的数据驱动电路,其中,所述比较器确定的所述具体取值范围为Ud=Gi,所述比较器生成指示所述具体取值范围Ud=Gi的所述控制信号,并向所述选择器发送所述控制信号;所述选择器具体用于根据所述比较器发送的所述控制信号,从所述电源电压模块提供的所述一组伽马基准电压信号中选出第i-1伽马基准电压信号与第i+1伽马基准电压信号,分别作为所述缓冲放大器的所述正电源电压信号与所述负电源电压信号,所述正电源电压信号的所述Vb=Gi-1,所述负电源电压信号的所述Va=Gi+1,其中,i=2,3,4,…,n-1。
- 根据权利要求2所述的数据驱动电路,其中,所述比较器确定的所述具体取值范围为Ud∈(Gi,Gi+1),所述比较器生成指示所述具体取值范围Ud∈(Gi,Gi+1)的所述控制信号,并向所述选择器发送所述控制信号;所述选择器具体用于根据所述比较器发送的所述控制信号,从所述电源电压模块提供的所述一组伽马基准电压信号中选出第i伽马基准电压信号与第i+1伽马基准电压信号,分别作为所述缓冲放大器的所述正电源电压信号与所述负电源电压信号,所述正电源电压信号的所述Vb=Gi,所述负电源电压信号的所述Va=Gi+1,其中,i=1,2,3,…,n-1。
- 根据权利要求2所述的数据驱动电路,其中,所述比较器确定的所述具体取值范围为Ud=G1;所述选择器具体用于选出所述电源电压模块提供的所述第二电源电压信 号作为所述缓冲放大器的所述正电源电压信号;以及从所述电源电压模块提供的所述一组伽马基准电压信号中选出第2伽马基准电压信号,作为所述缓冲放大器的所述负电源电压信号,所述正电源电压信号的所述Vb=Ub,所述负电源电压信号的所述Va=G2。
- 根据权利要求2所述的数据驱动电路,其中,所述比较器确定的所述具体取值范围为Ud=Gn;所述选择器具体用于从所述电源电压模块提供的所述一组伽马基准电压信号中选出第n-1伽马基准电压信号,作为所述缓冲放大器的所述正电源电压信号;以及选出所述电源电压模块提供的所述第一电源电压信号,作为所述缓冲放大器的所述负电源电压信号,所述正电源电压信号的所述Vb=Gn-1,所述负电源电压信号的所述Va=Ua。
- 根据权利要求1所述的数据驱动电路,其中,所述伽马基准电压模块提供的所述一组伽马基准电压信号包括14个伽马基准电压信号。
- 一种液晶面板的驱动方法,其中,包括:数字信号模块向比较器与数模转换器发送数字输入信号,所述数字输入信号具有数字输入信号电压Ud;伽马基准电压模块向所述比较器发送一组伽马基准电压信号,所述一组伽马基准电压信号具有一组伽马基准电压{G1,G2,...Gi,…,Gn},其中第i伽马基准电压信号具有第i伽马基准电压Gi,n为大于1的正整数,所述{G1,G2,...Gi,…,Gn}从G1到Gn依次按降序排列,G1≤Ud≤Gn;所述比较器接收所述数字输入信号,以及所述一组伽马基准电压信号;将所述数字输入信号与所述一组伽马基准电压信号进行比较,以确定所述Ud在所述{G1,G2,...Gi,…,Gn}中的具体取值范围;生成指示所述具体取值范围的控制信号,并向选择器发送所述控制信号;电源电压模块向所述选择器发送所述一组伽马基准电压信号、第一电源电压信号和第二电源电压信号,所述第一电源电压信号具有第一电源电压Ua,所述第二电源电压信号具有第二电源电压Ub,其中0≤Ua<Ud<Ub,且当Ua=0时,Ua<Gn,Ub<G1;当Ua>0时,Ua>Gn,Ub>G1;所述选择器接收所述控制信号、所述一组伽马基准电压信号、所述第一电 源电压信号以及所述第二电源电压信号;根据所述控制信号从所述一组伽马基准电压信号、所述第一电源电压信号以及所述第二电源电压信号中选出两个信号,分别作为缓冲放大器的正电源电压信号与负电源电压信号,所述正电源电压信号与所述负电源电压信号不同时分别取所述第一电源电压信号与所述第二电源电压信号,所述正电源电压信号具有正电源电压Vb,所述负电源电压信号具有负电源电压Va,使得Va<Ud<Vb,且Vb-Va<Ub-Ua;向缓冲放大器发送所述正电源电压信号与所述负电源电压信号;所述数模转换器接收所述数字输入信号;对所述数字输入信号进行数模转换得到模拟输入信号,并向所述缓冲放大器发送所述模拟输入信号;所述缓冲放大器接收所述正电源电压信号、所述负电源电压信号以及所述模拟输入信号,并进行信号处理。
- 根据权利要求8所述的驱动方法,其中,所述Vb与所述Va进一步还满足:Vb≤Ub,Va≤Ua,且所述Vb与所述Va不同时分别取所述Ub与所述Ua。
- 根据权利要求9所述的驱动方法,其中,当所述控制信号指示的所述具体取值范围为Ud=Gi时,所述选择器根据所述控制信号从所述一组伽马基准电压信号中选出第i-1伽马基准电压信号与第i+1伽马基准电压信号,分别作为所述缓冲放大器的所述正电源电压信号与所述负电源电压信号,其中,Vb=Gi-1,Va=Gi+1,i=2,3,4,…,n-1。
- 根据权利要求9所述的驱动方法,其中,当所述控制信号指示的所述具体取值范围为Ud∈(Gi,Gi+1)时,所述选择器根据所述控制信号从所述一组伽马基准电压信号中选出第i伽马基准电压信号与第i+1伽马基准电压信号,分别作为所述缓冲放大器的所述正电源电压信号与所述负电源电压信号,其中,Vb=Gi,Va=Gi+1,i=1,2,3,…,n-1。
- 根据权利要求9所述的驱动方法,其中,当所述控制信号指示的所述具体取值范围为Ud=G1时,所述选择器根据所述控制信号选出所述第二电源电压信号,作为所述缓冲放大器的所述正电源电压信号;以及根据所述控制信号从所述一组伽马基准电压信号中选出第2伽马基准电压信号,作为所述缓冲放大器的所述负电源电压信号,其中,Vb= Ub,Va=G2。
- 根据权利要求9所述的驱动方法,其中,当所述控制信号指示的所述具体取值范围为Ud=Gn时,所述选择器根据所述控制信号从所述一组伽马基准电压信号中选出第n-1伽马基准电压信号,作为所述缓冲放大器的所述正电源电压信号;以及根据所述控制信号选出所述第一电源电压信号,作为所述缓冲放大器的所述负电源电压信号,其中,Vb=Gn-1,Va=Ua。
- 根据权利要求8所述的驱动方法,其中,所述一组伽马基准电压信号包括14个伽马基准电压信号。
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007148151A (ja) * | 2005-11-29 | 2007-06-14 | Toshiba Corp | ガンマ補正回路および表示パネル制御回路 |
CN101345026A (zh) * | 2007-07-10 | 2009-01-14 | 联詠科技股份有限公司 | 帧数据缓冲装置以及其相关帧数据取得方法 |
CN105070262A (zh) * | 2015-08-26 | 2015-11-18 | 深圳市华星光电技术有限公司 | 一种源极驱动电路和液晶显示面板 |
CN105575344A (zh) * | 2014-10-08 | 2016-05-11 | 联咏科技股份有限公司 | 源极驱动器、其运作方法及其驱动电路 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7119772B2 (en) * | 1999-04-30 | 2006-10-10 | E Ink Corporation | Methods for driving bistable electro-optic displays, and apparatus for use therein |
JP2010164827A (ja) * | 2009-01-16 | 2010-07-29 | Renesas Electronics Corp | 信号電圧生成回路、ディスプレイパネル駆動装置、及びディスプレイ装置 |
TWI460703B (zh) * | 2012-08-29 | 2014-11-11 | Au Optronics Corp | 驅動電路與顯示器驅動方法 |
CN104143985B (zh) * | 2014-07-25 | 2017-06-23 | 深圳市华星光电技术有限公司 | 数字模拟转换器、可编程伽玛校正缓冲电路及显示装置 |
-
2016
- 2016-05-30 CN CN201610373125.8A patent/CN106097991B/zh active Active
- 2016-06-21 US US15/113,426 patent/US10176767B2/en active Active
- 2016-06-21 WO PCT/CN2016/086640 patent/WO2017206209A1/zh active Application Filing
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007148151A (ja) * | 2005-11-29 | 2007-06-14 | Toshiba Corp | ガンマ補正回路および表示パネル制御回路 |
CN101345026A (zh) * | 2007-07-10 | 2009-01-14 | 联詠科技股份有限公司 | 帧数据缓冲装置以及其相关帧数据取得方法 |
CN105575344A (zh) * | 2014-10-08 | 2016-05-11 | 联咏科技股份有限公司 | 源极驱动器、其运作方法及其驱动电路 |
CN105070262A (zh) * | 2015-08-26 | 2015-11-18 | 深圳市华星光电技术有限公司 | 一种源极驱动电路和液晶显示面板 |
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CN106097991B (zh) | 2018-08-07 |
US10176767B2 (en) | 2019-01-08 |
US20180174530A1 (en) | 2018-06-21 |
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