WO2017183393A1 - Power reception device - Google Patents

Power reception device Download PDF

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Publication number
WO2017183393A1
WO2017183393A1 PCT/JP2017/012281 JP2017012281W WO2017183393A1 WO 2017183393 A1 WO2017183393 A1 WO 2017183393A1 JP 2017012281 W JP2017012281 W JP 2017012281W WO 2017183393 A1 WO2017183393 A1 WO 2017183393A1
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WO
WIPO (PCT)
Prior art keywords
circuit
power receiving
inductor
receiving device
capacitor
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Application number
PCT/JP2017/012281
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French (fr)
Japanese (ja)
Inventor
市川　敬一
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株式会社村田製作所
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Application filed by 株式会社村田製作所 filed Critical 株式会社村田製作所
Priority to JP2018513084A priority Critical patent/JP6669250B2/en
Publication of WO2017183393A1 publication Critical patent/WO2017183393A1/en

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/06—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes without control electrode or semiconductor devices without control electrode

Definitions

  • the present invention relates to a power receiving device that receives power from a power feeding device.
  • Patent Document 1 discloses a power supply system that supplies power using a magnetic field, an electric field, or a resonance coupling of both. This system is provided in the LC resonance circuit in both the power supply device and the power receiving device. By resonating the two LC resonance circuits, the power transmission coil and the power reception coil are resonantly coupled to supply power from the power supply apparatus to the power reception apparatus.
  • the power receiving device of Patent Document 1 includes a rectifier circuit that rectifies the power supplied from the power feeding device. This rectifier circuit may generate noise due to the rectifier element.
  • the power receiving coil may act as a noise radiating antenna, and noise generated in the rectifier circuit may be radiated to the outside through the power receiving coil.
  • an object of the present invention is to provide a power receiving device that suppresses radiation noise.
  • a power receiving device includes a power receiving coupling unit coupled to a power feeding coupling unit of a power feeding device, an input unit connected to the power receiving coupling unit, and an output unit connected to a load, and the rectifier circuit
  • a noise filter circuit connected to the input unit, wherein the noise filter circuit is connected in parallel to the input unit of the rectifier circuit as viewed from the power receiving coupling unit. It has the 1st series circuit of a capacitor and resistance, It is characterized by the above-mentioned.
  • the first series circuit of the first capacitor and the resistor provided on the input side of the rectifier circuit attenuates the high-frequency noise voltage generated in the rectifier circuit. For this reason, it can suppress that a high frequency noise component flows into a receiving coupling part, and noise is radiated
  • the noise filter circuit includes an inductor connected in series to the first parallel circuit of the first series circuit and the rectifier circuit, as viewed from the power receiving coupling unit, and the first parallel circuit and the inductor. You may have the 2nd capacitor connected in parallel with respect to the 2nd series circuit.
  • a low-pass filter is configured by the inductor and the second capacitor.
  • Cin Cin ⁇ Cout when the capacitance of the first capacitor is represented by Cout and the capacitance of the second capacitor is represented by Cin.
  • the second capacitor may include a plurality of capacitors connected in series, and a connection point of the plurality of capacitors of the second capacitor may be connected to a reference potential.
  • This configuration can reduce high-frequency noise components (common mode noise) superimposed on the power receiving coupling section.
  • the power receiving coupling portion and the input portion of the rectifier circuit are connected by a differential line composed of a first line and a second line, the noise filter circuit is provided in the differential line, and the inductor is A first inductor provided on the first line and a second inductor provided on the second line may be included, and the first inductor and the second inductor may be composed of composite inductors.
  • the coupling coefficient of the first inductor and the second inductor is set to 0.9 or less in absolute value.
  • the inductor may be configured inside a ferrite multilayer substrate.
  • the inductor can be reduced in size by using a multilayer substrate.
  • the power receiving device may include the first series circuit and a shielding conductor that shields an input unit of the rectifier circuit.
  • noise radiation from the rectifier circuit serving as a noise generation unit to the surroundings can be shielded.
  • the high frequency noise component generated in the rectifier circuit can be attenuated, and the radiation noise from the power receiving coupling portion can be suppressed.
  • FIG. 1 is a circuit diagram of a power supply system according to the present embodiment.
  • 2A shows a frequency component of the potential at the end of the coil when no filter circuit is provided
  • FIG. 2B shows the frequency of the potential at the end of the coil when the filter circuit is provided. It is a figure which shows a component.
  • FIG. 3 is a circuit diagram of the power receiving device according to the second embodiment.
  • 4A shows a frequency component of the potential at the end of the coil when the connection point of the capacitor is not connected to the reference potential
  • FIG. 4B shows that the connection point of the capacitor is connected to the reference potential.
  • FIG. 4A shows a frequency component of the electric potential of the edge part of a coil in case.
  • FIG. 5A is a circuit diagram of a power receiving device according to the third embodiment
  • FIG. 5B is a side view of the power receiving device.
  • FIG. 6 is a circuit diagram of a power receiving device according to the fourth embodiment.
  • FIG. 7 is a cross-sectional view showing the composite inductor.
  • FIG. 8 is a modification of the power receiving device 20 shown in FIG. 9A and 9B are modifications of the series circuit 231 shown in FIG.
  • FIG. 10 is a modification of the power receiving device 20 shown in FIG. 11A and 11B are modifications of the power receiving device 20 illustrated in FIG.
  • FIG. 1 is a circuit diagram of a power supply system 1 according to the present embodiment.
  • the power supply system 1 includes a power feeding device 10 and a power receiving device 20.
  • the power feeding device 10 and the power receiving device 20 are magnetically coupled, and power is wirelessly supplied from the power feeding device 10 to the power receiving device 20 by magnetic field coupling (electromagnetic induction). Further, in the power supply system 1, transmission efficiency is increased by resonating in each of the power feeding device 10 and the power receiving device 20.
  • the power feeding device 10 includes an inverter circuit 11 and a resonance circuit 12.
  • the inverter circuit 11 converts a DC voltage input from the DC power supply Vin into an AC voltage and outputs the AC voltage.
  • the resonance circuit 12 includes capacitors C11 and C12 and a coil L1.
  • the resonance frequency of the resonance circuit 12 is set to a drive frequency (for example, 6.78 MHz).
  • the resonance circuit 12 is connected to the output side of the inverter circuit 11 and is applied with an AC voltage (differential voltage) output from the inverter circuit 11.
  • the power receiving device 20 includes a rectifying / smoothing circuit 21, a resonance circuit 22, a filter circuit 23, and a load circuit 24.
  • the resonance circuit 22 includes capacitors C21 and C22 and a coil L2.
  • the coil L2 and the coil L1 of the power feeding device 10 are magnetically coupled, whereby electric power is supplied from the power feeding device 10 to the power receiving device 20.
  • the coil L1 is an example of the “power transmission coupling portion” in the present invention.
  • the coil L2 is an example of the “power receiving coupling portion” in the present invention.
  • the resonance frequency of the resonance circuit 22 is set to be the same as the resonance frequency of the resonance circuit 12 of the power feeding device 10. Thereby, electric power can be supplied efficiently.
  • the rectifying / smoothing circuit 21 has input portions In 1 and In 2 and output portions Out 1 and Out 2 .
  • the input parts In 1 and In 2 are connected to the resonance circuit 22 via a filter circuit 23 described later.
  • the output units Out1 and Out2 are connected to the load circuit 24.
  • the rectifying / smoothing circuit 21 rectifies and smoothes the voltage and current caused by the voltage induced in the coil L ⁇ b> 2 of the resonance circuit 22 and supplies the rectified and smoothed circuit 21 to the load circuit 24.
  • the load circuit 24 is, for example, a charging circuit and a secondary battery.
  • the rectifying / smoothing circuit 21 is an example embodiment that corresponds to the “rectifying circuit” according to the present invention.
  • the rectifying / smoothing circuit 21 may be a diode bridge circuit or a synchronous rectifying circuit. Further, it may be a full-wave rectifier circuit or a half-wave rectifier circuit.
  • the rectifying / smoothing circuit 21 includes a switching element such as a diode or FET.
  • a line connecting the input portions In 1 and In 2 of the rectifying and smoothing circuit 21 and the resonance circuit 22 is a differential line.
  • the line connected to the input unit In 1 is referred to as a differential line 24A
  • the line connected to the input unit In 2 is referred to as a differential line 24B.
  • the differential line 24A is an example of the “first line” according to the present invention.
  • the differential line 24B is an example of the “second line” according to the present invention.
  • the filter circuit 23 is connected between the resonance circuit 22 and the rectifying / smoothing circuit 21.
  • the filter circuit 23 includes a capacitor Cc, inductors Ls1 and Ls2, and a series circuit 231 including a capacitor Ca and a resistor Ra.
  • the series circuit 231 is an example of the “first series circuit” according to the present invention.
  • the filter circuit 23 is an example of the “noise filter circuit” according to the present invention.
  • the capacitor Ca is an example of the “first capacitor” according to the present invention.
  • the series circuit 231 is connected between the differential lines 24A and 24B.
  • the series circuit 231 is provided closer to the input portions In 1 and In 2 of the rectifying and smoothing circuit 21 than the other elements included in the filter circuit 23.
  • the series circuit 231 and the rectifying / smoothing circuit 21 are connected in parallel.
  • the series circuit 231 is connected in parallel to the input portions In 1 and In 2 of the rectifying and smoothing circuit 21 as viewed from the coil L2.
  • the series circuit 231 is preferably provided closer to the rectifying / smoothing circuit 21.
  • the parallel circuit of the series circuit 231 and the rectifying / smoothing circuit 21 is an example of the “first parallel circuit” according to the present invention.
  • the inductor Ls1 is provided on the differential line 24A. That is, the inductor Ls1 is connected in series to the differential line 24A.
  • the inductor Ls2 is provided on the differential line 24B. That is, the inductor Ls2 is connected in series to the differential line 24B.
  • the inductors Ls1 and Ls2 are provided closer to the resonance circuit 22 than the series circuit 231. Thus, the inductors Ls1 and Ls2 are connected in series to the parallel circuit of the series circuit 231 and the rectifying / smoothing circuit 21 when viewed from the coil L2 side.
  • the inductors Ls1 and Ls2 may be coils wound around a ferrite core, for example, air core coils or ferrite beads.
  • the series circuit of the parallel circuit and the inductors Ls1 and Ls2 is an example of the “second series circuit” according to the present invention.
  • the capacitor Cc is connected between the differential lines 24A and 24B at a position closer to the resonance circuit 22 than the inductors Ls1 and Ls2. Thus, the capacitor Cc is connected in parallel to the resonance circuit 22.
  • high-frequency noise components generated in the rectifying and smoothing circuit 21 flow through the differential lines 24A and 24B.
  • the inductor Ls1 and the capacitor Cc constitute a low-pass filter that attenuates high-frequency noise components flowing on the differential line 24A.
  • the inductor Ls2 and the capacitor Cc constitute a low-pass filter that attenuates high-frequency noise components flowing on the differential line 24B.
  • the low pass filter is set so as to reduce noise components in a frequency band of 30 MHz or more, for example.
  • a voltage transient response (high-frequency noise component) due to switching of the power supply apparatus 10 occurs.
  • the AC voltage is distorted by the recovery characteristic of the rectifier circuit that occurs when the polarity of the AC voltage applied to the input portion of the rectifying and smoothing circuit 21 is reversed.
  • the alternating voltage applied to an input part is clipped with the direct current voltage after rectification smoothing, and the waveform becomes trapezoid.
  • This AC voltage distortion waveform has a high-frequency noise component.
  • the high frequency noise component generated in the rectifying / smoothing circuit 21 flows from the input portions In 1 and In 2 through the differential lines 24A and 24B and is radiated from the resonance circuit 22.
  • the series circuit 231 connected between the differential lines 24A and 24B attenuates high frequency noise components.
  • the noise component attenuated by the series circuit 231 is further attenuated by a low-pass filter including the inductors Ls1 and Ls2 and the capacitor Cc. Thereby, it is possible to prevent a noise component flowing through the differential lines 24A and 24B from flowing into the coil L2. As a result, noise radiation from the coil L2 can be prevented, and a power feeding system with little radiation noise can be realized.
  • Cin the capacitance of the capacitor Cc
  • Cout the capacitance of the capacitor Ca
  • the inductors Ls1 and Ls2 have a high impedance with respect to a high-frequency noise component (for example, 70 MHz or more) due to switching, and a low impedance at a driving frequency.
  • the impedances of the inductors Ls1 and Ls2 are low, and the capacitors Cc and Ca are connected in parallel when the impedances of the inductors Ls1 and Ls2 are ignored for simplicity.
  • the power supply from the power supply device 10 for example, the driving frequency of 6.78 MHz
  • the smaller the combined capacitance of the capacitors Cc and Ca connected in parallel the smaller the influence on the power supply efficiency to the load circuit 24.
  • the combined capacitance of the capacitors Cc and Ca connected in parallel is large. Accordingly, there is a limit on the combined capacitance (Cc + Ca) of the capacitors Cc and Ca.
  • the capacitance Cout of the capacitor Ca is increased, the power supplied from the resonance circuit 22 to the rectifying / smoothing circuit 21 is consumed by the resistor Ra. For this reason, it is preferable that the capacitance Cout of the capacitor Ca is small. Furthermore, since it is necessary to further attenuate high-frequency components with a low-pass filter, it is preferable that the capacitance Cin of the capacitor Cc is large. For the above reasons, it is preferable that Cin ⁇ Cout.
  • FIG. 2A shows a frequency component of the potential at the end of the coil L2 when the filter circuit 23 is not provided
  • FIG. 2B shows an end of the coil L2 when the filter circuit 23 is provided. It is a figure which shows the frequency component of the electric potential. Comparing FIG. 2 (A) and FIG. 2 (B), it can be seen that the noise level is lowered particularly in the vicinity of about 400 MHz (in the circle in the figure).
  • FIG. 3 is a circuit diagram of the power receiving device 20A according to the second embodiment.
  • the filter circuit 23A includes a series circuit 231, inductors Ls1 and Ls2, and capacitors Cc1 and Cc2.
  • the series circuit 231 and the inductors Ls1 and Ls2 are the same as those in the first embodiment.
  • Capacitors Cc1 and Cc2 are connected in series.
  • the capacitors Cc1 and Cc2 are connected between the differential lines 24A and 24B at a position closer to the resonance circuit 22 than the inductors Ls1 and Ls2.
  • the connection point of the capacitors Cc1 and Cc2 is connected to the reference potential of the power receiving device 20A.
  • the reference potential is a ground potential of the circuit of the power receiving device.
  • a conductive portion, a shield case, a conductor pattern extending in a planar shape on the circuit board, etc. included in the housing of the power receiving device 20A are also connected to the reference potential.
  • the Capacitors Cc1 and Cc2 have the same capacitance.
  • the capacitor Cc2 is an example of the “third capacitor” according to the present invention.
  • the inductors Ls1, Ls2 and the capacitor Cc1 constitute a low-pass filter that attenuates high-frequency noise components flowing on the differential lines 24A, 24B.
  • the middle point of the capacitors Cc1 and Cc2 is connected to the reference potential.
  • the high frequency noise component can be returned to the reference potential of the power receiving apparatus 20A via the capacitors Cc1 and Cc2 before the high frequency noise component is input to the coil L2.
  • the common mode signal (noise) can be reduced from being radiated to the outside from the coil L2.
  • FIG. 4A shows a frequency component of the potential at the end of the coil L2 when the connection point of the capacitors Cc1 and Cc2 is not connected to the reference potential
  • FIG. 4B shows the connection of the capacitors Cc1 and Cc2. It is a figure which shows the frequency component of the electric potential of the edge part of the coil L2, when connecting a point to a reference electric potential. Comparing FIG. 4A and FIG. 4B, the noise level is attenuated by about 5 dB or more particularly in a band of about 100 MHz or more (in the circle in the figure).
  • the power receiving device is different from the second embodiment in that it includes a shield conductor.
  • FIG. 5A is a circuit diagram of the power receiving device 20B according to the third embodiment, and FIG. 5B is a side view of the power receiving device 20B.
  • the circuit configuration of the power receiving device 20B is the same as that of the power receiving device 20A according to the second embodiment, and the power receiving device 20B has a configuration in which the shield conductor 30 is provided in the power receiving device 20A shown in FIG.
  • the power receiving device 20B includes a substrate 100. Each element such as a coil L2 and capacitors C21 and C22 is mounted on one main surface of the substrate 100. A ground conductor 101 serving as a reference potential is formed on the other main surface of the substrate 100. The connection point of the capacitors Cc1 and Cc2 is connected to the ground conductor 101.
  • the shield conductor 30 is provided on one main surface of the substrate 100 so as to surround at least a portion where the high-frequency noise voltage is superimposed, for example, the rectifying and smoothing circuit 21, the series circuit 231, and the inductors Ls1 and Ls2.
  • the shield conductor 30 is connected to the ground conductor 101 (the output part Out2 of the rectifying and smoothing circuit 21).
  • the shield conductor 30 may be configured so that noise current caused by voltage fluctuations around the inductors Ls1 and Ls2 on which the high-frequency voltage is superimposed does not leak to the surroundings. As shown in FIG. It does not need to be covered or all of it may be covered. When the magnetic paths of the inductors Ls1 and Ls2 are open magnetic types, a magnetic field leaks around the inductors Ls1 and Ls2, so that the electrical characteristics (inductance and resistance) of the inductors Ls1 and Ls2 may be affected by the shield conductor 30. is there. In that case, the shield conductor 30 may be kept away from the inductors Ls1 and Ls2.
  • the shield conductor 30 may be provided on one main surface of the substrate 100 so as to cover all the elements constituting the power receiving device 20B.
  • the power receiving device according to the fourth embodiment has the same circuit configuration as the power receiving device according to the first embodiment or the power receiving device according to the second and third embodiments.
  • inductors Ls1 and Ls2 are used.
  • FIG. 6 is a circuit diagram of the power receiving device 20C according to the fourth embodiment.
  • the circuit configuration of the power receiving device 20C is the same as that of the power receiving device 20A according to the second embodiment.
  • the inductors Ls1 and Ls2 are configured by one composite inductor 40.
  • FIG. 7 is a cross-sectional view showing the composite inductor 40.
  • the composite inductor 40 includes a multilayer body 41.
  • the laminate 41 is an insulator in which a plurality of ferrite sheets are laminated and sintered.
  • the laminate 41 is an example of the “ferrite multilayer substrate” according to the present invention.
  • the laminated body 41 is laminated in the order of the magnetic layer 42, the nonmagnetic layer 43, the magnetic layer 44, the nonmagnetic layer 45, and the magnetic layer 46.
  • the nonmagnetic layers 43 and 45 have a lower magnetic permeability than the magnetic layers 42, 44 and 46.
  • inductors Ls1 and Ls2 are formed so that the winding axes coincide with each other.
  • the inductor Ls1 is formed by connecting an open loop conductor pattern formed in each layer of the nonmagnetic layer 43 with via conductors (not shown).
  • the inductor Ls2 is formed by connecting an open loop conductor pattern formed in each layer of the nonmagnetic material layer 45 with a via conductor (not shown).
  • inductors Ls1 and Ls2 By forming the inductors Ls1 and Ls2 in the low magnetic permeability non-magnetic layer 43, magnetic saturation of the inductors Ls1 and Ls2 can be prevented. For this reason, it is possible to prevent a decrease in inductance of the inductors Ls1 and Ls2.
  • the magnetic layers 42, 44, 46 are laminated so as to sandwich the nonmagnetic layers 43, 45 where the inductors Ls1, Ls2 are formed.
  • the coupling coefficient of the inductors Ls1 and Ls2 is preferably set to 0 or more and 0.9 or less in absolute value.
  • the inductors Ls1 and Ls2 provide inductance for both the common mode signal (noise) and the differential mode signal (noise). To have. For this reason, compared with the case where a winding coil etc. are used for each of inductor Ls1, Ls2, a number of parts can be reduced and it can reduce in size.
  • a plurality of dummy electrodes 47B and 47C are provided on the main surface of the multilayer body 41 (main surface of the magnetic layer 46). By mounting the dummy electrodes 47B and 47C on the substrate, the heat generated by the composite inductor 40 can be radiated to the mounting substrate.
  • the power supply system is not limited to the magnetic field type non-contact power transmission system, but can be applied to an electric field coupling type non-contact power transmission system using electric field coupling.
  • the power transmission coupling portion and the power reception coupling portion are planar conductors. Even in this case, by incorporating the filter circuit of the above-described embodiment into the power receiving apparatus, it is possible to suppress noise from being radiated from the planar conductor that is the power receiving coupling portion.
  • the present invention can also be applied to an electromagnetic coupling type non-contact power transmission system using both an electric field and a magnetic field.
  • the filter circuit for suppressing noise radiated mainly from the rectifying and smoothing circuit in the power receiving apparatus from the coil has been described.
  • the above-described filter circuit is also applied to the noise caused by other noise generation sources connected to the power receiving coupling unit, such as a DC-DC converter that converts the power supplied to the load in the power receiving device. Generation of noise from the coupling portion can be suppressed.
  • (Other embodiments) 1 constitutes a series resonance circuit in which capacitors C11 and C12 are connected in series at both ends of the coil L1, but the resonance circuit 12 is not limited to this configuration.
  • the resonance circuit 12 may be a parallel resonance circuit or a series resonance circuit in which a capacitor is connected to one end of the coil L1.
  • the resonant circuit 22 shown in FIGS. 1, 3, 5A, and 6 constitutes a series resonant circuit in which capacitors C21 and C22 are connected in series to both ends of the coil L2. Is not limited to this configuration.
  • FIG. 8 shows a modification of the power receiving device 20 shown in FIG.
  • the resonance circuit 22A may be configured by a series resonance circuit in which a capacitor C21 is connected to one end of the coil L2. Further, it may be a parallel resonant circuit.
  • the series circuit 231 including the single capacitor Ca and the single resistor Ra is shown as an example of the “first series circuit”.
  • the series circuit 231 has this configuration. Not exclusively.
  • a series circuit 231A may be configured by a combination of a plurality of resistors Ra and a capacitor Ca, or as shown in FIG. 9B, a plurality of capacitors Ca and a resistor Ra.
  • the series circuit 231B may be configured in combination with
  • the filter circuits 23 and 23A shown in FIGS. 1, 3, 5A, and 6 include inductors Ls1 and Ls2 inserted in the differential lines. It is not limited to the configuration.
  • FIG. 10 is a modified example of the power receiving device 20 shown in FIG.
  • a filter circuit 23B having a parallel resonant circuit in which capacitors Cb1 and Cb2 are connected in parallel to inductors Ls1 and Ls2, respectively.
  • These parallel resonance circuits adjust the resonance frequency to the frequency band of the specific high frequency noise to be removed.
  • the parallel resonant circuit has high impedance at the resonance frequency, and specific high frequency noise is effectively removed.
  • the filter circuits 23 and 23A shown in FIGS. 1, 3, 5A, and 6 include inductors Ls1 and Ls2 inserted in the differential lines. It is not limited to the configuration.
  • FIGS. 11A and 11B are modifications of the power receiving device 20 shown in FIG. 11A and 11B, the filter circuit 23C constitutes an unbalanced circuit in which elements are connected to only one line.
  • the resonance circuit 22A also forms a series resonance circuit in which a capacitor C21 is connected to one end of the coil L2. In this manner, the power receiving device may be configured with an unbalanced circuit.
  • the filter circuit may leave the inductor Ls1 and leave the inductor Ls1 in the filter circuit 23 shown in FIG.
  • the resonance circuit may leave the capacitor C21 and eliminate the capacitor C21 in the resonance circuit 22 shown in FIG.
  • the number of elements can be reduced, and the size and cost can be reduced.
  • Capacitor (first capacitor) Cc Capacitor (second capacitor) Cc1 .. capacitor (second capacitor) Cc2: Capacitor (third capacitor) Cin ... capacitance Cout ... capacitance In 1, In 2 ... input unit L1 ... coil (feed coupling portion) L2 ... Coil (power receiving coupling part) Ls1 ... Inductor (first inductor) Ls2: Inductor (second inductor) Out1, Out2 ... Output unit Ra ... Resistance Vin ... DC power supply 1 ... Power supply system 10 ... Power feeding device 11 ... Inverter circuit 12 ...
  • Resonant circuits 20, 20A, 20B, 20C Power receiving device 21 ... Rectification smoothing circuit (rectification circuit) 22, 22A ... Resonant circuits 23, 23A, 23B, 23C ... Filter circuit (noise filter circuit) 24 ... Load circuit 24A ... Differential line (first line) 24B ... Differential line (second line) 30 ... Shield conductor (shield conductor) 40 ... Composite inductor 41 ... Laminated bodies 42, 44, 46 ... Magnetic layer 43 ... Nonmagnetic layer 43,45 ... Nonmagnetic layers 47A, 47D ... Mounting electrodes 47B, 47C ... Dummy electrode 100 ... Substrate 101 ... Ground conductor 231, 231A, 231B ... Series circuit (first series circuit)

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  • Power Engineering (AREA)
  • Filters And Equalizers (AREA)
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  • Power Conversion In General (AREA)

Abstract

This invention is provided with: a coil (L2) coupled with a coil (L1) of a power supply device (10); a rectification smoothing circuit (21) having input parts (In1, In2) connected to the coil (L2) and output parts (Out1, Out2) connected to a load circuit (24); and a filter circuit (23) connected to the input parts (In1, In2) of the rectification smoothing circuit (21). The filter circuit (23) has a serial circuit (231) of a capacitor (Ca) and a resistor (Ra), connected in parallel to the rectification smoothing circuit (21) as viewed from the coil (L2).

Description

受電装置Power receiving device
　本発明は、給電装置から電力を受電する受電装置に関する。 The present invention relates to a power receiving device that receives power from a power feeding device.
　特許文献１には、磁界、電界、又は双方の共鳴結合を利用して電力供給を行う電力供給システムが開示されている。このシステムは、給電装置と受電装置との双方にＬＣ共振回路に設けている。そして、２つのＬＣ共振回路を共鳴させることで、送電コイルと受電コイルとを共鳴結合させて、給電装置から受電装置への電力供給を行っている。 Patent Document 1 discloses a power supply system that supplies power using a magnetic field, an electric field, or a resonance coupling of both. This system is provided in the LC resonance circuit in both the power supply device and the power receiving device. By resonating the two LC resonance circuits, the power transmission coil and the power reception coil are resonantly coupled to supply power from the power supply apparatus to the power reception apparatus.
国際公開第２０１４／５７９５９号International Publication No. 2014/57959
　特許文献１の受電装置は、給電装置から供給される電力を整流する整流回路を備えている。この整流回路からは、整流素子によるノイズが発生する場合がある。そして、特許文献１の受電装置では、受電コイルがノイズの放射アンテナとして作用し、整流回路で生じたノイズが受電コイルを介して外部に放射される場合がある。 The power receiving device of Patent Document 1 includes a rectifier circuit that rectifies the power supplied from the power feeding device. This rectifier circuit may generate noise due to the rectifier element. In the power receiving device of Patent Document 1, the power receiving coil may act as a noise radiating antenna, and noise generated in the rectifier circuit may be radiated to the outside through the power receiving coil.
　そこで、本発明の目的は、放射ノイズを抑制する受電装置を提供することにある。 Therefore, an object of the present invention is to provide a power receiving device that suppresses radiation noise.
　本発明に係る受電装置は、給電装置の給電結合部と結合する受電結合部と、前記受電結合部に接続される入力部、及び負荷に接続される出力部を有する整流回路と、前記整流回路の前記入力部に接続されているノイズフィルタ回路と、を備え、前記ノイズフィルタ回路は、前記受電結合部から視て、前記整流回路の前記入力部に対して並列に接続されている、第１キャパシタと抵抗との第１直列回路を有することを特徴とする。 A power receiving device according to the present invention includes a power receiving coupling unit coupled to a power feeding coupling unit of a power feeding device, an input unit connected to the power receiving coupling unit, and an output unit connected to a load, and the rectifier circuit A noise filter circuit connected to the input unit, wherein the noise filter circuit is connected in parallel to the input unit of the rectifier circuit as viewed from the power receiving coupling unit. It has the 1st series circuit of a capacitor and resistance, It is characterized by the above-mentioned.
　この構成では、整流回路の入力側に設けられる第１キャパシタと抵抗との第１直列回路により、整流回路で発生する高周波ノイズ電圧が減衰する。このため、高周波ノイズ成分が受電結合部に流れ込み、受電結合部からノイズが放射されることを抑制できる。 In this configuration, the first series circuit of the first capacitor and the resistor provided on the input side of the rectifier circuit attenuates the high-frequency noise voltage generated in the rectifier circuit. For this reason, it can suppress that a high frequency noise component flows into a receiving coupling part, and noise is radiated | emitted from a receiving coupling part.
　前記ノイズフィルタ回路は、前記第１直列回路及び前記整流回路の第１並列回路に対して、前記受電結合部から視て、直列接続されているインダクタと、前記第１並列回路と前記インダクタとの第２直列回路に対して、並列に接続されている第２キャパシタと、を有してもよい。 The noise filter circuit includes an inductor connected in series to the first parallel circuit of the first series circuit and the rectifier circuit, as viewed from the power receiving coupling unit, and the first parallel circuit and the inductor. You may have the 2nd capacitor connected in parallel with respect to the 2nd series circuit.
　この構成では、インダクタと第２キャパシタとでローパスフィルタが構成される。このローパスフィルタにより、第１直列回路から漏れ出たノイズ成分をさらに減衰できる。このため、受電結合部からの放射ノイズをさらに抑制できる。 In this configuration, a low-pass filter is configured by the inductor and the second capacitor. With this low-pass filter, the noise component leaking from the first series circuit can be further attenuated. For this reason, radiation noise from the power receiving coupling portion can be further suppressed.
　前記第１キャパシタのキャパシタンスをＣout、前記第２キャパシタのキャパシタンスをＣinで表すと、Ｃin≧Ｃoutであることが好ましい。 It is preferable that Cin ≧ Cout when the capacitance of the first capacitor is represented by Cout and the capacitance of the second capacitor is represented by Cin.
　この構成では、ノイズフィルタ回路を設けても、給電装置から供給され、整流回路へ搬送される電力（搬送波の周波数帯）への影響を軽減できる。 In this configuration, even if a noise filter circuit is provided, it is possible to reduce the influence on the power (carrier frequency band) supplied from the power feeding device and conveyed to the rectifier circuit.
　前記第２キャパシタは、直列接続された複数のキャパシタを有し、前記第２キャパシタの前記複数のキャパシタの接続点は、基準電位に接続されていてもよい。 The second capacitor may include a plurality of capacitors connected in series, and a connection point of the plurality of capacitors of the second capacitor may be connected to a reference potential.
　この構成では、受電結合部に重畳する高周波ノイズ成分（コモンモードノイズ）を低減できる。 This configuration can reduce high-frequency noise components (common mode noise) superimposed on the power receiving coupling section.
　前記受電結合部と前記整流回路の入力部とは、第１線路と第２線路とで構成される差動線路で接続され、前記ノイズフィルタ回路は前記差動線路に設けられ、前記インダクタは、前記第１線路に設けられる第１インダクタ、及び前記第２線路に設けられる第２インダクタを有し、前記第１インダクタ及び前記第２インダクタは、複合インダクタで構成されてもよい。 The power receiving coupling portion and the input portion of the rectifier circuit are connected by a differential line composed of a first line and a second line, the noise filter circuit is provided in the differential line, and the inductor is A first inductor provided on the first line and a second inductor provided on the second line may be included, and the first inductor and the second inductor may be composed of composite inductors.
　この構成では、２つのインダクタを複合インダクタで構成することで、部品点数を削減でき、小型化を実現できる。 In this configuration, by configuring the two inductors with composite inductors, the number of parts can be reduced and downsizing can be realized.
　前記第１インダクタ及び前記第２インダクタの結合係数は、絶対値で０．９以下に設定されていることが好ましい。 It is preferable that the coupling coefficient of the first inductor and the second inductor is set to 0.9 or less in absolute value.
　この構成では、２つのインダクタを複合インダクタで構成することで、部品点数を削減でき、小型化を実現できる。 In this configuration, by configuring the two inductors with composite inductors, the number of parts can be reduced and downsizing can be realized.
　前記インダクタは、フェライト多層基板内部に構成されていてもよい。 The inductor may be configured inside a ferrite multilayer substrate.
　この構成では、多層基板とすることで、インダクタの小型化を実現できる。 In this configuration, the inductor can be reduced in size by using a multilayer substrate.
　前記受電装置は、前記第１直列回路、及び前記整流回路の入力部を遮蔽する遮蔽導体、を備えてもよい。 The power receiving device may include the first series circuit and a shielding conductor that shields an input unit of the rectifier circuit.
　この構成では、ノイズ生成部となる整流回路から周囲へのノイズ輻射を遮蔽することができる。 In this configuration, noise radiation from the rectifier circuit serving as a noise generation unit to the surroundings can be shielded.
　本発明によれば、整流回路で発生する高周波ノイズ成分を減衰させ、受電結合部からの放射ノイズを抑制できる。 According to the present invention, the high frequency noise component generated in the rectifier circuit can be attenuated, and the radiation noise from the power receiving coupling portion can be suppressed.
図１は、本実施形態に係る電力供給システムの回路図である。FIG. 1 is a circuit diagram of a power supply system according to the present embodiment. 図２（Ａ）は、フィルタ回路を設けない場合の、コイルの端部の電位の周波数成分を示す図、図２（Ｂ）は、フィルタ回路を設ける場合の、コイルの端部の電位の周波数成分を示す図である。2A shows a frequency component of the potential at the end of the coil when no filter circuit is provided, and FIG. 2B shows the frequency of the potential at the end of the coil when the filter circuit is provided. It is a figure which shows a component. 図３は、実施形態２に係る受電装置の回路図である。FIG. 3 is a circuit diagram of the power receiving device according to the second embodiment. 図４（Ａ）は、キャパシタの接続点を基準電位に接続しない場合の、コイルの端部の電位の周波数成分を示す図、図４（Ｂ）は、キャパシタの接続点を基準電位に接続する場合の、コイルの端部の電位の周波数成分を示す図である。4A shows a frequency component of the potential at the end of the coil when the connection point of the capacitor is not connected to the reference potential, and FIG. 4B shows that the connection point of the capacitor is connected to the reference potential. It is a figure which shows the frequency component of the electric potential of the edge part of a coil in case. 図５（Ａ）は、実施形態３に係る受電装置の回路図、図５（Ｂ）は、受電装置の側面図である。FIG. 5A is a circuit diagram of a power receiving device according to the third embodiment, and FIG. 5B is a side view of the power receiving device. 図６は、実施形態４に係る受電装置の回路図である。FIG. 6 is a circuit diagram of a power receiving device according to the fourth embodiment. 図７は、複合インダクタを示す断面図である。FIG. 7 is a cross-sectional view showing the composite inductor. 図８は図１に示した受電装置２０の変形例である。FIG. 8 is a modification of the power receiving device 20 shown in FIG. 図９（Ａ）、図９（Ｂ）は、図１等に示した直列回路２３１の変形例である。9A and 9B are modifications of the series circuit 231 shown in FIG. 図１０は図１に示した受電装置２０の変形例である。FIG. 10 is a modification of the power receiving device 20 shown in FIG. 図１１（Ａ）、図１１（Ｂ）は図１に示した受電装置２０の変形例である。11A and 11B are modifications of the power receiving device 20 illustrated in FIG.
（実施形態１）
　図１は、本実施形態に係る電力供給システム１の回路図である。 (Embodiment 1)
FIG. 1 is a circuit diagram of a power supply system 1 according to the present embodiment.
　電力供給システム１は、給電装置１０と受電装置２０とを備えている。電力供給システム１では、給電装置１０と受電装置２０とが磁界結合し、給電装置１０から受電装置２０とへ電力が磁界結合（電磁誘導）によりワイヤレスで供給される。また、電力供給システム１では、給電装置１０と受電装置２０それぞれにおいて、共振することで伝送効率を高めている。 The power supply system 1 includes a power feeding device 10 and a power receiving device 20. In the power supply system 1, the power feeding device 10 and the power receiving device 20 are magnetically coupled, and power is wirelessly supplied from the power feeding device 10 to the power receiving device 20 by magnetic field coupling (electromagnetic induction). Further, in the power supply system 1, transmission efficiency is increased by resonating in each of the power feeding device 10 and the power receiving device 20.
　給電装置１０は、インバータ回路１１及び共振回路１２を備えている。インバータ回路１１は、直流電源Ｖｉｎから入力される直流電圧を交流電圧に変換して出力する。共振回路１２は、キャパシタＣ１１，Ｃ１２及びコイルＬ１から構成されている。共振回路１２の共振周波数は、駆動周波数（例えば、６．７８ＭＨｚ）に設定されている。共振回路１２は、インバータ回路１１の出力側に接続され、インバータ回路１１から出力される交流電圧（差動電圧）が印加される。 The power feeding device 10 includes an inverter circuit 11 and a resonance circuit 12. The inverter circuit 11 converts a DC voltage input from the DC power supply Vin into an AC voltage and outputs the AC voltage. The resonance circuit 12 includes capacitors C11 and C12 and a coil L1. The resonance frequency of the resonance circuit 12 is set to a drive frequency (for example, 6.78 MHz). The resonance circuit 12 is connected to the output side of the inverter circuit 11 and is applied with an AC voltage (differential voltage) output from the inverter circuit 11.
　受電装置２０は、整流平滑回路２１、共振回路２２、フィルタ回路２３及び負荷回路２４を備えている。 The power receiving device 20 includes a rectifying / smoothing circuit 21, a resonance circuit 22, a filter circuit 23, and a load circuit 24.
　共振回路２２は、キャパシタＣ２１，Ｃ２２及びコイルＬ２から構成されている。このコイルＬ２と、給電装置１０のコイルＬ１とが磁界結合することで、給電装置１０から受電装置２０へ電力が供給される。コイルＬ１は本発明の「送電結合部」の一例である。コイルＬ２は本発明の「受電結合部」の一例である。共振回路２２の共振周波数は、給電装置１０の共振回路１２の共振周波数と同じに設定されている。これにより、効率良く電力供給を行うことができる。 The resonance circuit 22 includes capacitors C21 and C22 and a coil L2. The coil L2 and the coil L1 of the power feeding device 10 are magnetically coupled, whereby electric power is supplied from the power feeding device 10 to the power receiving device 20. The coil L1 is an example of the “power transmission coupling portion” in the present invention. The coil L2 is an example of the “power receiving coupling portion” in the present invention. The resonance frequency of the resonance circuit 22 is set to be the same as the resonance frequency of the resonance circuit 12 of the power feeding device 10. Thereby, electric power can be supplied efficiently.
　整流平滑回路２１は、入力部Ｉｎ１，Ｉｎ２と出力部Ｏｕｔ１，Ｏｕｔ２とを有している。入力部Ｉｎ１，Ｉｎ２は、後述のフィルタ回路２３を介して共振回路２２に接続されている。出力部Ｏｕｔ１，Ｏｕｔ２は負荷回路２４に接続されている。整流平滑回路２１は、共振回路２２のコイルＬ２に誘起された電圧に起因した電圧及び電流を整流及び平滑し、負荷回路２４へ供給する。負荷回路２４は、例えば、充電回路及び二次電池等である。整流平滑回路２１は、本発明に係る「整流回路」の一例である。整流平滑回路２１は、ダイオードブリッジ回路であってもよいし、同期整流回路であってもよい。また、全波整流回路であってもよいし、半波整流回路であってもよい。整流平滑回路２１は、ダイオード、又はＦＥＴ等のスイッチ素子で構成される。 The rectifying / smoothing circuit 21 has input portions In 1 and In 2 and output portions Out 1 and Out 2 . The input parts In 1 and In 2 are connected to the resonance circuit 22 via a filter circuit 23 described later. The output units Out1 and Out2 are connected to the load circuit 24. The rectifying / smoothing circuit 21 rectifies and smoothes the voltage and current caused by the voltage induced in the coil L <b> 2 of the resonance circuit 22 and supplies the rectified and smoothed circuit 21 to the load circuit 24. The load circuit 24 is, for example, a charging circuit and a secondary battery. The rectifying / smoothing circuit 21 is an example embodiment that corresponds to the “rectifying circuit” according to the present invention. The rectifying / smoothing circuit 21 may be a diode bridge circuit or a synchronous rectifying circuit. Further, it may be a full-wave rectifier circuit or a half-wave rectifier circuit. The rectifying / smoothing circuit 21 includes a switching element such as a diode or FET.
　整流平滑回路２１の入力部Ｉｎ１，Ｉｎ２と共振回路２２とを接続する線路は差動線路である。以下では、入力部Ｉｎ１に接続される線路を差動線路２４Ａ、入力部Ｉｎ２に接続される線路を差動線路２４Ｂとする。差動線路２４Ａは、本発明に係る「第１線路」の一例である。差動線路２４Ｂは、本発明に係る「第２線路」の一例である。 A line connecting the input portions In 1 and In 2 of the rectifying and smoothing circuit 21 and the resonance circuit 22 is a differential line. Hereinafter, the line connected to the input unit In 1 is referred to as a differential line 24A, and the line connected to the input unit In 2 is referred to as a differential line 24B. The differential line 24A is an example of the “first line” according to the present invention. The differential line 24B is an example of the “second line” according to the present invention.
　フィルタ回路２３は、共振回路２２と整流平滑回路２１との間に接続されている。フィルタ回路２３は、キャパシタＣｃ、インダクタＬｓ１，Ｌｓ２、及び、キャパシタＣａと抵抗Ｒａとの直列回路２３１を有している。直列回路２３１は、本発明に係る「第１直列回路」の一例である。フィルタ回路２３は、本発明に係る「ノイズフィルタ回路」の一例である。キャパシタＣａは、本発明に係る「第１キャパシタ」の一例である。 The filter circuit 23 is connected between the resonance circuit 22 and the rectifying / smoothing circuit 21. The filter circuit 23 includes a capacitor Cc, inductors Ls1 and Ls2, and a series circuit 231 including a capacitor Ca and a resistor Ra. The series circuit 231 is an example of the “first series circuit” according to the present invention. The filter circuit 23 is an example of the “noise filter circuit” according to the present invention. The capacitor Ca is an example of the “first capacitor” according to the present invention.
　直列回路２３１は、差動線路２４Ａ，２４Ｂ間に接続されている。直列回路２３１は、フィルタ回路２３が有する他の素子よりも、整流平滑回路２１の入力部Ｉｎ１，Ｉｎ２の直近に設けられる。これにより、直列回路２３１と整流平滑回路２１とは並列接続される構成となる。換言すれば、直列回路２３１は、コイルＬ２から視て、整流平滑回路２１の入力部Ｉｎ１，Ｉｎ２に対して並列に接続されている。なお、直列回路２３１は、整流平滑回路２１により近づけて設けることが好ましい。直列回路２３１と整流平滑回路２１との並列回路は、本発明に係る「第１並列回路」の一例である。 The series circuit 231 is connected between the differential lines 24A and 24B. The series circuit 231 is provided closer to the input portions In 1 and In 2 of the rectifying and smoothing circuit 21 than the other elements included in the filter circuit 23. Thus, the series circuit 231 and the rectifying / smoothing circuit 21 are connected in parallel. In other words, the series circuit 231 is connected in parallel to the input portions In 1 and In 2 of the rectifying and smoothing circuit 21 as viewed from the coil L2. The series circuit 231 is preferably provided closer to the rectifying / smoothing circuit 21. The parallel circuit of the series circuit 231 and the rectifying / smoothing circuit 21 is an example of the “first parallel circuit” according to the present invention.
　インダクタＬｓ１は差動線路２４Ａ上に設けられる。つまり、インダクタＬｓ１は差動線路２４Ａに直列接続されている。インダクタＬｓ２は差動線路２４Ｂ上に設けられる。つまり、インダクタＬｓ２は差動線路２４Ｂに直列接続されている。インダクタＬｓ１，Ｌｓ２は、直列回路２３１よりも、共振回路２２側に設けられる。これにより、インダクタＬｓ１，Ｌｓ２は、直列回路２３１と整流平滑回路２１との並列回路に対し、コイルＬ２側から視て、直列接続される構成となる。インダクタＬｓ１，Ｌｓ２は、例えばフェライトコアに巻線したコイルであってもよいし、空芯コイルやフェライトビーズであってもよい。この並列回路と、インダクタＬｓ１，Ｌｓ２との直列回路は、本発明に係る「第２直列回路」の一例である。 The inductor Ls1 is provided on the differential line 24A. That is, the inductor Ls1 is connected in series to the differential line 24A. The inductor Ls2 is provided on the differential line 24B. That is, the inductor Ls2 is connected in series to the differential line 24B. The inductors Ls1 and Ls2 are provided closer to the resonance circuit 22 than the series circuit 231. Thus, the inductors Ls1 and Ls2 are connected in series to the parallel circuit of the series circuit 231 and the rectifying / smoothing circuit 21 when viewed from the coil L2 side. The inductors Ls1 and Ls2 may be coils wound around a ferrite core, for example, air core coils or ferrite beads. The series circuit of the parallel circuit and the inductors Ls1 and Ls2 is an example of the “second series circuit” according to the present invention.
　キャパシタＣｃは、インダクタＬｓ１，Ｌｓ２よりも共振回路２２側の位置で、差動線路２４Ａ，２４Ｂ間に接続されている。これにより、キャパシタＣｃは、共振回路２２に対して、並列に接続される構成となる。 The capacitor Cc is connected between the differential lines 24A and 24B at a position closer to the resonance circuit 22 than the inductors Ls1 and Ls2. Thus, the capacitor Cc is connected in parallel to the resonance circuit 22.
　後述するが、差動線路２４Ａ，２４Ｂには、整流平滑回路２１で発生する高周波ノイズ成分が流れる。インダクタＬｓ１とキャパシタＣｃとは、差動線路２４Ａ上を流れる高周波ノイズ成分を減衰するローパスフィルタを構成している。同様に、インダクタＬｓ２とキャパシタＣｃとは、差動線路２４Ｂ上を流れる高周波ノイズ成分を減衰するローパスフィルタを構成している。ローパスフィルタは例えば３０ＭＨｚ以上の周波数帯域のノイズ成分を低減するように設定する。 As will be described later, high-frequency noise components generated in the rectifying and smoothing circuit 21 flow through the differential lines 24A and 24B. The inductor Ls1 and the capacitor Cc constitute a low-pass filter that attenuates high-frequency noise components flowing on the differential line 24A. Similarly, the inductor Ls2 and the capacitor Cc constitute a low-pass filter that attenuates high-frequency noise components flowing on the differential line 24B. The low pass filter is set so as to reduce noise components in a frequency band of 30 MHz or more, for example.
　次に、フィルタ回路２３の機能について説明する。 Next, the function of the filter circuit 23 will be described.
　整流平滑回路２１では、給電装置１０のスイッチングに起因する電圧の過渡応答（高周波ノイズ成分）が発生する。具体的には、整流平滑回路２１の入力部に印加される交流電圧の極性が反転した際に起こる整流回路のリカバリー特性により交流電圧が歪む。また、整流平滑後の直流電圧で入力部に印加される交流電圧がクリップされ、その波形は台形状になる。この交流電圧のひずみ波形が高周波ノイズ成分を有している。整流平滑回路２１で発生する高周波ノイズ成分は、入力部Ｉｎ１，Ｉｎ２から差動線路２４Ａ，２４Ｂを流れ、共振回路２２から放射される。差動線路２４Ａ，２４Ｂ間に接続される直列回路２３１は、高周波ノイズ成分を減衰させる。 In the rectifying / smoothing circuit 21, a voltage transient response (high-frequency noise component) due to switching of the power supply apparatus 10 occurs. Specifically, the AC voltage is distorted by the recovery characteristic of the rectifier circuit that occurs when the polarity of the AC voltage applied to the input portion of the rectifying and smoothing circuit 21 is reversed. Moreover, the alternating voltage applied to an input part is clipped with the direct current voltage after rectification smoothing, and the waveform becomes trapezoid. This AC voltage distortion waveform has a high-frequency noise component. The high frequency noise component generated in the rectifying / smoothing circuit 21 flows from the input portions In 1 and In 2 through the differential lines 24A and 24B and is radiated from the resonance circuit 22. The series circuit 231 connected between the differential lines 24A and 24B attenuates high frequency noise components.
　直列回路２３１により減衰されたノイズ成分は、インダクタＬｓ１，Ｌｓ２とキャパシタＣｃとのローパスフィルタで、さらに減衰される。これにより、差動線路２４Ａ，２４Ｂを流れるノイズ成分がコイルＬ２へ流入することを防止できる。その結果、コイルＬ２からのノイズ放射を防止でき、放射ノイズの少ない電力給電システムを実現できる。 The noise component attenuated by the series circuit 231 is further attenuated by a low-pass filter including the inductors Ls1 and Ls2 and the capacitor Cc. Thereby, it is possible to prevent a noise component flowing through the differential lines 24A and 24B from flowing into the coil L2. As a result, noise radiation from the coil L2 can be prevented, and a power feeding system with little radiation noise can be realized.
　このフィルタ回路２３において、キャパシタＣｃのキャパシタンスをＣin、キャパシタＣａのキャパシタンスをＣoutで表すと、以下の理由により、Ｃin≧Ｃoutの関係となることが好ましい。 In this filter circuit 23, when the capacitance of the capacitor Cc is represented by Cin and the capacitance of the capacitor Ca is represented by Cout, it is preferable that Cin ≧ Cout for the following reasons.
　インダクタＬｓ１，Ｌｓ２は、スイッチングに起因する高周波ノイズ成分（例えば７０ＭＨｚ以上）に対してインピーダンスが高く、駆動周波数でのインピーダンスが低い。駆動周波数において、インダクタＬｓ１、Ｌｓ２のインピーダンスは低く、簡単のためインダクタＬｓ１、Ｌｓ２のインピーダンスを無視すると、キャパシタＣｃ，Ｃａは並列接続されている。そして、給電装置１０からの給電（例えば、駆動周波数６．７８ＭＨｚ）を考慮すると、並列接続されるキャパシタＣｃ，Ｃａの合成キャパシタンスは小さい方が、負荷回路２４への給電効率への影響が小さい。一方、整流平滑回路２１から出力されるノイズ成分を減衰させるフィルタとしては、並列接続されるキャパシタＣｃ，Ｃａの合成キャパシタンスは大きい方がよい。したがって、キャパシタＣｃ，Ｃａの合成キャパシタンス（Ｃｃ＋Ｃａ）には制限が設けられる。 The inductors Ls1 and Ls2 have a high impedance with respect to a high-frequency noise component (for example, 70 MHz or more) due to switching, and a low impedance at a driving frequency. At the driving frequency, the impedances of the inductors Ls1 and Ls2 are low, and the capacitors Cc and Ca are connected in parallel when the impedances of the inductors Ls1 and Ls2 are ignored for simplicity. In consideration of the power supply from the power supply device 10 (for example, the driving frequency of 6.78 MHz), the smaller the combined capacitance of the capacitors Cc and Ca connected in parallel, the smaller the influence on the power supply efficiency to the load circuit 24. On the other hand, as a filter for attenuating the noise component output from the rectifying and smoothing circuit 21, it is preferable that the combined capacitance of the capacitors Cc and Ca connected in parallel is large. Accordingly, there is a limit on the combined capacitance (Cc + Ca) of the capacitors Cc and Ca.
　また、キャパシタＣａのキャパシタンスＣoutを大きくすると共振回路２２から整流平滑回路２１への給電電力が、抵抗Ｒａにより消費される。このため、キャパシタＣａのキャパシタンスＣoutは小さい方が好ましい。さらに、ローパスフィルタで高周波成分をさらに減衰する必要があるため、キャパシタＣｃのキャパシタンスＣinは大きい方が好ましい。以上の理由により、Ｃin≧Ｃoutの関係となることが好ましい。 Further, when the capacitance Cout of the capacitor Ca is increased, the power supplied from the resonance circuit 22 to the rectifying / smoothing circuit 21 is consumed by the resistor Ra. For this reason, it is preferable that the capacitance Cout of the capacitor Ca is small. Furthermore, since it is necessary to further attenuate high-frequency components with a low-pass filter, it is preferable that the capacitance Cin of the capacitor Cc is large. For the above reasons, it is preferable that Cin ≧ Cout.
　図２（Ａ）は、フィルタ回路２３を設けない場合の、コイルＬ２の端部の電位の周波数成分を示す図、図２（Ｂ）は、フィルタ回路２３を設ける場合の、コイルＬ２の端部の電位の周波数成分を示す図である。図２（Ａ）と図２（Ｂ）とを比較すると、特に約４００ＭＨｚ付近（図中の円内）でのノイズレベルが下がっていることが読み取れる。 2A shows a frequency component of the potential at the end of the coil L2 when the filter circuit 23 is not provided, and FIG. 2B shows an end of the coil L2 when the filter circuit 23 is provided. It is a figure which shows the frequency component of the electric potential. Comparing FIG. 2 (A) and FIG. 2 (B), it can be seen that the noise level is lowered particularly in the vicinity of about 400 MHz (in the circle in the figure).
（実施形態２）
　実施形態２では、受電装置が備えるフィルタ回路の構成が、実施形態１と相違する。 (Embodiment 2)
In the second embodiment, the configuration of the filter circuit included in the power receiving device is different from that of the first embodiment.
　図３は、実施形態２に係る受電装置２０Ａの回路図である。 FIG. 3 is a circuit diagram of the power receiving device 20A according to the second embodiment.
　フィルタ回路２３Ａは、直列回路２３１、インダクタＬｓ１，Ｌｓ２、及びキャパシタＣｃ１，Ｃｃ２を有している。直列回路２３１、及びインダクタＬｓ１，Ｌｓ２は、実施形態１と同じである。キャパシタＣｃ１，Ｃｃ２は直列に接続されている。 The filter circuit 23A includes a series circuit 231, inductors Ls1 and Ls2, and capacitors Cc1 and Cc2. The series circuit 231 and the inductors Ls1 and Ls2 are the same as those in the first embodiment. Capacitors Cc1 and Cc2 are connected in series.
　キャパシタＣｃ１，Ｃｃ２は、インダクタＬｓ１，Ｌｓ２よりも共振回路２２側の位置で、差動線路２４Ａ，２４Ｂ間に接続されている。キャパシタＣｃ１，Ｃｃ２の接続点は、受電装置２０Ａの基準電位に接続されている。ここで、基準電位は、受電装置の回路のグランド電位であり、例えば、受電装置２０Ａの筐体に含まれる導電部分、シールドケース、回路基板に面状に広がる導体パターン等も基準電位に接続される。キャパシタＣｃ１，Ｃｃ２は同じキャパシタンスを有している。キャパシタＣｃ２は、本発明に係る「第３キャパシタ」の一例である。 The capacitors Cc1 and Cc2 are connected between the differential lines 24A and 24B at a position closer to the resonance circuit 22 than the inductors Ls1 and Ls2. The connection point of the capacitors Cc1 and Cc2 is connected to the reference potential of the power receiving device 20A. Here, the reference potential is a ground potential of the circuit of the power receiving device. For example, a conductive portion, a shield case, a conductor pattern extending in a planar shape on the circuit board, etc. included in the housing of the power receiving device 20A are also connected to the reference potential. The Capacitors Cc1 and Cc2 have the same capacitance. The capacitor Cc2 is an example of the “third capacitor” according to the present invention.
　インダクタＬｓ１，Ｌｓ２とキャパシタＣｃ１とは、差動線路２４Ａ，２４Ｂ上を流れる高周波ノイズ成分を減衰するローパスフィルタを構成している。 The inductors Ls1, Ls2 and the capacitor Cc1 constitute a low-pass filter that attenuates high-frequency noise components flowing on the differential lines 24A, 24B.
　前記のように、キャパシタＣｃ１，Ｃｃ２の中点は基準電位に接続されている。これにより、高周波ノイズ成分をコイルＬ２に入力する手前でキャパシタＣｃ１，Ｃｃ２を経由して受電装置２０Ａの基準電位に戻すことができる。その結果、コモンモード信号（ノイズ）がコイルＬ２から外部へ放射されることを低減できる。 As described above, the middle point of the capacitors Cc1 and Cc2 is connected to the reference potential. As a result, the high frequency noise component can be returned to the reference potential of the power receiving apparatus 20A via the capacitors Cc1 and Cc2 before the high frequency noise component is input to the coil L2. As a result, the common mode signal (noise) can be reduced from being radiated to the outside from the coil L2.
　図４（Ａ）は、キャパシタＣｃ１，Ｃｃ２の接続点を基準電位に接続しない場合の、コイルＬ２の端部の電位の周波数成分を示す図、図４（Ｂ）は、キャパシタＣｃ１，Ｃｃ２の接続点を基準電位に接続する場合の、コイルＬ２の端部の電位の周波数成分を示す図である。図４（Ａ）と図４（Ｂ）とを比較すると、特に約１００ＭＨｚ以上の帯域（図中の円内）でのノイズレベルが約５ｄＢ以上減衰している。 4A shows a frequency component of the potential at the end of the coil L2 when the connection point of the capacitors Cc1 and Cc2 is not connected to the reference potential, and FIG. 4B shows the connection of the capacitors Cc1 and Cc2. It is a figure which shows the frequency component of the electric potential of the edge part of the coil L2, when connecting a point to a reference electric potential. Comparing FIG. 4A and FIG. 4B, the noise level is attenuated by about 5 dB or more particularly in a band of about 100 MHz or more (in the circle in the figure).
（実施形態３）
　実施形態３に係る受電装置は、シールド導体を備える点で、実施形態２と相違する。 (Embodiment 3)
The power receiving device according to the third embodiment is different from the second embodiment in that it includes a shield conductor.
　図５（Ａ）は、実施形態３に係る受電装置２０Ｂの回路図、図５（Ｂ）は、受電装置２０Ｂの側面図である。 FIG. 5A is a circuit diagram of the power receiving device 20B according to the third embodiment, and FIG. 5B is a side view of the power receiving device 20B.
　受電装置２０Ｂの回路構成は、実施形態２に係る受電装置２０Ａと同じであり、受電装置２０Ｂは、図３に示す受電装置２０Ａにシールド導体３０を設けた構成である。受電装置２０Ｂは基板１００を備えている。基板１００の一方主面には、コイルＬ２、キャパシタＣ２１，Ｃ２２等の各素子が実装されている。基板１００の他方主面には、基準電位となるグランド導体１０１が形成されている。キャパシタＣｃ１，Ｃｃ２の接続点は、このグランド導体１０１に接続されている。 The circuit configuration of the power receiving device 20B is the same as that of the power receiving device 20A according to the second embodiment, and the power receiving device 20B has a configuration in which the shield conductor 30 is provided in the power receiving device 20A shown in FIG. The power receiving device 20B includes a substrate 100. Each element such as a coil L2 and capacitors C21 and C22 is mounted on one main surface of the substrate 100. A ground conductor 101 serving as a reference potential is formed on the other main surface of the substrate 100. The connection point of the capacitors Cc1 and Cc2 is connected to the ground conductor 101.
　シールド導体３０は、少なくとも高周波ノイズ電圧が重畳する部分、例えば、整流平滑回路２１、直列回路２３１、及びインダクタＬｓ１，Ｌｓ２を囲うように、基板１００の一方主面に設けられている。シールド導体３０は、グランド導体１０１（整流平滑回路２１の出力部Ｏｕｔ２）に接続されている。 The shield conductor 30 is provided on one main surface of the substrate 100 so as to surround at least a portion where the high-frequency noise voltage is superimposed, for example, the rectifying and smoothing circuit 21, the series circuit 231, and the inductors Ls1 and Ls2. The shield conductor 30 is connected to the ground conductor 101 (the output part Out2 of the rectifying and smoothing circuit 21).
　シールド導体３０は、高周波電圧が重畳するインダクタＬｓ１，Ｌｓ２の周辺の電圧変動に起因するノイズ電流が周囲に漏れないようにすればよく、図５（Ｂ）に示すようにインダクタＬｓ１，Ｌｓ２を全て覆わなくてもよいし、全て覆っていてもよい。なお、インダクタＬｓ１，Ｌｓ２の磁路が開磁型の場合、インダクタＬｓ１，Ｌｓ２の周囲に磁界が漏れるので、インダクタＬｓ１，Ｌｓ２の電気特性（インダクタンス，レジスタンス）はシールド導体３０の影響を受ける場合がある。その場合には、シールド導体３０をインダクタＬｓ１，Ｌｓ２から遠ざけるとよい。シールド導体３０とインダクタＬｓ１，Ｌｓ２を物理的に離すことによって、シールド導体３０における漏れ磁界の強度を低減し、インダクタＬｓ１，Ｌｓ２の電気特性への影響を軽減できるからである。 The shield conductor 30 may be configured so that noise current caused by voltage fluctuations around the inductors Ls1 and Ls2 on which the high-frequency voltage is superimposed does not leak to the surroundings. As shown in FIG. It does not need to be covered or all of it may be covered. When the magnetic paths of the inductors Ls1 and Ls2 are open magnetic types, a magnetic field leaks around the inductors Ls1 and Ls2, so that the electrical characteristics (inductance and resistance) of the inductors Ls1 and Ls2 may be affected by the shield conductor 30. is there. In that case, the shield conductor 30 may be kept away from the inductors Ls1 and Ls2. This is because by physically separating the shield conductor 30 and the inductors Ls1 and Ls2, the strength of the leakage magnetic field in the shield conductor 30 can be reduced, and the influence on the electrical characteristics of the inductors Ls1 and Ls2 can be reduced.
　この構成では、高周波ノイズ電圧が重畳する部分からノイズ成分が輻射されても、シールド導体３０（グランド導体１０１）により遮蔽し、ノイズ電流を基準電位に短い経路で戻すことができる。これにより、周囲の導体（例えば、筐体内の金属部、他の回路基板のグランド、バッテリーの外装などの導体）への不要な電磁界結合を軽減することができ、コモンモードノイズを低減することができ、ＥＭＩ（Electro Magnetic Interference）を抑制できる。 In this configuration, even if a noise component is radiated from the portion where the high frequency noise voltage is superimposed, it can be shielded by the shield conductor 30 (ground conductor 101), and the noise current can be returned to the reference potential through a short path. As a result, unnecessary electromagnetic coupling to surrounding conductors (for example, metal parts in the casing, grounds of other circuit boards, conductors such as battery exteriors) can be reduced, and common mode noise can be reduced. EMI (Electro Magnetic Interference) can be suppressed.
　なお、シールド導体３０は、受電装置２０Ｂを構成する全ての素子を覆うように基板１００の一方主面に設けられてもよい。 Note that the shield conductor 30 may be provided on one main surface of the substrate 100 so as to cover all the elements constituting the power receiving device 20B.
（実施形態４）
　実施形態４に係る受電装置は、実施形態１に係る受電装置、又は、実施形態２，３に係る受電装置と同じ回路構成である。この回路構成において、インダクタＬｓ１，Ｌｓ２（例えば、図１参照）を、複合インダクタで構成したものを用いている。 (Embodiment 4)
The power receiving device according to the fourth embodiment has the same circuit configuration as the power receiving device according to the first embodiment or the power receiving device according to the second and third embodiments. In this circuit configuration, inductors Ls1 and Ls2 (see, for example, FIG. 1) configured with composite inductors are used.
　図６は、実施形態４に係る受電装置２０Ｃの回路図である。 FIG. 6 is a circuit diagram of the power receiving device 20C according to the fourth embodiment.
　受電装置２０Ｃの回路構成は、実施形態２に係る受電装置２０Ａと同じである。本実施形態では、インダクタＬｓ１，Ｌｓ２は、一つの複合インダクタ４０で構成されている。 The circuit configuration of the power receiving device 20C is the same as that of the power receiving device 20A according to the second embodiment. In the present embodiment, the inductors Ls1 and Ls2 are configured by one composite inductor 40.
　図７は、複合インダクタ４０を示す断面図である。 FIG. 7 is a cross-sectional view showing the composite inductor 40.
　複合インダクタ４０は積層体４１を備えている。積層体４１は、複数のフェライトシートが積層され、焼結されてなる絶縁体である。積層体４１は、本発明に係る「フェライト多層基板」の一例である。 The composite inductor 40 includes a multilayer body 41. The laminate 41 is an insulator in which a plurality of ferrite sheets are laminated and sintered. The laminate 41 is an example of the “ferrite multilayer substrate” according to the present invention.
　積層体４１は、磁性体層４２、非磁性体層４３、磁性体層４４、非磁性体層４５、磁性体層４６の順に積層されている。非磁性体層４３，４５は、磁性体層４２，４４，４６に比べて低透磁率を有している。 The laminated body 41 is laminated in the order of the magnetic layer 42, the nonmagnetic layer 43, the magnetic layer 44, the nonmagnetic layer 45, and the magnetic layer 46. The nonmagnetic layers 43 and 45 have a lower magnetic permeability than the magnetic layers 42, 44 and 46.
　非磁性体層４３，４５には、巻回軸が一致するように、インダクタＬｓ１，Ｌｓ２が形成されている。詳しくは、インダクタＬｓ１は、非磁性体層４３の各層に形成される、開ループ状の導体パターンが不図示のビア導体で接続されて形成される。同様に、インダクタＬｓ２は、非磁性体層４５の各層に形成される、開ループ状の導体パターンが不図示のビア導体で接続されて形成される。 In the nonmagnetic layers 43 and 45, inductors Ls1 and Ls2 are formed so that the winding axes coincide with each other. Specifically, the inductor Ls1 is formed by connecting an open loop conductor pattern formed in each layer of the nonmagnetic layer 43 with via conductors (not shown). Similarly, the inductor Ls2 is formed by connecting an open loop conductor pattern formed in each layer of the nonmagnetic material layer 45 with a via conductor (not shown).
　インダクタＬｓ１，Ｌｓ２を低透磁率の非磁性体層４３内に形成することで、インダクタＬｓ１，Ｌｓ２の磁気飽和を防止できる。このため、インダクタＬｓ１，Ｌｓ２のインダクタンスの低下を防止できる。 By forming the inductors Ls1 and Ls2 in the low magnetic permeability non-magnetic layer 43, magnetic saturation of the inductors Ls1 and Ls2 can be prevented. For this reason, it is possible to prevent a decrease in inductance of the inductors Ls1 and Ls2.
　また、インダクタＬｓ１，Ｌｓ２が形成される非磁性体層４３，４５を挟むようにして、磁性体層４２，４４，４６が積層されている。インダクタＬｓ１，Ｌｓ２の間に磁性体層４４が設けられることにより、インダクタＬｓ１，Ｌｓ２の結合度を弱くできる。このインダクタＬｓ１，Ｌｓ２の結合係数は、絶対値で０以上０．９以下に設定されていることが好ましい。 Further, the magnetic layers 42, 44, 46 are laminated so as to sandwich the nonmagnetic layers 43, 45 where the inductors Ls1, Ls2 are formed. By providing the magnetic layer 44 between the inductors Ls1 and Ls2, the degree of coupling between the inductors Ls1 and Ls2 can be weakened. The coupling coefficient of the inductors Ls1 and Ls2 is preferably set to 0 or more and 0.9 or less in absolute value.
　インダクタＬｓ１，Ｌｓ２の結合度を弱くすることで、複合インダクタ４０を用いても、インダクタＬｓ１，Ｌｓ２は、コモンモード信号（ノイズ）及び差動モード信号（ノイズ）の何れに対しても、インダクタンスを持つようになる。このため、インダクタＬｓ１，Ｌｓ２それぞれに巻線コイル等を用いる場合と比べて、部品点数を削減することができ、また、小型化できる。 By reducing the degree of coupling between the inductors Ls1 and Ls2, even if the composite inductor 40 is used, the inductors Ls1 and Ls2 provide inductance for both the common mode signal (noise) and the differential mode signal (noise). To have. For this reason, compared with the case where a winding coil etc. are used for each of inductor Ls1, Ls2, a number of parts can be reduced and it can reduce in size.
　積層体４１の主面（磁性体層４６の主面）には、インダクタＬ２１，Ｌｓ２が接続される実装電極４７Ａ，４７Ｄ以外に、複数のダミー電極４７Ｂ，４７Ｃが設けられる。このダミー電極４７Ｂ，４７Ｃを基板に実装することで、複合インダクタ４０の発熱を実装基板に放熱することができる。 In addition to the mounting electrodes 47A and 47D to which the inductors L21 and Ls2 are connected, a plurality of dummy electrodes 47B and 47C are provided on the main surface of the multilayer body 41 (main surface of the magnetic layer 46). By mounting the dummy electrodes 47B and 47C on the substrate, the heat generated by the composite inductor 40 can be radiated to the mounting substrate.
　上述の実施形態では、磁界結合を利用した磁界型の非接触電力伝送システムについて説明し、送電結合部及び受電結合部が磁束を放射しやすい、又は集めやすいコイルである場合について説明した。しかし、電力供給システムは磁界型の非接触電力伝送システムに限らず、電界結合を利用した電界結合型の非接触電力伝送システムにも適応することができる。この場合、送電結合部及び受電結合部は面状導体となる。この場合であっても、上述の実施形態のフィルタ回路を受電装置内に組み込むことにより、受電結合部である面状導体からノイズが放射されることを抑制できる。なお、電界及び磁界の両方を利用した電磁界結合型の非接触電力伝送システムにも適応できる。 In the above-described embodiment, a magnetic field type non-contact power transmission system using magnetic field coupling has been described, and the case where the power transmission coupling unit and the power reception coupling unit are coils that easily radiate or collect magnetic flux has been described. However, the power supply system is not limited to the magnetic field type non-contact power transmission system, but can be applied to an electric field coupling type non-contact power transmission system using electric field coupling. In this case, the power transmission coupling portion and the power reception coupling portion are planar conductors. Even in this case, by incorporating the filter circuit of the above-described embodiment into the power receiving apparatus, it is possible to suppress noise from being radiated from the planar conductor that is the power receiving coupling portion. Note that the present invention can also be applied to an electromagnetic coupling type non-contact power transmission system using both an electric field and a magnetic field.
　また、上述の実施形態では、主に受電装置内の整流平滑回路に起因するノイズがコイル（受電結合部）から放射されるのを抑制するためのフィルタ回路について説明した。しかし、受電装置内で負荷に供給する電力を変換するＤＣ－ＤＣコンバータ等、受電結合部に接続される他のノイズ発生源起因のノイズに対しても、前記のフィルタ回路を適用して、受電結合部からのノイズの発生を抑制できる。 In the above-described embodiment, the filter circuit for suppressing noise radiated mainly from the rectifying and smoothing circuit in the power receiving apparatus from the coil (power receiving coupling unit) has been described. However, the above-described filter circuit is also applied to the noise caused by other noise generation sources connected to the power receiving coupling unit, such as a DC-DC converter that converts the power supplied to the load in the power receiving device. Generation of noise from the coupling portion can be suppressed.
（他の実施形態）
　図１に示した共振回路１２は、コイルＬ１の両端にキャパシタＣ１１，Ｃ１２を直列接続した直列共振回路を構成しているが、共振回路１２はこの構成に限らない。例えば並列共振回路であってもよいし、コイルＬ１の一方端にキャパシタを接続した直列共振回路であってもよい。 (Other embodiments)
1 constitutes a series resonance circuit in which capacitors C11 and C12 are connected in series at both ends of the coil L1, but the resonance circuit 12 is not limited to this configuration. For example, it may be a parallel resonance circuit or a series resonance circuit in which a capacitor is connected to one end of the coil L1.
　また、図１、図３、図５（Ａ）、図６に示した共振回路２２は、コイルＬ２の両端にキャパシタＣ２１，Ｃ２２を直列接続した直列共振回路を構成しているが、共振回路２２はこの構成に限らない。例えば、図８は図１に示した受電装置２０の変形例である。この図８に示すように、コイルＬ２の一方の端にキャパシタＣ２１を接続した直列共振回路で共振回路２２Ａを構成してもよい。また、並列共振回路であってもよい。 The resonant circuit 22 shown in FIGS. 1, 3, 5A, and 6 constitutes a series resonant circuit in which capacitors C21 and C22 are connected in series to both ends of the coil L2. Is not limited to this configuration. For example, FIG. 8 shows a modification of the power receiving device 20 shown in FIG. As shown in FIG. 8, the resonance circuit 22A may be configured by a series resonance circuit in which a capacitor C21 is connected to one end of the coil L2. Further, it may be a parallel resonant circuit.
　また、以上に示した各実施形態では、「第１直列回路」の例として、単一のキャパシタＣａと単一の抵抗Ｒａとの直列回路２３１を示したが、この直列回路２３１はこの構成に限らない。例えば図９（Ａ）に示すように、複数の抵抗ＲａとキャパシタＣａとの組み合わせで直列回路２３１Ａを構成してもよいし、図９（Ｂ）に示すように、複数のキャパシタＣａと抵抗Ｒａとの組み合わせで直列回路２３１Ｂを構成してもよい。 In each of the embodiments described above, the series circuit 231 including the single capacitor Ca and the single resistor Ra is shown as an example of the “first series circuit”. However, the series circuit 231 has this configuration. Not exclusively. For example, as shown in FIG. 9A, a series circuit 231A may be configured by a combination of a plurality of resistors Ra and a capacitor Ca, or as shown in FIG. 9B, a plurality of capacitors Ca and a resistor Ra. The series circuit 231B may be configured in combination with
　また、図１、図３、図５（Ａ）、図６に示したフィルタ回路２３，２３Ａは、差動線路に挿入されたインダクタＬｓ１，Ｌｓ２を備えているが、フィルタ回路２３，２３Ａはこの構成に限らない。例えば、図１０は図１に示した受電装置２０の変形例である。図１０に示す例では、インダクタＬｓ１，Ｌｓ２にキャパシタＣｂ１，Ｃｂ２をそれぞれ並列接続した並列共振回路を有するフィルタ回路２３Ｂを構成している。これら並列共振回路は、その共振周波数を、除去すべき特定高周波ノイズの周波数帯に合わせる。この構成により、並列共振回路は、その共振周波数でインピーダンスが高くなって、特定高周波ノイズが効果的に除去される。 The filter circuits 23 and 23A shown in FIGS. 1, 3, 5A, and 6 include inductors Ls1 and Ls2 inserted in the differential lines. It is not limited to the configuration. For example, FIG. 10 is a modified example of the power receiving device 20 shown in FIG. In the example shown in FIG. 10, a filter circuit 23B having a parallel resonant circuit in which capacitors Cb1 and Cb2 are connected in parallel to inductors Ls1 and Ls2, respectively. These parallel resonance circuits adjust the resonance frequency to the frequency band of the specific high frequency noise to be removed. With this configuration, the parallel resonant circuit has high impedance at the resonance frequency, and specific high frequency noise is effectively removed.
　また、図１、図３、図５（Ａ）、図６に示したフィルタ回路２３，２３Ａは、差動線路に挿入されたインダクタＬｓ１，Ｌｓ２を備えているが、フィルタ回路２３，２３Ａはこの構成に限らない。例えば、図１１（Ａ）（Ｂ）はいずれも図１に示した受電装置２０の変形例である。図１１（Ａ）（Ｂ）において、フィルタ回路２３Ｃは、一方の線路にのみ素子を接続した不平衡回路を構成している。特に、図１１（Ｂ）に示す例では、共振回路２２Ａについても、コイルＬ２の一方の端にキャパシタＣ２１を接続した直列共振回路を構成している。このように、受電装置を不平衡回路で構成してもよい。 The filter circuits 23 and 23A shown in FIGS. 1, 3, 5A, and 6 include inductors Ls1 and Ls2 inserted in the differential lines. It is not limited to the configuration. For example, FIGS. 11A and 11B are modifications of the power receiving device 20 shown in FIG. 11A and 11B, the filter circuit 23C constitutes an unbalanced circuit in which elements are connected to only one line. In particular, in the example shown in FIG. 11B, the resonance circuit 22A also forms a series resonance circuit in which a capacitor C21 is connected to one end of the coil L2. In this manner, the power receiving device may be configured with an unbalanced circuit.
　なお、フィルタ回路は、図１に示したフィルタ回路２３において、インダクタＬｓ２を残し、インダクタＬｓ１を無くしてもよい。また、共振回路は、図１に示した共振回路２２において、キャパシタＣ２２を残し、キャパシタＣ２１を無くしてもよい。 In addition, the filter circuit may leave the inductor Ls1 and leave the inductor Ls1 in the filter circuit 23 shown in FIG. Further, the resonance circuit may leave the capacitor C21 and eliminate the capacitor C21 in the resonance circuit 22 shown in FIG.
　これらの構成によれば、素子数が削減され、小型化、低コスト化が図れる。 According to these configurations, the number of elements can be reduced, and the size and cost can be reduced.
Ｃ１１，Ｃ１２…キャパシタ
Ｃ２１，Ｃ２２…キャパシタ
Ｃａ…キャパシタ（第１キャパシタ）
Ｃｃ…キャパシタ（第２キャパシタ）
Ｃｃ１…キャパシタ（第２キャパシタ）
Ｃｃ２…キャパシタ（第３キャパシタ）
Ｃin…キャパシタンス
Ｃout…キャパシタンス
Ｉｎ１，Ｉｎ２…入力部
Ｌ１…コイル（給電結合部）
Ｌ２…コイル（受電結合部）
Ｌｓ１…インダクタ（第１インダクタ）
Ｌｓ２…インダクタ（第２インダクタ）
Ｏｕｔ１，Ｏｕｔ２…出力部
Ｒａ…抵抗
Ｖｉｎ…直流電源
１…電力供給システム
１０…給電装置
１１…インバータ回路
１２…共振回路
２０，２０Ａ，２０Ｂ，２０Ｃ…受電装置
２１…整流平滑回路（整流回路）
２２，２２Ａ…共振回路
２３，２３Ａ，２３Ｂ，２３Ｃ…フィルタ回路（ノイズフィルタ回路）
２４…負荷回路
２４Ａ…差動線路（第１線路）
２４Ｂ…差動線路（第２線路）
３０…シールド導体（遮蔽導体）
４０…複合インダクタ
４１…積層体
４２，４４，４６…磁性体層
４３…非磁性体層
４３，４５…非磁性体層
４７Ａ，４７Ｄ…実装電極
４７Ｂ，４７Ｃ…ダミー電極
１００…基板
１０１…グランド導体
２３１，２３１Ａ，２３１Ｂ…直列回路（第１直列回路） C11, C12 ... Capacitors C21, C22 ... Capacitor Ca ... Capacitor (first capacitor)
Cc: Capacitor (second capacitor)
Cc1 .. capacitor (second capacitor)
Cc2: Capacitor (third capacitor)
Cin ... capacitance Cout ... capacitance In 1, In 2 ... input unit L1 ... coil (feed coupling portion)
L2 ... Coil (power receiving coupling part)
Ls1 ... Inductor (first inductor)
Ls2: Inductor (second inductor)
Out1, Out2 ... Output unit Ra ... Resistance Vin ... DC power supply 1 ... Power supply system 10 ... Power feeding device 11 ... Inverter circuit 12 ... Resonant circuits 20, 20A, 20B, 20C ... Power receiving device 21 ... Rectification smoothing circuit (rectification circuit)
22, 22A ... Resonant circuits 23, 23A, 23B, 23C ... Filter circuit (noise filter circuit)
24 ... Load circuit 24A ... Differential line (first line)
24B ... Differential line (second line)
30 ... Shield conductor (shield conductor)
40 ... Composite inductor 41 ... Laminated bodies 42, 44, 46 ... Magnetic layer 43 ... Nonmagnetic layer 43,45 ... Nonmagnetic layers 47A, 47D ... Mounting electrodes 47B, 47C ... Dummy electrode 100 ... Substrate 101 ... Ground conductor 231, 231A, 231B ... Series circuit (first series circuit)

Claims (8)

  1. 　給電装置の給電結合部と結合する受電結合部と、
    　前記受電結合部に接続される入力部、及び負荷に接続される出力部を有する整流回路と、
    　前記整流回路の前記入力部に接続されているノイズフィルタ回路と、
    　を備え、
    　前記ノイズフィルタ回路は、前記受電結合部から視て、前記整流回路の前記入力部に対して並列に接続されている、第１キャパシタと抵抗との第１直列回路を有する、
    　受電装置。     A power receiving coupling portion coupled to a power feeding coupling portion of the power feeding device;
    A rectifier circuit having an input section connected to the power receiving coupling section and an output section connected to a load;
    A noise filter circuit connected to the input of the rectifier circuit;
    With
    The noise filter circuit includes a first series circuit of a first capacitor and a resistor, which is connected in parallel to the input unit of the rectifier circuit as viewed from the power receiving coupling unit.
    Power receiving device.
  2. 　前記ノイズフィルタ回路は、
    　前記第１直列回路及び前記整流回路の第１並列回路に対して、前記受電結合部から視て、直列接続されているインダクタと、
    　前記第１並列回路と前記インダクタとの第２直列回路に対して、並列に接続されている第２キャパシタと、
    　を有する、請求項１に記載の受電装置。     The noise filter circuit is
    An inductor connected in series with respect to the first series circuit and the first parallel circuit of the rectifier circuit, as viewed from the power receiving coupling portion,
    A second capacitor connected in parallel to a second series circuit of the first parallel circuit and the inductor;
    The power receiving device according to claim 1, comprising:
  3. 　前記第１キャパシタのキャパシタンスをＣout、前記第２キャパシタのキャパシタンスをＣinで表すと、Ｃin≧Ｃoutである、
    　請求項２に記載の受電装置。     When the capacitance of the first capacitor is Cout and the capacitance of the second capacitor is Cin, Cin ≧ Cout.
    The power receiving device according to claim 2.
  4. 　前記第２キャパシタは、直列接続された複数のキャパシタを有し、
    　前記第２キャパシタの前記複数のキャパシタの接続点は、基準電位に接続されている、
    　請求項２又は請求項３に記載の受電装置。     The second capacitor has a plurality of capacitors connected in series,
    Connection points of the plurality of capacitors of the second capacitor are connected to a reference potential,
    The power receiving device according to claim 2 or claim 3.
  5. 　前記受電結合部と前記整流回路の入力部とは、第１線路と第２線路とで構成される差動線路で接続され、
    　前記ノイズフィルタ回路は前記差動線路に設けられ、
    　前記インダクタは、前記第１線路に設けられる第１インダクタ、及び前記第２線路に設けられる第２インダクタを有し、
    　前記第１インダクタ及び前記第２インダクタは、複合インダクタで構成される、
    　請求項２から請求項４の何れかに記載の受電装置。     The power receiving coupling portion and the input portion of the rectifier circuit are connected by a differential line composed of a first line and a second line,
    The noise filter circuit is provided in the differential line,
    The inductor has a first inductor provided on the first line, and a second inductor provided on the second line,
    The first inductor and the second inductor are composed of composite inductors,
    The power receiving device according to any one of claims 2 to 4.
  6. 　前記第１インダクタ及び前記第２インダクタの結合係数は、絶対値で０．９以下に設定されている請求項５に記載の受電装置。 The power receiving device according to claim 5, wherein a coupling coefficient between the first inductor and the second inductor is set to an absolute value of 0.9 or less.
  7. 　前記インダクタは、フェライト多層基板内部に構成されている、
    　請求項２から請求項６の何れかに記載の受電装置。     The inductor is configured inside a ferrite multilayer substrate,
    The power receiving device according to any one of claims 2 to 6.
  8. 　前記第１直列回路、及び前記整流回路の入力部を遮蔽する遮蔽導体、
    　を備える、請求項１から請求項７の何れかに記載の受電装置。     A shielding conductor that shields the input part of the first series circuit and the rectifier circuit;
    The power receiving device according to any one of claims 1 to 7, further comprising:
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