WO2017154422A1 - Connection substrate - Google Patents

Connection substrate Download PDF

Info

Publication number
WO2017154422A1
WO2017154422A1 PCT/JP2017/003554 JP2017003554W WO2017154422A1 WO 2017154422 A1 WO2017154422 A1 WO 2017154422A1 JP 2017003554 W JP2017003554 W JP 2017003554W WO 2017154422 A1 WO2017154422 A1 WO 2017154422A1
Authority
WO
WIPO (PCT)
Prior art keywords
main surface
conductor
glass
hole
open
Prior art date
Application number
PCT/JP2017/003554
Other languages
French (fr)
Japanese (ja)
Inventor
杉夫 宮澤
達朗 高垣
井出 晃啓
Original Assignee
日本碍子株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本碍子株式会社 filed Critical 日本碍子株式会社
Priority to CN201780011941.7A priority Critical patent/CN108781506B/en
Priority to JP2018504052A priority patent/JP6918774B2/en
Priority to KR1020187024055A priority patent/KR20180121507A/en
Priority to DE112017001274.0T priority patent/DE112017001274T5/en
Publication of WO2017154422A1 publication Critical patent/WO2017154422A1/en
Priority to US16/108,339 priority patent/US10257941B2/en

Links

Images

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4061Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in inorganic insulating substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/115Via connections; Lands around holes or via connections
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/13Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/15Ceramic or glass substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0271Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/26Cleaning or polishing of the conductive pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203Fillers and particles
    • H05K2201/0206Materials
    • H05K2201/0209Inorganic, non-metallic particles
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/0959Plated through-holes or plated blind vias filled with insulating material
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0779Treatments involving liquids, e.g. plating, rinsing characterised by the specific liquids involved
    • H05K2203/0786Using an aqueous solution, e.g. for cleaning or during drilling of holes
    • H05K2203/0793Aqueous alkaline solution, e.g. for cleaning or etching

Definitions

  • the present invention relates to an electrical connection substrate in which a through conductor such as a via conductor is formed in a through hole.
  • a substrate for mounting an electronic device such as a SAW filter
  • a substrate (via substrate) having a structure in which a through hole is provided in an insulating substrate such as ceramic and the hole is filled with a conductor to form a through electrode is used.
  • insulating substrate such as ceramic
  • the via substrate which is a component, is also required to be thin. It has been.
  • the wiring on the substrate surface needs to be miniaturized for miniaturization, it is required to reduce the diameter of the through electrode and to increase the accuracy of the position. Furthermore, since these fine wirings are formed by photolithography or plating, it is particularly required that the through electrodes be dense and have high water tightness in order to prevent problems caused by the ingress of chemicals in the resist coating process and plating process. ing.
  • Patent Document 1 discloses a method of preventing the resist solution from entering by forming a conductive protective film on the surface of a porous through electrode.
  • the insulating substrate is thin, the air permeability of the through electrode is increased, so that the strength of the conductive protective film is insufficient and does not function as a protective film.
  • Patent Document 2 discloses a method of filling a void with a second conductor after forming a porous first conductor as a through electrode.
  • a ceramic substrate is used, cracks and warpage of the substrate are likely to occur when the substrate is thinned due to the difference in thermal expansion between the metal that is the conductive material and the ceramic.
  • Patent Document 3 discloses a method in which an active metal layer is formed between a ceramic substrate and a through electrode by filling the through hole of the ceramic substrate with a metal containing an active metal, thereby densifying the ceramic substrate.
  • a metal containing an active metal since the metal brazing containing the active metal has a very high viscosity, it cannot be filled well if the through electrode diameter is small.
  • Patent Document 4 discloses a method of using a conductive paste containing an expansion material when forming a through electrode. However, it is difficult to fill all the cavities with only the expansion material, and the denseness of the through electrode cannot be obtained particularly when the plate is thinned.
  • Patent Document 5 discloses a method of filling a glass paste after disposing a granular conductive material in each through hole of a ceramic substrate.
  • cracks and warpage due to the difference in thermal expansion between the ceramic and the spherical conductive material are likely to occur.
  • the through hole is small, it is difficult to arrange the spherical conductive material.
  • An object of the present invention is to provide a microstructure capable of improving the water-tightness of a through hole when manufacturing a connection board including a ceramic substrate and a through conductor provided in the through hole.
  • the connection substrate according to the present invention includes a ceramic substrate provided with a through hole, and a through conductor provided in the through hole, the through conductor having a first main surface and a second main surface.
  • the through conductor is formed in the first porous hole, the metal porous body provided with the first open hole communicating with the first main surface and the second open hole communicating with the second main surface.
  • the first glass phase, the second glass phase formed in the second open pores, the first void provided in the first open pores, and the first glass phase provided in the first open pores Two gaps are provided.
  • the first space is a closed space that does not communicate with the first main surface
  • the second space is an open space that communicates with the second main surface.
  • a through conductor is obtained by supplying a metal paste to a through hole of a ceramic substrate and baking it.
  • the microstructure of such through conductors is uniform throughout.
  • the thickness of the ceramic substrate became extremely small, it was considered that a part of the open pores communicated between both main surfaces of the penetrating conductor and a small amount of liquid leakage occurred.
  • the present inventor also studied to reduce the pores of the metal porous body constituting the through conductor.
  • the thermal expansion difference between the through conductor and the ceramic is large, so that peeling at the interface is likely to occur, and water tightness is impaired through this peeling portion.
  • the present inventor paid attention to the microstructure of the porous metal body mainly constituting the through conductor.
  • the metal porous body included a first open pore communicating with the first main surface and a second open pore communicating with the second main surface.
  • the present inventor has the first open pores communicating with the first main surface when suppressing peeling due to a difference in thermal expansion between the through conductor and the ceramic by generating a glass phase in each pore.
  • the air gap was closed by the glass phase, and thereby the water tightness function was mainly supported on the first open pore side of the through conductor.
  • the clad layer is not blocked by the glass phase, and the void is communicated with the second open pore. Accordingly, the penetration conductor and the ceramic are hardly peeled as a whole while maintaining the water tightness of the through conductor itself, and the water tightness is also maintained in this respect.
  • FIG. (A) is a top view which shows typically the ceramic base material 1 in which the through-hole 2 was arranged
  • (b) is a cross-sectional view of the ceramic base material 1.
  • FIG. (A) shows a state in which the metal paste 3 is filled in the through-holes of the ceramic substrate 1
  • (b) shows a state in which the metal paste 3 is baked to form the metal porous body 4
  • (c) The state which formed the glass layer 9 on the 1st main surface 1a of the ceramic base material 1 is shown
  • (d) shows the state which removed the glass layer 9.
  • FIG. FIG. 2A is a plan view schematically showing the connection substrate 10 in which the through conductor 11 is formed in the through hole 2 ⁇ / b> A
  • 2B is a cross-sectional view of the connection substrate 10. It is a schematic diagram which shows the structure of the metal porous body 4 produced
  • the ceramic substrate 1 is provided with one main surface 1a and the other main surface 1b, and a large number of through holes 2 penetrating between the main surfaces 1a and 1b are formed. Yes.
  • the through hole 2 has an opening 2a on the first main surface 1a side and an opening 2b on the second main surface 1b side.
  • a metal paste 3 is filled in the opening 2 of the ceramic substrate 1. Then, by heating the metal paste 3, the metal paste is baked to form a porous metal body 4 in the through hole 2 as shown in FIG.
  • Reference numeral 5 denotes a first main surface of the metal porous body 4, and 6 denotes a second main surface of the metal porous body 4.
  • a glass paste is applied on the first main surface 1a of the ceramic substrate 1 to form a glass paste layer.
  • the glass paste is melted by heating and baking the glass paste.
  • the glass layer 9 is formed on the 1st main surface 1a of the ceramic base material 1.
  • the molten glass is impregnated into the open pores of the metal porous body to generate a glass phase, thereby generating the through conductor 7 in the through hole.
  • Reference numeral 8 denotes a first main surface of the through conductor 8.
  • the through conductor is exposed on the first main surface side of the ceramic base material to obtain a connection substrate.
  • the first main surface 1a of the ceramic base material 1 is further polished to form a polished surface 1c as shown in FIG.
  • the through conductors 11 are filled in the through holes 2A.
  • 11 a is a first main surface of the through conductor 11
  • 11 b is a second main surface of the through conductor 11.
  • the metal porous body 4 is formed in the through hole 2 by baking the metal paste.
  • the metal porous body 4 extends from the first main surface 1a of the ceramic substrate 1 to the second main surface 1b.
  • 5 is the first main surface of the porous metal body, and 6 is the other main surface.
  • the metal porous body 4 includes a metal matrix 20 and pores 16A, 16B, 16C, and 16D.
  • the pores generated in the matrix include the first open pores 16A and 16D that open on the first main surface 5, the second open pore 16B that opens on the second main surface 6, and the main surfaces 5 and 6.
  • the open pores 16A are open to the first main surface 5 in the cross section of FIG.
  • the open pores 16D are not opened in the first main surface 5 in the cross section of FIG. 4, but are opened in the first main surface 5 along a route that does not appear in the cross section.
  • the open pores 16A and 16D are distinguished.
  • the air gap 33 is a closed air gap that does not communicate with the main surface, and the air gap 32 is an open air gap that opens in the second main surface 6.
  • the glass paste is applied so as to cover the open pores 16A and 16D opened in the first main surface 5.
  • the glass layer 18 is formed on the first main surface 1a, and at the same time, the molten glass is impregnated, and the glass phase 19 is formed in the open pores 16A and 16D.
  • the glass phase 17 originally present in the porous metal body may be mixed with the glass phase 19 generated by impregnation and baking of the glass paste.
  • the polishing surface 1c is formed on the ceramic substrate 1A, and the thickness of the ceramic substrate 1A is smaller than that before polishing.
  • a through conductor 11 is formed in the through hole 2A.
  • the first open holes 16A and 16D communicate with the first main surface 11a of the through conductor. Further, the second open hole 16B communicates with the second main surface 11b. 16C is a closed pore that does not communicate with either of the main surfaces 11a and 11b.
  • the glass phase 17 derived from the metal paste, the glass phase 19 derived from the glass impregnated later, and the void 30 that does not open in the main surface 11a remain.
  • the glass phase 17A derived from the metal paste and the voids 33 that do not open on the main surface remain.
  • the glass phase 17B derived from the metal paste the void 32 communicating with the main surface 11b, and the void 31 not opening in the main surfaces 11a and 11b. And remains.
  • the first gap 30 remaining in the first open pores 16A and 16D is closed by the glass phases 17 and 19, thereby forming a closed gap that does not communicate with the first main surface 11b. This prevents liquid leakage between the main surfaces through the first open pores and the second open pores.
  • the second gap 32 in the second open pore is an open gap communicating with the second main surface 11b.
  • the glass phase is generated in the first open pores by impregnating the molten glass from the first main surface side of the through conductor, whereby the first voids are the first main holes. I tried not to communicate with the surface.
  • the present invention is not limited to this manufacturing method.
  • the through-conductor having a microstructure as in the present invention can be manufactured by changing the paste composition between the upper half and the lower half of the through-hole.
  • the area ratio of the porous metal body is 30 to 70% in the cross section of the through conductor. If the area ratio of the metal porous body is too high, the thermal stress between the through conductor and the ceramic increases, and if this area ratio is too low, the conductivity is low. From this viewpoint, the area ratio of the metal porous body is 30 to 70%, more preferably 40 to 65%, and particularly preferably 45 to 60%.
  • the area ratio (total value) of the glass phase is 10 to 50%, and particularly preferably 20 to 40%.
  • the total value of the void area ratio in the cross section of the through conductor is preferably 5 to 60%, and more preferably 5 to 40%.
  • the measurement of the area ratio of these porous metal bodies, glass, and voids is performed by taking a SEM (1000 times) image of the cross section of the through conductor. It is possible to identify each material by photographing with the SEM by changing the color tone according to each material. Thereafter, the conductor portion to be measured is divided into a grid having a side of 5 ⁇ m, and the material occupying the most area is determined for each grid. The area ratio can be calculated by comparing the number of lattices determined for each material.
  • the thickness of the ceramic substrate is 25 to 150 ⁇ m, and the diameter W of the through hole is 20 to 60 ⁇ m.
  • the present invention is particularly useful for such a small and thin connection substrate.
  • the diameter W of the through hole formed in the ceramic substrate is more preferably 25 ⁇ m or more from the viewpoint of ease of forming.
  • the distance D (distance between the nearest through holes) between adjacent through holes 2 is preferably 50 ⁇ m or more, and more preferably 100 ⁇ m or more, from the viewpoint of suppressing breakage and cracks.
  • the distance D between the adjacent through holes 2 is preferably 1000 ⁇ m or less, and more preferably 500 ⁇ m or less, from the viewpoint of improving the density of the through holes.
  • the method for forming the through hole in the ceramic substrate is not particularly limited.
  • a through hole can be formed in a green sheet of a ceramic substrate by pins or laser processing.
  • a through-hole can also be formed in a blank substrate by laser processing.
  • the laser oscillation source CO 2 , YAG (yttrium / aluminum garnet), or the like can be used.
  • Ceramics constituting the ceramic substrate include aluminum oxide, yttrium oxide, YAG, zirconium oxide, and aluminum nitride.
  • aluminum oxide, particularly high-purity aluminum oxide having a purity of 99.9% or more is particularly useful because it has a high Young's modulus of 400 GPa or more and excellent shape stability when thinned.
  • a metal paste is supplied to the through hole, and a metal porous body is generated by heating.
  • the metal that is the main component constituting such a metal paste include Ag, Au, Cu, Pd, or a mixture thereof.
  • glass components include B 2 O 3 , SiO 2 , ZnO, PbO, Li 2 O, Na 2 O, K 2 O, MgO, CaO, SrO, BaO, Bi 2 O 3 , Al 2 O 3 , Gd 2.
  • the baking temperature of the metal paste is appropriately selected depending on the type of paste, and can be set to 500 to 900 ° C., for example.
  • a glass paste is applied to the first main surface of the metal porous body, and the open pores of the metal porous body are impregnated with the glass paste.
  • the glass paste can be applied over the entire first main surface of the ceramic substrate.
  • the glass paste may be applied only on the first main surface of the porous metal body by screen printing or the like, and the glass paste may not be applied on the other ceramic surfaces.
  • the glass paste is melted by heating to form a glass layer on the main surface of the porous metal body, and the molten glass is impregnated into the open pores to form a glass phase.
  • the baking temperature of the glass paste is appropriately selected depending on the type of paste, and can be set to 500 to 900 ° C., for example.
  • connection substrate having a ceramic substrate and a through conductor provided in the through hole is obtained.
  • the first main surface of the ceramic substrate is preferably polished.
  • predetermined wiring, a pad, etc. are formed in each main surface 11a, 11b of a ceramic substrate.
  • the ceramic substrate is an integral relay substrate.
  • the ceramic substrate is preferably precision polished.
  • CMP Chemical Mechanical Polishing
  • polishing slurry a slurry in which abrasive grains having a particle size of 30 nm to 200 nm are dispersed in an alkali or neutral solution is used.
  • the abrasive material include silica, alumina, diamond, zirconia, and ceria, which are used alone or in combination.
  • a hard urethane pad, a nonwoven fabric pad, and a suede pad can be illustrated as a polishing pad.
  • Example 1 A connection substrate was fabricated as described with reference to FIGS. Specifically, first, a slurry in which the following components were mixed was prepared.
  • (Raw material powder) Specific surface area 3.5 to 4.5 m 2 / g, ⁇ -alumina powder having an average primary particle size of 0.35 to 0.45 ⁇ m (alumina purity 99.99%) 100 parts by mass • MgO (magnesia) 250 pppm ⁇ ZrO 2 (zirconia) 400ppm ⁇ Y 2 O 3 (yttria) 15ppm (Dispersion medium) ⁇ 45 parts by weight of 2-ethylhexanol (binder) ⁇ PVB (polyvinyl butyral) resin 4 parts by weight (dispersant) ⁇ Polymer surfactant 3 parts by weight (plasticizer) ⁇ DOP 0.1 parts by weight
  • this slurry is formed into a tape shape so as to be 300 ⁇ m in terms of the thickness after firing, and converted into a size after firing so that it becomes a square of 100 mm in length ⁇ 100 mm in width. Disconnected.
  • the obtained powder compact is calcined at 1240 ° C. in the atmosphere (preliminary firing), and then the substrate is placed on a molybdenum plate and heated at a rate of 1300 ° C. to 1550 ° C. in an atmosphere of hydrogen 3: nitrogen 1. Was kept at 1550 ° C. for 2.5 hours and baked to obtain a blank substrate.
  • the blank substrate was laser processed under the following conditions to form through holes having the following dimensions.
  • CO 2 laser wavelength 10.6 ⁇ m
  • Pulse 1000Hz- On time 5 ⁇ s
  • Laser mask diameter 0.9 mm
  • Number of shots 40 times Through-hole diameter
  • W Table 0.06 mm
  • Through hole spacing D: 0.12 mm
  • the melt (dross) adhering to the substrate surface was removed by grinding with a grinder, and then annealed at 1300 ° C. in the atmosphere for 5 hours to obtain a ceramic substrate having a thickness of 200 ⁇ m.
  • Glass paste Solid content: 95% by weight
  • Glass composition Bi-Zn-B viscosity: 50 Pa ⁇ s
  • Mask # 360 mesh, 30um thickness
  • Squeegee angle 70 degrees
  • Squeegee speed 5mm / sec
  • Number of squeegees 1
  • Drying conditions 95 ° C x 30 minutes
  • connection substrate the glass layer remaining on the surface was removed by polishing to obtain a connection substrate. Specifically, after grinding with a grinder while the substrate was attached to an alumina plate, lapping with diamond slurry was performed on both sides. The particle size of diamond was 3 ⁇ m. Finally, CMP processing using SiO 2 abrasive grains and diamond abrasive grains was performed. Thereafter, the substrate was peeled off from the alumina plate, the same processing was performed on the main surface on the opposite side, and washing was performed to obtain a connection substrate.
  • the water tightness of the through conductor of the obtained connection board was confirmed by a method described with reference to FIG. That is, the porous plate 21 was fixed to the pedestal 22, the dust-free paper 23 was placed on the pedestal 22, and the ceramic substrate sample 24 was placed thereon. Water 26 was dropped onto the through hole of the ceramic substrate 24 and sucked at ⁇ 80 kPa as indicated by an arrow A. Then, it was confirmed whether or not moisture was observed on the dust-free paper.
  • the number of through conductors in which liquid leakage was observed was 1 for 30000 through conductors provided on one ceramic substrate.
  • Examples 2 to 7 A connection board was produced in the same manner as in Example 1. However, the area ratio of the metal porous body and the area ratio (total) of the glass phase in the cross section of the through conductor were changed as shown in Table 1. These parameters were changed by adjusting the solid content concentration of the Ag-Pd paste, the ratio of Ag, Pd and glass frit, the firing temperature, the melting and impregnation temperature and time of the glass paste.
  • Example 1 An Ag paste was embedded in each through-hole of the same ceramic substrate as in Example 1.
  • the Ag paste used is the same as in Example 1. Then, it baked at 700 degreeC and formed the metal porous body in the through-hole.
  • both main surfaces of the ceramic base material were precision-polished without carrying out a step of printing the glass paste on the first main surface of the ceramic base material to obtain a connection substrate.
  • each parameter indicating the microstructure is as follows. Number of first air gaps in the first open pores opening in the main surface 11a: 5 Number of second air gaps in the second open air holes opening in the main surface 11b: 6 through conductors Area ratio of porous metal body in cross section: 60% Area ratio of glass phase in cross section of through conductor (total): 20%
  • Example 2 Next, a water tightness test was performed in the same manner as in Example 1. As a result, liquid leakage was observed in almost all the 30,000 through conductors provided on one ceramic substrate.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Inorganic Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

This connection substrate is provided with: a ceramic substrate that is provided with a through hole; and a through conductor 11 that is provided in the through hole and has a first main surface 11a and a second main surface 11b. The through conductor 11 comprises: a metal porous body 20 which has first open pores 16A, 16D that are in communication with the first main surface 11a and second open pores 16B that are in communication with the second main surface 11b; first glass phases 17, 19 which are formed within the first open pores 16A, 16D; second glass phases 17B which are formed within the second open pores 16B; first voids 30 which are provided within the first open pores; and second voids 32 which are provided within the second open pores 16B. The first voids 30 are closed voids which are not in communication with the first main surface. The second voids 32 are open voids which are in communication with the second main surface 11b.

Description

接続基板Connection board
 本発明は、ビア導体などの貫通導体が貫通孔内に形成された電気的接続基板に関するものである。 The present invention relates to an electrical connection substrate in which a through conductor such as a via conductor is formed in a through hole.
 SAWフィルター等の電子デバイスを実装するための基板として、セラミック等の絶縁基板に貫通穴を設け、その穴を導体で埋め、貫通電極とする構造の基板(ビア基板)が用いられている。近年は携帯電話に代表される通信機器の小型化に伴い、使用される電子デバイスにも小型化、低背化が求められており、その構成要素であるビア基板についても同様に薄板化が求められている。 As a substrate for mounting an electronic device such as a SAW filter, a substrate (via substrate) having a structure in which a through hole is provided in an insulating substrate such as ceramic and the hole is filled with a conductor to form a through electrode is used. In recent years, along with miniaturization of communication equipment typified by mobile phones, electronic devices used are also required to be miniaturized and low profiled, and the via substrate, which is a component, is also required to be thin. It has been.
 また、小型化のため、基板表面の配線も微細化する必要があるために、貫通電極径の小径化、およびその位置の高精度化が求められる。更に、これらの微細配線はフォトリソグラフィーやめっきにより形成されることから、レジスト塗布工程やめっき工程での薬液の浸入による不具合を防止するため、貫通電極が緻密で水密性が高いことが特に求められている。 Also, since the wiring on the substrate surface needs to be miniaturized for miniaturization, it is required to reduce the diameter of the through electrode and to increase the accuracy of the position. Furthermore, since these fine wirings are formed by photolithography or plating, it is particularly required that the through electrodes be dense and have high water tightness in order to prevent problems caused by the ingress of chemicals in the resist coating process and plating process. ing.
 貫通電極の緻密化については各種の解決策が提示されているが、いずれも比較的厚い基板と大径の貫通電極を対象としたものであり、薄板および小径の貫通電極を用いる場合は所望の結果が得られない。 Various solutions have been proposed for the densification of the through electrodes, but all are intended for relatively thick substrates and large diameter through electrodes, and are desired when using thin plates and small diameter through electrodes. The result is not obtained.
 例えば、特許文献1では、ポーラス(多孔質)な貫通電極の表面に導電保護膜を形成することで、レジスト液の浸入を防止する方法が開示されている。しかし、絶縁性基板が薄いと、貫通電極の通気性が高くなるため、導電保護膜の強度が不足し、保護膜として機能しない。また、セラミックスと金属の間が熱膨張差により剥離しやすい。 For example, Patent Document 1 discloses a method of preventing the resist solution from entering by forming a conductive protective film on the surface of a porous through electrode. However, if the insulating substrate is thin, the air permeability of the through electrode is increased, so that the strength of the conductive protective film is insufficient and does not function as a protective film. Moreover, it is easy to peel between ceramics and a metal by a thermal expansion difference.
 特許文献2では、貫通電極として多孔質の第1導電体を形成した後、その空隙を第2導電体で埋める方法が開示されている。しかし、セラミック基板を用いる場合、導電材である金属とセラミックスとの熱膨張差により、基板を薄板化した際にクラックや基板の反りが発生しやすい。 Patent Document 2 discloses a method of filling a void with a second conductor after forming a porous first conductor as a through electrode. However, when a ceramic substrate is used, cracks and warpage of the substrate are likely to occur when the substrate is thinned due to the difference in thermal expansion between the metal that is the conductive material and the ceramic.
 特許文献3では、セラミック基板の貫通孔に、活性金属を含む金属を充填することで、セラミック基板と貫通電極の間に活性金属層を形成し、緻密化する方法が開示されている。しかし、上述したようなセラミックスと金属との熱膨張差によるクラック発生といった問題に加え、活性金属を含む金属ロウは粘度が非常に高いため、貫通電極径が小さいと、うまく充填できない。 Patent Document 3 discloses a method in which an active metal layer is formed between a ceramic substrate and a through electrode by filling the through hole of the ceramic substrate with a metal containing an active metal, thereby densifying the ceramic substrate. However, in addition to the problem of cracking due to the difference in thermal expansion between the ceramic and the metal as described above, since the metal brazing containing the active metal has a very high viscosity, it cannot be filled well if the through electrode diameter is small.
 特許文献4では、貫通電極を形成する際、膨張材を含む導体ペーストを用いる方法が開示されている。しかし、膨張材のみで全ての空洞を埋めることは難しく、特に薄板化した場合は貫通電極の緻密性が得られない。 Patent Document 4 discloses a method of using a conductive paste containing an expansion material when forming a through electrode. However, it is difficult to fill all the cavities with only the expansion material, and the denseness of the through electrode cannot be obtained particularly when the plate is thinned.
 特許文献5では、粒状導電物質をセラミック基板の貫通孔内にそれぞれ配置した後、ガラスペーストを充填する方法が開示されている。しかし、セラミックスと球状導電物質の熱膨張差に起因するクラックや反りが発生しやすい。更に、貫通孔が小さくなると、球状導電物質の配置が困難となる。 Patent Document 5 discloses a method of filling a glass paste after disposing a granular conductive material in each through hole of a ceramic substrate. However, cracks and warpage due to the difference in thermal expansion between the ceramic and the spherical conductive material are likely to occur. Furthermore, when the through hole is small, it is difficult to arrange the spherical conductive material.
特許4154913Patent 4154913 特開2013-165265JP2013-165265 特開2015-65442JP2015-65442 特開H09-46013JP H09-46013 特開2015-119165JP2015-119165
 本発明の課題は、セラミック基板と、貫通孔内に設けられた貫通導体とを備える接続基板を製造するのに際して、貫通孔の水密性を向上させ得るような微構造を提供することである。 An object of the present invention is to provide a microstructure capable of improving the water-tightness of a through hole when manufacturing a connection board including a ceramic substrate and a through conductor provided in the through hole.
 本発明に係る接続基板は、貫通孔が設けられているセラミック基板、および前記貫通孔中に設けられた貫通導体であって、第一の主面と第二の主面とを有する貫通導体を備えている。そして、貫通導体が、第一の主面に連通する第一の開気孔および第二の主面に連通する第二の開気孔が設けられた金属多孔体、第一の開気孔内に形成された第一のガラス相、第二の開気孔内に形成された第二のガラス相、第一の開気孔内に設けられた第一の空隙、および第一の開気孔内に設けられた第二の空隙を備える。第一の空隙が第一の主面に連通しない閉空隙であり、第二の空隙が第二の主面に連通する開空隙である。 The connection substrate according to the present invention includes a ceramic substrate provided with a through hole, and a through conductor provided in the through hole, the through conductor having a first main surface and a second main surface. I have. The through conductor is formed in the first porous hole, the metal porous body provided with the first open hole communicating with the first main surface and the second open hole communicating with the second main surface. The first glass phase, the second glass phase formed in the second open pores, the first void provided in the first open pores, and the first glass phase provided in the first open pores Two gaps are provided. The first space is a closed space that does not communicate with the first main surface, and the second space is an open space that communicates with the second main surface.
 本発明者は、貫通導体の水密性を検討する過程で、以下の知見に至った。すなわち、従来は、セラミック基板の貫通孔に金属ペーストを供給し、焼き付けることで貫通導体を得ていた。こうした貫通導体の微構造は全体的に均一である。ここでセラミック基板の厚さがきわめて小さくなってくると、貫通導体の両方の主面間で一部の開気孔が連通し、微量の液漏れが発生したものと考えられた。 The present inventor has reached the following knowledge in the process of examining the water tightness of the through conductor. In other words, conventionally, a through conductor is obtained by supplying a metal paste to a through hole of a ceramic substrate and baking it. The microstructure of such through conductors is uniform throughout. Here, when the thickness of the ceramic substrate became extremely small, it was considered that a part of the open pores communicated between both main surfaces of the penetrating conductor and a small amount of liquid leakage occurred.
 そこで、本発明者は、貫通導体を構成する金属多孔体の気孔を少なくすることも検討した。しかし、金属多孔体の気孔が少なくなると、貫通導体とセラミックスとの熱膨張差が大きいため、界面での剥離が生じやすくなり、この剥離部分を通じて水密性が損なわれる。 Therefore, the present inventor also studied to reduce the pores of the metal porous body constituting the through conductor. However, when the pores of the metal porous body are reduced, the thermal expansion difference between the through conductor and the ceramic is large, so that peeling at the interface is likely to occur, and water tightness is impaired through this peeling portion.
 このため、本発明者は、貫通導体を主として構成する金属多孔体の微構造に着目した。金属多孔体には、第一の主面に連通する第一の開気孔および第二の主面に連通する第二の開気孔が含まれていた。 For this reason, the present inventor paid attention to the microstructure of the porous metal body mainly constituting the through conductor. The metal porous body included a first open pore communicating with the first main surface and a second open pore communicating with the second main surface.
 そこで、本発明者は、各気孔内にガラス相を生成させることで貫通導体とセラミックスとの間の熱膨張差による剥離を抑制する際に、第一の主面に連通する第一の開気孔内では、ガラス相によって空隙を閉塞し、これによって、貫通導体のうち第一の開気孔側に水密性機能を主として担持させることを想到した。これと同時に、第二の主面に連通する第二の開気孔側では、ガラス相によってクラッド層を閉塞せず、空隙を第二の開気孔に連通させる構造とした。これによって、貫通導体それ自体の水密性を保持しつつ、全体として貫通導体とセラミックスとの剥離は生じにくくなり、この点でも水密性が保持される。 Therefore, the present inventor has the first open pores communicating with the first main surface when suppressing peeling due to a difference in thermal expansion between the through conductor and the ceramic by generating a glass phase in each pore. In the inside, it was conceived that the air gap was closed by the glass phase, and thereby the water tightness function was mainly supported on the first open pore side of the through conductor. At the same time, on the second open pore side communicating with the second main surface, the clad layer is not blocked by the glass phase, and the void is communicated with the second open pore. Accordingly, the penetration conductor and the ceramic are hardly peeled as a whole while maintaining the water tightness of the through conductor itself, and the water tightness is also maintained in this respect.
(a)は、貫通孔2が配列されたセラミック基材1を模式的に示す平面図であり、(b)は、セラミックス基材1の横断面図である。(A) is a top view which shows typically the ceramic base material 1 in which the through-hole 2 was arranged, (b) is a cross-sectional view of the ceramic base material 1. FIG. (a)は、セラミック基材1の貫通孔に金属ペースト3を充填した状態を示し、(b)は、金属ペースト3を焼き付けて金属多孔体4を形成した状態を示し、(c)は、セラミック基材1の第一の主面1a上にガラス層9を形成した状態を示し、(d)は、ガラス層9を除去した状態を示す。(A) shows a state in which the metal paste 3 is filled in the through-holes of the ceramic substrate 1, (b) shows a state in which the metal paste 3 is baked to form the metal porous body 4, and (c) The state which formed the glass layer 9 on the 1st main surface 1a of the ceramic base material 1 is shown, (d) shows the state which removed the glass layer 9. FIG. (a)は、貫通孔2A中に貫通導体11が形成された接続基板10を模式的に示す平面図であり、(b)は、接続基板10の横断面図である。FIG. 2A is a plan view schematically showing the connection substrate 10 in which the through conductor 11 is formed in the through hole 2 </ b> A, and FIG. 2B is a cross-sectional view of the connection substrate 10. 貫通孔内に生成した金属多孔体4の構造を示す模式図である。It is a schematic diagram which shows the structure of the metal porous body 4 produced | generated in the through-hole. 金属多孔体4の開気孔16Aに含浸したガラス相19およびセラミック基板1の第一の主面1a上に形成されたガラス層18を示す模式図である。2 is a schematic diagram showing a glass phase 19 impregnated in open pores 16A of a metal porous body 4 and a glass layer 18 formed on a first main surface 1a of a ceramic substrate 1. FIG. ガラス層を除去した後の貫通導体11の構造を示す模式図である。It is a schematic diagram which shows the structure of the through conductor 11 after removing a glass layer. 貫通導体の微構造を説明するための拡大図である。It is an enlarged view for demonstrating the fine structure of a penetration conductor. 水密性試験の方法を説明するための模式図である。It is a schematic diagram for demonstrating the method of a water-tightness test.
 以下、適宜図面を参照しつつ、本発明を更に詳細に説明する。最初に、本発明のセラミック基板を製造する方法例について述べる。 Hereinafter, the present invention will be described in more detail with reference to the drawings as appropriate. First, an example of a method for manufacturing the ceramic substrate of the present invention will be described.
 図1に示すように、セラミック基材1には一方の主面1aと他方の主面1bとが設けられており、主面1aと1bとの間を貫通する貫通孔2が多数形成されている。貫通孔2には、第一の主面1a側の開口2aと、第二の主面1b側の開口2bとがある。 As shown in FIG. 1, the ceramic substrate 1 is provided with one main surface 1a and the other main surface 1b, and a large number of through holes 2 penetrating between the main surfaces 1a and 1b are formed. Yes. The through hole 2 has an opening 2a on the first main surface 1a side and an opening 2b on the second main surface 1b side.
 次いで、図2(a)に示すように、セラミック基材1の開口2内に金属ペースト3を充填する。そして、金属ペースト3を加熱することによって、金属ペーストを焼き付け、図2(b)に示すように、貫通孔2内に金属多孔体4を生じさせる。5は、金属多孔体4の第一の主面であり、6は、金属多孔体4の第二の主面である。 Next, as shown in FIG. 2A, a metal paste 3 is filled in the opening 2 of the ceramic substrate 1. Then, by heating the metal paste 3, the metal paste is baked to form a porous metal body 4 in the through hole 2 as shown in FIG. Reference numeral 5 denotes a first main surface of the metal porous body 4, and 6 denotes a second main surface of the metal porous body 4.
 次いで、セラミック基材1の第一の主面1a上にガラスペーストを塗布し、ガラスペースト層を形成する。この状態で、ガラスペーストを加熱して焼き付けることにより、ガラスを溶融させる。これにより、図2(c)に示すように、セラミック基材1の第一の主面1a上にガラス層9が形成される。同時に、溶融したガラスが金属多孔体の開気孔内に含浸し、ガラス相を生成し、これによって貫通孔内に貫通導体7を生成する。なお、8は、貫通導体8の第一の主面である。 Next, a glass paste is applied on the first main surface 1a of the ceramic substrate 1 to form a glass paste layer. In this state, the glass paste is melted by heating and baking the glass paste. Thereby, as shown in FIG.2 (c), the glass layer 9 is formed on the 1st main surface 1a of the ceramic base material 1. FIG. At the same time, the molten glass is impregnated into the open pores of the metal porous body to generate a glass phase, thereby generating the through conductor 7 in the through hole. Reference numeral 8 denotes a first main surface of the through conductor 8.
 次いで、ガラス層9を除去することによって、セラミック基材の第一の主面側に貫通導体を露出させ、接続基板とする。この際、好ましくは、セラミック基材1の第一の主面1aを更に研磨し、図2(d)に示すように、研磨面1cを形成し、接続基板10を得る。 Next, by removing the glass layer 9, the through conductor is exposed on the first main surface side of the ceramic base material to obtain a connection substrate. At this time, preferably, the first main surface 1a of the ceramic base material 1 is further polished to form a polished surface 1c as shown in FIG.
 図2(d)および図3(a)、(b)に示すように、接続基板10のセラミック基板1Aでは、各貫通孔2A内に貫通導体11が充填されている。11aは貫通導体11の第一の主面であり、11bは貫通導体11の第二の主面である。 As shown in FIGS. 2D, 3A, and 3B, in the ceramic substrate 1A of the connection substrate 10, the through conductors 11 are filled in the through holes 2A. 11 a is a first main surface of the through conductor 11, and 11 b is a second main surface of the through conductor 11.
 図2(b)に示すように、金属ペーストを焼き付けることによって、貫通孔2中に金属多孔体4を形成する。ここで、本例では、金属多孔体4は、セラミック基材1の第一の主面1aから第二の主面1bへと延びている。5は金属多孔体の第一の主面であり、6は他方の主面である。 As shown in FIG. 2B, the metal porous body 4 is formed in the through hole 2 by baking the metal paste. Here, in this example, the metal porous body 4 extends from the first main surface 1a of the ceramic substrate 1 to the second main surface 1b. 5 is the first main surface of the porous metal body, and 6 is the other main surface.
 図4に示すように、金属多孔体4は、金属マトリックス20と気孔16A、16B、16C、16Dからなる。ただし、金属ペースト中にガラス成分を添加した場合には、気孔の一部がガラス相17、17A、17Bによって充填される。マトリックス中に生ずる気孔には、第一の主面5に開口する第一の開気孔16A、16D、第二の主面6に開口する第二の開気孔16B、および主面5、6に対して開口していない閉気孔16Cがある。なお、開気孔16Aは、図4の横断面において第一の主面5に対して開口している。これに対して、開気孔16Dは、図4の横断面においては第一の主面5に開口していないが、横断面に現れていないルートで第一の主面5に開口しているので、開気孔16Aと16Dとを区別している。 As shown in FIG. 4, the metal porous body 4 includes a metal matrix 20 and pores 16A, 16B, 16C, and 16D. However, when a glass component is added to the metal paste, a part of the pores is filled with the glass phases 17, 17A, 17B. The pores generated in the matrix include the first open pores 16A and 16D that open on the first main surface 5, the second open pore 16B that opens on the second main surface 6, and the main surfaces 5 and 6. There is a closed hole 16C that is not open. The open pores 16A are open to the first main surface 5 in the cross section of FIG. On the other hand, the open pores 16D are not opened in the first main surface 5 in the cross section of FIG. 4, but are opened in the first main surface 5 along a route that does not appear in the cross section. The open pores 16A and 16D are distinguished.
 図4の状態では、開気孔16A、16B、16D、閉気孔16Cともに、一部分はガラス相17、17A、17Bによって充填され、一部分は空隙のまま残留している。空隙33は、主面に連通していない閉空隙であり、空隙32は、第二の主面6に開口する開空隙である。 In the state of FIG. 4, a part of each of the open pores 16A, 16B, 16D and the closed pores 16C is filled with the glass phases 17, 17A, 17B, and a part remains as a void. The air gap 33 is a closed air gap that does not communicate with the main surface, and the air gap 32 is an open air gap that opens in the second main surface 6.
 ここで、セラミック基板について水密性試験を行うと、第一の主面1aから第二の主面1bへと向かって漏水が観測されることがあった。この理由であるが、第一の主面5に連通する第一の開気孔16A、16Dと、第二の主面6に連通する第二の開気孔16Bとが、一部で連通していたものと推定された。 Here, when a water tightness test was performed on the ceramic substrate, water leakage was sometimes observed from the first main surface 1a to the second main surface 1b. For this reason, the first open holes 16A and 16D communicating with the first main surface 5 and the second open holes 16B communicating with the second main surface 6 were partially communicated. It was estimated.
 一方、図5に示すように、第一の主面5に開口する開気孔16A、16Dを覆う形でガラスペーストを塗布する。この状態でガラスペーストを焼き付けることによって、第一の主面1a上にガラス層18が形成され、、同時に溶融したガラスが含浸し、開気孔16A、16D中にガラス相19が形成される。一部の開気孔では、金属多孔体中にもともと存在していたガラス相17と、ガラスペーストの含浸および焼き付けによって生成したガラス相19とが混在する場合もあり得る。 On the other hand, as shown in FIG. 5, the glass paste is applied so as to cover the open pores 16A and 16D opened in the first main surface 5. By baking the glass paste in this state, the glass layer 18 is formed on the first main surface 1a, and at the same time, the molten glass is impregnated, and the glass phase 19 is formed in the open pores 16A and 16D. In some open pores, the glass phase 17 originally present in the porous metal body may be mixed with the glass phase 19 generated by impregnation and baking of the glass paste.
 ここで、溶融したガラスを第一の主面側から金属多孔体の開気孔16A、16Bに含浸させることで、第一の開気孔のうち少なくとも第一の主面側はガラス相19によって閉塞される。この結果、第一の主面8から第二の主面6に向かって連通するような開気孔は残留しないため、水密性が著しく改善される。 Here, by impregnating the molten glass into the open pores 16A and 16B of the metal porous body from the first main surface side, at least the first main surface side of the first open pores is blocked by the glass phase 19. The As a result, there are no open pores communicating from the first main surface 8 toward the second main surface 6, so that the water tightness is remarkably improved.
 ただし、図5の状態では金属多孔体がガラス層18によって蓋をされているため、貫通導体7によってセラミック基材1の両側を電気的に導通させることができない。そこで、不要になったガラス層18を除去し、図6に示す状態とし、貫通導体を第一の主面側に露出させる。この際、セラミック基材の第一の主面を研磨加工することで、研磨面を形成すると、貫通導体の露出をいっそう確実にし、その露出面を平坦化できるので好ましい。 However, in the state of FIG. 5, since the porous metal body is covered with the glass layer 18, both sides of the ceramic substrate 1 cannot be electrically connected by the through conductor 7. Therefore, the unnecessary glass layer 18 is removed to obtain the state shown in FIG. 6, and the through conductor is exposed to the first main surface side. At this time, it is preferable to polish the first main surface of the ceramic substrate to form a polished surface, since the through conductor can be more reliably exposed and the exposed surface can be flattened.
 この状態では、図6に示すように、セラミック基板1Aに研磨面1cが形成されており、セラミック基板1Aの厚さは研磨前より小さくなっている。そして、貫通孔2A内には貫通導体11が形成されている。 In this state, as shown in FIG. 6, the polishing surface 1c is formed on the ceramic substrate 1A, and the thickness of the ceramic substrate 1A is smaller than that before polishing. A through conductor 11 is formed in the through hole 2A.
 ここで、図6に示すような形態の貫通導体を更に分析すると、以下のことが判明してきた。図7を参照しつつ水密性の発現機構を説明する。 Here, further analysis of the through conductor having the form shown in FIG. 6 has revealed the following. A watertight mechanism will be described with reference to FIG.
 図7において、第一の開気孔16A、16Dは貫通導体の第一の主面11aに連通している。また、第二の開気孔16Bは第二の主面11bに連通している。16Cは、主面11a、11bのいずれにも連通しない閉気孔である。第一の開気孔16A、16Dには、金属ペーストに由来するガラス相17と、後から含浸させたガラスに由来するガラス相19と、主面11aに開口しない空隙30とが残留している。また、閉気孔16C中には、金属ペーストに由来するガラス相17Aと、主面に開口しない空隙33とが残留している。更に、第二の主面11bに連通する第二の開気孔16Bには、金属ペーストに由来するガラス相17Bと、主面11bに連通する空隙32と、主面11a、11bに開口しない空隙31とが残留している。 In FIG. 7, the first open holes 16A and 16D communicate with the first main surface 11a of the through conductor. Further, the second open hole 16B communicates with the second main surface 11b. 16C is a closed pore that does not communicate with either of the main surfaces 11a and 11b. In the first open pores 16A and 16D, the glass phase 17 derived from the metal paste, the glass phase 19 derived from the glass impregnated later, and the void 30 that does not open in the main surface 11a remain. Further, in the closed pores 16C, the glass phase 17A derived from the metal paste and the voids 33 that do not open on the main surface remain. Furthermore, in the second open pores 16B communicating with the second main surface 11b, the glass phase 17B derived from the metal paste, the void 32 communicating with the main surface 11b, and the void 31 not opening in the main surfaces 11a and 11b. And remains.
 そして、第一の開気孔16A、16Dに残留する第一の空隙30は、ガラス相17および19によって閉塞され、これによって第一の主面11bに連通しない閉空隙となっている。これによって、第一の開気孔および第二の開気孔を通じて主面間で液漏れすることはなくなる。これとともに、第二の開気孔内の第二の空隙32は、第二の主面11bに連通する開空隙となっている。こうした主面に連通する空隙を残留させることによって、セラミックスと貫通導体との間の応力を緩和し、貫通導体のセラミックスからの剥離による液漏れを抑制できる。 The first gap 30 remaining in the first open pores 16A and 16D is closed by the glass phases 17 and 19, thereby forming a closed gap that does not communicate with the first main surface 11b. This prevents liquid leakage between the main surfaces through the first open pores and the second open pores. At the same time, the second gap 32 in the second open pore is an open gap communicating with the second main surface 11b. By leaving such voids communicating with the main surface, the stress between the ceramic and the through conductor can be relaxed, and liquid leakage due to peeling of the through conductor from the ceramic can be suppressed.
 なお、上述の例では、貫通導体の第一の主面側から溶融したガラスを含浸させることで、第一の開気孔中にガラス相を生成させ、これによって第一の空隙が第一の主面に連通しないようにした。しかし、本発明はこの製法に限定されるものではない。例えば、貫通孔に金属ペーストを充填する際に、貫通孔の上半分と下半分との間でペースト組成を変化させることで、本発明のような微構造の貫通導体を作製できる。 In the above-described example, the glass phase is generated in the first open pores by impregnating the molten glass from the first main surface side of the through conductor, whereby the first voids are the first main holes. I tried not to communicate with the surface. However, the present invention is not limited to this manufacturing method. For example, when filling the through-hole with a metal paste, the through-conductor having a microstructure as in the present invention can be manufactured by changing the paste composition between the upper half and the lower half of the through-hole.
 以下、本発明の構成要素について更に述べる。
 好適な実施形態においては、貫通導体の横断面において、金属多孔体の面積比率が30~70%である。金属多孔体の面積比率が高すぎると、貫通導体とセラミックスとの間の熱応力が増大し、この面積比率が低すぎると、導電性が低い。この観点からは、金属多孔体の面積比率を30~70%とするが、40~65%がより好ましく、45~60%が特に好ましい。
Hereinafter, the constituent elements of the present invention will be further described.
In a preferred embodiment, the area ratio of the porous metal body is 30 to 70% in the cross section of the through conductor. If the area ratio of the metal porous body is too high, the thermal stress between the through conductor and the ceramic increases, and if this area ratio is too low, the conductivity is low. From this viewpoint, the area ratio of the metal porous body is 30 to 70%, more preferably 40 to 65%, and particularly preferably 45 to 60%.
 好適な実施形態においては、貫通導体の横断面において、ガラス相の面積比率(合計値)が10~50%であり、特に好ましくは20~40%である。 In a preferred embodiment, in the cross section of the through conductor, the area ratio (total value) of the glass phase is 10 to 50%, and particularly preferably 20 to 40%.
 また、好適な実施形態においては、貫通導体の横断面において、空隙の面積比率の合計値を、5~60%とすることが好ましく、5~40%とすることが更に好ましい。 In a preferred embodiment, the total value of the void area ratio in the cross section of the through conductor is preferably 5 to 60%, and more preferably 5 to 40%.
 これら金属多孔体、ガラス、空隙の面積比率の測定は、貫通導体の横断面のSEM(1000倍)画像を写真撮影することで行う。SEMにより各材料に応じて色調を変えて撮影することで、各材料を識別することが可能となる。その後、測定する導体部を一辺5umの格子に分割し、各格子毎に最も多くの面積を占有している材料を決定する。その各材料毎に決定された格子数を比較することで面積比率を算出することができる。 The measurement of the area ratio of these porous metal bodies, glass, and voids is performed by taking a SEM (1000 times) image of the cross section of the through conductor. It is possible to identify each material by photographing with the SEM by changing the color tone according to each material. Thereafter, the conductor portion to be measured is divided into a grid having a side of 5 μm, and the material occupying the most area is determined for each grid. The area ratio can be calculated by comparing the number of lattices determined for each material.
 好適な実施形態においては、セラミック基板の厚さが25~150μmであり、貫通孔の径Wが20μm~60μmである。本発明は、このような小型で薄い接続基板に対して特に有用である。 In a preferred embodiment, the thickness of the ceramic substrate is 25 to 150 μm, and the diameter W of the through hole is 20 to 60 μm. The present invention is particularly useful for such a small and thin connection substrate.
 セラミック基板に形成する貫通孔の径Wは、成形しやすさの観点からは、25μm以上が更に好ましい。隣接する貫通孔2の間隔D(最も近接する貫通孔間の距離)は、破損やクラックを抑制するという観点からは、50μm以上が好ましく、100μm以上が更に好ましい。また、隣接する貫通孔2の間隔Dは、貫通孔の密度を向上させるという観点からは、1000μm以下が好ましく、500μm以下が更に好ましい。 The diameter W of the through hole formed in the ceramic substrate is more preferably 25 μm or more from the viewpoint of ease of forming. The distance D (distance between the nearest through holes) between adjacent through holes 2 is preferably 50 μm or more, and more preferably 100 μm or more, from the viewpoint of suppressing breakage and cracks. In addition, the distance D between the adjacent through holes 2 is preferably 1000 μm or less, and more preferably 500 μm or less, from the viewpoint of improving the density of the through holes.
 セラミック基板に貫通孔を形成する方法は、特に限定されない。例えば、セラミック基板のグリーンシートにピンやレーザー加工によって貫通孔を形成することができる。あるいは、セラミックスからなるブランク基板を製造した後に、ブランク基板にレーザー加工によって貫通孔を形成することもできる。レーザーの発振源についてはCO、YAG(イットリウム・アルミニウムガーネット)、等を用いることができる。 The method for forming the through hole in the ceramic substrate is not particularly limited. For example, a through hole can be formed in a green sheet of a ceramic substrate by pins or laser processing. Or after manufacturing the blank substrate which consists of ceramics, a through-hole can also be formed in a blank substrate by laser processing. As the laser oscillation source, CO 2 , YAG (yttrium / aluminum garnet), or the like can be used.
 セラミック基板を構成するセラミックスとしては、酸化アルミニウム、酸化イットリウム、YAG、酸化ジルコニウム、窒化アルミニウムを例示できる。これらの内、酸化アルミニウム、とりわけ純度99.9%以上の高純度の酸化アルミニウムは、ヤング率が400GPa以上と高く、薄板化したときの形状安定性に優れるため、特に有用である。 Examples of ceramics constituting the ceramic substrate include aluminum oxide, yttrium oxide, YAG, zirconium oxide, and aluminum nitride. Among these, aluminum oxide, particularly high-purity aluminum oxide having a purity of 99.9% or more is particularly useful because it has a high Young's modulus of 400 GPa or more and excellent shape stability when thinned.
 本発明では、貫通孔に金属ペーストを供給し、加熱によって金属多孔体を生成させる。こうした金属ペーストを構成する主成分である金属としては、Ag、Au、Cu、Pd、またはこれらの混合物を例示できる。また、金属に対してガラス成分を混合してペースト化することが好ましい。こうしたガラス成分としては、B、SiO,ZnO、PbO、LiO、NaO、KO、MgO,CaO、SrO,BaO、Bi,Al,Gd、Y、La、Yb、TeO、V、Pを例示できる。 In the present invention, a metal paste is supplied to the through hole, and a metal porous body is generated by heating. Examples of the metal that is the main component constituting such a metal paste include Ag, Au, Cu, Pd, or a mixture thereof. Moreover, it is preferable to make a paste by mixing a glass component with a metal. Examples of such glass components include B 2 O 3 , SiO 2 , ZnO, PbO, Li 2 O, Na 2 O, K 2 O, MgO, CaO, SrO, BaO, Bi 2 O 3 , Al 2 O 3 , Gd 2. O 3, Y 2 O 3, La 2 O 3, Yb 2 O 3, TeO 2, V 2 O 5, P 2 O 5 and can be exemplified.
 金属ペーストの焼き付け温度は、ペーストの種類によって適宜選択するが、例えば500~900℃とすることができる。 The baking temperature of the metal paste is appropriately selected depending on the type of paste, and can be set to 500 to 900 ° C., for example.
 次いで、金属多孔体の第一の主面にガラスペーストを塗布すると共に金属多孔体の開気孔中にガラスペーストを含浸させる。この際には、セラミック基材の第一の主面の全体にわたってガラスペーストを塗布することができる。あるいは、スクリーン印刷法などによって、金属多孔体の第一の主面上にのみガラスペーストを塗布し、その他のセラミックス表面にはガラスペーストを塗布しないようにすることもできる。 Next, a glass paste is applied to the first main surface of the metal porous body, and the open pores of the metal porous body are impregnated with the glass paste. In this case, the glass paste can be applied over the entire first main surface of the ceramic substrate. Alternatively, the glass paste may be applied only on the first main surface of the porous metal body by screen printing or the like, and the glass paste may not be applied on the other ceramic surfaces.
 次いで、加熱によってガラスペーストを溶融させることで、金属多孔体の主面上にガラス層を形成し、かつ開気孔に溶融したガラスを含浸させ、ガラス相とする。ガラスペーストの焼き付け温度は、ペーストの種類によって適宜選択するが、例えば500~900℃とすることができる。 Next, the glass paste is melted by heating to form a glass layer on the main surface of the porous metal body, and the molten glass is impregnated into the open pores to form a glass phase. The baking temperature of the glass paste is appropriately selected depending on the type of paste, and can be set to 500 to 900 ° C., for example.
 次いで、少なくとも金属多孔体上にあるガラス層を除去することで、セラミック基板と、貫通孔内に設けられた貫通導体とを備える接続基板を得る。この状態では、少なくともガラス層を除去して貫通導体を露出させれば足りるが、好ましくはセラミック基材の第一の主面も研磨する。そして、セラミック基板の各主面11a、11bには、所定の配線やパッドなどを形成する。また,セラミック基板は、一体の中継基板とする。 Next, by removing at least the glass layer on the metal porous body, a connection substrate having a ceramic substrate and a through conductor provided in the through hole is obtained. In this state, it is sufficient to remove at least the glass layer and expose the through conductor, but the first main surface of the ceramic substrate is preferably polished. And predetermined wiring, a pad, etc. are formed in each main surface 11a, 11b of a ceramic substrate. The ceramic substrate is an integral relay substrate.
 セラミック基材は精密研磨加工することが好ましい。こうした精密研磨加工としては、CMP(Chemical Mechanical Polishing)加工が一般的であり。これに使われる研磨スラリーとして、アルカリまたは中性の溶液に30nm~200nmの粒径を持つ砥粒を分散させたものが使われる。砥粒材質としては、シリカ、アルミナ、ダイヤ、ジルコニア、セリアを例示でき、これらを単独または組み合わせて使用する。また、研磨パッドには、硬質ウレタンパッド、不織布パッド、スエードパッドを例示できる。 The ceramic substrate is preferably precision polished. As such precision polishing, CMP (Chemical Mechanical Polishing) is generally used. As the polishing slurry used for this, a slurry in which abrasive grains having a particle size of 30 nm to 200 nm are dispersed in an alkali or neutral solution is used. Examples of the abrasive material include silica, alumina, diamond, zirconia, and ceria, which are used alone or in combination. Moreover, a hard urethane pad, a nonwoven fabric pad, and a suede pad can be illustrated as a polishing pad.
(実施例1)
 図1~図6を参照しつつ説明したようにして接続基板を作製した。
 具体的には、まず以下の成分を混合したスラリーを調製した。
(原料粉末)
 ・比表面積3.5~4.5m/g、
平均一次粒子径0.35~0.45μmのα-アルミナ粉末
(アルミナ純度99.99%)     100質量部
 ・MgO(マグネシア)              250pppm
 ・ZrO(ジルコニア)              400ppm
 ・Y(イットリア)             15ppm
(分散媒)
 ・2-エチルヘキサノール           45重量部
(結合剤)
 ・PVB(ポリビニルブチラール)樹脂             4重量部
(分散剤)
 ・高分子界面活性剤            3重量部
(可塑剤)
 ・DOP                   0.1重量部
Example 1
A connection substrate was fabricated as described with reference to FIGS.
Specifically, first, a slurry in which the following components were mixed was prepared.
(Raw material powder)
Specific surface area 3.5 to 4.5 m 2 / g,
Α-alumina powder having an average primary particle size of 0.35 to 0.45 μm (alumina purity 99.99%) 100 parts by mass • MgO (magnesia) 250 pppm
・ ZrO 2 (zirconia) 400ppm
・ Y 2 O 3 (yttria) 15ppm
(Dispersion medium)
・ 45 parts by weight of 2-ethylhexanol (binder)
・ PVB (polyvinyl butyral) resin 4 parts by weight (dispersant)
Polymer surfactant 3 parts by weight (plasticizer)
・ DOP 0.1 parts by weight
 このスラリーを、ドクターブレード法を用いて、焼成後の厚さに換算して300μmとなるようテープ状に成形し、焼成後の大きさに換算して、縦100mm×横100mmの正方形となるように切断した。得られた粉末成形体を、大気中1240℃で仮焼(予備焼成)の後、基板をモリブデン製の板に載せ、水素3:窒素1の雰囲気中で1300℃から1550℃での昇温速度を50℃/hとして、1550℃で2.5時間保持し、焼成を行い、ブランク基板を得た。 Using a doctor blade method, this slurry is formed into a tape shape so as to be 300 μm in terms of the thickness after firing, and converted into a size after firing so that it becomes a square of 100 mm in length × 100 mm in width. Disconnected. The obtained powder compact is calcined at 1240 ° C. in the atmosphere (preliminary firing), and then the substrate is placed on a molybdenum plate and heated at a rate of 1300 ° C. to 1550 ° C. in an atmosphere of hydrogen 3: nitrogen 1. Was kept at 1550 ° C. for 2.5 hours and baked to obtain a blank substrate.
 このブランク基板を以下の条件でレーザー加工することによって、以下の寸法の貫通孔を形成した。
 
 COレーザー:波長     10.6μm  
 パルス:1000Hz- On time   5μs
 レーザーマスク径:      0.9 mm
 ショット回数:        40回
 貫通孔径W:         表0.06 mm、裏0.02mm
 貫通孔の間隔D:       0.12 mm
 貫通孔の数 :        30,000個/枚
 
The blank substrate was laser processed under the following conditions to form through holes having the following dimensions.

CO 2 laser: wavelength 10.6 μm
Pulse: 1000Hz- On time 5μs
Laser mask diameter: 0.9 mm
Number of shots: 40 times Through-hole diameter W: Table 0.06 mm, back 0.02 mm
Through hole spacing D: 0.12 mm
Number of through-holes: 30,000 / sheet
 次いで、レーザー加工の際、基板表面に付着した溶融物(ドロス)をグラインダーによる研削で除去した後、大気中1300℃で5時間アニール処理を行い、厚さ200μmのセラミック基材を得た。 Next, during laser processing, the melt (dross) adhering to the substrate surface was removed by grinding with a grinder, and then annealed at 1300 ° C. in the atmosphere for 5 hours to obtain a ceramic substrate having a thickness of 200 μm.
 次に、以下の条件で、セラミック基材の貫通孔にAg-Pdペーストの埋め込み印刷を行い、乾燥させた後、焼成することで、貫通導体を設けた。
[Ag-Pdペースト]
 固形分濃度: 95 重量%
 固形分組成=Ag:Pd:ガラスフリット=91:3:6 (重量比)
 粘度:200 Pa・s
[印刷条件]
 マスク:使用せず(ペーストを直接基板にのせ、スキージ(squeegee)で貫通孔にペーストを押し込んだ)。
 スキージ角度:20度
 スキージ速度:5mm/sec
 スキージ回数:10回
[乾燥条件]
 95℃×30分
[焼成条件]
 600℃×40分
Next, under the following conditions, embedded printing of the Ag—Pd paste was performed in the through holes of the ceramic substrate, dried, and then fired to provide through conductors.
[Ag-Pd paste]
Solid content: 95% by weight
Solid composition = Ag: Pd: Glass frit = 91: 3: 6 (weight ratio)
Viscosity: 200 Pa · s
[Printing conditions]
Mask: Not used (paste was placed directly on the substrate and the paste was pushed into the through-hole with a squeegee).
Squeegee angle: 20 degrees Squeegee speed: 5mm / sec
Squeegee frequency: 10 times
[Drying conditions]
95 ° C x 30 minutes
[Baking conditions]
600 ℃ × 40 minutes
 次いで、以下の条件で、貫通導体を覆う形で基板の片面にガラスペーストを塗布、焼成、溶融させることで導体内部の気孔にガラスを含浸させた。
[ガラスペースト]
 固形分濃度: 95 重量%
 ガラス組成: Bi-Zn-B系
 粘度:50 Pa・s
[印刷条件]
 マスク:#360メッシュ、30um厚
 スキージ角度:70度
 スキージ速度:5mm/sec
 スキージ回数:1回
[乾燥条件]
 95℃×30分
[溶融、含浸条件]
 570℃×3時間
Next, glass pores inside the conductor were impregnated with glass paste by applying, baking and melting one side of the substrate so as to cover the through conductor under the following conditions.
[Glass paste]
Solid content: 95% by weight
Glass composition: Bi-Zn-B viscosity: 50 Pa · s
[Printing conditions]
Mask: # 360 mesh, 30um thickness Squeegee angle: 70 degrees Squeegee speed: 5mm / sec
Number of squeegees: 1
[Drying conditions]
95 ° C x 30 minutes
[Melting and impregnation conditions]
570 ° C x 3 hours
 次いで、表面に残留したガラス層を研磨加工により除去し、接続基板を得た。具体的には、基板をアルミナプレートに貼り付けた状態でグラインダーによる研削を行った後、ダイヤモンドスラリーによるラップ(lap)加工を両面に実施した。ダイヤモンドの粒径は3μmとした。最後にSiO砥粒とダイヤモンド砥粒によるCMP加工を実施した。その後、基板をアルミナプレートから剥がし、反対側の主面に同様の加工をした後、洗浄を実施し、接続基板を得た。 Next, the glass layer remaining on the surface was removed by polishing to obtain a connection substrate. Specifically, after grinding with a grinder while the substrate was attached to an alumina plate, lapping with diamond slurry was performed on both sides. The particle size of diamond was 3 μm. Finally, CMP processing using SiO 2 abrasive grains and diamond abrasive grains was performed. Thereafter, the substrate was peeled off from the alumina plate, the same processing was performed on the main surface on the opposite side, and washing was performed to obtain a connection substrate.
 得られた接続基板について、貫通導体の横断面を観測した。この結果、図7の模式図に示すように、第一の開気孔内に形成された第一のガラス相、第二の開気孔内に形成された第二のガラス相、第一の開気孔内に設けられた第一の空隙、および第一の開気孔内に設けられた第二の空隙が確認された。また、閉気孔内にも空隙が確認された。更に、第一の開気孔中の第一の空隙が主面11aに開口している個数を計数したところ、0個であった。また、第二の開気孔中の第二の空隙が主面11bに開口している個数は6個であった。
 
貫通導体の横断面における金属多孔体の面積比率: 60%
貫通導体の横断面におけるガラス相の面積比率(合計): 30%
 
About the obtained connection board, the cross section of the penetration conductor was observed. As a result, as shown in the schematic diagram of FIG. 7, the first glass phase formed in the first open pores, the second glass phase formed in the second open pores, the first open pores The 1st space | gap provided in the inside and the 2nd space | gap provided in the 1st open pore were confirmed. In addition, voids were also confirmed in the closed pores. Further, when the number of the first voids in the first open pores opened to the main surface 11a was counted, it was 0. Further, the number of the second voids in the second open pores opened to the main surface 11b was six.

Area ratio of porous metal body in cross section of through conductor: 60%
Area ratio of glass phase in cross section of through conductor (total): 30%
 得られた接続基板の貫通導体の水密性を、図8を参照しつつ説明する方法で確認した。
 すなわち、台座22に多孔体板21を固定し、台座22上に無塵紙23を載置し、その上にセラミック基板のサンプル24を設置した。セラミック基板24の貫通孔上に水26を滴下し、矢印Aのように-80kPaで吸引した。そして、無塵紙に水分の付着が見られるかどうかを確認した。
The water tightness of the through conductor of the obtained connection board was confirmed by a method described with reference to FIG.
That is, the porous plate 21 was fixed to the pedestal 22, the dust-free paper 23 was placed on the pedestal 22, and the ceramic substrate sample 24 was placed thereon. Water 26 was dropped onto the through hole of the ceramic substrate 24 and sucked at −80 kPa as indicated by an arrow A. Then, it was confirmed whether or not moisture was observed on the dust-free paper.
 この結果、1枚のセラミック基板に設けられた貫通導体30000個に対して、液漏れの見られた貫通導体は1個であった。 As a result, the number of through conductors in which liquid leakage was observed was 1 for 30000 through conductors provided on one ceramic substrate.
(実施例2~7)
 実施例1と同様にして接続基板を作製した。
 ただし、貫通導体の横断面における金属多孔体の面積比率、ガラス相の面積比率(合計)を、表1に示すように変更した。これらのパラメーターを変更するには、Ag-Pdペーストの固形分濃度、AgとPdとガラスフリットの比率、焼成温度、ガラスペーストの溶融、含浸の温度および時間を調整することで行った。
(Examples 2 to 7)
A connection board was produced in the same manner as in Example 1.
However, the area ratio of the metal porous body and the area ratio (total) of the glass phase in the cross section of the through conductor were changed as shown in Table 1. These parameters were changed by adjusting the solid content concentration of the Ag-Pd paste, the ratio of Ag, Pd and glass frit, the firing temperature, the melting and impregnation temperature and time of the glass paste.
 そして、得られた各セラミック基板について、1枚のセラミック基板に設けられた貫通導体30000個に対して、液漏れの見られた貫通導体の個数を測定し、表1に示した。 Then, for each of the obtained ceramic substrates, the number of through conductors in which liquid leakage was observed was measured for 30000 through conductors provided on one ceramic substrate, and the results are shown in Table 1.
Figure JPOXMLDOC01-appb-T000001
Figure JPOXMLDOC01-appb-T000001
(比較例1)
 実施例1と同じセラミック基材の各貫通孔にAgペースト埋め込みを行った。使用したAgペーストは実施例1と同じである。その後、700℃にて焼成を行い、貫通孔中に金属多孔体を形成した。
(Comparative Example 1)
An Ag paste was embedded in each through-hole of the same ceramic substrate as in Example 1. The Ag paste used is the same as in Example 1. Then, it baked at 700 degreeC and formed the metal porous body in the through-hole.
 次いで、ガラスペーストをセラミック基材の第一の主面上に印刷する工程を実施することなしに、セラミック基材の両方の主面を精密研磨加工し、接続基板を得た。 Next, both main surfaces of the ceramic base material were precision-polished without carrying out a step of printing the glass paste on the first main surface of the ceramic base material to obtain a connection substrate.
 こうして作成した基板のビア部断面を確認したところ、ビアの全体にわたって空隙が均一に残留していた。すなわち、微構造を示す各パラメーターは以下のとおりである。
 
第一の開気孔中の第一の空隙が主面11aに開口している個数:5個
第二の開気孔中の第二の空隙が主面11bに開口している個数:6個
貫通導体の横断面における金属多孔体の面積比率: 60%
貫通導体の横断面におけるガラス相の面積比率(合計): 20%
When the cross section of the via portion of the substrate thus prepared was confirmed, voids remained uniformly over the entire via. That is, each parameter indicating the microstructure is as follows.

Number of first air gaps in the first open pores opening in the main surface 11a: 5 Number of second air gaps in the second open air holes opening in the main surface 11b: 6 through conductors Area ratio of porous metal body in cross section: 60%
Area ratio of glass phase in cross section of through conductor (total): 20%
 次いで、実施例1と同様にして水密性試験を行った。この結果、1枚のセラミック基板に設けられた貫通導体30000個のほぼ全数について液漏れが見られた。
 
Next, a water tightness test was performed in the same manner as in Example 1. As a result, liquid leakage was observed in almost all the 30,000 through conductors provided on one ceramic substrate.

Claims (4)

  1.  貫通孔が設けられているセラミック基板、および
     前記貫通孔中に設けられた貫通導体であって、第一の主面と第二の主面とを有する貫通導体を備える接続基板であって、
     前記貫通導体が、
     前記第一の主面に連通する第一の開気孔および前記第二の主面に連通する第二の開気孔が設けられた金属多孔体、
     前記第一の開気孔内に形成された第一のガラス相、
     前記第二の開気孔内に形成された第二のガラス相、
     前記第一の開気孔内に設けられた第一の空隙、および
     前記第二の開気孔内に設けられた第二の空隙
    を有しており、前記第一の空隙が前記第一の主面に連通しない閉空隙であり、前記第二の空隙が前記第二の主面に連通する開空隙であることを特徴とする、接続基板。
    A ceramic substrate provided with a through-hole, and a through-conductor provided in the through-hole, the connection substrate comprising a through-conductor having a first main surface and a second main surface,
    The through conductor is
    A porous metal body provided with first open pores communicating with the first main surface and second open pores communicating with the second main surface;
    A first glass phase formed in the first open pores;
    A second glass phase formed in the second open pores;
    A first gap provided in the first open pore, and a second gap provided in the second open pore, wherein the first gap is the first main surface. A connection board, wherein the second gap is an open gap communicating with the second main surface.
  2.  前記貫通導体の横断面において、前記金属多孔体の面積比率が30~70%であることを特徴とする、請求項1記載の接続基板。 2. The connection board according to claim 1, wherein an area ratio of the metal porous body is 30 to 70% in a cross section of the through conductor.
  3.  前記金属多孔体に閉気孔が設けられており、この閉気孔中に第三のガラス相が存在することを特徴とする、請求項1または2記載の接続基板。 The connection substrate according to claim 1 or 2, wherein closed pores are provided in the metal porous body, and a third glass phase exists in the closed pores.
  4.  前記セラミック基板の厚さが25~150μmであり、前記貫通孔の径が20μm~60μmであることを特徴とする、請求項1~3のいずれか一つの請求項に記載の接続基板。 4. The connection substrate according to claim 1, wherein the ceramic substrate has a thickness of 25 to 150 μm, and the diameter of the through hole is 20 to 60 μm.
PCT/JP2017/003554 2016-03-11 2017-02-01 Connection substrate WO2017154422A1 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
CN201780011941.7A CN108781506B (en) 2016-03-11 2017-02-01 Connection substrate
JP2018504052A JP6918774B2 (en) 2016-03-11 2017-02-01 Connection board
KR1020187024055A KR20180121507A (en) 2016-03-11 2017-02-01 Connecting board
DE112017001274.0T DE112017001274T5 (en) 2016-03-11 2017-02-01 CONNECTION SUBSTRATE
US16/108,339 US10257941B2 (en) 2016-03-11 2018-08-22 Connection substrate

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2016-048165 2016-03-11
JP2016048165 2016-03-11

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US16/108,339 Continuation US10257941B2 (en) 2016-03-11 2018-08-22 Connection substrate

Publications (1)

Publication Number Publication Date
WO2017154422A1 true WO2017154422A1 (en) 2017-09-14

Family

ID=59789214

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2017/003554 WO2017154422A1 (en) 2016-03-11 2017-02-01 Connection substrate

Country Status (7)

Country Link
US (1) US10257941B2 (en)
JP (1) JP6918774B2 (en)
KR (1) KR20180121507A (en)
CN (1) CN108781506B (en)
DE (1) DE112017001274T5 (en)
TW (1) TWI720123B (en)
WO (1) WO2017154422A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019068015A (en) * 2017-10-05 2019-04-25 日本電気硝子株式会社 Glass-ceramic laminate, method of manufacturing the same, electronic component package, and method of manufacturing the same

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102020201868A1 (en) * 2020-02-14 2021-08-19 Robert Bosch Gesellschaft mit beschränkter Haftung Circuit carrier with a thermally conductive printed metal inlay

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06291435A (en) * 1993-04-05 1994-10-18 Ngk Spark Plug Co Ltd Conductive paste and ceramic wiring substrate forming conductor thereof as well as manufacture thereof
JP2005093105A (en) * 2003-09-12 2005-04-07 Asahi Glass Co Ltd Conductive structure and its manufacturing method
JP2013165265A (en) * 2012-01-13 2013-08-22 Zycube:Kk Through/embedded electrode structure and manufacturing method of the same
WO2014106925A1 (en) * 2013-01-07 2014-07-10 株式会社アライドマテリアル Ceramic wiring substrate, semiconductor device, and method for manufacturing ceramic wiring substrate

Family Cites Families (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62296496A (en) 1986-06-17 1987-12-23 富士通株式会社 Manufacture of multilayer ceramic circuit board
US5614043A (en) 1992-09-17 1997-03-25 Coors Ceramics Company Method for fabricating electronic components incorporating ceramic-metal composites
US5698015A (en) 1995-05-19 1997-12-16 Nikko Company Conductor paste for plugging through-holes in ceramic circuit boards and a ceramic circuit board having this conductor paste
JP3754748B2 (en) 1995-05-19 2006-03-15 ニッコー株式会社 Conductor paste for filling through holes, ceramic circuit boards and package boards
JPH10308565A (en) * 1997-05-02 1998-11-17 Shinko Electric Ind Co Ltd Wiring board
JP4688379B2 (en) 2001-09-26 2011-05-25 福田金属箔粉工業株式会社 Circuit board, manufacturing method thereof, and electronic apparatus
JP4154913B2 (en) 2002-04-01 2008-09-24 株式会社村田製作所 Electronic component and manufacturing method thereof
JP2005063708A (en) * 2003-08-20 2005-03-10 Daiken Kagaku Kogyo Kk Conductive paste
US7528006B2 (en) * 2005-06-30 2009-05-05 Intel Corporation Integrated circuit die containing particle-filled through-silicon metal vias with reduced thermal expansion
WO2007069510A1 (en) * 2005-12-12 2007-06-21 Matsushita Electric Industrial Co., Ltd. Intermediate material for manufacturing circuit board and method for manufacturing circuit board using such intermediate material
US20100096178A1 (en) 2008-10-17 2010-04-22 Sumsung Electro-Mechanics Co., Ltd. Non-shirinkage ceramic substrate and manufacturing method thereof
JP2011091185A (en) * 2009-10-22 2011-05-06 Shinko Electric Ind Co Ltd Conductive film, method of manufacturing the same, and semiconductor device and method of manufacturing the same
JP2011151185A (en) * 2010-01-21 2011-08-04 Shinko Electric Ind Co Ltd Wiring board and semiconductor device
JP5381800B2 (en) 2010-02-23 2014-01-08 旭硝子株式会社 Light-emitting element mounting substrate and light-emitting device using the substrate
JP5497504B2 (en) * 2010-03-23 2014-05-21 株式会社日立製作所 Electronic components
JP5566271B2 (en) 2010-11-24 2014-08-06 京セラ株式会社 Wiring board and manufacturing method thereof
US9282638B2 (en) 2012-01-13 2016-03-08 Zycube Co., Ltd. Electrode, electrode material, and electrode formation method
JP2013153051A (en) * 2012-01-25 2013-08-08 Tokuyama Corp Metallized ceramic via substrate and manufacturing method thereof
JP6155551B2 (en) 2012-04-10 2017-07-05 セイコーエプソン株式会社 Electronic device, electronic apparatus, and method for manufacturing electronic device
US9403023B2 (en) * 2013-08-07 2016-08-02 Heraeus Deutschland GmbH & Co. KG Method of forming feedthrough with integrated brazeless ferrule
JP6365111B2 (en) 2013-11-12 2018-08-01 セイコーエプソン株式会社 WIRING BOARD MANUFACTURING METHOD, WIRING BOARD, ELEMENT PACKAGE, ELECTRONIC DEVICE, ELECTRONIC DEVICE, AND MOBILE
WO2015141344A1 (en) 2014-03-19 2015-09-24 株式会社アライドマテリアル Ceramic wiring board and semiconductor device
CN105322909A (en) 2014-06-06 2016-02-10 精工爱普生株式会社 Substrate for electronic device package, electronic device package, electronic device, and method of manufacturing electronic device
JP2015231009A (en) 2014-06-06 2015-12-21 セイコーエプソン株式会社 Substrate for electronic device package and manufacturing method of the same
JP6336829B2 (en) 2014-06-19 2018-06-06 京セラ株式会社 Wiring board, package and electronic equipment
JP5922739B2 (en) 2014-10-27 2016-05-24 株式会社トクヤマ Ceramic via substrate, metallized ceramic via substrate, and manufacturing method thereof
JP6291435B2 (en) 2015-02-20 2018-03-14 日本電信電話株式会社 Program and cluster system

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06291435A (en) * 1993-04-05 1994-10-18 Ngk Spark Plug Co Ltd Conductive paste and ceramic wiring substrate forming conductor thereof as well as manufacture thereof
JP2005093105A (en) * 2003-09-12 2005-04-07 Asahi Glass Co Ltd Conductive structure and its manufacturing method
JP2013165265A (en) * 2012-01-13 2013-08-22 Zycube:Kk Through/embedded electrode structure and manufacturing method of the same
WO2014106925A1 (en) * 2013-01-07 2014-07-10 株式会社アライドマテリアル Ceramic wiring substrate, semiconductor device, and method for manufacturing ceramic wiring substrate

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019068015A (en) * 2017-10-05 2019-04-25 日本電気硝子株式会社 Glass-ceramic laminate, method of manufacturing the same, electronic component package, and method of manufacturing the same

Also Published As

Publication number Publication date
JP6918774B2 (en) 2021-08-11
TW201743369A (en) 2017-12-16
KR20180121507A (en) 2018-11-07
US20180359866A1 (en) 2018-12-13
TWI720123B (en) 2021-03-01
JPWO2017154422A1 (en) 2019-01-17
DE112017001274T5 (en) 2019-01-10
US10257941B2 (en) 2019-04-09
CN108781506B (en) 2021-06-29
CN108781506A (en) 2018-11-09

Similar Documents

Publication Publication Date Title
JP6831832B2 (en) Connection board
TWI345938B (en) Multi-layered ceramic substrate and its production method, and electronic device comprising same
US5464950A (en) Aluminum nitride circuit board and method of producing same
JPWO2007083811A1 (en) Conductive paste, multilayer ceramic substrate, and method for producing multilayer ceramic substrate
JP4557417B2 (en) Manufacturing method of low-temperature fired ceramic wiring board
WO2017154422A1 (en) Connection substrate
JP5877932B1 (en) Insulating substrate having a through hole
CN111096090B (en) Method for manufacturing ceramic substrate, and module
KR20100005143A (en) Electrically conductive composition for via-holes
JP3652196B2 (en) Manufacturing method of ceramic wiring board
JP6918773B2 (en) Manufacturing method of connection board
JPH04283994A (en) Ceramic printed-wiring board and manufacture thereof

Legal Events

Date Code Title Description
ENP Entry into the national phase

Ref document number: 2018504052

Country of ref document: JP

Kind code of ref document: A

ENP Entry into the national phase

Ref document number: 20187024055

Country of ref document: KR

Kind code of ref document: A

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 17762767

Country of ref document: EP

Kind code of ref document: A1

122 Ep: pct application non-entry in european phase

Ref document number: 17762767

Country of ref document: EP

Kind code of ref document: A1