WO2017118434A1 - 一种开关整流器的均流控制方法及装置 - Google Patents

一种开关整流器的均流控制方法及装置 Download PDF

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WO2017118434A1
WO2017118434A1 PCT/CN2017/070511 CN2017070511W WO2017118434A1 WO 2017118434 A1 WO2017118434 A1 WO 2017118434A1 CN 2017070511 W CN2017070511 W CN 2017070511W WO 2017118434 A1 WO2017118434 A1 WO 2017118434A1
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value
output
current
voltage
host
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PCT/CN2017/070511
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English (en)
French (fr)
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刘哲
吴琼
涂大锐
杨运东
郑大成
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中兴通讯股份有限公司
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0003—Details of control, feedback or regulation circuits
    • H02M1/0025—Arrangements for modifying reference values, feedback values or error values in the control loop of a converter

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  • the present disclosure relates to the field of power conversion technologies, for example, to a current sharing control method and apparatus for a switching rectifier.
  • the communication power supply is a device that supplies energy to a communication base station or a communication equipment room such as a communication room, and the switch rectifier is a core component of the communication power supply.
  • the traditional centralized power supply method can no longer meet these practical applications.
  • Multiple power modules are connected in parallel, and the load power is evenly distributed to reduce the current stress of the main power devices in each module, which is beneficial to the selection of power devices.
  • multi-module paralleling can increase the capacity of the system and improve the reliability of the system.
  • multiple modules are connected in parallel, which can flexibly form power supply systems of various power levels, replace serialization with modularization, and improve the standardization of power modules, thereby shortening development and production cycle.
  • the current sharing between the modules of the parallel system is extremely important. If the current sharing is unstable, the output bus voltage of the parallel system will be unstable, and the life of the module carrying more current will be shortened.
  • the more common analog current sharing technology requires additional current sharing circuits on the parallel system. These circuits are more susceptible to the environment, and the designed analog control system has poor portability.
  • Current sharing technology is moving toward digital current sharing technology.
  • Digital current sharing technology requires only one current sharing bus and communication bus, and no additional circuits are needed. Once a module fails, the module automatically exits the parallel system, and other modules still work, improving the reliability of the parallel system.
  • Digitally controlled current sharing has the advantages of greater flexibility and scalability.
  • the existing digital current sharing technology generally has only a simple current sharing outer loop for compensating the output voltage, and the busbar voltage fluctuation on the parallel system is large.
  • the present disclosure provides a current sharing control method and apparatus for a switching rectifier, which is used to solve the problem that the digital current sharing technique in the related art has only a simple current sharing outer loop for compensating the output voltage, and the busbar voltage fluctuation on the parallel system is large.
  • a current sharing control method for a switching rectifier comprising:
  • the method before the method is applied to the host of the rectifier parallel system, before obtaining the first output value of the voltage loop according to the input reference value and the collected output voltage value, the method further includes:
  • the output current is sampled by the output current sampling unit to obtain an output current sample value
  • the output current sample value is filtered, and the current obtained by the filter process is used as the host current.
  • the method before the method is applied to the slave of the rectifier parallel system, before obtaining the first output value of the voltage loop according to the input reference value and the collected output voltage value, the method further includes:
  • determining an input reference value of the slave voltage loop according to the host current including:
  • the output value is superimposed on a given voltage value that is monitored and sent, and the voltage input reference value of the slave voltage loop is obtained.
  • the first output value of the voltage loop is obtained, including:
  • the error value is compensated and the clipping process is performed to obtain the first output value of the voltage loop output characterizing a frequency.
  • obtaining a current sharing inner loop according to the host current and the instantaneous value of the collected output current The second output value, including:
  • the error value is compensated and the clipping process is performed to obtain the second output value representing the frequency of the output of the current sharing inner loop.
  • a current sharing control device for a switching rectifier comprising:
  • the voltage loop processing module is configured to obtain a first output value of the voltage loop according to the voltage input reference value and the collected output voltage value;
  • the current inner loop processing module is configured to acquire a second output value of the current sharing inner loop according to the host current and the instantaneous value of the collected output current;
  • a control module configured to superimpose the first output value and the second output value to generate a pulse modulation signal, wherein the pulse modulation signal is used to adjust a switching frequency and/or a switching time of the switching tube.
  • the device when the device is applied to the host, the device further includes:
  • the host current outer loop processing module is configured to sample the output current by the output current sampling unit to obtain an output current sampling value; filter the output current sampling value, and use the current obtained by the filtering process as the host current.
  • the device when the device is applied to the slave device, the device further includes:
  • the slave current outer loop processing module is configured to receive a host current delivered by the host, and determine a voltage input reference value of the slave voltage loop according to the host current.
  • the slave current outer loop processing module may be configured to input an error value between an output current value sampled by the output current sampling unit and the host current as a current sharing outer loop input; The value is compensated and the limiting process is performed to obtain an output value of the current sharing outer loop; the output value is superimposed on a given voltage value that is monitored and sent, and the voltage input reference value of the slave voltage loop is obtained.
  • the voltage loop processing module may be configured to determine an error value of the voltage input reference value and an output voltage value collected by the output voltage sampling unit; compensating and limiting the error value to obtain The output of the voltage loop characterizes the first output value of a frequency.
  • the current inner loop processing module may be configured to determine an error value of the instantaneous value of the output current collected by the host current and the output current sampling unit; and compensate the error value and A clipping process is performed to obtain the second output value representing the frequency of the output of the current sharing inner loop.
  • Embodiments of the present disclosure also provide a non-transitory computer readable storage medium storing computer executable instructions arranged to perform the above method.
  • An embodiment of the present disclosure further provides an electronic device, including:
  • At least one processor At least one processor
  • the memory stores instructions executable by the at least one processor, the instructions being executed by the at least one processor to cause the at least one processor to perform the method described above.
  • Embodiments of the present disclosure provide a current sharing control method for a switching rectifier, the method comprising: obtaining a first output value of a voltage loop according to a voltage input reference value and a collected output voltage value, according to a host current and a collected output.
  • the current instantaneous value obtains a second output value of the current sharing inner loop, and superimposes the first output value and the second output value to generate a pulse modulation signal, where the pulse modulation signal is used to adjust the switching frequency of the switching tube of the slave / or switching time, this achieves the stability of the output voltage on the busbar by the pulse modulation signal, reducing the voltage fluctuation of the busbar.
  • FIG. 1 is a flow chart of a current sharing control method of a switching rectifier according to an embodiment of the present disclosure
  • FIG. 2 is a control block diagram of a digitally controlled rectifier in an embodiment of the present disclosure
  • FIG. 3 is a flowchart of a flow-out loop of a host in an embodiment of the present disclosure
  • FIG. 4 is an execution diagram of a host current sharing inner ring in an embodiment of the present disclosure
  • FIG. 5 is a flow chart of a current sharing outer loop of a slave in an embodiment of the present disclosure
  • FIG. 6 is an execution diagram of a current sharing outer loop of a slave in an embodiment of the present disclosure
  • FIG. 7 is a flowchart of execution of a master and a slave in an embodiment of the present disclosure
  • FIG. 8 is a schematic structural diagram of a control device of a switching rectifier according to an embodiment of the present disclosure.
  • FIG. 9 is a schematic structural diagram of an electronic device according to an embodiment of the present disclosure.
  • Embodiments of the present disclosure provide a current sharing control method for a switching rectifier, the method comprising: obtaining a first output value of a voltage loop according to a voltage input reference value and a collected output voltage value, according to a host current and a collected output.
  • the current instantaneous value obtains a second output value of the current sharing inner loop, and superimposes the first output value and the second output value to generate a pulse modulation signal, where the pulse modulation signal is used to adjust the switching frequency of the switching tube of the slave / or switching time, this achieves the stability of the output voltage on the busbar by the pulse modulation signal, reducing the voltage fluctuation of the busbar.
  • FIG. 1 is a flowchart of a current sharing control method for a light-opening rectifier according to an embodiment of the present disclosure, the method includes:
  • the pulse modulation signal is generated by the output values of the current sharing outer loop and the voltage loop, and the voltage on the busbar is output adjusted according to the pulse modulation signal, so that the busbar voltage can be reduced. Fluctuation to ensure the stability of the busbar voltage.
  • the control block diagram of the DC-DC part of the digitally controlled rectifier includes at least one current sharing loop and a voltage loop.
  • the current sharing loop is responsible for equalizing the host current and the local current.
  • the voltage loop is responsible for stabilizing the output of the single module.
  • the voltage and current sharing modes adopt the master-slave current sharing mode, that is, one power in the parallel system.
  • the source module acts as the master and the other power modules act as slaves.
  • the host is obtained through predetermined rules.
  • the host will perform the current sharing outer ring.
  • the current sharing outer ring of the host is shown in Figure 3.
  • the related process is as follows:
  • the output current sampling unit of the host samples the output current to obtain an output current sampling value
  • the output current sampling value is obtained, the output current sampling value is filtered, and the current obtained by the filtering process is taken as the host current;
  • the host can not only obtain the host current, but also send the host current to the corresponding slave.
  • the host After the host current is obtained, the host will enter the current sharing inner loop.
  • the implementation flow of the current sharing inner loop is shown in Figure 4.
  • the host samples the host current and the host output current calculated by the host current outer loop.
  • the error signal of the instantaneous value of the output current obtained by the unit sampling is input as a current sharing inner loop, and after passing through the current limiting inner loop compensation function, the second output value of the current sharing inner loop is obtained after passing through the limiting module;
  • the host voltage loop uses the voltage input reference value of the monitoring and the error signal of the output voltage value sampled by the host output voltage sampling unit as the voltage loop input, and passes through the voltage loop loop compensation function to obtain the voltage loop output through the limiting module;
  • the compensation function here can be, but is not limited to, a P regulator or a PI regulator, and the input value is compensated by a P regulator or a PI regulator.
  • the limiting module here performs limiting processing on the compensated output, so that the amplitude of the output value is within the set range.
  • the first output value of the voltage loop and the second output value of the current loop are obtained, the first output value is superimposed with the second output value, and the pulse modulation signal is generated based on the superposition result, where the first output value is a frequency,
  • the second output value is also a frequency.
  • Superimposing the first output value and the second output value directly superimposes one frequency with another frequency, thereby obtaining a final frequency, and generating a pulse modulation signal according to the obtained frequency.
  • the opening of the main switch can be adjusted based on the pulse modulation signal Turn off the frequency and / or switching time, thus reducing the fluctuation of the output voltage on the busbar to ensure the stability of the busbar output voltage.
  • the control of the busbar voltage by the host adopts a current sharing inner ring and a current sharing outer ring, thereby avoiding the problem that the stability of the busbar output voltage is large due to only using the current sharing outer ring, thereby Effectively ensure the stability of the busbar output voltage.
  • the slave will perform the current sharing outer loop.
  • the current sharing outer loop of the slave is shown in Figure 5.
  • the related process is as follows:
  • S501 Receive a host current delivered by a host.
  • the slave After the host sends the host current to the slave through the communication bus, the slave receives the host current delivered by the host through the communication bus.
  • the voltage input reference value of the voltage loop may be obtained as shown in FIG. 6.
  • the host current is given as the slave current sharing outer loop, and the current of the slave
  • the sampling unit obtains an output current value
  • the error signal between the collected output current value and the slave current is input as the current sharing outer loop of the current sharing outer loop, and the error value is compensated and the amplitude limiting processing is performed to obtain the output value of the current sharing outer loop, where the compensation is performed.
  • the clipping processing is the same as the processing in the above embodiment, and will not be described here.
  • the output value of the current sharing outer loop is superimposed on the given voltage value sent by the monitoring to obtain an input reference value of the slave voltage loop, where the given voltage value is monitored. Is a preset value.
  • the slave After the slave receives the voltage input reference value, the slave will perform the current sharing inner loop processing process.
  • the current sharing inner loop of the slave is the same as the current sharing inner loop processing of the master, as shown in Figure 3, the output voltage of the slave.
  • the sampling unit collects the output voltage value, and then the slave will determine the voltage input reference value and the output voltage sampling unit.
  • the slave device When the first output value of the voltage loop output is obtained, the slave device also determines the error value of the instantaneous value of the output current collected by the host current and the output current sampling unit, compensates the error value, and limits the amplitude to obtain a current sharing inner loop.
  • the second output value of the output characterizing a frequency
  • the first output value is superimposed with the second output value, and a modulated pulse signal is generated according to the superimposed result, where the modulated pulse signal is used to adjust the switching frequency and/or the switching time of the slave switch tube.
  • the switching time and/or the switching frequency are used to adjust the fluctuation amplitude of the output voltage of the slave to ensure the stability of the output voltage of the slave, thereby improving the stability of the output voltage of the entire busbar.
  • the current sharing outer ring and the current sharing inner ring are respectively described from the master and the slave respectively, and the case in the embodiment of the present disclosure is adopted in comparison with the case where only the current sharing outer ring is used to compensate the output voltage.
  • the current sharing outer loop and the current sharing inner loop compensate the output voltage, which improves the stability of the busbar output voltage.
  • FIG. 1 is a schematic structural diagram of a converter including a current sharing loop and a voltage loop.
  • the current sharing loop is superimposed with a given voltage that is monitored and distributed, and then the superimposed result is collected by the output voltage sampling unit.
  • the output voltages are superimposed, and the superposition results are subjected to voltage loop compensation, and finally a pulse modulation signal is generated.
  • the pulse modulation signal is sent to the power tube driving unit, and the power tube driving unit controls the switching frequency and/or the switching time of the switching tube by the pulse modulation signal, thereby ensuring the stability of the busbar output voltage.
  • Each power module samples the output current through the output current sampling module and samples the output voltage through the output voltage sampling module.
  • S703 The host processes the outer loop, and delivers the host current.
  • the processing procedure here is the current sharing outer loop processing process of the host, and the description that has been trusted in the above embodiments is not described herein again.
  • S704 The host is in the inner loop processing
  • the output obtained in S705 is processed into a voltage loop compensation network for processing, thereby obtaining a first output value of the voltage loop.
  • the host will generate a pulse modulation signal based on the first output value and the second output value, the pulse modulation signal being used to control the switching frequency of the switching tube and the switching time to stabilize the fluctuation of the output voltage.
  • the slave performs a current sharing outer loop process according to the host current.
  • the host current generated by the host is received from the opportunity, and the current sharing outer loop processing is performed according to the host current.
  • the process of the current sharing outer loop of the slave has been described in detail in the above embodiment, and will not be further described herein.
  • the opportunity generates an input voltage input reference value that is used by the host's voltage loop;
  • the slave also superimposes the first output value output from the voltage loop and the second output value of the current sharing inner loop output, thereby generating a pulse modulation signal for controlling the switching frequency of the switching transistor of the slave and/or Or switch time.
  • the main unit and the slave unit are described in detail for the current sharing outer ring and the current sharing inner ring.
  • the output voltage is compensated by the current sharing outer ring and the current sharing inner ring, which improves the stability of the busbar output voltage, compared to the case where only the current sharing outer ring is used to compensate the output voltage. .
  • a current sharing control device of the switching rectifier is further provided in the embodiment of the present disclosure, as shown in FIG. 8 , which is a switch in the embodiment of the present disclosure.
  • FIG. 8 Schematic diagram of a current sharing control device of a rectifier, the device comprising:
  • the voltage loop processing module 801 is configured to obtain a first output value of the voltage loop according to the voltage input reference value and the collected output voltage value;
  • the current inner loop processing module 802 is configured to acquire a second output value of the current sharing inner loop according to the host current and the collected instantaneous value of the output current;
  • the control module 803 is configured to superimpose the first output value and the second output value to generate a pulse modulation signal, wherein the pulse modulation signal is used to adjust a switching frequency and/or a switching time of the switch tube.
  • the device when the device is applied to the host, the device may further include:
  • the host current outer loop processing module is configured to sample the output current by the output current sampling unit to obtain an output current sampling value; filter the output current sampling value, and use the current obtained by the filtering process as the host current.
  • the device when the device is applied to the slave device, the device may further include:
  • the slave current outer loop processing module is configured to receive a host current delivered by the host, and determine a voltage input reference value of the slave voltage loop according to the host current.
  • the slave current outer loop processing module may be configured to calculate an error between the output current value sampled by the output current sampling unit and the host current.
  • the value is input as a current sharing outer loop; the error value is compensated and the limiting processing is performed to obtain an output value of the current sharing outer loop; and the output value is superimposed on a given voltage value that is monitored and issued, and the slave voltage is obtained.
  • the voltage of the ring is input to a reference value.
  • the voltage loop processing module when the device is applied to the slave, may be configured to determine an error value of the voltage input reference value and the output voltage value collected by the output voltage sampling unit; The error value is compensated and the clipping process is performed to obtain the first output value of the voltage loop output characterizing a frequency.
  • the current inner loop processing module may be configured to determine an error value of the instantaneous value of the output current collected by the host current and the output current sampling unit; The error value is compensated and the clipping process is performed to obtain the second output value representing the frequency of the output of the current sharing inner loop.
  • Embodiments of the present disclosure also provide a non-transitory computer readable storage medium storing computer executable instructions arranged to perform the method of any of the above embodiments.
  • the embodiment of the present disclosure further provides a schematic structural diagram of an electronic device.
  • the electronic device includes:
  • At least one processor 90 which is exemplified by a processor 90 in FIG. 9; and a memory 91, may further include a communication interface 92 and a bus 93.
  • the processor 90, the communication interface 92, and the memory 91 can complete communication with each other through the bus 93.
  • Communication interface 92 can be used for information transfer.
  • Processor 90 can invoke logic instructions in memory 91 to perform the methods of the above-described embodiments.
  • logic instructions in the memory 91 described above may be implemented in the form of a software functional unit and sold or used as a stand-alone product, and may be stored in a computer readable storage medium.
  • the memory 91 is a computer readable storage medium and can be used to store a software program, a computer executable program, a program instruction/module corresponding to the method in the embodiment of the present disclosure.
  • the processor 90 executes the function application and the data processing by executing the software programs, the instructions, and the modules stored in the memory 91, that is, the current sharing control method of the switching rectifier in the above method embodiment.
  • the memory 91 may include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application required for at least one function; the storage data area may store data created according to usage of the terminal device, and the like. Further, the memory 91 may include a high speed random access memory, and may also include a nonvolatile memory.
  • the technical solution of the embodiment of the present disclosure may be embodied in the form of a software product, the computer software
  • the product is stored in a storage medium and includes one or more instructions for causing a computer device (which may be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods described in the embodiments of the present disclosure.
  • the foregoing storage medium may be a non-transitory storage medium, including: a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and the like.
  • the current sharing control method and device of the switching rectifier provided by the present disclosure realizes the stability of the output voltage on the busbar by the pulse modulation signal, and reduces the voltage fluctuation of the busbar.

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Abstract

一种开关整流器的均流控制方法及装置，该方法包括：根据电压输入参考值以及采集到的输出电压值，得到电压环的第一输出值（S101），根据主机电流以及采集到的输出电流瞬时值，获取均流内环的第二输出值（S102），将第一输出值与第二输出值进行叠加，生成脉冲调制信号（S103），这里的脉冲调制信号用于调整从机的开关管的开关频率和/或开关时间，这样实现了通过脉冲调制信号调整母排上的输出电压的稳定性，降低了母排电压波动。

Description

一种开关整流器的均流控制方法及装置 技术领域
本公开涉及电源变换技术领域，例如涉及一种开关整流器的均流控制方法及装置。
背景技术
通信电源是为通信基站或者通信机房等通讯设备提供能量的设备，而开关整流器是通信电源的核心组成部分。随着对通信电源***的可靠性、功率容量和性能等指标越来越高的要求，传统的集中式供电方式已经不能满足这些实际的应用。多个电源模块并联，平均分担负载功率以降低各个模块中主功率器件的电流应力，有利于功率器件的选择，同时，多模块并联能增加***的容量和提高***的可靠性。另外，多个模块并联，可以灵活构成各种功率等级电源***，以模块化取代系列化，提高电源模块的标准化程度，从而缩短开发研制和生产周期。并联***各模块之间的均流极其重要，如果均流不稳，会导致并联***的输出母排电压不稳，同时会缩短承载较多电流的模块寿命。
在现有的均流技术中，较常用的模拟均流技术需要并联***上额外的均流电路，这些电路比较容易受到环境的影响，并且设计好的模拟控制***移植性很差。均流技术正在向数字均流技术发展，数字均流技术只需要一条均流母线和通信总线，不需要其他额外的电路。一旦某个模块发生故障，该模块就自动退出并联***，其他模块仍然工作，提高并联***的可靠性。数字控制的均流具有更高的灵活性和可升级性等优点。但是现有的数字均流技术，一般都只有简单的均流外环用来补偿输出电压，并联***上母排电压波动较大。
发明内容
本公开提供一种开关整流器的均流控制方法及装置，用以解决相关技术中数字均流技术只有简单的均流外环用来补偿输出电压，并联***上母排电压波动较大的问题。
相关技术方案如下：
一种开关整流器的均流控制方法，包括：
根据电压输入参考值以及采集到的输出电压值，得到电压环的第一输出值；
根据主机电流以及采集到的输出电流瞬时值，获取均流内环的第二输出值；
将所述第一输出值与所述第二输出值进行叠加，生成脉冲调制信号，其中，所述脉冲调制信号用于调整开关管的开关频率和/或开关时间。
可选的，在所述方法应用到整流器并联***的主机中时，在根据所述输入参考值以及采集到的输出电压值，得到电压环的第一输出值之前，还包括：
通过输出电流采样单元对输出电流进行采样，得到输出电流采样值；
对输出电流采样值进行滤波处理，将滤波处理得到的电流作为所述主机电流。
可选的，在所述方法应用到整流器并联***的从机中时，在根据所述输入参考值以及采集到的输出电压值，得到电压环的第一输出值之前，还包括：
接收主机下发的主机电流，并根据所述主机电流确定从机电压环的电压输入参考值。
可选的，根据所述主机电流确定从机电压环的输入参考值，包括：
将输出电流采样单元采样到的输出电流值与所述主机电流之间的误差值作为均流外环输入；
对所述误差值进行补偿以及限幅处理，得到均流外环的输出值；
将所述输出值叠加到监控下发的给定电压值上，得从机电压环的所述电压输入参考值。
可选的，根据电压输入参考值以及采集到的输出电压值，得到电压环的第一输出值，包括：
确定所述电压输入参考值与输出电压采样单元采集到的输出电压值的误差值；
对所述误差值进行补偿以及限幅处理，得到所述电压环输出的表征了一个频率的所述第一输出值。
可选的，根据所述主机电流以及采集到的输出电流瞬时值，获取均流内环 的第二输出值，包括：
确定所述主机电流与输出电流采样单元采集到的输出电流瞬时值的误差值；
对所述误差值进行补偿以及限幅处理，得到所述均流内环输出的表征一个频率的所述第二输出值。
一种开关整流器的均流控制装置，包括：
电压环处理模块，被配置为根据电压输入参考值以及采集到的输出电压值，得到电压环的第一输出值；
电流内环处理模块，被配置为根据主机电流以及采集到的输出电流瞬时值，获取均流内环的第二输出值；
控制模块，被配置为将所述第一输出值与所述第二输出值进行叠加，生成脉冲调制信号，其中，所述脉冲调制信号用于调整开关管的开关频率和/或开关时间。
可选的，在所述装置应用到主机中时，所述装置还包括：
主机电流外环处理模块，被配置为通过输出电流采样单元对输出电流进行采样，得到输出电流采样值；对输出电流采样值进行滤波处理，将滤波处理得到的电流作为所述主机电流。
可选的，在所述装置应用到从机中时，所述装置还包括：
从机电流外环处理模块，被配置为接收主机下发的主机电流，并根据所述主机电流确定从机电压环的电压输入参考值。
可选的，所述从机电流外环处理模块，可以被配置为将输出电流采样单元采样到的输出电流值与所述主机电流之间的误差值作为均流外环输入；对所述误差值进行补偿以及限幅处理，得到均流外环的输出值；将所述输出值叠加到监控下发的给定电压值上，得从机电压环的所述电压输入参考值。
可选的，所述电压环处理模块，可以被配置为确定所述电压输入参考值与输出电压采样单元采集到的输出电压值的误差值；对所述误差值进行补偿以及限幅处理，得到所述电压环输出的表征了一个频率的所述第一输出值。
可选的，所述电流内环处理模块，可以被配置为确定所述主机电流与输出电流采样单元采集到的输出电流瞬时值的误差值；对所述误差值进行补偿以及 限幅处理，得到所述均流内环输出的表征一个频率的所述第二输出值。
本公开实施例还提供了一种非暂态计算机可读存储介质，存储有计算机可执行指令，所述计算机可执行指令设置为执行上述方法。
本公开实施例还提供了一种电子设备，包括：
至少一个处理器；以及
与所述至少一个处理器通信连接的存储器；其中，
所述存储器存储有可被所述至少一个处理器执行的指令，所述指令被所述至少一个处理器执行，以使所述至少一个处理器执行上述的方法。
本公开实施例提供了一种开关整流器的均流控制方法，该方法包括：根据电压输入参考值以及采集到的输出电压值，得到电压环的第一输出值，根据主机电流以及采集到的输出电流瞬时值，获取均流内环的第二输出值，将第一输出值与第二输出值进行叠加，生成脉冲调制信号，这里的脉冲调制信号用于调整从机的开关管的开关频率和/或开关时间，这样实现了通过脉冲调制信号调整母排上的输出电压的稳定性，降低了母排电压波动。
附图概述
图1为本公开实施例中一种开关整流器的均流控制方法的流程图；
图2为本公开实施例中数字控制的整流器的控制框图；
图3为本公开实施例中主机均流外环的流程图；
图4为本公开实施例中的主机均流内环的执行图；
图5为本公开实施例中的从机的均流外环的流程图；
图6为本公开实施例中的从机的均流外环的执行图；
图7为本公开实施例中主机与从机的执行流程图；
图8为本公开实施例中一种开关整流器的控制装置的结构示意图；以及
图9是本公开实施例提供的电子设备的结构示意图。
具体实施方式
为使本公开实施例的技术方案和优点更加清楚，下面将结合本公开实施例中的附图，对本公开实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本公开一部分实施例，而不是全部的实施例。基于本公开中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本公开保护的范围。
本公开实施例提供了一种开关整流器的均流控制方法，该方法包括：根据电压输入参考值以及采集到的输出电压值，得到电压环的第一输出值，根据主机电流以及采集到的输出电流瞬时值，获取均流内环的第二输出值，将第一输出值与第二输出值进行叠加，生成脉冲调制信号，这里的脉冲调制信号用于调整从机的开关管的开关频率和/或开关时间，这样实现了通过脉冲调制信号调整母排上的输出电压的稳定性，降低了母排电压波动。
下面通过附图以及实施例对本公开技术方案做详细的说明，应当理解，本公开实施例以及实施例中的技术特征只是对本公开技术方案的说明，而不是限定，在不冲突的情况下，本公开实施例以及实施例中的技术特征可以相互组合。
如图1所示为本公开实施例中一种开光整流器的均流控制方法的流程图，该方法包括：
S101，根据电压输出参考值以及采集到的输出电压值，得到电压环的第一输出值；
S102，根据主机电流以及采集到的输出电流瞬时值，获取均流内环的第二输出值；
S103，将第一输出值与第二输出值进行叠加，生成脉冲调制信号；
在本公开实施例所提供的方法中，该通过均流外环以及电压环的输出值生成脉冲调制信号，并根据脉冲调制信号对母排上的电压进行输出调节，这样可以降低母排电压的波动，从而保证母排电压的稳定性。
如图2所示为数字控制的整流器的DC-DC部分的控制框图，至少包括了一个均流环以及电压环，均流环负责均衡主机电流以及本机电流，电压环负责稳定单个模块的输出电压，均流方式采用主从均流方式，即并联***上的一个电 源模块作为主机，其他电源模块作为从机，主机通过预定规则得到。
在下面的实施例中分别对主机的应用场景和从机的应用场景进行说明。
在主机中时：
首先主机将进行均流外环，主机的均流外环如图3所示，相关流程如下：
S301，输出电流采样；
主机的输出电流采样单元对输出电流进行采样，得到输出电流采样值；
S302，根据输出电流采样值，得到主机电流；
在得到输出电流采样值时，对输出电流采样值进行滤波处理，将滤波处理得到的电流作为主机电流；
S303，将主机电流通过通讯总线发送至从机。
在上述主机均流外环中，主机不仅可以得到主机电流，并且还将主机电流发送至对应从机。
在得到主机电流之后，主机将进入到均流内环，均流内环的实现流程如图4所示，在图4中，主机将主机均流外环计算出的主机电流与主机输出电流采样单元采样得到的输出电流瞬时值的误差信号作为均流内环输入，经过均流内环环路补偿函数，在经过限幅模块后得到均流内环的第二输出值；
主机电压环使用监控下发的电压输入参考值与主机输出电压采样单元采样得到的输出电压值的误差信号作为电压环输入，经过电压环环路补偿函数，经过限幅模块得到电压环输出；
这里的补偿函数可以但不限于是P调节器或者是PI调节器，通过P调节器或者是PI调节器对输入值进行补偿处理。
这里的限幅模块是对经过补偿处理的输出进行限幅处理，这样可以保证输出值的幅度在设定范围内。
在得到电压环的第一输出值以及电流环的第二输出值时，将第一输出值与第二输出值进行叠加，基于叠加结果生成脉冲调制信号，这里的第一输出值为一个频率，第二输出值也是一个频率，将第一输出值与第二输出值进行叠加就是将一个频率与另一频率进行直接叠加，从而就得到一个最终频率，根据得到的频率就可以生成脉冲调制信号，基于脉冲调制信号可以调整主机开关管的开 关频率和/或开关时间，从而降低母排上的输出电压的波动，保证母排输出电压的稳定性。
在上述的实施例中，主机对母排电压的控制采用了均流内环以及均流外环，避免了只采用均流外环所导致的母排输出电压的稳定性较大的问题，从而有效的保证了母排输出电压的稳定性。
在从机中时：
首先从机将进行均流外环，从机的均流外环如图5所示，相关流程如下：
S501，接收主机下发的主机电流；
在主机通过通讯总线向从机下发主机电流之后，从机将通过通讯总线接收主机下发的主机电流。
S502，根据主机电流，确定从机电压环的电压输入参考值；
在本公开实施例中，电压环的电压输入参考值的得到可以是如图6所示的过程，在接收到主机电流之后，将主机电流作为从机均流外环给定，从机的电流采样单元得到输出电流值；
将采集到的输出电流值与从机电流之间的误差信号作为均流外环的均流外环输入，对误差值进行补偿以及限幅处理，得到均流外环的输出值，这里的补偿以及限幅处理与上述实施例中的处理方式相同，此处就不在赘述。
在得到均流外环的输出值之后，将均流外环的输出值叠加到监控下发的给定电压值上，得到从机电压环的输入参考值，这里监控下发的给定电压值为预先设定的一个值。
S503，根据电压输入参考值以及采集到的输出电压值，得到电压环的第一输出值；
S504，根据主机电流以及采集到的输出电流瞬时值，获取均流内环的第二输出值；
S505，将第一输出值与第二输出值进行叠加，生成脉冲调制信号。
从机在得到电压输入参考值之后，从机将进行均流内环处理过程，从机的均流内环和主机的均流内环处理过程相同，如图3所示，从机的输出电压采样单元采集输出电压值，然后从机将确定电压输入参考值与输出电压采样单元采 集到的输出电压值的误差值；对误差值进行补偿以及限幅处理，得到电压环输出的表征了一个频率的第一输出值；
在得到电压环输出的第一输出值时，从机还将确定主机电流与输出电流采样单元采集到的输出电流瞬时值的误差值，对误差值进行补偿以及限幅处理，得到均流内环输出的表征一个频率的第二输出值；
将第一输出值与第二输出值进行叠加，并根据叠加结果生成调制脉冲信号，这里的调制脉冲信号用于调整从机开关管的开关频率和/或开关时间。通过开关时间和/或开关频率来调整从机输出电压的波动幅度，保证从机输出电压的稳定性，进而提升整个母排输出电压的稳定性。
在上述实施例中分别从主机和从机对均流外环和均流内环进行详细的说明，相比于原来只使用均流外环来补偿输出电压的情况，本公开实施例中的通过均流外环以及均流内环来对输出电压进行补偿，这样提升了母排输出电压的稳定性。
下面通过主机和从机结合来对本公开技术方案进行说明。
如图1所示为包含了均流环和电压环的变换器的结构示意图，在图1中，均流环与监控下发的给定电压进行叠加，然后叠加的结果与输出电压采样单元采集到的输出电压进行叠加，再将叠加结果进行电压环补偿，最后生成脉冲调制信号。该脉冲调制信号被发送至功率管驱动单元，该功率管驱动单元通过脉冲调制信号来控制开关管的开关频率和/开关时间，从而保证母排输出电压的稳定性。
相关实现流程如图7所示，相关流程如下：
S701，输出电流采样以及输出电压采样；
每个电源模块通过输出电流采样模块采样输出电流，通过输出电压采样模块采样输出电压。
S702，确定主机；
根据输出电流采样以及输出电压采样以及预设规则，确定出从机以及主机；若确定为主机，则执行S703；若确定为从机，则执行S708；
S703，主机均流外环处理，下发主机电流；
这里的处理过程为主机的均流外环处理过程，在上述的实施例中已经相信的说明，此处就不再赘述。
S704，主机均流内环处理；
主机均流内环的处理过程已经在上述的实施例中进行了详细的说明，此处的均流内环的处理之后，也就是主机电流与采集的输出电流之间的误差值，并输出第二输出值；
S705，监控下发电压环参考值；
这里的处理过程在主机的电压环处理过程中已经详细的说明，此处就不在赘述。
S706，电压环补偿网络进行处理；
在S705中得到的输出结果进入到电压环补偿网络进行处理，从而得到电压环的第一输出值。
S707，生成脉冲调制信号；
主机将基于第一输出值以及第二输出值生成脉冲调制信号，该脉冲调制信号用于控制开关管的开关频率以及开关时间，从稳定输出电压的波动。
S708，从机根据主机电流，执行均流外环处理；
从机会接收主机产生出的主机电流，并根据主机电流进行均流外环处理，从机的均流外环处理过程在上述实施例中已经详细的说明，此处就不再赘述，另外，从机会生成一个输入电压输入参考值，这个输入电压参考值将主机的电压环使用；
S709，从机进行均流内环处理；
从机的均流内环处理过程在上述实施例中已经详细的说明，此处就不再赘述。
S710，生成脉冲调制信号；
从机也将根据电压环输出的第一输出值与均流内环输出的第二输出值进行叠加，从而生成脉冲调制信号，该脉冲调制信号用于控制从机的开关管的开关频率和/或开关时间。
在本公开实施例中，对主机和从机对均流外环和均流内环进行详细的说明， 相比于原来只使用均流外环来补偿输出电压的情况，本公开实施例中的通过均流外环以及均流内环来对输出电压进行补偿，这样提升了母排输出电压的稳定性。
对应本公开实施例中的一种开关整流器的均流控制方法，本公开实施例中还提供了一种开关整流器的均流控制装置，如图8所示为本公开实施例中的一种开关整流器的均流控制装置的结构示意图，该装置包括：
电压环处理模块801，被配置为根据电压输入参考值以及采集到的输出电压值，得到电压环的第一输出值；
电流内环处理模块802，被配置为根据主机电流以及采集到的输出电流瞬时值，获取均流内环的第二输出值；
控制模块803，被配置为将所述第一输出值与所述第二输出值进行叠加，生成脉冲调制信号，其中，所述脉冲调制信号用于调整开关管的开关频率和/或开关时间。
在本公开实施例中，在该装置应用到主机中时，该装置还可以包括：
主机电流外环处理模块，被配置为通过输出电流采样单元对输出电流进行采样，得到输出电流采样值；对输出电流采样值进行滤波处理，将滤波处理得到的电流作为所述主机电流。
在本公开实施例中，该装置应用到从机中时，该装置还可以包括：
从机电流外环处理模块，被配置为接收主机下发的主机电流，并根据所述主机电流确定从机电压环的电压输入参考值。
在本公开实施例中，该装置应用到从机中时，所述从机电流外环处理模块，可以被配置为将输出电流采样单元采样到的输出电流值与所述主机电流之间的误差值作为均流外环输入；对所述误差值进行补偿以及限幅处理，得到均流外环的输出值；将所述输出值叠加到监控下发的给定电压值上，得从机电压环的所述电压输入参考值。
在本公开实施例中，该装置应用到从机中时，所述电压环处理模块，可以被配置为确定所述电压输入参考值与输出电压采样单元采集到的输出电压值的误差值；对所述误差值进行补偿以及限幅处理，得到所述电压环输出的表征了一个频率的所述第一输出值。
在本公开实施例中，该装置应用到从机中时，所述电流内环处理模块，可以被配置为确定所述主机电流与输出电流采样单元采集到的输出电流瞬时值的误差值；对所述误差值进行补偿以及限幅处理，得到所述均流内环输出的表征一个频率的所述第二输出值。
本公开实施例还提供了一种非暂态计算机可读存储介质，存储有计算机可执行指令，所述计算机可执行指令设置为执行上述任一实施例中的方法。
本公开实施例还提供了一种电子设备的结构示意图。参见图9，该电子设备包括：
至少一个处理器(processor)90，图9中以一个处理器90为例；和存储器(memory)91，还可以包括通信接口(Communications Interface)92和总线93。其中，处理器90、通信接口92、存储器91可以通过总线93完成相互间的通信。通信接口92可以用于信息传输。处理器90可以调用存储器91中的逻辑指令，以执行上述实施例的方法。
此外，上述的存储器91中的逻辑指令可以通过软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。
存储器91作为一种计算机可读存储介质，可用于存储软件程序、计算机可执行程序，如本公开实施例中的方法对应的程序指令/模块。处理器90通过运行存储在存储器91中的软件程序、指令以及模块，从而执行功能应用以及数据处理，即实现上述方法实施例中的开关整流器的均流控制方法。
存储器91可包括存储程序区和存储数据区，其中，存储程序区可存储操作***、至少一个功能所需的应用程序；存储数据区可存储根据终端设备的使用所创建的数据等。此外，存储器91可以包括高速随机存取存储器，还可以包括非易失性存储器。
本公开实施例的技术方案可以以软件产品的形式体现出来，该计算机软件 产品存储在一个存储介质中，包括一个或多个指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本公开实施例所述方法的全部或部分步骤。而前述的存储介质可以是非暂态存储介质，包括：U盘、移动硬盘、只读存储器(ROM，Read-Only Memory)、随机存取存储器(RAM，Random Access Memory)、磁碟或者光盘等多种可以存储程序代码的介质，也可以是暂态存储介质。
工业实用性
本公开提供的开关整流器的均流控制方法及装置实现了通过脉冲调制信号调整母排上的输出电压的稳定性，降低了母排电压波动。

Claims (13)

  1. 一种开关整流器的均流控制方法，包括：
    根据电压输入参考值以及采集到的输出电压值，得到电压环的第一输出值；
    根据主机电流以及采集到的输出电流瞬时值，获取均流内环的第二输出值；
    将所述第一输出值与所述第二输出值进行叠加，生成脉冲调制信号，其中，所述脉冲调制信号用于调整开关管的开关频率和/或开关时间。
  2. 如权利要求1所述的方法，其中，在所述方法应用到整流器并联***的主机中时，在根据所述输入参考值以及采集到的输出电压值，得到电压环的第一输出值之前，还包括：
    通过输出电流采样单元对输出电流进行采样，得到输出电流采样值；
    对输出电流采样值进行滤波处理，将滤波处理得到的电流作为所述主机电流。
  3. 如权利要求1所述的方法，其中，在所述方法应用到整流器并联***的从机中时，在根据所述输入参考值以及采集到的输出电压值，得到电压环的第一输出值之前，还包括：
    接收主机下发的主机电流，并根据所述主机电流确定从机电压环的电压输入参考值。
  4. 如权利要求3所述的方法，其中，根据所述主机电流确定从机电压环的输入参考值，包括：
    将输出电流采样单元采样到的输出电流值与所述主机电流之间的误差值作为均流外环输入；
    对所述误差值进行补偿以及限幅处理，得到均流外环的输出值；
    将所述输出值叠加到监控下发的给定电压值上，得从机电压环的所述电压 输入参考值。
  5. 如权利要求3所述的方法，其中，根据电压输入参考值以及采集到的输出电压值，得到电压环的第一输出值，包括：
    确定所述电压输入参考值与输出电压采样单元采集到的输出电压值的误差值；
    对所述误差值进行补偿以及限幅处理，得到所述电压环输出的表征了一个频率的所述第一输出值。
  6. 如权利要求3所述的方法，其中，根据所述主机电流以及采集到的输出电流瞬时值，获取均流内环的第二输出值，包括：
    确定所述主机电流与输出电流采样单元采集到的输出电流瞬时值的误差值；
    对所述误差值进行补偿以及限幅处理，得到所述均流内环输出的表征一个频率的所述第二输出值。
  7. 一种开关整流器的均流控制装置，包括：
    电压环处理模块，被配置为根据电压输入参考值以及采集到的输出电压值，得到电压环的第一输出值；
    电流内环处理模块，被配置为根据主机电流以及采集到的输出电流瞬时值，获取均流内环的第二输出值；
    控制模块，被配置为将所述第一输出值与所述第二输出值进行叠加，生成脉冲调制信号，其中，所述脉冲调制信号用于调整开关管的开关频率和/或开关时间。
  8. 如权利要求7所述的装置，其中，在所述装置应用到主机中时，所述装置还包括：
    主机电流外环处理模块，被配置为通过输出电流采样单元对输出电流进行 采样，得到输出电流采样值；对输出电流采样值进行滤波处理，将滤波处理得到的电流作为所述主机电流。
  9. 如权利要求7所述的装置，其中，在所述装置应用到从机中时，所述装置还包括：
    从机电流外环处理模块，被配置为接收主机下发的主机电流，并根据所述主机电流确定从机电压环的电压输入参考值。
  10. 如权利要求9所述的装置，其中，所述从机电流外环处理模块，被配置为将输出电流采样单元采样到的输出电流值与所述主机电流之间的误差值作为均流外环输入；对所述误差值进行补偿以及限幅处理，得到均流外环的输出值；将所述输出值叠加到监控下发的给定电压值上，得从机电压环的所述电压输入参考值。
  11. 如权利要求9所述的装置，其中，所述电压环处理模块，被配置为确定所述电压输入参考值与输出电压采样单元采集到的输出电压值的误差值；对所述误差值进行补偿以及限幅处理，得到所述电压环输出的表征了一个频率的所述第一输出值。
  12. 如权利要求9所述的装置，其中，所述电流内环处理模块，被配置为确定所述主机电流与输出电流采样单元采集到的输出电流瞬时值的误差值；对所述误差值进行补偿以及限幅处理，得到所述均流内环输出的表征一个频率的所述第二输出值。
  13. 一种非暂态计算机可读存储介质，存储有计算机可执行指令，所述计算机可执行指令设置为执行权利要求1-6中任一项的方法。
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