WO2017036098A1 - 一种显示装置及驱动方法 - Google Patents

一种显示装置及驱动方法 Download PDF

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Publication number
WO2017036098A1
WO2017036098A1 PCT/CN2016/073995 CN2016073995W WO2017036098A1 WO 2017036098 A1 WO2017036098 A1 WO 2017036098A1 CN 2016073995 W CN2016073995 W CN 2016073995W WO 2017036098 A1 WO2017036098 A1 WO 2017036098A1
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WIPO (PCT)
Prior art keywords
reset
power
signal
source
source driver
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PCT/CN2016/073995
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English (en)
French (fr)
Inventor
王秀荣
高博
时凌云
张�浩
李亚飞
韩鹏
孟晨
薛子姣
史天阔
何全华
Original Assignee
京东方科技集团股份有限公司
北京京东方光电科技有限公司
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Application filed by 京东方科技集团股份有限公司, 北京京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US15/325,052 priority Critical patent/US10332459B2/en
Publication of WO2017036098A1 publication Critical patent/WO2017036098A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/06—Details of flat display driving waveforms
    • G09G2310/061—Details of flat display driving waveforms for resetting or blanking
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/04—Display protection
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/06—Handling electromagnetic interferences [EMI], covering emitted as well as received electromagnetic radiation
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/08—Fault-tolerant or redundant circuits, or circuits in which repair of defects is prepared
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/12—Test circuits or failure detection circuits included in a display system, as permanent part thereof

Definitions

  • the present invention relates to the field of display technologies, and in particular, to a display device and a driving method.
  • the main board control terminal has a general anti-static mechanism.
  • the main board control unit sends a read command to the source driving chip of the liquid crystal display module at intervals, thereby reading the characterization value of the electrostatic status register of the source driving chip, that is, the state value of the 0A register, thereby determining whether to send or not.
  • the reset signal resets and restarts the source driver chip.
  • the source driver chip needs to perform reset reset when a static abnormality occurs, and the reset process is as shown in FIG. 1 .
  • the process specifically includes: S10, the control unit reads the state value of the 0A register of the source driver chip at a fixed time interval; S11, when reading the value of 09 that characterizes the normal operation of the source driver chip, The source driver chip inputs a reset signal, and the source driver chip does not perform resetting; S12.
  • the value indicating the abnormal operation of the source driver chip is read, that is, the non-09 value indicating the electrostatic abnormality of the source driver chip is represented, the source driver chip is driven to the source.
  • the reset signal is input to control the source driver chip to reset.
  • the source driver chip with static abnormality cannot be reset and restarted under the control of the reset signal, and the static electricity detection mechanism will be invalid, thereby affecting the normal operation of the liquid crystal display module.
  • the embodiment of the invention provides a display device and a driving method for ensuring that the source driving chip completes the reset and restart under the control of the reset signal, and improves the failure of the resetting and restarting of the source driving chip during the electrostatic abnormality, thereby enhancing the liquid crystal display module. Antistatic ability.
  • An aspect of the invention provides a display device comprising: a power reset circuit and a source drive chip for driving a display panel for display; wherein
  • An input end of the power reset circuit is connected to a power signal output end, and the power source is complex
  • the control end of the bit circuit is connected to the reset signal end, and the output end of the power reset circuit is connected to the power signal input end of the source drive chip;
  • the power reset circuit is configured to synchronously reset the power signal when receiving the reset signal, and input the reset power signal to the power signal input end of the source driver chip.
  • the power reset circuit includes: a first switching transistor, a second switching transistor, a first resistor, and a second resistor; wherein
  • a gate of the first switching transistor is connected to the reset signal output end, and a source of the first switching transistor is respectively connected to one end of the first resistor and a gate of the second switching transistor, The drain of the first switching transistor is connected to the ground level signal terminal;
  • the other end of the first resistor is respectively connected to the power signal output end and the source of the second switching transistor;
  • the drains of the second switching transistors are respectively connected to one end of the second resistor and a power signal input end of the source driving chip;
  • the other end of the second resistor is connected to the ground level signal terminal.
  • the source driver chip includes: a status register; wherein
  • the status register is configured to output a first characterization value indicating that the source driving chip is in an abnormal working state when an electrostatic abnormality occurs in the source driving chip, and output characterization when the source driving chip operates normally The second characterization value of the source driver chip in a normal operating state.
  • the display device further includes: a control unit; wherein
  • the control unit is configured to read the characterization value of the status register every preset time interval;
  • a reset signal is input to a control end of the power reset circuit, and when the second characterization value is read, a reset is not input to a control end of the power reset circuit signal.
  • control unit is further configured to input a reset signal to a reset end of the source driving chip when the first characterization value is read.
  • the power reset circuit and the control unit are disposed on a flexible circuit board.
  • Another aspect of the present invention provides a power signal reset driving method for the above display device provided by the embodiment of the present invention, including:
  • the power reset circuit synchronously resets the power signal when receiving the reset signal. And inputting the reset power signal to the power signal input end of the source driving chip.
  • the power signal reset driving method further includes:
  • Characterizing values characterizing the operating state of the source driver chip are read every preset time interval
  • a reset signal is input to the control terminal of the power reset circuit.
  • reading the characterization values characterizing the operating state of the source driving chip includes:
  • the power signal reset driving method after determining that the source driving chip is in an electrostatic abnormality, inputting a reset signal to the control end of the power reset circuit, including:
  • the power signal reset driving method further includes: inputting a reset signal to a reset end of the source driving chip when the first characterization value is read.
  • the embodiment of the present invention provides a display device and a driving method.
  • the display device includes: a power reset circuit and a source driving chip for driving the display panel for display; wherein the input end of the power reset circuit is connected to the power signal output end, The control end of the power reset circuit is connected to the reset signal end, and the output end of the power reset circuit is connected to the power signal input end of the source drive chip; the power reset circuit is used for synchronously resetting the power signal when receiving the reset signal, and after resetting The power signal is input to the power signal input terminal of the source driver chip.
  • the power supply signal can be synchronously reset, and the reset power signal is input to the power signal input end of the source driving chip, thereby performing the source driving chip.
  • Initialize and re-drive the source driver chip to ensure that the source driver chip can be reset and restarted under the condition of static electricity abnormality, and improve the situation that the source driver chip resets and restarts when the static electricity is abnormal, thereby enhancing the antistatic capability of the liquid crystal display module.
  • FIG. 1 is a flow chart of a reset driving method of a source driving chip in an electrostatic abnormality in the prior art
  • FIG. 2 is a schematic structural diagram of a display device according to an embodiment of the present invention.
  • FIG. 3 is a schematic structural diagram of a display device according to an embodiment of the present disclosure.
  • FIG. 4 is a flowchart of a driving method for synchronously resetting a source driving chip and a power signal by a display device according to an embodiment of the present invention.
  • the embodiment of the invention provides a display device, as shown in FIG. 2 .
  • the display device may include a power reset circuit 01 and a source drive chip 02 for driving a display panel for display.
  • the input end of the power reset circuit 01 is connected to the power signal output end Vout, the control end of the power reset circuit 01 is connected to the reset signal end Reset, and the output end of the power reset circuit 01 is connected to the power signal input end of the source drive chip.
  • the power reset circuit 01 is configured to synchronously reset the power signal when receiving the reset signal, and input the reset power signal to the power signal input end of the source drive chip 02.
  • the display device includes: a power reset circuit 01 and a source drive chip 02 for driving a display panel for display; wherein the input end of the power reset circuit 01 is connected to the power signal output terminal Vout, and the power reset circuit 01
  • the control terminal is connected to the reset signal terminal Reset, and the output terminal of the power reset circuit 01 is connected to the power signal input end of the source drive chip 02; the power reset circuit 01 is used for synchronously resetting the power signal when receiving the reset signal, and will be reset.
  • the subsequent power signal is input to the power signal input terminal of the source driver chip 02.
  • the power supply signal can be synchronously reset, and the reset power signal is input to the power signal input end of the source driving chip, thereby performing the source driving chip.
  • Initialize and re-drive the source driver chip to ensure that the source driver chip can be reset and restarted under the condition of static electricity abnormality, and improve the situation that the source driver chip resets and restarts when the static electricity is abnormal, thereby enhancing the antistatic capability of the liquid crystal display module.
  • the power reset circuit 01 may include: a first switching transistor T1, The second switching transistor T2, the first resistor R1 and the second resistor R2.
  • the gate of the first switching transistor T1 is connected to the reset signal output terminal Reset, and the source of the first switching transistor T1 is respectively connected to one end of the first resistor R1 and the gate of the second switching transistor T2, and the drain of the first switching transistor T1
  • the pole is connected to the ground level signal terminal GND.
  • the other end of the first resistor R1 is connected to the power signal output terminal Vout and the source of the second switching transistor T2, respectively.
  • the drain of the second switching transistor T2 is connected to one end of the second resistor R2 and the power signal input terminal of the source driving chip 02, respectively.
  • the other end of the second resistor R2 is connected to the ground level signal terminal GND.
  • the reset signal terminal Reset When the display device works normally, the reset signal terminal Reset outputs a high level, and the power signal output terminal Vout outputs a high level signal, at which time the first switching transistor T1 is turned on.
  • the turned-on first switching transistor T1 turns on the gate of the second switching transistor T2 and the ground level signal terminal GND, so that the gate of the second switching transistor T2 is a low level signal.
  • the second switching transistor T2 is a P-type transistor, and thus the second switching transistor T2 is turned on.
  • the turned-on second switching transistor T2 transmits a high level signal output from the power signal output terminal Vout to the power signal input end of the source driving chip 02, and the source driving chip can operate normally.
  • the reset signal end Reset signal When the reset signal end Reset signal outputs a low level signal, the first switching transistor T1 is turned off, the gate of the second switching transistor T2 is a high level signal, and the second switching transistor T2 is also turned off. At this time, the signal input to the power signal input end of the source driver chip is a low level signal, and thus the source driver chip is reset. After the source driver chip completes the reset, the reset signal terminal Reset resumes outputting a high level signal, and the signal input to the power signal input end of the source driver chip is restored to a high level signal, thus completing the power supply by resetting the signal of the signal terminal Reset.
  • the synchronous reset of the power signal can be realized when the source driver chip is electrostatically abnormal, and the source driver chip can be reset and restarted when the static electricity is abnormal.
  • the switching transistor mentioned in the above embodiment of the present invention may be a thin film transistor (TFT) or a metal oxide semiconductor field effect transistor (MOS), which is not limited herein. .
  • TFT thin film transistor
  • MOS metal oxide semiconductor field effect transistor
  • the sources and drains of these transistors can be interchanged without specific distinction.
  • a thin film transistor will be described as an example in describing a specific embodiment.
  • the source driver chip can include a status register.
  • the status register is configured to output a first characterization value indicating that the source driving chip is in an abnormal working state when a static abnormality occurs in the source driving chip, and output the characterization source driving chip in a normal working state when the source driving chip operates normally.
  • the second characterization value Specifically, the operating state of the source driver chip can be characterized by a status register. Take the 0A register as an example, the static difference occurs in the source driver chip. At all times, the 0A register can output a characterization value 09 characterizing the electrostatic abnormality of the source driver chip, thereby facilitating the reading of the source driver chip by the control unit of the display device.
  • the output reset signal controls the source driver chip to perform reset and restart, and at the same time, under the control of the reset signal, the power reset circuit synchronously resets the power signal to ensure that the source driver chip can be reset and restarted when the static electricity is abnormal, and the source is improved.
  • the driver chip resets and restarts when the static electricity is abnormal.
  • the static abnormality status register included in the source driving chip may be a 0A register, or may be other types of registers, which is not limited herein.
  • the control unit is further configured to input a reset signal to the reset end of the source driving chip when the first characterization value is read. Specifically, the control unit synchronously outputs a reset signal to the source driving chip and the power reset circuit when the source driving chip is in an electrostatic abnormality, and controls the source driving chip to perform resetting. At the same time, in order to improve the reset failure of the source driver chip during the static abnormality, the power supply signal is synchronously reset by the power reset circuit under the control of the reset signal, thereby ensuring that the source driver chip can reset the function when the static electricity is abnormal, thereby improving the display device. Antistatic ability.
  • the power reset circuit and the control unit can be disposed on the flexible circuit board. Specifically, the power reset circuit and the control unit are disposed on the flexible circuit board, and then synchronously bound to the display panel.
  • the source driver chip and the power supply reset circuit are controlled by the reset signal to realize synchronous reset of the source driver chip and the power signal, thereby ensuring that the source driver chip can be reset and restarted when the static electricity is abnormal, and the source driver chip is improved.
  • the problem of reset restart failure when the static electricity is abnormal thereby improving the antistatic capability of the display device.
  • an embodiment of the present invention provides a power signal reset driving method for the above display device, which may include: when receiving a reset signal, the power reset circuit synchronously resets the power signal, and the power source after resetting The signal is input to the power signal input terminal of the source driver chip. Specifically, when a static abnormality occurs in the source driving chip, the power reset circuit is controlled by the control signal to realize synchronous reset of the power signal, and after resetting The power signal is input to the power signal input terminal of the source driver chip.
  • the power signal can be synchronously reset, and then the source driver chip can be initialized, and the source driver chip can be restarted to ensure that the source driver chip can be reset and restarted under the abnormality of the static electricity, thereby improving the electrostatic abnormality of the source driver chip.
  • the reset is restarted, the antistatic capability of the liquid crystal display module is enhanced.
  • the power signal reset driving method may further include: reading a characterization value characterizing the working state of the source driving chip every predetermined time interval; and inputting a reset signal to the control end of the power reset circuit after determining that the source driving chip has an electrostatic abnormality.
  • the characterization value indicating the working state of the source driving chip is read every preset time interval, thereby inputting a reset signal to the control end of the power reset circuit when the source driving chip is in an electrostatic abnormality.
  • the synchronous reset of the power signal is implemented to ensure that the source driver chip can be reset and restarted when the static electricity is abnormal.
  • reading the characterization value characterizing the working state of the source driving chip may include: when the source driving chip is in an electrostatic abnormality, reading the characterization source driving chip is abnormal A first characterization value of the operational state, and when the source driver chip is operating normally, reading a second characterization value characterizing the source driver chip to be in a normal operating state.
  • the working state of the source driving chip can be characterized by the status register, and the control unit reads the characterization value characterizing the working state of the source driving chip every preset time interval.
  • the source driving chip When the first characterization value indicating that the source driving chip is in an abnormal working state is read, it is determined that the source driving chip has an electrostatic abnormality, thereby outputting a reset signal to the control end of the power reset circuit.
  • the power reset circuit resets the power signal under the control of the reset signal, and inputs the reset power signal to the power signal input end of the source driver chip, thereby controlling the source driver chip to perform reset. In this way, when the source driver chip is in an electrostatic abnormality, the source driver chip can be reset and restarted, and the source driver chip can be reset and restarted when the static electricity is abnormal, thereby enhancing the antistatic capability of the liquid crystal display module.
  • inputting a reset signal to the control end of the power reset circuit may include: when the first characterization value is read, The control terminal of the power reset circuit inputs a reset signal; when the second characterization value is read, the reset signal is not input to the control terminal of the power reset circuit.
  • the control unit reads the characterization value outputted by the status register every preset time interval, and outputs a reset signal to the power reset circuit when the first characterization value is read when the static electricity abnormality occurs in the source driving chip, thereby controlling the power reset circuit.
  • Power signal Synchronous reset ensures that the source driver chip is reset and restarted.
  • the power signal reset driving method may further include: inputting a reset signal to the reset end of the source driving chip when the first characterization value is read.
  • the control unit synchronously outputs a reset signal to the source driving chip and the power reset circuit when the source driving chip is in an electrostatic abnormality, and controls the source driving chip to perform resetting.
  • the power supply signal is synchronously reset by the power reset circuit under the control of the reset signal, thereby ensuring that the source driver chip can be reset and restarted when the static electricity is abnormal, thereby improving the display device. Antistatic ability.
  • the characterization value of the status register is read every preset time interval. Taking the 0A register as an example, the characterization value of 09 indicates that the source driver chip is in a normal working state, and the characterization value is non-09 indicates that the source driver chip is in an abnormal working state. , that is, the source driver chip has an electrostatic abnormality;
  • the characterization value of the read status register is non-09, and the reset signal is output to the source driving chip and the power reset circuit; if the characterization value of the status register is 09, the output is not output to the source driving chip and the power reset circuit.
  • the embodiment of the present invention provides a display device and a driving method.
  • the display device includes: a power reset circuit and a source driving chip for driving the display panel for display; wherein the input end of the power reset circuit is connected to the power signal output end, The control end of the power reset circuit is connected to the reset signal end, and the output end of the power reset circuit is connected to the power signal input end of the source drive chip; the power reset circuit is used for synchronously resetting the power signal when receiving the reset signal, and after resetting The power signal is input to the power signal input terminal of the source driver chip.
  • the power supply signal is synchronously reset, and the reset power signal is input to the power signal input end of the source driving chip, thereby further initializing the source driving chip.
  • Re-drive the source driver chip to ensure that the source driver chip can be reset and restarted under the condition of static electricity abnormality, and improve the situation that the source driver chip resets and restarts when the static electricity is abnormal, thereby enhancing the antistatic capability of the liquid crystal display module.

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  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
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Abstract

一种显示装置及驱动方法，其中显示装置包括：电源复位电路（01）和用于驱动显示面板进行显示功能的源驱动芯片（02）；其中，电源复位电路（01）的输入端与电源信号输出端相连，控制端与复位信号端相连，输出端与源驱动芯片（02）的电源信号输入端相连；电源复位电路（01）用于在接收到复位信号时将电源信号同步复位，且将复位后的电源信号输入到源驱动芯片（02）的电源信号输入端。这样在显示装置中增加电源复位电路（01），在源驱动芯片（02）出现静电异常时，同步复位电源信号，且将复位后的电源信号输入到源驱动芯片（02）的电源信号输入端，进而可以保证源驱动芯片（02）静电异常情况下的复位重启，改善源驱动芯片（02）静电异常复位失效的情况，从而增强液晶显示模组的抗静电能力。

Description

一种显示装置及驱动方法 技术领域
本发明涉及显示技术领域，尤其涉及一种显示装置及驱动方法。
背景技术
当前，在液晶显示产品中，主板控制端有通用的防静电机制。一般地，主板控制单元每间隔一段时间会发送读取命令给液晶显示模组的源驱动芯片，从而读取源驱动芯片的静电状态寄存器的表征数值，即0A寄存器的状态数值，从而决定是否发送复位信号对源驱动芯片进行复位重启。
一般地，源驱动芯片在出现静电异常时，需要进行复位重启，其复位的流程如图1所示。以0A寄存器为例，该流程具体包括：S10、控制单元每间隔固定时间读取源驱动芯片的0A寄存器的状态值；S11、读取到表征源驱动芯片正常工作的09数值时，则不向源驱动芯片输入复位信号，源驱动芯片不进行复位；S12、读取到表征源驱动芯片非正常工作的数值时，即表征源驱动芯片出现静电异常的非09的数值时，则向源驱动芯片输入复位信号，控制源驱动芯片进行复位。然而，有时出现静电异常的源驱动芯片无法在复位信号的控制下完成复位重启，此时静电检测机制就会失效，从而影响了液晶显示模组的正常工作。
因此，如何保证源驱动芯片在复位信号的控制下完成复位重启，改善在静电异常时源驱动芯片复位重启失效的情况，从而增强液晶显示模组的抗静电能力，是本领域技术人员亟待解决的问题。
发明内容
本发明实施例提供了一种显示装置及驱动方法，用以保证源驱动芯片在复位信号的控制下完成复位重启，改善在静电异常时源驱动芯片复位重启失效的情况，从而增强液晶显示模组的抗静电能力。
本发明的一个方面提供了一种显示装置，包括：电源复位电路和用于驱动显示面板进行显示的源驱动芯片；其中，
所述电源复位电路的输入端与电源信号输出端相连，所述电源复 位电路的控制端与复位信号端相连，所述电源复位电路的输出端与所述源驱动芯片的电源信号输入端相连；
所述电源复位电路用于在接收到复位信号时将电源信号同步复位，且将复位后的电源信号输入到所述源驱动芯片的电源信号输入端。
在一个实施例中，所述电源复位电路包括：第一开关晶体管、第二开关晶体管、第一电阻和第二电阻；其中，
所述第一开关晶体管的栅极与所述复位信号输出端相连，所述第一开关晶体管的源极分别与所述第一电阻的一端和所述第二开关晶体管的栅极相连，所述第一开关晶体管的漏极与地电平信号端相连；
所述第一电阻的另一端分别与所述电源信号输出端和所述第二开关晶体管的源极相连；
所述第二开关晶体管的漏极分别与所述第二电阻的一端和所述源驱动芯片的电源信号输入端相连；
所述第二电阻的另一端与所述地电平信号端相连。
在一个实施例中，所述源驱动芯片包括：状态寄存器；其中，
所述状态寄存器用于在所述源驱动芯片出现静电异常时，输出表征所述源驱动芯片处于非正常工作状态的第一表征数值，并且在所述源驱动芯片正常工作时，输出表征所述源驱动芯片处于正常工作状态的第二表征数值。
在一个实施例中，显示装置还包括：控制单元；其中
所述控制单元用于每间隔预设时间读取所述状态寄存器的表征数值；
在读取到所述第一表征数值时，向所述电源复位电路的控制端输入复位信号，并且在读取到所述第二表征数值时，不向所述电源复位电路的控制端输入复位信号。
在一个实施例中，所述控制单元还用于在读取到所述第一表征数值时，向所述源驱动芯片的复位端输入复位信号。
在一个实施例中，所述电源复位电路和所述控制单元设置于柔性电路板上。
本发明的另一个方面提供了一种用于本发明实施例提供的上述显示装置的电源信号复位驱动方法，包括：
在接收到复位信号时，所述电源复位电路将电源信号同步复位， 且将复位后的电源信号输入到所述源驱动芯片的电源信号输入端。
在一个实施例中，所述电源信号复位驱动方法还包括：
每间隔预设时间读取表征所述源驱动芯片的工作状态的表征数值；
在确定所述源驱动芯片出现静电异常后，向所述电源复位电路的控制端输入复位信号。
在一个实施例中，在所述电源信号复位驱动方法中，读取表征所述源驱动芯片的工作状态的表征数值包括：
在所述源驱动芯片出现静电异常时，读取表征所述源驱动芯片处于非正常工作状态的第一表征数值，并且在所述源驱动芯片正常工作时，读取表征所述源驱动芯片处于正常工作状态的第二表征数值。
在一个实施例中，在所述电源信号复位驱动方法中，在确定所述源驱动芯片出现静电异常后，向所述电源复位电路的控制端输入复位信号，包括：
在读取到所述第一表征数值时，向所述电源复位电路的控制端输入复位信号；在读取到所述第二表征数值时，不向所述电源复位电路的控制端输入复位信号。
在一个实施例中，所述电源信号复位驱动方法还包括：在读取到所述第一表征数值时，向所述源驱动芯片的复位端输入复位信号。
本发明实施例提供了一种显示装置及驱动方法，该显示装置包括：电源复位电路和用于驱动显示面板进行显示的源驱动芯片；其中，电源复位电路的输入端与电源信号输出端相连，电源复位电路的控制端与复位信号端相连，电源复位电路的输出端与源驱动芯片的电源信号输入端相连；电源复位电路用于在接收到复位信号时将电源信号同步复位，且将复位后的电源信号输入到源驱动芯片的电源信号输入端。通过在显示装置中增加电源复位电路，在源驱动芯片出现静电异常时，可以同步复位电源信号，且将复位后的电源信号输入到源驱动芯片的电源信号输入端，进而可以对源驱动芯片进行初始化，重新驱动源驱动芯片，保证源驱动芯片在静电异常情况下能够复位重启，改善源驱动芯片在静电异常时复位重启失效的情况，从而增强液晶显示模组的抗静电能力。
附图说明
图1为现有技术中源驱动芯片在静电异常时的复位驱动方法流程图；
图2为本发明实施例提供的显示装置的结构示意图；
图3为本发明实施例提供的显示装置的具体结构示意图；
图4为本发明实施例提供的显示装置进行源驱动芯片和电源信号同步复位的驱动方法流程图。
具体实施方式
下面结合附图对本发明实施例提供的显示装置及驱动方法的具体实施方式进行详细的说明。
本发明实施例提供了一种显示装置，如图2所示。所述显示装置可以包括：电源复位电路01和用于驱动显示面板进行显示的源驱动芯片02。
电源复位电路01的输入端与电源信号输出端Vout相连，电源复位电路01的控制端与复位信号端Reset相连，电源复位电路01的输出端与源驱动芯片的电源信号输入端相连。
电源复位电路01用于在接收到复位信号时将电源信号同步复位，且将复位后的电源信号输入到源驱动芯片02的电源信号输入端。
本发明实施例提供的上述显示装置包括：电源复位电路01和用于驱动显示面板进行显示的源驱动芯片02；其中，电源复位电路01的输入端与电源信号输出端Vout相连，电源复位电路01的控制端与复位信号端Reset相连，电源复位电路01的输出端与源驱动芯片02的电源信号输入端相连；电源复位电路01用于在接收到复位信号时将电源信号同步复位，且将复位后的电源信号输入到源驱动芯片02的电源信号输入端。通过在显示装置中增加电源复位电路，在源驱动芯片出现静电异常时，可以同步复位电源信号，且将复位后的电源信号输入到源驱动芯片的电源信号输入端，进而可以对源驱动芯片进行初始化，重新驱动源驱动芯片，保证源驱动芯片在静电异常情况下能够复位重启，改善源驱动芯片在静电异常时复位重启失效的情况，从而增强液晶显示模组的抗静电能力。
如图3所示，电源复位电路01可以包括：第一开关晶体管T1、第 二开关晶体管T2、第一电阻R1和第二电阻R2。第一开关晶体管T1的栅极与复位信号输出端Reset相连，第一开关晶体管T1的源极分别与第一电阻R1的一端和第二开关晶体管T2的栅极相连，第一开关晶体管T1的漏极与地电平信号端GND相连。第一电阻R1的另一端分别与电源信号输出端Vout和第二开关晶体管T2的源极相连。第二开关晶体管T2的漏极分别与第二电阻R2的一端和源驱动芯片02的电源信号输入端相连。第二电阻R2的另一端与地电平信号端GND相连。
当显示装置正常工作时，复位信号端Reset输出高电平，电源信号输出端Vout输出高电平信号，此时第一开关晶体管T1导通。导通的第一开关晶体管T1将第二开关晶体管T2的栅极与地电平信号端GND导通，因此第二开关晶体管T2的栅极为低电平信号。第二开关晶体管T2为P型晶体管，因此第二开关晶体管T2导通。导通的第二开关晶体管T2将电源信号输出端Vout输出的高电平信号传输到源驱动芯片02的电源信号输入端，源驱动芯片可以正常工作。当复位信号端Reset信号输出低电平信号时，第一开关晶体管T1截止，第二开关晶体管T2的栅极为高电平信号，第二开关晶体管T2也截止。此时，输入到源驱动芯片的电源信号输入端的信号为低电平信号，因此源驱动芯片进行复位。在源驱动芯片完成复位后，复位信号端Reset恢复输出高电平信号，输入到源驱动芯片的电源信号输入端的信号恢复为高电平信号，这样就完成了通过复位信号端Reset的信号将电源信号复位的动作，进而在源驱动芯片出现静电异常时，可以实现对电源信号的同步复位，保证源驱动芯片在静电异常时能够复位重启。
需要说明的是本发明上述实施例中提到的开关晶体管可以是薄膜晶体管(TFT，Thin Film Transistor)，也可以是金属氧化物半导体场效应管(MOS，Metal Oxide Scmiconductor)，在此不做限定。在具体实施中，这些晶体管的源极和漏极可以互换，不做具体区分。在描述具体实施例时以薄膜晶体管为例进行说明。
源驱动芯片可以包括状态寄存器。状态寄存器用于在源驱动芯片出现静电异常时，输出表征源驱动芯片处于非正常工作状态的第一表征数值，并且在所述源驱动芯片正常工作时，输出表征源驱动芯片处于正常工作状态的第二表征数值。具体地，可以通过状态寄存器表征源驱动芯片的工作状态。以0A寄存器为例，在源驱动芯片出现静电异 常时，0A寄存器可以输出表征源驱动芯片出现静电异常的表征数值09，从而方便显示装置的控制单元读取源驱动芯片的工作状态。在源驱动芯片出现静电异常时，输出复位信号控制源驱动芯片进行复位重启，同时在复位信号的控制下电源复位电路将电源信号同步复位，保证源驱动芯片在静电异常时能够复位重启，改善源驱动芯片在静电异常时复位重启失效的问题。另外源驱动芯片包括的静电异常状态寄存器可以为0A寄存器，也可以为其他类型的寄存器，在此不作限定。
所述显示装置还可以包括控制单元，控制单元用于每间隔预设时间读取状态寄存器的表征数值。在读取到第一表征数值时，向电源复位电路的控制端输入复位信号，并且在读取到第二表征数值时，不向电源复位电路的控制端输入复位信号。具体地，控制单元每间隔预设时间读取状态寄存器输出的表征数值，在确定源驱动芯片出现静电异常时输出复位信号到电源复位电路，从而对电源信号进行同步复位，保证源驱动芯片在静电异常时能够复位重启。
控制单元还用于在读取到第一表征数值时，向源驱动芯片的复位端输入复位信号。具体地，控制单元在源驱动芯片出现静电异常时同步输出复位信号到源驱动芯片和电源复位电路，控制源驱动芯片进行复位。同时为了改善源驱动芯片在静电异常时复位重启失效的情况，在复位信号的控制下通过电源复位电路将电源信号同步复位，进而保证源驱动芯片在静电异常时能够复位功能，从而提高显示装置的抗静电能力。
电源复位电路和控制单元可以设置于柔性电路板上。具体地，将电源复位电路和控制单元设置于柔性电路板上，进而与显示面板同步绑定。在源驱动芯片出现静电异常时，通过复位信号控制源驱动芯片和电源复位电路，实现源驱动芯片和电源信号的同步复位，从而保证源驱动芯片在静电异常时能够复位重启，改善源驱动芯片在静电异常时复位重启失效的问题，从而提高显示装置的抗静电能力。
基于同一发明构思，本发明实施例提供了一种用于上述显示装置的电源信号复位驱动方法，可以包括：在接收到复位信号时，电源复位电路将电源信号同步复位，且将复位后的电源信号输入到源驱动芯片的电源信号输入端。具体地，在源驱动芯片出现静电异常时，通过控制信号控制电源复位电路，实现电源信号的同步复位，且将复位后 的电源信号输入到源驱动芯片的电源信号输入端。这样在源驱动芯片进行复位时，可以将电源信号同步复位，进而可以对源驱动芯片进行初始化，重启源驱动芯片，保证源驱动芯片在静电异常情况下能够复位重启，改善源驱动芯片在静电异常时复位重启失效的情况，从而增强液晶显示模组的抗静电能力。
电源信号复位驱动方法还可以包括：每间隔预设时间读取表征源驱动芯片的工作状态的表征数值；在确定源驱动芯片出现静电异常后，向电源复位电路的控制端输入复位信号。具体地，在所述电源信号复位驱动方法中，每间隔预设时间读取表征源驱动芯片的工作状态的表征数值，从而在源驱动芯片出现静电异常时向电源复位电路的控制端输入复位信号，实现电源信号的同步复位，保证源驱动芯片在静电异常时能够复位重启。
在具体实施时，在所述电源信号复位驱动方法中，读取表征所述源驱动芯片的工作状态的表征数值可以包括：在源驱动芯片出现静电异常时，读取表征源驱动芯片处于非正常工作状态的第一表征数值，并且在所述源驱动芯片正常工作时，读取表征源驱动芯片处于正常工作状态的第二表征数值。具体地，通过状态寄存器可以表征源驱动芯片的工作状态，控制单元每间隔预设时间读取表征源驱动芯片的工作状态的表征数值。在读取到表征源驱动芯片处于非正常工作状态的第一表征数值时，确定源驱动芯片出现静电异常，从而输出复位信号到电源复位电路的控制端。电源复位电路在复位信号的控制下将电源信号复位，且将复位后的电源信号输入到源驱动芯片的电源信号输入端，进而控制源驱动芯片进行复位。这样在源驱动芯片出现静电异常时，保证源驱动芯片能够复位重启，改善源驱动芯片在静电异常时复位重启失效的情况，从而增强液晶显示模组的抗静电能力。
在具体实施时，在所述电源信号复位驱动方法中，在确定源驱动芯片出现静电异常后，向电源复位电路的控制端输入复位信号，可以包括：在读取到第一表征数值时，向电源复位电路的控制端输入复位信号；在读取到第二表征数值时，不向电源复位电路的控制端输入复位信号。具体地，控制单元每间隔预设时间读取状态寄存器输出的表征数值，在源驱动芯片出现静电异常时，即读取到第一表征数值时输出复位信号到电源复位电路，从而控制电源复位电路对电源信号进行 同步复位，保证源驱动芯片复位重启。
在具体实施时，电源信号复位驱动方法还可以包括：在读取到第一表征数值时，向源驱动芯片的复位端输入复位信号。具体地，控制单元在源驱动芯片出现静电异常时同步输出复位信号到源驱动芯片和电源复位电路，控制源驱动芯片进行复位。同时为了改善源驱动芯片在静电异常时复位重启失效的情况，在复位信号的控制下通过电源复位电路将电源信号同步复位，进而保证源驱动芯片在静电异常时能够复位重启，从而提高显示装置的抗静电能力。
下面以一个具体的实施例详细说明本发明实施例提供的显示装置进行源驱动芯片与电源信号同步复位的具体过程，具体流程如图4所示：
S101、每间隔预设时间读取状态寄存器的表征数值，以0A寄存器为例，表征数值为09则表示源驱动芯片处于正常工作状态，表征数值为非09则表示源驱动芯片处于非正常工作状态，即源驱动芯片出现静电异常；
S102、读取到状态寄存器的表征数值为非09，则向源驱动芯片和电源复位电路输出复位信号；读取到状态寄存器的表征数值为09，则不向源驱动芯片和电源复位电路输出输出复位信号；
S103、源驱动芯片和电源复位电路接收到复位信号时，进行源驱动芯片与电源信号的同步复位。
本发明实施例提供了一种显示装置及驱动方法，该显示装置包括：电源复位电路和用于驱动显示面板进行显示的源驱动芯片；其中，电源复位电路的输入端与电源信号输出端相连，电源复位电路的控制端与复位信号端相连，电源复位电路的输出端与源驱动芯片的电源信号输入端相连；电源复位电路用于在接收到复位信号时将电源信号同步复位，且将复位后的电源信号输入到源驱动芯片的电源信号输入端。通过在显示装置中增加电源复位电路，在源驱动芯片出现静电异常时，同步复位电源信号，且将复位后的电源信号输入到源驱动芯片的电源信号输入端，进而可以对源驱动芯片进行初始化，重新驱动源驱动芯片，保证源驱动芯片在静电异常情况下能够复位重启，改善源驱动芯片在静电异常时复位重启失效的情况，从而增强液晶显示模组的抗静电能力。
显然，本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样，倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内，则本发明也意图包含这些改动和变型在内。

Claims (11)

  1. 一种显示装置，其特征在于，包括：电源复位电路和用于驱动显示面板进行显示的源驱动芯片；其中，
    所述电源复位电路的输入端与电源信号输出端相连，所述电源复位电路的控制端与复位信号端相连，所述电源复位电路的输出端与所述源驱动芯片的电源信号输入端相连；
    所述电源复位电路用于在接收到复位信号时将电源信号同步复位，且将复位后的电源信号输入到所述源驱动芯片的电源信号输入端。
  2. 如权利要求1所述的显示装置，其特征在于，所述电源复位电路包括：第一开关晶体管、第二开关晶体管、第一电阻和第二电阻；其中，
    所述第一开关晶体管的栅极与所述复位信号输出端相连，所述第一开关晶体管的源极分别与所述第一电阻的一端和所述第二开关晶体管的栅极相连，所述第一开关晶体管的漏极与地电平信号端相连；
    所述第一电阻的另一端分别与所述电源信号输出端和所述第二开关晶体管的源极相连；
    所述第二开关晶体管的漏极分别与所述第二电阻的一端和所述源驱动芯片的电源信号输入端相连；
    所述第二电阻的另一端与所述地电平信号端相连。
  3. 如权利要求2所述的显示装置，其特征在于，所述源驱动芯片包括：状态寄存器；其中，
    所述状态寄存器用于在所述源驱动芯片出现静电异常时，输出表征所述源驱动芯片处于非正常工作状态的第一表征数值，并且在所述源驱动芯片正常工作时，输出表征所述源驱动芯片处于正常工作状态的第二表征数值。
  4. 如权利要求3所述的显示装置，其特征在于，还包括：控制单元；其中
    所述控制单元用于每间隔预设时间读取所述状态寄存器的表征数值；
    在读取到所述第一表征数值时，向所述电源复位电路的控制端输入复位信号，在读取到所述第二表征数值时，不向所述电源复位电路 的控制端输入复位信号。
  5. 如权利要求4所述的显示装置，其特征在于，所述控制单元还用于在读取到所述第一表征数值时，向所述源驱动芯片的复位端输入复位信号。
  6. 如权利要求5所述的显示装置，其特征在于，所述电源复位电路和所述控制单元设置于柔性电路板上。
  7. 一种用于如权利要求1-6中任一项所述的显示装置的电源信号复位驱动方法，其特征在于，包括：
    在接收到复位信号时，所述电源复位电路将电源信号同步复位，且将复位后的电源信号输入到所述源驱动芯片的电源信号输入端。
  8. 如权利要求7所述的方法，其特征在于，还包括：
    每间隔预设时间读取表征所述源驱动芯片的工作状态的表征数值；
    在确定所述源驱动芯片出现静电异常后，向所述电源复位电路的控制端输入复位信号。
  9. 如权利要求8所述的方法，其特征在于，读取表征所述源驱动芯片的工作状态的表征数值包括：
    在所述源驱动芯片出现静电异常时，读取表征所述源驱动芯片处于非正常工作状态的第一表征数值，并且在所述源驱动芯片正常工作时，读取表征所述源驱动芯片处于正常工作状态的第二表征数值。
  10. 如权利要求9所述的方法，其特征在于，在确定所述源驱动芯片出现静电异常后，向所述电源复位电路的控制端输入复位信号包括：
    在读取到所述第一表征数值时，向所述电源复位电路的控制端输入复位信号；在读取到所述第二表征数值时，不向所述电源复位电路的控制端输入复位信号。
  11. 如权利要求10所述的方法，其特征在于，还包括：在读取到所述第一表征数值时，向所述源驱动芯片的复位端输入复位信号。
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Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105185330B (zh) * 2015-09-02 2018-02-16 京东方科技集团股份有限公司 一种显示装置及驱动方法
CN105761661B (zh) * 2016-05-20 2019-03-05 上海中航光电子有限公司 显示器件及其重启方法、显示面板
CN108364605A (zh) * 2017-01-26 2018-08-03 上海和辉光电有限公司 自动恢复oled显示面板显示状态的***及移动终端
CN108364597B (zh) * 2018-02-23 2021-03-09 京东方科技集团股份有限公司 阵列基板及其显示异常的确定方法、显示面板和显示装置
CN109192152B (zh) * 2018-08-29 2021-01-01 努比亚技术有限公司 一种lcd控制电路及终端
CN110164392A (zh) * 2019-04-28 2019-08-23 珠海黑石电气自动化科技有限公司 一种抗静电干扰的液晶驱动方法、电路、装置及存储介质
CN110459188A (zh) * 2019-08-16 2019-11-15 四川长虹电器股份有限公司 液晶电视tcon时序控制信号的处理方法
CN110718177A (zh) * 2019-11-15 2020-01-21 Tcl华星光电技术有限公司 显示装置的画面恢复方法及显示装置
CN111105743B (zh) * 2019-12-23 2022-10-04 Tcl华星光电技术有限公司 显示面板的控制电路及控制方法、显示装置
CN111462692B (zh) * 2020-05-15 2022-03-01 京东方科技集团股份有限公司 一种驱动电路及其重启方法、显示装置
CN111613161A (zh) * 2020-05-19 2020-09-01 深圳Tcl数字技术有限公司 显示数据的传输方法、显示装置及存储介质

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003107507A (ja) * 2001-07-27 2003-04-09 Casio Comput Co Ltd 液晶表示素子及びその製造方法
CN1542527A (zh) * 2003-04-29 2004-11-03 明基电通股份有限公司 电子装置及其抗静电放电方法
CN101191927A (zh) * 2006-11-28 2008-06-04 Lg.菲利浦Lcd株式会社 液晶显示装置和驱动液晶显示装置的方法
CN203225069U (zh) * 2012-11-28 2013-10-02 比亚迪股份有限公司 一种液晶显示模组
CN103745705A (zh) * 2013-12-31 2014-04-23 广东明创软件科技有限公司 移动终端显示屏静电复位方法及此种移动终端
CN103929161A (zh) * 2013-12-31 2014-07-16 厦门天马微电子有限公司 一种驱动ic的复位控制***、显示模组及显示装置
CN105185330A (zh) * 2015-09-02 2015-12-23 京东方科技集团股份有限公司 一种显示装置及驱动方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8253721B2 (en) * 2006-11-28 2012-08-28 Lg Display Co., Ltd. Liquid crystal display device including source voltage generator and method of driving liquid crystal display device
US8364989B2 (en) * 2007-09-26 2013-01-29 Infineon Technologies Ag Power supply input selection circuit
CN102377445A (zh) * 2010-08-10 2012-03-14 希姆通信息技术（上海）有限公司 无线通讯模块及其自恢复方法
CN102811040A (zh) * 2011-05-31 2012-12-05 鸿富锦精密工业（深圳）有限公司 电源复位电路
TWI482361B (zh) 2012-01-18 2015-04-21 Cirocomm Technology Corp 平板天線的自動檢測修正調整方法及其系統
CN102693704A (zh) * 2012-05-04 2012-09-26 广东欧珀移动通信有限公司 一种解决显示屏静电显示异常的实现方法
KR102009885B1 (ko) 2012-10-30 2019-08-12 엘지디스플레이 주식회사 표시장치 및 이의 구동방법

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003107507A (ja) * 2001-07-27 2003-04-09 Casio Comput Co Ltd 液晶表示素子及びその製造方法
CN1542527A (zh) * 2003-04-29 2004-11-03 明基电通股份有限公司 电子装置及其抗静电放电方法
CN101191927A (zh) * 2006-11-28 2008-06-04 Lg.菲利浦Lcd株式会社 液晶显示装置和驱动液晶显示装置的方法
CN203225069U (zh) * 2012-11-28 2013-10-02 比亚迪股份有限公司 一种液晶显示模组
CN103745705A (zh) * 2013-12-31 2014-04-23 广东明创软件科技有限公司 移动终端显示屏静电复位方法及此种移动终端
CN103929161A (zh) * 2013-12-31 2014-07-16 厦门天马微电子有限公司 一种驱动ic的复位控制***、显示模组及显示装置
CN105185330A (zh) * 2015-09-02 2015-12-23 京东方科技集团股份有限公司 一种显示装置及驱动方法

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