WO2016180273A1 - Special-shaped semiconductor wafer, manufacturing method and wafer carrier - Google Patents

Special-shaped semiconductor wafer, manufacturing method and wafer carrier Download PDF

Info

Publication number
WO2016180273A1
WO2016180273A1 PCT/CN2016/081199 CN2016081199W WO2016180273A1 WO 2016180273 A1 WO2016180273 A1 WO 2016180273A1 CN 2016081199 W CN2016081199 W CN 2016081199W WO 2016180273 A1 WO2016180273 A1 WO 2016180273A1
Authority
WO
WIPO (PCT)
Prior art keywords
wafer
inner cavity
polishing
support pad
semiconductor wafer
Prior art date
Application number
PCT/CN2016/081199
Other languages
French (fr)
Chinese (zh)
Inventor
王元立
刘文森
刘继斌
古燕
刘英伟
Original Assignee
北京通美晶体技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 北京通美晶体技术有限公司 filed Critical 北京通美晶体技术有限公司
Publication of WO2016180273A1 publication Critical patent/WO2016180273A1/en

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers
    • H01L21/02005Preparing bulk and homogeneous wafers
    • H01L21/02008Multistep processes
    • H01L21/0201Specific process step
    • H01L21/02013Grinding, lapping
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping

Definitions

  • the present invention relates to a semiconductor wafer, a method of fabricating the same, and a wafer support pad, and more particularly to a shaped semiconductor wafer, a method of fabricating the same, and a wafer support pad.
  • Semiconductor wafers have received increasing attention due to their applications in electronics, communications, and energy.
  • the use of a semiconductor wafer as a substrate material for a solar cell is an important application direction.
  • the substrate material of the solar cell is mostly a circular substrate.
  • the battery is cut into a square shape to process the module, which causes the battery material near the edge of the circular semiconductor wafer. Waste.
  • the development of a square substrate can save the cost of semiconductor wafer epitaxy and battery fabrication, and can facilitate the processing of subsequent battery modules.
  • the wafer needs to be ground and polished during the manufacturing process.
  • the wafer is placed in a hole-shaped inner cavity in a wafer support carrier (also called a star wheel), which is carried out in a grinding or polishing apparatus.
  • a wafer support carrier also called a star wheel
  • Processing wherein the support pad is placed on the polishing pad of the lower disk of the polishing and polishing apparatus, the wafer is placed in the inner cavity of the support pad, the lower surface of the wafer is in contact with the polishing pad, and the polishing pad of the disk on the polishing and polishing device presses the upper surface of the wafer,
  • the wafer is revolved and rotated under the driving of the polishing equipment to achieve grinding and polishing.
  • the processing of the shaped semiconductor wafer is much more difficult than with a circular semiconductor wafer, for example, if the square semiconductor wafer is placed in a wafer support pad in a conventional wafer polishing and polishing apparatus having a circular inner cavity.
  • the rectangular wafer needs to adopt a large transition arc at a right angle, which causes waste of the effective area of the wafer; at the same time, it is not easy to control the wafer in the inner cavity of the circular support pad during the operation, on the contrary, the wafer It is easy to "escape" from the inner cavity of the circular support pad, resulting in the breakage of the wafer. If the support pad of the square inner cavity is directly used, the corners of the wafer are concentrated under the operation, and the wafer is also easily broken.
  • the square silicon wafer currently used for preparing the solar cell is formed by cutting the ingot, and is not subjected to chamfering and surface grinding, chemical mechanical polishing, etc., resulting in a rough surface of such a silicon wafer, which is difficult to achieve flatness and roughness. Requirements.
  • the present invention provides a method of preparing a flat shaped semiconductor wafer, the method comprising the steps of:
  • the polished wafer is surface cleaned.
  • the present invention provides a profiled semiconductor wafer having a surface microroughness Ra (tested by atomic force microscopy (AFM), hereinafter the same as in the examples) of not more than 0.5 nm, preferably not more than 0.4 nm.
  • the flatness thereof is not more than 5 ⁇ m in terms of bending (the same applies hereinafter, see the examples).
  • the ratio of the length of the overall flatness/wafer diagonal is 0.025-0.075 ⁇ m/mm, preferably 0.03-0.065 ⁇ m. /mm.
  • the wafer has a diagonal length of 1.5-15 cm.
  • the present invention also provides a support pad for processing a wafer, the support pad having at least one shaped inner cavity, the inner cavity having a plurality of straight sides, each of the straight edge extension lines intersecting to form a profiled shape, The cavity further has a convex portion at each corner formed by the intersection of the straight edge extension lines, and each of the convex portions is connected to the adjacent straight sides by a transition arc.
  • the support pad has a thickness T of from 200 to 800 micrometers, preferably from 260 to 650 micrometers, more preferably from 270 to 500 micrometers.
  • the Shore hardness of the support pad (tested by Shanghai Wanheng Precision Instrument Co., Ltd. HS-19A Shore hardness tester, the same below) is 35-60, preferably 40-55; dynamic compressibility (measured according to JIS K6505) , the same below) is 60-100%, preferably 70-95%.
  • the present invention also provides the use of the shaped semiconductor wafer of the present invention in a solar cell.
  • the method of the invention for preparing a shaped semiconductor wafer reduces or avoids the risk of wafer breakage during processing and improves the yield of the wafer.
  • the profiled semiconductor wafers produced by the method of the present invention also have good wafer flatness and roughness and are suitable for epitaxial growth.
  • Figure 1 is a schematic view of the wafer chamfer of the method of the present invention, wherein the chamfer of Figure 1a is arcuate and the chamfer of Figure 1b is sloped.
  • FIG. 2 is a schematic view of a wafer edger.
  • Figure 3 is an illustration of an apparatus for carrying out the grinding or polishing method of the present invention.
  • Figure 4 is a schematic view of the support pad of the present invention, wherein there is a lumen having a transition arc at the corner of the lumen.
  • Fig. 5 is a schematic view showing a transition arc of a corner portion in the inner cavity of the support pad of the present invention.
  • Figure 6 is a schematic view of a corner transition arc of a wafer of the present invention.
  • the irregular shape refers to a shape that is non-circular and each side is a straight side, such as a rectangle, a square, a diamond, or other polygons.
  • the support pad having a shaped inner cavity refers to a pad for carrying a wafer in the grinding, polishing and related steps of the wafer, wherein the cavity or hole penetrating the pad is referred to as a cavity.
  • the shape of the inner cavity varies with the shape of the wafer being processed.
  • the transition arc means a portion which is cut into an arc shape at a position where the inner cavity of the support pad or the wafer itself has an angle.
  • the method of the present invention for preparing a shaped semiconductor wafer comprises the following steps:
  • the polished wafer is surface cleaned.
  • the wafer material in the step (1) is a silicon crystal, a germanium crystal, a IIIA-VA semiconductor crystal (ie, a semiconductor crystal formed of a group IIIA and a group VA element, such as gallium arsenide crystal, phosphorus Indium crystal or gallium phosphide crystal), silicon carbide crystals, and sapphire crystals (mainly alumina).
  • the wafer in the step (1) is a single crystal, preferably a germanium single crystal, an indium phosphide single crystal or a gallium arsenide single crystal.
  • step (1) is carried out as follows:
  • the circular wafer is cleaved or cut into shaped wafers.
  • the plurality of wafers are processed together into a profiled wafer.
  • a plurality of wafers can be bonded together using an adhesive, and then the bonded wafers are cut into shaped wafers. For example, cutting is performed using an internal circular saw.
  • the binder may be selected from one of the following: natural and synthetic polymers, such as cellulosic materials (such as carboxymethylcellulose), gum arabic, polyvinyl alcohol, polyvinyl acetate, natural phospholipids (such as cephalin).
  • the removal of the binder may use any conventional method known in the art for removing the binder, including physical methods and chemical methods, etc., for example, heating may be used, or water or an organic solvent such as IPA may be used.
  • the binder is removed by propanol, alcohol or wax, etc., so as not to adversely affect the wafer.
  • the binder is a water soluble binder.
  • the step (1) can be carried out, for example, by cutting a circular ingot into a sheet having a certain thickness by using a multi-line cutter; performing edge chamfering on the circular wafer by using a chamfering machine; and cleaving the wafer into four by cleavage
  • step (1) is carried out as follows:
  • the obtained shaped ingot is cut into a shaped wafer of a desired thickness.
  • the above process can be carried out, for example, by cutting a circular ingot with a diameter of 2-15 cm into a shaped rod of a certain size by using an internal circular saw, and cutting it by an X-ray diffractometer during cutting.
  • the crystal orientation of the straight side, the precision of the crystal orientation is controlled within ⁇ 5°, preferably within ⁇ 3°, more preferably within ⁇ 1°, and the straight sides are sequentially cut out to obtain the desired shaped ingot;
  • One end face of the shaped rod is used to determine the surface crystal orientation of the desired shaped wafer by an X-ray diffractometer; the obtained shaped ingot is cut into a profiled wafer having a thickness of 270-800 ⁇ m at a time by a multi-wire cutter.
  • the profiled ingot is fixed on the cutter table to a side to maintain the level before cutting.
  • the shaped wafer obtained in step (1) is square (square or rectangular).
  • the crystal orientation of each straight side may be all ⁇ 100> or all ⁇ 110>.
  • the ingots used are either commercially available or prepared by methods known in the art.
  • it may be a silicon ingot, a twin rod, a IIIA-VA semiconductor ingot, a silicon carbide ingot, a sapphire ingot, or the like.
  • the transverse cross section of the circular ingot typically has a diameter of from 2 to 15 cm, preferably from 5 to 12 cm.
  • the cutting is typically carried out using an outer circular cutter, an inner circular cutter or a multi-wire cutter known in the art. Since the multi-wire cutting machine has good production efficiency and filming rate, a multi-wire cutting machine is preferred.
  • the cut wafer thickness is from 270 to 800 microns, preferably from 300 to 750 microns, more preferably from 320 to 700 microns.
  • the step (1') is further performed: performing edge chamfering on the wafer obtained in the step (1) (as shown in FIGS. 1a and 1b) to obtain a suitable circle at the edge of the wafer.
  • Arc Fig. 1a
  • slope Fig. 1b, where ⁇ is preferably 45 ⁇ 10°
  • Figures 1a and 1b are cross-sectional illustrations of the wafer before and after chamfering.
  • the cross-section of the edge of the wafer has an arcuate edge (Fig. 1a) whereby the risk of breakage of the semiconductor wafer in subsequent steps can be reduced or avoided.
  • the chamfering process is typically performed using a chamfering machine, and any prior art chamfering machine can be used for this step.
  • Step (2) is a edging process on the wafer.
  • the edging process can be performed using a polygonal wafer edger.
  • the polygonal wafer grinding machine can adopt the wafer grinding machine of the Chinese Utility Model No. 201020567085.9.
  • the polygonal wafer grinding machine 1 is as shown in FIG. 2 and includes:
  • the working suction cup 2 is configured to receive the original piece of the polygonal wafer to be edged by vacuuming, and the working suction cup 2 is rotatable about its axis, and the working suction cup 2 is preferably evacuated by suction hole adsorption or suction groove adsorption.
  • the suction hole or the suction groove is uniformly and symmetrically distributed on the working suction cup, so that the polygonal wafer blank is uniformly adsorbed and fixed on the working suction cup;
  • the working chuck is a corresponding polygon, which in the exemplary embodiment is square or rectangular;
  • the mold 6 is made according to the desired edge shape of the finished polygon wafer and used as a female mold, disposed under the working suction cup 2, coaxially disposed with the working suction cup 2, and fixed with respect to the working suction cup 2;
  • Two positioning baffles 3 (one shown, one at right angles to the one shown) for passing the wafer blanks before the start of the grinding operation or during the grinding operation, so that they are in the working suction cup 2 accurate positioning;
  • the wheel 5 is disposed below the grinding wheel 4 and disposed coaxially with the grinding wheel 4. During the grinding process, the wheel 5 is placed on the master 6 so that the grinding wheel 4 is ground according to the shape of the master 6. Wafer;
  • the adjusting mechanism ensures that the wheel 5 and the master 6 are at the same level by adjusting the relative position between the wheel 5 and the master 6, thereby preventing straight edges from being straight and chamfered during the grinding of the wafer.
  • the upper and lower widths are inconsistent.
  • the working suction cup and the master which are coaxially arranged can be relatively moved between the grinding wheel and the wheel disposed coaxially.
  • the original wafer of the shaped wafer is placed on the corresponding shaped working chuck 2.
  • the vacuuming device is turned on to adsorb and fix the original wafer on the working chuck 2.
  • the two positioning flaps 3 can be withdrawn.
  • the coaxially disposed grinding wheel 4 and the wheel 5 are moved to move in the direction of the original wafer, while the grinding wheel cooling water is opened.
  • the working suction cup 2 starts to rotate, and the wheel 5 disposed under the grinding wheel 4 is placed on the master 6, so that the grinding wheel 4 will grind the original wafer according to the shape of the master 6.
  • the working chuck 2 is further rotated by more than about 5% to about 10% of the original wafer was further ground and then transferred back to the original starting point to prevent the interface from appearing in the original wafer of the ground shaped wafer.
  • the working suction cup 2 stops rotating, the grinding wheel 4 retreats, and the two positioning flaps 3 advance.
  • the vacuum was cut off, and the original wafer of the shaped wafer after the edging was completed.
  • Performing the edging process removes the machining allowance and sharp edges of the outer edge to obtain the desired edge shape.
  • the original piece of the wafer is also optionally subjected to corner processing to produce a transition arc at the corner.
  • corner processing As shown in A of Fig. 6, the corners of the wafer are processed to have transitional arcs.
  • Step (3) is a surface grinding process of the edging processed wafer, wherein the wafer is placed in a cavity of a support pad (for example, as shown in FIG. 4-6, wherein the corner of the wafer is as shown in FIG. (preferably having a transition arc A) corresponding to the corner positioning of the support pad, the straight edge B of the support pad forming an angle with the adjacent straight edge extension line).
  • the inner cavity of the support pad has a plurality of straight sides, and the straight edge extension lines intersect to form a profiled shape, and the inner cavity further has a convex portion at each corner formed by the intersection of the straight edge extension lines, and each of the outer convex portions and the adjacent each The straight sides are connected by a transition arc whose shape matches the shape of the inner cavity.
  • the thickness T of the support pad is smaller than the thickness of the wafer after polishing and polishing. More preferably, T satisfies the following relationship (the thickness T of the support pad and the thickness of the wafer are in micrometers): 50% of the thickness of the wafer to be processed ⁇ T ⁇ 80% of the thickness of the wafer to be processed, further preferably, 60% of the thickness of the wafer to be processed ⁇ T ⁇ 70% of the thickness of the wafer to be processed.
  • the present invention also provides a support pad for wafer processing, the support pad having at least one shaped inner cavity having a plurality of straight sides, each straight edge extension line intersecting to form a profiled shape, the inner cavity being Each of the corner portions formed by the intersection of the straight edge extension lines further has a convex portion, and each of the outer convex portions is connected to the adjacent straight sides by a transition arc.
  • the support pad has a thickness T of from 200 to 800 micrometers, preferably from 260 to 650 micrometers, more preferably from 270 to 500 micrometers.
  • Figure 4 illustrates one such support pad including four lumens. It can be appreciated that the number of lumens can vary.
  • FIG. 1 illustrates one such support pad including four lumens. It can be appreciated that the number of lumens can vary.
  • FIG. 4 exemplifies a square inner cavity
  • other shapes such as diamonds or other polygons
  • the straight edge extension lines intersect to form an alien shape
  • the inner cavity is straight.
  • Each of the corner portions formed by the intersection of the extension lines further has a convex portion, and each of the convex portions is connected to the adjacent straight sides by a transition arc.
  • Figure 5 shows, in an enlarged manner, the shape at the corner of the lumen.
  • the maximum linear distance (usually the diagonal) between the respective corners formed by the intersection of the straight edge extensions in the lumen is typically 2-15 cm, preferably 5-12 cm.
  • the support pad for wafer processing of the present invention can be made of metal or polymer material, for example, made of rubber or plastic, for example, made of glass fiber reinforced epoxy material, and its Shore hardness (using Shanghai Wan Heng Precision Instrument Co., Ltd. HS-19A type Shore hardness tester, the same as below) is 35-60, preferably 40-55; dynamic compressibility (measured according to JIS K6505, the same below) is 60-100%, It is preferably 70-95%.
  • Step (3) can be carried out in a known grinding apparatus (for example, an apparatus similar to that of Fig. 3, in which R1 and R2 respectively represent the axes of the upper and lower discs 12, 13, and arrows indicate the direction of rotation), and the upper and lower sides of the wafer are ground.
  • Pads 14, 16 usually polyester-based polishing pads
  • the polishing process uses a polishing liquid (a known polishing liquid can be used to pass through the slurry tube 11).
  • the pressure applied to the wafer during the grinding is 0.03 - 0.18 kg / cm 2 , preferably 0.05 - 0.15 kg / cm 2 .
  • the upper plate has a rotational speed of 2-12 rpm, preferably 3-5 rpm; the lower plate has a rotational speed of 5-20 rpm, preferably 9-15 rpm.
  • the amount of the slurry is 60-120 ml/m 2 of the disc area/min (on a single side of the equipment tray).
  • the milling time is 20-50 minutes, preferably 25-40 minutes.
  • the scratch damage on the surface of the wafer in the slicing process can be eliminated, and sufficient wafer flatness can be obtained to prepare for the subsequent polishing process.
  • the wafer is subjected to a double side grinding process to eliminate the scratch damage caused by the slicing process.
  • Step (4) is polishing the wafer in the profiled support pad.
  • step (3) and step (4) employ the same shaped support pad.
  • the diagonal of the inner cavity of the support pad coincides with the radius of the grinding and polishing apparatus, or the inner cavity At least one straight edge coincides with the radius of the wheel.
  • the coarse polishing solution used in addition to water, includes dichloroisocyanurate, sulfonate. , pyrophosphate, bicarbonate and silica sol.
  • the components of the rough polishing solution other than water are based on their weight percentage (based on the total amount of components other than water), including dichloroisocyanurate 8.0.
  • the total content of each component is 100%.
  • the total weight percentage of each of the above components after being dissolved in water is limited to not adversely affect the wafer, and may be any concentration, but is preferably not higher than 6.0%.
  • commercially available polishing abrasives can be used in a known conventional manner, such as Fujimi INSEC SP polishing abrasives from Fujimi Corporation of Japan or INSEC IPP polishing abrasives, etc.
  • a Nalco 2371 polishing liquid available from AKZO NOBEL Inc. of the United States can be used.
  • the wafer is subjected to a pressure of 0.04 to 0.15 kg/cm 2 , preferably 0.05 to 0.12 kg/cm 2 , during the polishing process using the upper and lower disc type polishing apparatus (the upper and lower discs are reversely rotated).
  • the upper plate has a rotational speed of 15-35 rpm, preferably 18-28 rpm; and the lower plate has a rotational speed of 8-18 rpm, preferably 10-15 rpm.
  • the flow rate of the polishing liquid was 60-120 liters/cm 2 wafer area/hour.
  • the polishing time is from 20 to 70 minutes, preferably from 25 to 60 minutes.
  • the polishing solution used includes, in addition to water, dichloroisocyanurate, sulfonate, Acid pyrophosphate, bicarbonate and carbonate.
  • the polishing solution in addition to water, in terms of weight percent (based on the total amount of components other than water), the polishing solution comprises dichloroisocyanurate 29.00-40.00%, The sulfonate is 0.20-0.45%, the acid pyrophosphate is 18.00-35.00%, the hydrogencarbonate is 17.00-24.00%, and the carbonate is 15.00-23.00%, and the total content of each component is 100%.
  • the total weight percentage of the above components after being dissolved in water is limited to not adversely affect the wafer, and may be any concentration, but is preferably not higher than 3.0%.
  • a commercially available polishing liquid such as Fujimi INSEC SP polishing solution of FujimiCorperation of Japan or Fujimi COMPOL 80 polishing may be used. Liquid, etc.
  • a Rodel LS-10 polishing liquid available from Rodel Corporation of the United States can be used.
  • the wafer is subjected to a pressure of 0.05 to 0.15 kg/cm 2 , preferably 0.07 to 0.12 kg/cm 2 , during the polishing process using the upper and lower disc type polishing apparatus (the upper and lower discs are reversely rotated).
  • the upper plate has a rotational speed of 25-50 rpm, preferably 30-45 rpm; the lower plate has a rotational speed of 15-30 rpm, preferably 20-25 rpm.
  • the flow rate of the polishing liquid was 0.5 - 1.0 ml / cm 2 wafer area / minute.
  • the polishing time is 3-20 minutes, preferably 5-15 minutes.
  • dichloroisocyanurate, (acid) pyrophosphate, hydrogencarbonate and carbonate may be used as one of their respective water-soluble salts.
  • the dichloroisocyanurate, the (acid) pyrophosphate, the hydrogencarbonate and the carbonate are one of the respective water-soluble alkali metal salts or an ammonium salt, particularly preferably the respective sodium. Salt or ammonium salt.
  • silica sol a conventional silica sol such as a commercially available silica sol or a silica sol prepared by a prior art method can be used.
  • a water-soluble sulfonate preferably one of the water-soluble alkali metal salts or an ammonium salt, and particularly preferably a sodium salt or an ammonium salt
  • the sulfonate is a monosulfonate or disulfonate such as a C 6-16 aryl (i.e., an aryl group having 6 to 16 carbon atoms, including a substituted aryl group) (e.g., C 4-10) Alkyl-benzenesulfonate, besylate, naphthalenesulfonate, phosphonium sulfonate, C 4-10 alkyl-phenyl disulfonic acid di-salt, phenyl disulfonic acid di-salt, naphthyl disulfonate Acid di-salt or decyl disulfonic acid di-salt, such as 1,2-benzenedisulfonic acid di-salt
  • the flatness of the shaped wafer is not more than 5 ⁇ m in terms of curvature.
  • the wafer has a thickness of no greater than 750 microns, such as 200-750 microns, and a surface micro-roughness of 0.2-0.5 nm.
  • the profiled semiconductor wafer has a thickness of 280-700 microns and a surface micro-roughness of 0.2-0.4 nm.
  • the profiled semiconductor wafer has a thickness of 320-650 microns and a surface micro-roughness of 0.2-0.4 nm.
  • the maximum linear distance connecting the two points on the surface of the shaped semiconductor wafer of the present invention is usually from 2 to 15 cm, preferably from 5 to 12 cm.
  • the flatness is 0.025-0.075 ⁇ m/mm, preferably 0.03, in terms of the ratio of the overall flatness/wafer diagonal (the line between the two longest points of the edge of the wafer surface). -0.065 ⁇ m/mm.
  • the method of the present invention further comprises subjecting the polished wafer to a surface cleaning treatment, preferably a wet surface cleaning treatment.
  • the cleaning process is not particularly limited as long as it can achieve the desired degree of cleanness of the wafer surface.
  • a method of processing a circular wafer directly by the prior art can be appropriately selected depending on the kind of the shaped semiconductor wafer to be prepared.
  • the surface wet cleaning treatment of the step (6) is carried out in a clean room of not less than 1000 stages.
  • the definition of the clean room level is based on the US Federal Standard 209D clean room specification (see Table 1 below). Here, usually only the number of fine dust particles is examined.
  • a thousand-level clean room generally means that, in each cubic foot, the number of particles ⁇ 0.5 ⁇ m is ⁇ 1000, and the number of particles ⁇ 5.0 ⁇ m is ⁇ 10.
  • the surface of the wafer is free from particles and white fog under visual observation.
  • the total metal residual amount on the surface of the wafer is ⁇ 100 ⁇ 10 10 atoms/cm 2 .
  • the shaped semiconductor wafer of the method of the present invention does not need to be subjected to any pre-epitaxial processing, and can reach the level of ready-to-use. Since the cleaning can be carried out by the prior art method, it will not be further described herein.
  • the method further comprises the step of packaging the wafer: the packaging of the wafer is also carried out in an ultra-clean environment of not less than 1000 grades, thereby ensuring that the user is ready to use the cartridge.
  • the present invention also provides a profiled semiconductor wafer having a surface microroughness Ra (tested by atomic force microscopy (AFM), the same below) of not more than 0.5 nm.
  • the wafer has a thickness of no greater than 750 microns, such as 200-750 microns, and a surface micro-roughness of 0.2-0.5 nm.
  • the profiled semiconductor wafer has a thickness of 280-700 microns and a surface micro-roughness of 0.2-0.4 nm.
  • the profiled semiconductor wafer has a thickness of 320-650 microns and a surface micro-roughness of 0.2-0.4 nm.
  • the flatness of the shaped wafer is not more than 5 microns in terms of curvature.
  • the flatness is 0.025-0.075 ⁇ m/mm, preferably 0.03, in terms of the ratio of the overall flatness/wafer diagonal (the line between the two longest points of the edge of the wafer surface). -0.065 ⁇ m/mm.
  • the wafer has a diagonal length of 1.5-15 cm.
  • the distance between the two points on the surface of the profiled semiconductor wafer of the present invention having the largest linear distance is usually from 1.5 to 15 cm, preferably from 5 to 12 cm.
  • the radius of the transition arc (portion A of Fig. 6) at the corner formed by the adjacent side of the profiled semiconductor wafer of the present invention is in the range of 2.5 - 5 mm, preferably in the range of 3 - 4.5 mm.
  • the shaped semiconductor wafer of the present invention is visually observed under illumination, and the surface of the wafer is free of particles and white fog. And the total metal residual amount on the surface of the wafer is ⁇ 100 ⁇ 10 10 atoms/cm 2 .
  • the shaped semiconductor wafer is a silicon wafer, a germanium wafer, a IIIA-VA semiconductor wafer (ie, a semiconductor wafer formed of Group IIIA and VA elements, such as a gallium arsenide wafer) , indium phosphide wafer or gallium phosphide wafer), silicon carbide wafer, and sapphire (mainly alumina) wafers.
  • a IIIA-VA semiconductor wafer ie, a semiconductor wafer formed of Group IIIA and VA elements, such as a gallium arsenide wafer
  • indium phosphide wafer or gallium phosphide wafer silicon carbide wafer
  • sapphire mainly alumina
  • the shaped semiconductor wafer is a single crystal wafer.
  • the single crystal wafer is a silicon wafer, a germanium wafer, a gallium arsenide wafer, an indium phosphide wafer or a phosphating.
  • the profiled semiconductor wafer is a square wafer, such as a square or rectangular wafer.
  • the shaped semiconductor wafer is a square wafer, and the main surface size of the square wafer is in the range of 10-110 mm ⁇ 10-110 mm, and the four corners are inscribed.
  • the radius R of the circle is in the range of 2.5-5 mm, the crystal directions of the four straight sides are all ⁇ 100> or all ⁇ 110>, and the thickness of the wafer is in the range of 280-700 ⁇ m.
  • the present invention also provides the use of the shaped semiconductor wafer of the present invention in a solar cell.
  • the grinding and polishing machine (the diameter of the upper and lower discs of 1.0 m) shown in Fig. 3 was used for grinding and polishing, wherein R1 and R2 were rotating shafts, 11 was a slurry or a polishing liquid tube, and 12 was a device tray. 13 is the lower plate of the device, 14 is the wafer and the support pad, and 16 is the polishing pad or polishing pad (the polishing pad is a polyester polishing pad available from Universal Optics Co.
  • the lower plate also has polishing pad and polishing pad, the same as the upper plate, located on the wafer and support Under the pad, not shown). Branch The lining, the polishing pad and the polishing pad have a diameter of 1 m; the four holes of the support pad for carrying the wafer are located in the middle of the radial direction and are evenly distributed in the circumferential direction.
  • the polishing liquid was a mixture of Japanese Fujimi Corporation Fujimi 20T alumina trioxide grinding powder and water at a weight ratio of 1:1, and the flow rate of the polishing liquid during the grinding was 90 ml/m 2 of equipment disc area (single-sided meter).
  • the support pads used in the examples were commercially available products, selected according to Shore hardness and dynamic compressibility, placed or aged as necessary to obtain the characteristic parameters shown.
  • test conditions of the prepared shaped semiconductor wafer are as follows (the surface of the wafer to be tested is the upward side in the polishing machine):
  • the qualification standard is ⁇ 100 ⁇ 10 10 atoms/cm 2 ;
  • the surface roughness Ra of the wafer was measured by AFM (Atomic Force Microscopy) (NanoScope IIIa type of Digital Instrument Company, USA) (vertical resolution 0.03 nm, analysis area 5 ⁇ m ⁇ 5 ⁇ m), expressed in nanometers;
  • Wafer thickness is measured by a contact thickness gauge (Mitutoyo, Japan, model: ID-C112ED);
  • Tencor 6220 (KLA-Tencor, Inc., manufacturer of surface particle size testers) tested the graininess of the wafer surface under a 0.3 micron threshold condition, ⁇ 1 particle/cm 2 for pass (labeled "None").
  • the values are averaged.
  • 50 wafers (divided into groups 1-4 according to 15, 15, 10, 10 sheets) were cut by a multi-line cutter from a 5.1 cm diameter GaAs circular ingot at a thickness of 450 ⁇ m.
  • the chamfering machine is used to perform edge chamfering on each of the circular wafers so that the edge sections thereof are curved.
  • the wafer was then cleaved into a 3.5 x 3.5 cm square wafer; the square wafer was edging using a quadrilateral wafer edger similar to that shown in Figure 2; the wafer was then placed at a thickness of 280 microns, as shown in Figure 4.
  • the support pad (Model Carrier-9B-50, purchased from Jiangsu Jiangyin Jingke Electronic Abrasive Material Factory, processed by the inventor to form the inner cavity shown in Figure 4, the straight line extension of the inner cavity intersected to form 3.5 ⁇ 3.5 cm
  • the square (diagonal about 4.95 cm), each corner formed by the intersection of the straight edge extension lines also has a convex portion, and each convex portion is connected with the adjacent straight sides by a transition arc, and the Shore hardness is 55, the dynamic compression modulus is 75%.
  • Double-side grinding at a pressure of 0.08 kg/cm 2 for 30 minutes to eliminate the scratch damage caused by the slicing process in which the lower plate rotates counterclockwise, the rotation speed is 10 rpm, the upper plate rotates clockwise, and the rotation speed is 4 Transfer / minute.
  • the coarse polishing solution shown in Table 2 was first used in the polishing apparatus, and polished under the rough polishing conditions shown in Table 2 for 60 minutes, using deionized water (resistivity greater than 17.5 megaohm ⁇ cm----25 After the value of °C, the same as below), after drying, the polishing solution shown in Table 3 was applied to the polishing apparatus, and polished under the fine polishing conditions shown in Table 3 for 6 minutes, and then the wafer was taken out, and deionized water was used. After washing, drying; surface wet cleaning treatment as follows: 1. Dip the wafer in an aqueous solution containing 0.3% by weight of NH3 and 1.3% by weight of hydrogen peroxide at 10 ° C for 5 minutes, 2.
  • the prepared GaAs square semiconductor wafer was examined, and the results are shown in Table 4-5.
  • 50 wafers (divided into groups 1-4 according to 15, 15, 10, 10 sheets) were cut out by a multi-line cutter from a 10.5 cm diameter InP round ingot at a thickness of 650 ⁇ m.
  • the chamfering machine is used to perform edge chamfering on each of the circular wafers so that the edge sections thereof are curved.
  • the wafer was then cleaved into a 7.0 x 7.0 cm square wafer (diagonal 9.9 cm); the square wafer was edging using a quadrilateral wafer edger similar to that shown in Figure 2 to obtain a suitable edge shape;
  • the chamfered wafer was placed in a support pad of 360 ⁇ m thickness as shown in Fig.
  • Double-side grinding at a pressure of 0.07 kg/cm 2 for 30 minutes to eliminate the scratch damage caused by the slicing process in which the lower plate rotates counterclockwise, the rotation speed is 10 rpm, the upper plate rotates clockwise, and the rotation speed is 4 Transfer / minute.
  • a liquid Fujimi INSEC SP polishing abrasive was used for the polishing apparatus, polished for 55 minutes under the rough polishing conditions shown in Table 6, washed with deionized water, dried, and then used with the Fujimi COMPOL 80 polishing liquid for the polishing apparatus. It was polished for 8 minutes under the fine polishing conditions shown in Table 7, and then the wafer was taken out, washed with deionized water, and dried; the surface wet cleaning treatment was carried out as follows:
  • the wafer is placed in the rinse tank, rinse the surface of the wafer with deionized water for 55 seconds;
  • the wafer is placed in the rinse tank, rinse the surface of the wafer with deionized water for 30 seconds;
  • the rinsed wafer was placed in a wafer rotary dryer and dried with hot nitrogen (70 ° C) for 15 minutes.
  • 50 wafers (divided into groups 1-4 according to 15, 15, 10, 10 sheets) were cut by a multi-line cutter from a 12-cm diameter Si circular ingot at a thickness of 480 ⁇ m.
  • the chamfering machine is used to perform edge chamfering on each of the circular wafers so that the edge sections thereof are curved.
  • the wafer was then cleaved into a 8.2 x 8.2 cm square wafer (diagonal about 11.6 cm); the square wafer was edging using a quadrilateral wafer edger similar to that shown in Figure 2 to obtain a suitable edge shape;
  • the chamfered wafer was then placed in a 290 micron thick support pad as shown in Figure 4 (a Lexan type support pad from PR HORRMAN, USA, which was processed by the inventor to form the inner cavity shown in Figure 4,
  • the straight line extension lines intersect to form a square of 8.2 ⁇ 8.2 cm, and the corners formed by the intersection of the straight side extension lines also have convex portions, and the outer convex portions are connected with the adjacent straight sides by a transition arc.
  • the hardness is 45 and the dynamic compression modulus is 90%.
  • Nalco 2371 polishing liquid purchased from the United States was used for the polishing apparatus, polished for 25 minutes under the rough polishing conditions shown in Table 10, washed with deionized water, dried, and then polished by Rodel LS-10 from the United States.
  • the liquid was used in the polishing apparatus, and polished under the fine polishing conditions shown in Table 11 for 12 minutes, and then the wafer was taken out, washed with water, and dried; the surface wet cleaning treatment was carried out as follows:
  • the reagent used consists of H 2 SO 4 -H 2 O 2 -H 2 O (wherein the volume ratio of H 2 SO 4 :H 2 O 2 :H 2 O is 1:3:2, H 2 SO 4 and H 2 O 2 according to each of the formation of a saturated solution at room temperature, the same below), the silicon wafer is washed at a temperature of 115 ° C for 150 seconds;
  • the reagent used is composed of H 2 SO 4 -H 2 O 2 -H 2 O, the volume ratio of the three is 1:1:5, and the temperature at the time of washing is 75 ° C for 75 seconds;
  • the third step is to wash with 15% by weight of hydrofluoric acid (HF) and treat at 23 ° C for 30 seconds;
  • HF hydrofluoric acid
  • a mixture of HCl-H 2 O 2 -H 2 O was used (the molar ratio of the three substances was 1:1:6), and the treatment was carried out at 75 ° C for 90 seconds.
  • Example 1 Taking the wafer 1 of Example 1 and repeating Example 1 (according to Group 4 conditions), but in the double-side grinding step, a support pad having a circular hole cavity (the maximum inscribed square side length of the circular hole is equal to the wafer side length) is used. It was found that after the end of the grinding step, the wafer broke and no further steps were performed.
  • the support pad of the circular hole cavity (the maximum inscribed square side length of the circular hole is equal to the wafer side length) was found. After the mechanochemical polishing step, the wafer is broken and no further steps are performed.
  • the support pad of the circular hole cavity (the maximum inscribed square side length of the circular hole is equal to the wafer side length) was found. After the mechanochemical polishing step, the wafer is broken and no further steps are performed.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

Disclosed are a special-shaped semiconductor wafer, a manufacturing method thereof and a wafer carrier. The method comprises: (1) providing a special-shaped wafer original sheet; (2) edging the wafer original sheet;(3) grinding and processing the surface of the edged wafer, placing the wafer in an inner cavity of the carrier, wherein the inner cavity of the carrier has a plurality of straight sides, and the extension cords of the straight sides intersect to form a special shape, the inner cavity having a convex part at each corner part formed by intersecting the extension cords of straight sides, wherein each convex part is connected to each adjacent straight side via a transition arc, and the shape of the wafer matches the shape of the inner cavity; and (4) roughly polishing the wafer inside the special-shaped carrier, and then performing a finishing polish. The method for manufacturing the special-shaped semiconductor wafer in the present invention reduces or prevents the risk of damage to the wafer during processing, and improves the wafer yield.

Description

一种异形半导体晶片、制备方法及晶片支承垫Shaped semiconductor wafer, preparation method and wafer support pad 技术领域Technical field
本发明涉及一种半导体晶片、其制备方法及晶片支承垫,更具体地,涉及一种异形半导体晶片、其制备方法及晶片支承垫。The present invention relates to a semiconductor wafer, a method of fabricating the same, and a wafer support pad, and more particularly to a shaped semiconductor wafer, a method of fabricating the same, and a wafer support pad.
背景技术Background technique
半导体晶片由于其在电子、通讯及能源等多种领域中的应用,越来越广泛地受到关注。其中,将半导体晶片用作太阳能电池的衬底材料是一个重要的应用方向。目前,太阳能电池的衬底材料多为圆形衬底,在衬底的外延和后续电池工艺完成后,再切割成方形的电池进行模组的加工,这造成靠近圆形半导体晶片边缘的电池材料的浪费。开发方形衬底,能节约半导体晶片外延和电池制作的成本,并能方便后续电池模组的加工。此外,在许多其他应用领域中,也希望使用方形半导体晶片。因此,研究包括方形半导体晶片在内的非圆形半导体晶片(统称为异形半导体晶片)的制备具有重要意义。Semiconductor wafers have received increasing attention due to their applications in electronics, communications, and energy. Among them, the use of a semiconductor wafer as a substrate material for a solar cell is an important application direction. At present, the substrate material of the solar cell is mostly a circular substrate. After the epitaxy of the substrate and the subsequent battery process are completed, the battery is cut into a square shape to process the module, which causes the battery material near the edge of the circular semiconductor wafer. Waste. The development of a square substrate can save the cost of semiconductor wafer epitaxy and battery fabrication, and can facilitate the processing of subsequent battery modules. Furthermore, in many other fields of application, it is also desirable to use square semiconductor wafers. Therefore, it is important to study the preparation of non-circular semiconductor wafers (collectively referred to as shaped semiconductor wafers) including square semiconductor wafers.
晶片在制造过程中需要研磨和抛光,为此,将晶片置于一个晶片支承垫(carrier)(也称游星轮)中呈穿透的洞形状的内腔内,在研磨或抛光设备中进行处理(其中支承垫放在研磨、抛光设备下盘的抛光垫上,晶片放在支承垫的内腔中,晶片下表面与抛光垫接触,研磨、抛光设备上盘的抛光垫压住晶片上表面,在抛光设备的带动下晶片做公转和自转,实现研磨和抛光)。在这些处理步骤中,与圆形半导体晶片相比,异形半导体晶片的处理要困难得多,例如,如果方形半导体晶片置于具有圆形内腔的传统圆片研磨和抛光设备中的晶片支承垫内,则方形晶片的直角处需采用较大的过渡圆弧,造成晶片有效面积的浪费;同时,在操作过程中,也不易将晶片控制在圆形的支承垫的内腔内,相反,晶片易从圆形的支承垫的内腔“逃”出,结果造成晶片的破碎。如果直接采用方形内腔的支承垫,则在操作过程中晶片角部集中受力,也同样易于造成晶片的破碎。The wafer needs to be ground and polished during the manufacturing process. For this purpose, the wafer is placed in a hole-shaped inner cavity in a wafer support carrier (also called a star wheel), which is carried out in a grinding or polishing apparatus. Processing (wherein the support pad is placed on the polishing pad of the lower disk of the polishing and polishing apparatus, the wafer is placed in the inner cavity of the support pad, the lower surface of the wafer is in contact with the polishing pad, and the polishing pad of the disk on the polishing and polishing device presses the upper surface of the wafer, The wafer is revolved and rotated under the driving of the polishing equipment to achieve grinding and polishing. In these processing steps, the processing of the shaped semiconductor wafer is much more difficult than with a circular semiconductor wafer, for example, if the square semiconductor wafer is placed in a wafer support pad in a conventional wafer polishing and polishing apparatus having a circular inner cavity. Inside, the rectangular wafer needs to adopt a large transition arc at a right angle, which causes waste of the effective area of the wafer; at the same time, it is not easy to control the wafer in the inner cavity of the circular support pad during the operation, on the contrary, the wafer It is easy to "escape" from the inner cavity of the circular support pad, resulting in the breakage of the wafer. If the support pad of the square inner cavity is directly used, the corners of the wafer are concentrated under the operation, and the wafer is also easily broken.
因此,目前用于制备太阳能电池的方形硅片由晶棒切割形成后,不进行倒角和表面研磨、化学机械抛光等处理,导致这样的硅片表面粗糙,难于在平整和粗糙度达到较高的要求。Therefore, the square silicon wafer currently used for preparing the solar cell is formed by cutting the ingot, and is not subjected to chamfering and surface grinding, chemical mechanical polishing, etc., resulting in a rough surface of such a silicon wafer, which is difficult to achieve flatness and roughness. Requirements.
总之,迄今为止,尚未见有成熟的、能以工业规模生产平整的非圆形, 即异形半导体晶片的方法。In short, so far, there is no mature non-circular shape that can be produced on an industrial scale. That is, a method of a shaped semiconductor wafer.
发明内容Summary of the invention
为解决上述问题,本发明提供了一种制备平整的异形半导体晶片的方法,该方法包括以下步骤:In order to solve the above problems, the present invention provides a method of preparing a flat shaped semiconductor wafer, the method comprising the steps of:
(1)提供一种异形晶片原片;(1) providing an original wafer of a shaped wafer;
(2)对晶片原片进行磨边处理;(2) edging the original wafer;
(3)对磨边后的晶片进行表面研磨加工,其中晶片置于一个支承垫的内腔中,支承垫的内腔具有多个直边,各直边延长线相交形成异形形状,内腔在各直边延长线相交形成的各个角部处还具有外凸部分,各外凸部分与相邻各直边以过渡圆弧连接,所述晶片的形状与内腔的形状匹配;(3) performing surface grinding processing on the edging wafer, wherein the wafer is placed in a cavity of a supporting pad, the inner cavity of the supporting pad has a plurality of straight sides, and the straight edge extension lines intersect to form a profiled shape, and the inner cavity is Each of the corner portions formed by the intersection of the straight edge extension lines further has a convex portion, and each of the outer convex portions is connected with the adjacent straight sides by a transition arc, and the shape of the wafer matches the shape of the inner cavity;
(4)对异形支承垫内的晶片进行粗抛光,然后进行精抛光。(4) The wafer in the profiled support pad is roughly polished and then polished.
任选地,对精抛光后的晶片进行表面清洗处理。Optionally, the polished wafer is surface cleaned.
此外,本发明还提供了一种异形半导体晶片,其表面微粗糙度Ra(用原子力显微镜(AFM)测试,下同,详见实施例)不高于0.5纳米,优选不高于0.4纳米。优选地,其平整度以弯曲度(Bow)计(下同,详见实施例)不高于5μm。优选地,按整体平整度/晶片对角线(位于晶片表面的边缘的、距离最长的两个点之间的连线)长度的比值计为0.025-0.075μm/mm,优选0.03-0.065μm/mm。优选地,晶片对角线长度为1.5-15厘米。Further, the present invention provides a profiled semiconductor wafer having a surface microroughness Ra (tested by atomic force microscopy (AFM), hereinafter the same as in the examples) of not more than 0.5 nm, preferably not more than 0.4 nm. Preferably, the flatness thereof is not more than 5 μm in terms of bending (the same applies hereinafter, see the examples). Preferably, the ratio of the length of the overall flatness/wafer diagonal (the line between the two longest points of the edge of the wafer surface) is 0.025-0.075 μm/mm, preferably 0.03-0.065 μm. /mm. Preferably, the wafer has a diagonal length of 1.5-15 cm.
再者,本发明还提供一种用于对晶片加工的支承垫,所述支承垫具有至少一个异形内腔,所述内腔具有多个直边,各直边延长线相交形成异形形状,内腔在各直边延长线相交形成的各个角部处还具有外凸部分,各外凸部分与相邻各直边以过渡圆弧连接。此外,优选的是,支承垫的厚度T为200-800微米,优选260-650微米,更优选270-500微米。优选地,支承垫的肖氏硬度(采用上海万衡精密仪器有限公司HS-19A型肖氏硬度计检测,下同)为35-60,优选40-55;动态可压缩性(按JISK6505测得,下同)为60-100%,优选70-95%。Furthermore, the present invention also provides a support pad for processing a wafer, the support pad having at least one shaped inner cavity, the inner cavity having a plurality of straight sides, each of the straight edge extension lines intersecting to form a profiled shape, The cavity further has a convex portion at each corner formed by the intersection of the straight edge extension lines, and each of the convex portions is connected to the adjacent straight sides by a transition arc. Furthermore, it is preferred that the support pad has a thickness T of from 200 to 800 micrometers, preferably from 260 to 650 micrometers, more preferably from 270 to 500 micrometers. Preferably, the Shore hardness of the support pad (tested by Shanghai Wanheng Precision Instrument Co., Ltd. HS-19A Shore hardness tester, the same below) is 35-60, preferably 40-55; dynamic compressibility (measured according to JIS K6505) , the same below) is 60-100%, preferably 70-95%.
另外,本发明还提供了本发明异形半导体晶片用于太阳能电池中的用途。 In addition, the present invention also provides the use of the shaped semiconductor wafer of the present invention in a solar cell.
本发明制备异形半导体晶片的方法减少或避免了加工过程中晶片破损的风险,提高了晶片的成品率。此外,由本发明方法制得的异形半导体晶片还具有良好的晶片平整度和粗糙度,适于进行外延生长。The method of the invention for preparing a shaped semiconductor wafer reduces or avoids the risk of wafer breakage during processing and improves the yield of the wafer. In addition, the profiled semiconductor wafers produced by the method of the present invention also have good wafer flatness and roughness and are suitable for epitaxial growth.
附图说明DRAWINGS
图1为本发明方法的晶片倒角的示意图,其中图1a倒角为圆弧状,图1b倒角为坡形。Figure 1 is a schematic view of the wafer chamfer of the method of the present invention, wherein the chamfer of Figure 1a is arcuate and the chamfer of Figure 1b is sloped.
图2为一种晶片磨边机的示意图。2 is a schematic view of a wafer edger.
图3为用于实施本发明研磨或抛光方法的设备的一个实例。Figure 3 is an illustration of an apparatus for carrying out the grinding or polishing method of the present invention.
图4为本发明的支承垫示意图,其中有内腔,内腔的角部有过渡圆弧。Figure 4 is a schematic view of the support pad of the present invention, wherein there is a lumen having a transition arc at the corner of the lumen.
图5为本发明支承垫内腔中,角部过渡圆弧的示意图。Fig. 5 is a schematic view showing a transition arc of a corner portion in the inner cavity of the support pad of the present invention.
图6为本发明晶片的角部过渡圆弧的示意图。Figure 6 is a schematic view of a corner transition arc of a wafer of the present invention.
具体实施方式detailed description
在本发明中,所述异形是指非圆形的、各边均为直边的形状,例如长方形、正方形、菱形或其他多边形等。In the present invention, the irregular shape refers to a shape that is non-circular and each side is a straight side, such as a rectangle, a square, a diamond, or other polygons.
在本发明中,所述具有异形内腔的支承垫是指在晶片的研磨、抛光以及相关步骤中用于承载晶片的垫,其中容纳晶片的、穿透垫的腔或孔称为内腔,内腔的形状随所加工晶片的形状而异。In the present invention, the support pad having a shaped inner cavity refers to a pad for carrying a wafer in the grinding, polishing and related steps of the wafer, wherein the cavity or hole penetrating the pad is referred to as a cavity. The shape of the inner cavity varies with the shape of the wafer being processed.
在本发明中,所述过渡圆弧是指在支承垫内腔或晶片本身具有角的位置处,将角去除而加工成圆弧状的部分。In the present invention, the transition arc means a portion which is cut into an arc shape at a position where the inner cavity of the support pad or the wafer itself has an angle.
在本发明中,如无其他说明,则所有操作均在室温、常压实施。In the present invention, all operations are carried out at room temperature and normal pressure unless otherwise stated.
在本说明书中,为说明方便,有时结合附图,但是,附图仅仅是示例性的,也不一定按比例绘制,它们不对发明做任何限定。In the specification, the present invention is not limited to the invention, and is not intended to limit the invention.
本发明制备异形半导体晶片的方法包括以下步骤:The method of the present invention for preparing a shaped semiconductor wafer comprises the following steps:
(1)提供一种异形晶片原片;(1) providing an original wafer of a shaped wafer;
(2)对晶片原片进行磨边处理;(2) edging the original wafer;
(3)对磨边处理后的晶片进行表面研磨加工,其中晶片置于一个支承垫的内腔中,支承垫的内腔具有多个直边,各直边延长线相交形成异形形状,内腔在各直边延长线相交形成的各个角部处还具有外凸部分,各外凸部分与相邻各直边以过渡圆弧连接,所述晶片的形状与内腔的形状匹配; (3) performing surface grinding processing on the edging processed wafer, wherein the wafer is placed in a cavity of a supporting pad, the inner cavity of the supporting pad has a plurality of straight sides, and the straight edge extension lines intersect to form an irregular shape, the inner cavity Each of the corner portions formed by the intersection of the straight edge extension lines further has a convex portion, and each of the outer convex portions is connected with the adjacent straight sides by a transition arc, and the shape of the wafer matches the shape of the inner cavity;
(4)对异形支承垫内的晶片进行粗抛光,然后进行精抛光。(4) The wafer in the profiled support pad is roughly polished and then polished.
任选地,对精抛光后的晶片进行表面清洗处理。Optionally, the polished wafer is surface cleaned.
在优选的实施方案中,步骤(1)中所述晶片材料为硅晶体、锗晶体、IIIA-VA族半导体晶体(即由IIIA族和VA族元素形成的半导体晶体,例如砷化镓晶体、磷化铟晶体或磷化镓晶体)、碳化硅晶体以及蓝宝石晶体(主要成分为氧化铝)。在更优选的实施方案中,步骤(1)中所述晶片为单晶,优选为锗单晶、磷化铟单晶或砷化镓单晶。In a preferred embodiment, the wafer material in the step (1) is a silicon crystal, a germanium crystal, a IIIA-VA semiconductor crystal (ie, a semiconductor crystal formed of a group IIIA and a group VA element, such as gallium arsenide crystal, phosphorus Indium crystal or gallium phosphide crystal), silicon carbide crystals, and sapphire crystals (mainly alumina). In a more preferred embodiment, the wafer in the step (1) is a single crystal, preferably a germanium single crystal, an indium phosphide single crystal or a gallium arsenide single crystal.
在一种优选的实施方案中,步骤(1)如下进行:In a preferred embodiment, step (1) is carried out as follows:
将圆形晶棒切割成所需厚度的圆形晶片;Cutting a circular ingot into a circular wafer of a desired thickness;
采用倒角机对圆形晶片进行边缘倒角处理;和Edge chamfering of the circular wafer using a chamfering machine; and
将圆形晶片解理或切割成异形晶片。The circular wafer is cleaved or cut into shaped wafers.
优选地,将多片晶片一起加工成异形晶片。为此,可以使用粘结剂将多片晶片粘接在一起,然后将粘接在一起的多片晶片切割成异形晶片。例如,采用内圆锯实施切割。这样,可以进一步提高生产效率。所述粘结剂可选自下列之一:天然及合成聚合物,例如纤维素类物质(例如羧甲基纤维素)、***树胶、聚乙烯醇、聚乙酸乙烯酯、天然磷脂(如脑磷脂和卵磷脂)、合成磷脂、矿物油、植物油、蜡和松香等,优选蜡,例如蜂蜡。此外,在切割之后,粘结剂的去除可使用本领域已知的去除粘结剂的任何常规方法,包括物理方法和化学方法等,例如可使用加热、或使用水或有机溶剂如IPA(异丙醇)、酒精或化蜡剂等去除粘结剂,以不对晶片产生不利影响为限。优选地,粘结剂为水溶性粘结剂。Preferably, the plurality of wafers are processed together into a profiled wafer. To this end, a plurality of wafers can be bonded together using an adhesive, and then the bonded wafers are cut into shaped wafers. For example, cutting is performed using an internal circular saw. In this way, the production efficiency can be further improved. The binder may be selected from one of the following: natural and synthetic polymers, such as cellulosic materials (such as carboxymethylcellulose), gum arabic, polyvinyl alcohol, polyvinyl acetate, natural phospholipids (such as cephalin). And lecithin), synthetic phospholipids, mineral oils, vegetable oils, waxes and rosins, etc., preferably waxes, such as beeswax. Further, after the dicing, the removal of the binder may use any conventional method known in the art for removing the binder, including physical methods and chemical methods, etc., for example, heating may be used, or water or an organic solvent such as IPA may be used. The binder is removed by propanol, alcohol or wax, etc., so as not to adversely affect the wafer. Preferably, the binder is a water soluble binder.
步骤(1)例如可如下进行:将圆形晶棒采用多线切割机切割成一定厚度的薄片;采用倒角机对圆形晶片进行边缘倒角处理;采用解理的方法把晶片解理成四个直边分别为<110>的方形晶片,或采用上蜡的方法把多片圆形晶片粘接在一起,然后采用内圆锯把粘接在一起的晶片一次性的切割成四个直边全部为<110>或<100>的方形晶片。The step (1) can be carried out, for example, by cutting a circular ingot into a sheet having a certain thickness by using a multi-line cutter; performing edge chamfering on the circular wafer by using a chamfering machine; and cleaving the wafer into four by cleavage A square wafer with a straight edge of <110>, or a plurality of circular wafers bonded together by waxing, and then the inner bonded wafer is used to cut the bonded wafers into four straight sides at once. A square wafer of <110> or <100>.
在另一种优选的实施方案中,步骤(1)如下进行:In another preferred embodiment, step (1) is carried out as follows:
将一种圆形晶棒切割成异形晶棒;和Cutting a circular ingot into a shaped ingot; and
将获得的异形晶棒切割成所需厚度的异形晶片。The obtained shaped ingot is cut into a shaped wafer of a desired thickness.
上述过程例如可如下进行:采用内圆锯将直径为2-15厘米的圆形晶棒切割成一定尺寸的异形晶棒,切割过程中采用X射线衍射仪定出需要切的 直边的晶向,晶向的精度范围控制在±5°,优选控制在±3°以内,更优选控制在±1°以内,将各个直边依次切出,获得需要的异形晶棒;对异形晶棒的一个端面用X射线衍射仪定出所需的异形晶片的表面晶向;将获得的异形晶棒采用多线切割机一次性地切割成厚度为270-800微米的异形晶片。为了降低异形晶片切割过程中的破损,切割前将异形晶棒在切割机工作台上固定为一个侧面保持水平。The above process can be carried out, for example, by cutting a circular ingot with a diameter of 2-15 cm into a shaped rod of a certain size by using an internal circular saw, and cutting it by an X-ray diffractometer during cutting. The crystal orientation of the straight side, the precision of the crystal orientation is controlled within ±5°, preferably within ±3°, more preferably within ±1°, and the straight sides are sequentially cut out to obtain the desired shaped ingot; One end face of the shaped rod is used to determine the surface crystal orientation of the desired shaped wafer by an X-ray diffractometer; the obtained shaped ingot is cut into a profiled wafer having a thickness of 270-800 μm at a time by a multi-wire cutter. In order to reduce the damage during the cutting process of the profiled wafer, the profiled ingot is fixed on the cutter table to a side to maintain the level before cutting.
在更优选的实施方案中,步骤(1)得到的异形晶片为方形(正方形或长方形)。各个直边的晶向可以全部为<100>或全部为<110>。In a more preferred embodiment, the shaped wafer obtained in step (1) is square (square or rectangular). The crystal orientation of each straight side may be all <100> or all <110>.
所使用的晶棒可商购得到,或由本领域已知的方法制备。例如可为硅晶棒、锗晶棒、IIIA-VA族半导体晶棒、碳化硅晶棒以及蓝宝石晶棒等。圆形晶棒的横向截面的直径通常为2-15厘米,优选为5-12厘米。The ingots used are either commercially available or prepared by methods known in the art. For example, it may be a silicon ingot, a twin rod, a IIIA-VA semiconductor ingot, a silicon carbide ingot, a sapphire ingot, or the like. The transverse cross section of the circular ingot typically has a diameter of from 2 to 15 cm, preferably from 5 to 12 cm.
所述切割通常使用本领域已知的外圆切割机、内圆切割机或多线切割机进行。由于多线切割机具有好的生产效率和出片率,因此优选多线切割机。通常,切出的晶片厚度为270-800微米,优选为300-750微米,更优选为320-700微米。The cutting is typically carried out using an outer circular cutter, an inner circular cutter or a multi-wire cutter known in the art. Since the multi-wire cutting machine has good production efficiency and filming rate, a multi-wire cutting machine is preferred. Typically, the cut wafer thickness is from 270 to 800 microns, preferably from 300 to 750 microns, more preferably from 320 to 700 microns.
优选地,在步骤(1)切割之后,还进行步骤(1’):对步骤(1)得到的晶片进行边缘倒角处理(如图1a和图1b所示),使晶片边缘获得合适的圆弧(图1a)或坡度(图1b,其中α优选为45±10°)。图1a和1b为晶片倒角前后的横截面图示。优选地,使得晶片边缘的横截面具有圆弧状的边缘(图1a),由此可以减少或避免后续步骤中半导体晶片破损的风险。所述倒角处理通常使用倒角机进行,任何现有技术的倒角机均可用于该步骤。Preferably, after the step (1) is cut, the step (1') is further performed: performing edge chamfering on the wafer obtained in the step (1) (as shown in FIGS. 1a and 1b) to obtain a suitable circle at the edge of the wafer. Arc (Fig. 1a) or slope (Fig. 1b, where α is preferably 45 ± 10°). Figures 1a and 1b are cross-sectional illustrations of the wafer before and after chamfering. Preferably, the cross-section of the edge of the wafer has an arcuate edge (Fig. 1a) whereby the risk of breakage of the semiconductor wafer in subsequent steps can be reduced or avoided. The chamfering process is typically performed using a chamfering machine, and any prior art chamfering machine can be used for this step.
步骤(2)为对晶片进行磨边处理。所述磨边处理可使用多边形晶片磨边机进行。例如,所述多边形晶片磨削机可以采用中国实用新型专利第201020567085.9号的晶片磨削机,该多边形晶片磨削机1如图2所示,包括:Step (2) is a edging process on the wafer. The edging process can be performed using a polygonal wafer edger. For example, the polygonal wafer grinding machine can adopt the wafer grinding machine of the Chinese Utility Model No. 201020567085.9. The polygonal wafer grinding machine 1 is as shown in FIG. 2 and includes:
工作吸盘2,用于通过抽真空容纳保持待磨边的多边形晶片的原片,工作吸盘2可以围绕其轴线转动,该工作吸盘2优选采用吸气孔吸附方式或吸气槽吸附方式抽真空,吸气孔或吸气槽在工作吸盘上均匀且对称分布,使多边形晶片坯料受力均匀地吸附固定在该工作吸盘上;与多边 形晶片相对应,工作吸盘为相应的多边形,在示例的实施方案中为正方形或长方形;The working suction cup 2 is configured to receive the original piece of the polygonal wafer to be edged by vacuuming, and the working suction cup 2 is rotatable about its axis, and the working suction cup 2 is preferably evacuated by suction hole adsorption or suction groove adsorption. The suction hole or the suction groove is uniformly and symmetrically distributed on the working suction cup, so that the polygonal wafer blank is uniformly adsorbed and fixed on the working suction cup; Corresponding to the shaped wafer, the working chuck is a corresponding polygon, which in the exemplary embodiment is square or rectangular;
靠模6,按照多边形晶片成品期望的边缘形状制成并用作母型,设置在工作吸盘2的下方,与工作吸盘2同轴设置,并相对于工作吸盘2固定;The mold 6 is made according to the desired edge shape of the finished polygon wafer and used as a female mold, disposed under the working suction cup 2, coaxially disposed with the working suction cup 2, and fixed with respect to the working suction cup 2;
两个定位挡板3(示出一个,另一个与示出的一个成直角方向),用于在磨削作业开始前或在磨削作业过程中通过顶靠晶片坯料,而使它们在工作吸盘2上准确定位;Two positioning baffles 3 (one shown, one at right angles to the one shown) for passing the wafer blanks before the start of the grinding operation or during the grinding operation, so that they are in the working suction cup 2 accurate positioning;
砂轮4,用于磨削所述晶片;a grinding wheel 4 for grinding the wafer;
靠轮5,设置在砂轮4下方且与砂轮4同轴设置,在磨削过程中,该靠轮5顶在所述靠模6上,以使砂轮4按照该靠模6的形状来磨削晶片;以及The wheel 5 is disposed below the grinding wheel 4 and disposed coaxially with the grinding wheel 4. During the grinding process, the wheel 5 is placed on the master 6 so that the grinding wheel 4 is ground according to the shape of the master 6. Wafer;
调整机构,其通过调整靠轮5和靠模6之间的相对位置,确保靠轮5和靠模6处于同一水平高度,防止了在磨削晶片的过程中出现直边不直、倒角的上下面宽度不一致的情况。The adjusting mechanism ensures that the wheel 5 and the master 6 are at the same level by adjusting the relative position between the wheel 5 and the master 6, thereby preventing straight edges from being straight and chamfered during the grinding of the wafer. The upper and lower widths are inconsistent.
其中同轴设置的工作吸盘和靠模与同轴设置的砂轮和靠轮之间可以相对移动。The working suction cup and the master which are coaxially arranged can be relatively moved between the grinding wheel and the wheel disposed coaxially.
利用该多边形晶片磨削机对异形晶片的磨削可以按如下所述实施:首先,将该异形晶片原片放置在相应异形的工作吸盘2上。为确保该晶片准确定位,优选使该晶片原片的两个边顶靠在两个定位挡板3上。然后,开启抽真空装置,使该晶片原片吸附固定在工作吸盘2上。此时,可以撤出两个定位挡板3。接着,移动同轴设置的砂轮4和靠轮5,使它们朝晶片原片的方向移动,同时砂轮冷却水打开。当砂轮进入磨削作业时,工作吸盘2开始旋转,设置在砂轮4下方的靠轮5顶在靠模6上,使得砂轮4将会按照该靠模6的形状来磨削该晶片原片。当上述磨削进行至原始起点使该晶片原片被磨削一周后,即在放置该晶片的工作吸盘2相应旋转一周后,优选地,使该工作吸盘2接着继续旋转超过约5%至约10%来对该晶片原片进一步磨削,然后再转回至原始起点,以防止在磨削的异形晶片原片中出现接口。接下来,工作吸盘2停止转动,砂轮4后退,两个定位挡板3前进。最后,切断真空,取下磨边完毕后的异形晶片原片。 Grinding of the shaped wafer by the polygonal wafer grinder can be carried out as follows: First, the original wafer of the shaped wafer is placed on the corresponding shaped working chuck 2. To ensure accurate positioning of the wafer, it is preferred to have the two sides of the original wafer sheet against the two positioning flaps 3. Then, the vacuuming device is turned on to adsorb and fix the original wafer on the working chuck 2. At this time, the two positioning flaps 3 can be withdrawn. Next, the coaxially disposed grinding wheel 4 and the wheel 5 are moved to move in the direction of the original wafer, while the grinding wheel cooling water is opened. When the grinding wheel enters the grinding operation, the working suction cup 2 starts to rotate, and the wheel 5 disposed under the grinding wheel 4 is placed on the master 6, so that the grinding wheel 4 will grind the original wafer according to the shape of the master 6. After the above-mentioned grinding is performed to the original starting point to make the original wafer of the wafer one week after grinding, that is, after the working chuck 2 on which the wafer is placed is rotated for one week, preferably, the working chuck 2 is further rotated by more than about 5% to about 10% of the original wafer was further ground and then transferred back to the original starting point to prevent the interface from appearing in the original wafer of the ground shaped wafer. Next, the working suction cup 2 stops rotating, the grinding wheel 4 retreats, and the two positioning flaps 3 advance. Finally, the vacuum was cut off, and the original wafer of the shaped wafer after the edging was completed.
进行所述磨边处理可以去除外边缘的加工余量和锋利的棱角,获得所需的边形。Performing the edging process removes the machining allowance and sharp edges of the outer edge to obtain the desired edge shape.
在步骤(2)之后,还任选地对晶片原片进行角部的加工,使其角部产生过渡圆弧。如图6的A所示,晶片的角部处理成具有过渡圆弧。After the step (2), the original piece of the wafer is also optionally subjected to corner processing to produce a transition arc at the corner. As shown in A of Fig. 6, the corners of the wafer are processed to have transitional arcs.
步骤(3)为对磨边处理后的晶片进行表面研磨加工,其中晶片置于一个支承垫的内腔中(例如,如图4-6所示,其中如图6所示,晶片的角部(优选具有过渡圆弧A)对应于支承垫的角部定位,支承垫直边B与相邻直边延长线形成角)。支承垫的内腔具有多个直边,各直边延长线相交形成异形形状,内腔在各直边延长线相交形成的各个角部处还具有外凸部分,各外凸部分与相邻各直边以过渡圆弧连接,所述晶片的形状与内腔的形状匹配。此外,优选的是,支承垫的厚度T小于研磨和抛光后晶片的厚度。更优选的是,T满足下列关系式(支承垫的厚度T及晶片厚度均以微米计):待加工晶片的厚度的50%≤T≤待加工晶片的厚度的80%,进一步优选的是,待加工晶片的厚度的60%≤T≤待加工晶片的厚度的70%。Step (3) is a surface grinding process of the edging processed wafer, wherein the wafer is placed in a cavity of a support pad (for example, as shown in FIG. 4-6, wherein the corner of the wafer is as shown in FIG. (preferably having a transition arc A) corresponding to the corner positioning of the support pad, the straight edge B of the support pad forming an angle with the adjacent straight edge extension line). The inner cavity of the support pad has a plurality of straight sides, and the straight edge extension lines intersect to form a profiled shape, and the inner cavity further has a convex portion at each corner formed by the intersection of the straight edge extension lines, and each of the outer convex portions and the adjacent each The straight sides are connected by a transition arc whose shape matches the shape of the inner cavity. Further, it is preferable that the thickness T of the support pad is smaller than the thickness of the wafer after polishing and polishing. More preferably, T satisfies the following relationship (the thickness T of the support pad and the thickness of the wafer are in micrometers): 50% of the thickness of the wafer to be processed ≤ T ≤ 80% of the thickness of the wafer to be processed, further preferably, 60% of the thickness of the wafer to be processed ≤ T ≤ 70% of the thickness of the wafer to be processed.
因此,本发明也提供一种用于晶片加工的支承垫,所述支承垫具有至少一个异形内腔,所述内腔具有多个直边,各直边延长线相交形成异形形状,内腔在各直边延长线相交形成的各个角部处还具有外凸部分,各外凸部分与相邻各直边以过渡圆弧连接。此外,优选的是,支承垫的厚度T为200-800微米,优选260-650微米,更优选270-500微米。图4示例了一种这样的支承垫,其中包括4个内腔。可以领会的是,内腔的数目可以改变。另外,图4虽然示例的是方形的内腔,但是,也可以是其他的形状,例如菱形或其他多边形,它们具有多个直边,各直边延长线相交形成异形形状,内腔在各直边延长线相交形成的各个角部处还具有外凸部分,各外凸部分与相邻各直边以过渡圆弧连接。图5以放大的方式示出了一种内腔角部处的形状。Accordingly, the present invention also provides a support pad for wafer processing, the support pad having at least one shaped inner cavity having a plurality of straight sides, each straight edge extension line intersecting to form a profiled shape, the inner cavity being Each of the corner portions formed by the intersection of the straight edge extension lines further has a convex portion, and each of the outer convex portions is connected to the adjacent straight sides by a transition arc. Furthermore, it is preferred that the support pad has a thickness T of from 200 to 800 micrometers, preferably from 260 to 650 micrometers, more preferably from 270 to 500 micrometers. Figure 4 illustrates one such support pad including four lumens. It can be appreciated that the number of lumens can vary. In addition, although FIG. 4 exemplifies a square inner cavity, other shapes, such as diamonds or other polygons, may have other straight sides, and the straight edge extension lines intersect to form an alien shape, and the inner cavity is straight. Each of the corner portions formed by the intersection of the extension lines further has a convex portion, and each of the convex portions is connected to the adjacent straight sides by a transition arc. Figure 5 shows, in an enlarged manner, the shape at the corner of the lumen.
优选地,内腔中各直边延长线相交形成的各个角之间的最大直线距离(通常为对角线)通常为2-15厘米,优选为5-12厘米。Preferably, the maximum linear distance (usually the diagonal) between the respective corners formed by the intersection of the straight edge extensions in the lumen is typically 2-15 cm, preferably 5-12 cm.
本发明用于晶片加工的支承垫可以采用金属或高分子材料制成,例如,由橡胶或塑料制成,例如采用玻璃纤维增强的环氧树脂材料等制成,其肖氏硬度(采用上海万衡精密仪器有限公司HS-19A型肖氏硬度计检测,下同)为35-60,优选40-55;动态可压缩性(按JISK6505测得,下同)为60-100%, 优选70-95%。The support pad for wafer processing of the present invention can be made of metal or polymer material, for example, made of rubber or plastic, for example, made of glass fiber reinforced epoxy material, and its Shore hardness (using Shanghai Wan Heng Precision Instrument Co., Ltd. HS-19A type Shore hardness tester, the same as below) is 35-60, preferably 40-55; dynamic compressibility (measured according to JIS K6505, the same below) is 60-100%, It is preferably 70-95%.
步骤(3)可在一种已知的研磨设备中进行(例如类似图3的设备,其中R1和R2分别表示上下盘12、13的轴,箭头表示旋转方向),晶片上下两侧垫有研磨垫14、16(通常为聚酯类研磨垫),研磨过程使用研磨液(可用已知的研磨液,由研磨液管11通入)。例如,在采用上下盘式的研磨设备(上下盘反向旋转)时,研磨过程中,晶片所受压力为0.03-0.18千克/平方厘米,优选0.05-0.15千克/平方厘米。上盘转速2-12转/分钟,优选3-5转/分钟;下盘转速5-20转/分钟,优选9-15转/分钟。研磨液量为60-120ml/m2研磨盘面积/分钟(按设备盘单面计)。研磨时间为20-50分钟,优选25-40分钟。Step (3) can be carried out in a known grinding apparatus (for example, an apparatus similar to that of Fig. 3, in which R1 and R2 respectively represent the axes of the upper and lower discs 12, 13, and arrows indicate the direction of rotation), and the upper and lower sides of the wafer are ground. Pads 14, 16 (usually polyester-based polishing pads), the polishing process uses a polishing liquid (a known polishing liquid can be used to pass through the slurry tube 11). For example, in the case of using an upper and lower disc type grinding apparatus (the upper and lower discs are reversely rotated), the pressure applied to the wafer during the grinding is 0.03 - 0.18 kg / cm 2 , preferably 0.05 - 0.15 kg / cm 2 . The upper plate has a rotational speed of 2-12 rpm, preferably 3-5 rpm; the lower plate has a rotational speed of 5-20 rpm, preferably 9-15 rpm. The amount of the slurry is 60-120 ml/m 2 of the disc area/min (on a single side of the equipment tray). The milling time is 20-50 minutes, preferably 25-40 minutes.
经过步骤(3)对晶片进行表面研磨加工,可以消除切片工序中晶片表面的锯纹损伤,获得足够的晶片平整度,为后续的抛光工序作准备。在一个优选的实施方案中,对晶片实施行双面研磨加工,消除切片工序带来的锯纹损伤。After the surface polishing process of the wafer through the step (3), the scratch damage on the surface of the wafer in the slicing process can be eliminated, and sufficient wafer flatness can be obtained to prepare for the subsequent polishing process. In a preferred embodiment, the wafer is subjected to a double side grinding process to eliminate the scratch damage caused by the slicing process.
步骤(4)为对异形支承垫内的晶片的抛光。在一种优选的实施方案中,步骤(3)和步骤(4)采用同一异形支承垫。Step (4) is polishing the wafer in the profiled support pad. In a preferred embodiment, step (3) and step (4) employ the same shaped support pad.
在实施步骤(3)和(4)时,支承垫内腔的对角线(通常为晶片表面上直线距离最大的两点之间的连线)与研磨、抛光设备的半径重合,或内腔的至少一个直边与轮半径重合。When performing steps (3) and (4), the diagonal of the inner cavity of the support pad (usually the line connecting the two points on the surface of the wafer with the largest linear distance) coincides with the radius of the grinding and polishing apparatus, or the inner cavity At least one straight edge coincides with the radius of the wheel.
步骤(4)中,对于粗抛光,也即机械化学抛光,例如在晶片为GaAs晶片的情况下,使用的粗抛光溶液,除水以外,还包括二氯代异氰尿酸盐、磺酸盐、焦磷酸盐、碳酸氢盐和硅溶胶。在本发明的一种优选实施方案中,粗抛光溶液中除水以外的成分按它们的重量百分比计(基于除水之外的成分的总量计),包括二氯代异氰尿酸盐8.0-22.0%、磺酸盐0.01-0.30%、焦磷酸盐4.5-19.0%、碳酸氢盐3.0-13.0%和硅溶胶55.0-72.0%,各组分含量总和为100%。上述各组分溶于水后的总重量百分比以不对晶片产生不利影响为限,可以为任何浓度,但是优选不高于6.0%。在另一个实施方案中,在晶片为InP晶片的情况下,可使用商购抛光磨料以已知的常规方法进行,所述商购抛光磨料如日本Fujimi Corporation的Fujimi INSEC SP抛光磨料或 INSEC IPP抛光磨料等。而在晶片为Si晶片的情况下,可使用购自美国AKZO NOBEL Inc.的Nalco 2371抛光液。In the step (4), for the rough polishing, that is, the mechanochemical polishing, for example, in the case where the wafer is a GaAs wafer, the coarse polishing solution used, in addition to water, includes dichloroisocyanurate, sulfonate. , pyrophosphate, bicarbonate and silica sol. In a preferred embodiment of the invention, the components of the rough polishing solution other than water are based on their weight percentage (based on the total amount of components other than water), including dichloroisocyanurate 8.0. - 22.0%, sulfonate 0.01-0.30%, pyrophosphate 4.5-19.0%, hydrogencarbonate 3.0-13.0%, and silica sol 55.0-72.0%, the total content of each component is 100%. The total weight percentage of each of the above components after being dissolved in water is limited to not adversely affect the wafer, and may be any concentration, but is preferably not higher than 6.0%. In another embodiment, where the wafer is an InP wafer, commercially available polishing abrasives can be used in a known conventional manner, such as Fujimi INSEC SP polishing abrasives from Fujimi Corporation of Japan or INSEC IPP polishing abrasives, etc. In the case where the wafer is an Si wafer, a Nalco 2371 polishing liquid available from AKZO NOBEL Inc. of the United States can be used.
对于粗抛光,在采用上下盘式的抛光设备(上下盘反向旋转)时,抛光过程中,晶片所受压力为0.04-0.15千克/平方厘米,优选0.05-0.12千克/平方厘米。上盘转速15-35转/分钟,优选18-28转/分钟;下盘转速8-18转/分钟,优选10-15转/分钟。抛光液流量为60-120升/cm2晶片面积/小时。抛光时间为20-70分钟,优选25-60分钟。For rough polishing, the wafer is subjected to a pressure of 0.04 to 0.15 kg/cm 2 , preferably 0.05 to 0.12 kg/cm 2 , during the polishing process using the upper and lower disc type polishing apparatus (the upper and lower discs are reversely rotated). The upper plate has a rotational speed of 15-35 rpm, preferably 18-28 rpm; and the lower plate has a rotational speed of 8-18 rpm, preferably 10-15 rpm. The flow rate of the polishing liquid was 60-120 liters/cm 2 wafer area/hour. The polishing time is from 20 to 70 minutes, preferably from 25 to 60 minutes.
步骤(4)中,对于精抛光,也即化学机械抛光,例如在晶片为GaAs晶片的情况下,使用的精抛光溶液,除水以外,包括二氯代异氰尿酸盐、磺酸盐、酸式焦磷酸盐、碳酸氢盐和碳酸盐。在本发明的一个优选实施方案中,除水之外,按重量百分比计(基于除水之外的成分的总量计),精抛光溶液包括二氯代异氰尿酸盐29.00-40.00%、磺酸盐0.20-0.45%、酸式焦磷酸盐18.00-35.00%、碳酸氢盐17.00-24.00%和碳酸盐15.00~23.00%,各组分含量总和为100%。上述各组分溶于水后的总重量百分比以不对晶片产生不利影响为限,可以为任何浓度,但是优选不高于3.0%。在另一个实施方案中,在晶片为InP晶片的情况下,可使用商购抛光液以已知的常规方法进行,所述商购抛光液如日本FujimiCorperation的Fujimi INSEC SP抛光液或Fujimi COMPOL 80抛光液等。而在晶片为Si晶片的情况下,可使用购自美国Rodel Corporation的Rodel LS-10抛光液。In the step (4), for fine polishing, that is, chemical mechanical polishing, for example, in the case where the wafer is a GaAs wafer, the polishing solution used includes, in addition to water, dichloroisocyanurate, sulfonate, Acid pyrophosphate, bicarbonate and carbonate. In a preferred embodiment of the present invention, in addition to water, in terms of weight percent (based on the total amount of components other than water), the polishing solution comprises dichloroisocyanurate 29.00-40.00%, The sulfonate is 0.20-0.45%, the acid pyrophosphate is 18.00-35.00%, the hydrogencarbonate is 17.00-24.00%, and the carbonate is 15.00-23.00%, and the total content of each component is 100%. The total weight percentage of the above components after being dissolved in water is limited to not adversely affect the wafer, and may be any concentration, but is preferably not higher than 3.0%. In another embodiment, in the case where the wafer is an InP wafer, a commercially available polishing liquid such as Fujimi INSEC SP polishing solution of FujimiCorperation of Japan or Fujimi COMPOL 80 polishing may be used. Liquid, etc. In the case where the wafer is an Si wafer, a Rodel LS-10 polishing liquid available from Rodel Corporation of the United States can be used.
对于精抛光,在采用上下盘式的抛光设备(上下盘反向旋转)时,抛光过程中,晶片所受压力为0.05-0.15千克/平方厘米,优选0.07-0.12千克/平方厘米。上盘转速25-50转/分钟,优选30-45转/分钟;下盘转速15-30转/分钟,优选20-25转/分钟。抛光液流量为0.5-1.0ml/cm2晶片面积/分钟。抛光时间为3-20分钟,优选5-15分钟。For finish polishing, the wafer is subjected to a pressure of 0.05 to 0.15 kg/cm 2 , preferably 0.07 to 0.12 kg/cm 2 , during the polishing process using the upper and lower disc type polishing apparatus (the upper and lower discs are reversely rotated). The upper plate has a rotational speed of 25-50 rpm, preferably 30-45 rpm; the lower plate has a rotational speed of 15-30 rpm, preferably 20-25 rpm. The flow rate of the polishing liquid was 0.5 - 1.0 ml / cm 2 wafer area / minute. The polishing time is 3-20 minutes, preferably 5-15 minutes.
在本发明的各抛光溶液中,二氯代异氰尿酸盐、(酸式)焦磷酸盐、碳酸氢盐和碳酸盐可以使用它们各自的水溶性盐类之一。优选的是,二氯代异氰尿酸盐、(酸式)焦磷酸盐、碳酸氢盐和碳酸盐为各自的水溶性的碱金属盐之一或为铵盐,特别优选为各自的钠盐或铵盐。In each of the polishing solutions of the present invention, dichloroisocyanurate, (acid) pyrophosphate, hydrogencarbonate and carbonate may be used as one of their respective water-soluble salts. Preferably, the dichloroisocyanurate, the (acid) pyrophosphate, the hydrogencarbonate and the carbonate are one of the respective water-soluble alkali metal salts or an ammonium salt, particularly preferably the respective sodium. Salt or ammonium salt.
对于硅溶胶,可以使用常规的硅溶胶,例如市售的硅溶胶,或者是使用现有技术方法制备的硅溶胶。For the silica sol, a conventional silica sol such as a commercially available silica sol or a silica sol prepared by a prior art method can be used.
对于磺酸盐,可以使用水溶性磺酸盐,优选水溶性碱金属盐之一或为铵盐,特别优选为钠盐或铵盐。优选的是,磺酸盐为例如C6-16芳基(即含 6-16个碳原子的芳基,包括取代的芳基)的单磺酸盐或二磺酸盐(例如C4-10烷基-苯磺酸盐、苯磺酸盐、萘磺酸盐、蒽磺酸盐、C4-10烷基-苯基二磺酸二盐、苯基二磺酸二盐、萘基二磺酸二盐或蒽基二磺酸二盐,例如1,2-苯二磺酸二盐、1,3-苯二磺酸二盐、苯磺酸盐或萘磺酸盐)、烷基磺酸盐(优选为4-10个碳原子烷基的磺酸盐,例如丁烷基磺酸盐、戊烷基磺酸盐、己烷基磺酸盐、庚烷基磺酸盐、辛烷基磺酸盐、壬烷基磺酸盐和癸烷基磺酸盐等)和酚磺酸盐之一,进一步优选1,3-苯二磺酸盐、苯磺酸盐、萘磺酸盐或己烷基磺酸盐。As the sulfonate, a water-soluble sulfonate, preferably one of the water-soluble alkali metal salts or an ammonium salt, and particularly preferably a sodium salt or an ammonium salt can be used. Preferably, the sulfonate is a monosulfonate or disulfonate such as a C 6-16 aryl (i.e., an aryl group having 6 to 16 carbon atoms, including a substituted aryl group) (e.g., C 4-10) Alkyl-benzenesulfonate, besylate, naphthalenesulfonate, phosphonium sulfonate, C 4-10 alkyl-phenyl disulfonic acid di-salt, phenyl disulfonic acid di-salt, naphthyl disulfonate Acid di-salt or decyl disulfonic acid di-salt, such as 1,2-benzenedisulfonic acid di-salt, 1,3-benzenedisulfonic acid di-salt, besylate or naphthalene sulfonate), alkyl sulfonic acid a salt (preferably a sulfonate of an alkyl group of 4 to 10 carbon atoms, such as a butane sulfonate, a pentane sulfonate, a hexane sulfonate, a heptane sulfonate, an octyl sulfonate One of a salt, a sulfonium sulfonate and a decyl sulfonate, and a phenolsulfonate, further preferably a 1,3-benzenedisulfonate, a besylate, a naphthalenesulfonate or a hexane Base sulfonate.
对于粗抛光和精抛光,虽然上面对于某些晶片示例了各自的方法,但是,由于粗抛光和精抛光本身可以采用现有技术的方法进行,因此不作进一步赘述。For rough polishing and fine polishing, although the respective methods are exemplified above for some wafers, since the rough polishing and the fine polishing itself can be carried out by the prior art method, no further details will be described.
经过粗抛光和精抛光,以弯曲度计,异形晶片的平整度不超过5微米。优选地,该晶片厚度不高于750微米,例如为200-750微米,表面微粗糙度为0.2-0.5nm。进一步优选地,所述异形半导体晶片厚度为280-700微米,表面微粗糙度为0.2-0.4nm。再进一步优选地,所述异形半导体晶片厚度为320-650微米,表面微粗糙度为0.2-0.4nm。优选地,连接本发明的异形半导体晶片表面上两点的最大直线距离通常为2-15厘米,优选为5-12厘米。优选地,其平整度按整体平整度/晶片对角线(位于晶片表面的边缘的、距离最长的两个点之间的连线)长度的比值计为0.025-0.075μm/mm,优选0.03-0.065μm/mm。After rough polishing and fine polishing, the flatness of the shaped wafer is not more than 5 μm in terms of curvature. Preferably, the wafer has a thickness of no greater than 750 microns, such as 200-750 microns, and a surface micro-roughness of 0.2-0.5 nm. Further preferably, the profiled semiconductor wafer has a thickness of 280-700 microns and a surface micro-roughness of 0.2-0.4 nm. Still more preferably, the profiled semiconductor wafer has a thickness of 320-650 microns and a surface micro-roughness of 0.2-0.4 nm. Preferably, the maximum linear distance connecting the two points on the surface of the shaped semiconductor wafer of the present invention is usually from 2 to 15 cm, preferably from 5 to 12 cm. Preferably, the flatness is 0.025-0.075 μm/mm, preferably 0.03, in terms of the ratio of the overall flatness/wafer diagonal (the line between the two longest points of the edge of the wafer surface). -0.065 μm/mm.
任选地,本发明的方法还包括为对精抛光后的晶片进行表面清洗处理,优选进行湿法表面清洗处理。对清洗处理的过程无特别限制,只要其能使晶片表面达到所需的清洁程度即可。就湿法清洗处理而言,可根据所制备的异形半导体晶片的种类进行适当选择,直接采用现有技术处理圆形晶片的方法。优选地,所述步骤(6)的表面湿法清洗处理在不低于1000级的洁净室中进行。所述洁净室等级的定义参考美国联邦标准209D洁净室规格(见下表1)。在此,通常只考察微尘粒子数,例如,千级洁净室一般指,每立方英尺中,≥0.5微米的颗粒数≤1000颗,同时≥5.0微米的颗粒数≤10颗。优选地,经过步骤(6)的表面清洗处理,在光照下目测,晶片表面无颗粒、无白雾。并且晶片表面总的金属残余量≤100×1010原子/cm2。这样,本发明方法的异形半导体晶片,不需要再进行任何外延前的处理,可达到开盒即用的水平。由于清洗可以采用现有技术的方法,在此不作进一步赘述。 Optionally, the method of the present invention further comprises subjecting the polished wafer to a surface cleaning treatment, preferably a wet surface cleaning treatment. The cleaning process is not particularly limited as long as it can achieve the desired degree of cleanness of the wafer surface. As for the wet cleaning treatment, a method of processing a circular wafer directly by the prior art can be appropriately selected depending on the kind of the shaped semiconductor wafer to be prepared. Preferably, the surface wet cleaning treatment of the step (6) is carried out in a clean room of not less than 1000 stages. The definition of the clean room level is based on the US Federal Standard 209D clean room specification (see Table 1 below). Here, usually only the number of fine dust particles is examined. For example, a thousand-level clean room generally means that, in each cubic foot, the number of particles ≥ 0.5 μm is ≤ 1000, and the number of particles ≥ 5.0 μm is ≤ 10. Preferably, after the surface cleaning treatment of the step (6), the surface of the wafer is free from particles and white fog under visual observation. And the total metal residual amount on the surface of the wafer is ≤ 100 × 10 10 atoms/cm 2 . Thus, the shaped semiconductor wafer of the method of the present invention does not need to be subjected to any pre-epitaxial processing, and can reach the level of ready-to-use. Since the cleaning can be carried out by the prior art method, it will not be further described herein.
表1美国联邦标准209D洁净室规格Table 1 US Federal Standard 209D Cleanroom Specifications
Figure PCTCN2016081199-appb-000001
Figure PCTCN2016081199-appb-000001
在本发明方法的一种优选实施方案中,还包括对晶片进行包装的步骤:对晶片的包装也在不低于1000级超洁净环境下进行,由此可以保证用户开盒即用。In a preferred embodiment of the method of the present invention, the method further comprises the step of packaging the wafer: the packaging of the wafer is also carried out in an ultra-clean environment of not less than 1000 grades, thereby ensuring that the user is ready to use the cartridge.
此外,本发明还提供了一种异形半导体晶片,其表面微粗糙度Ra(用原子力显微镜(AFM)测试,下同)不高于0.5纳米。优选地,该晶片厚度不高于750微米,例如为200-750微米,表面微粗糙度为0.2-0.5nm。进一步优选地,所述异形半导体晶片厚度为280-700微米,表面微粗糙度为0.2-0.4nm。再进一步优选地,所述异形半导体晶片厚度为320-650微米,表面微粗糙度为0.2-0.4nm。以弯曲度计,异形晶片的平整度不超过5微米。优选地,其平整度按整体平整度/晶片对角线(位于晶片表面的边缘的、距离最长的两个点之间的连线)长度的比值计为0.025-0.075μm/mm,优选0.03-0.065μm/mm。优选地,晶片对角线长度为1.5-15厘米。In addition, the present invention also provides a profiled semiconductor wafer having a surface microroughness Ra (tested by atomic force microscopy (AFM), the same below) of not more than 0.5 nm. Preferably, the wafer has a thickness of no greater than 750 microns, such as 200-750 microns, and a surface micro-roughness of 0.2-0.5 nm. Further preferably, the profiled semiconductor wafer has a thickness of 280-700 microns and a surface micro-roughness of 0.2-0.4 nm. Still more preferably, the profiled semiconductor wafer has a thickness of 320-650 microns and a surface micro-roughness of 0.2-0.4 nm. The flatness of the shaped wafer is not more than 5 microns in terms of curvature. Preferably, the flatness is 0.025-0.075 μm/mm, preferably 0.03, in terms of the ratio of the overall flatness/wafer diagonal (the line between the two longest points of the edge of the wafer surface). -0.065 μm/mm. Preferably, the wafer has a diagonal length of 1.5-15 cm.
本发明的异形半导体晶片表面上直线距离最大的两点之间的距离通常为1.5-15厘米,优选为5-12厘米。本发明的异形半导体晶片相邻边形成的角部处的过渡圆弧(图6的A部分)的半径在2.5-5mm的范围内,优选在3-4.5mm的范围内。 The distance between the two points on the surface of the profiled semiconductor wafer of the present invention having the largest linear distance is usually from 1.5 to 15 cm, preferably from 5 to 12 cm. The radius of the transition arc (portion A of Fig. 6) at the corner formed by the adjacent side of the profiled semiconductor wafer of the present invention is in the range of 2.5 - 5 mm, preferably in the range of 3 - 4.5 mm.
优选的是,本发明的异形半导体晶片在光照下目测,晶片表面无颗粒、无白雾。并且晶片表面总的金属残余量≤100×1010原子/cm2Preferably, the shaped semiconductor wafer of the present invention is visually observed under illumination, and the surface of the wafer is free of particles and white fog. And the total metal residual amount on the surface of the wafer is ≤ 100 × 10 10 atoms/cm 2 .
在本发明异形半导体晶片的一个优选实施方案中,所述异形半导体晶片为硅晶片、锗晶片、IIIA-VA族半导体晶片(即由IIIA族和VA族元素形成的半导体晶片,例如砷化镓晶片、磷化铟晶片或磷化镓晶片)、碳化硅晶片以及蓝宝石(主要成分为氧化铝)晶片等。In a preferred embodiment of the shaped semiconductor wafer of the present invention, the shaped semiconductor wafer is a silicon wafer, a germanium wafer, a IIIA-VA semiconductor wafer (ie, a semiconductor wafer formed of Group IIIA and VA elements, such as a gallium arsenide wafer) , indium phosphide wafer or gallium phosphide wafer), silicon carbide wafer, and sapphire (mainly alumina) wafers.
在本发明异形半导体晶片的一个优选实施方案中,所述异形半导体晶片为单晶晶片,优选地,所述单晶晶片为硅晶片、锗晶片、砷化镓晶片、磷化铟晶片或磷化镓晶片或碳化硅晶片。In a preferred embodiment of the shaped semiconductor wafer of the present invention, the shaped semiconductor wafer is a single crystal wafer. Preferably, the single crystal wafer is a silicon wafer, a germanium wafer, a gallium arsenide wafer, an indium phosphide wafer or a phosphating. Gallium wafer or silicon carbide wafer.
在本发明异形半导体晶片的一个优选实施方案中,所述异形半导体晶片为方形晶片,例如正方形或长方形晶片。In a preferred embodiment of the shaped semiconductor wafer of the present invention, the profiled semiconductor wafer is a square wafer, such as a square or rectangular wafer.
在本发明异形半导体晶片的一个更优选的实施方案中,所述异形半导体晶片为方形晶片,且所述方形晶片的主面尺寸在10-110mm×10-110mm范围内,四个角的内接圆半径R在2.5-5mm范围内,四个直边的晶向全部为<100>或全部为<110>,晶片厚度在280-700微米范围内。In a more preferred embodiment of the shaped semiconductor wafer of the present invention, the shaped semiconductor wafer is a square wafer, and the main surface size of the square wafer is in the range of 10-110 mm×10-110 mm, and the four corners are inscribed. The radius R of the circle is in the range of 2.5-5 mm, the crystal directions of the four straight sides are all <100> or all <110>, and the thickness of the wafer is in the range of 280-700 μm.
另外,本发明还提供了本发明的异形半导体晶片在太阳能电池中的用途。In addition, the present invention also provides the use of the shaped semiconductor wafer of the present invention in a solar cell.
为更好地理解本发明,下文将结合实施例对本发明进行详细描述,但应认识到这些实施例仅为对本发明进行示例说明,而非意在限制本发明。The invention is described in detail below with reference to the preferred embodiments of the invention.
实施例Example
在各实施例中,采用图3所示的研磨和抛光机(上下盘直径1.0米)实施研磨和抛光,其中R1和R2为转动轴,11为研磨液或抛光液管,12为设备上盘,13为设备下盘,14为晶片和支承垫,16为研磨垫或抛光垫(研磨垫为购自美国环球光学公司Universal Optics Co.Ltd的聚酯类研磨垫,牌号为LPS研磨垫,肖氏硬度50,动态可压缩性20%;粗抛光垫为购自美国Rohm and Hass Inc.公司的聚氨酯抛光垫,牌号Suba-X Pad,肖氏硬度51,动态可压缩性15%;精抛光垫为购自美国Rohm and Hass Inc.公司的聚氨酯抛光垫,牌号POLITEX Pad,肖氏硬度51,动态可压缩性15%。下盘也有研磨垫和抛光垫,与上盘的相同,位于晶片和支承垫之下,未示出)。支 承垫、研磨垫和抛光垫直径为1米;支承垫用于承载晶片的4个孔位于半径方向的中部,沿圆周方向均匀分布。In each of the examples, the grinding and polishing machine (the diameter of the upper and lower discs of 1.0 m) shown in Fig. 3 was used for grinding and polishing, wherein R1 and R2 were rotating shafts, 11 was a slurry or a polishing liquid tube, and 12 was a device tray. 13 is the lower plate of the device, 14 is the wafer and the support pad, and 16 is the polishing pad or polishing pad (the polishing pad is a polyester polishing pad available from Universal Optics Co. Ltd., USA, under the designation LPS polishing pad, Xiao Hardness 50, dynamic compressibility 20%; rough polishing pad is polyurethane polishing pad from Rohm and Hass Inc., USA, grade Suba-X Pad, Shore hardness 51, dynamic compressibility 15%; fine polishing pad It is a polyurethane polishing pad from Rohm and Hass Inc. of the United States, brand POLITEX Pad, Shore hardness 51, dynamic compressibility of 15%. The lower plate also has polishing pad and polishing pad, the same as the upper plate, located on the wafer and support Under the pad, not shown). Branch The lining, the polishing pad and the polishing pad have a diameter of 1 m; the four holes of the support pad for carrying the wafer are located in the middle of the radial direction and are evenly distributed in the circumferential direction.
研磨液采用日本Fujimi CorporationFujimi 20T三氧化二铝研磨粉和水的混合液,重量比为1:1,研磨过程中的研磨液流量为每分钟90毫升/平方米设备盘面积(单面计)。The polishing liquid was a mixture of Japanese Fujimi Corporation Fujimi 20T alumina trioxide grinding powder and water at a weight ratio of 1:1, and the flow rate of the polishing liquid during the grinding was 90 ml/m 2 of equipment disc area (single-sided meter).
实施例使用的支承垫为市售产品,按肖氏硬度和动态可压缩性选择,必要时经过放置或老化,以获得所示的特征参数。The support pads used in the examples were commercially available products, selected according to Shore hardness and dynamic compressibility, placed or aged as necessary to obtain the characteristic parameters shown.
如无相反说明,则所制备的异形半导体晶片的检测条件如下(所测晶片表面为在抛光机中朝上的一面):If not stated to the contrary, the test conditions of the prepared shaped semiconductor wafer are as follows (the surface of the wafer to be tested is the upward side in the polishing machine):
1.用TXRF(反射X射线荧光分析仪;TREX 610型,日本OSAKA Japan Technos公司)检测经湿法清洗处理的方形晶片的表面痕量总的金属原子的残余量,合格标准为≤100×1010原子/cm21. Using TXRF (Reflective X-ray Fluorescence Analyzer; TREX Model 610, OSAKA Japan Technos, Japan) to detect the residual amount of total metal atoms on the surface of the wet-cleaned square wafer, the qualification standard is ≤100×10 10 atoms/cm 2 ;
2.用AFM(原子力显微镜)(美国Digital Instrument公司NanoScopeIIIa型)(垂直分辨率0.03纳米,分析区域5μm×5μm)测试晶片的表面粗糙度Ra,以纳米表示;2. The surface roughness Ra of the wafer was measured by AFM (Atomic Force Microscopy) (NanoScope IIIa type of Digital Instrument Company, USA) (vertical resolution 0.03 nm, analysis area 5 μm×5 μm), expressed in nanometers;
3.以目测无裂纹的晶片作为合格产品,除以处理的晶片总数,乘以100%表示成品率;3. Visually test the crack-free wafer as a qualified product, divide by the total number of processed wafers, multiply by 100% to indicate the yield;
4.用Ultrasort Instrument(平整度测试仪Tropel,生产商美国Corning TropelCorperation)测试抛光后晶片的平整度参数,以TTV(总体厚度变化)≤7μm,LTV(局部厚度变化)≤1.5μm@15X15mm区域内,WARP(翘曲度)≤10μm,Bow(弯曲度)≤5μm表示合格(以“√”表示);4. Test the flatness parameters of the polished wafer with Ultrasort Instrument (Tropel, manufacturer Corning TropelCorperation), with TTV (total thickness variation) ≤ 7 μm, LTV (local thickness variation) ≤ 1.5 μm @ 15X15 mm , WARP (warpage) ≤ 10μm, Bow (bend) ≤ 5μm means qualified (indicated by "√");
5.于日本SYNTEC Inc.公司产Yamada强光灯(光强大于100,000Lux)下目测是否有白雾;5. Visually check for white fog under the Yamada glare (lighter than 100,000 Lux) produced by SYNTEC Inc. of Japan;
6.晶片厚度用接触式测厚仪(日本Mitutoyo,型号:ID-C112ED)检测;6. Wafer thickness is measured by a contact thickness gauge (Mitutoyo, Japan, model: ID-C112ED);
7.Tencor 6220(表面颗粒度测试仪生产商美国KLA-Tencor公司)在0.3微米阈值条件下测试晶片表面的颗粒度,≤1颗/平方厘米表示合格(标为“无”)。7. Tencor 6220 (KLA-Tencor, Inc., manufacturer of surface particle size testers) tested the graininess of the wafer surface under a 0.3 micron threshold condition, ≤ 1 particle/cm 2 for pass (labeled "None").
在多个晶片的情况下,数值取平均值。In the case of a plurality of wafers, the values are averaged.
实施例1 Example 1
由一个直径5.1厘米的GaAs圆形晶棒用多线切割机一次切出50片(按15、15、10、10片分成第1-4组)厚度相同的圆形晶片,厚度均为450微米;使用倒角机对各片圆形晶片进行边缘倒角处理,使其边缘截面成为弧形。然后,将该晶片解理成3.5×3.5厘米的正方形晶片;使用类似于附图2所示的四边形晶片磨边机对正方形晶片进行磨边处理;然后将晶片放置在280微米厚度、如图4所示的支承垫(型号为Carrier-9B-50,购自江苏江阴晶科电子研磨材料厂,经过发明人自行加工,形成图4所示的内腔,内腔直边延长线相交形成3.5×3.5厘米的正方形(对角线约4.95厘米),直边延长线相交形成的各个角部处还具有外凸部分,各外凸部分与相邻各直边以过渡圆弧连接),其肖氏硬度为55,动态压缩弹性率为75%。在0.08千克/平方厘米压力下进行双面研磨加工30分钟,消除切片工序带来的锯纹损伤,其中,下盘逆时针旋转,转速为10转/分钟,上盘顺时针旋转,转速为4转/分钟。然后,先将表2所示的粗抛光溶液用于该抛光设备,在表2所示粗抛条件下抛光60分钟,用去离子水(电阻率大于17.5兆欧姆·厘米----按25℃的值,下同)清洗后,干燥,再将表3所示的精抛光溶液用于该抛光设备,在表3所示精抛条件下抛光6分钟,然后将晶片取出,用去离子水清洗后,干燥;按下述进行表面湿法清洗处理:1.在10℃,将晶片在含有0.3重量%NH3、1.3重量%过氧化氢的水溶液中浸渍5分钟,2.在10℃,用去离子水冲洗晶片表面3分钟,3.在20℃,将晶片用10重量%过氧化氢溶液浸渍5分钟,4.在15℃,用去离子水冲洗晶片表面3分钟,5.在20℃,将晶片用10重量%氨水溶液浸渍5分钟,6.在15℃,用去离子水冲洗晶片表面3分钟,7.将晶片放入晶片旋转干燥机中用热氮气干燥。50 wafers (divided into groups 1-4 according to 15, 15, 10, 10 sheets) were cut by a multi-line cutter from a 5.1 cm diameter GaAs circular ingot at a thickness of 450 μm. The chamfering machine is used to perform edge chamfering on each of the circular wafers so that the edge sections thereof are curved. The wafer was then cleaved into a 3.5 x 3.5 cm square wafer; the square wafer was edging using a quadrilateral wafer edger similar to that shown in Figure 2; the wafer was then placed at a thickness of 280 microns, as shown in Figure 4. The support pad (Model Carrier-9B-50, purchased from Jiangsu Jiangyin Jingke Electronic Abrasive Material Factory, processed by the inventor to form the inner cavity shown in Figure 4, the straight line extension of the inner cavity intersected to form 3.5 × 3.5 cm The square (diagonal about 4.95 cm), each corner formed by the intersection of the straight edge extension lines also has a convex portion, and each convex portion is connected with the adjacent straight sides by a transition arc, and the Shore hardness is 55, the dynamic compression modulus is 75%. Double-side grinding at a pressure of 0.08 kg/cm 2 for 30 minutes to eliminate the scratch damage caused by the slicing process, in which the lower plate rotates counterclockwise, the rotation speed is 10 rpm, the upper plate rotates clockwise, and the rotation speed is 4 Transfer / minute. Then, the coarse polishing solution shown in Table 2 was first used in the polishing apparatus, and polished under the rough polishing conditions shown in Table 2 for 60 minutes, using deionized water (resistivity greater than 17.5 megaohm·cm----25 After the value of °C, the same as below), after drying, the polishing solution shown in Table 3 was applied to the polishing apparatus, and polished under the fine polishing conditions shown in Table 3 for 6 minutes, and then the wafer was taken out, and deionized water was used. After washing, drying; surface wet cleaning treatment as follows: 1. Dip the wafer in an aqueous solution containing 0.3% by weight of NH3 and 1.3% by weight of hydrogen peroxide at 10 ° C for 5 minutes, 2. at 10 ° C, Rinse the wafer surface with deionized water for 3 minutes. 3. Dip the wafer with 10% by weight hydrogen peroxide solution for 5 minutes at 20 ° C. 4. Rinse the wafer surface with deionized water for 3 minutes at 15 ° C. 5. At 20 ° C The wafer was immersed with a 10% by weight aqueous ammonia solution for 5 minutes. 6. At 15 ° C, the wafer surface was rinsed with deionized water for 3 minutes. 7. The wafer was placed in a wafer rotary dryer and dried with hot nitrogen.
对所制备的GaAs方形半导体晶片进行检测,结果见表4-5。 The prepared GaAs square semiconductor wafer was examined, and the results are shown in Table 4-5.
表2粗抛光溶液的组成及抛光条件Table 2 Composition and polishing conditions of the crude polishing solution
Figure PCTCN2016081199-appb-000002
Figure PCTCN2016081199-appb-000002
表3精抛光溶液的组成及抛光条件Table 3 Composition of polishing solution and polishing conditions
Figure PCTCN2016081199-appb-000003
Figure PCTCN2016081199-appb-000003
表4晶片粗抛光和精抛光后的检测结果(平均)Table 4 Test results after rough polishing and fine polishing of wafers (average)
Figure PCTCN2016081199-appb-000004
Figure PCTCN2016081199-appb-000004
表5经表面湿法清洗处理的GaAs方形晶片表面(平均)Table 5 Surface of GaAs square wafers treated by surface wet cleaning (average)
Figure PCTCN2016081199-appb-000005
Figure PCTCN2016081199-appb-000005
*:表示1.6×1010,下同。*: indicates 1.6 × 10 10 , the same below.
实施例2Example 2
由一个直径10.5厘米的InP圆形晶棒用多线切割机一次切出50片(按15、15、10、10片分成第1-4组)厚度相同的圆形晶片,厚度均为650微米;使用倒角机对各片圆形晶片进行边缘倒角处理,使其边缘截面成为弧形。然后,将该晶片解理成7.0×7.0厘米的正方形晶片(对角线9.9厘米);使用类似于附图2所示的四边形晶片磨边机对正方形晶片进行磨边处理,获得合适的边缘形状;然后将经倒角的晶片放置在360微米厚度、如图4所示的支承垫(型号为Carrier-9B-50,购自江苏江阴晶科电子研磨材料厂,经过发明人自行加工,形成图4所示的内腔,内腔直边延长线相交形成7.0×7.0厘米的正方形,直边延长线相交形成的各个角部处还具有外凸部分,各外凸部分与相邻各直边以过渡圆弧连接),其肖氏硬度为50,动态压缩弹性率为85%。在0.07千克/平方厘米压力下进行双面研磨加工30分钟,消除切片工序带来的锯纹损伤,其中,下盘逆时针旋转,转速为10转/分钟,上盘顺时针旋转,转速为4转/分钟。然后,将液体Fujimi INSEC SP抛光磨料用于该抛光设备,在表6所示粗抛条件下抛光55分钟,用去离子水清洗后,干燥,再将Fujimi COMPOL 80抛光液用于该抛光设备,在表7所示精抛条件下抛光8分钟,然后晶片取出,用去离子水清洗后,干燥;按下述进行表面湿法清洗处理:50 wafers (divided into groups 1-4 according to 15, 15, 10, 10 sheets) were cut out by a multi-line cutter from a 10.5 cm diameter InP round ingot at a thickness of 650 μm. The chamfering machine is used to perform edge chamfering on each of the circular wafers so that the edge sections thereof are curved. The wafer was then cleaved into a 7.0 x 7.0 cm square wafer (diagonal 9.9 cm); the square wafer was edging using a quadrilateral wafer edger similar to that shown in Figure 2 to obtain a suitable edge shape; The chamfered wafer was placed in a support pad of 360 μm thickness as shown in Fig. 4 (Model Carrier-9B-50, purchased from Jiangsu Jiangyin Jingke Electronic Abrasive Material Factory, and processed by the inventor to form Figure 4 In the inner cavity, the straight line extension lines of the inner cavity intersect to form a square of 7.0×7.0 cm, and the corners formed by the intersection of the straight edge extension lines further have convex portions, and the outer convex portions and the adjacent straight sides have a transition circle. Arc connection), with a Shore hardness of 50 and a dynamic compression modulus of 85%. Double-side grinding at a pressure of 0.07 kg/cm 2 for 30 minutes to eliminate the scratch damage caused by the slicing process, in which the lower plate rotates counterclockwise, the rotation speed is 10 rpm, the upper plate rotates clockwise, and the rotation speed is 4 Transfer / minute. Then, a liquid Fujimi INSEC SP polishing abrasive was used for the polishing apparatus, polished for 55 minutes under the rough polishing conditions shown in Table 6, washed with deionized water, dried, and then used with the Fujimi COMPOL 80 polishing liquid for the polishing apparatus. It was polished for 8 minutes under the fine polishing conditions shown in Table 7, and then the wafer was taken out, washed with deionized water, and dried; the surface wet cleaning treatment was carried out as follows:
(1)将待洗晶片浸入92重量%的浓硫酸中于65℃处理4秒;(1) immersing the wafer to be washed in 92% by weight of concentrated sulfuric acid at 65 ° C for 4 seconds;
(2)将上述晶片取出然后浸入98重量%浓硫酸中于25℃处理2秒;(2) taking the above wafer and then immersing it in 98% by weight concentrated sulfuric acid at 25 ° C for 2 seconds;
(3)然后于20℃,将晶片放入冲洗槽中,用去离子水冲洗晶片表面55秒;(3) then at 20 ° C, the wafer is placed in the rinse tank, rinse the surface of the wafer with deionized water for 55 seconds;
(4)将冲洗过的晶片浸入8重量%的柠檬酸溶液中于25℃处理30秒;(4) immersing the rinsed wafer in an 8 wt% citric acid solution at 25 ° C for 30 seconds;
(5)然后将晶片放入冲洗槽中,于20℃,用去离子水冲洗晶片表面20 秒;(5) The wafer is then placed in a rinse tank and the wafer surface is rinsed with deionized water at 20 °C. second;
(6)将冲洗过的晶片浸入NH4OH-H2O2溶液(H2O2:NH4OH:H2O的重量比为1:2:7)中于25℃处理5秒;(6) immersing the rinsed wafer in a NH 4 OH-H 2 O 2 solution (H 2 O 2 :NH 4 OH:H 2 O in a weight ratio of 1:2:7) at 25 ° C for 5 seconds;
(7)然后于20℃,将晶片放入冲洗槽中,用去离子水冲洗晶片表面30秒;(7) then at 20 ° C, the wafer is placed in the rinse tank, rinse the surface of the wafer with deionized water for 30 seconds;
(8)将冲洗后的晶片放入晶片旋转干燥机中用热氮气(70℃)干燥15分钟。(8) The rinsed wafer was placed in a wafer rotary dryer and dried with hot nitrogen (70 ° C) for 15 minutes.
结果见表8-9。The results are shown in Table 8-9.
表6粗抛光条件Table 6 rough polishing conditions
Figure PCTCN2016081199-appb-000006
Figure PCTCN2016081199-appb-000006
表7精抛光条件Table 7 fine polishing conditions
Figure PCTCN2016081199-appb-000007
Figure PCTCN2016081199-appb-000007
表8晶片粗抛光和精抛光后的检测结果(平均)Table 8 Test results after rough polishing and fine polishing of wafers (average)
Figure PCTCN2016081199-appb-000008
Figure PCTCN2016081199-appb-000008
表9经表面湿法清洗处理的InP方形晶片表面(平均)Table 9 InP square wafer surface treated by surface wet cleaning (average)
Figure PCTCN2016081199-appb-000009
Figure PCTCN2016081199-appb-000009
实施例3Example 3
由一个直径12厘米的Si圆形晶棒用多线切割机一次切出50片(按15、15、10、10片分成第1-4组)厚度相同的圆形晶片,厚度均为480微米;使用倒角机对各片圆形晶片进行边缘倒角处理,使其边缘截面成为弧形。然后,将该晶片解理成8.2×8.2厘米的正方形晶片(对角线约11.6厘米);使用类似于附图2所示的四边形晶片磨边机对正方形晶片进行磨边处理,获得合适的边缘形状;然后将经倒角的晶片放置在290微米厚度、如图4所示的支承垫(购自美国PR HORRMAN公司的Lexan型支撑垫,经过发明人自行加工,形成图4所示的内腔,内腔直边延长线相交形成8.2×8.2厘米的正方形,直边延长线相交形成的各个角部处还具有外凸部分,各外凸部分与相邻各直边以过渡圆弧连接),其肖氏硬度为45,动态压缩弹性率为90%。在0.10千克/平方厘米压力下进行双面研磨加工30分钟,消除切片工序带来的锯纹损伤,其中,下盘逆时针旋转,转速为10转/分钟,上盘顺时针旋转,转速为4转/分钟。然后,将购自美国的Nalco 2371抛光液用于该抛光设备,在表10所示粗抛条件下抛光25分钟,用去离子水清洗后,干燥,再将购自美国的Rodel LS-10抛光液用于该抛光设备,在表11所示精抛条件下抛光12分钟,然后将晶片取出,水洗,干燥;按下述进行表面湿法清洗处理:50 wafers (divided into groups 1-4 according to 15, 15, 10, 10 sheets) were cut by a multi-line cutter from a 12-cm diameter Si circular ingot at a thickness of 480 μm. The chamfering machine is used to perform edge chamfering on each of the circular wafers so that the edge sections thereof are curved. The wafer was then cleaved into a 8.2 x 8.2 cm square wafer (diagonal about 11.6 cm); the square wafer was edging using a quadrilateral wafer edger similar to that shown in Figure 2 to obtain a suitable edge shape; The chamfered wafer was then placed in a 290 micron thick support pad as shown in Figure 4 (a Lexan type support pad from PR HORRMAN, USA, which was processed by the inventor to form the inner cavity shown in Figure 4, The straight line extension lines intersect to form a square of 8.2×8.2 cm, and the corners formed by the intersection of the straight side extension lines also have convex portions, and the outer convex portions are connected with the adjacent straight sides by a transition arc. The hardness is 45 and the dynamic compression modulus is 90%. Double-side grinding at a pressure of 0.10 kg/cm 2 for 30 minutes to eliminate the scratch damage caused by the slicing process, in which the lower plate rotates counterclockwise, the rotation speed is 10 rpm, the upper plate rotates clockwise, and the rotation speed is 4 Transfer / minute. Then, Nalco 2371 polishing liquid purchased from the United States was used for the polishing apparatus, polished for 25 minutes under the rough polishing conditions shown in Table 10, washed with deionized water, dried, and then polished by Rodel LS-10 from the United States. The liquid was used in the polishing apparatus, and polished under the fine polishing conditions shown in Table 11 for 12 minutes, and then the wafer was taken out, washed with water, and dried; the surface wet cleaning treatment was carried out as follows:
第一步,使用的试剂由H2SO4-H2O2-H2O组成(其中H2SO4:H2O2:H2O的体积比为1:3:2,H2SO4和H2O2按各在室温的下形成饱和溶液计,下同),在115℃温度下对硅片进行清洗150秒;In the first step, the reagent used consists of H 2 SO 4 -H 2 O 2 -H 2 O (wherein the volume ratio of H 2 SO 4 :H 2 O 2 :H 2 O is 1:3:2, H 2 SO 4 and H 2 O 2 according to each of the formation of a saturated solution at room temperature, the same below), the silicon wafer is washed at a temperature of 115 ° C for 150 seconds;
第二步,使用的试剂由H2SO4-H2O2-H2O组成,三者的体积比为1:1:5,清洗时的温度为75℃,历时75秒;In the second step, the reagent used is composed of H 2 SO 4 -H 2 O 2 -H 2 O, the volume ratio of the three is 1:1:5, and the temperature at the time of washing is 75 ° C for 75 seconds;
第三步,采用15重量%氢氟酸(HF)清洗,于23℃处理30秒; The third step is to wash with 15% by weight of hydrofluoric acid (HF) and treat at 23 ° C for 30 seconds;
第四步,采用HCl-H2O2-H2O组成混合液(三种物质的摩尔比例由1:1:6),于75℃处理90秒。In the fourth step, a mixture of HCl-H 2 O 2 -H 2 O was used (the molar ratio of the three substances was 1:1:6), and the treatment was carried out at 75 ° C for 90 seconds.
第五步,用去离子水冲洗3分钟。In the fifth step, rinse with deionized water for 3 minutes.
然后烘干,检测。检测结果见表12和13。Then dry and test. The test results are shown in Tables 12 and 13.
表10粗抛光条件Table 10 rough polishing conditions
Figure PCTCN2016081199-appb-000010
Figure PCTCN2016081199-appb-000010
表11精抛光条件Table 11 fine polishing conditions
Figure PCTCN2016081199-appb-000011
Figure PCTCN2016081199-appb-000011
表12粗抛光和精抛光后的检测结果(平均)Table 12 Test results after rough polishing and fine polishing (average)
Figure PCTCN2016081199-appb-000012
Figure PCTCN2016081199-appb-000012
表13经表面湿法清洗处理的Si方形晶片表面(平均)Table 13 Surface of Si square wafers treated by surface wet cleaning (average)
Figure PCTCN2016081199-appb-000013
Figure PCTCN2016081199-appb-000013
对比实施例4Comparative Example 4
取实施例1的晶片1片重复实施例1(按第4组条件),但是在双面研磨步骤采用圆孔内腔(圆孔的最大内接正方形边长等于晶片边长)的支承垫,发现研磨步骤结束后,晶片破裂,不再进行后续步骤。Taking the wafer 1 of Example 1 and repeating Example 1 (according to Group 4 conditions), but in the double-side grinding step, a support pad having a circular hole cavity (the maximum inscribed square side length of the circular hole is equal to the wafer side length) is used. It was found that after the end of the grinding step, the wafer broke and no further steps were performed.
对比实施例5Comparative Example 5
取实施例2的晶片1片重复实施例2(按第4组条件),但是在机械抛光步骤采用圆孔内腔(圆孔的最大内接正方形边长等于晶片边长)的支承垫,发现机械化学抛光步骤结束后,晶片破裂,不再进行后续步骤。Taking the wafer 1 of Example 2 and repeating Example 2 (according to the fourth group condition), but in the mechanical polishing step, the support pad of the circular hole cavity (the maximum inscribed square side length of the circular hole is equal to the wafer side length) was found. After the mechanochemical polishing step, the wafer is broken and no further steps are performed.
对比实施例6Comparative Example 6
取实施例3的晶片1片重复实施例3(按第4组条件),但是在机械抛光步骤采用圆孔内腔(圆孔的最大内接正方形边长等于晶片边长)的支承垫,发现机械化学抛光步骤结束后,晶片破裂,不再进行后续步骤。Taking the wafer 1 of Example 3 and repeating Example 3 (according to the fourth group condition), but in the mechanical polishing step, the support pad of the circular hole cavity (the maximum inscribed square side length of the circular hole is equal to the wafer side length) was found. After the mechanochemical polishing step, the wafer is broken and no further steps are performed.
对比实施例7Comparative Example 7
重复实施例1第4组的实验,但是采用肖氏硬度为85,动态压缩弹性率为5%的支承垫。发现研磨结束时,晶片破裂。The experiment of Group 4 of Example 1 was repeated, but using a support pad having a Shore hardness of 85 and a dynamic compression modulus of 5%. The wafer was found to be broken at the end of the grinding.
对比实施例8Comparative Example 8
重复实施例2第4组的实验,但是采用肖氏硬度为20,动态压缩弹性率为120%的支承垫。发现研磨结束时,晶片破裂。The experiment of Group 4 of Example 2 was repeated, but using a support pad having a Shore hardness of 20 and a dynamic compression modulus of 120%. The wafer was found to be broken at the end of the grinding.
虽然已参照特定实施方案对本发明进行了说明,但本领域技术人员应认识到的是,在不偏离本发明主旨和范围的情况下,可对所述实施方案进行改变或改进,本发明范围通过所附权利要求书限定。 Although the present invention has been described with reference to the specific embodiments thereof, those skilled in the art will recognize that the embodiments may be changed or modified without departing from the spirit and scope of the invention. The appended claims are defined.

Claims (10)

  1. 一种制备异形半导体晶片的方法,该方法包括以下步骤:A method of preparing a profiled semiconductor wafer, the method comprising the steps of:
    (1)提供一种异形晶片原片;(1) providing an original wafer of a shaped wafer;
    (2)对晶片原片进行磨边处理;(2) edging the original wafer;
    (3)对磨边处理后的晶片进行表面研磨加工,其中晶片置于一个支承垫的内腔中,支承垫的内腔具有多个直边,各直边延长线相交形成异形形状,内腔在各直边延长线相交形成的各个角部处还具有外凸部分,各外凸部分与相邻各直边以过渡圆弧连接,所述晶片的形状与内腔的形状匹配;(3) performing surface grinding processing on the edging processed wafer, wherein the wafer is placed in a cavity of a supporting pad, the inner cavity of the supporting pad has a plurality of straight sides, and the straight edge extension lines intersect to form an irregular shape, the inner cavity Each of the corner portions formed by the intersection of the straight edge extension lines further has a convex portion, and each of the outer convex portions is connected with the adjacent straight sides by a transition arc, and the shape of the wafer matches the shape of the inner cavity;
    (4)对异形支承垫内的晶片进行粗抛光,然后进行精抛光。(4) The wafer in the profiled support pad is roughly polished and then polished.
  2. 根据权利要求1的制备异形半导体晶片的方法,还包括对精抛光后的晶片进行表面清洗处理。The method of producing an odd-shaped semiconductor wafer according to claim 1, further comprising subjecting the polished wafer to a surface cleaning treatment.
  3. 根据权利要求1的制备异形半导体晶片的方法,其中,步骤(1)中所述晶片材料为硅晶体、锗晶体、IIIA-VA族半导体晶体、碳化硅晶体以及蓝宝石晶体。A method of producing an odd-shaped semiconductor wafer according to claim 1, wherein said wafer material in the step (1) is a silicon crystal, a germanium crystal, a IIIA-VA semiconductor crystal, a silicon carbide crystal, and a sapphire crystal.
  4. 根据权利要求1-3之一的制备异形半导体晶片的方法,其中所述支承垫的肖氏硬度为35-60,优选40-55;动态可压缩性为60-100%,优选70-95%。。A method of producing a shaped semiconductor wafer according to any one of claims 1 to 3, wherein said support pad has a Shore hardness of 35-60, preferably 40-55; and a dynamic compressibility of 60-100%, preferably 70-95% . .
  5. 根据权利要求1的制备异形半导体晶片的方法,其中,在步骤(1)切割之后,还进行步骤(1’):对步骤(1)得到的晶片进行边缘倒角处理,使晶片边缘获得合适的圆弧或坡度。A method of producing an odd-shaped semiconductor wafer according to claim 1, wherein, after the step (1) is cut, step (1') is further performed: edge-chamfering the wafer obtained in the step (1) to obtain a suitable edge of the wafer Arc or slope.
  6. 根据权利要求1的制备异形半导体晶片的方法,其中在实施步骤(3)和(4)时,支承垫内腔的对角线与研磨、抛光设备的半径重合,或内腔的至少一个直边与轮半径重合。A method of fabricating a profiled semiconductor wafer according to claim 1 wherein, in performing steps (3) and (4), the diagonal of the inner surface of the support pad coincides with the radius of the polishing and polishing apparatus, or at least one straight side of the inner cavity Coincides with the radius of the wheel.
  7. 一种用于晶片加工的支承垫,具有至少一个异形内腔,所述内腔具有多个直边,各直边延长线相交形成异形形状,内腔在各直边延长线相交形成的各个角部处还具有外凸部分,各外凸部分与相邻各直边以过渡圆弧连接。A support pad for wafer processing, having at least one shaped inner cavity, the inner cavity having a plurality of straight sides, each straight edge extension line intersecting to form a profiled shape, and the inner cavity is formed at each corner formed by the intersection of the straight edge extension lines The portion also has a convex portion, and each of the convex portions is connected to the adjacent straight sides by a transition arc.
  8. 根据权利要求7的用于晶片加工的支承垫,其中支承垫的厚度T为250-850微米。A support pad for wafer processing according to claim 7, wherein the support pad has a thickness T of from 250 to 850 m.
  9. 根据权利要求7或8的用于晶片加工的支承垫,其肖氏硬度为35-60,优选40-55;动态可压缩性为60-100%,优选70-95%。A support pad for wafer processing according to claim 7 or 8, which has a Shore hardness of 35-60, preferably 40-55; and a dynamic compressibility of 60-100%, preferably 70-95%.
  10. 一种异形半导体晶片,其表面平整度按以弯曲度计,整体平整度/晶片对角线长度的比值计为0.025-0.075μm/mm,优选0.03-0.065μm/mm。优选地,其表面微粗糙度Ra不高于0.5纳米。 A profiled semiconductor wafer having a surface flatness of 0.025 to 0.075 μm/mm, preferably 0.03 to 0.065 μm/mm, in terms of a ratio of overall flatness/wafer diagonal length in terms of curvature. Preferably, the surface micro-roughness Ra is not higher than 0.5 nm.
PCT/CN2016/081199 2015-05-13 2016-05-06 Special-shaped semiconductor wafer, manufacturing method and wafer carrier WO2016180273A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201510242648.4A CN105161397B (en) 2015-05-13 2015-05-13 A kind of abnormity semiconductor wafer, preparation method and wafer supporting pad
CN201510242648.4 2015-05-13

Publications (1)

Publication Number Publication Date
WO2016180273A1 true WO2016180273A1 (en) 2016-11-17

Family

ID=54802218

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2016/081199 WO2016180273A1 (en) 2015-05-13 2016-05-06 Special-shaped semiconductor wafer, manufacturing method and wafer carrier

Country Status (2)

Country Link
CN (1) CN105161397B (en)
WO (1) WO2016180273A1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113207310A (en) * 2019-11-29 2021-08-03 Jx金属株式会社 Indium phosphide substrate, semiconductor epitaxial wafer, and method for producing indium phosphide substrate
CN113207308A (en) * 2019-11-29 2021-08-03 Jx金属株式会社 Indium phosphide substrate, semiconductor epitaxial wafer, and method for producing indium phosphide substrate

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105161397B (en) * 2015-05-13 2019-02-05 北京通美晶体技术有限公司 A kind of abnormity semiconductor wafer, preparation method and wafer supporting pad
CN107088793B (en) * 2017-06-12 2019-02-19 中国电子科技集团公司第二十六研究所 A kind of SAW device single-sided polishing substrate piece preparation method
CN110631304A (en) * 2019-11-01 2019-12-31 中国电子科技集团公司第四十六研究所 Cooling device and cooling method of deionized water for germanium single crystal wafer

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080138721A1 (en) * 2006-12-06 2008-06-12 Ohara Inc. Substrate and method of fabricating the same
CN101226904A (en) * 2008-01-24 2008-07-23 上海申和热磁电子有限公司 Silicon slice with asymmetry edge contour and manufacturing method thereof
JP2009178780A (en) * 2008-01-29 2009-08-13 Seiko Instruments Inc Carrier, device and method of grinding wafer, piezoelectric transducer and its manufacturing method, oscillator, electric instrument and atomic clock
CN101510767A (en) * 2008-02-14 2009-08-19 精工电子有限公司 Wafer and polishing device and method, piezoelectric vibrating piece, method and apparatus for fabricating piezoelectric vibrating piece
JP2014028411A (en) * 2012-07-31 2014-02-13 Kyocera Crystal Device Corp Carrier for polishing
CN105161397A (en) * 2015-05-13 2015-12-16 北京通美晶体技术有限公司 Special-shaped semiconductor wafer, preparation method and wafer support pad

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN201736114U (en) * 2010-06-22 2011-02-09 嘉兴海盛电子有限公司 Planetary piece
JP5619559B2 (en) * 2010-10-12 2014-11-05 株式会社ディスコ Processing equipment
CN201881228U (en) * 2010-10-19 2011-06-29 北京通美晶体技术有限公司 Polygonal wafer grinder
CN102875769A (en) * 2011-07-15 2013-01-16 株式会社Lg化学 Poly-urethane resin composition and poly-urethane mounting pad
CN103331661B (en) * 2013-06-06 2015-09-16 燕山大学 The high-accuracy twin grinder of electrical servo

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080138721A1 (en) * 2006-12-06 2008-06-12 Ohara Inc. Substrate and method of fabricating the same
CN101226904A (en) * 2008-01-24 2008-07-23 上海申和热磁电子有限公司 Silicon slice with asymmetry edge contour and manufacturing method thereof
JP2009178780A (en) * 2008-01-29 2009-08-13 Seiko Instruments Inc Carrier, device and method of grinding wafer, piezoelectric transducer and its manufacturing method, oscillator, electric instrument and atomic clock
CN101510767A (en) * 2008-02-14 2009-08-19 精工电子有限公司 Wafer and polishing device and method, piezoelectric vibrating piece, method and apparatus for fabricating piezoelectric vibrating piece
JP2014028411A (en) * 2012-07-31 2014-02-13 Kyocera Crystal Device Corp Carrier for polishing
CN105161397A (en) * 2015-05-13 2015-12-16 北京通美晶体技术有限公司 Special-shaped semiconductor wafer, preparation method and wafer support pad

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113207310A (en) * 2019-11-29 2021-08-03 Jx金属株式会社 Indium phosphide substrate, semiconductor epitaxial wafer, and method for producing indium phosphide substrate
CN113207308A (en) * 2019-11-29 2021-08-03 Jx金属株式会社 Indium phosphide substrate, semiconductor epitaxial wafer, and method for producing indium phosphide substrate

Also Published As

Publication number Publication date
CN105161397B (en) 2019-02-05
CN105161397A (en) 2015-12-16

Similar Documents

Publication Publication Date Title
WO2016180273A1 (en) Special-shaped semiconductor wafer, manufacturing method and wafer carrier
CN104900492B (en) A kind of abnormity semiconductor wafer and preparation method thereof
JP4835069B2 (en) Silicon wafer manufacturing method
US20080113510A1 (en) Semiconductor Wafer Fabricating Method and Semiconductor Wafer Mirror Edge Polishing Method
TWI567811B (en) Verfahren zum beidseitigen polieren einer halbleiterscheibe
TWI302717B (en) Etching liquid for controlling silicon wafer surface shape and method for manufacturing silicon wafer using the same
TWI285924B (en) Method for manufacturing silicon wafer
CN104952701B (en) A kind of abnormity semiconductor wafer and preparation method thereof
WO2015122072A1 (en) Method for manufacturing semiconductor wafer
JP6206360B2 (en) Polishing method of silicon wafer
KR20040111463A (en) Semiconductor wafer manufacturing method and wafer
KR20000017512A (en) Method for reclaiming wafer substrate and polishing solution composition for reclaiming wafer substrate
US11551922B2 (en) Method of polishing silicon wafer including notch polishing process and method of producing silicon wafer
JP2007204286A (en) Method for manufacturing epitaxial wafer
CN104979185B (en) A kind of ultra-thin semiconductor chip and preparation method thereof
US20130224954A1 (en) Silicon carbide single crystal substrate
JP2003229392A (en) Method for manufacturing silicon wafer, silicon wafer and soi wafer
US20030060020A1 (en) Method and apparatus for finishing substrates for wafer to wafer bonding
CN109659221B (en) Preparation method of silicon carbide single crystal film
US6465328B1 (en) Semiconductor wafer manufacturing method
TWI668738B (en) A manufacturing method for wafers
JP3943869B2 (en) Semiconductor wafer processing method and semiconductor wafer
JP5105711B2 (en) Manufacturing method of wafer with few surface defects, wafer obtained by the method, and electronic component comprising the wafer
JP3932756B2 (en) Manufacturing method of silicon epitaxial wafer
CN111892013A (en) Preparation method of silicon substrate film

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 16792123

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 16792123

Country of ref document: EP

Kind code of ref document: A1