WO2016170902A1 - Electronic device production method, electronic device, circuit board production method, and circuit board - Google Patents

Electronic device production method, electronic device, circuit board production method, and circuit board Download PDF

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Publication number
WO2016170902A1
WO2016170902A1 PCT/JP2016/059240 JP2016059240W WO2016170902A1 WO 2016170902 A1 WO2016170902 A1 WO 2016170902A1 JP 2016059240 W JP2016059240 W JP 2016059240W WO 2016170902 A1 WO2016170902 A1 WO 2016170902A1
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WO
WIPO (PCT)
Prior art keywords
conductive
film
substrate
circuit pattern
hole
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Application number
PCT/JP2016/059240
Other languages
French (fr)
Japanese (ja)
Inventor
明彦 半谷
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スタンレー電気株式会社
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Filing date
Publication date
Application filed by スタンレー電気株式会社 filed Critical スタンレー電気株式会社
Publication of WO2016170902A1 publication Critical patent/WO2016170902A1/en

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits

Definitions

  • the present invention relates to a method for manufacturing an electronic device using a circuit board having a through hole.
  • a method of manufacturing a circuit board having a through hole a method of forming a conductive through hole by forming a circuit pattern on a substrate, then opening a through hole in the circuit board, and filling the through hole with a conductive material Is used.
  • Patent Document 1 a non-conductive film containing copper nanoparticles is deposited by an inkjet printer or the like, and the formed film is irradiated with light from above to fuse the copper particles to form a conductive circuit. Techniques to do this are disclosed.
  • the conductive through hole formed by the above-described conventional method is made of a member different from the circuit pattern and the conductive material in the through hole, the strength of the joint portion is weak, and disconnection occurs due to stress or heat. Sometimes.
  • An object of the present invention is to provide an electronic device manufacturing method capable of forming a circuit pattern of a circuit board and a conductive material in a through hole with the same member.
  • the present invention provides a solution in which conductive nano-sized particles having a particle size of less than 1 ⁇ m, conductive micro-sized particles having a particle size of 1 ⁇ m or more, and an insulating material are dispersed, Alternatively, a solution in which conductive nano-sized particles and conductive micro-sized particles respectively coated with an insulating material layer are dispersed is applied to the surface of the substrate in a desired shape. Thereby, a film containing conductive nano-sized particles and conductive micro-sized particles coated with an insulating material is formed. On the other hand, light is irradiated to a predetermined position from the surface opposite to the film of the substrate, and a through hole is formed in the substrate by the light.
  • the through hole As the through hole is formed in the substrate, a part of the coating film having fluidity flows into the through hole and fills the through hole.
  • the conductive nano-sized particles and the conductive micro-sized particles of the film in the through hole are sintered to form a conductor, and the conductor in the through hole is formed. Fill with.
  • the circuit pattern of the circuit board and the conductive material in the through hole can be formed from the same member, disconnection at the junction between the conductive portion in the through hole and the circuit pattern is unlikely to occur.
  • FIG. 7A is a top view of the electronic device according to the third embodiment with the substrate 10-2 removed, (b) AA sectional view, and (c) BB sectional view.
  • a substrate 10 is prepared as shown in FIG.
  • conductive nano-sized particles having a particle size (for example, average particle size) of less than 1 ⁇ m, and particle sizes (for example, average particles)
  • Conductive nano-size particles (hereinafter referred to as conductive micro-particles) having a diameter (diameter) of 1 ⁇ m or more and conductive nanoparticles at least coated with a solution in which an insulating material is dispersed in a solvent or an insulating material layer And a solution in which conductive microparticles are at least dispersed in a solvent.
  • the solvent an organic solvent or water can be used. This solution is applied to the surface of the substrate 10 in a desired shape.
  • the applied solution has a smooth surface on the substrate 10 to form a coating film (film 51).
  • film 51 conductive nanoparticles and conductive microparticles are dispersed, and the periphery of the conductive nanoparticles and the conductive microparticles is covered with an insulating material. Therefore, the film 51 is non-conductive at this stage.
  • the coating film 51 is held on the substrate in a liquid state in which the viscosity is adjusted so that it can flow into the through hole in FIG.
  • the viscosity is appropriately selected depending on the size of the through hole. For example, the type and concentration of the solvent to be used, the type of additive such as an insulating material, and the type of additive such as a viscosity modifier are adjusted.
  • the conductive microparticles can be sintered at a lower temperature than the bulk by light irradiation starting from the conductive nanoparticles. Therefore, by irradiating the light 101, the conductive nanoparticles and the conductive microparticles of the film 51 in the through hole are sintered to form the conductor 52, and the inside of the through hole 70 is filled with the conductor 52. it can.
  • leakage of the coating film 51 from the through hole 70 can be prevented by adjusting the viscosity of the coating film 51 and managing the irradiation time of the light 101 to be sintered.
  • the irradiation conditions (time and output) of the light 101 are set in consideration of drying or evaporating the viscosity-adjusted solvent or additive (viscosity adjusting material, etc.) during firing.
  • the substrate 10 at the position where the through hole 70 is to be formed can be previously colored in a color that absorbs the light 101. Thereby, the through hole 70 can be formed easily.
  • a predetermined region of the film 51 around the through hole 70 is irradiated with light 102 to sinter the conductive nanoparticles and the conductive microparticles. Then, a circuit pattern 50 continuous with the conductor 52 in the through hole 70 is formed.
  • the electroconductive nanoparticle after light irradiation has couple
  • the conductor 52 and the circuit pattern 50 in the through hole 70 formed by such a process are continuous and become one member. Therefore, the strength of the joint portion between the conductor 52 and the circuit pattern 50 is strong, and it is difficult to break even when subjected to stress or heat.
  • a coating film 51 is formed on the back surface of the substrate 10, and the light 102 is irradiated as shown in FIG.
  • a circuit pattern in which the front and back circuit patterns 50 are connected can be formed through the through hole 70 filled with the body 52.
  • the circuit pattern 50 around them is formed.
  • the present invention is not limited to this procedure.
  • the light 102 reaches the region where the through hole 70 is to be formed while performing the sintering by moving the light 102 along a predetermined pattern. For example, if the light intensity is increased and irradiated as the light 101 and the through hole 70 is formed, the light intensity is immediately decreased to form the conductor 52 as the light 102, and then the light 102 is again formed into a predetermined pattern. It is also possible to make it a procedure to move along.
  • the film 51a is laminated only by dropping the solution as shown in FIGS. 2C and 2D only in the region where the through hole 70 is to be formed. It is also possible to keep it. 2E and 2F, even when the light 101 is irradiated to form the through hole 70 and the inside thereof is filled with the conductor 52, the upper surface of the film 51 is directly above the through hole 70. It will flatten out without being depressed.
  • FIGS. 3A to 3D are used.
  • the heat transfer member 80 can be disposed so as to contact the film 51 before irradiating the light 101 for forming the through hole 70 as in the process of FIG.
  • the heat transfer member 80 is mounted so as to be in contact with the film 51 on the region where the through hole 70 is to be formed. Thereby, the heat generated in the film 51 on the through hole formation region can be conducted to the heat transfer member 80, and the firing of the film 51 on the formation region of the through hole 70 can be suppressed.
  • the heat transfer member 80 a member made of a material having a large heat capacity, for example, a member made of aluminum, copper, iron, or the like can be used.
  • the size of the heat transfer member 80 is desirably set to cover at least the through-hole formation region.
  • the heat transfer member 80 is removed after the through hole 70 is filled with the softened film 51 as shown in FIG. 3 (c-2). That is, the irradiation of the light 102 for sintering the film 51 in a predetermined region around the through hole 70 is performed with the heat transfer member 80 removed, as shown in FIG.
  • the coating film 51 that has flowed into the through hole 70 from the upper surface side of the substrate 10 may not completely fill the through hole 70 (FIG. 4c)
  • the coating film 51 formed on the surface side of the substrate 10 is sintered as shown in FIG.
  • a part of the coating film 51 formed from the back side of the substrate 10 is caused to flow into the space remaining in the through hole 70 and further irradiated with light 101 and 102 to be sintered (FIG. 4D).
  • a circuit pattern in which the front and back circuit patterns 50 are connected can be formed through the through hole 70 filled with the conductor 52.
  • the region of the film 51 that is not irradiated with light remains non-conductive because sintering does not occur.
  • the nonconductive film 51 may be removed in a subsequent process.
  • the film 51 can be removed using an organic solvent or the like.
  • any material may be used for the substrate 10 as long as it can support the first circuit pattern 40, has at least a surface insulating property, and can withstand light irradiation when forming the circuit pattern 50. It may be a material. It is further desirable if the substrate 10 is a material that can be bent. For example, a polyethylene terephthalate (PET) substrate, a polyethylene naphthalate (PEN) substrate, a glass epoxy substrate, a paper phenol substrate, a flexible printed substrate, a ceramic substrate, a glass substrate, a metal substrate whose surface is covered with an insulating layer, and the like can be used. .
  • PET polyethylene terephthalate
  • PEN polyethylene naphthalate
  • the substrate 10 can be either a light transmissive substrate or a non-light transmissive substrate.
  • the transmittance is preferably 50% or more and 95% or less, and more preferably 70% or more and 90% or less, from the viewpoint of forming the through hole 70 and firing with the light transmitted through the substrate. It is preferable that
  • light 102 for firing the circuit pattern 50 can be irradiated from the surface side of the substrate 10 as shown in FIG.
  • the substrate 10 of the present embodiment can be a film-like one.
  • conductive metals and conductive metal oxides such as Ag, Cu, Au, Pd, ITO, Pt, and Fe can be used. .
  • Insulating materials for coating the conductive nanoparticles include organic materials such as styrene resin, epoxy resin, silicone resin, and acrylic resin, inorganic materials such as SiO 2 , Al 2 O 3 , and TiO 2, and organic and inorganic materials. One or more of these hybrid materials can be used.
  • the thickness of the insulating material layer covering the conductive nanoparticles and the conductive microparticles in the film 51 is preferably about 1 nm to 10000 nm.
  • the conductor 52 and the circuit pattern 50 include, for example, conductive particles having a particle size (for example, an average particle size) of 1 ⁇ m to 100 ⁇ m.
  • the wiring width of the circuit pattern 50 can be 10 ⁇ m or more, and can be formed to about 100 ⁇ m, for example.
  • the circuit pattern 50 can be formed to a thickness of about 1 ⁇ m to 100 ⁇ m, for example, about 20 ⁇ m.
  • the electric resistance value of the second circuit pattern 50 is preferably 10 ⁇ 4 ⁇ / cm 2 or less, and particularly preferably a low resistance of the order of 10 ⁇ 6 ⁇ / cm 2 or less.
  • the wavelength of the light irradiated in the steps of FIG. 1C, FIG. 2E, etc. may be ultraviolet, visible, or infrared light, but is absorbed by the conductive nanoparticles contained in the film 51. Select the wavelength to be used.
  • Ag, Cu, Au, Pd or the like is used as the conductive nanoparticles, visible light of 400 to 600 nm can be used, for example.
  • Desired patterns for irradiating light (through hole 70 and circuit pattern 50) can be formed by passing light through a mask having an opening.
  • a light beam condensed to an irradiation diameter smaller than the size of the through hole 70 and the wiring width of the circuit pattern 50 may be used to scan the light beam in a desired pattern on the film 51.
  • the film 51 is formed by sintering conductive nanoparticles and conductive microparticles.
  • the present invention is not limited to this, and a conductive material having a particle size (for example, an average particle size) of 1 ⁇ m or less. It is also possible to form the conductive body 52 and the circuit pattern 50 in the through hole 70 by sintering the conductive nanoparticles. The details of each process other than the particle size are the same as those described above. Thereby, a thin circuit pattern can be formed.
  • the electronic device of FIG. 5 includes a substrate 10 provided with a circuit pattern 50 (50a, 50b) (also referred to as a second circuit pattern 50), an electronic component 30, and a resistor 240.
  • a part 50 a of the circuit pattern 50 is mounted on one surface of the substrate 10, and the other portion 50 b is mounted on the other surface of the substrate 10.
  • the second circuit pattern 50 a on one surface and the second circuit pattern 50 b on the other surface are connected in the thickness direction of the substrate 10 by the conductor 52 in the through hole 70.
  • the substrate 10 is provided with a region 20 for mounting the electronic component 30, and a first circuit pattern 40 electrically connected to the electronic component 30 is disposed in the region 20.
  • the second circuit pattern 50 is connected to the first circuit pattern 40 at the periphery of the region 20.
  • the second circuit pattern 50 supplies current to the first circuit pattern 40 from the power source 60 disposed outside the region 20.
  • the conductor 52 and the second circuit pattern 50 in the through hole 70 are formed of a layer containing conductive nanoparticles and conductive microparticles.
  • a part or all of the first circuit pattern 40 is constituted by a layer containing conductive nanoparticles having a particle size of less than 1 ⁇ m.
  • the second circuit pattern 50 is disposed on both sides of the region 20 for mounting the electronic component 30.
  • the first circuit patterns 40 are arranged in at least one pair in the region 20 and are connected to the second circuit patterns 50 on both sides of the region 20, respectively.
  • a non-conductive layer 41 is disposed between the pair of first circuit patterns 40.
  • the electrode 31 of the electronic component 30 is directly fixed to the pair of first circuit patterns 40.
  • the thickness of the second circuit pattern 50 is larger than the thickness of the first circuit pattern 40 as shown in FIG.
  • the first circuit pattern 40 is formed only in the region 20 on which the electronic component 30 is mounted, which requires fine wiring, and the outside of the region 20 is configured by the thick second circuit pattern 50. Thus, a large current can be supplied to the electronic component 30.
  • the conductive nanoparticles include conductive particles having a particle diameter of 0.01 ⁇ m to 1 ⁇ m.
  • the wiring width of the first circuit pattern 40 (sintered portion) can be set to 1 ⁇ m or more, for example.
  • the first circuit pattern 40 can be formed to a thickness of about 10 nm to 10 ⁇ m.
  • the electrical resistance value of the first circuit pattern 40 is preferably 10 ⁇ 4 ⁇ / cm 2 or less, and particularly preferably a low resistance of the order of 10 ⁇ 6 ⁇ / cm 2 or less.
  • the substrate 10 is prepared.
  • a transparent substrate is used as the substrate 10.
  • 1 (a) and 1 (b) is applied to one surface of the substrate 10 to form a film 51, and FIGS. 1 (c) and 1 (d) described in the first embodiment.
  • the second circuit pattern 50a, the through hole 70, and the conductor 52 filling it are formed.
  • the region of the film 51 not irradiated with light remains non-conductive because sintering does not occur. Note that the region of the non-conductive film 51 that is not sintered may be left as it is, or may be removed as shown in FIG.
  • the second circuit pattern 50a may be formed by forming the film 51 only on the region where the second circuit pattern 50a is to be formed using a printing method or the like and irradiating the entire film 51 with light. it can.
  • the film 51 is formed on the other surface of the substrate 10 by the steps of FIGS. 1A and 1B of the first embodiment, and the film 51 is irradiated with light to sinter the second circuit pattern 50b. Is formed on the other surface of the substrate 10.
  • the second circuit pattern 50b is formed so as to cover the position of the through hole 70, whereby the second circuit pattern 50a on one surface and the second circuit pattern 50b on the other surface are electrically connected to each other in the through hole 70. They can be joined by the body 52.
  • a gap is provided in the middle of the second circuit pattern 50a.
  • the substrate 10 in which the second circuit pattern 50 (50a, 50b), the through hole 70 and the conductor 52 are formed in the shape of FIGS. 5A and 5B is formed (FIG. 6A). ), FIG. 7 (a)).
  • the conductive nanoparticle and the conductive material coated with a layer of the insulating material or a solution in which the insulating material is dispersed in a solvent are prepared.
  • the same conductive nanoparticles and insulating material as in the first embodiment can be used.
  • the solution is applied to the inside of the region 20 on the surface of the substrate 10 and the gap between the second circuit patterns 50 where the resistors 240 are to be formed.
  • the applied solution has a smooth surface on the substrate 10 as shown in FIGS. 6C and 7C, and forms coating films (films 41 and 141), respectively.
  • the ends of the films 41 and 141 are overlapped with the ends of the second circuit pattern 50, respectively.
  • the membranes 41 and 141 are heated and dried.
  • Conductive nanoparticles are dispersed in the films 41 and 141, and the periphery of the conductive nanoparticles is covered with an insulating material.
  • the electronic component 30 is mounted in alignment with a predetermined position of the film 41, and the electrode 31 of the electronic component 30 is in close contact with the film 41 as shown in FIG. 6E.
  • the films 41 and 141 are each irradiated with light in a desired pattern, and the conductive nanoparticles are sintered by the light.
  • a pair of first circuit patterns 40 is formed in the region 20 as shown in FIG. 6G, and the resistor film 140 is formed in the gap where the resistor 240 is to be formed as shown in FIG. Form.
  • the light irradiating the film 41 is irradiated from the back side of the substrate 10 as shown in FIG. 6F, while the light irradiating the film 141 is irradiated from the front side of the substrate 10 as shown in FIG. You may do and may irradiate from the back side.
  • the wavelength of the light to be irradiated is a wavelength that is absorbed by the conductive nanoparticles contained in the films 41 and 141, and a wavelength that is less absorbed by the substrate 10 is selected and used.
  • Irradiation light may be any of ultraviolet, visible, and infrared light.
  • visible light 400 to 600 nm can be used.
  • the irradiation pattern of the light applied to the film 41 includes a region where the electrode 31 of the electronic component 30 of the film 41 is in contact. Since the position of the electrode 31 of the mounted electronic component 30 can be confirmed and the irradiation pattern can be determined using the electrode position as a reference, positional deviation between the circuit pattern and the electronic component can be suppressed.
  • the insulating material layer around the conductive nanoparticles is evaporated or softened by light irradiation. Therefore, the molten conductive nanoparticles are fused directly with the adjacent particles, or are fused with the adjacent particles through the softened insulating material layer. Thereby, electroconductive nanoparticles can be sintered and the area
  • FIG. although the electroconductive nanoparticle after light irradiation has couple
  • the resistance value is measured by the process of FIG. 7E, and when the resistance value is larger than a predetermined range, the edge of the resistor film 140 is shown in FIG. Then, the resistor film 140 is spread, and the resistor film 140 is additionally formed. On the other hand, when the resistance value is smaller than the predetermined range, the resistor film 140 is trimmed and removed by irradiating light. As a result, the resistance value can be adjusted to fall within a predetermined range.
  • the unsintered films 41 and 141 may be removed.
  • the electronic component 30 is mounted and connected to the first circuit pattern 40.
  • the film 141 that forms the resistor 240 is formed of the same coating liquid as the film 41 that forms the first circuit pattern 40 at the same timing, but the film 141 that forms the resistor 240 is the second film. It is also possible to form the circuit pattern 50a and the conductor 52 with the same coating solution as the film 51 at the timing of forming the film 51. That is, conductive microparticles can be contained in the coating liquid that forms the film 141 that forms the resistor 240.
  • the amount of conductive microparticles or the amount of the insulator material may be adjusted according to the target resistance value and the thickness of the resistor film. it can.
  • the resistor film 140 is formed in a state where a part of the particle shape of the conductive microparticles and the conductive nanoparticles remains.
  • the insulating material dispersed together with the conductive nanoparticles and the conductive microparticles, or the insulating material covering the conductive nanoparticles and the conductive microparticles is Although it evaporates at the time of light irradiation for sintering conductive nanoparticles and conductive microparticles, it may not be completely evaporated and may partially remain in the resistor film. Since a part of the insulating material remains in the resistor film, the resistance value is increased accordingly.
  • resistance is adjusted by adjusting the residual amount of the insulating material dispersed together with the conductive nanoparticles or conductive microparticles or the insulating material covering the conductive nanoparticles or conductive microparticles in the resistor film.
  • the value can be adjusted.
  • the coating liquid for forming the film 141 that forms the resistor 240 includes powder, particles composed of indium oxide, copper oxide, silver oxide, Cr, C, and the like together with conductive nanoparticles and conductive microparticles. Can be dispersed to adjust the resistance value.
  • the resistor film 140 is in a state in which these powders and particles are interposed in the sintered conductive nanoparticles and conductive microparticles, and partially conductive nanoparticles and conductive microparticles.
  • the resistance of the resistor film 140 is higher than that of particles that inhibit the particle sintering and do not disperse. These powders and particles can be nano-sized or micro-sized.
  • the second circuit pattern 50 shown in FIGS. 5A to 5C, the through hole 70 filled with the conductor 50, the first circuit pattern 40 having a desired pattern, and the resistor film 140 can be simultaneously formed by a simple process of coating and light irradiation. Since these are integrally connected by light sintering, they are not easily disconnected.
  • the resistance value of the resistor film 140 can be increased or decreased by light irradiation, and a resistor having a desired resistance value can be easily formed. Therefore, a large current can be supplied from the low-resistance thick film second circuit pattern 50 to the electronic component 30 via the first circuit pattern 40, and an excessive current flows through the electronic component 30 by the resistor 240. Can be prevented.
  • the conductive nanoparticles are also bonded to the electrode 31 of the electronic component 30 and can fix the first circuit pattern 40 and the electrode 31. That is, the electrode 31 is directly bonded to the first circuit pattern 40 without using bumps or the like. Since this manufacturing method performs light irradiation with the electronic component 30 mounted, the light irradiation can be performed with a pattern based on the position of the electrode 31 after mounting. Therefore, the bonding between the electrode 31 of the electronic component 30 and the first circuit pattern 40 is reliably obtained with high accuracy.
  • the conductive nanoparticles and the insulating material dispersed in a solvent, or the conductive nanoparticles coated with a layer of the insulating material are used.
  • the films 41 and 141 may be formed using a printing method.
  • a printing method inkjet printing, flexographic printing, gravure offset printing, screen printing, or the like can be used.
  • the entire film 41, 141 formed by printing is irradiated with light to sinter the first circuit pattern 40 and the resistor film 140. Can be formed.
  • the resistor film 140 is irradiated by adjusting the irradiation light intensity so that only a part in the thickness direction is sintered, and the resistance value is adjusted by spreading the resistor film 140 in the thickness direction. It can also be done.
  • This method has an advantage that the nonconductive film 41 is not formed around the first circuit pattern 40 and the resistor film 140.
  • the substrate 10 When the substrate 10 is bent as shown in FIGS. 5B and 5C, the substrate 10 is bent before the first light irradiation step (FIGS. 1C and 2E). It is preferable. Thereby, disconnection and thinning of the second circuit pattern 40 can be prevented.
  • the resistor film 140 expands and contracts to change the resistance value of the resistor film, thereby reducing the role as a protective circuit. By implementing the above, a desired resistance value can be obtained.
  • the film 41 containing the conductive nanoparticles may be formed before or after the bending process.
  • the substrate 10 is bent in a state where the film 41 is formed, cracks may occur in the film 41 itself, but the conductive nanoparticles melted by light irradiation fuse with adjacent particles, and in this fusion process Since the cracks in the film 41 disappear, the first circuit pattern 40 without cracks can be formed.
  • the film 41 and the film 141 are formed using the non-light transmissive substrate 10 as the substrate 10. It is also possible to irradiate light from the upper surface.
  • bumps 42, solder balls or the like are mounted on the first circuit pattern 40 as necessary, and the electronic component 30 is The electrodes 31 are mounted so as to be aligned on the first circuit pattern 40.
  • the bumps are aligned so that the positions of the bumps coincide with the positions of the electrodes 31 of the electronic component 30.
  • heating or ultrasonic waves are applied to connect the electrode 31 of the electronic component 30 to the first circuit pattern 40 and fix the electronic component 30.
  • an electronic device can be manufactured by collectively forming a circuit including a through hole and mounting the electronic component with a small number of manufacturing processes. Moreover, since the circuit pattern can be easily changed by light irradiation, it is possible to easily cope with a design change.
  • an electronic component 30 (30-a, 30-b) having electrodes 31 on both the upper surface and the lower surface is used.
  • the electronic component 30-a is sandwiched between the two substrates 10-1 and 10-2 from above and below.
  • another board 10-3 is arranged under the board 10-1, and the electronic component 30-b is sandwiched between the boards 10-1 and 10-3.
  • the substrates 10-1, 10-2, and 10-3 are all light transmissive.
  • the second circuit pattern 50-1a, the through hole 70, the first circuit pattern 40-1a, and the resistor film 140 are formed on one surface of the substrate 10-1.
  • a second circuit pattern 50-1b and a first circuit pattern 40-1b are formed on the other surface. Then, the first circuit pattern 40-1a of the substrate 10-1 and the electrode 31-1 on the lower surface of the electronic component 30-a are fixed. The first circuit pattern 40-1b of the substrate 10-1 and the electrode 31-2 on the upper surface of the electronic component 30-b are fixed.
  • a film 41-2 is formed on the other transparent substrate 10-2.
  • the substrate 10-2 is mounted on the electronic component 30-a so that the film 41-2 is in contact with the electrode 31-2 on the upper surface. Then, light is irradiated in a predetermined pattern from the back surface (upper surface) side of the other substrate 10-2 to the upper film 41-2.
  • the first circuit pattern 40-2 connected to the electrode 31-2 on the upper surface of the electronic component 30 is formed. At the same time, the first circuit pattern 40-2 and the electrode 31-2 on the upper surface of the electronic component 30 are fixed.
  • a film 41-3 is formed on the transparent substrate 10-3.
  • the substrate 10-3 is mounted under the electronic component 30-b so that the film 41-3 is in contact with the electrode 31-1 on the lower surface.
  • the upper film 41-3 is irradiated with light in a predetermined pattern from the back surface (lower surface) side of the substrate 10-3.
  • the first circuit pattern 40-3 connected to the electrode 31-1 on the lower surface of the electronic component 30-b is formed.
  • the first circuit pattern 40-3 and the electrode 31-1 on the lower surface of the electronic component 30 are fixed.
  • an electronic device in which the electronic components 30-a and 30-b are sandwiched between the three transparent substrates 10-1, 10-2, and 10-3 can be manufactured.
  • the order in which the upper and lower electrodes 31 of the electronic component 30 are connected to the substrates 10-1, 10-2, and 10-3 is not limited to the above-described order, but is connected first from the side that requires high positional accuracy. It is desirable to do.
  • the second circuit pattern 50-1 formed on the transparent substrate 10-1 and the second circuit pattern 50-2 formed on the transparent substrate 10-2 are vertically moved by the vertical conduction portion 50-4. Linked in the direction.
  • the second circuit pattern 50-1 formed on the transparent substrate 10-1 and the second circuit pattern 50-3 formed on the transparent substrate 10-3 are connected in the vertical direction by the vertical conduction portion 50-5.
  • the upper and lower conductive portions 50-4 and 50-5 are formed by overlapping the substrates 10-1, 10-2 and 10-3 after forming a coating film to be the second circuit patterns 50-1, 50-2 and 50-3.
  • the second circuit patterns 50-1, 50-2, 50-3 are irradiated with light in a state where the second circuit patterns 50-1, 50-2, and 50-3 are in contact with each other and sintered. It can be formed simultaneously with the formation.
  • the present embodiment it is possible to manufacture an electronic device by mounting various electronic components on the substrate 10 with high density and mounting them in a small number of manufacturing processes. Moreover, since the circuit pattern can be easily changed by light irradiation, it is possible to easily cope with a design change.
  • a method for manufacturing a resistor is also provided. That is, a solution in which conductive nano-sized particles having a particle size of less than 1 ⁇ m and an insulating material are dispersed, or a solution in which the conductive nano-sized particles coated with an insulating material layer are dispersed is desired on the substrate surface.
  • a second step of forming a resistor film that is a nano-sized particle layer is also provided.
  • a method for manufacturing a circuit board having a curved board is also provided. That is, in the first step, a solution in which conductive nanosize particles having a particle diameter of less than 1 ⁇ m and an insulating material are dispersed, or a solution in which the conductive nanosize particles coated with an insulating material layer are dispersed is used. Then, it is applied to the substrate surface in a desired shape to form a film containing the conductive nano-sized particles coated with the insulating material. In the second step, the film is irradiated with light in a predetermined pattern, and the conductive nanosize particles are sintered by the light to form a first circuit pattern that is a conductive nanosize particle layer of the predetermined pattern. . A step of bending the substrate is further performed before the first step or after the first step and before the second step.
  • any device can be applied as long as the electronic component is mounted on a substrate.
  • the present invention can be applied to an instrument panel (instrument display panel) of a car or a display unit of a game machine.
  • the substrate can be curved, it can be applied to wearable electronic devices (glasses, watches, displays, medical devices, etc.) and curved displays.

Abstract

Provided is an electronic device production method which is capable of forming, in the same member, a circuit pattern of a circuit board and a conductive material in a through hole. A solution in which at least conductive nano-sized particles having a particle size of less than 1 µm, conductive micro-sized particles having a particle size of at least 1 µm, and an insulation material are dispersed, or a solution in which at least conductive nano-sized particles and conductive micro-sized particles which are respectively coated with an insulation material layer are dispersed, is applied to the surface of a substrate in a desired shape, to form a film including the conductive nano-sized particles and the conductive micro-sized particles which are coated with the insulation material. A prescribed position is irradiated with light from the surface of the substrate at the opposite side to the film, a through hole is formed in the substrate by the light, and some of the applied fluid film flows into and fills the throughhole. The applied film which has flowed into the throughhole is irradiated with light to sinter the conductive nano-sized particles and the conductive micro-sized particles in the film in the through hole, and form a conductor with which the through hole is filled.

Description

電子デバイスの製造方法、電子デバイス、回路基板の製造方法、および、回路基板Electronic device manufacturing method, electronic device, circuit board manufacturing method, and circuit board
　本発明は、スルーホールを備えた回路基板を用いた電子デバイスの製造方法に関する。 The present invention relates to a method for manufacturing an electronic device using a circuit board having a through hole.
　スルーホールを備えた回路基板を製造する方法としては、基板に回路パターンを形成した後、回路基板に貫通孔をあけ、貫通孔内に導電材料を充填することにより導電性スルーホールを形成する方法が用いられている。 As a method of manufacturing a circuit board having a through hole, a method of forming a conductive through hole by forming a circuit pattern on a substrate, then opening a through hole in the circuit board, and filling the through hole with a conductive material Is used.
　また、近年、回路パターンを印刷により形成するプリンテッドエレクトロニクスという技術分野が盛んに研究されている。例えば、特許文献１には、銅ナノ粒子を含む非導電性フィルムをインクジェットプリンタ等により堆積させ、形成したフィルムに上方から光を照射することにより、銅粒子を融合させ、導電性の回路を形成する技術が開示されている。 In recent years, a technical field called printed electronics for forming circuit patterns by printing has been actively studied. For example, in Patent Document 1, a non-conductive film containing copper nanoparticles is deposited by an inkjet printer or the like, and the formed film is irradiated with light from above to fuse the copper particles to form a conductive circuit. Techniques to do this are disclosed.
特開２０１４－１１６３１５号公報JP 2014-116315 A
　上述の従来の方法で形成された導電性スルーホールは、回路パターンと、スルーホール内の導電材料とは別部材でできているため、接合部の強度が弱く、応力や熱などで断線に至ることがある。 Since the conductive through hole formed by the above-described conventional method is made of a member different from the circuit pattern and the conductive material in the through hole, the strength of the joint portion is weak, and disconnection occurs due to stress or heat. Sometimes.
　本発明の目的は、回路基板の回路パターンとスルーホール内の導電材料を同一部材で形成することができる電子デバイスの製造方法を提供することにある。 An object of the present invention is to provide an electronic device manufacturing method capable of forming a circuit pattern of a circuit board and a conductive material in a through hole with the same member.
　上記目的を達成するために、本発明は、粒径が１μｍ未満である導電性ナノサイズ粒子と、粒径が１μｍ以上である導電性マイクロサイズ粒子と、絶縁材料とが少なくとも分散された溶液、もしくは、絶縁材料層でそれぞれ被覆された導電性ナノサイズ粒子および導電性マイクロサイズ粒子が少なくとも分散された溶液を、基板の表面に所望の形状で塗布する。これにより、絶縁材料で被覆された導電性ナノサイズ粒子と導電性マイクロサイズ粒子を含む膜を形成する。一方、基板の膜とは逆側の面から所定の位置に光を照射し、光によって基板に貫通孔をあける。基板に貫通孔が形成されるに伴い、流動性を有する塗布膜の一部が貫通孔に流入し、貫通孔内を充填する。貫通孔に流入した塗布膜に光を照射することにより、貫通孔内の膜の導電性ナノサイズ粒子と導電性マイクロサイズ粒子とを焼結して導電体を形成し、貫通孔内を導電体で充填する。 In order to achieve the above object, the present invention provides a solution in which conductive nano-sized particles having a particle size of less than 1 μm, conductive micro-sized particles having a particle size of 1 μm or more, and an insulating material are dispersed, Alternatively, a solution in which conductive nano-sized particles and conductive micro-sized particles respectively coated with an insulating material layer are dispersed is applied to the surface of the substrate in a desired shape. Thereby, a film containing conductive nano-sized particles and conductive micro-sized particles coated with an insulating material is formed. On the other hand, light is irradiated to a predetermined position from the surface opposite to the film of the substrate, and a through hole is formed in the substrate by the light. As the through hole is formed in the substrate, a part of the coating film having fluidity flows into the through hole and fills the through hole. By irradiating the coating film that has flowed into the through hole with light, the conductive nano-sized particles and the conductive micro-sized particles of the film in the through hole are sintered to form a conductor, and the conductor in the through hole is formed. Fill with.
　本発明によれば、回路基板の回路パターンとスルーホール内の導電材料を同一部材で形成することができるため、スルーホール内の導電部と回路パターンとの接合部での断線を生じにくい。 According to the present invention, since the circuit pattern of the circuit board and the conductive material in the through hole can be formed from the same member, disconnection at the junction between the conductive portion in the through hole and the circuit pattern is unlikely to occur.
（ａ）～（ｇ）第１の実施形態のスルーホール７０と導電体５２の製造方法を示す説明図。(A)-(g) Explanatory drawing which shows the manufacturing method of the through hole 70 and the conductor 52 of 1st Embodiment. （ａ）～（ｆ）第１の実施形態のスルーホール７０と導電体５２の別の製造方法を示す説明図。(A)-(f) Explanatory drawing which shows another manufacturing method of the through-hole 70 and the conductor 52 of 1st Embodiment. （ａ）～（ｄ）第１の実施形態のスルーホール７０と導電体５２の別の製造方法を示す説明図。(A)-(d) Explanatory drawing which shows another manufacturing method of the through hole 70 and the conductor 52 of 1st Embodiment. （ａ）～（ｅ）第１の実施形態のスルーホール７０と導電体５２の別の製造方法を示す説明図。(A)-(e) Explanatory drawing which shows another manufacturing method of the through-hole 70 and the conductor 52 of 1st Embodiment. 第２の実施形態の電子デバイスの（ａ）上面図、（ｂ）Ａ－Ａ断面図、（ｃ）Ｂ－Ｂ断面図。(A) top view, (b) AA cross-sectional view, (c) BB cross-sectional view of an electronic device of a second embodiment. （ａ）～（ｇ）第２の実施形態の電子デバイスの製造工程を示す説明図。(A)-(g) Explanatory drawing which shows the manufacturing process of the electronic device of 2nd Embodiment. （ａ）～（ｆ）第２の実施形態の電子デバイスの製造工程を示す説明図。(A)-(f) Explanatory drawing which shows the manufacturing process of the electronic device of 2nd Embodiment. 第３の実施形態の電子デバイスの（ａ）基板１０－２を外した状態の上面図、（ｂ）Ａ－Ａ断面図、（ｃ）Ｂ－Ｂ断面図。FIG. 7A is a top view of the electronic device according to the third embodiment with the substrate 10-2 removed, (b) AA sectional view, and (c) BB sectional view.
　本発明の一実施形態の電子デバイスの製造方法について説明する。 A method for manufacturing an electronic device according to an embodiment of the present invention will be described.
　＜第１の実施形態＞
　まず、図１（ａ）のように、基板１０を用意する。 <First Embodiment>
First, a substrate 10 is prepared as shown in FIG.
　つぎに、図１（ｂ）のように、粒径（例えば、平均粒子径）が１μｍ未満である導電性ナノサイズ粒子（以下、導電性ナノ粒子と呼ぶ）と、粒径（例えば、平均粒子径）が１μｍ以上である導電性マイクロサイズ粒子（以下、導電性マイクロ粒子と呼ぶ）と、絶縁材料とが溶媒に少なくとも分散された溶液、もしくは、絶縁材料層でそれぞれ被覆された導電性ナノ粒子と導電性マイクロ粒子とが溶媒に少なくとも分散された溶液を用意する。溶媒としては、有機溶媒や水を用いることができる。この溶液を、基板１０の表面に所望の形状で塗布する。塗布された溶液は、基板１０上で表面が平滑になり、塗膜（膜５１）を形成する。膜５１内には、導電性ナノ粒子と導電性マイクロ粒子とが分散され、導電性ナノ粒子と導電性マイクロ粒子の周囲は絶縁材料で覆われた状態である。よって、膜５１はこの段階では非導電性である。 Next, as shown in FIG. 1B, conductive nano-sized particles (hereinafter referred to as conductive nanoparticles) having a particle size (for example, average particle size) of less than 1 μm, and particle sizes (for example, average particles) Conductive nano-size particles (hereinafter referred to as conductive micro-particles) having a diameter (diameter) of 1 μm or more and conductive nanoparticles at least coated with a solution in which an insulating material is dispersed in a solvent or an insulating material layer And a solution in which conductive microparticles are at least dispersed in a solvent. As the solvent, an organic solvent or water can be used. This solution is applied to the surface of the substrate 10 in a desired shape. The applied solution has a smooth surface on the substrate 10 to form a coating film (film 51). In the film 51, conductive nanoparticles and conductive microparticles are dispersed, and the periphery of the conductive nanoparticles and the conductive microparticles is covered with an insulating material. Therefore, the film 51 is non-conductive at this stage.
　ここで、塗膜５１は、後述する図１（ｃ）において貫通孔内へ流入可能なように粘度が調整された液体状態で基板上に保持する。粘度は、貫通孔の大きさによって適宜選択される。例えば、使用する溶媒の種類や濃度、絶縁材料等の添加物や粘度調整材等の添加物の種類や添加量を調整する。 Here, the coating film 51 is held on the substrate in a liquid state in which the viscosity is adjusted so that it can flow into the through hole in FIG. The viscosity is appropriately selected depending on the size of the through hole. For example, the type and concentration of the solvent to be used, the type of additive such as an insulating material, and the type of additive such as a viscosity modifier are adjusted.
　つぎに、図１（ｃ）のように、基板１０の膜５１とは逆側の面から所定の位置に光を照射し、光１０１によって基板１０にスルーホール（貫通孔）７０を形成する。これにより、膜５１をスルーホール７０内に落とし込み、スルーホール７０を充填する（図１（ｄ））。光１０１は、スルーホール７０が形成されたら、強度を弱める。導電性ナノ粒子は、光１０１の照射により、その粒子を構成する材料のバルクの融点よりも低い温度で溶融し、導電性ナノ粒子の周囲の絶縁材料層は、光１０１の照射により蒸発するかもしくは軟化する。溶融した導電性ナノ粒子は、周囲の導電性マイクロ粒子と結合するため、導電性ナノ粒子を起点として、導電性マイクロ粒子を光照射によってバルクよりも低温で焼結することができる。よって、光１０１の照射により、貫通孔内の膜５１の導電性ナノ粒子と導電性マイクロ粒子とを焼結して導電体５２を形成し、スルーホール７０内を導電体５２で充填することができる。 Next, as shown in FIG. 1C, light is irradiated to a predetermined position from the surface opposite to the film 51 of the substrate 10, and a through hole (through hole) 70 is formed in the substrate 10 by the light 101. As a result, the film 51 is dropped into the through hole 70 to fill the through hole 70 (FIG. 1D). The light 101 is weakened when the through hole 70 is formed. When the conductive nanoparticles are melted at a temperature lower than the melting point of the bulk of the material constituting the particles by the irradiation of the light 101, the insulating material layer around the conductive nanoparticles is evaporated by the irradiation of the light 101. Or it softens. Since the molten conductive nanoparticles are bonded to the surrounding conductive microparticles, the conductive microparticles can be sintered at a lower temperature than the bulk by light irradiation starting from the conductive nanoparticles. Therefore, by irradiating the light 101, the conductive nanoparticles and the conductive microparticles of the film 51 in the through hole are sintered to form the conductor 52, and the inside of the through hole 70 is filled with the conductor 52. it can.
　また、塗膜５１の粘度調整および、焼結する光１０１の照射の時間管理により、スルーホール７０内から塗膜５１の漏出を防ぐことができる。 Further, leakage of the coating film 51 from the through hole 70 can be prevented by adjusting the viscosity of the coating film 51 and managing the irradiation time of the light 101 to be sintered.
　光１０１の照射条件（時間や出力）は、粘度調整した溶媒や添加物（粘度調整材など）などを焼成時に乾燥させたり蒸発させることを考慮して、設定される。 The irradiation conditions (time and output) of the light 101 are set in consideration of drying or evaporating the viscosity-adjusted solvent or additive (viscosity adjusting material, etc.) during firing.
　なお、スルーホール７０を形成する位置の基板１０を、予め光１０１を吸収する色に着色等しておくことも可能である。これにより、容易にスルーホール７０が形成できる。 It should be noted that the substrate 10 at the position where the through hole 70 is to be formed can be previously colored in a color that absorbs the light 101. Thereby, the through hole 70 can be formed easily.
　さらに、図１（ｃ）、（ｄ）のように、スルーホール７０の周囲の膜５１の所定の領域に光１０２を照射して、導電性ナノ粒子と導電性マイクロ粒子とを焼結して、スルーホール７０内の導電体５２に連続する回路パターン５０を形成する。なお、光照射後の導電性ナノ粒子は、粒子同士が結合しているが、ある程度粒子形状を保っている。 Further, as shown in FIGS. 1C and 1D, a predetermined region of the film 51 around the through hole 70 is irradiated with light 102 to sinter the conductive nanoparticles and the conductive microparticles. Then, a circuit pattern 50 continuous with the conductor 52 in the through hole 70 is formed. In addition, although the electroconductive nanoparticle after light irradiation has couple | bonded particles, the particle shape is maintained to some extent.
　このような工程で形成されたスルーホール７０内の導電体５２と、回路パターン５０は、連続しており、一つの部材となる。よって、導電体５２と回路パターン５０の接合部の強度が強く、応力や熱などを受けても断線しにくい。 The conductor 52 and the circuit pattern 50 in the through hole 70 formed by such a process are continuous and become one member. Therefore, the strength of the joint portion between the conductor 52 and the circuit pattern 50 is strong, and it is difficult to break even when subjected to stress or heat.
　続いて、図１（ｅ）のように、基板１０の裏面に塗膜５１を形成し、図１（ｆ）のように光１０２の照射を行うことにより、図１（ｇ）のように導電体５２で充填されたスルーホール７０を介して、表裏の回路パターン５０が接続された回路パターンを形成することができる。 Subsequently, as shown in FIG. 1E, a coating film 51 is formed on the back surface of the substrate 10, and the light 102 is irradiated as shown in FIG. A circuit pattern in which the front and back circuit patterns 50 are connected can be formed through the through hole 70 filled with the body 52.
　なお、ここでは、スルーホール７０と導電体５２を形成した後、その周囲の回路パターン５０を形成しているが、この手順に限られるものではない。例えば、図１（ｃ）において回路パターン５０を形成するために、光１０２を所定のパターンに沿って移動させて焼結を行いながら、光１０２がスルーホール７０を形成すべき領域に到達したならば、光強度を強めて光１０１として照射し、スルーホール７０が形成されたならば、すぐに光強度を弱めて、光１０２として導電体５２を形成し、その後再び光１０２を所定のパターンに沿って移動させる手順にすることも可能である。 Here, after the through hole 70 and the conductor 52 are formed, the circuit pattern 50 around them is formed. However, the present invention is not limited to this procedure. For example, in order to form the circuit pattern 50 in FIG. 1C, the light 102 reaches the region where the through hole 70 is to be formed while performing the sintering by moving the light 102 along a predetermined pattern. For example, if the light intensity is increased and irradiated as the light 101 and the through hole 70 is formed, the light intensity is immediately decreased to form the conductor 52 as the light 102, and then the light 102 is again formed into a predetermined pattern. It is also possible to make it a procedure to move along.
　また、図２（ａ）～（ｆ）の工程のように、スルーホール７０を形成すべき領域にのみ、図２（ｃ）、（ｄ）のようにさらに溶液を滴下して膜５１ａを積層しておくことも可能である。これにより、図２（ｅ），（ｆ）において、光１０１を照射してスルーホール７０を形成し、その内部を導電体５２で充填した場合でも、膜５１の上面がスルーホール７０の直上においてくぼまず、平坦になる。 Further, as in the steps of FIGS. 2A to 2F, the film 51a is laminated only by dropping the solution as shown in FIGS. 2C and 2D only in the region where the through hole 70 is to be formed. It is also possible to keep it. 2E and 2F, even when the light 101 is irradiated to form the through hole 70 and the inside thereof is filled with the conductor 52, the upper surface of the film 51 is directly above the through hole 70. It will flatten out without being depressed.
　またスルーホール７０を形成する光１０１の照射による発熱で、スルーホール７０内を軟化した膜５１が充填する前に膜５１が焼成してしまうのを防ぐため、図３（ａ）～（ｄ）の工程のように、スルーホール７０を形成する光１０１を照射する前に伝熱部材８０を膜５１に接触するように配置することができる。例えば、図３（ｃ－１）のように、伝熱部材８０を、スルーホール７０を形成する領域上の膜５１に接触するように搭載する。これにより、スルーホール形成領域上の膜５１に発生した熱を伝熱部材８０に伝導することができ、スルーホール７０の形成領域上の膜５１の焼成を抑制することができる。伝熱部材８０としては、熱容量の大きな材料から構成された部材、例えば、アルミニウム、銅、鉄などから構成された部材を用いることができる。また伝熱部材８０の大きさは、少なくともスルーホール形成領域を覆う大きさとすることが望ましい。伝熱部材８０は、図３（ｃ－２）のようにスルーホール７０内が軟化した膜５１で充填された後、取り外す。つまり、スルーホール７０の周囲の所定領域の膜５１の焼結のための光１０２の照射は、図３（ｃ－４）のように、伝熱部材８０を取り外した状態で行う。 Further, in order to prevent the film 51 from being fired before the softened film 51 is filled with the heat generated by the irradiation of the light 101 forming the through hole 70, FIGS. 3A to 3D are used. The heat transfer member 80 can be disposed so as to contact the film 51 before irradiating the light 101 for forming the through hole 70 as in the process of FIG. For example, as shown in FIG. 3C-1, the heat transfer member 80 is mounted so as to be in contact with the film 51 on the region where the through hole 70 is to be formed. Thereby, the heat generated in the film 51 on the through hole formation region can be conducted to the heat transfer member 80, and the firing of the film 51 on the formation region of the through hole 70 can be suppressed. As the heat transfer member 80, a member made of a material having a large heat capacity, for example, a member made of aluminum, copper, iron, or the like can be used. The size of the heat transfer member 80 is desirably set to cover at least the through-hole formation region. The heat transfer member 80 is removed after the through hole 70 is filled with the softened film 51 as shown in FIG. 3 (c-2). That is, the irradiation of the light 102 for sintering the film 51 in a predetermined region around the through hole 70 is performed with the heat transfer member 80 removed, as shown in FIG.
　なお、伝熱部材８０は、膜５１と接合することがないよう、表面処理を施したものを用いることが好ましい。 Note that it is preferable to use a heat-treated member 80 that has been surface-treated so as not to be bonded to the film 51.
　また、伝熱部材８０を用いずに、冷風を膜５１に当てて、温度を下げ、スルーホール７０内を軟化した膜５１が充填する前に膜５１が焼成されるのを抑制することも可能である。 Further, without using the heat transfer member 80, it is also possible to prevent the film 51 from being fired before the film 51 softened in the through hole 70 by applying cold air to the film 51 to lower the temperature. It is.
　さらに、図４（ａ）～（ｅ）に示すように、基板１０の上面側から貫通孔７０内に流入した塗膜５１は、貫通孔７０内を全て充填しなくてもよい（図４（ｃ－２）。この場合は、図４（ｃ－３）のように基板１０の表面側に形成した塗膜５１を焼結して導電体５２を形成後、図４（ｃ－４）において、基板１０の裏面側から形成する塗膜５１の一部を、貫通孔７０内に残る空間に流入させ、さらに光１０１，１０２を照射して焼結する（図４（ｄ））。これにより、導電体５２で充填された貫通孔７０を介して、表裏の回路パターン５０を接続した回路パターンを形成することができる。 Furthermore, as shown in FIGS. 4A to 4E, the coating film 51 that has flowed into the through hole 70 from the upper surface side of the substrate 10 may not completely fill the through hole 70 (FIG. 4c) In this case, after the coating film 51 formed on the surface side of the substrate 10 is sintered as shown in FIG. Then, a part of the coating film 51 formed from the back side of the substrate 10 is caused to flow into the space remaining in the through hole 70 and further irradiated with light 101 and 102 to be sintered (FIG. 4D). A circuit pattern in which the front and back circuit patterns 50 are connected can be formed through the through hole 70 filled with the conductor 52.
　なお、光を照射していない膜５１の領域は、焼結が生じないため、非導電性のまま残る。非導電性の膜５１は、この後の工程で除去してもよい。例えば、有機溶媒等を用いて膜５１を除去することが可能である。 Note that the region of the film 51 that is not irradiated with light remains non-conductive because sintering does not occur. The nonconductive film 51 may be removed in a subsequent process. For example, the film 51 can be removed using an organic solvent or the like.
　基板１０の材質としては、第１回路パターン４０を支持することができ、少なくとも表面が絶縁性であり、しかも、回路パターン５０の形成時の光照射に耐えることができるものであればどのような材質であってもよい。基板１０が湾曲させる加工が可能な材質であればさらに望ましい。例えば、ポリエチレンテレフタレート（ＰＥＴ）基板、ポリエチレンナフタレート（ＰＥＮ）基板、ガラスエポキシ基板、紙フェノール基板、フレキシブルプリント基板、セラミック基板、ガラス基板、表面を絶縁層で被覆した金属基板などを用いることができる。 Any material may be used for the substrate 10 as long as it can support the first circuit pattern 40, has at least a surface insulating property, and can withstand light irradiation when forming the circuit pattern 50. It may be a material. It is further desirable if the substrate 10 is a material that can be bent. For example, a polyethylene terephthalate (PET) substrate, a polyethylene naphthalate (PEN) substrate, a glass epoxy substrate, a paper phenol substrate, a flexible printed substrate, a ceramic substrate, a glass substrate, a metal substrate whose surface is covered with an insulating layer, and the like can be used. .
　基板１０は、光透過性基板および非光透過性基板のいずれをも用いることができる。 The substrate 10 can be either a light transmissive substrate or a non-light transmissive substrate.
　光透過性の基板１０を用いた場合には、回路パターン５０の焼成のための光を図１および図２のように基板１０の裏面側から照射することができる。光透過性基板１０である場合には、スルーホール７０を形成する観点と基板を透過した光で焼成を行う観点より、透過率は５０％以上９５％以下が好ましく、さらに７０％以上９０％以下であることが好ましい。 When the light-transmitting substrate 10 is used, light for firing the circuit pattern 50 can be irradiated from the back side of the substrate 10 as shown in FIGS. In the case of the light-transmitting substrate 10, the transmittance is preferably 50% or more and 95% or less, and more preferably 70% or more and 90% or less, from the viewpoint of forming the through hole 70 and firing with the light transmitted through the substrate. It is preferable that
　非光透過性の基板を用いた場合には、図３のように回路パターン５０の焼成のための光１０２を基板１０の表面側から照射することができる。 When a non-light-transmissive substrate is used, light 102 for firing the circuit pattern 50 can be irradiated from the surface side of the substrate 10 as shown in FIG.
　また、本実施形態の基板１０は、フィルム状のものを用いることも可能である。 Further, the substrate 10 of the present embodiment can be a film-like one.
　回路パターン５０を構成する導電性ナノ粒子の材料としては、Ａｇ、Ｃｕ、Ａｕ、Ｐｄ、ＩＴＯ、Ｐｔ、Ｆｅなどの導電性金属および導電性金属酸化物のうちの１つ以上を用いることができる。 As a material of the conductive nanoparticles constituting the circuit pattern 50, one or more of conductive metals and conductive metal oxides such as Ag, Cu, Au, Pd, ITO, Pt, and Fe can be used. .
　導電性ナノ粒子を被覆する絶縁材料としては、スチレン樹脂、エポキシ樹脂、シリコーン樹脂、および、アクリル樹脂などの有機物、ならびに、ＳｉＯ２、Ａｌ２Ｏ３、ＴｉＯ２などの無機材料、また有機と無機のハイブリット材料のうちの１以上を用いることができる。また、膜５１において導電性ナノ粒子および導電性マイクロ粒子を被覆する絶縁材料層の厚みは、１ｎｍ～１００００ｎｍ程度であることが好ましい。 Insulating materials for coating the conductive nanoparticles include organic materials such as styrene resin, epoxy resin, silicone resin, and acrylic resin, inorganic materials such as SiO 2 , Al 2 O 3 , and TiO 2, and organic and inorganic materials. One or more of these hybrid materials can be used. The thickness of the insulating material layer covering the conductive nanoparticles and the conductive microparticles in the film 51 is preferably about 1 nm to 10000 nm.
　導電体５２および回路パターン５０は、例えば、粒径（例えば、平均粒子径）１μｍ～１００μｍの導電性粒子を含んでいる。回路パターン５０の配線幅は、１０μｍ以上にすることができ、例えば１００μｍ程度に形成することが可能である。回路パターン５０の厚みは、１μｍ～１００μｍ程度、例えば２０μｍ程度に形成することが可能である。また、第２回路パターン５０の電気抵抗値は、１０－4Ω/ｃｍ2以下であることが望ましく、特に、１０－６Ω/ｃｍ2オーダー以下の低抵抗であることが望ましい。 The conductor 52 and the circuit pattern 50 include, for example, conductive particles having a particle size (for example, an average particle size) of 1 μm to 100 μm. The wiring width of the circuit pattern 50 can be 10 μm or more, and can be formed to about 100 μm, for example. The circuit pattern 50 can be formed to a thickness of about 1 μm to 100 μm, for example, about 20 μm. The electric resistance value of the second circuit pattern 50 is preferably 10 −4 Ω / cm 2 or less, and particularly preferably a low resistance of the order of 10 −6 Ω / cm 2 or less.
　図１（ｃ）、図２（ｅ）等の工程で照射する光の波長は、紫外、可視、赤外いずれの光であってもよいが、膜５１に含まれる導電性ナノ粒子に吸収される波長を選択して用いる。導電性ナノ粒子として、Ａｇ、Ｃｕ、Ａｕ、Ｐｄなどを用いた場合、例えば４００～６００ｎｍの可視光を用いることができる。光を照射する所望のパターン（スルーホール７０および回路パターン５０）は、開口を有するマスクに光を通すことにより形成することができる。また、スルーホール７０のサイズや回路パターン５０の配線幅よりも小さい照射径に集光した光ビームを用い、光ビームを膜５１上で所望のパターンに走査させてもよい。 The wavelength of the light irradiated in the steps of FIG. 1C, FIG. 2E, etc. may be ultraviolet, visible, or infrared light, but is absorbed by the conductive nanoparticles contained in the film 51. Select the wavelength to be used. When Ag, Cu, Au, Pd or the like is used as the conductive nanoparticles, visible light of 400 to 600 nm can be used, for example. Desired patterns for irradiating light (through hole 70 and circuit pattern 50) can be formed by passing light through a mask having an opening. Alternatively, a light beam condensed to an irradiation diameter smaller than the size of the through hole 70 and the wiring width of the circuit pattern 50 may be used to scan the light beam in a desired pattern on the film 51.
　本実施形態では、膜５１を導電性ナノ粒子と導電性マイクロ粒子を焼結して形成したが、本発明はこれに限られるものではなく、粒径（例えば、平均粒子径）１μｍ以下の導電性ナノ粒子を焼結して、スルーホール７０内の導電体５２と回路パターン５０を形成することも可能である。粒子サイズ以外の各工程の詳細は、上述した工程と同様にする。これにより、膜厚の薄い回路パターンを形成することができる。 In this embodiment, the film 51 is formed by sintering conductive nanoparticles and conductive microparticles. However, the present invention is not limited to this, and a conductive material having a particle size (for example, an average particle size) of 1 μm or less. It is also possible to form the conductive body 52 and the circuit pattern 50 in the through hole 70 by sintering the conductive nanoparticles. The details of each process other than the particle size are the same as those described above. Thereby, a thin circuit pattern can be formed.
　＜第２の実施形態＞
　第２の実施形態では、第１の実施形態と同様の方法で形成された、スルーホール７０と回路パターン５０を備えた回路基板に電子部品を実装した、図５（ａ）～（ｃ）の電子デバイスを製造する方法について説明する。 <Second Embodiment>
In the second embodiment, electronic components are mounted on a circuit board having a through hole 70 and a circuit pattern 50 formed by the same method as in the first embodiment. A method for manufacturing an electronic device will be described.
　図５の電子デバイスは、回路パターン５０（５０ａ，５０ｂ）（第２回路パターン５０とも呼ぶ）を備えた基板１０と、電子部品３０と、抵抗器２４０とを備えている。回路パターン５０のうち一部５０ａは、基板１０の一方の面に搭載され、他の部分５０ｂは、基板１０の他方の面に搭載されている。一方の面の第２回路パターン５０ａと他方の面の第２回路パターン５０ｂは、スルーホール７０内の導電体５２により基板１０の厚み方向に接続されている。 The electronic device of FIG. 5 includes a substrate 10 provided with a circuit pattern 50 (50a, 50b) (also referred to as a second circuit pattern 50), an electronic component 30, and a resistor 240. A part 50 a of the circuit pattern 50 is mounted on one surface of the substrate 10, and the other portion 50 b is mounted on the other surface of the substrate 10. The second circuit pattern 50 a on one surface and the second circuit pattern 50 b on the other surface are connected in the thickness direction of the substrate 10 by the conductor 52 in the through hole 70.
　また、基板１０には、電子部品３０を搭載するための領域２０が設けられ、領域２０内には電子部品３０と電気的に接続される第１回路パターン４０が配置されている。第２回路パターン５０は、領域２０の周縁部で第１回路パターン４０に接続されている。第２回路パターン５０は、領域２０の外側に配置された電源６０から第１回路パターン４０に電流を供給する。 The substrate 10 is provided with a region 20 for mounting the electronic component 30, and a first circuit pattern 40 electrically connected to the electronic component 30 is disposed in the region 20. The second circuit pattern 50 is connected to the first circuit pattern 40 at the periphery of the region 20. The second circuit pattern 50 supplies current to the first circuit pattern 40 from the power source 60 disposed outside the region 20.
　スルーホール７０の導電体５２と第２回路パターン５０は、第１の実施の形態と同様に導電性ナノ粒子と導電性マイクロ粒子とを含んだ層によって形成されている。一方、第１回路パターン４０の一部または全部は、粒径が１μｍ未満である導電性ナノ粒子を含んだ層によって構成されている。 As in the first embodiment, the conductor 52 and the second circuit pattern 50 in the through hole 70 are formed of a layer containing conductive nanoparticles and conductive microparticles. On the other hand, a part or all of the first circuit pattern 40 is constituted by a layer containing conductive nanoparticles having a particle size of less than 1 μm.
　具体的には、図５（ａ）、（ｂ）のように、第２回路パターン５０は、電子部品３０を搭載するための領域２０の両脇に配置されている。第１回路パターン４０は、領域２０内に少なくとも一対配置され、領域２０の両脇の第２回路パターン５０とそれぞれ接続されている。一対の第１回路パターン４０の間には、非導電性層４１が配置されている。電子部品３０の電極３１は、一対の第１回路パターン４０に直接固着されている。 Specifically, as shown in FIGS. 5A and 5B, the second circuit pattern 50 is disposed on both sides of the region 20 for mounting the electronic component 30. The first circuit patterns 40 are arranged in at least one pair in the region 20 and are connected to the second circuit patterns 50 on both sides of the region 20, respectively. A non-conductive layer 41 is disposed between the pair of first circuit patterns 40. The electrode 31 of the electronic component 30 is directly fixed to the pair of first circuit patterns 40.
　第２回路パターン５０の厚さは、図５（ｂ）のように、第１回路パターン４０の厚さよりも大きい。本実施形態では、微細な配線が必要な、電子部品３０を搭載する領域２０内のみを第１回路パターン４０で形成し、領域２０の外側は厚膜の第２回路パターン５０によって構成することにより、電子部品３０への大きな電流の供給を可能にしている。 The thickness of the second circuit pattern 50 is larger than the thickness of the first circuit pattern 40 as shown in FIG. In the present embodiment, the first circuit pattern 40 is formed only in the region 20 on which the electronic component 30 is mounted, which requires fine wiring, and the outside of the region 20 is configured by the thick second circuit pattern 50. Thus, a large current can be supplied to the electronic component 30.
　第１回路パターン４０は、導電性ナノ粒子は、粒径０．０１μｍ～１μｍの導電性粒子を含んでいる。第１回路パターン４０（焼結された部分）の配線幅は、例えば１μｍ以上にすることが可能である。第１回路パターン４０の厚みは、１０ｎｍ～１０μｍ程度に形成することが可能である。また、第１回路パターン４０の電気抵抗値は、１０－4Ω/ｃｍ2以下であることが望ましく、特に、１０－６Ω/ｃｍ2オーダー以下の低抵抗であることが望ましい。 In the first circuit pattern 40, the conductive nanoparticles include conductive particles having a particle diameter of 0.01 μm to 1 μm. The wiring width of the first circuit pattern 40 (sintered portion) can be set to 1 μm or more, for example. The first circuit pattern 40 can be formed to a thickness of about 10 nm to 10 μm. The electrical resistance value of the first circuit pattern 40 is preferably 10 −4 Ω / cm 2 or less, and particularly preferably a low resistance of the order of 10 −6 Ω / cm 2 or less.
　第２回路パターン５０の導電性粒子の粒径および配線幅等は、第1の実施形態の回路パターン５０と同様であるので説明を省略する。 Since the particle diameter and wiring width of the conductive particles of the second circuit pattern 50 are the same as those of the circuit pattern 50 of the first embodiment, description thereof is omitted.
　製造方法について説明する。まず、基板１０を用意する。ここでは基板１０として透明基板を用いる。 The manufacturing method will be described. First, the substrate 10 is prepared. Here, a transparent substrate is used as the substrate 10.
　つぎに、導電性ナノ粒子と、導電性マイクロ粒子と、絶縁材料とが溶媒に分散された溶液、もしくは、絶縁材料の層で被覆された導電性ナノ粒子および導電性マイクロ粒子が溶媒に分散された溶液を、図１（ａ），（ｂ）のように基板１０の一方の面に塗布して、膜５１を形成し、第１の実施形態で説明した図１（ｃ）、（ｄ）の工程により、第２回路パターン５０ａと、スルーホール７０と、それを充填する導電体５２を形成する。 Next, a solution in which conductive nanoparticles, conductive microparticles, and an insulating material are dispersed in a solvent, or conductive nanoparticles and conductive microparticles coated with a layer of an insulating material are dispersed in the solvent. 1 (a) and 1 (b) is applied to one surface of the substrate 10 to form a film 51, and FIGS. 1 (c) and 1 (d) described in the first embodiment. Through this process, the second circuit pattern 50a, the through hole 70, and the conductor 52 filling it are formed.
　光を照射していない膜５１の領域は、焼結が生じないため、非導電性のまま残る。なお、焼結されない非導電性の膜５１の領域は、残存させたままでもよいし、図５（ａ）のように、除去してもよい。 The region of the film 51 not irradiated with light remains non-conductive because sintering does not occur. Note that the region of the non-conductive film 51 that is not sintered may be left as it is, or may be removed as shown in FIG.
　なお、第２回路パターン５０ａを形成するべき領域のみに、印刷手法等を用いて、膜５１を形成し、膜５１の全体に光を照射することにより、第２回路パターン５０ａを形成することもできる。 The second circuit pattern 50a may be formed by forming the film 51 only on the region where the second circuit pattern 50a is to be formed using a printing method or the like and irradiating the entire film 51 with light. it can.
　つぎに、基板１０の他方の面に、第１の実施形態の図１（ａ），（ｂ）の工程により、膜５１を形成し、光を照射して焼結し、第２回路パターン５０ｂを基板１０の他方の面に形成する。このとき第２回路パターン５０ｂをスルーホール７０の位置を覆うように形成することにより、一方の面の第２回路パターン５０ａと、他方の面の第２回路パターン５０ｂとをスルーホール７０内の導電体５２により結合することができる。 Next, the film 51 is formed on the other surface of the substrate 10 by the steps of FIGS. 1A and 1B of the first embodiment, and the film 51 is irradiated with light to sinter the second circuit pattern 50b. Is formed on the other surface of the substrate 10. At this time, the second circuit pattern 50b is formed so as to cover the position of the through hole 70, whereby the second circuit pattern 50a on one surface and the second circuit pattern 50b on the other surface are electrically connected to each other in the through hole 70. They can be joined by the body 52.
　なお、抵抗器２４０を形成すべき領域は、第２回路パターン５０ａの途中に間隙を設ける。 In the region where the resistor 240 is to be formed, a gap is provided in the middle of the second circuit pattern 50a.
　つぎに、基板１０に第１の回路パターン４０と抵抗器２４０を形成する工程を、図６および図７を用いて説明する。 Next, a process of forming the first circuit pattern 40 and the resistor 240 on the substrate 10 will be described with reference to FIGS.
　上述の工程により、第２回路パターン５０（５０ａ，５０ｂ）およびスルーホール７０と導電体５２が図５（ａ），（ｂ）の形状に形成された基板１０が形成される（図６（ａ）、図７（ａ））。第１回路パターン４０および抵抗器２４０の抵抗体膜１４０を形成するため、導電性ナノ粒子と、絶縁材料とが溶媒に分散された溶液、もしくは、上記絶縁材料の層で被覆された上記導電性ナノ粒子が溶媒に分散された溶液を用意する。導電性ナノ粒子および絶縁材料は、第１の実施形態と同じものを用いることができる。 Through the above-described steps, the substrate 10 in which the second circuit pattern 50 (50a, 50b), the through hole 70 and the conductor 52 are formed in the shape of FIGS. 5A and 5B is formed (FIG. 6A). ), FIG. 7 (a)). In order to form the first circuit pattern 40 and the resistor film 140 of the resistor 240, the conductive nanoparticle and the conductive material coated with a layer of the insulating material or a solution in which the insulating material is dispersed in a solvent. A solution in which nanoparticles are dispersed in a solvent is prepared. The same conductive nanoparticles and insulating material as in the first embodiment can be used.
　図６（ｂ）、図７（ｂ）のように、上記溶液を、基板１０表面の領域２０内と、抵抗器２４０を形成すべき第２回路パターン５０の間隙とにそれぞれ塗布する。塗布された溶液は、図６（ｃ）、図７（ｃ）のように、基板１０上で表面が平滑になり、塗膜（膜４１、１４１）をそれぞれ形成する。膜４１、１４１の端部はそれぞれ、第２回路パターン５０の端部と重なるようにする。必要に応じて膜４１、１４１を加熱し、乾燥させる。膜４１、１４１内には、導電性ナノ粒子が分散され、導電性ナノ粒子の周囲は絶縁材料で覆われた状態である。 6 (b) and 7 (b), the solution is applied to the inside of the region 20 on the surface of the substrate 10 and the gap between the second circuit patterns 50 where the resistors 240 are to be formed. The applied solution has a smooth surface on the substrate 10 as shown in FIGS. 6C and 7C, and forms coating films (films 41 and 141), respectively. The ends of the films 41 and 141 are overlapped with the ends of the second circuit pattern 50, respectively. If necessary, the membranes 41 and 141 are heated and dried. Conductive nanoparticles are dispersed in the films 41 and 141, and the periphery of the conductive nanoparticles is covered with an insulating material.
　続いて、図６（ｄ）のように、電子部品３０を膜４１の所定の位置に位置合わせして搭載し、図６（ｅ）のように、電子部品３０の電極３１を膜４１に密着させる。 Subsequently, as shown in FIG. 6D, the electronic component 30 is mounted in alignment with a predetermined position of the film 41, and the electrode 31 of the electronic component 30 is in close contact with the film 41 as shown in FIG. 6E. Let
　つぎに、図６（ｆ）、図７（ｄ）のように、膜４１、１４１にそれぞれ所望のパターンで光を照射し、光によって導電性ナノ粒子を焼結する。これにより、領域２０には、図６（ｇ）のように一対の第１回路パターン４０を形成し、抵抗器２４０を形成すべき間隙には、図７（ｅ）のように抵抗体膜１４０を形成する。 Next, as shown in FIGS. 6 (f) and 7 (d), the films 41 and 141 are each irradiated with light in a desired pattern, and the conductive nanoparticles are sintered by the light. Thus, a pair of first circuit patterns 40 is formed in the region 20 as shown in FIG. 6G, and the resistor film 140 is formed in the gap where the resistor 240 is to be formed as shown in FIG. Form.
　膜４１に照射する光は、図６（ｆ）のように基板１０の裏面側から照射を行うが、膜１４１に照射する光は、図７（ｄ）のように基板１０の表面側から照射してよいし、裏面側から照射してもよい。 The light irradiating the film 41 is irradiated from the back side of the substrate 10 as shown in FIG. 6F, while the light irradiating the film 141 is irradiated from the front side of the substrate 10 as shown in FIG. You may do and may irradiate from the back side.
　照射する光の波長は、膜４１、１４１に含まれる導電性ナノ粒子に吸収される波長であって、基板１０での吸収が少ない波長を選択して用いる。照射する光は、紫外、可視、赤外いずれの光であってもよい。例えば導電性ナノ粒子として、Ａｇ、Ｃｕ、Ａｕ、Ｐｄなどを用いた場合、４００～６００ｎｍの可視光を用いることができる。 The wavelength of the light to be irradiated is a wavelength that is absorbed by the conductive nanoparticles contained in the films 41 and 141, and a wavelength that is less absorbed by the substrate 10 is selected and used. Irradiation light may be any of ultraviolet, visible, and infrared light. For example, when Ag, Cu, Au, Pd or the like is used as the conductive nanoparticles, visible light of 400 to 600 nm can be used.
　膜４１に照射する光の照射パターンは、膜４１の電子部品３０の電極３１が当接された領域を含む。搭載された電子部品３０の電極３１の位置を確認し、その電極位置を基準として照射パターンを決定することができるため、回路パターンと電子部品との位置ずれを抑制することができる。光は、第２回路パターン５０と連続した第１回路パターン４０を形成するため、第２回路パターン５０と重なる領域にも照射することが望ましい。光照射により、導電性ナノ粒子は、その粒子を構成する材料のバルクの融点よりも低い温度で溶融する。導電性ナノ粒子の周囲の絶縁材料層は、光照射により蒸発するかもしくは軟化する。そのため、溶融した導電性ナノ粒子は、隣接する粒子と直接融合するか、もしくは、軟化した絶縁材料層と突き破って隣接する粒子と融合する。これにより、導電性ナノ粒子同士を焼結することができ、光照射した領域が、電気導電性の第１回路パターン４０となる。なお、光照射後の導電性ナノ粒子は、粒子同士が結合しているが、ある程度粒子形状を保っている。つまり、導電性ナノサイズ粒子層には、導電性ナノ粒子の粒子形状の一部が残っている。 The irradiation pattern of the light applied to the film 41 includes a region where the electrode 31 of the electronic component 30 of the film 41 is in contact. Since the position of the electrode 31 of the mounted electronic component 30 can be confirmed and the irradiation pattern can be determined using the electrode position as a reference, positional deviation between the circuit pattern and the electronic component can be suppressed. In order to form the first circuit pattern 40 that is continuous with the second circuit pattern 50, it is desirable to irradiate the light to the region overlapping the second circuit pattern 50. By light irradiation, the conductive nanoparticles are melted at a temperature lower than the melting point of the bulk of the material constituting the particles. The insulating material layer around the conductive nanoparticles is evaporated or softened by light irradiation. Therefore, the molten conductive nanoparticles are fused directly with the adjacent particles, or are fused with the adjacent particles through the softened insulating material layer. Thereby, electroconductive nanoparticles can be sintered and the area | region irradiated with light becomes the electroconductive 1st circuit pattern 40. FIG. In addition, although the electroconductive nanoparticle after light irradiation has couple | bonded particles, the particle shape is maintained to some extent. That is, a part of the particle shape of the conductive nanoparticles remains in the conductive nanosize particle layer.
　一方、抵抗体膜１４０については、図７（ｅ）の工程により、抵抗値を測定し、抵抗値が予め定めた範囲よりも大きい場合には、図７（ｆ）により抵抗体膜１４０の縁に光を照射し、抵抗体膜１４０を広げ、抵抗体膜１４０を追加形成する。一方、抵抗値が予め定めた範囲より小さい場合には、光を照射して、抵抗体膜１４０をトリミングして除去する。これにより、抵抗値を予め定めた範囲に入るように調整することができる。 On the other hand, for the resistor film 140, the resistance value is measured by the process of FIG. 7E, and when the resistance value is larger than a predetermined range, the edge of the resistor film 140 is shown in FIG. Then, the resistor film 140 is spread, and the resistor film 140 is additionally formed. On the other hand, when the resistance value is smaller than the predetermined range, the resistor film 140 is trimmed and removed by irradiating light. As a result, the resistance value can be adjusted to fall within a predetermined range.
　この後、未焼結の膜４１、１４１を除去してもよい。 Thereafter, the unsintered films 41 and 141 may be removed.
　また、基板１０の他方側の面にも同様に、一対の第１回路パターン４０を形成した後、電子部品３０を搭載し、第１回路パターン４０と接続する。 Similarly, after the pair of first circuit patterns 40 is formed on the other surface of the substrate 10, the electronic component 30 is mounted and connected to the first circuit pattern 40.
　上述において、抵抗器２４０を形成する膜１４１は、第１の回路パターン４０を形成する膜４１と同じ塗布液で、同様のタイミングで形成したが、抵抗器２４０を形成する膜１４１は、第２回路パターン５０ａ、導電体５２を形成する膜５１と同じ塗布液で、膜５１を形成するタイミングで形成することもできる。つまり、抵抗器２４０を形成する膜１４１を構成する塗布液には導電性マイクロ粒子を含有させることができる。 In the above description, the film 141 that forms the resistor 240 is formed of the same coating liquid as the film 41 that forms the first circuit pattern 40 at the same timing, but the film 141 that forms the resistor 240 is the second film. It is also possible to form the circuit pattern 50a and the conductor 52 with the same coating solution as the film 51 at the timing of forming the film 51. That is, conductive microparticles can be contained in the coating liquid that forms the film 141 that forms the resistor 240.
　また、膜１４１を形成する塗布液には、目標とする抵抗値、抵抗体膜の厚みに応じて、導電性マイクロ粒子の量を調整したり、絶縁体材料を量を調整したりすることもできる。膜１４１を形成用の塗布液に導電性マイクロ粒子を含有させた場合、抵抗体膜１４０は、導電性マイクロ粒子と導電性ナノ粒子の粒子形状の一部が残る状態で形成される。 In addition, in the coating solution for forming the film 141, the amount of conductive microparticles or the amount of the insulator material may be adjusted according to the target resistance value and the thickness of the resistor film. it can. When the conductive microparticles are included in the coating solution for forming the film 141, the resistor film 140 is formed in a state where a part of the particle shape of the conductive microparticles and the conductive nanoparticles remains.
　また、抵抗器２４０を形成する膜１４１を形成する塗布液において、導電性ナノ粒子や導電性マイクロ粒子と共に分散される絶縁材料、あるいは、導電性ナノ粒子や導電性マイクロ粒子を被覆する絶縁材料は、導電性ナノ粒子および導電性マイクロ粒子を焼結させる光照射時に、蒸発するが、完全に蒸発させず、部分的に抵抗体膜中に残してもよい。絶縁材料の一部が抵抗体膜中に残ることにより、その分抵抗値は大きいものとなる。つまり、導電性ナノ粒子や導電性マイクロ粒子と共に分散される絶縁材料、あるいは、導電性ナノ粒子や導電性マイクロ粒子を被覆する絶縁材料の、抵抗体膜中への残留量を調整して、抵抗値を調整することができる。 In addition, in the coating solution for forming the film 141 that forms the resistor 240, the insulating material dispersed together with the conductive nanoparticles and the conductive microparticles, or the insulating material covering the conductive nanoparticles and the conductive microparticles is Although it evaporates at the time of light irradiation for sintering conductive nanoparticles and conductive microparticles, it may not be completely evaporated and may partially remain in the resistor film. Since a part of the insulating material remains in the resistor film, the resistance value is increased accordingly. In other words, resistance is adjusted by adjusting the residual amount of the insulating material dispersed together with the conductive nanoparticles or conductive microparticles or the insulating material covering the conductive nanoparticles or conductive microparticles in the resistor film. The value can be adjusted.
　また、抵抗器２４０を形成する膜１４１を形成する塗布液には、導電性ナノ粒子や導電性マイクロ粒子と共に、酸化インジウム、酸化銅、酸化銀、Ｃｒ、Ｃなどから構成される粉体、粒子を分散して、抵抗値を調整することができる。これら紛体、粒子を分散することにより抵抗体膜１４０は焼結した導電性ナノ粒子や導電性マイクロ粒子中にこれら粉体、粒子が介在する状態となり、部分的に導電性ナノ粒子や導電性マイクロ粒子の焼結を阻害して、分散しないものと比較して抵抗体膜１４０の抵抗は高くなる。これら粉体、粒子は、ナノサイズ、マイクロサイズのものを用いることができる。 In addition, the coating liquid for forming the film 141 that forms the resistor 240 includes powder, particles composed of indium oxide, copper oxide, silver oxide, Cr, C, and the like together with conductive nanoparticles and conductive microparticles. Can be dispersed to adjust the resistance value. By dispersing these powders and particles, the resistor film 140 is in a state in which these powders and particles are interposed in the sintered conductive nanoparticles and conductive microparticles, and partially conductive nanoparticles and conductive microparticles. The resistance of the resistor film 140 is higher than that of particles that inhibit the particle sintering and do not disperse. These powders and particles can be nano-sized or micro-sized.
　以上の工程により、図５（ａ）～（ｃ）の第２回路パターン５０と、導電体５０が充填されたスルーホール７０と、所望のパターンの微細な第１回路パターン４０と、抵抗体膜１４０とを備えた電子デバイスを、塗布と光照射という簡単な工程で同時に形成できる。これらは、光焼結により一体に連結されているため、断線しにくい。また、抵抗体膜１４０の抵抗値を光照射により増減することができ、所望の抵抗値の抵抗器を容易に形成することができる。よって、低抵抗の厚膜の第２回路パターン５０から大きな電流を第１回路パターン４０を介して電子部品３０に供給することができるとともに、抵抗器２４０により、電子部品３０に過大な電流が流れるのを防止できる。 Through the above steps, the second circuit pattern 50 shown in FIGS. 5A to 5C, the through hole 70 filled with the conductor 50, the first circuit pattern 40 having a desired pattern, and the resistor film 140 can be simultaneously formed by a simple process of coating and light irradiation. Since these are integrally connected by light sintering, they are not easily disconnected. In addition, the resistance value of the resistor film 140 can be increased or decreased by light irradiation, and a resistor having a desired resistance value can be easily formed. Therefore, a large current can be supplied from the low-resistance thick film second circuit pattern 50 to the electronic component 30 via the first circuit pattern 40, and an excessive current flows through the electronic component 30 by the resistor 240. Can be prevented.
　また、導電性ナノ粒子は、焼結時に溶融するため、電子部品３０の電極３１とも結合し、第１回路パターン４０と電極３１とを固着することができる。すなわち、電極３１はバンプ等を用いることなく、第１回路パターン４０と直接接合される。この製造方法は、電子部品３０を搭載した状態で光照射を行うため、搭載後の電極３１の位置を基準としたパターンで光照射を行うことができる。そのため電子部品３０の電極３１と第１回路パターン４０との接合は確実に高い精度で得られる。 Further, since the conductive nanoparticles are melted at the time of sintering, the conductive nanoparticles are also bonded to the electrode 31 of the electronic component 30 and can fix the first circuit pattern 40 and the electrode 31. That is, the electrode 31 is directly bonded to the first circuit pattern 40 without using bumps or the like. Since this manufacturing method performs light irradiation with the electronic component 30 mounted, the light irradiation can be performed with a pattern based on the position of the electrode 31 after mounting. Therefore, the bonding between the electrode 31 of the electronic component 30 and the first circuit pattern 40 is reliably obtained with high accuracy.
　なお、第１回路パターン４０と電極３１とを固着強度を高めるため、電子部品を加熱しながら光照射することや、圧力をかけながら光照射とすることが好ましい。 In order to increase the fixing strength between the first circuit pattern 40 and the electrode 31, it is preferable to irradiate the electronic component with light or to irradiate with pressure while applying pressure.
　上述の、図６（ｂ）、図７（ｂ）の工程において、導電性ナノ粒子と絶縁材料とが溶媒に分散された溶液、もしくは、絶縁材料の層で被覆された上記導電性ナノ粒子が溶媒に分散された溶液を基板１０上に塗布する際に、印刷手法を用いて膜４１，１４１を形成してもよい。印刷手法としては、インクジェット印刷やフレキソ印刷、グラビアオフセット印刷、スクリーン印刷等を用いることができる。この場合、図６（ｄ）、図７（ｄ）の工程では、印刷により形成した膜４１，１４１の全体に光を照射して焼結して、第１回路パターン４０および抵抗体膜１４０を形成することができる。なお、抵抗体膜１４０は、厚さ方向の一部のみが焼結されるように照射光強度を調整して照射し、抵抗値の調整は、厚さ方向に抵抗体膜１４０を広げることにより行うこともできる。この方法は、第１回路パターン４０および抵抗体膜１４０の周囲に非導電性の膜４１が形成されないという利点がある。 6B and 7B, the conductive nanoparticles and the insulating material dispersed in a solvent, or the conductive nanoparticles coated with a layer of the insulating material are used. When the solution dispersed in the solvent is applied onto the substrate 10, the films 41 and 141 may be formed using a printing method. As a printing method, inkjet printing, flexographic printing, gravure offset printing, screen printing, or the like can be used. In this case, in the process of FIG. 6D and FIG. 7D, the entire film 41, 141 formed by printing is irradiated with light to sinter the first circuit pattern 40 and the resistor film 140. Can be formed. The resistor film 140 is irradiated by adjusting the irradiation light intensity so that only a part in the thickness direction is sintered, and the resistance value is adjusted by spreading the resistor film 140 in the thickness direction. It can also be done. This method has an advantage that the nonconductive film 41 is not formed around the first circuit pattern 40 and the resistor film 140.
　基板１０を図５（ｂ）、（ｃ）のように湾曲させる場合には、最初の光照射工程（図１（ｃ）、図２（ｅ））の前までに基板１０を湾曲させておくことが好ましい。これにより、第２回路パターン４０の断線や線細りを防ぐことができる。特に、抵抗体膜１４０は、焼結工程後に湾曲工程を実施すると、伸縮することで抵抗体膜の抵抗値が変化してしまい、保護回路としての役割が低減するが、湾曲工程後に焼結工程を実施することにより、所望の抵抗値を得ることができる。 When the substrate 10 is bent as shown in FIGS. 5B and 5C, the substrate 10 is bent before the first light irradiation step (FIGS. 1C and 2E). It is preferable. Thereby, disconnection and thinning of the second circuit pattern 40 can be prevented. In particular, when the bending process is performed after the sintering process, the resistor film 140 expands and contracts to change the resistance value of the resistor film, thereby reducing the role as a protective circuit. By implementing the above, a desired resistance value can be obtained.
　このとき、導電性ナノ粒子を含む膜４１の形成は、湾曲工程の前でも湾曲工程の後でもよい。膜４１が形成された状態で基板１０を湾曲させる場合には、膜４１自体にクラックが生じる可能性があるが、光照射により溶融した導電性ナノ粒子が隣接粒子と融合し、この融合過程で膜４１のクラックは消失するため、クラックのない第１回路パターン４０を形成することができる。 At this time, the film 41 containing the conductive nanoparticles may be formed before or after the bending process. When the substrate 10 is bent in a state where the film 41 is formed, cracks may occur in the film 41 itself, but the conductive nanoparticles melted by light irradiation fuse with adjacent particles, and in this fusion process Since the cracks in the film 41 disappear, the first circuit pattern 40 without cracks can be formed.
　なお、第２の実施形態では、光透過性の基板１０を用いて、膜４１の裏面側から光を照射したが、基板１０として非光透過性の基板１０を用いて、膜４１および膜１４１の上面から光を照射することもできる。その場合においては、膜４１に光を照射して第１回路パターン４０を形成した後に、第１回路パターン４０上にバンプ４２やはんだボール等を必要に応じて搭載し、電子部品３０を、その電極３１が第１回路パターン４０上に一致するように位置合わせして搭載する。バンプ等を配置した場合には、バンプの位置が電子部品３０の電極３１の位置と一致するように位置合わせする。その後、加熱または超音波を照射して、電子部品３０の電極３１を第１回路パターン４０とを接続し、電子部品３０を固定する。 In the second embodiment, light is irradiated from the back side of the film 41 using the light transmissive substrate 10. However, the film 41 and the film 141 are formed using the non-light transmissive substrate 10 as the substrate 10. It is also possible to irradiate light from the upper surface. In that case, after the film 41 is irradiated with light to form the first circuit pattern 40, bumps 42, solder balls or the like are mounted on the first circuit pattern 40 as necessary, and the electronic component 30 is The electrodes 31 are mounted so as to be aligned on the first circuit pattern 40. When bumps are arranged, the bumps are aligned so that the positions of the bumps coincide with the positions of the electrodes 31 of the electronic component 30. Thereafter, heating or ultrasonic waves are applied to connect the electrode 31 of the electronic component 30 to the first circuit pattern 40 and fix the electronic component 30.
　本実施形態によれば、種々の電子部品を高密度に基板１０に搭載しつつ、少ない製造工程で一括して、スルーホールを含む回路形成と電子部品の実装を行い、電子デバイスを製造できる。しかも、光照射により、回路パターンを容易に変更できるため、設計変更にも容易に対応することができる。 According to this embodiment, while various electronic components are mounted on the substrate 10 with high density, an electronic device can be manufactured by collectively forming a circuit including a through hole and mounting the electronic component with a small number of manufacturing processes. Moreover, since the circuit pattern can be easily changed by light irradiation, it is possible to easily cope with a design change.
　＜第３の実施形態＞
　第３の実施形態の電子デバイス製造方法について図８を用いて説明する。 <Third Embodiment>
An electronic device manufacturing method according to the third embodiment will be described with reference to FIG.
　第３の実施形態では、電子部品３０（３０－ａ、３０－ｂ）として上面と下面の両方に電極３１を備えたものを用いる。電子部品３０－ａを上下から２枚の基板１０－１、１０－２で挟む構成とする。さらに、基板１０－１の下にもう一枚基板１０－３を配置し、基板１０－１、１０－３の間にも電子部品３０－ｂを挟み込む構成とする。また、基板１０－１，１０－２，１０－３は、いずれも光透過性のものを用いる。 In the third embodiment, an electronic component 30 (30-a, 30-b) having electrodes 31 on both the upper surface and the lower surface is used. The electronic component 30-a is sandwiched between the two substrates 10-1 and 10-2 from above and below. Further, another board 10-3 is arranged under the board 10-1, and the electronic component 30-b is sandwiched between the boards 10-1 and 10-3. The substrates 10-1, 10-2, and 10-3 are all light transmissive.
　第２の実施形態と同様に、基板１０－１の一方の面に、第２回路パターン５０－１ａと、スルーホール７０と、第１回路パターン４０－１ａと、抵抗体膜１４０を形成し、他方の面に、第２回路パターン５０－１ｂと、第１回路パターン４０－１ｂとを形成する。そして、基板１０－１の第１回路パターン４０－１ａと電子部品３０－ａの下面の電極３１－１とを固着する。基板１０－１の第１回路パターン４０－１ｂと電子部品３０－ｂの上面の電極３１－２とを固着する。 Similarly to the second embodiment, the second circuit pattern 50-1a, the through hole 70, the first circuit pattern 40-1a, and the resistor film 140 are formed on one surface of the substrate 10-1. A second circuit pattern 50-1b and a first circuit pattern 40-1b are formed on the other surface. Then, the first circuit pattern 40-1a of the substrate 10-1 and the electrode 31-1 on the lower surface of the electronic component 30-a are fixed. The first circuit pattern 40-1b of the substrate 10-1 and the electrode 31-2 on the upper surface of the electronic component 30-b are fixed.
　一方、もう一枚の透明基板１０－２に、膜４１－２を形成する。基板１０－２を、電子部品３０－ａの上に、膜４１－２が上面の電極３１－２に接するように搭載する。そして、もう１枚の基板１０－２の裏面（上面）側から上側の膜４１－２に所定のパターンで光を照射する。これにより、電子部品３０の上面の電極３１－２に接続された第１回路パターン４０－２を形成する。同時に、第１回路パターン４０－２と電子部品３０の上面の電極３１－２とを固着する。 On the other hand, a film 41-2 is formed on the other transparent substrate 10-2. The substrate 10-2 is mounted on the electronic component 30-a so that the film 41-2 is in contact with the electrode 31-2 on the upper surface. Then, light is irradiated in a predetermined pattern from the back surface (upper surface) side of the other substrate 10-2 to the upper film 41-2. Thus, the first circuit pattern 40-2 connected to the electrode 31-2 on the upper surface of the electronic component 30 is formed. At the same time, the first circuit pattern 40-2 and the electrode 31-2 on the upper surface of the electronic component 30 are fixed.
　さらに、透明基板１０－３に、膜４１－３を形成する。基板１０－３を、電子部品３０－ｂの下に、膜４１－３が下面の電極３１－１に接するように搭載する。そして、基板１０－３の裏面（下面）側から上側の膜４１－３に所定のパターンで光を照射する。これにより、電子部品３０－ｂの下面の電極３１－１に接続された第１回路パターン４０－３を形成する。同時に、第１回路パターン４０－３と電子部品３０の下面の電極３１－１とを固着する。 Further, a film 41-3 is formed on the transparent substrate 10-3. The substrate 10-3 is mounted under the electronic component 30-b so that the film 41-3 is in contact with the electrode 31-1 on the lower surface. Then, the upper film 41-3 is irradiated with light in a predetermined pattern from the back surface (lower surface) side of the substrate 10-3. As a result, the first circuit pattern 40-3 connected to the electrode 31-1 on the lower surface of the electronic component 30-b is formed. At the same time, the first circuit pattern 40-3 and the electrode 31-1 on the lower surface of the electronic component 30 are fixed.
　これにより、３枚の透明基板１０－１，１０－２、１０－３の間に、電子部品３０－ａ、３０－ｂを挟み込んだ電子デバイスを製造することができる。 Thereby, an electronic device in which the electronic components 30-a and 30-b are sandwiched between the three transparent substrates 10-1, 10-2, and 10-3 can be manufactured.
　なお、電子部品３０の上下の電極３１を基板１０－１，１０－２、１０－３と接続した順番は、上記順番に限られるものではなく、位置精度が高く要求される側から先に接続することが望ましい。 Note that the order in which the upper and lower electrodes 31 of the electronic component 30 are connected to the substrates 10-1, 10-2, and 10-3 is not limited to the above-described order, but is connected first from the side that requires high positional accuracy. It is desirable to do.
　なお、図８の構成では、透明基板１０－１に形成した第２回路パターン５０－１と、透明基板１０－２に形成した第２回路パターン５０－２を上下導通部５０－４により、上下方向に連結している。同様に、透明基板１０－１に形成した第２回路パターン５０－１と、透明基板１０－３に形成した第２回路パターン５０－３を上下導通部５０－５により、上下方向に連結している。上下導通部５０－４，５０－５は、第２回路パターン５０－１、５０－２、５０－３となる塗膜を形成した後、基板１０－１，１０－２、１０－３を重ね合わせて、第２回路パターン５０－１と５０－２および５０－３とが接触した状態で光を照射して焼結することにより第２回路パターン５０－１，５０－２、５０－３の形成と同時に形成することができる。 In the configuration of FIG. 8, the second circuit pattern 50-1 formed on the transparent substrate 10-1 and the second circuit pattern 50-2 formed on the transparent substrate 10-2 are vertically moved by the vertical conduction portion 50-4. Linked in the direction. Similarly, the second circuit pattern 50-1 formed on the transparent substrate 10-1 and the second circuit pattern 50-3 formed on the transparent substrate 10-3 are connected in the vertical direction by the vertical conduction portion 50-5. Yes. The upper and lower conductive portions 50-4 and 50-5 are formed by overlapping the substrates 10-1, 10-2 and 10-3 after forming a coating film to be the second circuit patterns 50-1, 50-2 and 50-3. In addition, the second circuit patterns 50-1, 50-2, 50-3 are irradiated with light in a state where the second circuit patterns 50-1, 50-2, and 50-3 are in contact with each other and sintered. It can be formed simultaneously with the formation.
　本実施形態によれば、種々の電子部品を高密度に基板１０に搭載しつつ、少ない製造工程で一括して実装して、電子デバイスを製造できる。しかも、光照射により、回路パターンを容易に変更できるため、設計変更にも容易に対応することができる。 According to the present embodiment, it is possible to manufacture an electronic device by mounting various electronic components on the substrate 10 with high density and mounting them in a small number of manufacturing processes. Moreover, since the circuit pattern can be easily changed by light irradiation, it is possible to easily cope with a design change.
　上述のように本実施形態によれば、抵抗器の製造方法も提供される。すなわち、粒径が１μｍ未満である導電性ナノサイズ粒子と絶縁材料とが分散された溶液、もしくは、絶縁材料層で被覆された前記導電性ナノサイズ粒子が分散された溶液を、基板表面に所望の形状で塗布し、膜を形成する第１工程と、前記膜の一部に所定のパターンで光を照射し、前記光によって導電性ナノサイズ粒子を焼結し、前記所定のパターンの導電性ナノサイズ粒子層である抵抗体膜を形成する第２工程とを有する抵抗器の製造方法である。 As described above, according to this embodiment, a method for manufacturing a resistor is also provided. That is, a solution in which conductive nano-sized particles having a particle size of less than 1 μm and an insulating material are dispersed, or a solution in which the conductive nano-sized particles coated with an insulating material layer are dispersed is desired on the substrate surface. A first step of forming a film by applying the light in a shape, and irradiating a part of the film with light in a predetermined pattern to sinter the conductive nano-sized particles with the light, thereby conducting the conductive in the predetermined pattern And a second step of forming a resistor film that is a nano-sized particle layer.
　また、本実施の形態によれば、湾曲した基板を有する回路基板の製造方法も提供される。すなわち、第１工程では、粒径が１μｍ未満である導電性ナノサイズ粒子と絶縁材料とが分散された溶液、もしくは、絶縁材料層で被覆された前記導電性ナノサイズ粒子が分散された溶液を、基板表面に所望の形状で塗布し、前記絶縁材料で被覆された前記導電性ナノサイズ粒子を含む膜を形成する。第２工程では、前記膜に所定のパターンで光を照射し、前記光によって導電性ナノサイズ粒子を焼結し、前記所定のパターンの導電性ナノサイズ粒子層である第１回路パターンを形成する。前記第１工程の前、もしくは、前記第１工程の後であって第２工程の前に、前記基板を湾曲させる工程をさらに行う。 Further, according to the present embodiment, a method for manufacturing a circuit board having a curved board is also provided. That is, in the first step, a solution in which conductive nanosize particles having a particle diameter of less than 1 μm and an insulating material are dispersed, or a solution in which the conductive nanosize particles coated with an insulating material layer are dispersed is used. Then, it is applied to the substrate surface in a desired shape to form a film containing the conductive nano-sized particles coated with the insulating material. In the second step, the film is irradiated with light in a predetermined pattern, and the conductive nanosize particles are sintered by the light to form a first circuit pattern that is a conductive nanosize particle layer of the predetermined pattern. . A step of bending the substrate is further performed before the first step or after the first step and before the second step.
　本実施形態の電子デバイスは、電子部品を基板に搭載したデバイスであればどのようなものでも適用可能である。例えば、自動車のインストルメント・パネル（計器表示盤）やゲーム機の表示部等に適用できる。また、基板を湾曲させることができるため、ウエアラブル（体に装着可能な）な電子デバイス（メガネ、時計、ディスプレイ、医療機器等）や、湾曲したディスプレイに適用可能である。 As the electronic device of the present embodiment, any device can be applied as long as the electronic component is mounted on a substrate. For example, the present invention can be applied to an instrument panel (instrument display panel) of a car or a display unit of a game machine. In addition, since the substrate can be curved, it can be applied to wearable electronic devices (glasses, watches, displays, medical devices, etc.) and curved displays.
１０・・・基板、２０・・・電子部品搭載のための領域、３０・・・電子部品、４０・・・第１回路パターン、４１・・・膜、４２・・・バンプ、５０・・・第２回路パターン、６０・・・電源、８０・・・伝熱部材

  DESCRIPTION OF SYMBOLS 10 ... Board | substrate, 20 ... Area for electronic component mounting, 30 ... Electronic component, 40 ... 1st circuit pattern, 41 ... Membrane, 42 ... Bump, 50 ... 2nd circuit pattern, 60 ... power supply, 80 ... heat transfer member

Claims (8)

  1. 　粒径が１μｍ未満である導電性ナノサイズ粒子と、粒径が１μｍ以上である導電性マイクロサイズ粒子と、絶縁材料とが少なくとも分散された溶液、もしくは、絶縁材料層でそれぞれ被覆された前記導電性ナノサイズ粒子および前記導電性マイクロサイズ粒子が少なくとも分散された溶液を、基板の表面に所望の形状で塗布し、前記絶縁材料で被覆された前記導電性ナノサイズ粒子と前記導電性マイクロサイズ粒子を含む膜を形成する第１工程と、
    　前記基板に設けた貫通孔内を導電体で充填する第２工程とを含み、
    　前記第２工程は、
    　前記基板の前記膜とは逆側の面から所定の位置に光を照射し、前記光によって前記基板に前記貫通孔をあけ、前記貫通孔に前記膜の一部を流入させて前記貫通孔を前記膜で充填する第２－１工程と、
    　光照射により、前記貫通孔内の前記膜の導電性ナノサイズ粒子と導電性マイクロサイズ粒子とを焼結して前記導電体を形成する第２－２工程とを含むことを特徴とする電子デバイスの製造方法。     The conductive nano-sized particles having a particle size of less than 1 μm, the conductive micro-sized particles having a particle size of 1 μm or more, and the conductive material respectively coated with a solution in which an insulating material is dispersed or an insulating material layer The conductive nanosize particles and the conductive microsize particles coated with the insulating material by applying a solution in which the conductive nanosize particles and the conductive microsize particles are dispersed in a desired shape to the surface of the substrate. A first step of forming a film containing
    Including a second step of filling a through hole provided in the substrate with a conductor,
    The second step includes
    The substrate is irradiated with light at a predetermined position from the surface opposite to the film, the through-hole is formed in the substrate by the light, and a part of the film is caused to flow into the through-hole to form the through-hole. 2-1 step of filling with the film;
    An electronic device comprising: a step 2-2 for forming the conductor by sintering conductive nano-sized particles and conductive micro-sized particles of the film in the through hole by light irradiation. Manufacturing method.
  2. 　請求項１に記載の電子デバイスの製造方法であって、
    　前記貫通孔の周囲の前記膜の所定の領域に光を照射して、前記導電性ナノサイズ粒子と導電性マイクロサイズ粒子とを焼結して、前記貫通孔内の前記導電体に連続する回路パターンを形成する第３工程をさらに含むことを特徴とする電子デバイスの製造方法。     A method of manufacturing an electronic device according to claim 1,
    A circuit continuous to the conductor in the through hole by irradiating a predetermined region of the film around the through hole with light to sinter the conductive nano-sized particles and the conductive micro-sized particles. A method of manufacturing an electronic device, further comprising a third step of forming a pattern.
  3. 　請求項２に記載の電子デバイスの製造方法であって、
    　前記基板は、光透過性であり、前記第３工程は、前記基板の前記膜とは逆側の面から前記基板を通して前記膜に光を照射することを特徴とする電子デバイスの製造方法。     A method for manufacturing an electronic device according to claim 2,
    The substrate is light transmissive, and in the third step, the film is irradiated with light from the surface of the substrate opposite to the film through the substrate.
  4. 　請求項２に記載の電子デバイスの製造方法であって、
    　前記基板上の電子部品を搭載すべき領域に、粒径が１μｍ未満である導電性ナノサイズ粒子と絶縁材料とが少なくとも分散された溶液、もしくは、絶縁材料層で被覆された前記導電性ナノサイズ粒子が少なくとも分散された溶液を、前記基板表面に所望の形状で塗布し、前記絶縁材料層で被覆された前記導電性ナノサイズ粒子を含む膜を形成する第４工程と、
    　前記第４工程で形成した膜に、前記膜に所定のパターンで光を照射し、前記光によって導電性ナノサイズ粒子を焼結し、前記所定のパターンの導電性ナノサイズ粒子層である第１回路パターンを形成する第５工程とを含むことを特徴とする電子デバイスの製造方法。     A method for manufacturing an electronic device according to claim 2,
    The conductive nanosize coated with an insulating material layer or a solution in which conductive nanosize particles having a particle size of less than 1 μm and an insulating material are dispersed in a region where the electronic component on the substrate is to be mounted A fourth step of applying a solution in which particles are at least dispersed to the surface of the substrate in a desired shape to form a film containing the conductive nano-sized particles coated with the insulating material layer;
    The film formed in the fourth step is irradiated with light in a predetermined pattern on the film, the conductive nanosize particles are sintered by the light, and the conductive nanosize particle layer having the predetermined pattern is the first layer And a fifth step of forming a circuit pattern.
  5. 　請求項２に記載の電子デバイスの製造方法であって、
    　前記基板上の電子部品を搭載すべき領域に、粒径が１μｍ未満である導電性ナノサイズ粒子と絶縁材料とが分散された溶液、もしくは、絶縁材料層で被覆された前記導電性ナノサイズ粒子が分散された溶液を、基板表面に所望の形状で塗布し、前記絶縁材料層で被覆された前記導電性ナノサイズ粒子を含む膜を形成する第４工程と、
    　前記第４工程で形成した膜に、電子部品をその電極が前記膜に接触するように搭載し、前記基板の前記膜とは逆側から前記膜に所定のパターンで光を照射し、前記光によって導電性ナノサイズ粒子を焼結し、前記所定のパターンの導電性ナノサイズ粒子を焼結した層を形成することにより、前記電子部品の電極に接続された第１回路パターンを形成するとともに、前記第１回路パターンと前記電子部品の電極とを固着する第５工程とを含むことを特徴とする電子デバイスの製造方法。     A method for manufacturing an electronic device according to claim 2,
    A solution in which conductive nano-sized particles having a particle diameter of less than 1 μm and an insulating material are dispersed in the region on which the electronic component is to be mounted, or the conductive nano-sized particles coated with an insulating material layer A solution in which is dispersed in a desired shape on a substrate surface to form a film containing the conductive nano-sized particles coated with the insulating material layer;
    The electronic component is mounted on the film formed in the fourth step so that the electrode is in contact with the film, and the film is irradiated with light in a predetermined pattern from the side opposite to the film of the substrate, and the light And forming a first circuit pattern connected to the electrodes of the electronic component by forming a layer obtained by sintering the conductive nanosize particles of the predetermined pattern and sintering the conductive nanosize particles of the predetermined pattern, A method for manufacturing an electronic device, comprising: a fifth step of fixing the first circuit pattern and the electrode of the electronic component.
  6. 　基板と、前記基板に設けられた、電子部品を搭載するための領域と、前記領域内に配置され、前記電子部品と電気的に接続される第１回路パターンと、前記第１回路パターンに接続されて、前記領域の外側から前記第１回路パターンに電流を供給する第２回路パターンと、前記第２回路パターンと連続した導電体が充填されたスルーホールと、前記領域に搭載され、前記第１回路パターンに接続された電子部品とを有し、
    　前記第２回路パターンの一部または全部と前記スルーホールの導電体は、粒径が１μｍ未満である導電性ナノサイズ粒子と、粒径が１μｍ以上である導電性マイクロサイズ粒子とを焼結した材料を含むことを特徴とする電子デバイス。     A substrate, a region provided on the substrate for mounting an electronic component, a first circuit pattern disposed in the region and electrically connected to the electronic component, and connected to the first circuit pattern A second circuit pattern for supplying a current to the first circuit pattern from the outside of the region; a through hole filled with a conductor continuous with the second circuit pattern; An electronic component connected to one circuit pattern,
    A part or all of the second circuit pattern and the conductor of the through hole are obtained by sintering conductive nano-sized particles having a particle size of less than 1 μm and conductive micro-sized particles having a particle size of 1 μm or more. An electronic device comprising a material.
  7. 　粒径が１μｍ未満である導電性ナノサイズ粒子と、粒径が１μｍ以上である導電性マイクロサイズ粒子と、絶縁材料とが少なくとも分散された溶液、もしくは、絶縁材料層でそれぞれ被覆された前記導電性ナノサイズ粒子および前記導電性マイクロサイズ粒子が少なくとも分散された溶液を、基板の表面に所望の形状で塗布し、前記絶縁材料で被覆された前記導電性ナノサイズ粒子と前記導電性マイクロサイズ粒子を含む膜を形成する第１工程と、
    前記基板に設けられた貫通孔内を導電体で充填する第２工程とを含み、
    　前記第２工程は、
    　前記基板の前記膜とは逆側の面から所定の位置に光を照射し、前記光によって基板に貫通孔をあけ、前記貫通孔に前記膜の一部を流入させて前記貫通孔を前記膜で充填する第２－１工程と、
    　光照射により、前記貫通孔内の前記膜の導電性ナノサイズ粒子と導電性マイクロサイズ粒子とを焼結して前記導電体を形成する第２－２工程とを含むことを特徴とする回路基板の製造方法。     The conductive nano-sized particles having a particle size of less than 1 μm, the conductive micro-sized particles having a particle size of 1 μm or more, and the conductive material respectively coated with a solution in which an insulating material is dispersed or an insulating material layer The conductive nanosize particles and the conductive microsize particles coated with the insulating material by applying a solution in which the conductive nanosize particles and the conductive microsize particles are dispersed in a desired shape to the surface of the substrate. A first step of forming a film containing
    Including a second step of filling a through hole provided in the substrate with a conductor,
    The second step includes
    The substrate is irradiated with light from a surface on the opposite side to the film, a through hole is formed in the substrate by the light, a part of the film is caused to flow into the through hole, and the through hole is formed in the film. 2-1 step of filling with,
    A circuit board comprising: a step 2-2 for sintering the conductive nano-sized particles and the conductive micro-sized particles of the film in the through hole to form the conductor by light irradiation. Manufacturing method.
  8. 　基板と、前記基板に設けられた、電子部品を搭載するための領域と、前記領域内に配置され、前記電子部品と電気的に接続される第１回路パターンと、前記第１回路パターンに接続されて、前記領域の外側から前記第１回路パターンに電流を供給する第２回路パターンと、前記第２回路パターンと連続した導電体が充填されたスルーホールとを有し、
    　前記第２回路パターンの一部または全部と前記スルーホールの導電体は、粒径が１μｍ未満である導電性ナノサイズ粒子と、粒径が１μｍ以上である導電性マイクロサイズ粒子とを焼結した材料を含むことを特徴とする回路基板。     A substrate, a region provided on the substrate for mounting an electronic component, a first circuit pattern disposed in the region and electrically connected to the electronic component, and connected to the first circuit pattern A second circuit pattern for supplying current to the first circuit pattern from the outside of the region, and a through hole filled with a conductor continuous with the second circuit pattern,
    A part or all of the second circuit pattern and the conductor of the through hole are obtained by sintering conductive nano-sized particles having a particle size of less than 1 μm and conductive micro-sized particles having a particle size of 1 μm or more. A circuit board comprising a material.
PCT/JP2016/059240 2015-04-24 2016-03-23 Electronic device production method, electronic device, circuit board production method, and circuit board WO2016170902A1 (en)

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JP2019201140A (en) * 2018-05-17 2019-11-21 スタンレー電気株式会社 Multilayer circuit board and method for manufacturing the same

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