WO2016169595A1 - Method for manufacturing a photovoltaic panel comprising a plurality of thin film photovoltaic cells connected in series - Google Patents

Method for manufacturing a photovoltaic panel comprising a plurality of thin film photovoltaic cells connected in series Download PDF

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Publication number
WO2016169595A1
WO2016169595A1 PCT/EP2015/058740 EP2015058740W WO2016169595A1 WO 2016169595 A1 WO2016169595 A1 WO 2016169595A1 EP 2015058740 W EP2015058740 W EP 2015058740W WO 2016169595 A1 WO2016169595 A1 WO 2016169595A1
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cells
electrical
product
semi
distribution
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PCT/EP2015/058740
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French (fr)
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Josu GOIKOETXEA
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Fundación Tekniker
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Publication of WO2016169595A1 publication Critical patent/WO2016169595A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/186—Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J1/00—Photometry, e.g. photographic exposure meter
    • G01J1/02—Details
    • G01J1/08—Arrangements of light sources specially adapted for photometry standard sources, also using luminescent or radioactive material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0352—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/036—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
    • H01L31/0392—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate
    • H01L31/03926—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate comprising a flexible substrate
    • H01L31/03928—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate comprising a flexible substrate including AIBIIICVI compound, e.g. CIS, CIGS deposited on metal or polymer foils
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/042—PV modules or arrays of single PV cells
    • H01L31/0445—PV modules or arrays of single PV cells including thin film solar cells, e.g. single thin film a-Si, CIS or CdTe solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/042—PV modules or arrays of single PV cells
    • H01L31/0445—PV modules or arrays of single PV cells including thin film solar cells, e.g. single thin film a-Si, CIS or CdTe solar cells
    • H01L31/046—PV modules composed of a plurality of thin film solar cells deposited on the same substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type
    • H01L31/0749—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type including a AIBIIICVI compound, e.g. CdS/CulnSe2 [CIS] heterojunction solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
    • G01J2005/0077—Imaging
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02S—GENERATION OF ELECTRIC POWER BY CONVERSION OF INFRARED RADIATION, VISIBLE LIGHT OR ULTRAVIOLET LIGHT, e.g. USING PHOTOVOLTAIC [PV] MODULES
    • H02S50/00—Monitoring or testing of PV systems, e.g. load balancing or fault identification
    • H02S50/10—Testing of PV devices, e.g. of PV modules or single PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/541—CuInSe2 material PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention belongs to the field of the manufacture of photovoltaic panels wherein materials with high capacity for light absorption arranged in 1 or 2 microns thick layers are used, so they can be applied as thin film layers on a neutral carrier substrate. Specifically, the present invention is related to how to perform the power balancing of such cells when they are connected in series.
  • a photovoltaic cell is basically created by arranging a PN junction formed by two semiconductor materials or high purity semiconductor material with two different doping levels or types, located between two electrodes that collect the current; one of them metallic, and the other one transparent to most of the light while conducting electricity well enough.
  • the transparent electrode is usually manufactured mainly with a Transparent Conducting Oxide (TCO), which plays an important role in the cell behaviour, but while in the CdTe this TCO is the first element that is deposited on the substrate, in CIGS technology usually the first element deposited is the metallic electrode element.
  • TCO Transparent Conducting Oxide
  • the configurations are known as “substrate” (the usual in CIGS, since when operatively installed the module is such that the substrate remains below the cell) or “superstate “(usual in CdTe, since the substrate is placed above the cell when installed).
  • substrate the usual in CIGS, since when operatively installed the module is such that the substrate remains below the cell
  • superstate (usual in CdTe, since the substrate is placed above the cell when installed).
  • the substrate for the deposition of the solar cell must be transparent to allow the passage of light, and is usually made of glass.
  • the invention described is applicable to thin film photovoltaic cells of both kinds of configurations, with the respective change in roles of the transparent and metallic electrodes, but from now on the explanations will be related to cells in "substrate" configuration, for which the CIGS is currently the most widely used material, but that includes also the CdTe itself when it is used in the alternative to the usual configuration, or the kesterites, which keep a close relationship with the CIGS.
  • Photovoltaic cells generate electrical current from the light impinging on them, but the voltage generated is very low, in the vicinity of 0'5-0'8 V, so that it is difficult to directly use that electricity to power other electric devices.
  • To facilitate this adaptation it is usual to connect in series a number of cells, so that the voltage generated by them is added up to a level that facilitates adaptation to the intended application.
  • the module In the case of modules made from crystalline silicon cells the module usually consists of at least forty cells connected in series, although the number may reach one hundred.
  • the electrical current supplied by the module is the same that passes through all the silicon cells and, like chains whose resistance is fixed by the weakest link, the current supplied by the module is fixed by the cell of lowest quality, so it is important that all cells are very similar, to prevent the presence of a single cell that can drastically reduce the efficiency of the whole module. Therefore, crystalline silicon cells are usually classified after production according to their performance and then are assembled to form modules based on cells with very similar characteristics.
  • thin film photovoltaic modules can facilitate the connection in series of the cells by interleaving several cutting steps (up to three) between successive stages of coating with different materials, so that finally the TCO itself performs the additional task of interconnecting the front face of a cell with the back face of the next one.
  • This is what is commonly known as monolithic integration and is described for example in the US4631351 patent.
  • the module is fabricated as a series of identical very narrow rectangular cells, elongated as the longer side of the module, which are connected laterally in series in the direction of the narrow side, as shown in Figure 1.
  • the CIGS is not the sole compound that may be formed.
  • Other binary compounds may be formed, as for example Cu2Se, which are seriously harmful for the photovoltaic effect, and thus, the absorber quality may have local gradients due to the presence of this binary compounds.
  • some of these compounds have X-ray diffraction lines virtually identical to those of the photovoltaic chalcopyrite, so that it is not easy to establish which are the exact compounds that have been created, unless more sophisticated analytical techniques like Raman scattering are used. All of this leads to some unpredictability in the result of the formation of CIGS photovoltaic absorber.
  • the present invention provides for a method for manufacturing a photovoltaic panel comprising a plurality of thin film photovoltaic cells connected in series, which comprises the following steps: a) Obtaining a layered semi-product by arranging on an electrically isolating substrate:
  • step c) is carried out such that the variation of electrical or optoelectronic properties inside each one of the cells is below a predetermined value. It will be advantageous for providing a higher efficiency of the panel to have in each cell a minimum degree of uniformity within the cell.
  • the electrical properties mapped on the uncut module are the open-circuit voltages, the optoelectronic properties and/or the efficiencies.
  • the method includes, between the steps a) and b), the sub-steps of determining the distribution of the shunts of the semi-product and cut them away from the layered semi-product.
  • the major defects such as shunts, that are easily detected, are removed from the semi-product.
  • the method includes, in step b) determining the shunts or remaining shunts, and a subsequent sub-step of cutting away said shunts determined in step b).
  • step b) is carried out using imaging characterization techniques such as electroluminescence, photoluminescence, dark lock-in thermography or illuminated lock-in thermography.
  • step c) is carried out by modelling the photovoltaic panel (PV) by using a finite element method and the electrical properties determined in step b).
  • step c) could also be carried out by directly using the distribution of one of the electrical properties determined in step b) or the distribution of a combination of the electrical properties determined in step b).
  • Figure 1 shows a typical prior art arrangement of elongated rectangular cells, arranged adjacent to form a PV panel.
  • Figure 2 shows the electrical components to simulate a cell or a portion of a cell.
  • Figure 3 shows the modelling of a cell or portion of cell with a 2D arrangement.
  • Figure 4 shows the modelling of a cell or portion of cell with a 3D arrangement.
  • Figures 5A to 5D and 6A to 6D shows the steps of cutting the layers of a semiproduct to obtain two cells connected in series.
  • Figure 7 shows a typical prior art pattern, wherein the irregular distribution of optoelectrical characteristics has not been taken into account.
  • Figure 8 shows an example of a non-uniform cutting pattern according to the invention.
  • Figures 9A to 9E shows the steps for obtaining a solar panel with rectangular cells, according to a prior art uniform distribution.
  • Figure 9F shows the steps of figures 9 A to 9E, but with a cut possibly obtained with the inventive method.
  • Fig. 10 shows still another way of performing the connection between the cells.
  • the present invention relates to a method for manufacturing a photovoltaic panel PV comprising a plurality of thin film photovoltaic cells 1 connected in series, which comprises the following steps: a) Obtaining a layered semi-product by arranging on an electrically isolating substrate 2:
  • step c) is carried out such that the variation of electrical or optoelectronic properties inside each one of the cells is below a predetermined value.
  • the method includes, between the steps a) and b), the sub-steps of determining the distribution of the shunts of the semi-product and cut them away from the layered semi-product.
  • the starting point is an insulating substrate 2 on which the indispensable layers for the formation of the cell 1 have already been deposited, namely, the metallic electrode 3, the semiconductor 4 forming the PN junction and the transparent electrode 5, on the whole area which will be then used to make the module without any cut in the layers 3, 4, 5.
  • the substrate 2 with the layers 3, 4, 5 deposited thereon has been obtained, its characterization is carried out, including at least a process of characterization for providing a mapping of the entire area of the module, from which information about the spatial distribution of Voc, the efficiency or other optoelectronic characteristics of each point is obtained.
  • This mapping may be carried out using techniques such as electroluminescence, photoluminescence, dark lock-in Thermography or illuminated lock-in thermography, as described, for example, in the paper Imaging characterization techniques applied to Cu(ln,Ga)Se-2 solar cells del JOURNAL OF VACUUM SCI ENCE & TECHNOLOGY A, Vol. 28, pag. 665-670.
  • the mapping is an optoelectronic response, from which a mapping of the open circuit voltage, or of the energetic efficiency, can be obtained, under certain assumptions.
  • Each of these sets represents the vertical flow in the cell from the transparent electrode to the metal electrode in a small region of the cell, which is connected with the adjacent through a resistance RTCO representing the finite resistance of the transparent electrode (TCO, transparent Conducting Oxide), and through a direct electrical contact at the bottom, which corresponds to the metal electrode whose resistance is negligibly small in most cases.
  • RTCO the finite resistance of the transparent electrode
  • the values of these four components can be different, such that it is possible to simulate the local behaviour of the cell at a certain point and, similarly, the ensemble of all the diode-source connected in parallel, with different values of these elements in each point, allows to simulate the heterogeneous distribution of electrical characteristics over the entire surface of the cell or the appearance of located "shunts".
  • a model describing the entire surface is obtained, with its heterogeneities, which can be treated mathematically using thousands of these simplified models of solar cells, all connected in parallel as in the figure 3 through a finite resistance RTCO corresponding to the resistance of the transparent electrode, and a direct electrical contact for the connection through the metallic electrode.
  • the central idea of the invention is to perform such a mathematical description of each of the substrates covered with a big photoelectric cell (a panel), using at least a series of point measurements of the characteristics of the cells that may lead to performing a mapping of it, and then use that mapping and the mathematical description derived therefrom in order to decide which is the best cut of that panel into smaller cells connected in series so that the generated electric power is maximum. To this end, it must be ensured that none of the cells created after cutting and interconnecting is significantly different from the others, and in particular that the generated current in all of them is substantially equal.
  • the measurement of the current density generated by each small area of the module would be the easiest way to manage that goal of cutting the module in such a way so as to equalize the intensity generated by all the cells in the module, but there is no analytical technique nowadays that can measure directly that data, so the best approach is to carry out a series of mappings that can lead to a meaningful mathematical model of the module that can let us guess the current generation capability of each small area.
  • FIG. 5A shows an electrically insulating substrate with the three main layers applied
  • step shown in figure 5B a cut through the three layers has been made, which exposes the substrate in the bottom of the cut, so that now there are two separate solar cells, electrically insulated from each other. This cut can be performed preferably by laser.
  • step shown in figure 5C a new cut has been performed selectively for removing the last two layers (PN junction and transparent electrode) in a region adjacent to the first cut such that the metallic electrode area is exposed, which in the case of CIGS cells is molybdenum.
  • step shown in figure 5D a metal microwire is used to make electrical connections between the exposed area of the metal electrode and the top of the adjacent cell.
  • microwire adheres both to the Molybdenum and the TCO (transparent electrode) using an electrical conductor means, for example using silver adhesive pastes or soldering with Indium.
  • electrical conductor means for example using silver adhesive pastes or soldering with Indium.
  • the removal of the two top functional layers (PN junction and transparent electrode) in a localized region is done, for example using photolithography, whereby a photosensitive mask is applied, UV hardened, across the entire surface of the panel except in the areas where it is necessary to remove the two mentioned layers, so that a selective attack to remove these layers is performed but that is safe for the metal electrode so that after the attack (or more sequential attacks, one for each stratigraphic component of the two upper layers) the metal electrode (Molybdenum in the case of CIGS cells) is exposed in the area of interest.
  • photolithography whereby a photosensitive mask is applied, UV hardened, across the entire surface of the panel except in the areas where it is necessary to remove the two mentioned layers, so that a selective attack to remove these layers is performed but that is safe for the metal electrode so that after the attack (or more sequential attacks, one for each stratigraphic component of the two upper layers) the metal electrode (Molybdenum in the case of CIGS cells) is exposed in the area of interest.
  • Fig. 10 shows still another way of performing the connection between the cells, making use of the capabilities of the digital printers.
  • an insulating material (G) can be deposited in the laser cut to make sure that there is no accidental electrical contact between the cells, and after that, a silver paste (R) is deposited on top of this as well as onto the metallic contact and the TCO of the adjacent cells, so as to create an electrical connection between the lower part of one of the cells and the upper part of the following one.
  • Figure 9A shows a top view of a panel, having applied to its surface a metal electrode layer 3, the pn junction and the transparent electrode 5.
  • Figure 9B represents the front panel, wherein the last two layers have been selectively removed from the side edges, exposing the metal electrode 3, Molybdenum in the case of CIGS cells.
  • Figure 9C represents a subsequent step in which five cuts were made through all layers applied to the substrate, such that six independent cells are defined, with contact electrodes at its outer portion. This cut is made using preferably a laser.
  • Figure 9D represents the application of an insulation 6 on the edge of the active area of the module, covering the area where the cut is made in an oblique direction. Such insulator may be preferably applied as a paste which solidifies over time.
  • Figure E is the end step, where the connection is made with microwire 7 or alternatively a silver paste, deposited above the insulating paste, from the upper face of a cell to the nearest metallic electrode, which, by the way of making the cuts in an oblique way, is to be electrically connected to the bottom of the next cell, so that it results in that all cells are connected in series.
  • Figure 9F is a representation of a non-regular shape in which the cuts could be made as a result of the heterogeneous distribution of efficiencies and the localization of shunts in the panel, which would have been detected with the mapping of the surface of the panel and that would have been introduced as data in a computer program designed to calculate the distribution of cuts that would offer maximum electric power generation.
  • a simplified method of the invention would involve the steps of mapping the open circuit voltages of the panel, cutting away the shunts and then cutting in cells the panel such that the areas of the cells, taking account of the removed shunts, are the same.
  • the pattern for cutting it is not unique, and therefore it would be better to cut the cells such that the variation within each cell is minimum.
  • the method is flexible and adaptable to the unique characteristics of each of the panels produced so using this flexibility on the interconnection of the cells, we can compensate for the defects present on the panel, and thus the invention somewhat reduces the very strict manufacturing homogeneity requirements that are inherent to conventional monolithic integration, and thus the cost savings does not only come from a better use of the power that can offer each panel, but above all, because it allows for a simplified and cheaper manufacturing process.

Abstract

Method for manufacturing a photovoltaic panel (PV) comprising a plurality of thin film photovoltaic cells (1) connected in series, which comprises the steps of obtaining a layered semi-product by arranging on an electrically isolating substrate (2), a metallic layer (3) destined to form the lower electrode of the cells (1), a PN junction layer (4) destined to the production of electricity, a transparent conductive layer (5) destined to form the upper electrode of the cells, obtaining the surface distribution of electrical properties of the obtained semi-product, from the surface distribution, determining a surface division of the semi-product in a plurality of zones (1), such that the electricity production capacity of the zones (1) differs in a determined maximum percentage between zones (1), cutting the layers (3, 4, 5) arranged on the substrate (2) according to the surface division obtained, thus obtaining a plurality of cells (1) and connecting in series the cells (1), such that a maximum power output is obtained.

Description

METHOD FOR MANUFACTURING A PHOTOVOLTAIC PANEL COMPRISING A
PLURALITY OF THIN FILM PHOTOVOLTAIC CELLS CONNECTED IN SERIES
TECHNICAL FIELD
The present invention belongs to the field of the manufacture of photovoltaic panels wherein materials with high capacity for light absorption arranged in 1 or 2 microns thick layers are used, so they can be applied as thin film layers on a neutral carrier substrate. Specifically, the present invention is related to how to perform the power balancing of such cells when they are connected in series.
STATE OF THE ART
Currently several companies are marketing photovoltaic panels made of thin film. The most important materials for thin film photovoltaic cells are currently CdTe and CIGS (Copper Indium Gallium Selenide). The former has the advantage of a relatively simple manufacturing, while the CIGS, substantially of more complicated manufacture, has the advantage of being able to achieve higher levels of efficiency than the CdTe, at least in laboratory samples. Apart from the absorber material used, the two technologies above mentioned also differ in the arrangement of the photovoltaic cell relative to the substrate during the manufacture. A photovoltaic cell is basically created by arranging a PN junction formed by two semiconductor materials or high purity semiconductor material with two different doping levels or types, located between two electrodes that collect the current; one of them metallic, and the other one transparent to most of the light while conducting electricity well enough. In both technologies the transparent electrode is usually manufactured mainly with a Transparent Conducting Oxide (TCO), which plays an important role in the cell behaviour, but while in the CdTe this TCO is the first element that is deposited on the substrate, in CIGS technology usually the first element deposited is the metallic electrode element.
In response to the placement of the cell relative to the substrate the configurations are known as "substrate" (the usual in CIGS, since when operatively installed the module is such that the substrate remains below the cell) or "superstate "(usual in CdTe, since the substrate is placed above the cell when installed). Obviously, in the "superstate" configuration the substrate for the deposition of the solar cell must be transparent to allow the passage of light, and is usually made of glass. The invention described is applicable to thin film photovoltaic cells of both kinds of configurations, with the respective change in roles of the transparent and metallic electrodes, but from now on the explanations will be related to cells in "substrate" configuration, for which the CIGS is currently the most widely used material, but that includes also the CdTe itself when it is used in the alternative to the usual configuration, or the kesterites, which keep a close relationship with the CIGS.
Photovoltaic cells generate electrical current from the light impinging on them, but the voltage generated is very low, in the vicinity of 0'5-0'8 V, so that it is difficult to directly use that electricity to power other electric devices. To facilitate this adaptation it is usual to connect in series a number of cells, so that the voltage generated by them is added up to a level that facilitates adaptation to the intended application. In the case of modules made from crystalline silicon cells the module usually consists of at least forty cells connected in series, although the number may reach one hundred.
The electrical current supplied by the module is the same that passes through all the silicon cells and, like chains whose resistance is fixed by the weakest link, the current supplied by the module is fixed by the cell of lowest quality, so it is important that all cells are very similar, to prevent the presence of a single cell that can drastically reduce the efficiency of the whole module. Therefore, crystalline silicon cells are usually classified after production according to their performance and then are assembled to form modules based on cells with very similar characteristics.
One of the advantages of thin film photovoltaic modules is that they can facilitate the connection in series of the cells by interleaving several cutting steps (up to three) between successive stages of coating with different materials, so that finally the TCO itself performs the additional task of interconnecting the front face of a cell with the back face of the next one. This is what is commonly known as monolithic integration and is described for example in the US4631351 patent. By using this technique, the module is fabricated as a series of identical very narrow rectangular cells, elongated as the longer side of the module,, which are connected laterally in series in the direction of the narrow side, as shown in Figure 1.
The disadvantage of this approach is that there is no possibility to compensate for the non-uniformity of the cells, and then the module efficiency will be limited by the cell of lowest quality, that may occupy an area that represents between 1 and 2% of the total area, and therefore the process uniformity requirements are very high, which is not easy to combine with the highly complicated nature, not fully understood, of the process of forming of the CIGS absorber.
In fact, in the CIGS absorbers, even those deposited with the more sophisticated vacuum techniques presently known, always a proportion of small defective areas appears, known as "shunts", wherein the electrical characteristics of the absorber degrades and act like little and weak short-circuits which limit the electric power offered by the cell, so that the development of the technique for transferring to large dimensions the efficiency levels achieved in laboratory for small cells are mainly focused on reducing the detrimental effect of these "shunts ". For example, in the paper Electroluminescence imaging of Cu(ln,Ga)Se2 thin film modules from the book THIN-FILM COMPOUND SEMICONDUCTOR VOLTAICS-2009 it is mentioned that the typical number of shunts in a 20x20 cm mini-module lies between 10 and 20.
The patents US4640002 and US7979969 are examples of the usual solution for these shunts, which basically consists in locating and then removing the portion of thin film solar cell that contains them. This reduces the area of the cell and can severely affect its ability to conduct electrical current, so that the entire solar module efficiency could dramatically be reduced due to the presence of this shunt, or by the elimination process. Besides the presence of the shunts, the unpredictable fluctuation of electrical characteristics itself of the CIGS absorber may cause serious variations in the power provided by different regions of the same module. Firstly, the operating mode of the CIGS absorber is not fully understood, so that there is no clear picture of what are the fundamental parameters to be controlled during their formation. Secondly, their chemical nature is very complex. For example, it has been found that during the sputtering of the Copper, the Indium, the gallium or the Selenium, the CIGS is not the sole compound that may be formed. Other binary compounds may be formed, as for example Cu2Se, which are seriously harmful for the photovoltaic effect, and thus, the absorber quality may have local gradients due to the presence of this binary compounds. Moreover, some of these compounds have X-ray diffraction lines virtually identical to those of the photovoltaic chalcopyrite, so that it is not easy to establish which are the exact compounds that have been created, unless more sophisticated analytical techniques like Raman scattering are used. All of this leads to some unpredictability in the result of the formation of CIGS photovoltaic absorber. Conventional monolithic integration, nowadays used by all manufacturers, begins with a cut made on the first layer deposited on the substrate, the metal electrode layer, which in the case of the CIGS technology is usually a molybdenum coating deposited on an electrically insulating substrate. Said cutting, usually carried out with laser, divides the surface into electrically isolated regions, each of which will be subsequently developed to form a cell which will be connected electrically in series with the adjacent ones. Therefore, once the first cut has been made on the metal electrode, prior to the deposition of CIGS, there is no possibility for adjusting the arrangement of the cells to the efficiencies and shunts distribution randomly obtained in the CIGS, which will be deposited on that electrode and which will then be processed to form a complete module.
DESCRIPTION OF THE INVENTION
To overcome the mentioned drawback, the present invention provides for a method for manufacturing a photovoltaic panel comprising a plurality of thin film photovoltaic cells connected in series, which comprises the following steps: a) Obtaining a layered semi-product by arranging on an electrically isolating substrate:
- a metallic layer destined to form the lower electrode of the cells;
- a PN junction layer destined to the production of electricity;
- a transparent conductive layer destined to form the upper electrode of the cells; b) Obtaining the surface distribution of electrical or opto-electrical properties of the obtained semi-product; c) From the surface distribution, determining a surface division of the semi-product in a plurality of zones, such that the difference of the electricity production capacity between zones is lower than a determined percentage; d) Cutting the layers arranged on the substrate according to the surface division obtained, thus obtaining a plurality of cells; e) Connecting in series the cells.
Therefore, by knowing the electrical or optoelectrical properties distribution prior to cutting the cells on the thin-film layer, it is possible to make a tailored cut that leads to cells connected in series, each having similar real electrical properties. In this way, the weakest link in the chain will decrease in a minimum amount the overall efficiency and power of the array of cells. This percentage can be as low as desired. Preferably, step c) is carried out such that the variation of electrical or optoelectronic properties inside each one of the cells is below a predetermined value. It will be advantageous for providing a higher efficiency of the panel to have in each cell a minimum degree of uniformity within the cell.
Preferably, the electrical properties mapped on the uncut module are the open-circuit voltages, the optoelectronic properties and/or the efficiencies. Advantageously, the method includes, between the steps a) and b), the sub-steps of determining the distribution of the shunts of the semi-product and cut them away from the layered semi-product.
Therefore, prior to mapping the minor defects, the major defects such as shunts, that are easily detected, are removed from the semi-product.
Preferably, the method includes, in step b) determining the shunts or remaining shunts, and a subsequent sub-step of cutting away said shunts determined in step b). Advantageously, step b) is carried out using imaging characterization techniques such as electroluminescence, photoluminescence, dark lock-in thermography or illuminated lock-in thermography.
As a preferred alternative, step c) is carried out by modelling the photovoltaic panel (PV) by using a finite element method and the electrical properties determined in step b).
However, step c) could also be carried out by directly using the distribution of one of the electrical properties determined in step b) or the distribution of a combination of the electrical properties determined in step b).
BRIEF DESCRIPTION OF THE DRAWINGS
To complete the description and in order to provide for a better understanding of the invention, a set of drawings is provided. Said drawings form an integral part of the description and illustrate an embodiment of the invention, which should not be interpreted as restricting the scope of the invention, but just as an example of how the invention can be carried out. The drawings comprise the following figures: Figure 1 shows a typical prior art arrangement of elongated rectangular cells, arranged adjacent to form a PV panel. Figure 2 shows the electrical components to simulate a cell or a portion of a cell.
Figure 3 shows the modelling of a cell or portion of cell with a 2D arrangement.
Figure 4 shows the modelling of a cell or portion of cell with a 3D arrangement.
Figures 5A to 5D and 6A to 6D shows the steps of cutting the layers of a semiproduct to obtain two cells connected in series.
Figure 7 shows a typical prior art pattern, wherein the irregular distribution of optoelectrical characteristics has not been taken into account.
Figure 8 shows an example of a non-uniform cutting pattern according to the invention.
Figures 9A to 9E shows the steps for obtaining a solar panel with rectangular cells, according to a prior art uniform distribution.
Figure 9F shows the steps of figures 9 A to 9E, but with a cut possibly obtained with the inventive method. Fig. 10 shows still another way of performing the connection between the cells.
DESCRIPTION OF A WAY OF CARRYING OUT THE INVENTION
As shown in the figures, the present invention relates to a method for manufacturing a photovoltaic panel PV comprising a plurality of thin film photovoltaic cells 1 connected in series, which comprises the following steps: a) Obtaining a layered semi-product by arranging on an electrically isolating substrate 2:
- a metallic layer 3 destined to form the lower electrode of the cells 1 ;
- a PN junction layer 4 destined to the production of electricity;
- a transparent conductive layer 5 destined to form the upper electrode of the cells; b) Obtaining the surface distribution of the open-circuit voltages (Voc), the optoelectronic characteristics and/or the efficiencies of the obtained semi-product, for example using imaging characterization techniques such as electroluminiscence, photoluminescence, dark lock-in thermography or illuminated lock-in thermography; c) From the surface distribution, determining a surface division of the semi-product in a plurality of zones 1 , such that the electricity production capacity of the zones 1 differs in a determined maximum percentage between zones 1 ; d) Cutting the layers 3, 4, 5 arranged on the substrate 2 according to the surface division obtained, thus obtaining a plurality of cells 1 ; e) Connecting in series the cells 1 .
In a preferred embodiment, step c) is carried out such that the variation of electrical or optoelectronic properties inside each one of the cells is below a predetermined value.
In another preferred embodiment, the method includes, between the steps a) and b), the sub-steps of determining the distribution of the shunts of the semi-product and cut them away from the layered semi-product.
As shown for example in figure 5A, the starting point is an insulating substrate 2 on which the indispensable layers for the formation of the cell 1 have already been deposited, namely, the metallic electrode 3, the semiconductor 4 forming the PN junction and the transparent electrode 5, on the whole area which will be then used to make the module without any cut in the layers 3, 4, 5.
Once the substrate 2 with the layers 3, 4, 5 deposited thereon has been obtained, its characterization is carried out, including at least a process of characterization for providing a mapping of the entire area of the module, from which information about the spatial distribution of Voc, the efficiency or other optoelectronic characteristics of each point is obtained. This mapping may be carried out using techniques such as electroluminescence, photoluminescence, dark lock-in Thermography or illuminated lock-in thermography, as described, for example, in the paper Imaging characterization techniques applied to Cu(ln,Ga)Se-2 solar cells del JOURNAL OF VACUUM SCI ENCE & TECHNOLOGY A, Vol. 28, pag. 665-670. According to this paper, the mapping is an optoelectronic response, from which a mapping of the open circuit voltage, or of the energetic efficiency, can be obtained, under certain assumptions.
The electrical behaviour of a homogeneous solar cell can be described in simplified form by a combination of a few elements, namely a diode, a current source and two resistances, as shown in figures 2 to 4.
For large cells, with heterogeneities on the surface, its behaviour can be predicted by using electrical simulation programs, such as SPICE, and two-dimensional models such as that shown in figure 3, in which each of the current source -diode-resistance sets corresponds to a an area of the cell bigger or smaller, according to the desired degree of accuracy of the behaviour simulation. An even better accuracy can be reached by employing a 3D model such as that depicted in figure 4. In this drawing only four different sets have been represented to show this concept in an easily understandable drawing, but it is clear that the idea can be extended to any number of sets arranged in parallel. Each of these sets represents the vertical flow in the cell from the transparent electrode to the metal electrode in a small region of the cell, which is connected with the adjacent through a resistance RTCO representing the finite resistance of the transparent electrode (TCO, transparent Conducting Oxide), and through a direct electrical contact at the bottom, which corresponds to the metal electrode whose resistance is negligibly small in most cases.
In each of the small regions which represent the simplified model of solar cell (current source-diode-resistance) the values of these four components can be different, such that it is possible to simulate the local behaviour of the cell at a certain point and, similarly, the ensemble of all the diode-source connected in parallel, with different values of these elements in each point, allows to simulate the heterogeneous distribution of electrical characteristics over the entire surface of the cell or the appearance of located "shunts". In this way a model describing the entire surface is obtained, with its heterogeneities, which can be treated mathematically using thousands of these simplified models of solar cells, all connected in parallel as in the figure 3 through a finite resistance RTCO corresponding to the resistance of the transparent electrode, and a direct electrical contact for the connection through the metallic electrode.
Another option, instead of simulating, is through an empirical conclusion based in that the uniformity of the manufactured panels is enough such that models can be represented by very simplified finite elements when compared with those presented.
The central idea of the invention is to perform such a mathematical description of each of the substrates covered with a big photoelectric cell (a panel), using at least a series of point measurements of the characteristics of the cells that may lead to performing a mapping of it, and then use that mapping and the mathematical description derived therefrom in order to decide which is the best cut of that panel into smaller cells connected in series so that the generated electric power is maximum. To this end, it must be ensured that none of the cells created after cutting and interconnecting is significantly different from the others, and in particular that the generated current in all of them is substantially equal.
The measurement of the current density generated by each small area of the module would be the easiest way to manage that goal of cutting the module in such a way so as to equalize the intensity generated by all the cells in the module, but there is no analytical technique nowadays that can measure directly that data, so the best approach is to carry out a series of mappings that can lead to a meaningful mathematical model of the module that can let us guess the current generation capability of each small area.
The way of cutting a substrate coated with three essential layers (metallic electrode, PN junction, transparent electrode) into smaller cells and then interconnecting them for the monolithic integration has already been described in patent documents such as US5131954 or US2009014052. An example of a way to perform cutting and Interconnection is described schematically in figures 5A to 5D. Figure 5A shows an electrically insulating substrate with the three main layers applied
(metallic electrode, PN junction and transparent electrode). In the step shown in figure 5B a cut through the three layers has been made, which exposes the substrate in the bottom of the cut, so that now there are two separate solar cells, electrically insulated from each other. This cut can be performed preferably by laser. In the step shown in figure 5C a new cut has been performed selectively for removing the last two layers (PN junction and transparent electrode) in a region adjacent to the first cut such that the metallic electrode area is exposed, which in the case of CIGS cells is molybdenum. Finally, in step shown in figure 5D, a metal microwire is used to make electrical connections between the exposed area of the metal electrode and the top of the adjacent cell. This requires that the microwire adheres both to the Molybdenum and the TCO (transparent electrode) using an electrical conductor means, for example using silver adhesive pastes or soldering with Indium. As an alternative, it may be advantageous to carry out the cutting processes in reverse order, as shown diagrammatically in figures 6.
In this case, first the removal of the two top functional layers (PN junction and transparent electrode) in a localized region is done, for example using photolithography, whereby a photosensitive mask is applied, UV hardened, across the entire surface of the panel except in the areas where it is necessary to remove the two mentioned layers, so that a selective attack to remove these layers is performed but that is safe for the metal electrode so that after the attack (or more sequential attacks, one for each stratigraphic component of the two upper layers) the metal electrode (Molybdenum in the case of CIGS cells) is exposed in the area of interest.
Following this the linear cuts extending through the three layers are carried out, exposing the substrate, so that the cells that make up the panel are defined, electrically isolated from each other. This cutting can advantageously be performed by laser. Finally, the adjacent cells would be connected using Microwire or a similar technique as described in US5131954 or US2009014052.
Fig. 10 shows still another way of performing the connection between the cells, making use of the capabilities of the digital printers. After having done the laser cutting and having exposed the window with the metal contact, an insulating material (G) can be deposited in the laser cut to make sure that there is no accidental electrical contact between the cells, and after that, a silver paste (R) is deposited on top of this as well as onto the metallic contact and the TCO of the adjacent cells, so as to create an electrical connection between the lower part of one of the cells and the upper part of the following one.
For example, using this technique of cutting and Interconnection a solar module with 72 cells connected in series could be manufactured, as shown in the figure 7 The idea underlying the present invention, unlike for example US5131954, is that cutting of the surface in completely the same cells needs not be optimal, and the current fast means of characterization and calculation allow for including in the production line an individualized characterization of the original panel, the mapping of the distribution of efficiencies, optoelectronic characteristics and shunts throughout its area, and then the calculation of the best cut for the maximum electrical power output, so that according to the heterogeneity in an original panel (layered semi-product), the most suitable cutting and interconnection for forming 72 cells could be that depicted in figure 8. Figure 9F shows an alternative procedure for cutting and interconnecting for the monolithic integration. Figure 9A shows a top view of a panel, having applied to its surface a metal electrode layer 3, the pn junction and the transparent electrode 5. Figure 9B represents the front panel, wherein the last two layers have been selectively removed from the side edges, exposing the metal electrode 3, Molybdenum in the case of CIGS cells. Figure 9C represents a subsequent step in which five cuts were made through all layers applied to the substrate, such that six independent cells are defined, with contact electrodes at its outer portion. This cut is made using preferably a laser. Figure 9D represents the application of an insulation 6 on the edge of the active area of the module, covering the area where the cut is made in an oblique direction. Such insulator may be preferably applied as a paste which solidifies over time. Figure E is the end step, where the connection is made with microwire 7 or alternatively a silver paste, deposited above the insulating paste, from the upper face of a cell to the nearest metallic electrode, which, by the way of making the cuts in an oblique way, is to be electrically connected to the bottom of the next cell, so that it results in that all cells are connected in series. Finally, Figure 9F is a representation of a non-regular shape in which the cuts could be made as a result of the heterogeneous distribution of efficiencies and the localization of shunts in the panel, which would have been detected with the mapping of the surface of the panel and that would have been introduced as data in a computer program designed to calculate the distribution of cuts that would offer maximum electric power generation.
Alternatively, it could happen that the treatment of the mathematical model described becomes so complex that it is not possible to take the cutting decisions for every module in time to maintain the production pace, and in that case it could be profitable to revert to a simplified way of calculating the distribution of cells in the module. It is possible, for example, to stablish that, as it is not possible to measure the current density generated by each region, all the cells must have the same productive area (total area minus area eliminated with the shunts) and the preferred distribution will be that one that has the lower variation of optoelectrical properties inside every one of the cells, so as to assure that each cell is consistent and homogeneous.
Therefore, a simplified method of the invention would involve the steps of mapping the open circuit voltages of the panel, cutting away the shunts and then cutting in cells the panel such that the areas of the cells, taking account of the removed shunts, are the same. The pattern for cutting it is not unique, and therefore it would be better to cut the cells such that the variation within each cell is minimum. As a further alternative, it is possible to take into account that the effect of a shunt depends in a great way on its proximity to the interconnection region of the cell. The shorter the distance through the TCO to the next interconnection, the greater the negative effect of the shunt, as it is explained in "Influence of a shunt on the electrical behavior in thin film photovoltaic modules - A 2D finite element simulation study" Solar Energy 105, 494-504. Taking this into account, in some cases it could be advantageous not to try to eliminate some of the shunts or micro-shunts detected in the mapping, and just make the division of the module in cells in such a way so as to leave the remaining shunts in a position inside its cell in which they are harmless. One of the advantages of the invention is that the method is flexible and adaptable to the unique characteristics of each of the panels produced so using this flexibility on the interconnection of the cells, we can compensate for the defects present on the panel, and thus the invention somewhat reduces the very strict manufacturing homogeneity requirements that are inherent to conventional monolithic integration, and thus the cost savings does not only come from a better use of the power that can offer each panel, but above all, because it allows for a simplified and cheaper manufacturing process.
In this text, the term "comprises" and its derivations, such as "comprising", should not be understood in an excluding sense, that is, these terms should not be interpreted as excluding the possibility that what is described and defined may include further elements or steps.
The invention is obviously not limited to the specific embodiments described herein, but also encompasses any variations that may be considered by any person skilled in the art, for example, as regards the choice of materials, dimensions, components, configuration, etc., within the general scope of the invention as defined in the claims.

Claims

1. - Method for manufacturing a photovoltaic panel (PV) comprising a plurality of thin film photovoltaic cells (1 ) connected in series, which comprises the following steps: a) Obtaining a layered semi-product by arranging on an electrically isolating substrate (2):
- a metallic layer (3) destined to form the lower electrode of the cells (1 );
- a PN junction layer (4) destined to the production of electricity;
- a transparent conductive layer (5) destined to form the upper electrode of the cells; b) Obtaining the surface distribution of electrical or optoelectronic properties of the obtained semi-product; c) From the surface distribution, determining a surface division of the semi-product in a plurality of zones (1 ), such that the difference of the electricity production capacity between zones (1 ) is lower than a determined percentage; d) Cutting the layers (3, 4, 5) arranged on the substrate (2) according to the surface division obtained, thus obtaining a plurality of cells (1 ); e) Connecting in series the cells (1 ).
2. - Method according to claim 1 , wherein step c) is carried out such that the variation of electrical or optoelectronic properties inside each one of the cells is below a predetermined value.
3. - Method according to any of the previous claims, wherein the electrical properties are the open-circuit voltages (Voc), the optoelectronic properties and/or the efficiencies
4. - Method according to any of the previous claims, which includes, between the steps a) and b), the sub-steps of determining the distribution of the shunts of the semi-product and cut them away from the layered semi-product.
5.- Method according to any of the previous claims, which includes, in step b) determining the shunts or remaining shunts, and a subsequent sub-step of cutting away said shunts determined in step b), or letting them in a position with respect to the cuts such that their effect on the efficiency of the cell is very much reduced
6. - Method according to any of the previous claims, wherein step b) is carried out using imaging characterization techniques such as electroluminiscence, photoluminescence, dark lock-in Thermography or illuminated lock-in thermography.
7. - Method according to any of the previous claims, wherein step c) is carried out by modelling the photovoltaic panel (PV) by using a finite element method and the electrical properties determined in step b).
8. - Method according to any of claims 1 to 6, wherein step c) is carried out by directly using the distribution of one of the electrical or optoelectronic properties determined in step b) or the distribution of a combination of the electrical or optoelectronic properties determined in step b).
PCT/EP2015/058740 2015-04-22 2015-04-22 Method for manufacturing a photovoltaic panel comprising a plurality of thin film photovoltaic cells connected in series WO2016169595A1 (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110176506A (en) * 2019-05-31 2019-08-27 信利半导体有限公司 Film photovoltaic cell cascaded structure and the concatenated preparation process of film photovoltaic cell
CN116929228A (en) * 2023-09-19 2023-10-24 无锡日联科技股份有限公司 Quality detection equipment and detection method for photovoltaic panel welding module

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080083448A1 (en) * 2006-09-29 2008-04-10 Borden Peter G Interconnect for thin film photovoltaic modules
US20100210040A1 (en) * 2008-11-17 2010-08-19 Solopower, Inc. Method and apparatus for reducing the effect of shunting defects on thin film solar cell performance
EP2654089A2 (en) * 2007-02-16 2013-10-23 Nanogram Corporation Solar cell structures, photovoltaic modules and corresponding processes
WO2013179898A1 (en) * 2012-05-29 2013-12-05 三菱電機株式会社 Solar battery module, method for producing same, and device for managing production of solar battery module
WO2014071417A2 (en) * 2012-11-05 2014-05-08 Solexel, Inc. Systems and methods for monolithically isled solar photovoltaic cells and modules
DE102012024255A1 (en) * 2012-12-12 2014-06-12 Forschungszentrum Jülich GmbH Method for manufacturing and series interconnecting of photovoltaic elements to thin-layer solar module, involves structuring total area of module by structuring step so that breadth of segment is locally adjusted for generating current

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5220197B2 (en) * 2009-08-26 2013-06-26 三菱電機株式会社 Solar cell and manufacturing method thereof

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080083448A1 (en) * 2006-09-29 2008-04-10 Borden Peter G Interconnect for thin film photovoltaic modules
EP2654089A2 (en) * 2007-02-16 2013-10-23 Nanogram Corporation Solar cell structures, photovoltaic modules and corresponding processes
US20100210040A1 (en) * 2008-11-17 2010-08-19 Solopower, Inc. Method and apparatus for reducing the effect of shunting defects on thin film solar cell performance
WO2013179898A1 (en) * 2012-05-29 2013-12-05 三菱電機株式会社 Solar battery module, method for producing same, and device for managing production of solar battery module
WO2014071417A2 (en) * 2012-11-05 2014-05-08 Solexel, Inc. Systems and methods for monolithically isled solar photovoltaic cells and modules
DE102012024255A1 (en) * 2012-12-12 2014-06-12 Forschungszentrum Jülich GmbH Method for manufacturing and series interconnecting of photovoltaic elements to thin-layer solar module, involves structuring total area of module by structuring step so that breadth of segment is locally adjusted for generating current

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110176506A (en) * 2019-05-31 2019-08-27 信利半导体有限公司 Film photovoltaic cell cascaded structure and the concatenated preparation process of film photovoltaic cell
CN110176506B (en) * 2019-05-31 2024-05-07 信利半导体有限公司 Thin-film photovoltaic cell series structure and preparation process of thin-film photovoltaic cell series
CN116929228A (en) * 2023-09-19 2023-10-24 无锡日联科技股份有限公司 Quality detection equipment and detection method for photovoltaic panel welding module
CN116929228B (en) * 2023-09-19 2024-02-13 无锡日联科技股份有限公司 Quality detection equipment and detection method for photovoltaic panel welding module

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