WO2016151759A1 - Semiconductor optical element and method for manufacturing same - Google Patents
Semiconductor optical element and method for manufacturing same Download PDFInfo
- Publication number
- WO2016151759A1 WO2016151759A1 PCT/JP2015/058911 JP2015058911W WO2016151759A1 WO 2016151759 A1 WO2016151759 A1 WO 2016151759A1 JP 2015058911 W JP2015058911 W JP 2015058911W WO 2016151759 A1 WO2016151759 A1 WO 2016151759A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- single crystal
- type
- germanium layer
- layer
- crystal germanium
- Prior art date
Links
- 230000003287 optical effect Effects 0.000 title claims abstract description 178
- 239000004065 semiconductor Substances 0.000 title claims abstract description 140
- 238000000034 method Methods 0.000 title claims description 54
- 238000004519 manufacturing process Methods 0.000 title claims description 43
- 239000013078 crystal Substances 0.000 claims abstract description 313
- 239000000758 substrate Substances 0.000 claims abstract description 121
- 238000000605 extraction Methods 0.000 claims abstract description 13
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 441
- 229910052732 germanium Inorganic materials 0.000 claims description 439
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 121
- 229910052710 silicon Inorganic materials 0.000 claims description 120
- 239000010703 silicon Substances 0.000 claims description 120
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims description 64
- 238000005498 polishing Methods 0.000 claims description 13
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 12
- 230000000737 periodic effect Effects 0.000 claims description 7
- 230000001902 propagating effect Effects 0.000 claims description 6
- 239000010408 film Substances 0.000 description 171
- 239000007789 gas Substances 0.000 description 37
- 238000004140 cleaning Methods 0.000 description 36
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 30
- 230000007547 defect Effects 0.000 description 25
- 238000005530 etching Methods 0.000 description 24
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 23
- 238000000137 annealing Methods 0.000 description 23
- 239000001257 hydrogen Substances 0.000 description 22
- 229910052739 hydrogen Inorganic materials 0.000 description 22
- 229910052814 silicon oxide Inorganic materials 0.000 description 22
- 230000008569 process Effects 0.000 description 19
- 238000010438 heat treatment Methods 0.000 description 17
- 230000000694 effects Effects 0.000 description 16
- 229910052581 Si3N4 Inorganic materials 0.000 description 13
- 238000006243 chemical reaction Methods 0.000 description 13
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 13
- 230000015572 biosynthetic process Effects 0.000 description 10
- 239000000969 carrier Substances 0.000 description 10
- 239000002019 doping agent Substances 0.000 description 10
- 238000009826 distribution Methods 0.000 description 9
- 238000006722 reduction reaction Methods 0.000 description 9
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 8
- 229910052751 metal Inorganic materials 0.000 description 8
- 239000002184 metal Substances 0.000 description 8
- 238000000206 photolithography Methods 0.000 description 8
- 239000000356 contaminant Substances 0.000 description 7
- 238000010586 diagram Methods 0.000 description 7
- 230000031700 light absorption Effects 0.000 description 7
- 230000007704 transition Effects 0.000 description 7
- 239000000460 chlorine Substances 0.000 description 6
- 150000001875 compounds Chemical class 0.000 description 6
- 238000000151 deposition Methods 0.000 description 6
- 150000002431 hydrogen Chemical group 0.000 description 6
- 230000035945 sensitivity Effects 0.000 description 6
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 5
- 230000005540 biological transmission Effects 0.000 description 5
- 230000008878 coupling Effects 0.000 description 5
- 238000010168 coupling process Methods 0.000 description 5
- 238000005859 coupling reaction Methods 0.000 description 5
- 230000008021 deposition Effects 0.000 description 5
- QUZPNFFHZPRKJD-UHFFFAOYSA-N germane Chemical compound [GeH4] QUZPNFFHZPRKJD-UHFFFAOYSA-N 0.000 description 5
- 239000000203 mixture Substances 0.000 description 5
- 239000001301 oxygen Substances 0.000 description 5
- 229910052760 oxygen Inorganic materials 0.000 description 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 5
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 4
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 description 4
- 229910052801 chlorine Inorganic materials 0.000 description 4
- 238000011109 contamination Methods 0.000 description 4
- 229910052731 fluorine Inorganic materials 0.000 description 4
- 239000011737 fluorine Substances 0.000 description 4
- 229910052986 germanium hydride Inorganic materials 0.000 description 4
- 230000002093 peripheral effect Effects 0.000 description 4
- 230000006798 recombination Effects 0.000 description 4
- 238000005215 recombination Methods 0.000 description 4
- 239000000126 substance Substances 0.000 description 4
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 3
- YZCKVEUIGOORGS-UHFFFAOYSA-N Hydrogen atom Chemical compound [H] YZCKVEUIGOORGS-UHFFFAOYSA-N 0.000 description 3
- 230000004913 activation Effects 0.000 description 3
- 230000007423 decrease Effects 0.000 description 3
- 125000004435 hydrogen atom Chemical group [H]* 0.000 description 3
- 238000005468 ion implantation Methods 0.000 description 3
- 230000001678 irradiating effect Effects 0.000 description 3
- 229910052757 nitrogen Inorganic materials 0.000 description 3
- 230000010355 oscillation Effects 0.000 description 3
- 230000008054 signal transmission Effects 0.000 description 3
- 230000000087 stabilizing effect Effects 0.000 description 3
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 2
- CURLTUGMZLYLDI-UHFFFAOYSA-N Carbon dioxide Chemical compound O=C=O CURLTUGMZLYLDI-UHFFFAOYSA-N 0.000 description 2
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 2
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- 229910052799 carbon Inorganic materials 0.000 description 2
- 238000001816 cooling Methods 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 229910000078 germane Inorganic materials 0.000 description 2
- 229910000041 hydrogen chloride Inorganic materials 0.000 description 2
- IXCSERBJSXMMFS-UHFFFAOYSA-N hydrogen chloride Substances Cl.Cl IXCSERBJSXMMFS-UHFFFAOYSA-N 0.000 description 2
- 230000010365 information processing Effects 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000001590 oxidative effect Effects 0.000 description 2
- 239000002994 raw material Substances 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 230000006641 stabilisation Effects 0.000 description 2
- 238000011105 stabilization Methods 0.000 description 2
- KPZGRMZPZLOPBS-UHFFFAOYSA-N 1,3-dichloro-2,2-bis(chloromethyl)propane Chemical compound ClCC(CCl)(CCl)CCl KPZGRMZPZLOPBS-UHFFFAOYSA-N 0.000 description 1
- VXEGSRKPIUDPQT-UHFFFAOYSA-N 4-[4-(4-methoxyphenyl)piperazin-1-yl]aniline Chemical compound C1=CC(OC)=CC=C1N1CCN(C=2C=CC(N)=CC=2)CC1 VXEGSRKPIUDPQT-UHFFFAOYSA-N 0.000 description 1
- KZBUYRJDOAKODT-UHFFFAOYSA-N Chlorine Chemical compound ClCl KZBUYRJDOAKODT-UHFFFAOYSA-N 0.000 description 1
- 229910000927 Ge alloy Inorganic materials 0.000 description 1
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 description 1
- 229910003902 SiCl 4 Inorganic materials 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- 239000006061 abrasive grain Substances 0.000 description 1
- 230000003213 activating effect Effects 0.000 description 1
- 229910052787 antimony Inorganic materials 0.000 description 1
- RBFQJDQYXXHULB-UHFFFAOYSA-N arsane Chemical compound [AsH3] RBFQJDQYXXHULB-UHFFFAOYSA-N 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- 229910002092 carbon dioxide Inorganic materials 0.000 description 1
- 239000001569 carbon dioxide Substances 0.000 description 1
- 239000012159 carrier gas Substances 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- SLLGVCUQYRMELA-UHFFFAOYSA-N chlorosilicon Chemical compound Cl[Si] SLLGVCUQYRMELA-UHFFFAOYSA-N 0.000 description 1
- 230000003749 cleanliness Effects 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000000354 decomposition reaction Methods 0.000 description 1
- 230000001934 delay Effects 0.000 description 1
- ZOCHARZZJNPSEU-UHFFFAOYSA-N diboron Chemical compound B#B ZOCHARZZJNPSEU-UHFFFAOYSA-N 0.000 description 1
- BUMGIEFFCMBQDG-UHFFFAOYSA-N dichlorosilicon Chemical compound Cl[Si]Cl BUMGIEFFCMBQDG-UHFFFAOYSA-N 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- VXGHASBVNMHGDI-UHFFFAOYSA-N digermane Chemical compound [Ge][Ge] VXGHASBVNMHGDI-UHFFFAOYSA-N 0.000 description 1
- PZPGRFITIJYNEJ-UHFFFAOYSA-N disilane Chemical compound [SiH3][SiH3] PZPGRFITIJYNEJ-UHFFFAOYSA-N 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000009429 electrical wiring Methods 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- SCCCLDWUZODEKG-UHFFFAOYSA-N germanide Chemical compound [GeH3-] SCCCLDWUZODEKG-UHFFFAOYSA-N 0.000 description 1
- 150000002290 germanium Chemical class 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229910021478 group 5 element Inorganic materials 0.000 description 1
- 229910052736 halogen Inorganic materials 0.000 description 1
- 150000002367 halogens Chemical class 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 229910001092 metal group alloy Inorganic materials 0.000 description 1
- -1 moisture Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 125000002524 organometallic group Chemical group 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 1
- 239000005049 silicon tetrachloride Substances 0.000 description 1
- 239000002002 slurry Substances 0.000 description 1
- 238000006557 surface reaction Methods 0.000 description 1
- IEXRMSFAVATTJX-UHFFFAOYSA-N tetrachlorogermane Chemical compound Cl[Ge](Cl)(Cl)Cl IEXRMSFAVATTJX-UHFFFAOYSA-N 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- PPDADIYYMSXQJK-UHFFFAOYSA-N trichlorosilicon Chemical compound Cl[Si](Cl)Cl PPDADIYYMSXQJK-UHFFFAOYSA-N 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- 238000005406 washing Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/10—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
- H01S5/12—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region the resonator having a periodic structure, e.g. in distributed feedback [DFB] lasers
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B6/13—Integrated optical circuits characterised by the manufacturing method
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/24—Coupling light guides
- G02B6/42—Coupling light guides with opto-electronic elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by at least one potential-jump barrier or surface barrier, e.g. phototransistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/12—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof structurally associated with, e.g. formed in or on a common substrate with, one or more electric light sources, e.g. electroluminescent light sources, and electrically or optically coupled thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/02—Structural details or components not essential to laser action
- H01S5/026—Monolithically integrated components, e.g. waveguides, monitoring photo-detectors, drivers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/30—Structure or shape of the active region; Materials used for the active region
- H01S5/32—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures
Definitions
- the present invention relates to a semiconductor optical device and a manufacturing method thereof.
- Silicon photonics that forms optical circuits using optical elements such as light emitting / receiving elements, waveguides, modulators, and multiplexers / demultiplexers on silicon (Si) substrates is a technology that realizes optical interconnection between chips and within chips.
- CMOS process realization of a light-emitting element that can be realized by a CMOS process is a very big problem. This is because silicon (Si) and germanium (Ge), which are usually used in the CMOS process, are indirect transition semiconductors, and therefore have a very low emission intensity compared to compound semiconductor lasers. Under such circumstances, in recent years, attention has been focused on the realization of a laser diode using germanium.
- Patent Document 1 Conventional laser diodes using germanium as the light emitting layer are described in, for example, Patent Document 1 and Non-Patent Document 1. Since germanium in the bulk state is an indirect transition semiconductor, its luminous efficiency is much smaller than that of a compound semiconductor. Therefore, a method of changing the characteristics to a direct transition semiconductor by applying an extension strain to germanium has been attempted. By growing a germanium layer directly on the silicon substrate and performing heat treatment, tensile strain remains in germanium due to the difference in thermal expansion coefficient between silicon and germanium. Although the energy of the conduction band changes depending on the strain, germanium is close to the characteristics of a transition semiconductor because the amount of energy decrease at the ⁇ point is larger than the L point having the lowest energy in the conductor when an extension strain is applied.
- a laser diode applies a voltage in the forward direction to inject carriers from the electrode, and utilizes a light emission process that occurs when electrons and holes recombine. The light emission intensity with respect to the injected carrier amount is lowered, and the quantum efficiency of light emission is lowered.
- Patent Document 2 describes a method for manufacturing a light-emitting element using a single crystal germanium layer improved to the above.
- Patent Document 3 discloses a light emitting element using a GOI substrate in which a Ge layer with few crystal defects is formed on a silicon substrate having an oxide film formed on the surface.
- Patent Document 4 describes a method of forming a high-quality germanium layer on a silicon oxide film by performing selective epitaxial growth on a silicon oxide film mask formed on a silicon substrate.
- the energy difference between the L point and the ⁇ point is 0.136 eV, and it is disclosed in Non-Patent Document 1 that carriers can be injected into the ⁇ point by high-concentration n-type doping and direct transition emission can be promoted. .
- Non-Patent Document 2 A conventional photodiode using germanium as a light receiving layer is described in Non-Patent Document 2, for example.
- a vertical pin structure is formed by growing germanium serving as a light-receiving layer on a silicon substrate on which a doping layer serving as an electrode is formed, and forming an electrode on the surface.
- Still another photodiode is described in Non-Patent Document 3, for example.
- a waveguide type photodiode is formed by growing germanium as a light receiving layer on a silicon substrate and forming electrodes from the left and right.
- an optical signal is incident on the light receiving portion with a reverse voltage applied between the electrodes, so that carriers generated by light absorption are applied to the electrodes. By flowing, the optical signal is converted into an electric signal.
- Patent Document 4 As a result of studies by the inventors on the configuration of the prior art, it was determined that the configuration described in Patent Document 4 is promising from the viewpoint of crystallinity that affects the light emission efficiency of the laser diode and the dark current of the photodiode. Therefore, this configuration was examined in detail.
- FIG. 22 was created by the present inventors based on Patent Document 4, and shows a cross-sectional structure of an intrinsic part of a laser diode in which a germanium light emitting portion is formed on a thick film GOI structure formed by selective epitaxial growth.
- the silicon substrate 241 is a support substrate for the SOI substrate. After selectively epitaxially growing an n-type germanium layer using the single crystal silicon layer on the buried oxide film 242 as a crystal seed, the defect-containing region is etched away together with the single crystal silicon layer. By doing so, a high-quality n-type single crystal germanium layer 244 is formed.
- reference numeral 243 denotes a single crystal silicon thin wire waveguide
- reference numeral 245 denotes an insulating film.
- the n-type single crystal germanium layer 244 after forming the n-type single crystal germanium layer 244, the surface is covered with an insulating film, the contact region is exposed by photolithography and etching, and p The n-type electrode 246 and the n-type electrode 247 are formed, and a mask is necessary for each of the p-type electrode and the n-type electrode, and if an area necessary for mask alignment is to be secured, the n-type single crystal germanium layer 244 It turned out to be difficult to reduce the width.
- the carrier density is determined according to the volume in which the carriers are confined. Therefore, as the width of the light emitting region increases, the carrier density decreases and the light emission intensity of the laser diode decreases.
- the carrier density decreases and the light emission intensity of the laser diode decreases.
- An object of the present invention is to provide a germanium optical element formed on a silicon oxide film, which has a high carrier density and good carrier distribution uniformity in a laser diode, or a junction capacitance in a contact region in a photodiode.
- An object of the present invention is to provide a semiconductor optical device that can be reduced and a method for manufacturing the same.
- a semiconductor substrate As one embodiment for achieving the above object, a semiconductor substrate, A first insulating film provided on the semiconductor substrate; A band-shaped n-type or undoped single crystal germanium layer provided on the first insulating film; A p-type extraction electrode formed on a side surface of the band-shaped n-type or undoped single crystal germanium layer,
- the p-type lead electrode has an electrode portion and a wiring portion, The upper surface of the electrode portion is the same height as the upper surface of the n-type or undoped single crystal germanium layer, and is higher than the upper surface of the wiring portion.
- a fourth step of polishing from the surface to a height generally coinciding with the surface of the second insulating film of comprising:
- a germanium optical element formed on a silicon oxide film has a high carrier density in a laser diode and good carrier flow and distribution uniformity, or in a photodiode in a contact region.
- a semiconductor optical device capable of reducing the junction capacitance and a method for manufacturing the same can be provided.
- the inventors examined a method for reducing the junction capacitance in the contact region between the electrode and the single crystal germanium layer while making the electric field in the single crystal germanium layer unidirectional. At that time, it has been found that the semiconductor layer serving as the electrode of the germanium layer is selectively grown only on the germanium layer with respect to the insulating film even while doping impurities.
- the present invention was born from this new finding, and the electrodes were formed in a self-aligned manner in contact with the sidewalls of the single crystal germanium layer formed on the insulating film, and the upper surfaces of the single crystal germanium layer and the electrodes were It has the same height.
- the current flowing through the single crystal germanium layer can be made uniform, the carrier concentration can be improved in the entire light emitting region, and the efficiency of the semiconductor optical device is improved. Is possible.
- the contact area between the single crystal germanium layer and the electrode is reduced, the junction capacity of the semiconductor optical device is greatly reduced, and the semiconductor optical device can be operated at high frequency.
- the potential distribution in the germanium layer becomes uniform when a reverse potential is applied to the electrode, the light receiving sensitivity of the photodiode is improved.
- the ratio of direct transition is increased and the emission quantum efficiency is improved.
- the laser diode, the photodiode, and the waveguide can be formed on the same substrate, the coupling loss between the semiconductor optical element and the waveguide is reduced in the optical transmission / reception circuit, and the loss of the optical signal can be reduced.
- FIG. 1 is a cross-sectional structure diagram of the intrinsic part of the semiconductor optical device according to the present embodiment.
- 2A to 2E are cross-sectional structural views illustrating the manufacturing method of the present embodiment in the order of steps.
- FIG. 2F is a cross-sectional structure diagram of an intrinsic part of another semiconductor optical device according to this example.
- a method for manufacturing a semiconductor optical device according to this example will be described below with reference to FIGS. 2A to 2E.
- the upper figure shows a cross-sectional view
- the lower figure shows a top view, mainly showing the main parts of the components.
- (A) Formation of Crystal Nuclei An SOI substrate in which a stacked structure of the insulating film 102 and the single crystal silicon layer 103 is formed on the surface side of the semiconductor substrate 101 is used.
- a silicon substrate is used as the semiconductor substrate 101.
- the film thickness of the single crystal silicon layer 103 may be 10 nm or more in order to obtain uniform crystal nuclei for later growth of the germanium layer, and dislocation in a direction parallel to the substrate in the selective growth of germanium in the lateral direction. Is preferably 1 ⁇ m or less in order to suppress the propagation of.
- the single crystal silicon layer 103 is partially etched away by photolithography and etching to form crystal nuclei for epitaxial growth of germanium in a line shape (FIG. 2A).
- the single crystal germanium layer is preferentially grown in a direction horizontal to the substrate, the crystal of the SOI layer is formed so that the side wall of the line-shaped single crystal silicon layer 103 has a crystal plane equivalent to (100). It is preferable to form an orientation and etching mask pattern. Further, the processing width of the single crystal silicon layer 103 may be set to 10 nm or more in order to obtain a uniform crystal nucleus for the epitaxial growth of germanium to be grown later. There is no restriction on the upper limit of the width, but 1 mm or less is preferable in order not to significantly reduce the integration degree of the element.
- a direction perpendicular to the cross-sectional view of FIG. 2A (in the top view of the lower diagram of FIG. 2A, the vertical direction) ) Preferably has a length of 50 ⁇ m or more as a length to operate as a waveguide.
- the upper limit of the length is set to 5 mm or less in consideration of a practical element size as an integrated light source.
- n-type single crystal germanium layer 104 Formation of the n-type single crystal germanium layer 104 will be described.
- B1 Cleaning before epitaxial growth If an etching residue or a natural oxide film remains on the surface of the partially etched line-shaped single-crystal silicon layer 103, the single-crystal germanium layer is grown by epitaxial growth. Many defects are induced at the interface between the crystalline germanium layer and the single crystal silicon layer, and the crystallinity of the entire single crystal germanium layer that grows thereafter deteriorates. Therefore, the surface and sidewalls of the single crystal silicon layer 103 must be cleaned. .
- the pressure is preferably about 1 ⁇ 10 ⁇ 5 Pa or less.
- oxygen, moisture, or gas containing organic contaminants is mixed into the transfer chamber or growth chamber. Need to prevent. Therefore, the silicon substrate 101 is always transported in a state where clean nitrogen (N 2 ) is supplied, or when transported in a vacuum, the load lock chamber pressure is about 1 ⁇ 10 ⁇ 5 Pa or less. It is desirable to do it after becoming. Even if the surface and side walls of the single crystal silicon layer 103 are subjected to hydrogen termination treatment, formation of an oxide film on the surface and adhesion of contaminants during transportation cannot be completely prevented.
- the surface is cleaned before epitaxial growth.
- the natural oxide film on the surface of the silicon layer can be removed by the reaction of the formula (1) by heating the silicon substrate 101 in a vacuum.
- the substrate surface can also be cleaned by heating the silicon substrate 101 with clean hydrogen supplied into the growth chamber. In the cleaning by heating in vacuum described above, when the substrate temperature is about 500 ° C. or higher, the hydrogen that has terminated the surface and side walls of the single crystal silicon layer 103 is desorbed, and the silicon on which the surface and side walls are exposed is removed.
- hydrogen gas is first supplied to the growth chamber.
- the substrate temperature be lower than 500 ° C. from which hydrogen is desorbed.
- the flow rate of the hydrogen gas is preferably 10 ml / min or more so that the gas can be supplied with good controllability, and 100 l / min or less is preferable for safely treating the exhausted gas.
- the lower limit of the partial pressure of hydrogen gas in the growth chamber is set to 10 Pa so that the gas is uniformly supplied to the substrate surface, and the upper limit may be set to atmospheric pressure in order to maintain the safety of the apparatus.
- the silicon substrate is heated to the cleaning temperature.
- any mechanism or structure may be used as long as there is no contamination of the silicon substrate during heating or an extreme temperature difference in the substrate.
- induction heating that heats a work coil by applying a high frequency, heating by a resistance heater, etc. can be applied.
- a heating method using radiation from a lamp is used as a method that enables temperature control in a short time. Can do. This heating method is not limited to cleaning, and the same applies to heating during the growth of a single crystal described later.
- the cleaning temperature has a cleaning effect.
- the cleaning temperature should be 600 ° C. or higher, and the cleaning temperature needs to be 900 ° C. or lower in order to reduce the influence on the surface structure formed before epitaxial growth.
- the removal efficiency of silicon natural oxide film and contaminants varies depending on the cleaning temperature, and the higher the temperature, the shorter the effect. Therefore, it is desirable to perform heating under conditions that do not perform heat treatment more than necessary.
- the cleaning temperature is 700 ° C.
- the cleaning effect is small, and therefore the cleaning time needs to be 30 minutes.
- the cleaning time is 900 ° C., the cleaning time is 2 minutes or more.
- cleaning using atomic hydrogen can be performed as a method that enables the cleaning temperature to be lowered.
- this method by irradiating the surface with active hydrogen atoms, it is possible to cause a reduction reaction of oxygen without raising the substrate temperature, and a cleaning effect can be obtained even at room temperature.
- atomic hydrogen generation methods hydrogen molecules are thermally dissociated by irradiating hydrogen gas to a filament such as tungsten heated to a high temperature, or hydrogen molecules are electrically generated by generating plasma in hydrogen gas. Can be dissociated, and atomic hydrogen can be generated by irradiation with ultraviolet rays.
- the natural oxide film on the surface can be removed by a chemical reaction that does not require heating.
- a chemical reaction that does not require heating.
- HF hydrogen fluoride
- the oxide film is removed by an etching reaction, so that the surface can be cleaned at room temperature.
- the substrate temperature greatly fluctuates due to the change in the gas flow rate when epitaxial growth is started. .
- the throughput can be greatly improved.
- the strip-shaped n-type single crystal germanium layer 104 is epitaxially grown using the line-shaped single crystal silicon layer 103 as a growth nucleus (upper diagram in FIG. 2B).
- the source gas used here a compound composed of germanium and hydrogen, chlorine, fluorine, or the like can be used.
- monogermane GaH 4
- digermane Ge 2 H 6
- germane tetrachloride GeCl 4
- the use method is the same for other gases.
- monogermane is used as the source gas.
- the temperature range in the case where epitaxial growth is performed by decomposing the source gas by thermal energy is 300 ° C. or higher at which monogermane reacts on the substrate surface.
- the upper limit of the growth temperature may be 940 ° C. or less.
- the growth pressure may be 0.1 Pa or higher, where the growth rate is determined by the reaction on the surface, and the upper limit may be 10000 Pa or lower at which the reaction in the gas phase begins to occur.
- a growth method that causes a chemical reaction using energy other than heat, such as plasma or light, can also be used.
- the growth temperature is 100 ° C. in order that the radical containing germanium moves on the surface and epitaxial growth proceeds. The above temperature is necessary. Further, in order to improve the crystallinity of the n-type single crystal germanium layer 104, it is desirable that radical molecules in the source gas easily form a covalent bond with germanium atoms on the growth surface of the single crystal germanium layer.
- the n-type single crystal germanium layer 104 is doped so as to have an n-type carrier concentration of 5 ⁇ 10 18 cm ⁇ 3 or more.
- ions containing P, As, Sb, etc. which become n-type dopants, are implanted into the single crystal germanium layer 104, and then annealed at a high temperature to restore dopant activation and germanium crystallinity.
- doping that does not deteriorate the crystallinity is performed. Is preferable.
- the growth is performed by supplying a doping gas in addition to the germanium source gas.
- a doping gas a compound composed of a Group 5 element and hydrogen, chlorine, fluorine, or the like can be used, and examples thereof include phosphine (PH 3 ) and arsine (AsH 3 ).
- PH 3 phosphine
- AsH 3 arsine
- the annealing time is preferably the shortest time necessary for activating the dopant.
- the annealing time may be 5 seconds or less.
- the annealing temperature is 600 ° C., it is preferable that the annealing time is about 5 minutes.
- spin-on that diffuses the dopant into the single-crystal germanium layer by applying a low-melting-point glass or organometallic material containing a large amount of dopant to the surface of the single-crystal germanium layer and annealing it under appropriate conditions -Doping can also be applied.
- B6 Selective epitaxial growth In the growth of the n-type single crystal germanium layer 104, after the growth starts with the single crystal silicon layer 103 as a nucleus, a selective growth state in which no germanium layer is deposited directly on the buried insulating film 102 is observed. It is preferable to hold it.
- the following reaction occurs on the silicon oxide film due to the reaction between the germanium source gas and the surface molecules.
- germanium source gas For example, when monogermane (GeH 4 ) is used as a germanium source gas, GeH 4 + SiO 2 ⁇ SiO ⁇ + GeO ⁇ + 2H 2 ⁇ (2)
- Such a reduction reaction by germane occurs.
- the above reduction reaction is a part of a large number of reactions, and there are other reduction reactions between radical molecules in which the raw material gas is decomposed to a high energy state and a silicon oxide film.
- etching by the reduction reaction and deposition caused by decomposition of the source gas proceed simultaneously, and the magnitude relationship between etching and deposition changes depending on the growth temperature and pressure.
- the deposition of the germanium layer on the silicon oxide film exceeds the above reduction reaction, or when the silicon nitride film is used as the buried insulating film 102 and the above reduction reaction cannot be used.
- a halogen-based gas such as chlorine gas (Cl) or hydrogen chloride gas (HCl) is added to etch the germanium layer itself deposited on the insulating film. Examples of the reaction are as shown in formulas (3) to (5): Ge + 2Cl 2 ⁇ GeCl 4 ⁇ (3) Ge + 2HCl ⁇ GeCl 2 ⁇ + H 2 (4) Ge + 2HCl ⁇ GeH 2 Cl 2 ⁇ (5)
- the germanium layer is deposited on the insulating film by introducing the etching reaction described above.
- the single crystal germanium layer 104 is selectively formed only in a region in contact with the nucleus of the single crystal silicon layer 103 by setting the single crystal germanium layer to grow on the single crystal silicon layer or the single crystal germanium layer. Grows (upper view in FIG. 2B). It goes without saying that selective epitaxial growth utilizing this etching reaction is possible even when an insulating material other than a silicon oxide film or a silicon nitride film is used as the insulating film.
- the single crystal germanium layer 104 is processed by dry etching in a later process, it is desirable that facets are not generated as much as possible in a region in contact with the buried insulating film 102 in a direction parallel to the substrate. As a result, the distance in the horizontal direction in contact with the buried insulating film 102 is preferably 500 nm or more.
- B7 p-type doping
- selective growth of the p-type single crystal germanium layer 105 constituting the electrode portion of the extraction electrode is performed (FIG. 2B). The selective growth is the same as that of the n-type single crystal germanium layer 104.
- a p-type doping gas may be added simultaneously in addition to the germanium source gas.
- the p-type doping gas a compound composed of a Group 3 element and hydrogen, chlorine, fluorine, or the like can be used, and examples thereof include diborane (B 2 H 6 ).
- the doping concentration can be controlled by the flow rate of the doping gas.
- the concentration of the p-type dopant may be 1 ⁇ 10 18 cm ⁇ 3 or more so that the contact resistance does not increase, and 1 ⁇ 10 20 cm ⁇ 3 in order to suppress generation of a tunnel current due to a high concentration of pn junctions. The following is preferable.
- the p-type single crystal germanium layer 105 is continuously selectively epitaxially grown by switching from the n-type doping gas to the p-type doping gas. Therefore, defects at the interface due to lattice mismatch do not occur, and since growth is not interrupted, generation of interface states due to contamination with oxygen or the like can be prevented.
- C Deposition of p-type silicon layer and insulating film Subsequently, a p-type silicon layer 106 to be a p-type lead electrode (having an electrode portion and a wiring portion) is deposited (upper view in FIG. 2C).
- the extraction electrode (particularly the electrode portion) may be a p-type polycrystalline silicon layer, but is preferably a p-type single crystal silicon layer having a low resistance.
- the silicon source gas a compound composed of silicon and hydrogen, chlorine, fluorine, or the like can be used.
- monosilane (SiH 4 ), disilane (Si 2 H 6 ), dichlorosilane (SiH 2 Cl 2 ), silicon trichloride (SiHCl 3 ), silicon tetrachloride (SiCl 4 ), and the like can be given.
- nitrogen is often used in the case of forming a polycrystalline silicon layer
- hydrogen is often used in the case of forming a single crystal silicon layer.
- a single crystal silicon layer grows on the surface of the p-type single crystal germanium layer 105 (electrode portion of the extraction electrode), but an amorphous silicon layer or a polycrystalline silicon layer is formed on the buried insulating film 102. Is deposited (wiring portion of the extraction electrode).
- the single crystal silicon layer over the single crystal germanium layer or the amorphous silicon layer deposited on the insulating film has high resistance, the resistance can be lowered by improving crystallinity by high-temperature annealing.
- annealing in a short time is suitable. For example, at 850 ° C., annealing is performed for about 5 seconds.
- an insulating film 107 is deposited on the entire surface of the p-type single crystal germanium layer 105 and the buried insulating film 102 in order to perform polishing for forming a light emitting region later (FIG. 2C).
- the film thickness to be deposited is adjusted according to the final finished film thickness of the single crystal germanium layer 104 to be the light emitting region. For example, if a light emitting layer having a thickness of 1 ⁇ m is to be formed, the total thickness of the p-type silicon layer 106 and the insulating film 107 is set to 1 ⁇ m.
- CMP chemical mechanical polishing
- the surface of the silicon substrate 101 is flattened by holding the silicon substrate 101 with a carrier and performing polishing while supplying slurry containing various chemical components and hard abrasive grains. If polishing is continued under conditions where the silicon layer or germanium layer is easily polished, the polishing stops at the position of the surface of the insulating film 107 occupying an area with a large surface area.
- the p-type silicon layer 106, the p-type single crystal germanium layer 105, and the n-type single crystal germanium layer 104 are polished.
- the crystallinity of the n-type single crystal germanium layer 104 can be improved and the tensile strain can be further increased.
- the silicon substrate 101, the buried insulating film 102, the single crystal silicon layer 103, and the n-type single crystal germanium layer 104 all expand according to the annealing temperature. To do. The degree of expansion is determined by each material, and the thermal expansion coefficient that serves as an index is examined.
- the thermal expansion coefficient of germanium is about 6.1 ⁇ 10 ⁇ 6 / ° C., which is a large value compared to 2.6 ⁇ 10 ⁇ 6 / ° C. of silicon and 0.5 ⁇ 10 ⁇ 6 / ° C. of silicon oxide film. Therefore, if the temperature is the same during annealing, germanium has a larger volume expansion. When the strain of the germanium layer is relaxed at this high temperature state, the silicon layer 103 and the buried insulating film 102 do not shrink so much during the cooling process after the annealing, whereas the n-type single crystal germanium layer 104 tends to shrink greatly.
- an elongation strain can be applied to the n-type single crystal germanium layer 104 by annealing, and the emission intensity can be further improved.
- the elongation strain in the ⁇ 100> direction of the n-type single crystal germanium layer was about 0.2%.
- the p-type single crystal germanium layer 105 is subsequently grown, the growth proceeds so as to be aligned with the lattice spacing of the growth surface. Therefore, the lateral direction of the single crystal germanium layer 105 is maintained with the tensile strain applied once maintained as it is. You can continue to grow.
- the extension strain of the n-type single crystal germanium layer 104 serving as a light emitting region can be increased (FIG. 2E).
- the strain applying layer 109 it is preferable to use a silicon nitride film whose composition and deposition conditions are adjusted. The silicon nitride film can create a distorted state when the film is deposited depending on the composition ratio of silicon and nitrogen contained in the film and the amount of hydrogen. There is a case.
- a silicon nitride film is used as the strain applying layer 109 in this embodiment, either a compressive strain or an extension strain may be used.
- the region that receives the tensile strain in the n-type single crystal germanium layer 104 varies depending on the strain direction of the silicon nitride film, but a region that receives the tensile strain always occurs.
- F Removal of defect-containing region
- the defect-containing region including the interface between the silicon layer and the germanium layer is removed by etching.
- the single crystal silicon layer 103 and the n-type single crystal germanium layer 104 existing in the periphery thereof are removed by mask formation and etching by photolithography.
- the n-type lead electrode may be an n-type heavily doped polycrystalline silicon layer, a laminated structure of a polycrystalline silicon layer and a metal layer, or an electrode composed of only a metal layer.
- a metal electrode is directly formed on the germanium layer 104, for example, an electrode material such as nickel is deposited and annealed to form a germanide that is an alloy of metal and germanium, thereby forming an electrode 110 with low contact resistance. Can do.
- the metal layer (n-type electrode) 113, the high-concentration n-type silicon layer 110, the metal layer (p-type electrode) 112, and the high-concentration p-type are used for the wiring portion of the n-type lead electrode and the wiring portion of the p-type lead electrode.
- the metal layer (n-type electrode) 113, the high-concentration n-type silicon layer 110, the metal layer (p-type electrode) 112, and the high-concentration p-type are used for reacting the silicon layer 106 to form silicide
- reference numeral 111 denotes an insulating film. That is, a germanium laser diode in which an n-type single crystal germanium layer 104 having a tensile strain and a p-type single crystal germanium layer 105 and a p-type silicon layer 106 are formed on the buried insulating film 102 in contact with the sidewall thereof. Is configured.
- the p-type single crystal germanium layer 105 is not essential, and the p-type silicon layer 106 may be disposed directly on the sidewall of the n-type single crystal germanium layer 104 as shown in FIG. 2F. it can.
- the p-type single crystal germanium layer 106 is disposed as a part of the electrode portion of the extraction electrode 106. That is, it is desirable that the electrode portion has a laminated structure of p-type single crystal germanium and a p-type silicon layer.
- a semiconductor optical device including a laser diode having a high carrier density and good carrier distribution uniformity and a manufacturing method thereof are provided even for a germanium optical device formed on a silicon oxide film. can do.
- the electrodes can be formed in a self-aligned manner, it is possible to reduce the area necessary for mask alignment in photolithography, and the carrier density with respect to the injected current value can be significantly higher than before, so that the emission intensity is remarkably increased. Can be improved.
- FIGS. 3A and 3B A second embodiment will be described with reference to FIGS. 3A and 3B. Note that the matters described in the first embodiment and not described in the present embodiment can be applied to the present embodiment as long as there is no special circumstances.
- a region serving as a nucleus for growing the n-type single crystal germanium layer 124 is the surface of the silicon substrate 121 in the present embodiment.
- An insulating film 122 is deposited on the surface of the silicon substrate 121, and a line-shaped opening 123 is formed in a part of the insulating film 122 by photolithography and etching (FIG. 3A). After the surface of the silicon substrate 121 exposed in the line-shaped opening 123 formed in the insulating film is cleaned, the surface of the single crystal silicon substrate exposed from the line-shaped opening as in the first embodiment is used.
- a band-shaped n-type single crystal germanium layer 124 and a p-type single crystal germanium layer 125 are selectively grown as growth nuclei (FIG. 3B). Thereafter, a p-type silicon layer 106 and an insulating film 107 are deposited on the entire surface in the same manner as in Example 1, and after planarizing by CMP, the defect-containing region is removed and an electrode is formed. A structure similar to that of FIG. 1 is obtained.
- This embodiment can provide the same effects as those of the first embodiment. Further, in the selective growth of the n-type single crystal germanium layer 124, when the germanium layer is grown in a direction horizontal to the substrate, the interface between the silicon layer that is the seed crystal and the germanium layer is inside the opening of the insulating film. Therefore, there is no propagation of dislocation from the interface containing many defects, and the crystallinity of the region growing in contact with the insulating film 122 is further improved. In addition, since it is not necessary to use an expensive SOI substrate, the cost of the element can be significantly reduced.
- a third embodiment will be described with reference to FIG. Note that the matters described in the first embodiment and not described in the present embodiment can be applied to the present embodiment as long as there is no special circumstances.
- the periodic structure 160 is formed at both ends in the longitudinal direction of the band-shaped n-type single crystal germanium layer 104 which becomes the waveguide of the germanium laser diode of the embodiment 1, and the reflectance of the end face is improved. is there.
- FIG. 4 is an enlarged top view of the end portion of the waveguide after etching the defect-containing region of the germanium laser diode according to the present embodiment.
- the description of the insulating films 107 and 108 and the strain applying layer 109 existing on the surface side is omitted for the sake of explanation.
- DBR distributed reflection type germanium laser diode mirror structure
- This embodiment can provide the same effects as those of the first embodiment.
- a high reflectance of 99% or more can be realized by the DBR mirror, light in the germanium waveguide can be efficiently reflected and laser oscillation can be efficiently performed.
- a fourth embodiment will be described with reference to FIG. Note that the matters described in the first embodiment and not described in the present embodiment can be applied to the present embodiment as long as there is no special circumstances.
- the semiconductor optical device of the first embodiment is different from the semiconductor optical device of the first embodiment in that a periodic structure 170 is provided over the entire region of the waveguide composed of the n-type single crystal germanium layer 104 serving as the light emitting layer of the germanium laser diode.
- FIG. 5 is an enlarged top view of the end portion of the waveguide after etching the defect-containing region of the germanium laser diode according to the present embodiment.
- the description of the insulating films 107 and 108 and the strain applying layer 109 existing on the surface side is omitted for the sake of explanation.
- the germanium laser diode of Example 1 when the defect-containing region of the n-type single crystal germanium layer 104 is removed, it has a period that is an integral multiple of 1/2 of the emission wavelength in the germanium waveguide. It is possible to form a germanium laser diode having a distributed feedback (DFB) structure 170 that is divided into different structures.
- DFB distributed feedback
- This embodiment can provide the same effects as those of the first embodiment.
- the wavelength can be selected by providing a periodic structure in the germanium waveguide, laser oscillation in a single mode is possible, and the light emission efficiency of the germanium laser diode can be improved.
- the semiconductor optical device according to this example constitutes a germanium photodiode.
- Example 1 The difference between this example and Example 1 is that the single crystal germanium layer 114 is undoped. Similarly to Example 1, an undoped single crystal germanium layer 114 is grown in the lateral direction using the single crystal silicon layer 103 as a crystal seed, and the defect-containing layers of the single crystal silicon layer 103 and the undoped single crystal germanium layer 114 are removed by etching.
- the concentration of the undoped single crystal germanium layer 114 is 1 ⁇ 10 18 cm ⁇ 3 or less.
- a semiconductor optical device including a photodiode capable of reducing the junction capacitance in the contact region, and a manufacturing method thereof, even if it is a germanium optical device formed on a silicon oxide film.
- the electrodes in a self-aligned manner, an unnecessary region in the pn junction is not formed, so that the capacitance affected by the junction area can be greatly reduced, and the photodiode can be operated at high speed.
- the waveguide-coupled germanium photodiode the crystallinity of the undoped single crystal germanium layer 114 which is a light absorption layer is improved, so that dark current can be significantly reduced in the germanium photodiode.
- the semiconductor optical device according to this example forms a germanium photodiode and a silicon thin wire waveguide.
- FIG. 8 shows the arrangement of the germanium photodiode fabricated in this example and the silicon thin wire waveguide for propagating the optical signal.
- the description of the insulating films 107 and 108 and the strain applying layer 115 existing on the surface side is omitted for the sake of explanation.
- FIG. 7 shows the cross-sectional structures taken along lines A-A ′ and B-B ′ in FIG. 8 in parallel for convenience.
- the single crystal silicon layer 103 is etched away leaving a region to be the silicon fine wire waveguide 116, and a silicon oxide film is deposited on the silicon fine wire waveguide 116. .
- the germanium layer is not deposited in the region covered with the silicon oxide film. Therefore, the p-type silicon layer 106 (for forming the p-type lead electrode) and the n-type silicon layer 110 (n-type) that are not selectively grown are used. Only the lead electrode) is removed.
- the position where the undoped single crystal germanium layer 114 is formed is determined as the position from the single crystal silicon layer 103.
- the mask and the silicon thin wire waveguide 116 for removing the defect-containing region of the undoped single crystal germanium layer 114 are provided. It can be controlled within the alignment accuracy of the mask to be processed.
- This embodiment can provide the same effects as those of the fifth embodiment.
- it is possible to form a highly sensitive and high-speed germanium photodiode and a silicon fine wire waveguide that is aligned with high precision on the same substrate.
- Miniaturization of the optical transmission circuit can be realized.
- a seventh embodiment will be described with reference to FIGS. Note that the matters described in the first embodiment and the sixth embodiment but not described in the present embodiment can be applied to the present embodiment as long as there are no special circumstances.
- FIG. 10 is an enlarged top view of the coupling portion of the germanium laser diode, the silicon fine wire waveguide, and the germanium photodiode of the semiconductor optical device according to the present embodiment.
- the description of the insulating films 107 and 108 and the strain applying layers 109 and 115 existing on the surface side is omitted for the sake of explanation.
- FIG. 9 shows the cross-sectional structures taken along A-A ′, B-B ′, and C-C ′ of FIG. 10 in parallel for convenience.
- the single crystal silicon layer 103 is etched while leaving a region to be a silicon fine wire waveguide 116 simultaneously with the formation of crystal nuclei for growing the n-type single crystal germanium layer 104 and the undoped single crystal germanium layer 114. Then, a silicon oxide film is deposited on the single crystal silicon layer 103 serving as a crystal nucleus for growing the n-type single crystal germanium layer 104 and the silicon thin wire waveguide 116. In the selective growth of the single crystal germanium layer, since the germanium layer is not deposited in the region covered with the silicon oxide film, the undoped single crystal germanium layer 114 is first selectively grown.
- the surface of the undoped single crystal germanium layer 114 is made of a silicon oxide film, and the silicon oxide film on the single crystal silicon layer 103 serving as a crystal nucleus for growing the n-type single crystal germanium layer 104 is removed and exposed.
- the n-type single crystal germanium layer 104 is selectively grown.
- doping the n-type single crystal germanium layer 104 by ion implantation, SOD, or the like selective growth is performed simultaneously with the undoped single crystal germanium layer, and doping is performed after the region of the undoped single crystal germanium layer 114 is covered with an insulating film.
- the n-type single crystal germanium layer 104 can be formed by one selective epitaxial growth.
- the silicon oxide film on the surface of the undoped single crystal germanium layer 114 is removed. Thereafter, the p-type single crystal germanium layer 105 and the p-type silicon layer are formed on the n-type single crystal germanium layer 104 and the undoped single crystal germanium layer 114. 106, and an insulating film 107 serving as a CMP stopper is deposited. After planarization by CMP, a strain applying layer 109 is deposited on the surface of the n-type single crystal germanium layer 104, and a strain applying layer 115 is deposited on the undoped single crystal germanium layer 114. At this time, it is preferable that the strain amount of the strain applying layer 115 is larger than that of the strain applying layer 109. Thereafter, an electrode is formed in the same manner as in Example 6, and the silicon layer on the silicon fine wire waveguide 116 is removed, whereby the structure shown in FIG. 9 is obtained.
- an n-type single crystal germanium layer serving as a light emitting region It is necessary to accurately adjust the alignment between the silicon 104 and the silicon thin wire waveguide 116 and between the undoped single crystal germanium layer 114 serving as the light receiving region and the silicon thin wire waveguide 116. That is, in the top view shown in FIG. 10, the n-type single crystal germanium layer 104, the silicon fine wire waveguide 116, and the undoped single crystal germanium layer 114, which are arranged in series in the longitudinal direction, are formed so as to coincide with each other. It is desirable to do.
- the positions where the n-type single crystal germanium layer 104 and the undoped single crystal germanium layer 114 are formed are determined as positions from the single crystal silicon layer 103, and the n-type single crystal germanium layer 104 and the undoped single crystal germanium layer are formed.
- the mask can be controlled within the alignment accuracy of the mask for removing the defect-containing region 114 and the mask for processing the silicon thin wire waveguide 116. Further, by making the strain amount of the strain applying layer 115 deposited on the undoped single crystal germanium layer 114 larger than that of the strain applying layer 109 formed on the n-type single crystal germanium layer 104, the photodiode side single crystal germanium is formed. It is possible to reduce the band gap.
- the light receiving sensitivity can be shifted to the longer wavelength side, and the light receiving sensitivity to light with low energy, that is, light with a long wavelength is improved. As a result, sufficient light receiving sensitivity can be obtained even for light emitted from the germanium laser diode.
- a spot size converter or the like can be used to introduce light into the silicon thin wire waveguide 116 in a state where laser oscillation is performed by the DBR mirror.
- the laser diode has a high carrier density and good carrier distribution uniformity, or the photodiode has a junction capacitance in the contact region. It is possible to provide a semiconductor optical device and a method for manufacturing the same. Further, since the germanium laser diode and the waveguide-coupled germanium photodiode are formed on the same substrate and can be connected by a silicon waveguide, the laser diode is added to the effects of the first and sixth embodiments. In addition, since the alignment between the photodiode and the thin wire waveguide can be performed with high accuracy, the characteristics of the optical transmission / reception circuit are improved. In addition, the optical transmission / reception circuit can be operated at high speed by greatly reducing the parasitic capacitance.
- the semiconductor optical device according to this example forms a germanium photodiode and a silicon thin wire waveguide.
- FIG. 12 shows the arrangement of the germanium photodiode produced in this example and the silicon thin wire waveguide for propagating the optical signal.
- the description of the insulating films 107 and 108 and the strain applying layer 115 existing on the surface side is omitted for the sake of explanation.
- FIG. 11 shows the cross-sectional structures taken along lines A-A ′ and B-B ′ of FIG. 12 in parallel for convenience.
- a silicon substrate 121 is used as a substrate, and crystal nuclei for growing an undoped single crystal germanium layer 127 are formed from a line-shaped opening provided in the insulating film. The point is the surface of the exposed silicon substrate 121.
- the silicon thin wire waveguide is formed by using the single crystal silicon layer 103 of the SOI substrate. However, when the silicon substrate 121 is used, it is necessary to separately form the thin wire waveguide on the insulating film 122. is there.
- the opening of the insulating film 122 is filled with the insulating film 126, and a germanium photodiode is formed as in the fifth embodiment. Then, an amorphous silicon layer is deposited on the insulating film 122, and a thin waveguide 128 is formed so as to be collinear with the longitudinal center line of the undoped single crystal germanium layer 127.
- This embodiment can provide the same effects as those of the sixth embodiment.
- the interface between the silicon layer that is the seed crystal and the germanium layer is inside the opening of the insulating film. Since there is no propagation of dislocation from the interface containing many defects, the crystallinity of the region growing in contact with the insulating film 122 is further improved. In addition, since it is not necessary to use an expensive SOI substrate, the cost of the element can be significantly reduced.
- a ninth embodiment will be described with reference to FIGS. Note that the matters described in the first embodiment and the seventh embodiment but not described in the present embodiment can also be applied to the present embodiment unless there are special circumstances.
- FIG. 14 shows an enlarged top view of the coupling portion of the germanium laser diode, the silicon wire waveguide, and the germanium photodiode of the semiconductor optical device according to the present embodiment.
- the description of the insulating films 107 and 108 and the strain applying layers 109 and 115 existing on the surface side is omitted for the sake of explanation.
- FIG. 13 shows the cross-sectional structures taken along A-A ′, B-B ′, and C-C ′ of FIG. 14 in parallel for convenience.
- a silicon substrate 121 is used as a substrate, and crystal nuclei for growing an n-type single crystal germanium layer 124 and an undoped single crystal germanium layer 127 are line-shaped openings formed in an insulating film.
- the surface is the surface of the silicon substrate 121 exposed from the portion.
- the silicon fine wire waveguide is formed using the single crystal silicon layer 103 of the SOI substrate. However, when the silicon substrate 121 is used, it is necessary to separately form the fine wire waveguide on the insulating film 122. is there.
- the opening of the insulating film 122 is filled with the insulating film 126, and germanium is formed as in the seventh embodiment.
- germanium is formed as in the seventh embodiment.
- Form a laser diode and a germanium photodiode is formed on the insulating film 122, and the thin-line waveguide 128 is formed so that the end surfaces of the n-type single crystal germanium layer 124 and the undoped single crystal germanium layer 127 are on the same line.
- the same effect as in the seventh embodiment can be obtained.
- the interface between the silicon layer that is the seed crystal and the germanium layer is an insulating film. Since there is no propagation of dislocations from the interface containing many defects, the crystallinity of the region growing in contact with the insulating film 122 is further improved. In addition, since it is not necessary to use an expensive SOI substrate, the cost of the element can be significantly reduced.
- FIG. 15 is a cross-sectional structure diagram of the intrinsic part of the semiconductor optical device according to the present example.
- FIG. 16A to FIG. 16D are cross-sectional structure diagrams showing a method of manufacturing a semiconductor optical device according to this example in the order of steps. Note that the matters described in the first embodiment and not described in the present embodiment can be applied to the present embodiment as long as there is no special circumstances. The difference between the present embodiment and the first embodiment is that a GOI substrate is used in this embodiment. A method for manufacturing a semiconductor optical device according to this example will be described below with reference to FIGS. 16A to 16D.
- a GOI substrate comprising a silicon support substrate 131, a buried insulating film 132, and a single crystal germanium layer 133 is prepared. Since the single crystal germanium layer 133 serves as a light emitting region, high concentration n-type doping is performed.
- a doping method in addition to ion implantation and activation annealing, a film serving as a doping source such as SOD is formed on the surface, and annealing is performed to diffuse the doping into the single crystal germanium layer 133.
- the doping concentration is preferably 5 ⁇ 10 18 cm ⁇ 3 or more.
- the single crystal germanium layer 133 is processed into a waveguide shape (band shape) by photolithography and etching (FIG. 16A).
- a p-type single crystal germanium layer 134 is formed by selective epitaxial growth, and then a p-type silicon layer 135 and an insulating film 136 are deposited on the entire surface (FIG. 16B).
- the formation method of the p-type single crystal germanium layer 134 and the p-type silicon layer 135 is the same as that of the p-type silicon layer 106 of Example 1.
- the surface of the single crystal germanium layer 133 is treated with hydrogen peroxide. Care must be taken because the germanium layer easily melts when washed with a cleaning solution containing an oxidizing chemical such as the above.
- FIG. 16C planarization is performed by CMP using the insulating film 136 as a stopper (FIG. 16C).
- a strain applying layer 138 for applying an extension strain is deposited on the n-type single crystal germanium layer 133 (FIG. 16D).
- the high-quality single crystal germanium layer 133 is used, it is not necessary to remove the defect-containing region, but it is necessary to form the p-type electrode and the n-type electrode from both sides of the waveguide.
- One side of the single crystal germanium layer 133 is removed by photolithography and etching (FIG. 16D).
- FIG. 15 will be obtained.
- reference numeral 139 denotes an n-type silicon layer
- reference numeral 140 denotes an insulating film
- reference numeral 141 denotes a p-type electrode
- reference numeral 142 denotes an n-type electrode.
- the same effect as in the first embodiment can be obtained.
- the n-type single crystal germanium layer 133 can use a high-quality crystal free of defects, non-radiative recombination of carriers in the single crystal germanium layer 133 is suppressed, and light emission of the germanium laser diode is achieved. Efficiency is improved.
- the shape of the n-type single crystal germanium layer can be controlled by etching, the flow of carriers injected from the p-type germanium layer becomes uniform, and the luminous efficiency of the germanium laser diode is further improved.
- the semiconductor optical device according to this example constitutes a germanium photodiode.
- the difference between the present embodiment and the fifth embodiment is that a GOI substrate is used in this embodiment.
- the undoped single crystal germanium layer 143 is processed into a waveguide shape, and then a p-type single crystal germanium layer 134, a p-type silicon layer 135, and an insulating film 136 are formed in the same manner as in Example 10 and then planarized by CMP.
- the doping concentration of the undoped single crystal germanium layer 143 is 1 ⁇ 10 18 cm ⁇ 3 or less.
- a strain applying layer 144 for applying an extension strain is deposited, and one side of the p-type single crystal germanium layer 134 and the p-type silicon layer 135 is removed by etching, including a part of the single crystal germanium layer 143, And a p-type lead electrode having a wiring portion are formed.
- the same effect as in the fifth embodiment can be obtained.
- the crystallinity of the undoped single crystal germanium layer 143 that is a light absorption layer is improved, so that dark current can be significantly reduced in the germanium photodiode.
- the shape of the undoped single crystal germanium layer can be controlled by etching, the potential distribution when a reverse potential is applied to the pn junction is uniform in the light absorption region, so that the light receiving sensitivity of the photodiode is improved.
- the semiconductor optical device according to this example forms a germanium photodiode and a silicon thin wire waveguide.
- FIG. 19 shows the arrangement of the germanium photodiode fabricated in this example and the silicon thin wire waveguide for propagating the optical signal.
- the description of the insulating films 136 and 137 and the strain applying layer 144 existing on the surface side is omitted for the sake of explanation.
- FIG. 18 shows the cross-sectional structures taken along lines A-A ′ and B-B ′ of FIG. 19 in parallel for convenience.
- the difference between the present embodiment and the eighth embodiment is that a GOI substrate is used in this embodiment.
- the undoped single crystal germanium layer 143 is processed into a waveguide shape to form the p-type single crystal germanium layer 134, the p-type silicon layer 135, and the insulating film 136, and then planarized by CMP.
- the doping concentration of the undoped single crystal germanium layer 143 is 1 ⁇ 10 18 cm ⁇ 3 or less.
- a strain applying layer 144 for applying an extension strain is deposited, and one side of the p-type single crystal germanium layer 134 and the p-type silicon layer 135 including part of the single crystal germanium layer 143 is removed by etching. Form.
- an amorphous silicon layer is deposited on the insulating film 132, and the thin-line waveguide 145 is formed so as to be collinear with the longitudinal center line of the undoped single crystal germanium layer 143.
- the same effect as in the eighth embodiment can be obtained.
- the crystallinity of the undoped single crystal germanium layer 143 that is a light absorption layer is improved, so that dark current can be significantly reduced in the germanium photodiode.
- the shape of the undoped single crystal germanium layer can be controlled by etching, the potential distribution when a reverse potential is applied to the pn junction is uniform in the light absorption region, so that the light receiving sensitivity of the photodiode is improved.
- a thirteenth embodiment will be described with reference to FIGS. Note that the matters described in the first embodiment and the ninth embodiment but not described in the present embodiment can also be applied to the present embodiment unless there are special circumstances.
- the present embodiment is characterized by an optical signal transmission / reception module including an n-type single crystal germanium layer 133 doped on the same GOI substrate, an amorphous silicon fine wire waveguide 145, and an undoped single crystal germanium layer 143.
- FIG. 21 shows an enlarged top view of the coupling portion of the germanium laser diode, the silicon fine wire waveguide, and the germanium photodiode of the semiconductor optical device according to this example.
- the description of the insulating films 136 and 137 and the strain applying layers 138 and 144 existing on the surface side is omitted for the sake of explanation.
- FIG. 20 shows the cross-sectional structures taken along lines A-A ′, B-B ′, and C-C ′ of FIG. 21 in parallel for convenience.
- the difference between the present embodiment and the ninth embodiment is that a GOI substrate is used in this embodiment.
- n-type doping is performed only on the region where the laser diode of the single crystal germanium layer of the GOI substrate is formed, the n-type single crystal germanium layer 133 and the undoped single crystal germanium layer 143 are processed into a waveguide shape.
- planarization is performed by CMP.
- the doping concentration of the undoped single crystal germanium layer 143 is 1 ⁇ 10 18 cm ⁇ 3 or less.
- a strain applying layer 138 for applying a tensile strain is deposited on the n-type single crystal germanium layer 133, and a strain applying layer 144 is formed on the undoped single crystal germanium layer 143. At this time, it is preferable that the strain of the strain applying layer 144 is larger than that of the strain applying layer 138.
- one side of the p-type single crystal germanium layer 134 and the p-type silicon layer 135 including part of the n-type single crystal germanium layer 133 and the undoped single crystal germanium layer 143 is removed by etching, and the electrode portion and the wiring portion are separated. A p-type lead electrode is formed.
- an amorphous silicon layer is deposited on the insulating film 132, and the thin-line waveguide 145 is formed so as to be collinear with the longitudinal center line of the n-type single crystal germanium layer 133 and the undoped single crystal germanium layer 143.
- the same effect as in the ninth embodiment can be obtained. Further, since the crystallinity of the n-type single crystal germanium layer 133 which is a light emitting layer of the germanium laser diode and the undoped single crystal germanium layer 143 which is a light absorption layer of the germanium photodiode is improved, the germanium laser diode Luminous efficiency is improved and dark current can be greatly reduced in the germanium photodiode.
- a semiconductor substrate A first insulating film provided on the semiconductor substrate; A band-shaped n-type or undoped single crystal germanium layer provided on the first insulating film; A p-type extraction electrode formed on a side surface of the band-shaped n-type or undoped single crystal germanium layer,
- the p-type lead electrode has an electrode portion and a wiring portion,
- the optical semiconductor optical device according to claim 1, wherein the electrode portion has a laminated structure of a p-type single crystal germanium layer and a p-type silicon layer sequentially formed on a side surface of the n-type or undoped single crystal germanium layer.
- the electrode portion has a laminated structure of a p-type single crystal germanium layer and a p-type silicon layer sequentially formed on a side surface of the n-type or undoped single crystal germanium layer.
- An optical semiconductor optical device wherein a surface orientation of at least one side wall of the n-type or undoped single crystal germanium layer is equivalent to (100).
- the n-type single crystal germanium layer is a light emitting layer, and has a doping concentration of 5 ⁇ 10 18 cm ⁇ 3 or more.
- the n-type single crystal germanium layer has a periodic structure at an end portion in an extension line direction parallel to a surface in contact with the electrode portion.
- the n-type single crystal germanium layer has a periodic structure in an extension line direction parallel to a surface in contact with the electrode portion.
- the undoped single crystal semiconductor layer is a light receiving layer, and has a doping concentration of 1 ⁇ 10 18 cm ⁇ 3 or less.
- An optical waveguide is disposed on the first insulating film; The semiconductor optical device, wherein the optical waveguide is electrically insulated from and optically coupled to the n-type or undoped single crystal germanium layer.
- the band-shaped n-type single crystal germanium layer and the band-shaped undoped single crystal germanium layer are arranged in series, The n-type single crystal germanium layer and the undoped single crystal germanium layer are electrically insulated from each other and optically coupled, and an optical signal from the n-type single crystal germanium layer is transmitted to the undoped single crystal germanium layer.
- a fourth step of polishing from the surface to a height generally coinciding with the surface of the second insulating film of comprising: (16) In the method for manufacturing a semiconductor optical device according to (15), The band-shaped n-type or non-doped single crystal germanium layer is formed on the first insulating film with the first insulating film as an insulating film of the SOI substrate and the single crystal silicon layer of the SOI substrate processed into a line shape as a nucleus. A method of manufacturing a semiconductor optical device, wherein the semiconductor optical device is formed.
- the semiconductor substrate is a single crystal silicon substrate;
- the band-shaped n-type or non-doped single crystal germanium layer is formed by nucleating the surface of the single crystal silicon substrate exposed from a line-shaped opening provided in the first insulating film formed on the single crystal silicon substrate.
- the n-type or non-doped single crystal germanium layer is formed by using the first insulating film as an insulating film of a GOI substrate and processing the single crystal germanium layer of the GOI substrate into a waveguide shape.
- a method for manufacturing a semiconductor optical device (19) In the method for manufacturing a semiconductor optical device described in (15) to (18) above, The method of manufacturing a semiconductor optical device, further comprising: forming an optical waveguide on the first insulating film. (20) a first step of preparing a single crystal silicon substrate having an n-type or non-doped single crystal germanium layer formed in a strip shape on the first insulating film; A second step of forming a first p-type semiconductor layer serving as an electrode portion of a p-type extraction electrode only on the surface including the side walls on both sides of the band-shaped n-type or non-doped single crystal germanium layer; A third step of forming a second p-type semiconductor layer serving as an electrode portion and a wiring portion of the first p-type lead electrode on the surface of the first p-type semiconductor layer and the first insulating film; A fourth step of forming a second insulating film on the second p-type semiconductor layer; The second insulating film, the second p-
- the first p-type semiconductor layer, the second p-type semiconductor layer, the one side of the second insulating film, and the n-type formed on the sidewalls on both sides of the band-shaped n-type or non-doped single crystal germanium layer Alternatively, by removing one side of the non-doped single crystal germanium layer, a seventh step of exposing a side wall of the n-type or non-doped single crystal germanium layer facing the second p-type semiconductor layer on the other side; An eighth step of forming an n-type electrode on the side wall of the single crystal germanium layer;
- SYMBOLS 101 Semiconductor substrate (silicon substrate), 102 ... Insulating film (embedded insulating film), 103 ... Single crystal silicon layer, 104 ... N-type single crystal germanium layer, 105 ... p-type single crystal germanium layer, 106 ... p-type silicon layer , 107, 108 ... insulating film, 109 ... strain applying layer, 110 ... n-type silicon layer, 111 ... insulating film, 112 ... p-type electrode, 113 ... n-type electrode, 114 ... undoped single crystal germanium layer, 115 ...
- strain applied Layer 116 silicon thin-film waveguide, 121 silicon substrate, 122 insulating film, 123 opening of insulating film, 124 n-type single crystal germanium layer, 125 p-type single crystal germanium layer, 126 insulating film, 127: undoped single crystal germanium layer, 128: amorphous silicon waveguide, 131: silicon substrate, 132: buried insulating film, 1 3 ... n-type single crystal germanium layer, 134 ... p-type single crystal germanium layer, 135 ... p-type silicon layer, 136, 137 ... insulating film, 138 ... strain applying layer, 139 ... n-type silicon layer, 140 ... insulating film, 141 ...
Abstract
In order to provide a semiconductor optical element having excellent characteristics even if the semiconductor optical element is a Ge optical element formed on a Si oxide film, this semiconductor optical element is provided with a semiconductor substrate 101, an insulating film 102, an n-type or undoped single crystal Ge layer 104, and p-type extraction electrodes 105, 106, which are formed on the side surface of the n-type or undoped single crystal Ge layer. The p-type extraction electrodes 105, 106 have an electrode section and a wiring section, and the upper surface of the electrode section is at a height equal to that of the upper surface of the n-type or undoped single crystal Ge layer 104, and is higher than the upper surface of the wiring section.
Description
本発明は、半導体光素子およびその製造方法に関する。
The present invention relates to a semiconductor optical device and a manufacturing method thereof.
高度情報化社会の進展に伴い、サーバーやデータセンタにおける情報処理量やネットワークのデータ伝送量は増加の一途をたどっており、これらを支える情報処理装置の高速化と高機能化への要求もますます高まっている。その中で、光インターコネクションによる大容量化・小型化・低消費電力化が検討されており、ＣＭＯＳプロセスを用いたシリコンフォトニクス技術が注目を集めている。シリコンフォトニクスでは、微細化によるＬＳＩの集積規模上昇に伴って生じる電気配線の遅延や消費電力増大などの課題を克服するため、チップ間およびチップ内配線を光インターコネクションで置き換えることが期待されている。チップ間およびチップ内光インターコネクションを実現する技術として、シリコン（Ｓｉ）基板上に発受光素子，導波路，変調器，合分波器等の光素子を用いた光回路を形成するシリコンフォトニクスが注目されているが、この中でＣＭＯＳプロセスによって実現可能な発光素子を実現することが極めて大きな課題となっている。何故なら、ＣＭＯＳプロセスで通常用いられるシリコン（Ｓｉ）やゲルマニウム（Ｇｅ）は間接遷移型半導体であるため，化合物半導体のレーザと比較して発光強度が非常に低いからである。このような状況の中、近年、ゲルマニウムを用いたレーザ・ダイオードの実現に注目が集まっている。
Along with the advancement of the advanced information society, the amount of information processing in servers and data centers and the amount of network data transmission are steadily increasing, and there is a demand for higher speed and higher functionality of information processing equipment that supports these. Increasingly. Among them, the increase in capacity, reduction in size, and reduction in power consumption by optical interconnection are being studied, and silicon photonics technology using a CMOS process is attracting attention. Silicon photonics is expected to replace inter-chip and intra-chip wiring with optical interconnections in order to overcome problems such as delays in electrical wiring and increased power consumption caused by the increase in LSI integration scale due to miniaturization. . Silicon photonics that forms optical circuits using optical elements such as light emitting / receiving elements, waveguides, modulators, and multiplexers / demultiplexers on silicon (Si) substrates is a technology that realizes optical interconnection between chips and within chips. Although attention has been paid to this, realization of a light-emitting element that can be realized by a CMOS process is a very big problem. This is because silicon (Si) and germanium (Ge), which are usually used in the CMOS process, are indirect transition semiconductors, and therefore have a very low emission intensity compared to compound semiconductor lasers. Under such circumstances, in recent years, attention has been focused on the realization of a laser diode using germanium.
従来のゲルマニウムを発光層として用いたレーザ・ダイオードは、例えば特許文献１や非特許文献１に記載されている。バルク状態でのゲルマニウムは間接遷移半導体であるため、発光効率が化合物半導体と比べて非常に小さいため、ゲルマニウムに伸張歪を印加して直接遷移半導体へと特性を変化させる方法が試みられている。シリコン基板上に直接ゲルマニウム層を成長し、熱処理を行うことで、シリコンとゲルマニウムの熱膨張係数の違いによってゲルマニウムに伸張歪が残留する。歪によって伝導帯のエネルギーは変化するが、伸張歪を印加すると伝導体で最もエネルギーの低いＬ点よりもΓ点でのエネルギー低下量が大きいため、ゲルマニウムは直接遷移半導体の特性に近づく。
Conventional laser diodes using germanium as the light emitting layer are described in, for example, Patent Document 1 and Non-Patent Document 1. Since germanium in the bulk state is an indirect transition semiconductor, its luminous efficiency is much smaller than that of a compound semiconductor. Therefore, a method of changing the characteristics to a direct transition semiconductor by applying an extension strain to germanium has been attempted. By growing a germanium layer directly on the silicon substrate and performing heat treatment, tensile strain remains in germanium due to the difference in thermal expansion coefficient between silicon and germanium. Although the energy of the conduction band changes depending on the strain, germanium is close to the characteristics of a transition semiconductor because the amount of energy decrease at the Γ point is larger than the L point having the lowest energy in the conductor when an extension strain is applied.
しかし、シリコンとゲルマニウムは格子定数が約４．２％も異なることから、シリコン基板上にゲルマニウム層をエピタキシャル成長すると、歪が緩和して転移が多量に発生する。したがって、ゲルマニウム層とシリコン基板との界面付近で歪緩和に伴う結晶欠陥が多数存在する。レーザ・ダイオードでは順方向に電圧を印加して電極からキャリアを注入し、電子とホールが再結合する際に生じる発光プロセスを利用するものであり、欠陥等によって非発光プロセスでキャリアが消滅すると、注入したキャリア量に対する発光強度が低下し、発光の量子効率が低下してしまう。そこで、ゲルマニウム発光層の結晶性を向上するために、ゲルマニウム・オン・インシュレーター（ＧＯＩ）構造を用いてゲルマニウム発光領域を形成する方法が検討されている。ＧＯＩ構造を作製するにはいくつかの方法があり、シリコン・オン・インシュレーター（ＳＯＩ）層上に成長したシリコン・ゲルマニウム層を酸化することでゲルマニウム組成比を向上し、ゲルマニウム組成比が１００％近くまで向上した単結晶ゲルマニウム層を用いて発光素子を作製する方法が特許文献２に記載されている。また、表面に酸化膜を形成したシリコン基板上に結晶欠陥が少ないＧｅ層を形成したＧＯＩ基板を用いた発光素子が特許文献３に記載されている。さらに、シリコン基板上に形成したシリコン酸化膜マスクに選択エピタキシャル成長を行うことで、シリコン酸化膜上に高品質なゲルマニウム層を形成する方法が特許文献４に記載されている。単結晶ゲルマニウムではＬ点とΓ点のエネルギー差は０．１３６ｅＶであり、高濃度ｎ型ドーピングによってΓ点にもキャリアが注入され、直接遷移発光が促進できることが非特許文献１に開示されている。
However, since the lattice constants of silicon and germanium differ by about 4.2%, when a germanium layer is epitaxially grown on a silicon substrate, strain is relaxed and a large amount of transition occurs. Therefore, there are many crystal defects accompanying strain relaxation near the interface between the germanium layer and the silicon substrate. A laser diode applies a voltage in the forward direction to inject carriers from the electrode, and utilizes a light emission process that occurs when electrons and holes recombine. The light emission intensity with respect to the injected carrier amount is lowered, and the quantum efficiency of light emission is lowered. Therefore, in order to improve the crystallinity of the germanium light-emitting layer, a method for forming a germanium light-emitting region using a germanium-on-insulator (GOI) structure has been studied. There are several ways to fabricate the GOI structure. The germanium composition ratio is improved by oxidizing the silicon germanium layer grown on the silicon-on-insulator (SOI) layer, and the germanium composition ratio is nearly 100%. Patent Document 2 describes a method for manufacturing a light-emitting element using a single crystal germanium layer improved to the above. Further, Patent Document 3 discloses a light emitting element using a GOI substrate in which a Ge layer with few crystal defects is formed on a silicon substrate having an oxide film formed on the surface. Further, Patent Document 4 describes a method of forming a high-quality germanium layer on a silicon oxide film by performing selective epitaxial growth on a silicon oxide film mask formed on a silicon substrate. In single crystal germanium, the energy difference between the L point and the Γ point is 0.136 eV, and it is disclosed in Non-Patent Document 1 that carriers can be injected into the Γ point by high-concentration n-type doping and direct transition emission can be promoted. .
また、従来のゲルマニウムを受光層として用いたフォトダイオードは、例えば非特許文献２に記載されている。電極となるドーピング層を形成したシリコン基板上に受光層となるゲルマニウムを成長し、表面に電極を形成することで縦型ｐｉｎ構造を形成している。さらに別のフォトダイオードは、例えば非特許文献３に記載されている。シリコン基板上に受光層となるゲルマニウムを成長し、左右から電極を形成することで導波路型のフォトダイオードを形成している。縦型ｐｉｎゲルマニウム・フォトダイオードも導波路型ゲルマニウム・フォトダイオードも、共に電極間に逆方向電圧を印加した状態で受光部に光信号を入射させることで、光の吸収によって発生したキャリアが電極に流れることで、光信号を電気信号に変換している。
A conventional photodiode using germanium as a light receiving layer is described in Non-Patent Document 2, for example. A vertical pin structure is formed by growing germanium serving as a light-receiving layer on a silicon substrate on which a doping layer serving as an electrode is formed, and forming an electrode on the surface. Still another photodiode is described in Non-Patent Document 3, for example. A waveguide type photodiode is formed by growing germanium as a light receiving layer on a silicon substrate and forming electrodes from the left and right. In both the vertical pin germanium photodiode and the waveguide germanium photodiode, an optical signal is incident on the light receiving portion with a reverse voltage applied between the electrodes, so that carriers generated by light absorption are applied to the electrodes. By flowing, the optical signal is converted into an electric signal.
従来技術の構成について発明者等が検討した結果、レーザ・ダイオードの発光効率やフォトダイオードの暗電流を左右する結晶性の観点から特許文献４に記載の構成が今後有望であると判断された。そこでこの構成について詳細に検討を行った。
As a result of studies by the inventors on the configuration of the prior art, it was determined that the configuration described in Patent Document 4 is promising from the viewpoint of crystallinity that affects the light emission efficiency of the laser diode and the dark current of the photodiode. Therefore, this configuration was examined in detail.
図２２は、特許文献４に基づいて本願発明者らが作成したものであり、選択エピタキシャル成長を用いて形成した厚膜ＧＯＩ構造にゲルマニウムの発光部を形成したレーザ・ダイオードの真性部分における断面構造を示す。シリコン基板２４１はＳＯＩ基板の支持基板であり、埋め込み酸化膜２４２の上の単結晶シリコン層を結晶の種にしてｎ型ゲルマニウム層を選択エピタキシャル成長したあと、単結晶シリコン層とともに欠陥含有領域をエッチング除去することによって、高品質なｎ型単結晶ゲルマニウム層２４４が形成される。これにより、単結晶ゲルマニウム層を用いた光素子におけるキャリアの非発光再結合・生成プロセスが低減され、レーザ・ダイオードの発光効率の向上やフォトダイオードの暗電流の低減を図ることが可能となる。ここで、符号２４３は単結晶シリコン細線導波路、符号２４５は絶縁膜である。
FIG. 22 was created by the present inventors based on Patent Document 4, and shows a cross-sectional structure of an intrinsic part of a laser diode in which a germanium light emitting portion is formed on a thick film GOI structure formed by selective epitaxial growth. Show. The silicon substrate 241 is a support substrate for the SOI substrate. After selectively epitaxially growing an n-type germanium layer using the single crystal silicon layer on the buried oxide film 242 as a crystal seed, the defect-containing region is etched away together with the single crystal silicon layer. By doing so, a high-quality n-type single crystal germanium layer 244 is formed. Thereby, the non-light emitting recombination / generation process of carriers in the optical element using the single crystal germanium layer is reduced, and it becomes possible to improve the light emitting efficiency of the laser diode and reduce the dark current of the photodiode. Here, reference numeral 243 denotes a single crystal silicon thin wire waveguide, and reference numeral 245 denotes an insulating film.
しかしながら、本発明者等が本構造について更に検討した結果、本構造では、ｎ型単結晶ゲルマニウム層２４４を形成した後に表面を絶縁膜で覆い、フォトリソグラフィーとエッチングによってコンタクト領域を露出させて、ｐ型電極２４６とｎ型電極２４７を形成しており、ｐ型電極とｎ型電極のそれぞれにマスクが必要となること、マスク合わせに必要な領域を確保しようとするとｎ型単結晶ゲルマニウム層２４４の幅を縮小することが困難であることが分かった。
However, as a result of further examination of the present structure by the present inventors, in this structure, after forming the n-type single crystal germanium layer 244, the surface is covered with an insulating film, the contact region is exposed by photolithography and etching, and p The n-type electrode 246 and the n-type electrode 247 are formed, and a mask is necessary for each of the p-type electrode and the n-type electrode, and if an area necessary for mask alignment is to be secured, the n-type single crystal germanium layer 244 It turned out to be difficult to reduce the width.
電極から注入されたキャリアが発光領域に拡散すると、キャリアが閉じ込められる体積に応じてキャリア密度が決まるため、発光領域の幅が大きくなるほどキャリア密度が低下し、レーザ・ダイオードの発光強度が低下することが危惧された。さらに、ｎ型単結晶ゲルマニウム層２４４の側壁だけでなく、表面も電極と接した構造となるため、ｐｎ電極間に電圧を印加すると、水平方向だけではなく垂直方向にも電位分布が発生するため、ｎ型単結晶ゲルマニウム層２４４中でのキャリアの流れや分布が不均一となり、発光効率が低下することが危惧された。
When carriers injected from the electrode diffuse into the light emitting region, the carrier density is determined according to the volume in which the carriers are confined. Therefore, as the width of the light emitting region increases, the carrier density decreases and the light emission intensity of the laser diode decreases. Was concerned. Furthermore, since not only the side wall of the n-type single crystal germanium layer 244 but also the surface is in contact with the electrode, when a voltage is applied between the pn electrodes, a potential distribution is generated not only in the horizontal direction but also in the vertical direction. The carrier flow and distribution in the n-type single crystal germanium layer 244 became non-uniform, and it was feared that the light emission efficiency was lowered.
さらに、特許文献４に記載のゲルマニウムからなる受光部を有するフォトダイオードでは、フォトリソグラフィーのマスクずれを考慮して電極とゲルマニウム層とのコンタクト領域を大きくしておく必要があるため、電極の面積に伴って接合容量が増大し、高周波特性が劣化することが危惧された。
Furthermore, in the photodiode having the light receiving portion made of germanium described in Patent Document 4, it is necessary to enlarge the contact region between the electrode and the germanium layer in consideration of the mask displacement of photolithography, so the area of the electrode is reduced. Along with this, there is a concern that the junction capacity increases and the high frequency characteristics deteriorate.
本発明の目的は、シリコン酸化膜上に形成したゲルマニウム光素子であっても、レーザ・ダイオードにおいてはキャリア密度が高くキャリア分布の均一性が良好な、或いはフォトダイオードにおいてはコンタクト領域における接合容量の低減が可能な半導体光素子やその製造方法を提供することにある。
An object of the present invention is to provide a germanium optical element formed on a silicon oxide film, which has a high carrier density and good carrier distribution uniformity in a laser diode, or a junction capacitance in a contact region in a photodiode. An object of the present invention is to provide a semiconductor optical device that can be reduced and a method for manufacturing the same.
上記目的を達成するための一実施形態として、半導体基板と、
前記半導体基板上に設けられた第１絶縁膜と、
前記第１絶縁膜上に設けられた帯状のｎ型或いはアンドープ単結晶ゲルマニウム層と、
帯状の前記ｎ型或いはアンドープ単結晶ゲルマニウム層の側面に形成されたｐ型引き出し電極と、を備え、
前記ｐ型引き出し電極は、電極部と配線部とを有し、
前記電極部の上面は、前記ｎ型或いはアンドープ単結晶ゲルマニウム層の上面と同じ高さで、且つ前記配線部の上面よりも高いことを特徴とする半導体光素子とする。 As one embodiment for achieving the above object, a semiconductor substrate,
A first insulating film provided on the semiconductor substrate;
A band-shaped n-type or undoped single crystal germanium layer provided on the first insulating film;
A p-type extraction electrode formed on a side surface of the band-shaped n-type or undoped single crystal germanium layer,
The p-type lead electrode has an electrode portion and a wiring portion,
The upper surface of the electrode portion is the same height as the upper surface of the n-type or undoped single crystal germanium layer, and is higher than the upper surface of the wiring portion.
前記半導体基板上に設けられた第１絶縁膜と、
前記第１絶縁膜上に設けられた帯状のｎ型或いはアンドープ単結晶ゲルマニウム層と、
帯状の前記ｎ型或いはアンドープ単結晶ゲルマニウム層の側面に形成されたｐ型引き出し電極と、を備え、
前記ｐ型引き出し電極は、電極部と配線部とを有し、
前記電極部の上面は、前記ｎ型或いはアンドープ単結晶ゲルマニウム層の上面と同じ高さで、且つ前記配線部の上面よりも高いことを特徴とする半導体光素子とする。 As one embodiment for achieving the above object, a semiconductor substrate,
A first insulating film provided on the semiconductor substrate;
A band-shaped n-type or undoped single crystal germanium layer provided on the first insulating film;
A p-type extraction electrode formed on a side surface of the band-shaped n-type or undoped single crystal germanium layer,
The p-type lead electrode has an electrode portion and a wiring portion,
The upper surface of the electrode portion is the same height as the upper surface of the n-type or undoped single crystal germanium layer, and is higher than the upper surface of the wiring portion.
又、第１絶縁膜上に帯状に形成されたｎ型或いはノンドープ単結晶ゲルマニウム層を有する半導体基板を準備する第１工程と、
帯状の前記ｎ型或いはノンドープ単結晶ゲルマニウム層の両側の側壁を含む表面および前記第１絶縁膜上に前記ｐ型引き出し電極の電極部と配線部となるｐ型半導体層を形成する第２工程と、
前記ｐ型半導体層の上に第２絶縁膜を形成する第３工程と、
前記ｎ型或いはノンドープ単結晶ゲルマニウム層の上部の前記第２絶縁膜と前記ｐ型半導体層と、前記ｎ型或いはノンドープ単結晶ゲルマニウム層を、前記ｎ型或いはノンドープ単結晶ゲルマニウム層から離れた位置での前記第２絶縁膜の表面と概ね一致する高さまで表面から研磨する第４工程と、
を有することを特徴とする半導体光素子の製造方法とする。 A first step of preparing a semiconductor substrate having an n-type or non-doped single crystal germanium layer formed in a strip shape on the first insulating film;
A second step of forming a p-type semiconductor layer serving as an electrode portion and a wiring portion of the p-type lead electrode on the surface including side walls on both sides of the band-shaped n-type or non-doped single-crystal germanium layer and the first insulating film; ,
A third step of forming a second insulating film on the p-type semiconductor layer;
The second insulating film, the p-type semiconductor layer, and the n-type or non-doped single crystal germanium layer above the n-type or non-doped single crystal germanium layer are separated from the n-type or non-doped single crystal germanium layer. A fourth step of polishing from the surface to a height generally coinciding with the surface of the second insulating film of
A method for manufacturing a semiconductor optical device, comprising:
帯状の前記ｎ型或いはノンドープ単結晶ゲルマニウム層の両側の側壁を含む表面および前記第１絶縁膜上に前記ｐ型引き出し電極の電極部と配線部となるｐ型半導体層を形成する第２工程と、
前記ｐ型半導体層の上に第２絶縁膜を形成する第３工程と、
前記ｎ型或いはノンドープ単結晶ゲルマニウム層の上部の前記第２絶縁膜と前記ｐ型半導体層と、前記ｎ型或いはノンドープ単結晶ゲルマニウム層を、前記ｎ型或いはノンドープ単結晶ゲルマニウム層から離れた位置での前記第２絶縁膜の表面と概ね一致する高さまで表面から研磨する第４工程と、
を有することを特徴とする半導体光素子の製造方法とする。 A first step of preparing a semiconductor substrate having an n-type or non-doped single crystal germanium layer formed in a strip shape on the first insulating film;
A second step of forming a p-type semiconductor layer serving as an electrode portion and a wiring portion of the p-type lead electrode on the surface including side walls on both sides of the band-shaped n-type or non-doped single-crystal germanium layer and the first insulating film; ,
A third step of forming a second insulating film on the p-type semiconductor layer;
The second insulating film, the p-type semiconductor layer, and the n-type or non-doped single crystal germanium layer above the n-type or non-doped single crystal germanium layer are separated from the n-type or non-doped single crystal germanium layer. A fourth step of polishing from the surface to a height generally coinciding with the surface of the second insulating film of
A method for manufacturing a semiconductor optical device, comprising:
本発明によれば、シリコン酸化膜上に形成したゲルマニウム光素子であっても、レーザ・ダイオードにおいてはキャリア密度が高くキャリアの流れや分布の均一性が良好な、或いはフォトダイオードにおいてはコンタクト領域における接合容量の低減が可能な半導体光素子やその製造方法を提供することができる。
According to the present invention, even a germanium optical element formed on a silicon oxide film has a high carrier density in a laser diode and good carrier flow and distribution uniformity, or in a photodiode in a contact region. A semiconductor optical device capable of reducing the junction capacitance and a method for manufacturing the same can be provided.
発明者等は、単結晶ゲルマニウム層内における電界を一方向とし、且つ電極と単結晶ゲルマニウム層とのコンタクト領域における接合容量を低減する方法について検討した。その際、ゲルマニウム層の電極となる半導体層は、不純物をドーピングしながらでも絶縁膜に対してゲルマニウム層のみに選択成長することを見出した。本発明はこの新たな知見により生まれたものであり、絶縁膜上に形成された単結晶ゲルマニウム層の側壁に接して電極が自己整合的に形成され、単結晶ゲルマニウム層と電極のそれぞれの上面が同じ高さを有することを特徴とする。これにより、単結晶ゲルマニウムの上面へ電極が形成されることはなく、単結晶ゲルマニウム層を流れる電流を均一化でき、発光領域の全体でキャリア濃度を向上することができ、半導体光素子の効率向上が可能となる。また、単結晶ゲルマニウム層と電極とのコンタクト面積が低減されるため半導体光素子の接合容量が大幅に低減され、半導体光素子の高周波動作が可能となる。また、電極に逆方向電位を与えたときにゲルマニウム層内の電位分布が均一になるため、フォトダイオードの受光感度が向上する。また、単結晶ゲルマニウム層に伸張歪を加えることにより、直接遷移の割合が増加し発光量子効率が向上する。
The inventors examined a method for reducing the junction capacitance in the contact region between the electrode and the single crystal germanium layer while making the electric field in the single crystal germanium layer unidirectional. At that time, it has been found that the semiconductor layer serving as the electrode of the germanium layer is selectively grown only on the germanium layer with respect to the insulating film even while doping impurities. The present invention was born from this new finding, and the electrodes were formed in a self-aligned manner in contact with the sidewalls of the single crystal germanium layer formed on the insulating film, and the upper surfaces of the single crystal germanium layer and the electrodes were It has the same height. As a result, no electrode is formed on the upper surface of the single crystal germanium, the current flowing through the single crystal germanium layer can be made uniform, the carrier concentration can be improved in the entire light emitting region, and the efficiency of the semiconductor optical device is improved. Is possible. In addition, since the contact area between the single crystal germanium layer and the electrode is reduced, the junction capacity of the semiconductor optical device is greatly reduced, and the semiconductor optical device can be operated at high frequency. Further, since the potential distribution in the germanium layer becomes uniform when a reverse potential is applied to the electrode, the light receiving sensitivity of the photodiode is improved. In addition, by applying an extension strain to the single crystal germanium layer, the ratio of direct transition is increased and the emission quantum efficiency is improved.
さらに、レーザ・ダイオードとフォトダイオードと導波路とを同一基板上に形成できることから、光送受信回路において半導体光素子と導波路の結合損失が低減され、光信号のロスを低減することが可能となる。
Furthermore, since the laser diode, the photodiode, and the waveguide can be formed on the same substrate, the coupling loss between the semiconductor optical element and the waveguide is reduced in the optical transmission / reception circuit, and the loss of the optical signal can be reduced. .
以下、本発明について実施例により詳細に説明する。同一符号は同一構成要素を示しており、説明を省略する場合がある。
Hereinafter, the present invention will be described in detail with reference to examples. The same code | symbol has shown the same component and may abbreviate | omit description.
第１の実施例について、図１、図２Ａ～図２Ｅ、図２Ｆを用いて説明する。図１は、本実施例に係る半導体光素子の真性部分の断面構造図である。図２Ａ～図２Ｅは、本実施例の製造方法を工程順に示した断面構造図である。また、図２Ｆは、本実施例に係る他の半導体光素子の真性部分の断面構造図である。まず、本実施例に係る半導体光素子の製造法について、図２Ａ～図２Ｅを用いて以下に説明する。なお、各図において、上図が断面図、下図が上面図を示しており、主に構成要素の主要部が記載されている。
（ａ）結晶核の形成
半導体基板１０１の表面側に絶縁膜１０２と単結晶シリコン層１０３の積層構造が形成されたＳＯＩ基板を用いる。ここで、半導体基板１０１にシリコン基板を使用している。単結晶シリコン層１０３の膜厚は、後にゲルマニウム層を成長するための均一な結晶核とするには１０ｎｍ以上であれば良く、またゲルマニウムの横方向選択成長において、基板と平行な方向での転位の伝播を抑制するためには１μｍ以下であれば好適である。まず始めに、フォトリソグラフィーとエッチングによって単結晶シリコン層１０３を部分的にエッチング除去し、ゲルマニウムのエピタキシャル成長のための結晶核をライン状に形成する（図２Ａ）。このとき、単結晶ゲルマニウム層を基板に対して水平な方向に優先的に成長させるため、ライン状の単結晶シリコン層１０３の側壁が（１００）と等価な結晶面となるようにＳＯＩ層の結晶方位とエッチングのマスクパターンを形成すれば好適である。また、単結晶シリコン層１０３を加工する幅は、後に成長するゲルマニウムのエピタキシャル成長に対して均一な結晶核とするには１０ｎｍ以上とすれば良い。幅の上限に関し制限は無いが、素子の集積度を著しく低下させないためには１ｍｍ以下であれば好適である。また、単結晶シリコン層１０３を核にして光素子の導波路となる単結晶ゲルマニウム層を成長するため、図２Ａの断面図に対して垂直な方向（図２Ａの下図の上面図においては上下方向）には導波路として動作する長さとして５０μｍ以上の長さがあることが望ましい。長さの上限は、集積光源としての現実的な素子サイズを考慮して５ｍｍ以下とする。
（ｂ）ｎ型単結晶ゲルマニウム層の形成
次に、単結晶シリコン層１０３の表面および側壁にｎ型単結晶ゲルマニウム層１０４を形成する。以下に、ｎ型単結晶ゲルマニウム層１０４の形成について説明する。
（ｂ１）エピタキシャル成長前の洗浄
部分的にエッチングを行ったライン状の単結晶シリコン層１０３の表面にエッチングの残渣や自然酸化膜が残留していると、単結晶ゲルマニウム層をエピタキシャル成長した際に、単結晶ゲルマニウム層と単結晶シリコン層との界面で欠陥が多数誘発され、その後成長する単結晶ゲルマニウム層全体の結晶性が悪化しまうため、単結晶シリコン層１０３の表面及び側壁を清浄化する必要がある。ドライエッチング後に通常実施される洗浄を行った後、単結晶シリコン層１０３の表面の自然酸化膜を除去した上で、エピタキシャル成長までの間、極力清浄度を維持する必要がある。例えば、自然酸化膜をフッ酸水溶液によって除去した場合、その直後に純水で洗浄することにより、単結晶シリコン層１０３の表面及び側壁は水素原子で覆われた状態となる。この状態では、表面の最表面に存在するシリコン原子は水素と結合しているため、洗浄を行ってから成長を開始するまでの間に表面に自然酸化膜が形成されにくい状態となる。この洗浄による表面の水素終端処理に加え、さらに自然酸化膜が形成されるのを防ぐためには、洗浄を行った後、表面が再び酸化されたり、又は表面に汚染物が付着したりするのを防ぐため、シリコン基板を清浄な窒素中にて搬送すれば好適である。以下の実施例に関しても、エピタキシャル成長前に行う基板の洗浄と搬送方法に関しては同様である。
（ｂ２）エピタキシャル成長前のクリーニング
次いで、洗浄を行った基板１０１をエピタキシャル装置のロードロック室内に設置し、ロードロック室の真空排気を開始する。ロードロック室の真空排気が完了した後、シリコン基板１０１を、搬送室を経由して成長室に搬送する。基板表面に汚染物が付着するのを防ぐため、搬送室及び成長室は清浄な窒素（Ｎ２）や水素（Ｈ２）などを流しておくか、高真空状態もしくは超高真空状態であることが望ましく、真空状態にする場合は、例えば圧力が１×１０－５Ｐａ程度以下であると好適である。また、成長室内で形成した単結晶層中に酸素や炭素が取り込まれることによる結晶欠陥の発生を防ぐため、搬送室や成長室に酸素や水分、または有機系の汚染物を含んだガスの混入を防ぐ必要がある。このことから、シリコン基板１０１の搬送は常に清浄な窒素（Ｎ２）を供給している状態で行うか、真空で搬送を行う場合はロードロック室の圧力が１×１０－５Ｐａ程度以下になってから行うことが望ましい。単結晶シリコン層１０３の表面及び側壁を水素終端処理しても、搬送中における表面の酸化膜形成や汚染物の付着を完全に防ぐことはできないため、エピタキシャル成長前に表面のクリーニングを行う。クリーニング方法としては、例えば真空中でシリコン基板１０１を加熱することによってシリコン層の表面の自然酸化膜を式(１)の反応によって除去することが可能となる。
Ｓｉ＋ＳｉＯ２→２ＳｉＯ↑ （１）
または、成長室内に清浄な水素を供給した状態でシリコン基板１０１を加熱することによっても基板表面のクリーニングを行うことが可能である。前に述べた真空中での加熱によるクリーニングでは、基板温度が５００℃程度以上になると単結晶シリコン層１０３の表面及び側壁を終端していた水素は脱離し、表面及び側壁のむき出しになったシリコン原子と成長室内の雰囲気中に含まれる水分や酸素が反応し、単結晶シリコン層１０３の表面及び側壁が再酸化されてしまう。そして、この酸化膜が再び還元されることにより、クリーニングと共に表面及び側壁の凹凸が増大し、その後行うエピタキシャル成長の均一性や結晶性を悪化させるという問題がある。また、同時に成長室内の雰囲気中に含まれる炭酸ガスや有機系のガスが表面に付着することから、炭素汚染によるエピタキシャル成長層の結晶性の悪化も発生する。一方、水素を基板表面に供給した状態でシリコン基板を加熱した場合、５００℃以上の温度で水素が基板表面から脱離してしまっても、常に清浄な水素ガスが供給されているため、基板表面のシリコンと水素が結合と脱離を繰り返す。その結果、単結晶シリコン層１０３の表面及び側壁は再酸化されにくくなり、クリーニング中に表面及び側壁の凹凸が発生することもなく、清浄な表面状態を得ることが可能となる。 The first embodiment will be described with reference to FIGS. 1, 2A to 2E, and 2F. FIG. 1 is a cross-sectional structure diagram of the intrinsic part of the semiconductor optical device according to the present embodiment. 2A to 2E are cross-sectional structural views illustrating the manufacturing method of the present embodiment in the order of steps. FIG. 2F is a cross-sectional structure diagram of an intrinsic part of another semiconductor optical device according to this example. First, a method for manufacturing a semiconductor optical device according to this example will be described below with reference to FIGS. 2A to 2E. In each figure, the upper figure shows a cross-sectional view, and the lower figure shows a top view, mainly showing the main parts of the components.
(A) Formation of Crystal Nuclei An SOI substrate in which a stacked structure of the insulatingfilm 102 and the single crystal silicon layer 103 is formed on the surface side of the semiconductor substrate 101 is used. Here, a silicon substrate is used as the semiconductor substrate 101. The film thickness of the single crystal silicon layer 103 may be 10 nm or more in order to obtain uniform crystal nuclei for later growth of the germanium layer, and dislocation in a direction parallel to the substrate in the selective growth of germanium in the lateral direction. Is preferably 1 μm or less in order to suppress the propagation of. First, the single crystal silicon layer 103 is partially etched away by photolithography and etching to form crystal nuclei for epitaxial growth of germanium in a line shape (FIG. 2A). At this time, since the single crystal germanium layer is preferentially grown in a direction horizontal to the substrate, the crystal of the SOI layer is formed so that the side wall of the line-shaped single crystal silicon layer 103 has a crystal plane equivalent to (100). It is preferable to form an orientation and etching mask pattern. Further, the processing width of the single crystal silicon layer 103 may be set to 10 nm or more in order to obtain a uniform crystal nucleus for the epitaxial growth of germanium to be grown later. There is no restriction on the upper limit of the width, but 1 mm or less is preferable in order not to significantly reduce the integration degree of the element. Further, in order to grow a single crystal germanium layer serving as a waveguide of an optical element with the single crystal silicon layer 103 as a nucleus, a direction perpendicular to the cross-sectional view of FIG. 2A (in the top view of the lower diagram of FIG. 2A, the vertical direction) ) Preferably has a length of 50 μm or more as a length to operate as a waveguide. The upper limit of the length is set to 5 mm or less in consideration of a practical element size as an integrated light source.
(B) Formation of n-type single crystal germanium layer Next, an n-type singlecrystal germanium layer 104 is formed on the surface and side walls of the single crystal silicon layer 103. Hereinafter, formation of the n-type single crystal germanium layer 104 will be described.
(B1) Cleaning before epitaxial growth If an etching residue or a natural oxide film remains on the surface of the partially etched line-shaped single-crystal silicon layer 103, the single-crystal germanium layer is grown by epitaxial growth. Many defects are induced at the interface between the crystalline germanium layer and the single crystal silicon layer, and the crystallinity of the entire single crystal germanium layer that grows thereafter deteriorates. Therefore, the surface and sidewalls of the single crystal silicon layer 103 must be cleaned. . It is necessary to maintain cleanliness as much as possible until the epitaxial growth after removing the natural oxide film on the surface of the single crystal silicon layer 103 after performing the cleaning that is usually performed after the dry etching. For example, when the natural oxide film is removed with an aqueous hydrofluoric acid solution, the surface and side walls of the single crystal silicon layer 103 are covered with hydrogen atoms by washing with pure water immediately after that. In this state, since silicon atoms present on the outermost surface are bonded to hydrogen, a natural oxide film is unlikely to be formed on the surface after the cleaning is performed until the growth is started. In addition to the hydrogen termination treatment of the surface by this cleaning, in order to prevent the formation of a natural oxide film, after cleaning, the surface is oxidized again or contaminants adhere to the surface. In order to prevent this, it is preferable to transport the silicon substrate in clean nitrogen. The same is true for the following embodiments with respect to the substrate cleaning and transfer method performed before epitaxial growth.
(B2) Cleaning Before Epitaxial Growth Next, the cleanedsubstrate 101 is placed in the load lock chamber of the epitaxial apparatus, and evacuation of the load lock chamber is started. After the evacuation of the load lock chamber is completed, the silicon substrate 101 is transferred to the growth chamber via the transfer chamber. In order to prevent contaminants from adhering to the substrate surface, clean nitrogen (N 2 ), hydrogen (H 2 ), etc. are allowed to flow in the transfer chamber and the growth chamber, or the vacuum chamber is in a high vacuum state or ultra high vacuum state. In the case of making a vacuum state, for example, the pressure is preferably about 1 × 10 −5 Pa or less. In addition, in order to prevent generation of crystal defects due to oxygen and carbon being taken into the single crystal layer formed in the growth chamber, oxygen, moisture, or gas containing organic contaminants is mixed into the transfer chamber or growth chamber. Need to prevent. Therefore, the silicon substrate 101 is always transported in a state where clean nitrogen (N 2 ) is supplied, or when transported in a vacuum, the load lock chamber pressure is about 1 × 10 −5 Pa or less. It is desirable to do it after becoming. Even if the surface and side walls of the single crystal silicon layer 103 are subjected to hydrogen termination treatment, formation of an oxide film on the surface and adhesion of contaminants during transportation cannot be completely prevented. Therefore, the surface is cleaned before epitaxial growth. As a cleaning method, for example, the natural oxide film on the surface of the silicon layer can be removed by the reaction of the formula (1) by heating the silicon substrate 101 in a vacuum.
Si + SiO 2 → 2SiO ↑ (1)
Alternatively, the substrate surface can also be cleaned by heating thesilicon substrate 101 with clean hydrogen supplied into the growth chamber. In the cleaning by heating in vacuum described above, when the substrate temperature is about 500 ° C. or higher, the hydrogen that has terminated the surface and side walls of the single crystal silicon layer 103 is desorbed, and the silicon on which the surface and side walls are exposed is removed. Moisture and oxygen contained in the atmosphere and the atmosphere in the growth chamber react to re-oxidize the surface and sidewalls of the single crystal silicon layer 103. Further, since the oxide film is reduced again, the unevenness of the surface and the side wall increases with cleaning, and there is a problem that the uniformity and crystallinity of the epitaxial growth performed thereafter are deteriorated. At the same time, since the carbon dioxide gas and organic gas contained in the atmosphere in the growth chamber adhere to the surface, the crystallinity of the epitaxial growth layer is also deteriorated due to carbon contamination. On the other hand, when a silicon substrate is heated with hydrogen supplied to the substrate surface, clean hydrogen gas is always supplied even if hydrogen desorbs from the substrate surface at a temperature of 500 ° C. or higher. Silicon and hydrogen repeatedly bond and desorb. As a result, the surface and side walls of the single crystal silicon layer 103 are not easily reoxidized, and the surface and side walls are not uneven during cleaning, and a clean surface state can be obtained.
（ａ）結晶核の形成
半導体基板１０１の表面側に絶縁膜１０２と単結晶シリコン層１０３の積層構造が形成されたＳＯＩ基板を用いる。ここで、半導体基板１０１にシリコン基板を使用している。単結晶シリコン層１０３の膜厚は、後にゲルマニウム層を成長するための均一な結晶核とするには１０ｎｍ以上であれば良く、またゲルマニウムの横方向選択成長において、基板と平行な方向での転位の伝播を抑制するためには１μｍ以下であれば好適である。まず始めに、フォトリソグラフィーとエッチングによって単結晶シリコン層１０３を部分的にエッチング除去し、ゲルマニウムのエピタキシャル成長のための結晶核をライン状に形成する（図２Ａ）。このとき、単結晶ゲルマニウム層を基板に対して水平な方向に優先的に成長させるため、ライン状の単結晶シリコン層１０３の側壁が（１００）と等価な結晶面となるようにＳＯＩ層の結晶方位とエッチングのマスクパターンを形成すれば好適である。また、単結晶シリコン層１０３を加工する幅は、後に成長するゲルマニウムのエピタキシャル成長に対して均一な結晶核とするには１０ｎｍ以上とすれば良い。幅の上限に関し制限は無いが、素子の集積度を著しく低下させないためには１ｍｍ以下であれば好適である。また、単結晶シリコン層１０３を核にして光素子の導波路となる単結晶ゲルマニウム層を成長するため、図２Ａの断面図に対して垂直な方向（図２Ａの下図の上面図においては上下方向）には導波路として動作する長さとして５０μｍ以上の長さがあることが望ましい。長さの上限は、集積光源としての現実的な素子サイズを考慮して５ｍｍ以下とする。
（ｂ）ｎ型単結晶ゲルマニウム層の形成
次に、単結晶シリコン層１０３の表面および側壁にｎ型単結晶ゲルマニウム層１０４を形成する。以下に、ｎ型単結晶ゲルマニウム層１０４の形成について説明する。
（ｂ１）エピタキシャル成長前の洗浄
部分的にエッチングを行ったライン状の単結晶シリコン層１０３の表面にエッチングの残渣や自然酸化膜が残留していると、単結晶ゲルマニウム層をエピタキシャル成長した際に、単結晶ゲルマニウム層と単結晶シリコン層との界面で欠陥が多数誘発され、その後成長する単結晶ゲルマニウム層全体の結晶性が悪化しまうため、単結晶シリコン層１０３の表面及び側壁を清浄化する必要がある。ドライエッチング後に通常実施される洗浄を行った後、単結晶シリコン層１０３の表面の自然酸化膜を除去した上で、エピタキシャル成長までの間、極力清浄度を維持する必要がある。例えば、自然酸化膜をフッ酸水溶液によって除去した場合、その直後に純水で洗浄することにより、単結晶シリコン層１０３の表面及び側壁は水素原子で覆われた状態となる。この状態では、表面の最表面に存在するシリコン原子は水素と結合しているため、洗浄を行ってから成長を開始するまでの間に表面に自然酸化膜が形成されにくい状態となる。この洗浄による表面の水素終端処理に加え、さらに自然酸化膜が形成されるのを防ぐためには、洗浄を行った後、表面が再び酸化されたり、又は表面に汚染物が付着したりするのを防ぐため、シリコン基板を清浄な窒素中にて搬送すれば好適である。以下の実施例に関しても、エピタキシャル成長前に行う基板の洗浄と搬送方法に関しては同様である。
（ｂ２）エピタキシャル成長前のクリーニング
次いで、洗浄を行った基板１０１をエピタキシャル装置のロードロック室内に設置し、ロードロック室の真空排気を開始する。ロードロック室の真空排気が完了した後、シリコン基板１０１を、搬送室を経由して成長室に搬送する。基板表面に汚染物が付着するのを防ぐため、搬送室及び成長室は清浄な窒素（Ｎ２）や水素（Ｈ２）などを流しておくか、高真空状態もしくは超高真空状態であることが望ましく、真空状態にする場合は、例えば圧力が１×１０－５Ｐａ程度以下であると好適である。また、成長室内で形成した単結晶層中に酸素や炭素が取り込まれることによる結晶欠陥の発生を防ぐため、搬送室や成長室に酸素や水分、または有機系の汚染物を含んだガスの混入を防ぐ必要がある。このことから、シリコン基板１０１の搬送は常に清浄な窒素（Ｎ２）を供給している状態で行うか、真空で搬送を行う場合はロードロック室の圧力が１×１０－５Ｐａ程度以下になってから行うことが望ましい。単結晶シリコン層１０３の表面及び側壁を水素終端処理しても、搬送中における表面の酸化膜形成や汚染物の付着を完全に防ぐことはできないため、エピタキシャル成長前に表面のクリーニングを行う。クリーニング方法としては、例えば真空中でシリコン基板１０１を加熱することによってシリコン層の表面の自然酸化膜を式(１)の反応によって除去することが可能となる。
Ｓｉ＋ＳｉＯ２→２ＳｉＯ↑ （１）
または、成長室内に清浄な水素を供給した状態でシリコン基板１０１を加熱することによっても基板表面のクリーニングを行うことが可能である。前に述べた真空中での加熱によるクリーニングでは、基板温度が５００℃程度以上になると単結晶シリコン層１０３の表面及び側壁を終端していた水素は脱離し、表面及び側壁のむき出しになったシリコン原子と成長室内の雰囲気中に含まれる水分や酸素が反応し、単結晶シリコン層１０３の表面及び側壁が再酸化されてしまう。そして、この酸化膜が再び還元されることにより、クリーニングと共に表面及び側壁の凹凸が増大し、その後行うエピタキシャル成長の均一性や結晶性を悪化させるという問題がある。また、同時に成長室内の雰囲気中に含まれる炭酸ガスや有機系のガスが表面に付着することから、炭素汚染によるエピタキシャル成長層の結晶性の悪化も発生する。一方、水素を基板表面に供給した状態でシリコン基板を加熱した場合、５００℃以上の温度で水素が基板表面から脱離してしまっても、常に清浄な水素ガスが供給されているため、基板表面のシリコンと水素が結合と脱離を繰り返す。その結果、単結晶シリコン層１０３の表面及び側壁は再酸化されにくくなり、クリーニング中に表面及び側壁の凹凸が発生することもなく、清浄な表面状態を得ることが可能となる。 The first embodiment will be described with reference to FIGS. 1, 2A to 2E, and 2F. FIG. 1 is a cross-sectional structure diagram of the intrinsic part of the semiconductor optical device according to the present embodiment. 2A to 2E are cross-sectional structural views illustrating the manufacturing method of the present embodiment in the order of steps. FIG. 2F is a cross-sectional structure diagram of an intrinsic part of another semiconductor optical device according to this example. First, a method for manufacturing a semiconductor optical device according to this example will be described below with reference to FIGS. 2A to 2E. In each figure, the upper figure shows a cross-sectional view, and the lower figure shows a top view, mainly showing the main parts of the components.
(A) Formation of Crystal Nuclei An SOI substrate in which a stacked structure of the insulating
(B) Formation of n-type single crystal germanium layer Next, an n-type single
(B1) Cleaning before epitaxial growth If an etching residue or a natural oxide film remains on the surface of the partially etched line-shaped single-
(B2) Cleaning Before Epitaxial Growth Next, the cleaned
Si + SiO 2 → 2SiO ↑ (1)
Alternatively, the substrate surface can also be cleaned by heating the
水素雰囲気中でクリーニングを行うため、まず始めに成長室に水素ガスを供給する。このとき、水素ガスを供給する前に基板表面から水素が脱離するのを防ぐため、基板温度を水素の脱離する５００℃より低くすれば好適である。また、水素ガスの流量は制御性良くガスが供給できるように１０ｍｌ／ｍｉｎ以上とし、排気されたガスを安全に処理するためには１００ｌ／ｍｉｎ以下とすれば好適である。このとき、成長室内の水素ガスの分圧の下限は、基板表面に均一にガスが供給されるように１０Ｐａとし、上限は装置の安全性を保つために大気圧とすればよい。水素ガスが供給された後、シリコン基板をクリーニング温度まで加熱する。このときの加熱方法としては、加熱に際してのシリコン基板への汚染や基板内での極端な温度の違いなどがなければ、どのような機構や構造でも良い。例えばワークコイルに高周波を印加して加熱する誘導加熱や、抵抗ヒータによる加熱などが適用できるほか、特に短時間での温度制御が可能な方法として、ランプからの輻射を利用した加熱方法を用いることができる。この加熱方法はクリーニングに限らず、後述する単結晶の成長に際しての加熱に関しても同様である。
In order to perform cleaning in a hydrogen atmosphere, hydrogen gas is first supplied to the growth chamber. At this time, in order to prevent hydrogen from desorbing from the substrate surface before supplying the hydrogen gas, it is preferable that the substrate temperature be lower than 500 ° C. from which hydrogen is desorbed. The flow rate of the hydrogen gas is preferably 10 ml / min or more so that the gas can be supplied with good controllability, and 100 l / min or less is preferable for safely treating the exhausted gas. At this time, the lower limit of the partial pressure of hydrogen gas in the growth chamber is set to 10 Pa so that the gas is uniformly supplied to the substrate surface, and the upper limit may be set to atmospheric pressure in order to maintain the safety of the apparatus. After the hydrogen gas is supplied, the silicon substrate is heated to the cleaning temperature. As a heating method at this time, any mechanism or structure may be used as long as there is no contamination of the silicon substrate during heating or an extreme temperature difference in the substrate. For example, induction heating that heats a work coil by applying a high frequency, heating by a resistance heater, etc. can be applied. In addition, as a method that enables temperature control in a short time, a heating method using radiation from a lamp is used. Can do. This heating method is not limited to cleaning, and the same applies to heating during the growth of a single crystal described later.
クリーニング温度までシリコン基板を加熱した後、所定の時間基板を加熱することにより単結晶シリコン層１０３の表面及び側壁の自然酸化膜や汚染物が除去できるが、例えばクリーニング温度は、クリーニングの効果が得られる温度として６００℃以上であれば良く、エピタキシャル成長の前に形成されている表面構造へ与える影響を低減するため、クリーニング温度は９００℃以下にする必要がある。また、シリコンの自然酸化膜や汚染物質の除去効率はクリーニング温度によって変化し、温度が高いほど短時間で効果が得られるため、必要以上に熱処理を行わない条件で加熱を行うことが望ましい。クリーニング温度が７００℃の場合、クリーニングの効果が小さいため、クリーニング時間を３０分とする必要があるのに対し、クリーニング時間を９００℃とした場合、クリーニング時間は２分以上とする。
After heating the silicon substrate to the cleaning temperature and then heating the substrate for a predetermined time, the natural oxide film and contaminants on the surface and side walls of the single crystal silicon layer 103 can be removed. For example, the cleaning temperature has a cleaning effect. The cleaning temperature should be 600 ° C. or higher, and the cleaning temperature needs to be 900 ° C. or lower in order to reduce the influence on the surface structure formed before epitaxial growth. In addition, the removal efficiency of silicon natural oxide film and contaminants varies depending on the cleaning temperature, and the higher the temperature, the shorter the effect. Therefore, it is desirable to perform heating under conditions that do not perform heat treatment more than necessary. When the cleaning temperature is 700 ° C., the cleaning effect is small, and therefore the cleaning time needs to be 30 minutes. When the cleaning time is 900 ° C., the cleaning time is 2 minutes or more.
また、クリーニング温度の低温化を可能とする方法として、原子状水素を用いたクリーニングを行うこともできる。この方法では、表面に活性な水素原子を照射することにより、基板温度を上げなくても酸素の還元反応を生じさせることが可能となり、室温においてもクリーニング効果が得られる。原子状水素の発生方法としては、高温に加熱したタングステンなどのフィラメントに水素ガスを照射することにより熱的に水素分子を解離させる方法や、水素ガス中でプラズマを発生させて電気的に水素分子を解離させる方法や、紫外線などの照射による原子状水素の発生などが可能である。但しこの場合、フィラメントやプラズマを発生する電極周辺からの金属汚染の発生や、プラズマによる石英部品などからの汚染物の発生などに十分注意をする必要がある。各方法とも、水素原子を大量に発生させるのは非常に困難であるため、水素ガスの中で、ある割合の分子を原子状態に解離させて基板表面に照射することにより、低温化が可能となる。例えば、クリーニング時間を１０分以内とするためには、クリーニング温度を６５０℃とする。
Also, cleaning using atomic hydrogen can be performed as a method that enables the cleaning temperature to be lowered. In this method, by irradiating the surface with active hydrogen atoms, it is possible to cause a reduction reaction of oxygen without raising the substrate temperature, and a cleaning effect can be obtained even at room temperature. As atomic hydrogen generation methods, hydrogen molecules are thermally dissociated by irradiating hydrogen gas to a filament such as tungsten heated to a high temperature, or hydrogen molecules are electrically generated by generating plasma in hydrogen gas. Can be dissociated, and atomic hydrogen can be generated by irradiation with ultraviolet rays. However, in this case, it is necessary to pay sufficient attention to the occurrence of metal contamination from the periphery of the electrode that generates the filament and plasma, and the generation of contaminants from quartz parts due to the plasma. In each method, it is very difficult to generate a large amount of hydrogen atoms, so it is possible to lower the temperature by dissociating a certain proportion of molecules into an atomic state in the hydrogen gas and irradiating the substrate surface. Become. For example, in order to set the cleaning time within 10 minutes, the cleaning temperature is set to 650 ° C.
更に、加熱を必要としない化学反応によって表面の自然酸化膜を除去することもできる。例えば、フッ化水素（ＨＦ）ガスを供給することにより、酸化膜がエッチング反応によって除去されるため、室温で表面のクリーニングが可能となる。
Furthermore, the natural oxide film on the surface can be removed by a chemical reaction that does not require heating. For example, by supplying hydrogen fluoride (HF) gas, the oxide film is removed by an etching reaction, so that the surface can be cleaned at room temperature.
以上、エピタキシャル成長前のクリーニングについて説明を行ったが、クリーニング方法に関しては他の実施例に関しても同様である。
（ｂ３）基板温度の安定化
クリーニングが終了した後、エピタキシャル成長を行う温度まで基板温度を下げ、エピタキシャル成長を行う温度で基板温度を安定させる時間を設ける。温度の安定化を行うステップでは、クリーニング後の単結晶シリコン層１０３の表面及び側壁を清浄な状態に保つために水素ガスを供給し続けることが望ましいが、水素ガスは表面を冷却する効果を持っているため、加熱条件が同じであればガスの流量に応じて基板表面温度が変化してしまう。従って、エピタキシャル成長で用いるガスの総流量と大きく異なる流量の水素ガスを供給した状態で温度が安定していても、エピタキシャル成長を開始した時点でガスの流量が変わることにより基板温度が大きく変動してしまう。この現象を防ぐため、基板温度の安定化を行うステップにおいては、その水素流量をエピタキシャル成長で用いるガスの総流量とほぼ同じ値を用いることが望ましい。また、必ずしも基板温度がエピタキシャル成長温度まで下がってから温度安定化を行うステップを設ける必要はない。基板温度を下げながら水素ガスの流量を調整し、基板温度がエピタキシャル成長温度になった時点で水素ガスの流量が成長ガスの流量と等しくなっていれば好適である。この場合、基板温度を下げたと同時にエピタキシャル成長を開始できるため、スループットを大幅に向上することができる。
（ｂ４）エピタキシャル成長
次いで、エピタキシャル層の原料ガスを供給することによって、ライン状の単結晶シリコン層１０３を成長核として帯状のｎ型単結晶ゲルマニウム層１０４のエピタキシャル成長を行う（図２Ｂの上図）。ここで使用する原料ガスとしてはゲルマニウムと水素、塩素、フッ素などからなる化合物を用いることができる。例えば、モノゲルマン（ＧｅＨ４）やジゲルマン（Ｇｅ２Ｈ６）、四塩化ゲルマン（ＧｅＣｌ４）などが挙げられるが、この他のガスに関しても使用方法は同様である。以下、モノゲルマンを原料ガスとして用いた場合に付き、説明する。熱エネルギーによって原料ガスを分解させてエピタキシャル成長を行う場合の温度範囲は、モノゲルマンが基板表面で反応を起こす３００℃以上である。また、ゲルマニウムの融点以下で成長を行う必要があるため、成長温度の上限として９４０℃以下であればよい。この温度範囲で、成長圧力は成長速度が表面での反応で律速される０．１Ｐａ以上で、上限は気相中での反応が起こり始める１００００Ｐａ以下であればよい。プラズマや光といった熱以外のエネルギーを利用して化学反応を起こす成長方法も利用可能であり、その場合の成長温度はゲルマニウムを含んだラジカルが表面を移動してエピタキシャル成長が進行するためには１００℃以上の温度が必要である。また、ｎ型単結晶ゲルマニウム層１０４の結晶性を向上するには、原料ガス中のラジカル分子が単結晶ゲルマニウム層の成長表面のゲルマニウム原子と共有結合を結びやすい状況にするのが望ましく、表面原子が常に２つの共有結合のダングリングボンドを有する結晶構造として、単結晶シリコン層１０３の側壁の面方位が（１００）と等価であれば好適である。この他の代表的な面方位として、（１１１）面や（１１０）面などが挙げられるが、これらの面方位では成長に伴って表面の原子配列が変化するため、適正な表面反応を起こすために成長温度・成長圧力の最適化が必要である。例えば（１１１）面に成長を行う場合、（１００）面よりも成長温度を約５０度高くする。
（ｂ５）高濃度ｎ型ドーピング
前述したように、ゲルマニウム・レーザ・ダイオードの発光の量子効率を向上するためには、発光領域となる単結晶ゲルマニウム層への高濃度ドーピングが非常に有効である。ｎ型単結晶ゲルマニウム層１０４は、５×１０１８ｃｍ－３以上のｎ型キャリア濃度となるようにドーピングを行う。単結晶ゲルマニウム層のエピタキシャル成長後に、ｎ型ドーパントとなるＰ、Ａｓ、Ｓｂ等を含むイオンを単結晶ゲルマニウム層１０４に注入し、その後ドーパントの活性化とゲルマニウムの結晶性を回復するために高温でアニールすることでドーピングを行うことも可能ではあるが、前述したように、イオン注入では単結晶ゲルマニウム層の結晶性を完全に回復させることが非常に困難であるため、結晶性を悪化させないドーピングを行う方が望ましい。 The cleaning before the epitaxial growth has been described above, but the cleaning method is the same for the other embodiments.
(B3) Stabilization of substrate temperature After cleaning is completed, the substrate temperature is lowered to a temperature at which epitaxial growth is performed, and a time for stabilizing the substrate temperature at a temperature at which epitaxial growth is performed is provided. In the step of stabilizing the temperature, it is desirable to continue supplying hydrogen gas in order to keep the surface and sidewalls of the singlecrystal silicon layer 103 after cleaning clean, but hydrogen gas has an effect of cooling the surface. Therefore, if the heating conditions are the same, the substrate surface temperature changes according to the gas flow rate. Therefore, even if the temperature is stable in a state where hydrogen gas having a flow rate significantly different from the total flow rate of the gas used for epitaxial growth is supplied, the substrate temperature greatly fluctuates due to the change in the gas flow rate when epitaxial growth is started. . In order to prevent this phenomenon, in the step of stabilizing the substrate temperature, it is desirable to use the hydrogen flow rate that is substantially the same as the total flow rate of the gas used for epitaxial growth. Further, it is not always necessary to provide a temperature stabilization step after the substrate temperature has dropped to the epitaxial growth temperature. It is preferable if the flow rate of hydrogen gas is adjusted while lowering the substrate temperature, and the flow rate of hydrogen gas is equal to the flow rate of growth gas when the substrate temperature reaches the epitaxial growth temperature. In this case, since the epitaxial growth can be started at the same time when the substrate temperature is lowered, the throughput can be greatly improved.
(B4) Epitaxial Growth Next, by supplying a raw material gas for the epitaxial layer, the strip-shaped n-type singlecrystal germanium layer 104 is epitaxially grown using the line-shaped single crystal silicon layer 103 as a growth nucleus (upper diagram in FIG. 2B). As the source gas used here, a compound composed of germanium and hydrogen, chlorine, fluorine, or the like can be used. For example, monogermane (GeH 4 ), digermane (Ge 2 H 6 ), germane tetrachloride (GeCl 4 ) and the like can be mentioned, but the use method is the same for other gases. Hereinafter, the case where monogermane is used as the source gas will be described. The temperature range in the case where epitaxial growth is performed by decomposing the source gas by thermal energy is 300 ° C. or higher at which monogermane reacts on the substrate surface. Moreover, since it is necessary to perform growth below the melting point of germanium, the upper limit of the growth temperature may be 940 ° C. or less. In this temperature range, the growth pressure may be 0.1 Pa or higher, where the growth rate is determined by the reaction on the surface, and the upper limit may be 10000 Pa or lower at which the reaction in the gas phase begins to occur. A growth method that causes a chemical reaction using energy other than heat, such as plasma or light, can also be used. In this case, the growth temperature is 100 ° C. in order that the radical containing germanium moves on the surface and epitaxial growth proceeds. The above temperature is necessary. Further, in order to improve the crystallinity of the n-type single crystal germanium layer 104, it is desirable that radical molecules in the source gas easily form a covalent bond with germanium atoms on the growth surface of the single crystal germanium layer. Is always suitable as a crystal structure having two covalent dangling bonds if the plane orientation of the side wall of the single crystal silicon layer 103 is equivalent to (100). Other typical plane orientations include the (111) plane and the (110) plane. In these plane orientations, the atomic arrangement of the surface changes with growth, so that an appropriate surface reaction occurs. It is necessary to optimize the growth temperature and pressure. For example, when growth is performed on the (111) plane, the growth temperature is set to about 50 degrees higher than that on the (100) plane.
(B5) High-concentration n-type doping As described above, in order to improve the quantum efficiency of light emission of a germanium laser diode, high-concentration doping in a single crystal germanium layer serving as a light-emitting region is very effective. The n-type singlecrystal germanium layer 104 is doped so as to have an n-type carrier concentration of 5 × 10 18 cm −3 or more. After epitaxial growth of the single crystal germanium layer, ions containing P, As, Sb, etc., which become n-type dopants, are implanted into the single crystal germanium layer 104, and then annealed at a high temperature to restore dopant activation and germanium crystallinity. However, as described above, since it is very difficult to completely recover the crystallinity of the single crystal germanium layer by ion implantation, doping that does not deteriorate the crystallinity is performed. Is preferable.
（ｂ３）基板温度の安定化
クリーニングが終了した後、エピタキシャル成長を行う温度まで基板温度を下げ、エピタキシャル成長を行う温度で基板温度を安定させる時間を設ける。温度の安定化を行うステップでは、クリーニング後の単結晶シリコン層１０３の表面及び側壁を清浄な状態に保つために水素ガスを供給し続けることが望ましいが、水素ガスは表面を冷却する効果を持っているため、加熱条件が同じであればガスの流量に応じて基板表面温度が変化してしまう。従って、エピタキシャル成長で用いるガスの総流量と大きく異なる流量の水素ガスを供給した状態で温度が安定していても、エピタキシャル成長を開始した時点でガスの流量が変わることにより基板温度が大きく変動してしまう。この現象を防ぐため、基板温度の安定化を行うステップにおいては、その水素流量をエピタキシャル成長で用いるガスの総流量とほぼ同じ値を用いることが望ましい。また、必ずしも基板温度がエピタキシャル成長温度まで下がってから温度安定化を行うステップを設ける必要はない。基板温度を下げながら水素ガスの流量を調整し、基板温度がエピタキシャル成長温度になった時点で水素ガスの流量が成長ガスの流量と等しくなっていれば好適である。この場合、基板温度を下げたと同時にエピタキシャル成長を開始できるため、スループットを大幅に向上することができる。
（ｂ４）エピタキシャル成長
次いで、エピタキシャル層の原料ガスを供給することによって、ライン状の単結晶シリコン層１０３を成長核として帯状のｎ型単結晶ゲルマニウム層１０４のエピタキシャル成長を行う（図２Ｂの上図）。ここで使用する原料ガスとしてはゲルマニウムと水素、塩素、フッ素などからなる化合物を用いることができる。例えば、モノゲルマン（ＧｅＨ４）やジゲルマン（Ｇｅ２Ｈ６）、四塩化ゲルマン（ＧｅＣｌ４）などが挙げられるが、この他のガスに関しても使用方法は同様である。以下、モノゲルマンを原料ガスとして用いた場合に付き、説明する。熱エネルギーによって原料ガスを分解させてエピタキシャル成長を行う場合の温度範囲は、モノゲルマンが基板表面で反応を起こす３００℃以上である。また、ゲルマニウムの融点以下で成長を行う必要があるため、成長温度の上限として９４０℃以下であればよい。この温度範囲で、成長圧力は成長速度が表面での反応で律速される０．１Ｐａ以上で、上限は気相中での反応が起こり始める１００００Ｐａ以下であればよい。プラズマや光といった熱以外のエネルギーを利用して化学反応を起こす成長方法も利用可能であり、その場合の成長温度はゲルマニウムを含んだラジカルが表面を移動してエピタキシャル成長が進行するためには１００℃以上の温度が必要である。また、ｎ型単結晶ゲルマニウム層１０４の結晶性を向上するには、原料ガス中のラジカル分子が単結晶ゲルマニウム層の成長表面のゲルマニウム原子と共有結合を結びやすい状況にするのが望ましく、表面原子が常に２つの共有結合のダングリングボンドを有する結晶構造として、単結晶シリコン層１０３の側壁の面方位が（１００）と等価であれば好適である。この他の代表的な面方位として、（１１１）面や（１１０）面などが挙げられるが、これらの面方位では成長に伴って表面の原子配列が変化するため、適正な表面反応を起こすために成長温度・成長圧力の最適化が必要である。例えば（１１１）面に成長を行う場合、（１００）面よりも成長温度を約５０度高くする。
（ｂ５）高濃度ｎ型ドーピング
前述したように、ゲルマニウム・レーザ・ダイオードの発光の量子効率を向上するためには、発光領域となる単結晶ゲルマニウム層への高濃度ドーピングが非常に有効である。ｎ型単結晶ゲルマニウム層１０４は、５×１０１８ｃｍ－３以上のｎ型キャリア濃度となるようにドーピングを行う。単結晶ゲルマニウム層のエピタキシャル成長後に、ｎ型ドーパントとなるＰ、Ａｓ、Ｓｂ等を含むイオンを単結晶ゲルマニウム層１０４に注入し、その後ドーパントの活性化とゲルマニウムの結晶性を回復するために高温でアニールすることでドーピングを行うことも可能ではあるが、前述したように、イオン注入では単結晶ゲルマニウム層の結晶性を完全に回復させることが非常に困難であるため、結晶性を悪化させないドーピングを行う方が望ましい。 The cleaning before the epitaxial growth has been described above, but the cleaning method is the same for the other embodiments.
(B3) Stabilization of substrate temperature After cleaning is completed, the substrate temperature is lowered to a temperature at which epitaxial growth is performed, and a time for stabilizing the substrate temperature at a temperature at which epitaxial growth is performed is provided. In the step of stabilizing the temperature, it is desirable to continue supplying hydrogen gas in order to keep the surface and sidewalls of the single
(B4) Epitaxial Growth Next, by supplying a raw material gas for the epitaxial layer, the strip-shaped n-type single
(B5) High-concentration n-type doping As described above, in order to improve the quantum efficiency of light emission of a germanium laser diode, high-concentration doping in a single crystal germanium layer serving as a light-emitting region is very effective. The n-type single
エピタキシャル成長と同時にｎ型ドーピングを行う場合、ゲルマニウムの原料ガスに加えてドーピングガスを供給して成長を行う。ｎ型ドーピングガスとして、５族元素と水素、塩素、フッ素などからなる化合物を用いることができ、例えば、ホスフィン（ＰＨ３）、アルシン（ＡｓＨ３）などが挙げられる。高濃度ドーピングを行うとドーパントの活性化率が低下するため、アニールを行ってドーパントの活性化を行う必要がある。その際、アニールによってｎ型ドーパントがゲルマニウム層から脱離してしまうのを抑制するために、アニール温度とアニール時間を最適化する必要がある。アニール温度を高くした場合、アニール時間はドーパントが活性化されるのに必要な最短の時間にした方が良く、例えば８５０℃とした場合、アニール時間は５秒以下とすればよい。また、アニール温度を６００℃とした場合、アニール時間は５分程度とすれば好適である。
When n-type doping is performed simultaneously with the epitaxial growth, the growth is performed by supplying a doping gas in addition to the germanium source gas. As the n-type doping gas, a compound composed of a Group 5 element and hydrogen, chlorine, fluorine, or the like can be used, and examples thereof include phosphine (PH 3 ) and arsine (AsH 3 ). When the high concentration doping is performed, the activation rate of the dopant is lowered. Therefore, it is necessary to activate the dopant by performing annealing. At that time, it is necessary to optimize the annealing temperature and annealing time in order to suppress the n-type dopant from being detached from the germanium layer by annealing. When the annealing temperature is increased, the annealing time is preferably the shortest time necessary for activating the dopant. For example, when the annealing temperature is 850 ° C., the annealing time may be 5 seconds or less. When the annealing temperature is 600 ° C., it is preferable that the annealing time is about 5 minutes.
また、ドーパントを多量に含んだ低融点ガラスや有機金属等の材料を単結晶ゲルマニウム層の表面に塗布し、適切な条件でアニールを行うことで単結晶ゲルマニウム層中にドーパントを拡散させるスピン・オン・ドーピングを適用することもできる。
（ｂ６）選択エピタキシャル成長
ｎ型単結晶ゲルマニウム層１０４の成長では、単結晶シリコン層１０３を核として成長が開始した後も、埋め込み絶縁膜１０２の上には直接ゲルマニウム層が堆積しない選択成長の状態を保持すれば好適である。埋め込み絶縁膜１０２としてシリコン酸化膜を用いた場合、シリコン酸化膜上では、ゲルマニウムの原料ガスと表面分子が反応して以下のような反応が生じる。例えば、ゲルマニウムの原料ガスとしてモノゲルマン（ＧｅＨ４）を用いたとき、式（２）に示すように、
ＧｅＨ４ ＋ ＳｉＯ２ → ＳｉＯ↑ ＋ ＧｅＯ↑ ＋ ２Ｈ２↑ （２）
といったゲルマンによる還元反応が発生する。上記の還元反応は数多くの反応のうちの一部であり、この他にも原料ガスが分解してエネルギーが高い状態になったラジカル分子とシリコン酸化膜との還元反応なども存在する。その結果、シリコン酸化膜上では上記還元反応によるエッチングと原料ガスが分解して生じる堆積とが同時に進行しており、成長温度及び圧力に依存してエッチングと堆積の大小関係が変化する。 Also, spin-on that diffuses the dopant into the single-crystal germanium layer by applying a low-melting-point glass or organometallic material containing a large amount of dopant to the surface of the single-crystal germanium layer and annealing it under appropriate conditions -Doping can also be applied.
(B6) Selective epitaxial growth In the growth of the n-type singlecrystal germanium layer 104, after the growth starts with the single crystal silicon layer 103 as a nucleus, a selective growth state in which no germanium layer is deposited directly on the buried insulating film 102 is observed. It is preferable to hold it. When a silicon oxide film is used as the buried insulating film 102, the following reaction occurs on the silicon oxide film due to the reaction between the germanium source gas and the surface molecules. For example, when monogermane (GeH 4 ) is used as a germanium source gas,
GeH 4 + SiO 2 → SiO ↑ + GeO ↑ + 2H 2 ↑ (2)
Such a reduction reaction by germane occurs. The above reduction reaction is a part of a large number of reactions, and there are other reduction reactions between radical molecules in which the raw material gas is decomposed to a high energy state and a silicon oxide film. As a result, on the silicon oxide film, etching by the reduction reaction and deposition caused by decomposition of the source gas proceed simultaneously, and the magnitude relationship between etching and deposition changes depending on the growth temperature and pressure.
（ｂ６）選択エピタキシャル成長
ｎ型単結晶ゲルマニウム層１０４の成長では、単結晶シリコン層１０３を核として成長が開始した後も、埋め込み絶縁膜１０２の上には直接ゲルマニウム層が堆積しない選択成長の状態を保持すれば好適である。埋め込み絶縁膜１０２としてシリコン酸化膜を用いた場合、シリコン酸化膜上では、ゲルマニウムの原料ガスと表面分子が反応して以下のような反応が生じる。例えば、ゲルマニウムの原料ガスとしてモノゲルマン（ＧｅＨ４）を用いたとき、式（２）に示すように、
ＧｅＨ４ ＋ ＳｉＯ２ → ＳｉＯ↑ ＋ ＧｅＯ↑ ＋ ２Ｈ２↑ （２）
といったゲルマンによる還元反応が発生する。上記の還元反応は数多くの反応のうちの一部であり、この他にも原料ガスが分解してエネルギーが高い状態になったラジカル分子とシリコン酸化膜との還元反応なども存在する。その結果、シリコン酸化膜上では上記還元反応によるエッチングと原料ガスが分解して生じる堆積とが同時に進行しており、成長温度及び圧力に依存してエッチングと堆積の大小関係が変化する。 Also, spin-on that diffuses the dopant into the single-crystal germanium layer by applying a low-melting-point glass or organometallic material containing a large amount of dopant to the surface of the single-crystal germanium layer and annealing it under appropriate conditions -Doping can also be applied.
(B6) Selective epitaxial growth In the growth of the n-type single
GeH 4 + SiO 2 → SiO ↑ + GeO ↑ + 2H 2 ↑ (2)
Such a reduction reaction by germane occurs. The above reduction reaction is a part of a large number of reactions, and there are other reduction reactions between radical molecules in which the raw material gas is decomposed to a high energy state and a silicon oxide film. As a result, on the silicon oxide film, etching by the reduction reaction and deposition caused by decomposition of the source gas proceed simultaneously, and the magnitude relationship between etching and deposition changes depending on the growth temperature and pressure.
また、成長条件によってシリコン酸化膜上でのゲルマニウム層の堆積が上記の還元反応を上回ったり、埋め込み絶縁膜１０２としてシリコン窒化膜を用いていて上記の還元反応が利用できない場合などでは、原料ガスに加えて、塩素ガス（Ｃｌ）や塩化水素ガス（ＨＣｌ）といったハロゲン系のガスを添加して、絶縁膜上に堆積したゲルマニウム層自体のエッチングを行う。その反応の例を挙げると式（３）～（５）に示すように、
Ｇｅ ＋ ２Ｃｌ２ → ＧｅＣｌ４↑ （３）
Ｇｅ ＋ ２ＨＣｌ → ＧｅＣｌ２↑ ＋ Ｈ２ （４）
Ｇｅ ＋ ２ＨＣｌ → ＧｅＨ２Ｃｌ２↑ （５）
といったものや、そのほかゲルマニウムの塩化物や水素化物が生成されるエッチング反応がある。 Also, depending on the growth conditions, the deposition of the germanium layer on the silicon oxide film exceeds the above reduction reaction, or when the silicon nitride film is used as the buried insulatingfilm 102 and the above reduction reaction cannot be used. In addition, a halogen-based gas such as chlorine gas (Cl) or hydrogen chloride gas (HCl) is added to etch the germanium layer itself deposited on the insulating film. Examples of the reaction are as shown in formulas (3) to (5):
Ge + 2Cl 2 → GeCl 4 ↑ (3)
Ge + 2HCl → GeCl 2 ↑ + H 2 (4)
Ge + 2HCl → GeH 2 Cl 2 ↑ (5)
In addition, there is an etching reaction that produces germanium chloride and hydride.
Ｇｅ ＋ ２Ｃｌ２ → ＧｅＣｌ４↑ （３）
Ｇｅ ＋ ２ＨＣｌ → ＧｅＣｌ２↑ ＋ Ｈ２ （４）
Ｇｅ ＋ ２ＨＣｌ → ＧｅＨ２Ｃｌ２↑ （５）
といったものや、そのほかゲルマニウムの塩化物や水素化物が生成されるエッチング反応がある。 Also, depending on the growth conditions, the deposition of the germanium layer on the silicon oxide film exceeds the above reduction reaction, or when the silicon nitride film is used as the buried insulating
Ge + 2Cl 2 → GeCl 4 ↑ (3)
Ge + 2HCl → GeCl 2 ↑ + H 2 (4)
Ge + 2HCl → GeH 2 Cl 2 ↑ (5)
In addition, there is an etching reaction that produces germanium chloride and hydride.
ゲルマニウム層の成長速度は埋め込み絶縁膜１０２の上よりも単結晶シリコン層１０３や単結晶ゲルマニウム層１０４の上の方が大きいため、上記のエッチング反応の導入により、絶縁膜上ではゲルマニウム層が堆積せず、且つ単結晶シリコン層若しくは単結晶ゲルマニウム層上では単結晶ゲルマニウム層が成長する条件とすることにより、単結晶シリコン層１０３の核と接している領域のみに単結晶ゲルマニウム層１０４が選択的に成長する（図２Ｂの上図）。絶縁膜としてシリコン酸化膜やシリコン窒化膜以外の絶縁材料を用いたときでも、このエッチング反応を利用した選択エピタキシャル成長が可能であることは言うまでもない。
Since the growth rate of the germanium layer is higher on the single crystal silicon layer 103 and the single crystal germanium layer 104 than on the buried insulating film 102, the germanium layer is deposited on the insulating film by introducing the etching reaction described above. In addition, the single crystal germanium layer 104 is selectively formed only in a region in contact with the nucleus of the single crystal silicon layer 103 by setting the single crystal germanium layer to grow on the single crystal silicon layer or the single crystal germanium layer. Grows (upper view in FIG. 2B). It goes without saying that selective epitaxial growth utilizing this etching reaction is possible even when an insulating material other than a silicon oxide film or a silicon nitride film is used as the insulating film.
選択成長を行うと、表面や絶縁膜との接点において特定の結晶面からなるファセットが発生する。これは表面に露出しているゲルマニウム原子の配列によって、原料ガスの成長面での結合のしやすさが異なるため、規則的に並んだ結晶面での成長速度が相対的に遅くなる状況になるとその面が発現する現象である。原料ガスの圧力や成長速度によって状況が変化するため、図２Ｂの上図には代表的な結晶面として（１００）（３１１）からなるファセットを示しているが、その他に発現しやすい結晶面としては（１１１）が挙げられる。後の工程で単結晶ゲルマニウム層１０４をドライエッチングによって加工するため、基板と平行な方向で埋め込み絶縁膜１０２と接している領域では、できるだけファセットを発生させないことが望ましい。その結果、埋め込み絶縁膜１０２と接している水平方向の距離が５００ｎｍ以上あれば好適である。
（ｂ７）ｐ型ドーピング
次いで、引き出し電極の電極部を構成するｐ型単結晶ゲルマニウム層１０５の選択成長を行う（図２Ｂ）。選択成長に関してはｎ型単結晶ゲルマニウム層１０４と同様である。ｐ型のドーピングを行うため、ゲルマニウムの原料ガスに加えてｐ型ドーピングガスを同時に添加すればよい。ｐ型ドーピングガスとしては、３族元素と水素、塩素、フッ素などからなる化合物を用いることができ、例えば、ジボラン（Ｂ２Ｈ６）が挙げられる。ドーピング濃度は、ドーピングガスの流量によって制御できる。ｐ型ドーパントの濃度は、接触抵抗が大きくならないように１×１０１８ｃｍ－３以上であればよく、高濃度同士のｐｎ接合によるトンネル電流の発生を抑制するために１×１０２０ｃｍ－３以下であれば好適である。ｎ型単結晶ゲルマニウム層１０４の選択エピタキシャル成長完了後、ｎ型のドーピングガスからｐ型のドーピングガスに切り替えてｐ型単結晶ゲルマニウム層１０５を連続的に選択エピタキシャル成長すると、ｐｎ接合界面が同じゲルマニウムの材料であるために格子ミスマッチによる界面での欠陥が発生しない上、成長を中断しないために酸素等の汚染による界面準位の発生を防ぐことができる。
（ｃ）ｐ型シリコン層と絶縁膜の堆積
続いて、後にｐ型引き出し電極（電極部と配線部とを有する）となるｐ型シリコン層１０６の堆積を行う（図２Ｃの上図）。引き出し電極とするためには、ｐ型単結晶ゲルマニウム層１０５の表面に加え、埋め込み絶縁膜１０２の表面にも堆積する必要がある。引き出し電極（特に、電極部）は、ｐ型多結晶シリコン層でも良いが、抵抗が小さいｐ型単結晶シリコン層であれば好適である。シリコンの原料ガスとしては、シリコンと水素、塩素、フッ素などからなる化合物を用いることができる。例えば、モノシラン（ＳｉＨ４）、ジシラン（Ｓｉ２Ｈ６）、ジクロルシラン（ＳｉＨ２Ｃｌ２）、三塩化シリコン（ＳｉＨＣｌ３）、四塩化シリコン（ＳｉＣｌ４）などが挙げられる。キャリアガスとしては、多結晶シリコン層の形成の場合には窒素を用い、単結晶シリコン層の形成の場合には水素を用いることが多い。単結晶シリコン層の形成の場合、ｐ型単結晶ゲルマニウム層１０５の表面では単結晶シリコン層が成長する（引き出し電極の電極部）が、埋め込み絶縁膜１０２の上ではアモルファスシリコン層や多結晶シリコン層が堆積する（引き出し電極の配線部）。単結晶ゲルマニウム層の上の単結晶シリコン層や絶縁膜上に堆積したアモルファスシリコン層の抵抗が高い場合、高温のアニールによって結晶性を向上させることで抵抗を下げることができる。ｎ型単結晶ゲルマニウム層の中のｐ型ドーパントの拡散を抑えるため、短時間での瞬間アニールが適しており、例えば８５０℃であれば、５秒程度アニールする。 When selective growth is performed, facets composed of specific crystal planes are generated at the contact points with the surface and the insulating film. This is because the ease of bonding on the growth surface of the source gas differs depending on the arrangement of germanium atoms exposed on the surface, so the growth rate on the regularly aligned crystal planes becomes relatively slow. This is a phenomenon that manifests itself. Since the situation changes depending on the pressure and growth rate of the source gas, the upper face of FIG. 2B shows the facets composed of (100) and (311) as representative crystal faces. (111) is mentioned. Since the singlecrystal germanium layer 104 is processed by dry etching in a later process, it is desirable that facets are not generated as much as possible in a region in contact with the buried insulating film 102 in a direction parallel to the substrate. As a result, the distance in the horizontal direction in contact with the buried insulating film 102 is preferably 500 nm or more.
(B7) p-type doping Next, selective growth of the p-type singlecrystal germanium layer 105 constituting the electrode portion of the extraction electrode is performed (FIG. 2B). The selective growth is the same as that of the n-type single crystal germanium layer 104. In order to perform p-type doping, a p-type doping gas may be added simultaneously in addition to the germanium source gas. As the p-type doping gas, a compound composed of a Group 3 element and hydrogen, chlorine, fluorine, or the like can be used, and examples thereof include diborane (B 2 H 6 ). The doping concentration can be controlled by the flow rate of the doping gas. The concentration of the p-type dopant may be 1 × 10 18 cm −3 or more so that the contact resistance does not increase, and 1 × 10 20 cm −3 in order to suppress generation of a tunnel current due to a high concentration of pn junctions. The following is preferable. After the selective epitaxial growth of the n-type single crystal germanium layer 104 is completed, the p-type single crystal germanium layer 105 is continuously selectively epitaxially grown by switching from the n-type doping gas to the p-type doping gas. Therefore, defects at the interface due to lattice mismatch do not occur, and since growth is not interrupted, generation of interface states due to contamination with oxygen or the like can be prevented.
(C) Deposition of p-type silicon layer and insulating film Subsequently, a p-type silicon layer 106 to be a p-type lead electrode (having an electrode portion and a wiring portion) is deposited (upper view in FIG. 2C). In order to form an extraction electrode, it is necessary to deposit on the surface of the buried insulating film 102 in addition to the surface of the p-type single crystal germanium layer 105. The extraction electrode (particularly the electrode portion) may be a p-type polycrystalline silicon layer, but is preferably a p-type single crystal silicon layer having a low resistance. As the silicon source gas, a compound composed of silicon and hydrogen, chlorine, fluorine, or the like can be used. For example, monosilane (SiH 4 ), disilane (Si 2 H 6 ), dichlorosilane (SiH 2 Cl 2 ), silicon trichloride (SiHCl 3 ), silicon tetrachloride (SiCl 4 ), and the like can be given. As the carrier gas, nitrogen is often used in the case of forming a polycrystalline silicon layer, and hydrogen is often used in the case of forming a single crystal silicon layer. In the case of forming a single crystal silicon layer, a single crystal silicon layer grows on the surface of the p-type single crystal germanium layer 105 (electrode portion of the extraction electrode), but an amorphous silicon layer or a polycrystalline silicon layer is formed on the buried insulating film 102. Is deposited (wiring portion of the extraction electrode). When the single crystal silicon layer over the single crystal germanium layer or the amorphous silicon layer deposited on the insulating film has high resistance, the resistance can be lowered by improving crystallinity by high-temperature annealing. In order to suppress the diffusion of the p-type dopant in the n-type single crystal germanium layer, instantaneous annealing in a short time is suitable. For example, at 850 ° C., annealing is performed for about 5 seconds.
（ｂ７）ｐ型ドーピング
次いで、引き出し電極の電極部を構成するｐ型単結晶ゲルマニウム層１０５の選択成長を行う（図２Ｂ）。選択成長に関してはｎ型単結晶ゲルマニウム層１０４と同様である。ｐ型のドーピングを行うため、ゲルマニウムの原料ガスに加えてｐ型ドーピングガスを同時に添加すればよい。ｐ型ドーピングガスとしては、３族元素と水素、塩素、フッ素などからなる化合物を用いることができ、例えば、ジボラン（Ｂ２Ｈ６）が挙げられる。ドーピング濃度は、ドーピングガスの流量によって制御できる。ｐ型ドーパントの濃度は、接触抵抗が大きくならないように１×１０１８ｃｍ－３以上であればよく、高濃度同士のｐｎ接合によるトンネル電流の発生を抑制するために１×１０２０ｃｍ－３以下であれば好適である。ｎ型単結晶ゲルマニウム層１０４の選択エピタキシャル成長完了後、ｎ型のドーピングガスからｐ型のドーピングガスに切り替えてｐ型単結晶ゲルマニウム層１０５を連続的に選択エピタキシャル成長すると、ｐｎ接合界面が同じゲルマニウムの材料であるために格子ミスマッチによる界面での欠陥が発生しない上、成長を中断しないために酸素等の汚染による界面準位の発生を防ぐことができる。
（ｃ）ｐ型シリコン層と絶縁膜の堆積
続いて、後にｐ型引き出し電極（電極部と配線部とを有する）となるｐ型シリコン層１０６の堆積を行う（図２Ｃの上図）。引き出し電極とするためには、ｐ型単結晶ゲルマニウム層１０５の表面に加え、埋め込み絶縁膜１０２の表面にも堆積する必要がある。引き出し電極（特に、電極部）は、ｐ型多結晶シリコン層でも良いが、抵抗が小さいｐ型単結晶シリコン層であれば好適である。シリコンの原料ガスとしては、シリコンと水素、塩素、フッ素などからなる化合物を用いることができる。例えば、モノシラン（ＳｉＨ４）、ジシラン（Ｓｉ２Ｈ６）、ジクロルシラン（ＳｉＨ２Ｃｌ２）、三塩化シリコン（ＳｉＨＣｌ３）、四塩化シリコン（ＳｉＣｌ４）などが挙げられる。キャリアガスとしては、多結晶シリコン層の形成の場合には窒素を用い、単結晶シリコン層の形成の場合には水素を用いることが多い。単結晶シリコン層の形成の場合、ｐ型単結晶ゲルマニウム層１０５の表面では単結晶シリコン層が成長する（引き出し電極の電極部）が、埋め込み絶縁膜１０２の上ではアモルファスシリコン層や多結晶シリコン層が堆積する（引き出し電極の配線部）。単結晶ゲルマニウム層の上の単結晶シリコン層や絶縁膜上に堆積したアモルファスシリコン層の抵抗が高い場合、高温のアニールによって結晶性を向上させることで抵抗を下げることができる。ｎ型単結晶ゲルマニウム層の中のｐ型ドーパントの拡散を抑えるため、短時間での瞬間アニールが適しており、例えば８５０℃であれば、５秒程度アニールする。 When selective growth is performed, facets composed of specific crystal planes are generated at the contact points with the surface and the insulating film. This is because the ease of bonding on the growth surface of the source gas differs depending on the arrangement of germanium atoms exposed on the surface, so the growth rate on the regularly aligned crystal planes becomes relatively slow. This is a phenomenon that manifests itself. Since the situation changes depending on the pressure and growth rate of the source gas, the upper face of FIG. 2B shows the facets composed of (100) and (311) as representative crystal faces. (111) is mentioned. Since the single
(B7) p-type doping Next, selective growth of the p-type single
(C) Deposition of p-type silicon layer and insulating film Subsequently, a p-
次に、後に発光領域を形成するための研磨を行うために、ｐ型単結晶ゲルマニウム層１０５と埋め込み絶縁膜１０２の表面全体に絶縁膜１０７を堆積する（図２Ｃ）。この絶縁膜を用いて研磨を停止させるため、発光領域となる単結晶ゲルマニウム層１０４の最終的な仕上げ膜厚に応じて堆積する膜厚を調整する。例えば、１μｍの厚さの発光層を形成したければ、ｐ型シリコン層１０６と絶縁膜１０７の膜厚の合計が１μｍとなるようにする。
（ｄ）化学的機械研磨
次いで、化学的機械研磨（ＣＭＰ）によって単結晶ゲルマニウム層の表面を除去する（図２Ｄ）。シリコン基板１０１をキャリアで保持し、各種化学成分と硬質の砥粒を含んだスラリーを供給しながら研磨を行うことで、表面の平坦化を行う。シリコン層やゲルマニウム層が研磨されやすい条件で研磨を続けると、表面積の広いエリアを占めている絶縁膜１０７の表面の位置で研磨が止まるため、最終的に絶縁膜１０７の表面とほぼ同じ高さまで、ｐ型シリコン層１０６、ｐ型単結晶ゲルマニウム層１０５、およびｎ型単結晶ゲルマニウム層１０４が研磨される。なお、ＣＭＰに先立ち、機械研磨を行い、ｎ型単結晶ゲルマニウム層１０４の上部に形成されている絶縁膜１０７を除去してもよい。ＣＭＰと異なり、機械研磨によりｎ型単結晶ゲルマニウム層１０４の上部に形成されている絶縁膜１０７を容易に除去することができる。
（ｅ）伸張歪の印加
単結晶シリコン層１０３の上にｎ型単結晶ゲルマニウム層１０４を成長すると、単結晶シリコン層１０３の原子配列に対して揃おうとして成長する結果、シリコンよりも格子定数の大きなゲルマニウムは単結晶シリコン層１０３と接している方向で圧縮歪を受けて成長する。しかし、ゲルマニウム層のエピタキシャル成長後にアニールを行うことで、ｎ型単結晶ゲルマニウム層１０４の結晶性を向上すると共に伸張歪をさらに増大させることができる。例えば、ｎ型単結晶ゲルマニウム層１０４の成長の後に高温アニールを行うと、アニール温度に応じてシリコン基板１０１、埋め込み絶縁膜１０２、単結晶シリコン層１０３、ｎ型単結晶ゲルマニウム層１０４の全てが膨張する。膨張する度合いは各材料によって決まっており、その指標となる熱膨張係数が調べられている。ゲルマニウムの熱膨張係数は約６．１×１０－６／℃であり、シリコンの２．６×１０－６／℃、シリコン酸化膜の０．５×１０－６／℃と比較して大きな値となっているため、アニール中に同じ温度になっていれば、ゲルマニウムの方がより体積膨張が大きくなる。この高温状態でゲルマニウム層の歪が緩和すると、アニール終了後に冷却する過程においてシリコン層１０３や埋め込み絶縁膜１０２はあまり縮まないのに対して、ｎ型単結晶ゲルマニウム層１０４は大きく縮もうとするため、単結晶シリコン層１０３や埋め込み絶縁膜１０２と接した部分でそれ以上縮むことができずに伸張歪が残存する。従って、アニールによってｎ型単結晶ゲルマニウム層１０４に伸張歪を印加することができ、さらなる発光強度の向上が可能となる。例えば、水素雰囲気中において８５０℃でアニールを行った場合、ｎ型単結晶ゲルマニウム層の＜１００＞方向の伸張歪は約０．２％であった。引き続きｐ型単結晶ゲルマニウム層１０５の成長を行う場合、成長表面の格子間隔に揃うように成長が進行するため、一度印加された伸張歪がそのまま保持された状態で単結晶ゲルマニウム層１０５の横方向成長を継続することができる。 Next, an insulatingfilm 107 is deposited on the entire surface of the p-type single crystal germanium layer 105 and the buried insulating film 102 in order to perform polishing for forming a light emitting region later (FIG. 2C). In order to stop the polishing using this insulating film, the film thickness to be deposited is adjusted according to the final finished film thickness of the single crystal germanium layer 104 to be the light emitting region. For example, if a light emitting layer having a thickness of 1 μm is to be formed, the total thickness of the p-type silicon layer 106 and the insulating film 107 is set to 1 μm.
(D) Chemical mechanical polishing Next, the surface of the single crystal germanium layer is removed by chemical mechanical polishing (CMP) (FIG. 2D). The surface of thesilicon substrate 101 is flattened by holding the silicon substrate 101 with a carrier and performing polishing while supplying slurry containing various chemical components and hard abrasive grains. If polishing is continued under conditions where the silicon layer or germanium layer is easily polished, the polishing stops at the position of the surface of the insulating film 107 occupying an area with a large surface area. The p-type silicon layer 106, the p-type single crystal germanium layer 105, and the n-type single crystal germanium layer 104 are polished. Note that mechanical polishing may be performed prior to CMP to remove the insulating film 107 formed over the n-type single crystal germanium layer 104. Unlike CMP, the insulating film 107 formed on the n-type single crystal germanium layer 104 can be easily removed by mechanical polishing.
(E) Application of extension strain When the n-type singlecrystal germanium layer 104 is grown on the single crystal silicon layer 103, the n-type single crystal germanium layer 104 grows so as to align with the atomic arrangement of the single crystal silicon layer 103. Large germanium grows under compressive strain in a direction in contact with the single crystal silicon layer 103. However, by performing annealing after the epitaxial growth of the germanium layer, the crystallinity of the n-type single crystal germanium layer 104 can be improved and the tensile strain can be further increased. For example, when high-temperature annealing is performed after the growth of the n-type single crystal germanium layer 104, the silicon substrate 101, the buried insulating film 102, the single crystal silicon layer 103, and the n-type single crystal germanium layer 104 all expand according to the annealing temperature. To do. The degree of expansion is determined by each material, and the thermal expansion coefficient that serves as an index is examined. The thermal expansion coefficient of germanium is about 6.1 × 10 −6 / ° C., which is a large value compared to 2.6 × 10 −6 / ° C. of silicon and 0.5 × 10 −6 / ° C. of silicon oxide film. Therefore, if the temperature is the same during annealing, germanium has a larger volume expansion. When the strain of the germanium layer is relaxed at this high temperature state, the silicon layer 103 and the buried insulating film 102 do not shrink so much during the cooling process after the annealing, whereas the n-type single crystal germanium layer 104 tends to shrink greatly. Further, at the portion in contact with the single crystal silicon layer 103 or the buried insulating film 102, it cannot be further contracted and the extension strain remains. Therefore, an elongation strain can be applied to the n-type single crystal germanium layer 104 by annealing, and the emission intensity can be further improved. For example, when annealing was performed at 850 ° C. in a hydrogen atmosphere, the elongation strain in the <100> direction of the n-type single crystal germanium layer was about 0.2%. When the p-type single crystal germanium layer 105 is subsequently grown, the growth proceeds so as to be aligned with the lattice spacing of the growth surface. Therefore, the lateral direction of the single crystal germanium layer 105 is maintained with the tensile strain applied once maintained as it is. You can continue to grow.
（ｄ）化学的機械研磨
次いで、化学的機械研磨（ＣＭＰ）によって単結晶ゲルマニウム層の表面を除去する（図２Ｄ）。シリコン基板１０１をキャリアで保持し、各種化学成分と硬質の砥粒を含んだスラリーを供給しながら研磨を行うことで、表面の平坦化を行う。シリコン層やゲルマニウム層が研磨されやすい条件で研磨を続けると、表面積の広いエリアを占めている絶縁膜１０７の表面の位置で研磨が止まるため、最終的に絶縁膜１０７の表面とほぼ同じ高さまで、ｐ型シリコン層１０６、ｐ型単結晶ゲルマニウム層１０５、およびｎ型単結晶ゲルマニウム層１０４が研磨される。なお、ＣＭＰに先立ち、機械研磨を行い、ｎ型単結晶ゲルマニウム層１０４の上部に形成されている絶縁膜１０７を除去してもよい。ＣＭＰと異なり、機械研磨によりｎ型単結晶ゲルマニウム層１０４の上部に形成されている絶縁膜１０７を容易に除去することができる。
（ｅ）伸張歪の印加
単結晶シリコン層１０３の上にｎ型単結晶ゲルマニウム層１０４を成長すると、単結晶シリコン層１０３の原子配列に対して揃おうとして成長する結果、シリコンよりも格子定数の大きなゲルマニウムは単結晶シリコン層１０３と接している方向で圧縮歪を受けて成長する。しかし、ゲルマニウム層のエピタキシャル成長後にアニールを行うことで、ｎ型単結晶ゲルマニウム層１０４の結晶性を向上すると共に伸張歪をさらに増大させることができる。例えば、ｎ型単結晶ゲルマニウム層１０４の成長の後に高温アニールを行うと、アニール温度に応じてシリコン基板１０１、埋め込み絶縁膜１０２、単結晶シリコン層１０３、ｎ型単結晶ゲルマニウム層１０４の全てが膨張する。膨張する度合いは各材料によって決まっており、その指標となる熱膨張係数が調べられている。ゲルマニウムの熱膨張係数は約６．１×１０－６／℃であり、シリコンの２．６×１０－６／℃、シリコン酸化膜の０．５×１０－６／℃と比較して大きな値となっているため、アニール中に同じ温度になっていれば、ゲルマニウムの方がより体積膨張が大きくなる。この高温状態でゲルマニウム層の歪が緩和すると、アニール終了後に冷却する過程においてシリコン層１０３や埋め込み絶縁膜１０２はあまり縮まないのに対して、ｎ型単結晶ゲルマニウム層１０４は大きく縮もうとするため、単結晶シリコン層１０３や埋め込み絶縁膜１０２と接した部分でそれ以上縮むことができずに伸張歪が残存する。従って、アニールによってｎ型単結晶ゲルマニウム層１０４に伸張歪を印加することができ、さらなる発光強度の向上が可能となる。例えば、水素雰囲気中において８５０℃でアニールを行った場合、ｎ型単結晶ゲルマニウム層の＜１００＞方向の伸張歪は約０．２％であった。引き続きｐ型単結晶ゲルマニウム層１０５の成長を行う場合、成長表面の格子間隔に揃うように成長が進行するため、一度印加された伸張歪がそのまま保持された状態で単結晶ゲルマニウム層１０５の横方向成長を継続することができる。 Next, an insulating
(D) Chemical mechanical polishing Next, the surface of the single crystal germanium layer is removed by chemical mechanical polishing (CMP) (FIG. 2D). The surface of the
(E) Application of extension strain When the n-type single
さらに、歪印加層１０９を堆積することで、発光領域となるｎ型単結晶ゲルマニウム層１０４の伸張歪を増大させることができる（図２Ｅ）。歪印加層１０９としては組成や堆積条件を調整したシリコン窒化膜を用いれば好適である。シリコン窒化膜は、膜中に含まれるシリコンと窒素の組成比や水素の量によって膜を堆積した状態で歪んだ状態を作り出すことができ、成長条件によって圧縮歪になる場合と、伸張歪になる場合がある。本実施例でシリコン窒化膜を歪印加層１０９として用いる場合、圧縮歪と伸張歪のどちらでも良い。シリコン窒化膜が圧縮歪を持っている場合、シリコン窒化膜と接している領域を圧縮する力が働く。その結果、ｎ型単結晶ゲルマニウム層１０４の上面に周辺領域を圧縮する力が働き、ｎ型単結晶ゲルマニウム層１０４の上面に絶縁膜がある領域を引っ張ろうとする力が働く。従って、シリコン窒化膜をｎ型単結晶ゲルマニウム層１０４の上部のみに残すように周辺部分をエッチング除去すると、シリコン窒化膜の直下が伸張歪を受ける。一方、シリコン窒化膜が伸張歪を持っている場合、シリコン窒化膜と接している領域を引っ張ろうとする力が働く。その結果、ｎ型単結晶ゲルマニウム層１０４の周辺の領域を伸張する力が働き、ｎ型単結晶ゲルマニウム層１０４の上面に絶縁膜がある領域を圧縮する力が働くため、ｎ型単結晶ゲルマニウム層１０４のシリコン窒化膜の直下における領域は圧縮方向に変形を受けるが、その周辺領域は反対に伸張歪を受ける。従って、シリコン窒化膜の歪の方向によって、ｎ型単結晶ゲルマニウム層１０４の中で伸張歪を受ける領域は変化するが、必ず伸張歪を受ける領域が生じる。
（ｆ）欠陥含有領域の除去
先述したように、シリコン層とゲルマニウム層の界面では格子ミスマッチによる欠陥が多数存在するため、この界面でキャリアが再結合することで発光特性が大きく劣化する。そのため、シリコン層とゲルマニウム層の界面を含んだ欠陥含有領域をエッチング除去する。フォトリソグラフィーによるマスク形成とエッチングにより、単結晶シリコン層１０３とその周辺に存在するｎ型単結晶ゲルマニウム層１０４を除去する。同時に、後に電極を形成する際、導波路の両側に電極を配置する必要があるため、単結晶シリコン層１０３を中心に左右に向かって成長したｎ型単結晶ゲルマニウム層１０４の片側（ここでは、図２Ｅの上図の左側）もすべて除去し、帯状のｎ型単結晶ゲルマニウム層の幅を当初の１／２未満とする（図２Ｅ）。
（ｇ）電極の形成
欠陥含有領域の除去により、ｎ型単結晶ゲルマニウム層１０４の側壁が露出した状態で電極部と配線部とを有するｎ型引き出し電極１１０を形成する。ｎ型引き出し電極としてはｎ型の高濃度ドーピングを行った多結晶シリコン層や、多結晶シリコン層と金属層の積層構造や金属層のみによる電極でも良い。ゲルマニウム層１０４に金属電極を直接形成する場合、例えば、ニッケル等の電極材料を堆積し、アニールを行うことで金属とゲルマニウムの合金であるジャーマナイドを形成し、接触抵抗の少ない電極１１０を形成することができる。また、ｎ型引き出し電極の配線部およびｐ型引き出し電極の配線部については、金属層（ｎ型電極）１１３と高濃度ｎ型シリコン層１１０及び金属層（ｐ型電極）１１２と高濃度ｐ型シリコン層１０６を反応させて、シリサイドを形成することで金属層１１３と高濃度ｎ型シリコン層１１０及びと金属層１１２と高濃度ｐ型シリコン層１０６の接触抵抗をそれぞれ低減することができる。 Furthermore, by depositing thestrain applying layer 109, the extension strain of the n-type single crystal germanium layer 104 serving as a light emitting region can be increased (FIG. 2E). As the strain applying layer 109, it is preferable to use a silicon nitride film whose composition and deposition conditions are adjusted. The silicon nitride film can create a distorted state when the film is deposited depending on the composition ratio of silicon and nitrogen contained in the film and the amount of hydrogen. There is a case. When a silicon nitride film is used as the strain applying layer 109 in this embodiment, either a compressive strain or an extension strain may be used. When the silicon nitride film has a compressive strain, a force that compresses a region in contact with the silicon nitride film works. As a result, a force that compresses the peripheral region acts on the upper surface of the n-type single crystal germanium layer 104, and a force that pulls a region where the insulating film is present on the upper surface of the n-type single crystal germanium layer 104 acts. Therefore, if the peripheral portion is etched away so that the silicon nitride film remains only on the upper portion of the n-type single crystal germanium layer 104, the strain immediately below the silicon nitride film is subjected to stretching strain. On the other hand, when the silicon nitride film has a tensile strain, a force that pulls the region in contact with the silicon nitride film works. As a result, the force that stretches the peripheral region of the n-type single crystal germanium layer 104 works, and the force that compresses the region that has the insulating film on the upper surface of the n-type single crystal germanium layer 104 works. The region immediately below the silicon nitride film 104 is deformed in the compression direction, but its peripheral region is oppositely stretched. Therefore, the region that receives the tensile strain in the n-type single crystal germanium layer 104 varies depending on the strain direction of the silicon nitride film, but a region that receives the tensile strain always occurs.
(F) Removal of defect-containing region As described above, since there are a large number of defects due to lattice mismatch at the interface between the silicon layer and the germanium layer, the light emission characteristics are greatly degraded by recombination of carriers at this interface. Therefore, the defect-containing region including the interface between the silicon layer and the germanium layer is removed by etching. The singlecrystal silicon layer 103 and the n-type single crystal germanium layer 104 existing in the periphery thereof are removed by mask formation and etching by photolithography. At the same time, when forming the electrode later, it is necessary to dispose the electrode on both sides of the waveguide. Therefore, one side of the n-type single crystal germanium layer 104 grown right and left around the single crystal silicon layer 103 (here, All of the left side of the upper diagram in FIG. 2E is also removed, and the width of the band-shaped n-type single crystal germanium layer is made less than the original width (FIG. 2E).
(G) Formation of electrode By removing the defect-containing region, an n-type lead electrode 110 having an electrode portion and a wiring portion is formed with the side wall of the n-type single crystal germanium layer 104 exposed. The n-type lead electrode may be an n-type heavily doped polycrystalline silicon layer, a laminated structure of a polycrystalline silicon layer and a metal layer, or an electrode composed of only a metal layer. When a metal electrode is directly formed on the germanium layer 104, for example, an electrode material such as nickel is deposited and annealed to form a germanide that is an alloy of metal and germanium, thereby forming an electrode 110 with low contact resistance. Can do. Further, for the wiring portion of the n-type lead electrode and the wiring portion of the p-type lead electrode, the metal layer (n-type electrode) 113, the high-concentration n-type silicon layer 110, the metal layer (p-type electrode) 112, and the high-concentration p-type are used. By reacting the silicon layer 106 to form silicide, the contact resistance of the metal layer 113, the high-concentration n-type silicon layer 110, the metal layer 112, and the high-concentration p-type silicon layer 106 can be reduced.
（ｆ）欠陥含有領域の除去
先述したように、シリコン層とゲルマニウム層の界面では格子ミスマッチによる欠陥が多数存在するため、この界面でキャリアが再結合することで発光特性が大きく劣化する。そのため、シリコン層とゲルマニウム層の界面を含んだ欠陥含有領域をエッチング除去する。フォトリソグラフィーによるマスク形成とエッチングにより、単結晶シリコン層１０３とその周辺に存在するｎ型単結晶ゲルマニウム層１０４を除去する。同時に、後に電極を形成する際、導波路の両側に電極を配置する必要があるため、単結晶シリコン層１０３を中心に左右に向かって成長したｎ型単結晶ゲルマニウム層１０４の片側（ここでは、図２Ｅの上図の左側）もすべて除去し、帯状のｎ型単結晶ゲルマニウム層の幅を当初の１／２未満とする（図２Ｅ）。
（ｇ）電極の形成
欠陥含有領域の除去により、ｎ型単結晶ゲルマニウム層１０４の側壁が露出した状態で電極部と配線部とを有するｎ型引き出し電極１１０を形成する。ｎ型引き出し電極としてはｎ型の高濃度ドーピングを行った多結晶シリコン層や、多結晶シリコン層と金属層の積層構造や金属層のみによる電極でも良い。ゲルマニウム層１０４に金属電極を直接形成する場合、例えば、ニッケル等の電極材料を堆積し、アニールを行うことで金属とゲルマニウムの合金であるジャーマナイドを形成し、接触抵抗の少ない電極１１０を形成することができる。また、ｎ型引き出し電極の配線部およびｐ型引き出し電極の配線部については、金属層（ｎ型電極）１１３と高濃度ｎ型シリコン層１１０及び金属層（ｐ型電極）１１２と高濃度ｐ型シリコン層１０６を反応させて、シリサイドを形成することで金属層１１３と高濃度ｎ型シリコン層１１０及びと金属層１１２と高濃度ｐ型シリコン層１０６の接触抵抗をそれぞれ低減することができる。 Furthermore, by depositing the
(F) Removal of defect-containing region As described above, since there are a large number of defects due to lattice mismatch at the interface between the silicon layer and the germanium layer, the light emission characteristics are greatly degraded by recombination of carriers at this interface. Therefore, the defect-containing region including the interface between the silicon layer and the germanium layer is removed by etching. The single
(G) Formation of electrode By removing the defect-containing region, an n-
以上により、図１に示したゲルマニウム・レーザ・ダイオードを得ることができる。ここで、符号１１１は絶縁膜である。すなわち、埋め込み絶縁膜１０２の上に、伸張歪を有するｎ型単結晶ゲルマニウム層１０４とその側壁に接してｐ型単結晶ゲルマニウム層１０５とｐ型シリコン層１０６が形成された、ゲルマニウム・レーザ・ダイオードを構成している。なお、本ゲルマニウム・レーザ・ダイオードにおいて、ｐ型単結晶ゲルマニウム層１０５は必須ではなく、図２Ｆに示すように、ｎ型単結晶ゲルマニウム層１０４の側壁に直接ｐ型シリコン層１０６を配置することもできる。但し、ｎ型単結晶ゲルマニウム層１０４と引き出し電極１０６の電極部との界面付近での結晶性を考慮すると、引き出し電極１０６の電極部の一部としてｐ型単結晶ゲルマニウム層１０６を配置すること、即ち、電極部をｐ型単結晶ゲルマニウムとｐ型シリコン層との積層構造にすることが望ましい。
Thus, the germanium laser diode shown in FIG. 1 can be obtained. Here, reference numeral 111 denotes an insulating film. That is, a germanium laser diode in which an n-type single crystal germanium layer 104 having a tensile strain and a p-type single crystal germanium layer 105 and a p-type silicon layer 106 are formed on the buried insulating film 102 in contact with the sidewall thereof. Is configured. In this germanium laser diode, the p-type single crystal germanium layer 105 is not essential, and the p-type silicon layer 106 may be disposed directly on the sidewall of the n-type single crystal germanium layer 104 as shown in FIG. 2F. it can. However, considering the crystallinity near the interface between the n-type single crystal germanium layer 104 and the electrode portion of the extraction electrode 106, the p-type single crystal germanium layer 106 is disposed as a part of the electrode portion of the extraction electrode 106. That is, it is desirable that the electrode portion has a laminated structure of p-type single crystal germanium and a p-type silicon layer.
以上、本実施例によれば、シリコン酸化膜上に形成したゲルマニウム光素子であっても、キャリア密度が高くキャリア分布の均一性が良好なレーザ・ダイオードを含む半導体光素子やその製造方法を提供することができる。特に、電極を自己整合的に形成できることから、フォトリソグラフィーのマスク合わせに必要な領域を削減することが可能となり、注入した電流値に対するキャリア密度を従来よりも大幅に高くできることから、発光強度を著しく向上することができる。また、シリコン酸化膜上に、伸張歪を有する単結晶ゲルマニウム層を形成することが可能となることから、結晶性の良い単結晶ゲルマニウム層を用いたゲルマニウム・レーザ・ダイオードにおいて、従来の結晶欠陥に依るキャリアの非発光再結合やリーク電流を大幅に低減することができる。
As described above, according to the present embodiment, a semiconductor optical device including a laser diode having a high carrier density and good carrier distribution uniformity and a manufacturing method thereof are provided even for a germanium optical device formed on a silicon oxide film. can do. In particular, since the electrodes can be formed in a self-aligned manner, it is possible to reduce the area necessary for mask alignment in photolithography, and the carrier density with respect to the injected current value can be significantly higher than before, so that the emission intensity is remarkably increased. Can be improved. In addition, since it becomes possible to form a single crystal germanium layer having a tensile strain on a silicon oxide film, in a germanium laser diode using a single crystal germanium layer having good crystallinity, a conventional crystal defect is eliminated. Therefore, non-radiative recombination of carriers and leakage current can be greatly reduced.
第２の実施例について図３Ａ、図３Ｂを用いて説明する。なお、実施例１に記載され本実施例に未記載の事項は特段の事情がない限り本実施例にも適用することができる。
A second embodiment will be described with reference to FIGS. 3A and 3B. Note that the matters described in the first embodiment and not described in the present embodiment can be applied to the present embodiment as long as there is no special circumstances.
本実施例と実施例１との違いは、本実施例においてはｎ型単結晶ゲルマニウム層１２４を成長する核となる領域がシリコン基板１２１の表面である点にある。シリコン基板１２１の表面に絶縁膜１２２を堆積し、フォトリソグラフィーとエッチングによって、絶縁膜１２２の一部にライン状の開口部１２３を形成する（図３Ａ）。絶縁膜に形成されたライン状の開口部１２３内で露出したシリコン基板１２１の表面の清浄化を行った後、実施例１と同様にライン状の開口部から露出した単結晶シリコン基板の表面を成長核として帯状のｎ型単結晶ゲルマニウム層１２４及びｐ型単結晶ゲルマニウム層１２５を選択成長する（図３Ｂ）。以降、実施例１と同様にｐ型シリコン層１０６と絶縁膜１０７を全面に堆積し、ＣＭＰによって平坦化を行った後に欠陥含有領域を除去し、電極を形成すれば、半導体光素子としては、図１と同様の構造が得られる。
The difference between the present embodiment and the first embodiment is that a region serving as a nucleus for growing the n-type single crystal germanium layer 124 is the surface of the silicon substrate 121 in the present embodiment. An insulating film 122 is deposited on the surface of the silicon substrate 121, and a line-shaped opening 123 is formed in a part of the insulating film 122 by photolithography and etching (FIG. 3A). After the surface of the silicon substrate 121 exposed in the line-shaped opening 123 formed in the insulating film is cleaned, the surface of the single crystal silicon substrate exposed from the line-shaped opening as in the first embodiment is used. A band-shaped n-type single crystal germanium layer 124 and a p-type single crystal germanium layer 125 are selectively grown as growth nuclei (FIG. 3B). Thereafter, a p-type silicon layer 106 and an insulating film 107 are deposited on the entire surface in the same manner as in Example 1, and after planarizing by CMP, the defect-containing region is removed and an electrode is formed. A structure similar to that of FIG. 1 is obtained.
本実施例により、実施例１と同様の効果を得ることができる。また、ｎ型単結晶ゲルマニウム層１２４の選択成長において、基板に対して水平な方向にゲルマニウム層を成長する際、種結晶であるシリコン層とゲルマニウム層の界面が絶縁膜の開口部の内部にあるため、欠陥を多数含有している界面からの転位の伝播が無く、絶縁膜１２２と接して成長している領域の結晶性が更に向上する。また、高価なＳＯＩ基板を用いる必要が無いため、素子のコストを大幅に低減することができる。
This embodiment can provide the same effects as those of the first embodiment. Further, in the selective growth of the n-type single crystal germanium layer 124, when the germanium layer is grown in a direction horizontal to the substrate, the interface between the silicon layer that is the seed crystal and the germanium layer is inside the opening of the insulating film. Therefore, there is no propagation of dislocation from the interface containing many defects, and the crystallinity of the region growing in contact with the insulating film 122 is further improved. In addition, since it is not necessary to use an expensive SOI substrate, the cost of the element can be significantly reduced.
第３の実施例について図４を用いて説明する。なお、実施例１に記載され本実施例に未記載の事項は特段の事情がない限り本実施例にも適用することができる。
A third embodiment will be described with reference to FIG. Note that the matters described in the first embodiment and not described in the present embodiment can be applied to the present embodiment as long as there is no special circumstances.
本実施例では、実施例１のゲルマニウム・レーザ・ダイオードの導波路となる帯状のｎ型単結晶ゲルマニウム層１０４の長手方向の両端に周期構造１６０を形成して端面の反射率を向上したものである。図４は、本実施例に係るゲルマニウム・レーザ・ダイオードの、欠陥含有領域のエッチング後の導波路端部を拡大した上面図を示す。ここで、説明のために表面側に存在する絶縁膜１０７、１０８および歪印加層１０９の記載は省いてある。
In this embodiment, the periodic structure 160 is formed at both ends in the longitudinal direction of the band-shaped n-type single crystal germanium layer 104 which becomes the waveguide of the germanium laser diode of the embodiment 1, and the reflectance of the end face is improved. is there. FIG. 4 is an enlarged top view of the end portion of the waveguide after etching the defect-containing region of the germanium laser diode according to the present embodiment. Here, the description of the insulating films 107 and 108 and the strain applying layer 109 existing on the surface side is omitted for the sake of explanation.
実施例１のｎ型単結晶ゲルマニウム層１０４を導波路の両端のみで周期的に分離することで、分布反射型（Distributed Bragg Reflector：ＤＢＲ）ゲルマニウム・レーザ・ダイオードのミラー構造（ＤＢＲミラー）１６０を形成する。なお、ここでは図示していないが、ゲルマニウム導波路のもう一方の端部にも同様のミラー構造を形成する必要があることは言うまでもない。分離するミラー部分の周期は、ゲルマニウム導波路中の発光波長の１／２の整数倍になるようにする。
By periodically separating the n-type single crystal germanium layer 104 of Example 1 only at both ends of the waveguide, a distributed reflection type (DBR) germanium laser diode mirror structure (DBR mirror) 160 is obtained. Form. Although not shown here, it goes without saying that a similar mirror structure needs to be formed at the other end of the germanium waveguide. The period of the mirror part to be separated is set to be an integral multiple of 1/2 of the emission wavelength in the germanium waveguide.
本実施例により、実施例１と同様の効果を得ることができる。また、ＤＢＲミラーによって９９％以上の高い反射率を実現できることから、ゲルマニウム導波路中の光を効率よく反射させ、効率よくレーザ発振させることができる。
This embodiment can provide the same effects as those of the first embodiment. In addition, since a high reflectance of 99% or more can be realized by the DBR mirror, light in the germanium waveguide can be efficiently reflected and laser oscillation can be efficiently performed.
第４の実施例について図５を用いて説明する。なお、実施例１に記載され本実施例に未記載の事項は特段の事情がない限り本実施例にも適用することができる。
A fourth embodiment will be described with reference to FIG. Note that the matters described in the first embodiment and not described in the present embodiment can be applied to the present embodiment as long as there is no special circumstances.
本実施例では、実施例１の半導体光素子と異なるのは、ゲルマニウム・レーザ・ダイオードの発光層となるｎ型単結晶ゲルマニウム層１０４からなる導波路の全領域に渡って周期構造１７０を持たせるものである。図５は、本実施例に係るゲルマニウム・レーザ・ダイオードの、欠陥含有領域のエッチング後の導波路端部を拡大した上面図を示す。ここで、説明のために表面側に存在する絶縁膜１０７、１０８および歪印加層１０９の記載は省いてある。
In the present embodiment, the semiconductor optical device of the first embodiment is different from the semiconductor optical device of the first embodiment in that a periodic structure 170 is provided over the entire region of the waveguide composed of the n-type single crystal germanium layer 104 serving as the light emitting layer of the germanium laser diode. Is. FIG. 5 is an enlarged top view of the end portion of the waveguide after etching the defect-containing region of the germanium laser diode according to the present embodiment. Here, the description of the insulating films 107 and 108 and the strain applying layer 109 existing on the surface side is omitted for the sake of explanation.
実施例１のゲルマニウム・レーザ・ダイオードを形成するプロセスにおいて、ｎ型単結晶ゲルマニウム層１０４の欠陥含有領域を除去する際、ゲルマニウム導波路中の発光波長の１／２の整数倍になる周期を持った構造に分割する分布帰還型（Distributed feedback：ＤＦＢ）構造１７０を有するゲルマニウム・レーザ・ダイオードを形成することが可能となる。
In the process of forming the germanium laser diode of Example 1, when the defect-containing region of the n-type single crystal germanium layer 104 is removed, it has a period that is an integral multiple of 1/2 of the emission wavelength in the germanium waveguide. It is possible to form a germanium laser diode having a distributed feedback (DFB) structure 170 that is divided into different structures.
本実施例により、実施例１と同様の効果を得ることができる。また、ゲルマニウム導波路中に周期構造を設けることで波長の選択を行うことができるため、単一モードでのレーザ発振が可能となり、ゲルマニウム・レーザ・ダイオードの発光効率を向上することができる。
This embodiment can provide the same effects as those of the first embodiment. In addition, since the wavelength can be selected by providing a periodic structure in the germanium waveguide, laser oscillation in a single mode is possible, and the light emission efficiency of the germanium laser diode can be improved.
第５の実施例について図６を用いて説明する。なお、実施例１に記載され本実施例に未記載の事項は特段の事情がない限り本実施例にも適用することができる。本実施例に係る半導体光素子は、ゲルマニウム・フォトダイオードを構成している。
A fifth embodiment will be described with reference to FIG. Note that the matters described in the first embodiment and not described in the present embodiment can be applied to the present embodiment as long as there is no special circumstances. The semiconductor optical device according to this example constitutes a germanium photodiode.
本実施例と実施例１との違いは単結晶ゲルマニウム層１１４をアンドープとしている点にある。実施例１と同様に単結晶シリコン層１０３を結晶の種として横方向にアンドープ単結晶ゲルマニウム層１１４を成長し、単結晶シリコン層１０３とアンドープ単結晶ゲルマニウム層１１４の欠陥含有層をエッチング除去する。ここで、アンドープ単結晶ゲルマニウム層１１４の濃度は1×１０１８ｃｍ－３以下である。
The difference between this example and Example 1 is that the single crystal germanium layer 114 is undoped. Similarly to Example 1, an undoped single crystal germanium layer 114 is grown in the lateral direction using the single crystal silicon layer 103 as a crystal seed, and the defect-containing layers of the single crystal silicon layer 103 and the undoped single crystal germanium layer 114 are removed by etching. Here, the concentration of the undoped single crystal germanium layer 114 is 1 × 10 18 cm −3 or less.
本実施例により、シリコン酸化膜上に形成したゲルマニウム光素子であっても、コンタクト領域における接合容量の低減が可能なフォトダイオードを含む半導体光素子やその製造方法を提供することができる。特に、電極を自己整合的に形成することで、ｐｎ接合における不要な領域が形成されないことから、接合面積が影響する容量を大幅に低減でき、フォトダイオードの高速動作が可能となる。また、導波路結合型のゲルマニウム・フォトダイオードにおいて、光吸収層であるアンドープ単結晶ゲルマニウム層１１４の結晶性が向上するため、ゲルマニウム・フォトダイオードにおいて暗電流を大幅に低減できる。
According to the present embodiment, it is possible to provide a semiconductor optical device including a photodiode capable of reducing the junction capacitance in the contact region, and a manufacturing method thereof, even if it is a germanium optical device formed on a silicon oxide film. In particular, by forming the electrodes in a self-aligned manner, an unnecessary region in the pn junction is not formed, so that the capacitance affected by the junction area can be greatly reduced, and the photodiode can be operated at high speed. Further, in the waveguide-coupled germanium photodiode, the crystallinity of the undoped single crystal germanium layer 114 which is a light absorption layer is improved, so that dark current can be significantly reduced in the germanium photodiode.
第６の実施例について図７、図８を用いて説明する。なお、実施例１に記載され本実施例に未記載の事項は特段の事情がない限り本実施例にも適用することができる。本実施例に係る半導体光素子は、ゲルマニウム・フォトダイオードとシリコン細線導波路を構成している。
A sixth embodiment will be described with reference to FIGS. Note that the matters described in the first embodiment and not described in the present embodiment can be applied to the present embodiment as long as there is no special circumstances. The semiconductor optical device according to this example forms a germanium photodiode and a silicon thin wire waveguide.
本実施例で作製したゲルマニウム・フォトダイオードと、光信号を伝搬させるシリコン細線導波路の配置を、図８の上面図に示す。ここで、説明のために表面側に存在する絶縁膜１０７、１０８および歪印加層１１５の記載は省いてある。また、図７は、図８のＡ－Ａ’、Ｂ－Ｂ’における断面構造を便宜上並列に記載したものである。アンドープ単結晶ゲルマニウム層１１４を成長する結晶核の形成と同時にシリコン細線導波路１１６となる領域を残して単結晶シリコン層１０３をエッチング除去し、シリコン細線導波路１１６の上にシリコン酸化膜を堆積する。単結晶ゲルマニウム層の選択成長ではシリコン酸化膜で覆われた領域にゲルマニウム層は堆積しないため、選択成長ではないｐ型シリコン層１０６（ｐ型引き出し電極形成用）やｎ型シリコン層１１０（ｎ型引き出し電極形成用）のみを除去する。
The top view of FIG. 8 shows the arrangement of the germanium photodiode fabricated in this example and the silicon thin wire waveguide for propagating the optical signal. Here, the description of the insulating films 107 and 108 and the strain applying layer 115 existing on the surface side is omitted for the sake of explanation. FIG. 7 shows the cross-sectional structures taken along lines A-A ′ and B-B ′ in FIG. 8 in parallel for convenience. At the same time as the formation of crystal nuclei for growing the undoped single crystal germanium layer 114, the single crystal silicon layer 103 is etched away leaving a region to be the silicon fine wire waveguide 116, and a silicon oxide film is deposited on the silicon fine wire waveguide 116. . In the selective growth of the single-crystal germanium layer, the germanium layer is not deposited in the region covered with the silicon oxide film. Therefore, the p-type silicon layer 106 (for forming the p-type lead electrode) and the n-type silicon layer 110 (n-type) that are not selectively grown are used. Only the lead electrode) is removed.
シリコン細線導波路１１６を伝播してきた光信号をゲルマニウム・フォトダイオードに効率よく結合させるためには、受光領域となるアンドープ単結晶ゲルマニウム層１１４とシリコン細線導波路１１６のアライメントを正確に調節する必要がある。即ち、図８に示す上面図おいて、長手方向に直列に配置されたアンドープ単結晶ゲルマニウム層１１４とシリコン細線導波路１１６のそれぞれの中心線を一致させるように形成することが望ましい。本実施例では、アンドープ単結晶ゲルマニウム層１１４を形成する位置は、単結晶シリコン層１０３からの位置として決められる、アンドープ単結晶ゲルマニウム層１１４の欠陥含有領域を除去するマスクとシリコン細線導波路１１６を加工するマスクの合わせ精度以内で制御できる。
In order to efficiently couple the optical signal propagating through the silicon wire waveguide 116 to the germanium photodiode, it is necessary to accurately adjust the alignment between the undoped single crystal germanium layer 114 serving as the light receiving region and the silicon wire waveguide 116. is there. That is, in the top view shown in FIG. 8, it is desirable that the center lines of the undoped single crystal germanium layer 114 and the silicon fine wire waveguide 116 arranged in series in the longitudinal direction are aligned with each other. In this embodiment, the position where the undoped single crystal germanium layer 114 is formed is determined as the position from the single crystal silicon layer 103. The mask and the silicon thin wire waveguide 116 for removing the defect-containing region of the undoped single crystal germanium layer 114 are provided. It can be controlled within the alignment accuracy of the mask to be processed.
本実施例により、実施例５と同様の効果を得ることができる。また、高感度で高速なゲルマニウム・フォトダイオードと高精度にアライメントがとれたシリコン細線導波路を同一基板上に形成することが可能となるため、光信号の結合損失を大幅に低減できることに加え、光送信回路の小型化が実現できる。
This embodiment can provide the same effects as those of the fifth embodiment. In addition, it is possible to form a highly sensitive and high-speed germanium photodiode and a silicon fine wire waveguide that is aligned with high precision on the same substrate. In addition to greatly reducing the coupling loss of optical signals, Miniaturization of the optical transmission circuit can be realized.
第７の実施例について図９、図１０を用いて説明する。なお、実施例１および実施例６に記載され本実施例に未記載の事項は特段の事情がない限り本実施例にも適用することができる。
A seventh embodiment will be described with reference to FIGS. Note that the matters described in the first embodiment and the sixth embodiment but not described in the present embodiment can be applied to the present embodiment as long as there are no special circumstances.
本実施例では、同一基板上にドーピングしたｎ型単結晶ゲルマニウム層１０４とシリコン細線導波路１１６と、アンドープ単結晶ゲルマニウム層１１４から構成される光信号の送受信モジュールを特徴としている。本実施例に係る半導体光素子の、ゲルマニウム・レーザ・ダイオードとシリコン細線導波路とゲルマニウム・フォトダイオードの結合部分を拡大した上面図を図１０に示す。ここで、説明のために表面側に存在する絶縁膜１０７、１０８および歪印加層１０９、１１５の記載は省いてある。また、図９は、図１０のＡ－Ａ’、Ｂ－Ｂ’、Ｃ－Ｃ’における断面構造を便宜上並列に記載したものである。実施例６と同様に、ｎ型単結晶ゲルマニウム層１０４とアンドープ単結晶ゲルマニウム層１１４を成長するための結晶核の形成と同時にシリコン細線導波路１１６となる領域を残して単結晶シリコン層１０３をエッチング除去し、ｎ型単結晶ゲルマニウム層１０４を成長する結晶核となる単結晶シリコン層１０３と、シリコン細線導波路１１６上にシリコン酸化膜を堆積する。単結晶ゲルマニウム層の選択成長ではシリコン酸化膜で覆われた領域にゲルマニウム層は堆積しないため、まず始めにアンドープ単結晶ゲルマニウム層１１４の選択成長を行う。次いで、アンドープ単結晶ゲルマニウム層１１４の表面をシリコン酸化膜で多い、ｎ型単結晶ゲルマニウム層１０４を成長するための結晶核となる単結晶シリコン層１０３の上のシリコン酸化膜を除去して露出させ、ｎ型単結晶ゲルマニウム層１０４の選択成長を行う。ｎ型単結晶ゲルマニウム層１０４のドーピングをイオン注入やＳＯＤ等で行う場合、アンドープ単結晶ゲルマニウム層と同時に選択成長を行い、アンドープ単結晶ゲルマニウム層１１４の領域を絶縁膜で覆った後にドーピングを行うことで、一度の選択エピタキシャル成長でｎ型単結晶ゲルマニウム層１０４を形成することもできる。そして、アンドープ単結晶ゲルマニウム層１１４の表面のシリコン酸化膜を除去し、以降はｎ型単結晶ゲルマニウム層１０４とアンドープ単結晶ゲルマニウム層１１４の上に、ｐ型単結晶ゲルマニウム層１０５とｐ型シリコン層１０６とを成長し、ＣＭＰのストッパーとなる絶縁膜１０７を堆積する。ＣＭＰで平坦化を行った後、ｎ型単結晶ゲルマニウム層１０４の表面には歪印加層１０９を堆積し、アンドープ単結晶ゲルマニウム層１１４の上には歪印加層１１５を堆積する。このとき、歪印加層１１５の歪量を歪印加層１０９よりも大きくしておくと好適である。以降、実施例６と同様に電極を形成し、シリコン細線導波路１１６の上のシリコン層を除去することで、図９に示した構造が得られる。
This embodiment is characterized by an optical signal transmission / reception module composed of an n-type single crystal germanium layer 104, a silicon fine wire waveguide 116, and an undoped single crystal germanium layer 114 doped on the same substrate. FIG. 10 is an enlarged top view of the coupling portion of the germanium laser diode, the silicon fine wire waveguide, and the germanium photodiode of the semiconductor optical device according to the present embodiment. Here, the description of the insulating films 107 and 108 and the strain applying layers 109 and 115 existing on the surface side is omitted for the sake of explanation. FIG. 9 shows the cross-sectional structures taken along A-A ′, B-B ′, and C-C ′ of FIG. 10 in parallel for convenience. Similarly to Example 6, the single crystal silicon layer 103 is etched while leaving a region to be a silicon fine wire waveguide 116 simultaneously with the formation of crystal nuclei for growing the n-type single crystal germanium layer 104 and the undoped single crystal germanium layer 114. Then, a silicon oxide film is deposited on the single crystal silicon layer 103 serving as a crystal nucleus for growing the n-type single crystal germanium layer 104 and the silicon thin wire waveguide 116. In the selective growth of the single crystal germanium layer, since the germanium layer is not deposited in the region covered with the silicon oxide film, the undoped single crystal germanium layer 114 is first selectively grown. Next, the surface of the undoped single crystal germanium layer 114 is made of a silicon oxide film, and the silicon oxide film on the single crystal silicon layer 103 serving as a crystal nucleus for growing the n-type single crystal germanium layer 104 is removed and exposed. The n-type single crystal germanium layer 104 is selectively grown. When doping the n-type single crystal germanium layer 104 by ion implantation, SOD, or the like, selective growth is performed simultaneously with the undoped single crystal germanium layer, and doping is performed after the region of the undoped single crystal germanium layer 114 is covered with an insulating film. Thus, the n-type single crystal germanium layer 104 can be formed by one selective epitaxial growth. Then, the silicon oxide film on the surface of the undoped single crystal germanium layer 114 is removed. Thereafter, the p-type single crystal germanium layer 105 and the p-type silicon layer are formed on the n-type single crystal germanium layer 104 and the undoped single crystal germanium layer 114. 106, and an insulating film 107 serving as a CMP stopper is deposited. After planarization by CMP, a strain applying layer 109 is deposited on the surface of the n-type single crystal germanium layer 104, and a strain applying layer 115 is deposited on the undoped single crystal germanium layer 114. At this time, it is preferable that the strain amount of the strain applying layer 115 is larger than that of the strain applying layer 109. Thereafter, an electrode is formed in the same manner as in Example 6, and the silicon layer on the silicon fine wire waveguide 116 is removed, whereby the structure shown in FIG. 9 is obtained.
ゲルマニウム・レーザ・ダイオードから放出された光がシリコン細線導波路１１６を伝播し、対向する位置に配置されたゲルマニウム・フォトダイオードに効率よく結合させるためには、発光領域となるｎ型単結晶ゲルマニウム層１０４とシリコン細線導波路１１６、また受光領域となるアンドープ単結晶ゲルマニウム層１１４とシリコン細線導波路１１６のアライメントをそれぞれ正確に調節する必要がある。即ち、図１０に示す上面図おいて、長手方向に直列に配置されたｎ型単結晶ゲルマニウム層１０４とシリコン細線導波路１１６とアンドープ単結晶ゲルマニウム層１１４のそれぞれの中心線を一致させるように形成することが望ましい。本実施例では、ｎ型単結晶ゲルマニウム層１０４とアンドープ単結晶ゲルマニウム層１１４を形成する位置は、単結晶シリコン層１０３からの位置として決められ、ｎ型単結晶ゲルマニウム層１０４とアンドープ単結晶ゲルマニウム層１１４の欠陥含有領域を除去するマスクとシリコン細線導波路１１６を加工するマスクの合わせ精度以内で制御できる。また、アンドープ単結晶ゲルマニウム層１１４の上に堆積した歪印加層１１５の歪量をｎ型単結晶ゲルマニウム層１０４の上に形成した歪印加層１０９よりも大きくすることで、フォトダイオード側単結晶ゲルマニウムのバンドギャップを小さくすることが可能となる。これにより、受光感度をより長波長側にシフトすることができ、エネルギーが低い光、つまり波長の長い光に対しての受光感度が向上する。その結果、ゲルマニウム・レーザ・ダイオードから放出された光に対しても十分な受光感度が得られる。また、図１０には示していないが、ＤＢＲミラーによってレーザ発振した状態で光をシリコン細線導波路１１６に導入するため、スポットサイズコンバータなどを利用することもできる。
In order for light emitted from the germanium laser diode to propagate through the silicon wire waveguide 116 and be efficiently coupled to the germanium photodiode disposed at the opposite position, an n-type single crystal germanium layer serving as a light emitting region It is necessary to accurately adjust the alignment between the silicon 104 and the silicon thin wire waveguide 116 and between the undoped single crystal germanium layer 114 serving as the light receiving region and the silicon thin wire waveguide 116. That is, in the top view shown in FIG. 10, the n-type single crystal germanium layer 104, the silicon fine wire waveguide 116, and the undoped single crystal germanium layer 114, which are arranged in series in the longitudinal direction, are formed so as to coincide with each other. It is desirable to do. In this embodiment, the positions where the n-type single crystal germanium layer 104 and the undoped single crystal germanium layer 114 are formed are determined as positions from the single crystal silicon layer 103, and the n-type single crystal germanium layer 104 and the undoped single crystal germanium layer are formed. The mask can be controlled within the alignment accuracy of the mask for removing the defect-containing region 114 and the mask for processing the silicon thin wire waveguide 116. Further, by making the strain amount of the strain applying layer 115 deposited on the undoped single crystal germanium layer 114 larger than that of the strain applying layer 109 formed on the n-type single crystal germanium layer 104, the photodiode side single crystal germanium is formed. It is possible to reduce the band gap. As a result, the light receiving sensitivity can be shifted to the longer wavelength side, and the light receiving sensitivity to light with low energy, that is, light with a long wavelength is improved. As a result, sufficient light receiving sensitivity can be obtained even for light emitted from the germanium laser diode. Although not shown in FIG. 10, a spot size converter or the like can be used to introduce light into the silicon thin wire waveguide 116 in a state where laser oscillation is performed by the DBR mirror.
本実施例によれば、シリコン酸化膜上に形成したゲルマニウム光素子であっても、レーザ・ダイオードにおいてはキャリア密度が高くキャリア分布の均一性が良好な、或いはフォトダイオードにおいてはコンタクト領域における接合容量の低減が可能な半導体光素子やその製造方法を提供することができる。また、ゲルマニウム・レーザ・ダイオードと導波路結合型のゲルマニウム・フォトダイオードを同一基板上に形成し、その間をシリコン導波路で接続できるため、実施例１と実施例６の効果に加え、レーザ・ダイオードおよびフォトダイオードと細線導波路とのアライメントを高精度に実施できることから、光送受信回路の特性が向上する。また、寄生容量の大幅な低減により光送受信回路の高速動作が可能となる。
According to the present embodiment, even in the case of a germanium optical element formed on a silicon oxide film, the laser diode has a high carrier density and good carrier distribution uniformity, or the photodiode has a junction capacitance in the contact region. It is possible to provide a semiconductor optical device and a method for manufacturing the same. Further, since the germanium laser diode and the waveguide-coupled germanium photodiode are formed on the same substrate and can be connected by a silicon waveguide, the laser diode is added to the effects of the first and sixth embodiments. In addition, since the alignment between the photodiode and the thin wire waveguide can be performed with high accuracy, the characteristics of the optical transmission / reception circuit are improved. In addition, the optical transmission / reception circuit can be operated at high speed by greatly reducing the parasitic capacitance.
第８の実施例について図１１、図１２を用いて説明する。なお、実施例１および実施例６に記載され本実施例に未記載の事項は特段の事情がない限り本実施例にも適用することができる。本実施例に係る半導体光素子は、ゲルマニウム・フォトダイオードとシリコン細線導波路を構成している。
８ An eighth embodiment will be described with reference to FIGS. 11 and 12. Note that the matters described in the first embodiment and the sixth embodiment but not described in the present embodiment can be applied to the present embodiment as long as there are no special circumstances. The semiconductor optical device according to this example forms a germanium photodiode and a silicon thin wire waveguide.
本実施例で作製したゲルマニウム・フォトダイオードと、光信号を伝搬させるシリコン細線導波路の配置を、図１２の上面図に示す。ここで、説明のために表面側に存在する絶縁膜１０７、１０８および歪印加層１１５の記載は省いてある。また、図１１は、図１２のＡ－Ａ’、Ｂ－Ｂ’における断面構造を便宜上並列に記載したものである。
The top view of FIG. 12 shows the arrangement of the germanium photodiode produced in this example and the silicon thin wire waveguide for propagating the optical signal. Here, the description of the insulating films 107 and 108 and the strain applying layer 115 existing on the surface side is omitted for the sake of explanation. FIG. 11 shows the cross-sectional structures taken along lines A-A ′ and B-B ′ of FIG. 12 in parallel for convenience.
本実施例と実施例６との違いは、本実施例においては基板にシリコン基板１２１を用い、アンドープ単結晶ゲルマニウム層１２７を成長する結晶核が、絶縁膜に設けられたライン状の開口部から露出したシリコン基板１２１の表面である点にある。また、実施例６ではシリコン細線導波路をＳＯＩ基板の単結晶シリコン層１０３を用いて形成していたが、シリコン基板１２１を用いる場合は絶縁膜１２２の上に細線導波路を別途形成する必要がある。アンドープ単結晶ゲルマニウム層１２７の欠陥含有領域を除去した後、絶縁膜１２２の開口部内を絶縁膜１２６で埋め、実施例５と同様にゲルマニウム・フォトダイオードを形成する。そして、絶縁膜１２２の上にアモルファスシリコン層を堆積し、アンドープ単結晶ゲルマニウム層１２７の長手方向の中心線と同一線上となるように細線導波路１２８を形成する。
The difference between this embodiment and embodiment 6 is that in this embodiment, a silicon substrate 121 is used as a substrate, and crystal nuclei for growing an undoped single crystal germanium layer 127 are formed from a line-shaped opening provided in the insulating film. The point is the surface of the exposed silicon substrate 121. In the sixth embodiment, the silicon thin wire waveguide is formed by using the single crystal silicon layer 103 of the SOI substrate. However, when the silicon substrate 121 is used, it is necessary to separately form the thin wire waveguide on the insulating film 122. is there. After removing the defect-containing region of the undoped single crystal germanium layer 127, the opening of the insulating film 122 is filled with the insulating film 126, and a germanium photodiode is formed as in the fifth embodiment. Then, an amorphous silicon layer is deposited on the insulating film 122, and a thin waveguide 128 is formed so as to be collinear with the longitudinal center line of the undoped single crystal germanium layer 127.
本実施例により、実施例６と同様の効果を得ることができる。また、アンドープ単結晶ゲルマニウム層１２７の選択成長において、基板に対して水平な方向にゲルマニウムを成長する際、種結晶であるシリコン層とゲルマニウム層の界面が絶縁膜の開口部の内部にあるため、欠陥を多数含有している界面からの転位の伝播が無いため、絶縁膜１２２と接して成長している領域の結晶性が更に向上する。また、高価なＳＯＩ基板を用いる必要が無いため、素子のコストを大幅に低減することができる。
This embodiment can provide the same effects as those of the sixth embodiment. In addition, in the selective growth of the undoped single crystal germanium layer 127, when germanium is grown in a direction parallel to the substrate, the interface between the silicon layer that is the seed crystal and the germanium layer is inside the opening of the insulating film. Since there is no propagation of dislocation from the interface containing many defects, the crystallinity of the region growing in contact with the insulating film 122 is further improved. In addition, since it is not necessary to use an expensive SOI substrate, the cost of the element can be significantly reduced.
第９の実施例について図１３、図１４を用いて説明する。なお、実施例１および実施例７に記載され本実施例に未記載の事項は特段の事情がない限り本実施例にも適用することができる。
A ninth embodiment will be described with reference to FIGS. Note that the matters described in the first embodiment and the seventh embodiment but not described in the present embodiment can also be applied to the present embodiment unless there are special circumstances.
本実施例では、同一基板上にドーピングしたｎ型単結晶ゲルマニウム層１２４と、アモルファスシリコン細線導波路１２８と、アンドープ単結晶ゲルマニウム層１２７とを含む光信号の送受信モジュールを特徴としている。本実施例に係る半導体光素子の、ゲルマニウム・レーザ・ダイオードとシリコン細線導波路とゲルマニウム・フォトダイオードの結合部分を拡大した上面図を図１４に示す。ここで、説明のために表面側に存在する絶縁膜１０７、１０８および歪印加層１０９、１１５の記載は省いてある。また、図１３は、図１４のＡ－Ａ’、Ｂ－Ｂ’、Ｃ－Ｃ’における断面構造を便宜上並列に記載したものである。
This embodiment is characterized by an optical signal transmission / reception module including an n-type single crystal germanium layer 124 doped on the same substrate, an amorphous silicon fine wire waveguide 128, and an undoped single crystal germanium layer 127. FIG. 14 shows an enlarged top view of the coupling portion of the germanium laser diode, the silicon wire waveguide, and the germanium photodiode of the semiconductor optical device according to the present embodiment. Here, the description of the insulating films 107 and 108 and the strain applying layers 109 and 115 existing on the surface side is omitted for the sake of explanation. FIG. 13 shows the cross-sectional structures taken along A-A ′, B-B ′, and C-C ′ of FIG. 14 in parallel for convenience.
本実施例と実施例７との違いは、基板にシリコン基板１２１を用い、ｎ型単結晶ゲルマニウム層１２４とアンドープ単結晶ゲルマニウム層１２７を成長する結晶核が、絶縁膜に形成したライン状の開口部から露出したシリコン基板１２１の表面である点にある。また、実施例７ではシリコン細線導波路をＳＯＩ基板の単結晶シリコン層１０３を用いて形成していたが、シリコン基板１２１を用いる場合は絶縁膜１２２の上に細線導波路を別途形成する必要がある。実施例７と同様に、ｎ型単結晶ゲルマニウム層１２４とアンドープ単結晶ゲルマニウム層１２７の欠陥含有領域を除去した後、絶縁膜１２２の開口部内を絶縁膜１２６で埋め、実施例７と同様にゲルマニウム・レーザ・ダイオードとゲルマニウム・フォトダイオードを形成する。そして、絶縁膜１２２の上にアモルファスシリコン層を堆積し、ｎ型単結晶ゲルマニウム層１２４とアンドープ単結晶ゲルマニウム層１２７とそれぞれの端面が同一線上となるように細線導波路１２８を形成する。
The difference between the present embodiment and the seventh embodiment is that a silicon substrate 121 is used as a substrate, and crystal nuclei for growing an n-type single crystal germanium layer 124 and an undoped single crystal germanium layer 127 are line-shaped openings formed in an insulating film. The surface is the surface of the silicon substrate 121 exposed from the portion. In Example 7, the silicon fine wire waveguide is formed using the single crystal silicon layer 103 of the SOI substrate. However, when the silicon substrate 121 is used, it is necessary to separately form the fine wire waveguide on the insulating film 122. is there. Similarly to the seventh embodiment, after removing the defect-containing regions of the n-type single crystal germanium layer 124 and the undoped single crystal germanium layer 127, the opening of the insulating film 122 is filled with the insulating film 126, and germanium is formed as in the seventh embodiment. Form a laser diode and a germanium photodiode. Then, an amorphous silicon layer is deposited on the insulating film 122, and the thin-line waveguide 128 is formed so that the end surfaces of the n-type single crystal germanium layer 124 and the undoped single crystal germanium layer 127 are on the same line.
本実施例によれば、実施例７と同様の効果を得ることができる。また、ｎ型単結晶ゲルマニウム層１２４およびアンドープ単結晶ゲルマニウム層１２７の選択成長において、基板に対して水平な方向にゲルマニウム層を成長する際、種結晶であるシリコン層とゲルマニウム層の界面が絶縁膜の開口部の内部にあるため、欠陥を多数含有している界面からの転位の伝播が無いため、絶縁膜１２２と接して成長している領域の結晶性が更に向上する。また、高価なＳＯＩ基板を用いる必要が無いため、素子のコストを大幅に低減することができる。
According to the present embodiment, the same effect as in the seventh embodiment can be obtained. In the selective growth of the n-type single crystal germanium layer 124 and the undoped single crystal germanium layer 127, when the germanium layer is grown in a direction horizontal to the substrate, the interface between the silicon layer that is the seed crystal and the germanium layer is an insulating film. Since there is no propagation of dislocations from the interface containing many defects, the crystallinity of the region growing in contact with the insulating film 122 is further improved. In addition, since it is not necessary to use an expensive SOI substrate, the cost of the element can be significantly reduced.
第１０の実施例について図１５、図１６Ａ～図１６Ｄを用いて説明する。図１５は、本実施例に係る半導体光素子の真性部分の断面構造図である。図１６Ａ～図１６Ｄは、本実施例に係る半導体光素子の製造方法を工程順に示した断面構造図である。なお、実施例１に記載され本実施例に未記載の事項は特段の事情がない限り本実施例にも適用することができる。本実施例と実施例１との違いは、本実施例ではＧＯＩ基板を用いている点にある。本実施例に係る半導体光素子の製造法について、図１６Ａ～図１６Ｄを用いて以下に説明する。
A tenth embodiment will be described with reference to FIGS. 15 and 16A to 16D. FIG. 15 is a cross-sectional structure diagram of the intrinsic part of the semiconductor optical device according to the present example. FIG. 16A to FIG. 16D are cross-sectional structure diagrams showing a method of manufacturing a semiconductor optical device according to this example in the order of steps. Note that the matters described in the first embodiment and not described in the present embodiment can be applied to the present embodiment as long as there is no special circumstances. The difference between the present embodiment and the first embodiment is that a GOI substrate is used in this embodiment. A method for manufacturing a semiconductor optical device according to this example will be described below with reference to FIGS. 16A to 16D.
シリコン支持基板１３１、埋め込み絶縁膜１３２、単結晶ゲルマニウム層１３３からなるＧＯＩ基板を用意する。単結晶ゲルマニウム層１３３は発光領域となるため、高濃度のｎ型ドーピングを行う。ドーピング方法としてはイオン注入と活性化アニールの他に、ＳＯＤを始めとするドーピング源となる膜を表面に形成し、アニールを行ってドーピングを単結晶ゲルマニウム層１３３中に拡散させる。ドーピング濃度は５×１０１８ｃｍ－３以上であれば好適である。そして、フォトリソグラフィーとエッチングによって、単結晶ゲルマニウム層１３３を導波路形状（帯状）に加工する（図１６Ａ）。次いで、選択エピタキシャル成長によってｐ型単結晶ゲルマニウム層１３４を形成し、続いてｐ型シリコン層１３５、絶縁膜１３６を全面に堆積する（図１６Ｂ）。ｐ型単結晶ゲルマニウム層１３４およびｐ型シリコン層１３５の形成方法については実施例１のｐ型シリコン層１０６と同様であるが、エピタキシャル成長前の洗浄では、単結晶ゲルマニウム層１３３の表面を過酸化水素等の酸化性の薬液を含んだ洗浄液で洗浄するとゲルマニウム層が容易に溶融してしまうため、注意が必要である。
A GOI substrate comprising a silicon support substrate 131, a buried insulating film 132, and a single crystal germanium layer 133 is prepared. Since the single crystal germanium layer 133 serves as a light emitting region, high concentration n-type doping is performed. As a doping method, in addition to ion implantation and activation annealing, a film serving as a doping source such as SOD is formed on the surface, and annealing is performed to diffuse the doping into the single crystal germanium layer 133. The doping concentration is preferably 5 × 10 18 cm −3 or more. Then, the single crystal germanium layer 133 is processed into a waveguide shape (band shape) by photolithography and etching (FIG. 16A). Next, a p-type single crystal germanium layer 134 is formed by selective epitaxial growth, and then a p-type silicon layer 135 and an insulating film 136 are deposited on the entire surface (FIG. 16B). The formation method of the p-type single crystal germanium layer 134 and the p-type silicon layer 135 is the same as that of the p-type silicon layer 106 of Example 1. However, in the cleaning before epitaxial growth, the surface of the single crystal germanium layer 133 is treated with hydrogen peroxide. Care must be taken because the germanium layer easily melts when washed with a cleaning solution containing an oxidizing chemical such as the above.
次いで、絶縁膜１３６をストッパーにして、ＣＭＰによって平坦化を行う（図１６Ｃ）。そして、ｎ型単結晶ゲルマニウム層１３３に伸張歪を印加するための歪印加層１３８を堆積する（図１６Ｄ）。本実施例では、高品質な単結晶ゲルマニウム層１３３を用いているため、欠陥含有領域を除去する必要はないが、導波路の両側からｐ型電極とｎ型電極を形成する必要があるため、単結晶ゲルマニウム層１３３の片側をフォトリソグラフィーとエッチングによって除去する（図１６Ｄ）。そして、電極を形成すれば、図１５に示す構造が得られる。ここで、符号１３９はｎ型シリコン層、符号１４０は絶縁膜、符号１４１はｐ型電極、符号１４２はｎ型電極である。
Next, planarization is performed by CMP using the insulating film 136 as a stopper (FIG. 16C). Then, a strain applying layer 138 for applying an extension strain is deposited on the n-type single crystal germanium layer 133 (FIG. 16D). In this embodiment, since the high-quality single crystal germanium layer 133 is used, it is not necessary to remove the defect-containing region, but it is necessary to form the p-type electrode and the n-type electrode from both sides of the waveguide. One side of the single crystal germanium layer 133 is removed by photolithography and etching (FIG. 16D). And if an electrode is formed, the structure shown in FIG. 15 will be obtained. Here, reference numeral 139 denotes an n-type silicon layer, reference numeral 140 denotes an insulating film, reference numeral 141 denotes a p-type electrode, and reference numeral 142 denotes an n-type electrode.
本実施例によれば、実施例１と同様の効果を得ることができる。また、ｎ型単結晶ゲルマニウム層１３３が欠陥を含まない高品質な結晶を用いることができるため、単結晶ゲルマニウム層１３３中でのキャリアの非発光再結合が抑制され、ゲルマニウム・レーザ・ダイオードの発光効率が向上する。また、ｎ型単結晶ゲルマニウム層の形状がエッチングによって制御できるため、ｐ型ゲルマニウム層から注入されるキャリアの流れが均一になり、ゲルマニウム・レーザ・ダイオードの発光効率がさらに向上する。
According to the present embodiment, the same effect as in the first embodiment can be obtained. In addition, since the n-type single crystal germanium layer 133 can use a high-quality crystal free of defects, non-radiative recombination of carriers in the single crystal germanium layer 133 is suppressed, and light emission of the germanium laser diode is achieved. Efficiency is improved. Further, since the shape of the n-type single crystal germanium layer can be controlled by etching, the flow of carriers injected from the p-type germanium layer becomes uniform, and the luminous efficiency of the germanium laser diode is further improved.
第１１の実施例について図１７を用いて説明する。なお、実施例１および実施例５に記載され本実施例に未記載の事項は特段の事情がない限り本実施例にも適用することができる。本実施例に係る半導体光素子は、ゲルマニウム・フォトダイオードを構成している。
An eleventh embodiment will be described with reference to FIG. Note that the matters described in the first embodiment and the fifth embodiment but not described in the present embodiment can be applied to the present embodiment as long as there are no special circumstances. The semiconductor optical device according to this example constitutes a germanium photodiode.
本実施例と実施例５との違いは、本実施例ではＧＯＩ基板を用いている点にある。アンドープ単結晶ゲルマニウム層１４３を導波路形状に加工し、次いで実施例１０と同様にｐ型単結晶ゲルマニウム層１３４とｐ型シリコン層１３５、絶縁膜１３６を形成した後にＣＭＰで平坦化を行う。ここで、アンドープ単結晶ゲルマニウム層１４３のドーピング濃度は1×１０１８ｃｍ－３以下である。次いで、伸張歪を印加するための歪印加層１４４を堆積し、単結晶ゲルマニウム層１４３の一部を含んでｐ型単結晶ゲルマニウム層１３４とｐ型シリコン層１３５の片側をエッチング除去し、電極部と配線部とを有するｐ型引き出し電極を形成する。
The difference between the present embodiment and the fifth embodiment is that a GOI substrate is used in this embodiment. The undoped single crystal germanium layer 143 is processed into a waveguide shape, and then a p-type single crystal germanium layer 134, a p-type silicon layer 135, and an insulating film 136 are formed in the same manner as in Example 10 and then planarized by CMP. Here, the doping concentration of the undoped single crystal germanium layer 143 is 1 × 10 18 cm −3 or less. Next, a strain applying layer 144 for applying an extension strain is deposited, and one side of the p-type single crystal germanium layer 134 and the p-type silicon layer 135 is removed by etching, including a part of the single crystal germanium layer 143, And a p-type lead electrode having a wiring portion are formed.
本実施例によれば、実施例５と同様の効果を得ることができる。また、導波路結合型のゲルマニウム・フォトダイオードにおいて、光吸収層であるアンドープ単結晶ゲルマニウム層１４３の結晶性が向上するため、ゲルマニウム・フォトダイオードにおいて暗電流が大幅に低減できる。また、アンドープ単結晶ゲルマニウム層の形状がエッチングによって制御できるため、ｐｎ接合に逆方向電位を与えたときの電位分布が、光吸収領域内で均一になるため、フォトダイオードの受光感度が向上する。
According to the present embodiment, the same effect as in the fifth embodiment can be obtained. Further, in the waveguide-coupled germanium photodiode, the crystallinity of the undoped single crystal germanium layer 143 that is a light absorption layer is improved, so that dark current can be significantly reduced in the germanium photodiode. In addition, since the shape of the undoped single crystal germanium layer can be controlled by etching, the potential distribution when a reverse potential is applied to the pn junction is uniform in the light absorption region, so that the light receiving sensitivity of the photodiode is improved.
第１２の実施例について図１８、図１９を用いて説明する。なお、実施例１および実施例８に記載され本実施例に未記載の事項は特段の事情がない限り本実施例にも適用することができる。本実施例に係る半導体光素子は、ゲルマニウム・フォトダイオードとシリコン細線導波路を構成している。
A twelfth embodiment will be described with reference to FIGS. Note that the matters described in the first embodiment and the eighth embodiment but not described in the present embodiment can also be applied to the present embodiment unless there are special circumstances. The semiconductor optical device according to this example forms a germanium photodiode and a silicon thin wire waveguide.
本実施例で作製したゲルマニウム・フォトダイオードと、光信号を伝搬させるシリコン細線導波路の配置を、図１９の上面図に示す。ここで、説明のために表面側に存在する絶縁膜１３６、１３７および歪印加層１４４の記載は省いてある。また、図１８は、図１９のＡ－Ａ’、Ｂ－Ｂ’における断面構造を便宜上並列に記載したものである。
The top view of FIG. 19 shows the arrangement of the germanium photodiode fabricated in this example and the silicon thin wire waveguide for propagating the optical signal. Here, the description of the insulating films 136 and 137 and the strain applying layer 144 existing on the surface side is omitted for the sake of explanation. FIG. 18 shows the cross-sectional structures taken along lines A-A ′ and B-B ′ of FIG. 19 in parallel for convenience.
本実施例と実施例８との違いは、本実施例においてはＧＯＩ基板を用いている点にある。実施例１１と同様にアンドープ単結晶ゲルマニウム層１４３を導波路形状に加工し、ｐ型単結晶ゲルマニウム層１３４とｐ型シリコン層１３５、絶縁膜１３６を形成した後にＣＭＰで平坦化を行う。ここで、アンドープ単結晶ゲルマニウム層１４３のドーピング濃度は1×１０１８ｃｍ－３以下である。次いで、伸張歪を印加するための歪印加層１４４を堆積し、単結晶ゲルマニウム層１４３の一部を含んでｐ型単結晶ゲルマニウム層１３４とｐ型シリコン層１３５の片側をエッチング除去し、電極を形成する。そして、絶縁膜１３２の上にアモルファスシリコン層を堆積し、アンドープ単結晶ゲルマニウム層１４３の長手方向の中心線と同一線上となるように細線導波路１４５を形成する。
The difference between the present embodiment and the eighth embodiment is that a GOI substrate is used in this embodiment. In the same manner as in Example 11, the undoped single crystal germanium layer 143 is processed into a waveguide shape to form the p-type single crystal germanium layer 134, the p-type silicon layer 135, and the insulating film 136, and then planarized by CMP. Here, the doping concentration of the undoped single crystal germanium layer 143 is 1 × 10 18 cm −3 or less. Next, a strain applying layer 144 for applying an extension strain is deposited, and one side of the p-type single crystal germanium layer 134 and the p-type silicon layer 135 including part of the single crystal germanium layer 143 is removed by etching. Form. Then, an amorphous silicon layer is deposited on the insulating film 132, and the thin-line waveguide 145 is formed so as to be collinear with the longitudinal center line of the undoped single crystal germanium layer 143.
本実施例によれば、実施例８と同様の効果を得ることができる。また、導波路結合型のゲルマニウム・フォトダイオードにおいて、光吸収層であるアンドープ単結晶ゲルマニウム層１４３の結晶性が向上するため、ゲルマニウム・フォトダイオードにおいて暗電流が大幅に低減できる。また、アンドープ単結晶ゲルマニウム層の形状がエッチングによって制御できるため、ｐｎ接合に逆方向電位を与えたときの電位分布が、光吸収領域内で均一になるため、フォトダイオードの受光感度が向上する。
According to the present embodiment, the same effect as in the eighth embodiment can be obtained. Further, in the waveguide-coupled germanium photodiode, the crystallinity of the undoped single crystal germanium layer 143 that is a light absorption layer is improved, so that dark current can be significantly reduced in the germanium photodiode. In addition, since the shape of the undoped single crystal germanium layer can be controlled by etching, the potential distribution when a reverse potential is applied to the pn junction is uniform in the light absorption region, so that the light receiving sensitivity of the photodiode is improved.
第１３の実施例について図２０、図２１を用いて説明する。なお、実施例１および実施例９に記載され本実施例に未記載の事項は特段の事情がない限り本実施例にも適用することができる。
A thirteenth embodiment will be described with reference to FIGS. Note that the matters described in the first embodiment and the ninth embodiment but not described in the present embodiment can also be applied to the present embodiment unless there are special circumstances.
本実施例では、同一ＧＯＩ基板上にドーピングしたｎ型単結晶ゲルマニウム層１３３と、アモルファスシリコン細線導波路１４５と、アンドープ単結晶ゲルマニウム層１４３とを含む光信号の送受信モジュールを特徴としている。本実施例に係る半導体光素子の、ゲルマニウム・レーザ・ダイオードとシリコン細線導波路とゲルマニウム・フォトダイオードの結合部分を拡大した上面図を図２１に示す。ここで、説明のために表面側に存在する絶縁膜１３６、１３７および歪印加層１３８、１４４の記載は省いてある。また、図２０は、図２１のＡ－Ａ’、Ｂ－Ｂ’、Ｃ－Ｃ’における断面構造を便宜上並列に記載したものである。
The present embodiment is characterized by an optical signal transmission / reception module including an n-type single crystal germanium layer 133 doped on the same GOI substrate, an amorphous silicon fine wire waveguide 145, and an undoped single crystal germanium layer 143. FIG. 21 shows an enlarged top view of the coupling portion of the germanium laser diode, the silicon fine wire waveguide, and the germanium photodiode of the semiconductor optical device according to this example. Here, the description of the insulating films 136 and 137 and the strain applying layers 138 and 144 existing on the surface side is omitted for the sake of explanation. FIG. 20 shows the cross-sectional structures taken along lines A-A ′, B-B ′, and C-C ′ of FIG. 21 in parallel for convenience.
本実施例と実施例９との違いは、本実施例ではＧＯＩ基板を用いている点にある。ＧＯＩ基板の単結晶ゲルマニウム層のレーザ・ダイオードを形成する領域のみにｎ型ドーピングを行った後、ｎ型単結晶ゲルマニウム層１３３およびアンドープ単結晶ゲルマニウム層１４３を導波路形状に加工する。次いで、ｐ型単結晶ゲルマニウム層１３４とｐ型シリコン層１３５、絶縁膜１３６を形成した後にＣＭＰで平坦化を行う。ここで、アンドープ単結晶ゲルマニウム層１４３のドーピング濃度は1×１０１８ｃｍ－３以下である。次いで、ｎ型単結晶ゲルマニウム層１３３の上に伸張歪を印加するための歪印加層１３８を堆積し、アンドープ単結晶ゲルマニウム層１４３の上に歪印加層１４４を形成する。このとき、歪印加層１３８よりも、歪印加層１４４の歪の方を大きくしておけば好適である。次いで、ｎ型単結晶ゲルマニウム層１３３と、アンドープ単結晶ゲルマニウム層１４３の一部を含んでｐ型単結晶ゲルマニウム層１３４とｐ型シリコン層１３５の片側をエッチング除去し、電極部と配線部とを有するｐ型引き出し電極を形成する。そして、絶縁膜１３２の上にアモルファスシリコン層を堆積し、ｎ型単結晶ゲルマニウム層１３３とアンドープ単結晶ゲルマニウム層１４３の長手方向の中心線と同一線上となるように細線導波路１４５を形成する。
The difference between the present embodiment and the ninth embodiment is that a GOI substrate is used in this embodiment. After n-type doping is performed only on the region where the laser diode of the single crystal germanium layer of the GOI substrate is formed, the n-type single crystal germanium layer 133 and the undoped single crystal germanium layer 143 are processed into a waveguide shape. Next, after forming the p-type single crystal germanium layer 134, the p-type silicon layer 135, and the insulating film 136, planarization is performed by CMP. Here, the doping concentration of the undoped single crystal germanium layer 143 is 1 × 10 18 cm −3 or less. Next, a strain applying layer 138 for applying a tensile strain is deposited on the n-type single crystal germanium layer 133, and a strain applying layer 144 is formed on the undoped single crystal germanium layer 143. At this time, it is preferable that the strain of the strain applying layer 144 is larger than that of the strain applying layer 138. Next, one side of the p-type single crystal germanium layer 134 and the p-type silicon layer 135 including part of the n-type single crystal germanium layer 133 and the undoped single crystal germanium layer 143 is removed by etching, and the electrode portion and the wiring portion are separated. A p-type lead electrode is formed. Then, an amorphous silicon layer is deposited on the insulating film 132, and the thin-line waveguide 145 is formed so as to be collinear with the longitudinal center line of the n-type single crystal germanium layer 133 and the undoped single crystal germanium layer 143.
本実施例によれば、実施例９と同様の効果を得ることができる。また、ゲルマニウム・レーザ・ダイオードの発光層であるｎ型単結晶ゲルマニウム層１３３およびゲルマニウム・フォトダイオードの光吸収層であるアンドープ単結晶ゲルマニウム層１４３の結晶性が向上するため、ゲルマニウム・レーザ・ダイオードの発光効率が向上すると共に、ゲルマニウム・フォトダイオードにおいて暗電流が大幅に低減できる。
According to the present embodiment, the same effect as in the ninth embodiment can be obtained. Further, since the crystallinity of the n-type single crystal germanium layer 133 which is a light emitting layer of the germanium laser diode and the undoped single crystal germanium layer 143 which is a light absorption layer of the germanium photodiode is improved, the germanium laser diode Luminous efficiency is improved and dark current can be greatly reduced in the germanium photodiode.
以上、本発明の好適な実施例について説明したが、本発明は前記実施例に限定されることなく、本発明の精神を逸脱しない範囲内において種々の設計変更をなし得ることは勿論である。例えば、実施例中では単結晶ゲルマニウム層の場合について説明したが、ゲルマニウム組成比が高い単結晶シリコン・ゲルマニウム層等を用いてよいことは言うまでもない。
The preferred embodiments of the present invention have been described above, but the present invention is not limited to the above-described embodiments, and various design changes can be made without departing from the spirit of the present invention. For example, in the examples, the case of a single crystal germanium layer has been described, but it goes without saying that a single crystal silicon / germanium layer having a high germanium composition ratio may be used.
以上、本願発明を詳細に説明したが、以下に主な発明の形態を列挙する。
（１）半導体基板と、
前記半導体基板上に設けられた第１絶縁膜と、
前記第１絶縁膜上に設けられた帯状のｎ型或いはアンドープ単結晶ゲルマニウム層と、
帯状の前記ｎ型或いはアンドープ単結晶ゲルマニウム層の側面に形成されたｐ型引き出し電極と、を備え、
前記ｐ型引き出し電極は、電極部と配線部とを有し、
前記電極部の上面は、前記ｎ型或いはアンドープ単結晶ゲルマニウム層の上面と同じ高さで、且つ前記配線部の上面よりも高いことを特徴とする半導体光素子。
（２）上記（１）記載の半導体光素子において、
前記電極部は、前記ｎ型或いはアンドープ単結晶ゲルマニウム層の側面に順次形成されたｐ型単結晶ゲルマニウム層とｐ型シリコン層との積層構造を有することを特徴とする光半導体光素子。
（３）上記（１）記載の半導体光素子において、
前記ｎ型或いはアンドープ単結晶ゲルマニウム層の上面と同じ高さの第２絶縁膜が、前記配線部の上に形成されていることを特徴とする光半導体光素子。
（４）上記（１）記載の半導体光素子において、
前記ｎ型或いはアンドープ単結晶ゲルマニウム層は、伸張歪を有することを特徴とする光半導体光素子。
（５）上記（１）記載の半導体光素子において、
前記ｎ型或いはアンドープ単結晶ゲルマニウム層の少なくとも１つの側壁の面方位が、（１００）と等価であることを特徴とする光半導体光素子。
（６）上記（１）記載の半導体光素子において、
前記ｎ型単結晶ゲルマニウム層は発光層であり、ドーピング濃度が５×１０１８ｃｍ－３以上であることを特徴とする半導体光素子。
（７）上記（１）記載の半導体光素子において、
前記ｎ型単結晶ゲルマニウム層は、前記電極部と接する面と平行な延長線方向での端部において周期構造を有することを特徴とする光半導体光素子。
（８）上記（１）記載の半導体光素子において、
前記ｎ型単結晶ゲルマニウム層は、前記電極部と接する面と平行な延長線方向おいて周期構造を有することを特徴とする光半導体光素子。
（９）上記（１）記載の半導体光素子において、
前記アンドープ単結晶半導体層は受光層であり、ドーピング濃度が１×１０１８ｃｍ－３以下であることを特徴とする半導体光素子。
（１０）上記（１）記載の半導体光素子において、
光導波路が前記第１絶縁膜上に配置され、
前記光導波路は、前記ｎ型或いはアンドープ単結晶ゲルマニウム層と電気的に絶縁され、光学的に結合されることを特徴とする半導体光素子。
（１１）上記（１）記載の半導体光素子において、
前記第１絶縁膜上には、帯状の前記ｎ型単結晶ゲルマニウム層および帯状の前記アンドープ単結晶ゲルマニウム層が直列に配置され、
前記ｎ型単結晶ゲルマニウム層と前記アンドープ単結晶ゲルマニウム層との間に、電気的には互いに絶縁され光学的には結合され、前記ｎ型単結晶ゲルマニウム層からの光信号を前記アンドープ単結晶ゲルマニウム層へ伝搬するための光導波路が更に配置されていることを特徴とする半導体光素子。
（１２）上記（１０）又は上記（１１）記載の半導体光素子において、
前記光導波路は、単結晶シリコン層からなることを特徴とする半導体光素子。
（１３）上記（１０）又は上記（１１）記載の半導体光素子において、
前記光導波路は、非晶質シリコン層からなることを特徴とする半導体光素子。
（１４）上記（１１）記載の半導体光素子において、
前記アンドープ単結晶ゲルマニウム層の伸張歪は、前記ｎ型単結晶ゲルマニウム層の伸張歪よりも大きいことを特徴とする半導体光素子。
（１５）第１絶縁膜上に帯状に形成されたｎ型或いはノンドープ単結晶ゲルマニウム層を有する半導体基板を準備する第１工程と、
帯状の前記ｎ型或いはノンドープ単結晶ゲルマニウム層の両側の側壁を含む表面および前記第１絶縁膜上に前記ｐ型引き出し電極の電極部と配線部となるｐ型半導体層を形成する第２工程と、
前記ｐ型半導体層の上に第２絶縁膜を形成する第３工程と、
前記ｎ型或いはノンドープ単結晶ゲルマニウム層の上部の前記第２絶縁膜と前記ｐ型半導体層と、前記ｎ型或いはノンドープ単結晶ゲルマニウム層を、前記ｎ型或いはノンドープ単結晶ゲルマニウム層から離れた位置での前記第２絶縁膜の表面と概ね一致する高さまで表面から研磨する第４工程と、
を有することを特徴とする半導体光素子の製造方法。
（１６）上記（１５）記載の半導体光素子の製造方法において、
帯状の前記ｎ型或いはノンドープ単結晶ゲルマニウム層は、前記第１絶縁膜をＳＯＩ基板の絶縁膜とし、ライン状に加工された前記ＳＯＩ基板の単結晶シリコン層を核として前記第１絶縁膜上に形成されたものであることを特徴とする半導体光素子の製造方法。
（１７）上記（１５）記載の半導体光素子の製造方法において、
前記半導体基板は単結晶シリコン基板であり、
帯状の前記ｎ型或いはノンドープ単結晶ゲルマニウム層は、前記単結晶シリコン基板の上に形成された前記第１絶縁膜に設けられたライン状の開口部から露出する前記単結晶シリコン基板の表面を核として前記第１絶縁膜上に形成されたものであることを特徴とする半導体光素子の製造方法。
（１８）上記（１５）記載の半導体光素子の製造方法において、
前記ｎ型或いはノンドープ単結晶ゲルマニウム層は、前記第１絶縁膜をＧＯＩ基板の絶縁膜とし、前記ＧＯＩ基板の単結晶ゲルマニウム層を導波路状に加工して形成されたものであることを特徴とする半導体光素子の製造方法。
（１９）上記（１５）～（１８）記載の半導体光素子の製造方法において、
前記第１絶縁膜上に光導波路を形成する工程、を更に有することを特徴とする半導体光素子の製造方法。
（２０）第１絶縁膜上に帯状に形成されたｎ型或いはノンドープ単結晶ゲルマニウム層を有する単結晶シリコン基板を準備する第１工程と、
帯状の前記ｎ型或いはノンドープ単結晶ゲルマニウム層の両側の側壁を含む表面のみにｐ型引き出し電極の電極部となる第１ｐ型半導体層を形成する第２工程と、
前記第１ｐ型半導体層の表面および前記第１絶縁膜上に前記第１ｐ型引き出し電極の電極部と配線部となる第２ｐ型半導体層を形成する第３工程と、
前記第２ｐ型半導体層の上に第２絶縁膜を形成する第４工程と、
前記ｎ型或いはノンドープ単結晶ゲルマニウム層の上部の前記第２絶縁膜と前記第２ｐ型半導体層と前記第１ｐ型半導体層と、前記ｎ型或いはノンドープ単結晶ゲルマニウム層を、前記ｎ型或いはノンドープ単結晶ゲルマニウム層から離れた位置での前記第２絶縁膜の表面と概ね一致する高さまで表面から研磨する第５工程と、
前記ｎ型或はノンドープ単結晶ゲルマニウム層に伸張歪を印加するための歪印加層を前記ｎ型或いはノンドープ単結晶ゲルマニウム層の上に形成する第６工程と、
帯状の前記ｎ型或いはノンドープ単結晶ゲルマニウム層の両側の側壁に形成された前記第１ｐ型半導体層と、前記第２ｐ型半導体層と、前記第２絶縁膜のそれぞれの一方の側および前記ｎ型或いはノンドープ単結晶ゲルマニウム層の一方の側を除去することで、他方の側の前記第２ｐ型半導体層と対向する前記ｎ型或いはノンドープ単結晶ゲルマニウム層の側壁を露出する第７工程と、
前記単結晶ゲルマニウム層の側壁にｎ型電極を形成する第８工程と、
を有することを特徴とする半導体光素子の製造方法。 Although the present invention has been described in detail above, the main invention modes are listed below.
(1) a semiconductor substrate;
A first insulating film provided on the semiconductor substrate;
A band-shaped n-type or undoped single crystal germanium layer provided on the first insulating film;
A p-type extraction electrode formed on a side surface of the band-shaped n-type or undoped single crystal germanium layer,
The p-type lead electrode has an electrode portion and a wiring portion,
The semiconductor optical device according to claim 1, wherein an upper surface of the electrode portion is flush with an upper surface of the n-type or undoped single crystal germanium layer and is higher than an upper surface of the wiring portion.
(2) In the semiconductor optical device described in (1) above,
2. The optical semiconductor optical device according to claim 1, wherein the electrode portion has a laminated structure of a p-type single crystal germanium layer and a p-type silicon layer sequentially formed on a side surface of the n-type or undoped single crystal germanium layer.
(3) In the semiconductor optical device described in (1) above,
An optical semiconductor optical device, wherein a second insulating film having the same height as the upper surface of the n-type or undoped single crystal germanium layer is formed on the wiring portion.
(4) In the semiconductor optical device described in (1) above,
The optical semiconductor optical device, wherein the n-type or undoped single crystal germanium layer has a tensile strain.
(5) In the semiconductor optical device described in (1) above,
An optical semiconductor optical device, wherein a surface orientation of at least one side wall of the n-type or undoped single crystal germanium layer is equivalent to (100).
(6) In the semiconductor optical device described in (1) above,
The n-type single crystal germanium layer is a light emitting layer, and has a doping concentration of 5 × 10 18 cm −3 or more.
(7) In the semiconductor optical device described in (1) above,
The n-type single crystal germanium layer has a periodic structure at an end portion in an extension line direction parallel to a surface in contact with the electrode portion.
(8) In the semiconductor optical device described in (1) above,
The n-type single crystal germanium layer has a periodic structure in an extension line direction parallel to a surface in contact with the electrode portion.
(9) In the semiconductor optical device described in (1) above,
The undoped single crystal semiconductor layer is a light receiving layer, and has a doping concentration of 1 × 10 18 cm −3 or less.
(10) In the semiconductor optical device described in (1) above,
An optical waveguide is disposed on the first insulating film;
The semiconductor optical device, wherein the optical waveguide is electrically insulated from and optically coupled to the n-type or undoped single crystal germanium layer.
(11) In the semiconductor optical device described in (1) above,
On the first insulating film, the band-shaped n-type single crystal germanium layer and the band-shaped undoped single crystal germanium layer are arranged in series,
The n-type single crystal germanium layer and the undoped single crystal germanium layer are electrically insulated from each other and optically coupled, and an optical signal from the n-type single crystal germanium layer is transmitted to the undoped single crystal germanium layer. A semiconductor optical device, further comprising an optical waveguide for propagating to the layer.
(12) In the semiconductor optical device according to (10) or (11) above,
The semiconductor optical device, wherein the optical waveguide is made of a single crystal silicon layer.
(13) In the semiconductor optical device according to (10) or (11),
The semiconductor optical device, wherein the optical waveguide is made of an amorphous silicon layer.
(14) In the semiconductor optical device described in (11) above,
A semiconductor optical device characterized in that an extension strain of the undoped single crystal germanium layer is larger than an extension strain of the n-type single crystal germanium layer.
(15) a first step of preparing a semiconductor substrate having an n-type or non-doped single crystal germanium layer formed in a strip shape on the first insulating film;
A second step of forming a p-type semiconductor layer serving as an electrode portion and a wiring portion of the p-type lead electrode on the surface including side walls on both sides of the band-shaped n-type or non-doped single-crystal germanium layer and the first insulating film; ,
A third step of forming a second insulating film on the p-type semiconductor layer;
The second insulating film, the p-type semiconductor layer, and the n-type or non-doped single crystal germanium layer above the n-type or non-doped single crystal germanium layer are separated from the n-type or non-doped single crystal germanium layer. A fourth step of polishing from the surface to a height generally coinciding with the surface of the second insulating film of
A method for producing a semiconductor optical device, comprising:
(16) In the method for manufacturing a semiconductor optical device according to (15),
The band-shaped n-type or non-doped single crystal germanium layer is formed on the first insulating film with the first insulating film as an insulating film of the SOI substrate and the single crystal silicon layer of the SOI substrate processed into a line shape as a nucleus. A method of manufacturing a semiconductor optical device, wherein the semiconductor optical device is formed.
(17) In the method for manufacturing a semiconductor optical device according to (15),
The semiconductor substrate is a single crystal silicon substrate;
The band-shaped n-type or non-doped single crystal germanium layer is formed by nucleating the surface of the single crystal silicon substrate exposed from a line-shaped opening provided in the first insulating film formed on the single crystal silicon substrate. A method of manufacturing a semiconductor optical device, wherein the method is formed on the first insulating film.
(18) In the method for manufacturing a semiconductor optical device according to (15),
The n-type or non-doped single crystal germanium layer is formed by using the first insulating film as an insulating film of a GOI substrate and processing the single crystal germanium layer of the GOI substrate into a waveguide shape. A method for manufacturing a semiconductor optical device.
(19) In the method for manufacturing a semiconductor optical device described in (15) to (18) above,
The method of manufacturing a semiconductor optical device, further comprising: forming an optical waveguide on the first insulating film.
(20) a first step of preparing a single crystal silicon substrate having an n-type or non-doped single crystal germanium layer formed in a strip shape on the first insulating film;
A second step of forming a first p-type semiconductor layer serving as an electrode portion of a p-type extraction electrode only on the surface including the side walls on both sides of the band-shaped n-type or non-doped single crystal germanium layer;
A third step of forming a second p-type semiconductor layer serving as an electrode portion and a wiring portion of the first p-type lead electrode on the surface of the first p-type semiconductor layer and the first insulating film;
A fourth step of forming a second insulating film on the second p-type semiconductor layer;
The second insulating film, the second p-type semiconductor layer, the first p-type semiconductor layer, and the n-type or non-doped single crystal germanium layer above the n-type or non-doped single crystal germanium layer are connected to the n-type or non-doped single crystal germanium layer. A fifth step of polishing from the surface to a height generally coinciding with the surface of the second insulating film at a position away from the crystalline germanium layer;
A sixth step of forming on the n-type or non-doped single crystal germanium layer a strain applying layer for applying a tensile strain to the n-type or non-doped single crystal germanium layer;
The first p-type semiconductor layer, the second p-type semiconductor layer, the one side of the second insulating film, and the n-type formed on the sidewalls on both sides of the band-shaped n-type or non-doped single crystal germanium layer Alternatively, by removing one side of the non-doped single crystal germanium layer, a seventh step of exposing a side wall of the n-type or non-doped single crystal germanium layer facing the second p-type semiconductor layer on the other side;
An eighth step of forming an n-type electrode on the side wall of the single crystal germanium layer;
A method for producing a semiconductor optical device, comprising:
（１）半導体基板と、
前記半導体基板上に設けられた第１絶縁膜と、
前記第１絶縁膜上に設けられた帯状のｎ型或いはアンドープ単結晶ゲルマニウム層と、
帯状の前記ｎ型或いはアンドープ単結晶ゲルマニウム層の側面に形成されたｐ型引き出し電極と、を備え、
前記ｐ型引き出し電極は、電極部と配線部とを有し、
前記電極部の上面は、前記ｎ型或いはアンドープ単結晶ゲルマニウム層の上面と同じ高さで、且つ前記配線部の上面よりも高いことを特徴とする半導体光素子。
（２）上記（１）記載の半導体光素子において、
前記電極部は、前記ｎ型或いはアンドープ単結晶ゲルマニウム層の側面に順次形成されたｐ型単結晶ゲルマニウム層とｐ型シリコン層との積層構造を有することを特徴とする光半導体光素子。
（３）上記（１）記載の半導体光素子において、
前記ｎ型或いはアンドープ単結晶ゲルマニウム層の上面と同じ高さの第２絶縁膜が、前記配線部の上に形成されていることを特徴とする光半導体光素子。
（４）上記（１）記載の半導体光素子において、
前記ｎ型或いはアンドープ単結晶ゲルマニウム層は、伸張歪を有することを特徴とする光半導体光素子。
（５）上記（１）記載の半導体光素子において、
前記ｎ型或いはアンドープ単結晶ゲルマニウム層の少なくとも１つの側壁の面方位が、（１００）と等価であることを特徴とする光半導体光素子。
（６）上記（１）記載の半導体光素子において、
前記ｎ型単結晶ゲルマニウム層は発光層であり、ドーピング濃度が５×１０１８ｃｍ－３以上であることを特徴とする半導体光素子。
（７）上記（１）記載の半導体光素子において、
前記ｎ型単結晶ゲルマニウム層は、前記電極部と接する面と平行な延長線方向での端部において周期構造を有することを特徴とする光半導体光素子。
（８）上記（１）記載の半導体光素子において、
前記ｎ型単結晶ゲルマニウム層は、前記電極部と接する面と平行な延長線方向おいて周期構造を有することを特徴とする光半導体光素子。
（９）上記（１）記載の半導体光素子において、
前記アンドープ単結晶半導体層は受光層であり、ドーピング濃度が１×１０１８ｃｍ－３以下であることを特徴とする半導体光素子。
（１０）上記（１）記載の半導体光素子において、
光導波路が前記第１絶縁膜上に配置され、
前記光導波路は、前記ｎ型或いはアンドープ単結晶ゲルマニウム層と電気的に絶縁され、光学的に結合されることを特徴とする半導体光素子。
（１１）上記（１）記載の半導体光素子において、
前記第１絶縁膜上には、帯状の前記ｎ型単結晶ゲルマニウム層および帯状の前記アンドープ単結晶ゲルマニウム層が直列に配置され、
前記ｎ型単結晶ゲルマニウム層と前記アンドープ単結晶ゲルマニウム層との間に、電気的には互いに絶縁され光学的には結合され、前記ｎ型単結晶ゲルマニウム層からの光信号を前記アンドープ単結晶ゲルマニウム層へ伝搬するための光導波路が更に配置されていることを特徴とする半導体光素子。
（１２）上記（１０）又は上記（１１）記載の半導体光素子において、
前記光導波路は、単結晶シリコン層からなることを特徴とする半導体光素子。
（１３）上記（１０）又は上記（１１）記載の半導体光素子において、
前記光導波路は、非晶質シリコン層からなることを特徴とする半導体光素子。
（１４）上記（１１）記載の半導体光素子において、
前記アンドープ単結晶ゲルマニウム層の伸張歪は、前記ｎ型単結晶ゲルマニウム層の伸張歪よりも大きいことを特徴とする半導体光素子。
（１５）第１絶縁膜上に帯状に形成されたｎ型或いはノンドープ単結晶ゲルマニウム層を有する半導体基板を準備する第１工程と、
帯状の前記ｎ型或いはノンドープ単結晶ゲルマニウム層の両側の側壁を含む表面および前記第１絶縁膜上に前記ｐ型引き出し電極の電極部と配線部となるｐ型半導体層を形成する第２工程と、
前記ｐ型半導体層の上に第２絶縁膜を形成する第３工程と、
前記ｎ型或いはノンドープ単結晶ゲルマニウム層の上部の前記第２絶縁膜と前記ｐ型半導体層と、前記ｎ型或いはノンドープ単結晶ゲルマニウム層を、前記ｎ型或いはノンドープ単結晶ゲルマニウム層から離れた位置での前記第２絶縁膜の表面と概ね一致する高さまで表面から研磨する第４工程と、
を有することを特徴とする半導体光素子の製造方法。
（１６）上記（１５）記載の半導体光素子の製造方法において、
帯状の前記ｎ型或いはノンドープ単結晶ゲルマニウム層は、前記第１絶縁膜をＳＯＩ基板の絶縁膜とし、ライン状に加工された前記ＳＯＩ基板の単結晶シリコン層を核として前記第１絶縁膜上に形成されたものであることを特徴とする半導体光素子の製造方法。
（１７）上記（１５）記載の半導体光素子の製造方法において、
前記半導体基板は単結晶シリコン基板であり、
帯状の前記ｎ型或いはノンドープ単結晶ゲルマニウム層は、前記単結晶シリコン基板の上に形成された前記第１絶縁膜に設けられたライン状の開口部から露出する前記単結晶シリコン基板の表面を核として前記第１絶縁膜上に形成されたものであることを特徴とする半導体光素子の製造方法。
（１８）上記（１５）記載の半導体光素子の製造方法において、
前記ｎ型或いはノンドープ単結晶ゲルマニウム層は、前記第１絶縁膜をＧＯＩ基板の絶縁膜とし、前記ＧＯＩ基板の単結晶ゲルマニウム層を導波路状に加工して形成されたものであることを特徴とする半導体光素子の製造方法。
（１９）上記（１５）～（１８）記載の半導体光素子の製造方法において、
前記第１絶縁膜上に光導波路を形成する工程、を更に有することを特徴とする半導体光素子の製造方法。
（２０）第１絶縁膜上に帯状に形成されたｎ型或いはノンドープ単結晶ゲルマニウム層を有する単結晶シリコン基板を準備する第１工程と、
帯状の前記ｎ型或いはノンドープ単結晶ゲルマニウム層の両側の側壁を含む表面のみにｐ型引き出し電極の電極部となる第１ｐ型半導体層を形成する第２工程と、
前記第１ｐ型半導体層の表面および前記第１絶縁膜上に前記第１ｐ型引き出し電極の電極部と配線部となる第２ｐ型半導体層を形成する第３工程と、
前記第２ｐ型半導体層の上に第２絶縁膜を形成する第４工程と、
前記ｎ型或いはノンドープ単結晶ゲルマニウム層の上部の前記第２絶縁膜と前記第２ｐ型半導体層と前記第１ｐ型半導体層と、前記ｎ型或いはノンドープ単結晶ゲルマニウム層を、前記ｎ型或いはノンドープ単結晶ゲルマニウム層から離れた位置での前記第２絶縁膜の表面と概ね一致する高さまで表面から研磨する第５工程と、
前記ｎ型或はノンドープ単結晶ゲルマニウム層に伸張歪を印加するための歪印加層を前記ｎ型或いはノンドープ単結晶ゲルマニウム層の上に形成する第６工程と、
帯状の前記ｎ型或いはノンドープ単結晶ゲルマニウム層の両側の側壁に形成された前記第１ｐ型半導体層と、前記第２ｐ型半導体層と、前記第２絶縁膜のそれぞれの一方の側および前記ｎ型或いはノンドープ単結晶ゲルマニウム層の一方の側を除去することで、他方の側の前記第２ｐ型半導体層と対向する前記ｎ型或いはノンドープ単結晶ゲルマニウム層の側壁を露出する第７工程と、
前記単結晶ゲルマニウム層の側壁にｎ型電極を形成する第８工程と、
を有することを特徴とする半導体光素子の製造方法。 Although the present invention has been described in detail above, the main invention modes are listed below.
(1) a semiconductor substrate;
A first insulating film provided on the semiconductor substrate;
A band-shaped n-type or undoped single crystal germanium layer provided on the first insulating film;
A p-type extraction electrode formed on a side surface of the band-shaped n-type or undoped single crystal germanium layer,
The p-type lead electrode has an electrode portion and a wiring portion,
The semiconductor optical device according to claim 1, wherein an upper surface of the electrode portion is flush with an upper surface of the n-type or undoped single crystal germanium layer and is higher than an upper surface of the wiring portion.
(2) In the semiconductor optical device described in (1) above,
2. The optical semiconductor optical device according to claim 1, wherein the electrode portion has a laminated structure of a p-type single crystal germanium layer and a p-type silicon layer sequentially formed on a side surface of the n-type or undoped single crystal germanium layer.
(3) In the semiconductor optical device described in (1) above,
An optical semiconductor optical device, wherein a second insulating film having the same height as the upper surface of the n-type or undoped single crystal germanium layer is formed on the wiring portion.
(4) In the semiconductor optical device described in (1) above,
The optical semiconductor optical device, wherein the n-type or undoped single crystal germanium layer has a tensile strain.
(5) In the semiconductor optical device described in (1) above,
An optical semiconductor optical device, wherein a surface orientation of at least one side wall of the n-type or undoped single crystal germanium layer is equivalent to (100).
(6) In the semiconductor optical device described in (1) above,
The n-type single crystal germanium layer is a light emitting layer, and has a doping concentration of 5 × 10 18 cm −3 or more.
(7) In the semiconductor optical device described in (1) above,
The n-type single crystal germanium layer has a periodic structure at an end portion in an extension line direction parallel to a surface in contact with the electrode portion.
(8) In the semiconductor optical device described in (1) above,
The n-type single crystal germanium layer has a periodic structure in an extension line direction parallel to a surface in contact with the electrode portion.
(9) In the semiconductor optical device described in (1) above,
The undoped single crystal semiconductor layer is a light receiving layer, and has a doping concentration of 1 × 10 18 cm −3 or less.
(10) In the semiconductor optical device described in (1) above,
An optical waveguide is disposed on the first insulating film;
The semiconductor optical device, wherein the optical waveguide is electrically insulated from and optically coupled to the n-type or undoped single crystal germanium layer.
(11) In the semiconductor optical device described in (1) above,
On the first insulating film, the band-shaped n-type single crystal germanium layer and the band-shaped undoped single crystal germanium layer are arranged in series,
The n-type single crystal germanium layer and the undoped single crystal germanium layer are electrically insulated from each other and optically coupled, and an optical signal from the n-type single crystal germanium layer is transmitted to the undoped single crystal germanium layer. A semiconductor optical device, further comprising an optical waveguide for propagating to the layer.
(12) In the semiconductor optical device according to (10) or (11) above,
The semiconductor optical device, wherein the optical waveguide is made of a single crystal silicon layer.
(13) In the semiconductor optical device according to (10) or (11),
The semiconductor optical device, wherein the optical waveguide is made of an amorphous silicon layer.
(14) In the semiconductor optical device described in (11) above,
A semiconductor optical device characterized in that an extension strain of the undoped single crystal germanium layer is larger than an extension strain of the n-type single crystal germanium layer.
(15) a first step of preparing a semiconductor substrate having an n-type or non-doped single crystal germanium layer formed in a strip shape on the first insulating film;
A second step of forming a p-type semiconductor layer serving as an electrode portion and a wiring portion of the p-type lead electrode on the surface including side walls on both sides of the band-shaped n-type or non-doped single-crystal germanium layer and the first insulating film; ,
A third step of forming a second insulating film on the p-type semiconductor layer;
The second insulating film, the p-type semiconductor layer, and the n-type or non-doped single crystal germanium layer above the n-type or non-doped single crystal germanium layer are separated from the n-type or non-doped single crystal germanium layer. A fourth step of polishing from the surface to a height generally coinciding with the surface of the second insulating film of
A method for producing a semiconductor optical device, comprising:
(16) In the method for manufacturing a semiconductor optical device according to (15),
The band-shaped n-type or non-doped single crystal germanium layer is formed on the first insulating film with the first insulating film as an insulating film of the SOI substrate and the single crystal silicon layer of the SOI substrate processed into a line shape as a nucleus. A method of manufacturing a semiconductor optical device, wherein the semiconductor optical device is formed.
(17) In the method for manufacturing a semiconductor optical device according to (15),
The semiconductor substrate is a single crystal silicon substrate;
The band-shaped n-type or non-doped single crystal germanium layer is formed by nucleating the surface of the single crystal silicon substrate exposed from a line-shaped opening provided in the first insulating film formed on the single crystal silicon substrate. A method of manufacturing a semiconductor optical device, wherein the method is formed on the first insulating film.
(18) In the method for manufacturing a semiconductor optical device according to (15),
The n-type or non-doped single crystal germanium layer is formed by using the first insulating film as an insulating film of a GOI substrate and processing the single crystal germanium layer of the GOI substrate into a waveguide shape. A method for manufacturing a semiconductor optical device.
(19) In the method for manufacturing a semiconductor optical device described in (15) to (18) above,
The method of manufacturing a semiconductor optical device, further comprising: forming an optical waveguide on the first insulating film.
(20) a first step of preparing a single crystal silicon substrate having an n-type or non-doped single crystal germanium layer formed in a strip shape on the first insulating film;
A second step of forming a first p-type semiconductor layer serving as an electrode portion of a p-type extraction electrode only on the surface including the side walls on both sides of the band-shaped n-type or non-doped single crystal germanium layer;
A third step of forming a second p-type semiconductor layer serving as an electrode portion and a wiring portion of the first p-type lead electrode on the surface of the first p-type semiconductor layer and the first insulating film;
A fourth step of forming a second insulating film on the second p-type semiconductor layer;
The second insulating film, the second p-type semiconductor layer, the first p-type semiconductor layer, and the n-type or non-doped single crystal germanium layer above the n-type or non-doped single crystal germanium layer are connected to the n-type or non-doped single crystal germanium layer. A fifth step of polishing from the surface to a height generally coinciding with the surface of the second insulating film at a position away from the crystalline germanium layer;
A sixth step of forming on the n-type or non-doped single crystal germanium layer a strain applying layer for applying a tensile strain to the n-type or non-doped single crystal germanium layer;
The first p-type semiconductor layer, the second p-type semiconductor layer, the one side of the second insulating film, and the n-type formed on the sidewalls on both sides of the band-shaped n-type or non-doped single crystal germanium layer Alternatively, by removing one side of the non-doped single crystal germanium layer, a seventh step of exposing a side wall of the n-type or non-doped single crystal germanium layer facing the second p-type semiconductor layer on the other side;
An eighth step of forming an n-type electrode on the side wall of the single crystal germanium layer;
A method for producing a semiconductor optical device, comprising:
１０１…半導体基板（シリコン基板）、１０２…絶縁膜（埋め込み絶縁膜）、１０３…単結晶シリコン層、１０４…ｎ型単結晶ゲルマニウム層、１０５…ｐ型単結晶ゲルマニウム層、１０６…ｐ型シリコン層、１０７、１０８…絶縁膜、１０９…歪印加層、１１０…ｎ型シリコン層、１１１…絶縁膜、１１２…ｐ型電極、１１３…ｎ型電極、１１４…アンドープ単結晶ゲルマニウム層、１１５…歪印加層、１１６…シリコン細線導波路、１２１…シリコン基板、１２２…絶縁膜、１２３…絶縁膜の開口部、１２４…ｎ型単結晶ゲルマニウム層、１２５…ｐ型単結晶ゲルマニウム層、１２６…絶縁膜、１２７…アンドープ単結晶ゲルマニウム層、１２８…アモルファスシリコン細線導波路、１３１…シリコン基板、１３２…埋め込み絶縁膜、１３３…ｎ型単結晶ゲルマニウム層、１３４…ｐ型単結晶ゲルマニウム層、１３５…ｐ型シリコン層、１３６、１３７…絶縁膜、１３８…歪印加層、１３９…ｎ型シリコン層、１４０…絶縁膜、１４１…ｐ型電極、１４２…ｎ型電極、１４３…アンドープ単結晶ゲルマニウム層、１４４…歪印加層、１４５…アモルファスシリコン細線導波路、２４１…シリコン基板、２４２…埋め込み酸化膜、２４３…単結晶シリコン細線導波路、２４４…ｎ型単結晶ゲルマニウム層、２４５…絶縁膜、２４６…ｐ型電極、２４７…ｎ型電極。
DESCRIPTION OF SYMBOLS 101 ... Semiconductor substrate (silicon substrate), 102 ... Insulating film (embedded insulating film), 103 ... Single crystal silicon layer, 104 ... N-type single crystal germanium layer, 105 ... p-type single crystal germanium layer, 106 ... p-type silicon layer , 107, 108 ... insulating film, 109 ... strain applying layer, 110 ... n-type silicon layer, 111 ... insulating film, 112 ... p-type electrode, 113 ... n-type electrode, 114 ... undoped single crystal germanium layer, 115 ... strain applied Layer 116, silicon thin-film waveguide, 121 silicon substrate, 122 insulating film, 123 opening of insulating film, 124 n-type single crystal germanium layer, 125 p-type single crystal germanium layer, 126 insulating film, 127: undoped single crystal germanium layer, 128: amorphous silicon waveguide, 131: silicon substrate, 132: buried insulating film, 1 3 ... n-type single crystal germanium layer, 134 ... p-type single crystal germanium layer, 135 ... p-type silicon layer, 136, 137 ... insulating film, 138 ... strain applying layer, 139 ... n-type silicon layer, 140 ... insulating film, 141 ... p-type electrode, 142 ... n-type electrode, 143 ... undoped single crystal germanium layer, 144 ... strain applying layer, 145 ... amorphous silicon fine waveguide, 241 ... silicon substrate, 242 ... buried oxide film, 243 ... single crystal silicon Fine wire waveguide, 244... N-type single crystal germanium layer, 245... Insulating film, 246... P-type electrode, 247.
Claims (19)
- 半導体基板と、
前記半導体基板上に設けられた第１絶縁膜と、
前記第１絶縁膜上に設けられた帯状のｎ型或いはアンドープ単結晶ゲルマニウム層と、
帯状の前記ｎ型或いはアンドープ単結晶ゲルマニウム層の側面に形成されたｐ型引き出し電極と、を備え、
前記ｐ型引き出し電極は、電極部と配線部とを有し、
前記電極部の上面は、前記ｎ型或いはアンドープ単結晶ゲルマニウム層の上面と同じ高さで、且つ前記配線部の上面よりも高いことを特徴とする半導体光素子。 A semiconductor substrate;
A first insulating film provided on the semiconductor substrate;
A band-shaped n-type or undoped single crystal germanium layer provided on the first insulating film;
A p-type extraction electrode formed on a side surface of the band-shaped n-type or undoped single crystal germanium layer,
The p-type lead electrode has an electrode portion and a wiring portion,
The semiconductor optical device according to claim 1, wherein an upper surface of the electrode portion is flush with an upper surface of the n-type or undoped single crystal germanium layer and is higher than an upper surface of the wiring portion. - 請求項１記載の半導体光素子において、
前記電極部は、前記ｎ型或いはアンドープ単結晶ゲルマニウム層の側面に順次形成されたｐ型単結晶ゲルマニウム層とｐ型シリコン層との積層構造を有することを特徴とする光半導体光素子。 The semiconductor optical device according to claim 1,
2. The optical semiconductor optical device according to claim 1, wherein the electrode portion has a laminated structure of a p-type single crystal germanium layer and a p-type silicon layer sequentially formed on a side surface of the n-type or undoped single crystal germanium layer. - 請求項１記載の半導体光素子において、
前記ｎ型或いはアンドープ単結晶ゲルマニウム層の上面と同じ高さの第２絶縁膜が、前記配線部の上に形成されていることを特徴とする光半導体光素子。 The semiconductor optical device according to claim 1,
An optical semiconductor optical device, wherein a second insulating film having the same height as the upper surface of the n-type or undoped single crystal germanium layer is formed on the wiring portion. - 請求項１記載の半導体光素子において、
前記ｎ型或いはアンドープ単結晶ゲルマニウム層は、伸張歪を有することを特徴とする光半導体光素子。 The semiconductor optical device according to claim 1,
The optical semiconductor optical device, wherein the n-type or undoped single crystal germanium layer has a tensile strain. - 請求項１記載の半導体光素子において、
前記ｎ型或いはアンドープ単結晶ゲルマニウム層の少なくとも１つの側壁の面方位が、（１００）と等価であることを特徴とする光半導体光素子。 The semiconductor optical device according to claim 1,
An optical semiconductor optical device, wherein a surface orientation of at least one side wall of the n-type or undoped single crystal germanium layer is equivalent to (100). - 請求項１記載の半導体光素子において、
前記ｎ型単結晶ゲルマニウム層は発光層であり、ドーピング濃度が５×１０１８ｃｍ－３以上であることを特徴とする半導体光素子。 The semiconductor optical device according to claim 1,
The n-type single crystal germanium layer is a light emitting layer, and has a doping concentration of 5 × 10 18 cm −3 or more. - 請求項１記載の半導体光素子において、
前記ｎ型単結晶ゲルマニウム層は、前記電極部と接する面と平行な延長線方向での端部において周期構造を有することを特徴とする光半導体光素子。 The semiconductor optical device according to claim 1,
The n-type single crystal germanium layer has a periodic structure at an end portion in an extension line direction parallel to a surface in contact with the electrode portion. - 請求項１記載の半導体光素子において、
前記ｎ型単結晶ゲルマニウム層は、前記電極部と接する面と平行な延長線方向おいて周期構造を有することを特徴とする光半導体光素子。 The semiconductor optical device according to claim 1,
The n-type single crystal germanium layer has a periodic structure in an extension line direction parallel to a surface in contact with the electrode portion. - 請求項１記載の半導体光素子において、
前記アンドープ単結晶半導体層は受光層であり、ドーピング濃度が１×１０１８ｃｍ－３以下であることを特徴とする半導体光素子。 The semiconductor optical device according to claim 1,
The undoped single crystal semiconductor layer is a light receiving layer, and has a doping concentration of 1 × 10 18 cm −3 or less. - 請求項１記載の半導体光素子において、
光導波路が前記第１絶縁膜上に配置され、
前記光導波路は、前記ｎ型或いはアンドープ単結晶ゲルマニウム層と電気的に絶縁され、光学的に結合されることを特徴とする半導体光素子。 The semiconductor optical device according to claim 1,
An optical waveguide is disposed on the first insulating film;
The semiconductor optical device, wherein the optical waveguide is electrically insulated from and optically coupled to the n-type or undoped single crystal germanium layer. - 請求項１記載の半導体光素子において、
前記第１絶縁膜上には、帯状の前記ｎ型単結晶ゲルマニウム層および帯状の前記アンドープ単結晶ゲルマニウム層が直列に配置され、
前記ｎ型単結晶ゲルマニウム層と前記アンドープ単結晶ゲルマニウム層との間に、電気的には互いに絶縁され光学的には結合され、前記ｎ型単結晶ゲルマニウム層からの光信号を前記アンドープ単結晶ゲルマニウム層へ伝搬するための光導波路が更に配置されていることを特徴とする半導体光素子。 The semiconductor optical device according to claim 1,
On the first insulating film, the band-shaped n-type single crystal germanium layer and the band-shaped undoped single crystal germanium layer are arranged in series,
The n-type single crystal germanium layer and the undoped single crystal germanium layer are electrically insulated from each other and optically coupled, and an optical signal from the n-type single crystal germanium layer is transmitted to the undoped single crystal germanium layer. A semiconductor optical device, further comprising an optical waveguide for propagating to the layer. - 請求項１０記載の半導体光素子において、
前記光導波路は、単結晶シリコン層からなることを特徴とする半導体光素子。 The semiconductor optical device according to claim 10, wherein
The semiconductor optical device, wherein the optical waveguide is made of a single crystal silicon layer. - 請求項１０記載の半導体光素子において、
前記光導波路は、非晶質シリコン層からなることを特徴とする半導体光素子。 The semiconductor optical device according to claim 10, wherein
The semiconductor optical device, wherein the optical waveguide is made of an amorphous silicon layer. - 請求項１１記載の半導体光素子において、
前記アンドープ単結晶ゲルマニウム層の伸張歪は、前記ｎ型単結晶ゲルマニウム層の伸張歪よりも大きいことを特徴とする半導体光素子。 The semiconductor optical device according to claim 11,
A semiconductor optical device characterized in that an extension strain of the undoped single crystal germanium layer is larger than an extension strain of the n-type single crystal germanium layer. - 第１絶縁膜上に帯状に形成されたｎ型或いはノンドープ単結晶ゲルマニウム層を有する半導体基板を準備する第１工程と、
帯状の前記ｎ型或いはノンドープ単結晶ゲルマニウム層の両側の側壁を含む表面および前記第１絶縁膜上に前記ｐ型引き出し電極の電極部と配線部となるｐ型半導体層を形成する第２工程と、
前記ｐ型半導体層の上に第２絶縁膜を形成する第３工程と、
前記ｎ型或いはノンドープ単結晶ゲルマニウム層の上部の前記第２絶縁膜と前記ｐ型半導体層と、前記ｎ型或いはノンドープ単結晶ゲルマニウム層を、前記ｎ型或いはノンドープ単結晶ゲルマニウム層から離れた位置での前記第２絶縁膜の表面と概ね一致する高さまで表面から研磨する第４工程と、
を有することを特徴とする半導体光素子の製造方法。 A first step of preparing a semiconductor substrate having an n-type or non-doped single crystal germanium layer formed in a strip shape on the first insulating film;
A second step of forming a p-type semiconductor layer serving as an electrode portion and a wiring portion of the p-type lead electrode on the surface including side walls on both sides of the band-shaped n-type or non-doped single-crystal germanium layer and the first insulating film; ,
A third step of forming a second insulating film on the p-type semiconductor layer;
The second insulating film, the p-type semiconductor layer, and the n-type or non-doped single crystal germanium layer above the n-type or non-doped single crystal germanium layer are separated from the n-type or non-doped single crystal germanium layer. A fourth step of polishing from the surface to a height generally coinciding with the surface of the second insulating film of
A method for producing a semiconductor optical device, comprising: - 請求項１５記載の半導体光素子の製造方法において、
帯状の前記ｎ型或いはノンドープ単結晶ゲルマニウム層は、前記第１絶縁膜をＳＯＩ基板の絶縁膜とし、ライン状に加工された前記ＳＯＩ基板の単結晶シリコン層を核として前記第１絶縁膜上に形成されたものであることを特徴とする半導体光素子の製造方法。 In the manufacturing method of the semiconductor optical device according to claim 15,
The band-shaped n-type or non-doped single crystal germanium layer is formed on the first insulating film with the first insulating film as an insulating film of the SOI substrate and the single crystal silicon layer of the SOI substrate processed into a line shape as a nucleus. A method of manufacturing a semiconductor optical device, wherein the semiconductor optical device is formed. - 請求項１５記載の半導体光素子の製造方法において、
前記半導体基板は単結晶シリコン基板であり、
帯状の前記ｎ型或いはノンドープ単結晶ゲルマニウム層は、前記単結晶シリコン基板の上に形成された前記第１絶縁膜に設けられたライン状の開口部から露出する前記単結晶シリコン基板の表面を核として前記第１絶縁膜上に形成されたものであることを特徴とする半導体光素子の製造方法。 In the manufacturing method of the semiconductor optical device according to claim 15,
The semiconductor substrate is a single crystal silicon substrate;
The band-shaped n-type or non-doped single crystal germanium layer is formed by nucleating the surface of the single crystal silicon substrate exposed from a line-shaped opening provided in the first insulating film formed on the single crystal silicon substrate. A method of manufacturing a semiconductor optical device, wherein the method is formed on the first insulating film. - 請求項１５記載の半導体光素子の製造方法において、
前記ｎ型或いはノンドープ単結晶ゲルマニウム層は、前記第１絶縁膜をＧＯＩ基板の絶縁膜とし、前記ＧＯＩ基板の単結晶ゲルマニウム層を導波路状に加工して形成されたものであることを特徴とする半導体光素子の製造方法。 In the manufacturing method of the semiconductor optical device according to claim 15,
The n-type or non-doped single crystal germanium layer is formed by using the first insulating film as an insulating film of a GOI substrate and processing the single crystal germanium layer of the GOI substrate into a waveguide shape. A method for manufacturing a semiconductor optical device. - 請求項１５記載の半導体光素子の製造方法は、
前記第１絶縁膜上に光導波路を形成する工程、を更に有することを特徴とする半導体光素子の製造方法。 The method for producing a semiconductor optical device according to claim 15 comprises:
The method of manufacturing a semiconductor optical device, further comprising: forming an optical waveguide on the first insulating film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/JP2015/058911 WO2016151759A1 (en) | 2015-03-24 | 2015-03-24 | Semiconductor optical element and method for manufacturing same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/JP2015/058911 WO2016151759A1 (en) | 2015-03-24 | 2015-03-24 | Semiconductor optical element and method for manufacturing same |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2016151759A1 true WO2016151759A1 (en) | 2016-09-29 |
Family
ID=56978621
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/JP2015/058911 WO2016151759A1 (en) | 2015-03-24 | 2015-03-24 | Semiconductor optical element and method for manufacturing same |
Country Status (1)
| Country | Link |
|---|---|
| WO (1) | WO2016151759A1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109979949A (en) * | 2017-12-27 | 2019-07-05 | 瑞萨电子株式会社 | Semiconductor device and its manufacturing method |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60162207A (en) * | 1984-02-01 | 1985-08-24 | Hitachi Ltd | Optical waveguide and its manufacture |
| JP2005530360A (en) * | 2002-06-19 | 2005-10-06 | マサチューセッツ・インスティチュート・オブ・テクノロジー | Ge photodetector |
| WO2010055750A1 (en) * | 2008-11-12 | 2010-05-20 | 株式会社日立製作所 | Light emitting element, light receiving element, and method for manufacturing the light receiving element |
| JP2010238722A (en) * | 2009-03-30 | 2010-10-21 | Hitachi Ltd | Silicon light-emitting element |
| WO2013088490A1 (en) * | 2011-12-12 | 2013-06-20 | 株式会社日立製作所 | Semiconductor optical element |
| US20130202005A1 (en) * | 2012-02-07 | 2013-08-08 | Apic Corporation | Laser using locally strained germanium on silicon for opto-electronic applications |
| JP2013207231A (en) * | 2012-03-29 | 2013-10-07 | Hitachi Ltd | Semiconductor device and manufacturing method of the same |
| JP2014183055A (en) * | 2013-03-18 | 2014-09-29 | Hitachi Ltd | Light emitter, and method of manufacturing the same |
-
2015
- 2015-03-24 WO PCT/JP2015/058911 patent/WO2016151759A1/en active Application Filing
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60162207A (en) * | 1984-02-01 | 1985-08-24 | Hitachi Ltd | Optical waveguide and its manufacture |
| JP2005530360A (en) * | 2002-06-19 | 2005-10-06 | マサチューセッツ・インスティチュート・オブ・テクノロジー | Ge photodetector |
| WO2010055750A1 (en) * | 2008-11-12 | 2010-05-20 | 株式会社日立製作所 | Light emitting element, light receiving element, and method for manufacturing the light receiving element |
| JP2010238722A (en) * | 2009-03-30 | 2010-10-21 | Hitachi Ltd | Silicon light-emitting element |
| WO2013088490A1 (en) * | 2011-12-12 | 2013-06-20 | 株式会社日立製作所 | Semiconductor optical element |
| US20130202005A1 (en) * | 2012-02-07 | 2013-08-08 | Apic Corporation | Laser using locally strained germanium on silicon for opto-electronic applications |
| JP2013207231A (en) * | 2012-03-29 | 2013-10-07 | Hitachi Ltd | Semiconductor device and manufacturing method of the same |
| JP2014183055A (en) * | 2013-03-18 | 2014-09-29 | Hitachi Ltd | Light emitter, and method of manufacturing the same |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109979949A (en) * | 2017-12-27 | 2019-07-05 | 瑞萨电子株式会社 | Semiconductor device and its manufacturing method |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| Vivien et al. | Handbook of silicon photonics | |
| US4398343A (en) | Method of making semi-amorphous semiconductor device | |
| US20070262296A1 (en) | Photodetectors employing germanium layers | |
| JP5489387B2 (en) | Semiconductor device having a unique contact scheme with reduced defects in the active region | |
| TWI427830B (en) | Method of making photonic device | |
| WO2013111173A1 (en) | Semiconductor light receiving element and light receiver | |
| JP5917978B2 (en) | Semiconductor device and manufacturing method thereof | |
| TW201338020A (en) | Laser using locally strained germanium on silicon for opto-electronic applications | |
| US9222169B2 (en) | Silicon oxide-nitride-carbide thin-film with embedded nanocrystalline semiconductor particles | |
| WO2011111436A1 (en) | Germanium light-emitting element | |
| JP2003152207A (en) | Photoelectric conversion element and its manufacturing method | |
| JP6091273B2 (en) | Semiconductor device and manufacturing method thereof | |
| WO2013118327A1 (en) | Semiconductor optical element | |
| JP6033714B2 (en) | Semiconductor optical device and manufacturing method thereof | |
| KR20100055187A (en) | Method for manufacturing a gallium oxide substrate, light emitting device and method for fabricating the same | |
| CN111564756B (en) | Silicon-based non-phosphorus laser and preparation method thereof | |
| WO2016151759A1 (en) | Semiconductor optical element and method for manufacturing same | |
| CN111430499A (en) | Photoelectric integrated device and preparation method thereof | |
| JP6228874B2 (en) | Semiconductor optical device | |
| JP3666683B2 (en) | Light emitting device and manufacturing method thereof | |
| US8653501B2 (en) | Emitting device and manufacturing method therefor | |
| JP6228873B2 (en) | Semiconductor optical device manufacturing method | |
| US20210098651A1 (en) | Silicon-based direct bandgap light-emitting material and preparation method thereof, and on-chip light-emitting device | |
| Park et al. | High concentration phosphorus doping in Ge for CMOS-integrated laser applications | |
| WO2012046329A1 (en) | Semiconductor device and method of production thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 15886312 Country of ref document: EP Kind code of ref document: A1 |
|
| NENP | Non-entry into the national phase |
Ref country code: DE |
|
| 122 | Ep: pct application non-entry in european phase |
Ref document number: 15886312 Country of ref document: EP Kind code of ref document: A1 |
|
| NENP | Non-entry into the national phase |
Ref country code: JP |