WO2016086849A1 - Low-complexity adjustable filter bank for digital hearing aid and operating method therefor - Google Patents

Low-complexity adjustable filter bank for digital hearing aid and operating method therefor Download PDF

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WO2016086849A1
WO2016086849A1 PCT/CN2015/096155 CN2015096155W WO2016086849A1 WO 2016086849 A1 WO2016086849 A1 WO 2016086849A1 CN 2015096155 W CN2015096155 W CN 2015096155W WO 2016086849 A1 WO2016086849 A1 WO 2016086849A1
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module
multiplier
register
adder
signal
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PCT/CN2015/096155
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Chinese (zh)
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魏莹
刘德宝
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山东大学
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R25/00—Deaf-aid sets, i.e. electro-acoustic or electro-mechanical hearing aids; Electric tinnitus maskers providing an auditory perception

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  • the invention relates to a low complexity tunable filter bank for a digital hearing aid and a method of its operation.
  • the auditory system is a very sensitive and complex network. Diseases, drugs, noise, trauma and aging can cause varying degrees of hearing loss, making hearing impairment one of the most common sensory disturbances in the world.
  • the most effective way to compensate for hearing loss is to use a hearing aid system.
  • the hearing aid system is a combination of speech amplification, noise reduction, feedback suppression, automatic program switching and environmental adaptation.
  • the basic function of a hearing aid is to selectively amplify the sound and then transmit the processed signal to the ear [[1] Aage R. Moller, Hearing: Anatomy, Physiology and Disorders of the Auditory System, Academic Press, 2nd edition, September 11, 2006.].
  • an analog sound signal is converted into a digital signal by an A/D converter, and then divided into branch signals of different frequency bands by a filter bank to facilitate further amplification and other processing
  • the azimuth wave digital filter bank (LWDFB) is applied to a hearing aid [[4] Meng Tong Tan, JSChang, and Yit Chow Tong, "A novel low-voltage low-power wave digital filter bank for an intelligent noise reduction digital hearing instrument , IEEE International Symposium on Circuits and Systems, vol. 2, pp. 681-684, 06-09 May 2001, Sydney.
  • the lattice digital filter bank has lower complexity than the FIR filter bank and is insensitive to coefficients.
  • MDLNS multidimensional logarithmic systems
  • the 1/3 octave filter bank achieves coverage of the hearing frequency range, which is based on the IIR structure and therefore cannot Provide a linear response.
  • a non-uniform filter bank has better performance in terms of hearing compensation than a uniform filter bank, however, the complexity of a non-uniform filter bank is typically much higher than the complexity of a uniform filter bank.
  • variable filter bank has been proposed [[13]TBDeng, "Three-channel variable filter-bank for digital hearing aids" IET Signal Processing, vol. 4, no. 2, pp. 181-196 , Apr.2010.][[14]Noboru Ito and Tian-Liang Deng, "Variable-Bandwidth Filter-Bank for Low-Power Hearing Aids," 3rd International Congress on Image and Signal Processing, pp. 3207-3201, 2010.
  • the variable filter bank has a lower complexity due to the use of the IIR structure.
  • the object of the present invention is to solve the above problems, and to provide a low complexity tunable filter bank for a digital hearing aid and a working method thereof, which have the advantages of low complexity and small delay.
  • a low complexity tunable filter bank for digital hearing aids including a masking module and a multi-passband generating module that are sequentially connected,
  • the masking module is configured to divide the received sound signal into three regions of low frequency, intermediate frequency and high frequency according to frequency.
  • the multi-passband generating module is configured to provide three different sub-band decomposition states for each of the low frequency, intermediate frequency and high frequency regions, and then output the sub-band signals;
  • the three different subband decomposition states are:
  • Decomposition state 1 Decompose each region into subbands with a bandwidth of ⁇ /3;
  • Decomposition state 2 uniformly decompose each region into two sub-bands with a bandwidth of ⁇ /6;
  • Decomposition state three Each region is evenly decomposed into four sub-bands with a bandwidth of ⁇ /12.
  • a low complexity tunable filter bank for digital hearing aids including a masking module and a multi-passband generating module that are sequentially connected,
  • the masking module includes a masking filter module based on a prototype filter F(z) and three registers, based on a prototype filter
  • the input of the masking filter module of F(z) receives the input signal, and the masking filter module based on the prototype filter F(z) has two outputs, which are the original output of the prototype filter F(z) and ⁇ /2 respectively.
  • the original output terminal is connected to the input end of the first register, the output end of the first register is connected to the first contact of the single-pole three-throw switch S1, and the ⁇ /2 symmetric output terminal is connected to the second register
  • the input end of the second register is connected to the second contact of the single-pole three-throw switch S1, and the input signal is also connected to the input end of the first adder, the output of the first adder and the second addition
  • the input of the second adder is connected to the input of the third register, and the output of the third register is connected to the third contact of the single-pole triple-throw switch S1, the first addition
  • the input of the device is also connected to the original output of the masking filter module based on the prototype filter F(z), and the input of the second adder is also connected to the ⁇ /2 symmetric output of the prototype filter F(z) ;
  • the multi-pass band generating module includes a single-pole double-throw switch S2, and a first contact of the single-pole double-throw switch S2 is connected to an input end of the fourth register,
  • the second contact of the single-pole double-throw switch S2 is connected to the input end of the first fractional interpolation filter module, and the original output end of the first fractional interpolation filter module is connected to the input end of the fourth register, the first fraction
  • the complementary output end of the interpolation filter module is connected to one end of the first single-pole single-throw switch S4, and the other end of the first single-pole single-throw switch S4 is connected to the input end of the fourth register;
  • the second contact of the single-pole double-throw switch S2 is further connected to the input end of the second fractional interpolation filter module and the input end of the third fractional interpolation filter module through the first single-pole single-throw switch S3;
  • An output end of the second fractional interpolation filter module is connected to an input end of the fourth register
  • the original output end of the third fractional interpolation filter module is connected to the input end of the third adder, and the output end of the third adder is connected to the input end of the fourth register; the input end of the third adder Also connected to the original output end of the first fractional interpolation filter module;
  • the complementary output end of the third fractional interpolation filter module is connected to the input end of the fourth register;
  • the original output end of the first fractional interpolation filter module is connected to the input end of the fourth adder, and the complementary output end of the third fractional interpolation filter module is connected to the input end of the fourth adder, the fourth An output of the adder is coupled to the fourth register, the fourth register outputting a signal;
  • the knife of the single-pole triple-throw switch S1 is connected to the knife of the single-pole double-throw switch S2.
  • the first fractional interpolation filter module includes an input end, a first fractional interpolation filter module original output end, and a first fractional interpolation filter module complement output end, and the input end sequentially passes through the module D and the adder A1. Connected to the first fractional interpolation filter module complement output, the input is also connected to the module D&A-1 by a number of parallel multipliers, module D&A-1 Connected to the original output of the first fractional interpolation filter module;
  • the plurality of parallel multipliers include a multiplier h (N-1)/2 , a multiplier h (N-3)/2 , a multiplier h (N-5)/2 and so on, up to the multiplier h 0 ; N is an odd number; N is the length of the prototype filter H(z);
  • the module D is a plurality of shift registers;
  • the module D&A-1 is a register group and an adder including serially and sequentially alternating;
  • the adder connected to /2 is the center of symmetry.
  • Multiplier h 0 when (N-1)/2 is even) or multiplier h 1 (when (N-1)/2 is odd) is connected to the first register bank at one end of module D&A-1, multiplication H 0 (when (N-1)/2 is even) or multiplier h 1 (when (N-1)/2 is odd) is connected to the first adder at the other end of module D&A-1;
  • the structure diagram takes (N-1)/2 as an even number as an example)
  • the input of the adder A1 is also connected to the complementary input of the first fractional interpolation filter module.
  • the second fractional interpolation filter module includes an input end and an output end of the second fractional interpolation filter module, and the input end is further connected to the module D&A-2 by a plurality of parallel multipliers, the module D&A-2 and The output of the second fractional interpolation filter module is connected;
  • the plurality of parallel multipliers include a multiplier h (N-1)/2 , a multiplier h (N-3)/2 , a multiplier h (N-5)/2 , and a multiplier h (N-7) /2 and so on, up to the multiplier h 0 ; the multiplier h (N-1)/2 is connected to only one adder; each multiplier is connected to two adders except h (N-1)/2 .
  • the adders are symmetrical centers with adders connected by h (N-1)/2 in position.
  • the module D is a plurality of shift registers; the module D&A-2 is a register group and an adder including serially and sequentially alternating;
  • the multiplier h 0 is connected to the first register bank at one end of the module D&A-2, and the multiplier h 0 is connected to the first adder at the other end of the module D&A-2; (the structure diagram is evenly numbered (N-1)/2 Time as an example)
  • the third fractional interpolation filter module includes an input end, a third fractional interpolation filter module original output end, and a third fractional interpolation filter module complement output end, and the input end passes through the module D and the adder A2 in sequence. Connected to the third fractional interpolation filter module complement output, the input is also connected to the module D&A-3 by a number of parallel multipliers, module D&A-3 Connected to the original output of the third fractional interpolation filter module;
  • the plurality of parallel multipliers include a multiplier h (N-1)/2 , a multiplier h (N-7)/2 , a multiplier h (N-13)/2, and so on, until the multiplier N is an odd number.
  • the module D is a plurality of shift registers
  • the module D&A-3 is a register group and an adder including serially and sequentially alternating;
  • the adders are symmetrical centers with adders connected by h (N-1)/2 in position.
  • Multiplier Connect to the first register bank at one end of the D&A-3 module; multiplier Connected to the first adder on the other end of the D&A-3 module; Divide (N-1)/2 by the remainder of 3;
  • the input of the adder A2 is also connected to the original output of the third fractional interpolation filter module.
  • the masking module divides the signal into three equal uniform frequency bands, and the three equal uniform frequency bands are a low frequency region, a high frequency region, and an intermediate frequency region, respectively;
  • the transfer function F 1 (z) of the low frequency region is expressed as:
  • the transfer function F 3 (z) of the high frequency region is expressed as:
  • F h (z) represents a high-pass filter symmetrical with F(z) at ⁇ /2;
  • the transfer function F 2 (z) of the intermediate frequency region is expressed as:
  • a working method for a low complexity tunable filter bank for a digital hearing aid comprising the steps of:
  • Step (1) The masking module divides the received sound signal into three regions of low frequency, intermediate frequency and high frequency according to frequency.
  • Step (2) the multi-passband generating module is configured to provide three different sub-band decomposition states for the low frequency, intermediate frequency and high frequency regions, and then output the sub-band signals;
  • the three different subband decomposition states are:
  • Decomposition state 1 Decompose each region into subbands with a bandwidth of ⁇ /3;
  • Decomposition state 2 uniformly decompose each region into two sub-bands with a bandwidth of ⁇ /6;
  • Decomposition state three Each region is evenly decomposed into four sub-bands with a bandwidth of ⁇ /12.
  • a working method for a low complexity tunable filter bank for a digital hearing aid comprising the steps of:
  • Step (1) After receiving the input signal, the prototype filtering module processes the signal to obtain signals of three frequency regions, the signal frequency range of the low frequency region is (0, ⁇ /3), and the signal frequency range of the intermediate frequency region is ( ⁇ ) /3,2 ⁇ /3), the signal frequency range of the high frequency region is (2 ⁇ /3, ⁇ ); the signal of the low frequency region is stored in the first register, and the signal of the intermediate frequency region is stored in the second register, and the high frequency region is The signal is stored in the third register;
  • the knife of the single-pole three-throw switch S1 hits the first contact of the single-pole three-throw switch S1, and at this time, w 1 is 00;
  • the knife of the single-pole three-throw switch S1 hits the second contact of the single-pole three-throw switch S1, and at this time, w 1 is 01;
  • the knife of the single-pole double-throw switch S2 hits the first contact of the single-pole double-throw switch S2, and at this time, w 2 is 0;
  • the knife of the single-pole double-throw switch S2 hits the second contact of the single-pole double-throw switch S2, and at this time, w 2 is 1;
  • the single pole single throw switch S3 is opened, and the single pole single throw switch S4 is closed, at this time, w 3 is 0;
  • the single pole single throw switch S3 is closed, and the single pole single throw switch S4 is opened, at this time, w 3 is 1;
  • the low-frequency area sub-band signal is the signal output by the shadow filtering module, and the sub-band signal is stored in the fourth register;
  • the intermediate frequency zone subband signal is the signal output by the shadow filtering module, and the subband signal is stored in the fourth register;
  • the intermediate frequency region is evenly divided into four subbands with a bandwidth of ⁇ /12 by the first, second and third fractional interpolation filtering modules and subsequent adders. , the subband signal is stored to the fourth register;
  • the high frequency region subband signal is the signal output by the shadow filtering module, and the subband signal is stored in the fourth register;
  • the subband signal is stored in the fourth register;
  • the transfer function of the low frequency region is:
  • the transfer function of the intermediate frequency region is:
  • the transfer function of the high frequency region is:
  • Step (3) Signal output of the fourth register.
  • the present invention has low complexity and small delay, and can change the division state of the frequency band without changing the filter bank structure by controlling the parameters, thereby realizing the target of sound decomposition according to the hearing loss characteristic of the patient.
  • the 2 fractional interpolation allows the present invention to use a small number of prototype filters to build the system, thereby reducing complexity.
  • the entire frequency range is divided into three regions, each of which has three different sub-band decomposition states.
  • the example shows that the filter bank can meet various hearing loss requirements with acceptable delay.
  • Figure 1 shows the frequency response of the fractional interpolation filter and the masking filter
  • Figure 2 is a diagram showing the structure of a filter bank of the present invention.
  • Figure 3 is a flow chart of the method of the present invention.
  • 4(a) is a schematic diagram showing the generation of sub-bands in the exploded state 1 of the present invention
  • 4(b) and 4(c) are schematic diagrams showing the generation of sub-bands in the exploded state 2 of the present invention.
  • 4(d), 4(e), 4(f), 4(g), and 4(h) are schematic diagrams showing the generation of sub-bands in the exploded state 3 of the present invention.
  • Figure 5 is a schematic diagram of the implementation of F(z) and F h (z);
  • Figure 6 is a structural diagram of the fractional interpolation module ((N-1)/2 is an even number);
  • Figure 7 (a) is an audiogram of Example 1 under high frequency mild hearing loss
  • Figure 7 (b) is a schematic diagram of the amplitude response of the filter bank of Example 1;
  • Figure 8 (a) is an audiogram of Example 2 under mild hearing loss in all bands
  • Fig. 8(b) is a schematic diagram showing the amplitude response of the filter bank of Example 2.
  • the filter bank algorithm proposed by the present invention is based on fractional interpolation [R. Mahesh and APVinod, "Coefficient decimation approach for realizing reconfigurable finite impulse response filters," Proceedings of IEEE international symposium on circuits and syatems, pp. 81-84, seattle USA , May 2008.].
  • For a prototype filter combine the coefficients of each D prototype filter and discard the remaining coefficients that are not selected, then insert M-1 zeros between the two coefficients to form a fractional interpolation filter H.
  • the coefficient of (z M/D ). H (z M / D) in response to the magnitude of the number N f of the passband by the interpolation factor M is determined, as shown in Equation (1),
  • the bandwidth of the i-th passband, B w (i), is determined by the ratio of the decimation factor D to the interpolation factor M, as shown in equation (2).
  • the passband generated by fractional interpolation is extracted by a masking filter.
  • the center frequency of the passband in addition to the first and last, should coincide with the 3dB cutoff frequency of the masking filter.
  • Different fractional interpolation filters can be directly assigned to different masking filters.
  • the masking filter is preferably reusable.
  • the center of the pass band is fixed as long as the interpolation factor is determined. This suggests that passbands generated by fractional interpolation filters with the same interpolation factor may be extracted using the same masking filter. This idea is shown in Figure 1. The figure shows two fractional interpolation filters.
  • the center frequency of the passband is the same.
  • the other passbands are divided into two parts by two adjacent masking filters, which can share the same set of masking filters.
  • the masking filter covers the entire frequency range together and the number is M.
  • the present invention designs a novel tunable filter bank algorithm for hearing aids.
  • the entire frequency range is evenly divided into three regions, a low frequency region (0, ⁇ /3), an intermediate frequency region ( ⁇ /3, 2 ⁇ /3), and a high frequency region (2 ⁇ /3, ⁇ ).
  • Each region has three types.
  • the band decomposition state is available for selection.
  • Decomposition state 2 two subbands with a bandwidth of ⁇ /6
  • the structure diagram of the proposed filter is shown in Figure 2. It has two functional blocks, namely a passband generation module and a masking module. Since the order of the cascade does not affect the final result, in order to reduce the delay, the present invention places the masking module in front of the multi-channel generating module. In order to balance the group delay, an appropriate number of delay units should be added to the branch, which is not shown in the figure.
  • the low complexity tunable filter bank for the digital hearing aid comprises a masking module and a multi-passband generating module which are sequentially connected,
  • the masking module includes a masking filter module based on the prototype filter F(z) and three registers, and an input signal of the masking filter module based on the prototype filter F(z) receives an input signal based on the prototype filter F(z)
  • the masking filter module has two inputs The output end is the original output end of the prototype filter F(z) and the ⁇ /2 symmetrical output end, respectively, the original output end is connected to the input end of the first register, and the output end of the first register is connected to the single-pole three-throw a first contact of the switch S1, the ⁇ /2 symmetrical output is connected to the input end of the second register, and the output of the second register is connected to the second contact of the single-pole three-throw switch S1, and the input signal is also first An input of the adder is connected, an output of the first adder is connected to an input of the second adder, and an output of the second adder is connected to an input of the third register, the third register The output terminal is connected to the third contact of the
  • the multi-pass band generating module includes a single-pole double-throw switch S2, and a first contact of the single-pole double-throw switch S2 is connected to an input end of the fourth register,
  • the second contact of the single-pole double-throw switch S2 is connected to the input end of the first fractional interpolation filter module, and the original output end of the first fractional interpolation filter module is connected to the input end of the fourth register, the first fraction
  • the complementary output end of the interpolation filter module is connected to one end of the first single-pole single-throw switch S4, and the other end of the first single-pole single-throw switch S4 is connected to the input end of the fourth register;
  • the second contact of the single-pole double-throw switch S2 is further connected to the input end of the second fractional interpolation filter module and the input end of the third fractional interpolation filter module through the first single-pole single-throw switch S3;
  • An output end of the second fractional interpolation filter module is connected to an input end of the fourth register
  • the original output end of the third fractional interpolation filter module is connected to the input end of the third adder, and the output end of the third adder is connected to the input end of the fourth register; the input end of the third adder Also connected to the original output end of the first fractional interpolation filter module;
  • the complementary output end of the third fractional interpolation filter module is connected to the input end of the fourth register;
  • the original output end of the first fractional interpolation filter module is connected to the input end of the fourth adder, and the complementary output end of the third fractional interpolation filter module is connected to the input end of the fourth adder, the fourth An output of the adder is coupled to the fourth register, the fourth register outputting a signal;
  • the knife of the single-pole triple-throw switch S1 is connected to the knife of the single-pole double-throw switch S2.
  • a working method for a low complexity tunable filter bank for a digital hearing aid comprising the steps of:
  • Step (1) The masking module divides the received sound signal into three regions of low frequency, intermediate frequency and high frequency according to frequency.
  • Step (2) the multi-passband generating module is configured to provide three different sub-band decomposition states for the low frequency, intermediate frequency and high frequency regions, and then output the sub-band signals;
  • the three different subband decomposition states are:
  • Decomposition state 1 Decompose each region into subbands with a bandwidth of ⁇ /3;
  • Decomposition state 2 uniformly decompose each region into two sub-bands with a bandwidth of ⁇ /6;
  • Decomposition state three Each region is evenly decomposed into four sub-bands with a bandwidth of ⁇ /12.
  • a working method for a low complexity tunable filter bank for a digital hearing aid comprising the steps of:
  • Step (1) After receiving the input signal, the prototype filtering module processes the signal to obtain signals of three frequency regions, the signal frequency range of the low frequency region is (0, ⁇ /3), and the signal frequency range of the intermediate frequency region is ( ⁇ ) /3,2 ⁇ /3), the signal frequency range of the high frequency region is (2 ⁇ /3, ⁇ ); the signal of the low frequency region is stored in the first register, and the signal of the intermediate frequency region is stored in the second register, and the high frequency region is The signal is stored in the third register;
  • the knife of the single-pole three-throw switch S1 hits the first contact of the single-pole three-throw switch S1, and at this time, w 1 is 00;
  • the knife of the single-pole three-throw switch S1 hits the second contact of the single-pole three-throw switch S1, and at this time, w 1 is 01;
  • the knife of the single-pole double-throw switch S2 hits the first contact of the single-pole double-throw switch S2, and at this time, w 2 is 0;
  • the knife of the single-pole double-throw switch S2 hits the second contact of the single-pole double-throw switch S2, and at this time, w 2 is 1;
  • the single pole single throw switch S3 is opened, and the single pole single throw switch S4 is closed, at this time, w 3 is 0;
  • the single pole single throw switch S3 is closed, and the single pole single throw switch S4 is opened, at this time, w 3 is 1;
  • the low-frequency area sub-band signal is the signal output by the shadow filtering module, and the sub-band signal is stored in the fourth register;
  • the intermediate frequency region subband signal is the signal output by the shadow filtering module, and the subband signal is stored in the fourth register;
  • the intermediate frequency region is evenly divided into four subbands with a bandwidth of ⁇ /12 by the first, second and third fractional interpolation filtering modules and subsequent adders. , the subband signal is stored to the fourth register;
  • the high frequency region subband signal is the signal output by the shadow filtering module, and the subband signal is stored in the fourth register;
  • the subband signal is stored in the fourth register;
  • the purpose of the masking module is to extract the required passband with a 3db cutoff frequency of ⁇ /3 for the prototype filter F(z). Based on F(z), masking filters for the various frequency segments can be obtained, which divide the entire frequency range into three uniform regions.
  • the 'o' port in the sub-filter produces the output of the original filter F(z), and the 'h' port produces an output of the high-pass filter (denoted as F h (z)) symmetrical with F(z) ⁇ /2 .
  • This high pass filter can be easily obtained from the original filter, which will be discussed later.
  • the outputs of F 1 (z), F 2 (z) and F 3 (z) are saved and transmitted to the passband generation module one by one in accordance with the 2-bit selection signal w 1 of the switch S 1 . If w 1 is 00, the low frequency region is selected, if w 1 is 01, the intermediate frequency region is selected, and if w 1 is 10, the high frequency region is selected.
  • H(z) and its fractional interpolation filter form a multi-channel production module whose function is to generate multiple passbands.
  • the 'o' port of the interpolation filter provides the original output, and the 'c' port provides the output of the complementary filter. Since the number of masking filters is the same as the number of interpolation factors, M is equal to 3.
  • the generation of the sub-bands is shown in Figures 4(a) - 4(h). The output of this module is recorded as Indicates the jth subband of the decomposition state i in the region r.
  • the masking filter itself produces a uniform subband with a bandwidth of ⁇ /3, so no new fractional interpolation is needed.
  • the filter is shown in Figure 4(a).
  • the half pass band is Generated, half passband
  • the complementary filter is generated and then extracted using a masking filter as shown in Figures 4(b) and 4(c).
  • the 3dB bandwidth cutoff frequencies of H(z) and F(z) are ⁇ hc and ⁇ fc , respectively, in order to generate a uniform passband with a bandwidth of ⁇ /6 (half of the F(z) bandwidth)
  • equation (2) and Figure 4 (b) the following formula is established,
  • the cutoff frequencies of both the prototype filters F(z) and H(z) are ⁇ /3 and ⁇ /4, respectively.
  • the stop band edge of F 1 (z), ⁇ fs should be
  • the left pass band edge ⁇ n of the second-order pass band is small, as shown in Fig. 4(f),
  • switches S 2 , S 3 and S 4 are controlled by parameters w 2 and w 3 .
  • the state of switch S 4 is opposite to the state of S 3 and can be controlled by the complement signal of w 3 .
  • the control signals for S 2 , S 3 and S 4 and the corresponding inputs and outputs are given in Table 1.
  • control signal W [w 1 w 2 w 3 ] is 1010
  • the decomposition state 2 is used in the region 3. Since there are three regions, according to this structure, it takes three rounds to get all the outputs. The output of each round is saved and waits for the final output.
  • the filter bank proposed by the present invention can be effectively implemented.
  • the prototype filters F(z) and H(z) are both linear phase odd length FIR filters.
  • the coefficients of F(z) and H(z) are [f 0 , f 1 , . . . , f N ] and [h 0 , h 1 , . . . , h L ], where N and L are the order of the filter. Number, can be obtained,
  • the original filter and its symmetrical filter at ⁇ /2 can be integrated, as shown in Figure 5.
  • F h (z) can be generated by alternately changing the F(z) coefficient symbol, so the multiplier can be shared.
  • the implementation of the fractional interpolation filters and their complementary filters needs to be considered.
  • a prototype filter in the form of a transposition is used.
  • Each D output of the multiplier is selected to form a multiplier output of the decimation filter, and interpolation is obtained by replacing the single delay original of the original filter with M delay primitives.
  • Figure 6 shows the physical architecture of the fractional interpolation filter (assuming the prototype filter is of length N and (N+1)/2 is an even number; if it is an odd number, the switch S 3 at the multiplier with the coefficient h 0 in the figure is removed )
  • the first fractional interpolation filter module includes an input end, a first fractional interpolation filter module original output end, and a first fractional interpolation filter module complement output end, and the input end passes through Module D and adder A1 are coupled to a first fractional interpolation filter module complement output, which is also coupled to module D&A-1 by a number of parallel multipliers, module D&A-1 and first fractional interpolation filtering The original output of the module is connected;
  • the plurality of parallel multipliers include a multiplier h (N-1)/2 , a multiplier h (N-3)/2 , a multiplier h (N-5)/2 and so on, up to the multiplier h 0 ; N is an odd number; N is the length of the prototype filter H(z);
  • the module D is a plurality of shift registers;
  • the module D&A-1 is a register group and an adder including serially and sequentially alternating;
  • Each multiplier is connected to two adders except h (N-1)/2 , which are symmetrical centers with adders connected by h (N-1)/2 in position.
  • Multiplier h 0 when (N-1)/2 is even) or multiplier h 1 (when (N-1)/2 is odd) is connected to the first register bank at one end of module D&A-1, multiplication H 0 (when (N-1)/2 is even) or multiplier h 1 (when (N-1)/2 is odd) is connected to the first adder at the other end of module D&A-1;
  • the structure diagram takes (N-1)/2 as an even number as an example)
  • the input of the adder A1 is also connected to the complementary input of the first fractional interpolation filter module.
  • the second fractional interpolation filter module includes an input end and an output end of the second fractional interpolation filter module, and the input end is further connected to the module D&A-2 by a plurality of parallel multipliers, the module D&A-2 and The output of the second fractional interpolation filter module is connected;
  • the plurality of parallel multipliers include a multiplier h (N-1)/2 , a multiplier h (N-3)/2 , a multiplier h (N-5)/2 , and a multiplier h (N-7) /2 and so on, up to the multiplier h 0 ; each multiplier is connected to two adders except h (N-1)/2 , which are in position h (N-1)/2 The connected adder is the center of symmetry.
  • the module D is a plurality of shift registers; the module D&A-2 is a register group and an adder including serially and sequentially alternating;
  • the multiplier h 0 is connected to the first register bank at one end of the module D&A-2, and the multiplier h 0 is connected to the first adder at the other end of the module D&A-2; (the structure diagram is evenly numbered (N-1)/2 Time as an example)
  • the third fractional interpolation filter module includes an input end, a third fractional interpolation filter module original output end, and a third fractional interpolation filter module complement output end, and the input end passes through the module D and the adder A2 in sequence.
  • the input terminal is also connected to the module D&A-3 through a plurality of parallel multipliers, the original output end of the module D&A-3 and the third fractional interpolation filter module connection;
  • the plurality of parallel multipliers include a multiplier h (N-1)/2 , a multiplier h (N-7)/2 , a multiplier h (N-13)/2, and so on, until the multiplier N is an odd number.
  • the module D is a plurality of shift registers
  • the module D&A-3 is a register group and an adder including serially and sequentially alternating;
  • the adders are symmetrical centers with adders connected by h (N-1)/2 in position.
  • Multiplier Connect to the first register bank at one end of the D&A-3 module; multiplier Connected to the first adder on the other end of the D&A-3 module; Divide (N-1)/2 by the remainder of 3;
  • the input of the adder A2 is also connected to the original output of the third fractional interpolation filter module.
  • the cutoff frequency of F(z) is ⁇ /3
  • the cutoff frequency of H(z) is ⁇ /4. It can be seen from equation (19) that the sum of the transition bandwidths of the two prototype filters does not exceed ⁇ /6 at most.
  • the passband edges of F(z) and H(z) are (0.3 ⁇ , 0.3667 ⁇ ) and (0.2 ⁇ , 0.3 ⁇ ), respectively, the ideal passband ripple is 0.005, and the stopband attenuation is -50dB.
  • Figure 7(a) shows a hearing sensitivity map from which the present invention compensates for the right ear hearing threshold (represented by 'O').
  • the slope of the threshold curve is large in the region of the intermediate frequency range, so the present invention places more sub-bands in this region. Since the hearing is better in the low frequency region, a wider sub-band can be used in the low frequency region.
  • the decomposition plans of the regions 1, 2, and 3 are decomposition state 1, decomposition state 3, and decomposition state 2, respectively. Total A total of 7 sub-bands are produced.
  • the amplitude response of the filter bank is given in Figure 7(b).
  • a hearing loss patient with the audiogram of Figure 8(a) can understand a conversation within a distance of 1 to 2 meters. This conversation distance is significantly smaller than a normal hearing person (normal hearing people can understand the distance of the conversation) Up to 12 meters).
  • the hearing threshold curve has higher fluctuations in the low frequency region than in the intermediate frequency and high frequency regions. So consider placing more subbands at low frequencies.
  • the decomposition plans for the regions 1, 2, and 3 are the decomposition state 3, the decomposition state 2, and the decomposition state 1, respectively.
  • Figure 8(b) shows the amplitude response of the filter bank.
  • the filter bank is generated by an F (z) of length 81 and an H (z) of length 69. Since they are all linear phase filters, 76 different coefficients are needed to generate 21 different sub-bands. Table 2 shows the comparison of the complexity of this filter bank with other tunable filter banks (with the same performance specifications). And IIR tunable filter bank [[13]TBDeng, "Three-channel variable filter-bank for digital hearing aids" IET Signal Processing, vol.4, no.2, pp.181-196, Apr.2010.] In contrast, the filter bank described above is slightly less complex, but provides more subbands and has strict linear phase properties.
  • non-uniform filter banks [[9]Yong.Lian, and Ying Wei, "A Computationally Efficient Non-Uniform FIR Digital Filter bank for Hearing Aid,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 52, pp .2754-2762, Dec.2005.] Reduced complexity by 54.1% with configurable filter banks [Ying Wei and Debao Liu, "A Reconfigurable Digital Filterbank for Hearing Aid Systems with a Variety of Sound Wave Decomposition Plans" , IEEE Transactions on Biomedical Engineering, Vol. 60, Issue: 6, pp. 1628–1635, 2013.] The complexity was reduced by 15.6%.

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Abstract

A low-complexity adjustable filter bank for a digital hearing aid and an operating method therefor. The filter bank comprises a masking module and a multi-band generation module which are connected in sequence, wherein the masking module is used for dividing received voice signals into three regions, i.e. a low frequency region, a medium frequency region and a high frequency region in accordance with frequencies, and the multi-band generation module is used for giving three different subband decomposition states to each of the three regions, i.e. the low frequency region, the medium frequency region and the high frequency region, and then outputting subband signals. The three different subband decomposition states comprise: state 1: decomposing each region into subbands of which the bandwidth is π/3; state 2: uniformly decomposing each region into two subbands of which the bandwidth is π/6; and state 3: uniformly decomposing each region into four subbands of which the bandwidth is π/12. The method is low in complexity and small in delay, so that the division states of frequency bands can be changed by controlling parameters in the case where the structure of the filter bank is not changed, thereby achieving the goal of performing voice decomposition according to hearing loss characteristics of a patient.

Description

用于数字助听器的低复杂度可调滤波器组及其工作方法Low complexity tunable filter bank for digital hearing aids and working method thereof 技术领域Technical field
本发明涉及一种用于数字助听器的低复杂度可调滤波器组及其工作方法。The invention relates to a low complexity tunable filter bank for a digital hearing aid and a method of its operation.
背景技术Background technique
听觉***是一个非常敏感和复杂的网络。疾病，药物，噪声，外伤和衰老都可能造成不同程度的听力损失，这使听力障碍成为世界上最常见的感觉障碍之一。补偿听力损失最有效的方法是使用助听器***。助听***是语音放大、降噪、反馈抑制、自动程序切换和环境适应等技术的综合体。助听器的基本功能是选择性的放大声音，然后将处理过的信号传送至耳朵[[1]Aage R.Moller,Hearing:Anatomy,Physiology and Disorders of the Auditory System,Academic Press,2nd edition,September 11,2006.]。在数字助听器中，模拟声音信号经过A/D转换器转换成数字信号，然后通过滤波器组划分成不同频带的支路信号，以利于进一步放大和其他处理[[2]M.A.Hersh and M.A.Johnson et al.,Assistive Technology for the Hearing-Impaired,Deaf and Deaf-Blind,London,U.K.:Springer-Verlag,2003.][[3]A.M.Engebretson,“Benefits of digital hearing aids,”IEEE Engineering in Medicine and Biology Magazine,vol.13,Issue 2,pp.238-248,April-May 1994.]。The auditory system is a very sensitive and complex network. Diseases, drugs, noise, trauma and aging can cause varying degrees of hearing loss, making hearing impairment one of the most common sensory disturbances in the world. The most effective way to compensate for hearing loss is to use a hearing aid system. The hearing aid system is a combination of speech amplification, noise reduction, feedback suppression, automatic program switching and environmental adaptation. The basic function of a hearing aid is to selectively amplify the sound and then transmit the processed signal to the ear [[1] Aage R. Moller, Hearing: Anatomy, Physiology and Disorders of the Auditory System, Academic Press, 2nd edition, September 11, 2006.]. In a digital hearing aid, an analog sound signal is converted into a digital signal by an A/D converter, and then divided into branch signals of different frequency bands by a filter bank to facilitate further amplification and other processing [[2]MAHersh and MAJohnson et Al., Assistive Technology for the Hearing-Impaired, Deaf and Deaf-Blind, London, UK: Springer-Verlag, 2003.] [[3]AMEngebretson, "Benefits of digital hearing aids," IEEE Engineering in Medicine and Biology Magazine , vol. 13, Issue 2, pp. 238-248, April-May 1994.].
目前大多数研究集中在固定(不能被重新配置)滤波器组方面。均匀滤波器组是首先被采纳并被广泛应用的滤波器组。在过去的十年中，研究人员已经做了很多工作来减少均匀滤波器组的复杂度。点阵波数字滤波器组(LWDFB)被应用助听器[[4]Meng Tong Tan,J.S.Chang,and Yit Chow Tong,“A novel low-voltage low-power wave digital filter bank for an intelligent noise reduction digital hearing instrument,”IEEE International Symposium on Circuits and Systems,vol.2,pp.681–684,06-09May 2001,Sydney.]。点阵波数字滤波器组相比FIR滤波器组有较低的复杂度，而且对系数不敏感。之后，具有多维对数***(MDLNS)的DFT滤波器组被用来降低复杂性[[5]H.Li,G.A.Jullien,V.S.Dimitrov,M.Ahmadi,and W.Miller,“A 2-digit multidimensional logarithmic number system filter bank for a digital hearing aid architecture,”IEEE Int.Symp.Circuits Syst.,AZ,pp.II-760–763,2002.]。后来，一些用于临界采样滤波器的简单方法被扩展到了过采样的情况[[6]D.Hermann,E.Chau,R.D.Dony and S.M.Areibi,“Window Based Prototype Filter Design for Highly Oversampled Filter banks in Audio Applications,”IEEE International Conference on Acoustics,Speech and Signal Processing,II-405-II-408,15-20 April 2007,Honolulu,HI.]。它的效率源于用一种方法生成多个原型滤波器的灵活 性。为了同时满足音频编码和助听器应用的需要，通过使用联合立体声滤波器组，助听器***的复杂性得到进一步的降低[[7]Rong Dong,D.Hermann,R.Brennan,and E.Chau,“Joint filter bank structures for integrating audio coding into hearing aid applications,”IEEE International Conference on Acoustics,Speech and Signal Processing,pp.1533-1536,March 31 2008-April 4 2008.]。Most of the current research focuses on fixed (cannot be reconfigured) filter banks. Uniform filter banks are the first to be adopted and widely used filter banks. In the past decade, researchers have done a lot of work to reduce the complexity of uniform filter banks. The azimuth wave digital filter bank (LWDFB) is applied to a hearing aid [[4] Meng Tong Tan, JSChang, and Yit Chow Tong, "A novel low-voltage low-power wave digital filter bank for an intelligent noise reduction digital hearing instrument , IEEE International Symposium on Circuits and Systems, vol. 2, pp. 681-684, 06-09 May 2001, Sydney. The lattice digital filter bank has lower complexity than the FIR filter bank and is insensitive to coefficients. Later, DFT filter banks with multidimensional logarithmic systems (MDLNS) were used to reduce complexity [[5]H.Li, GAJullien, VSDimitrov, M.Ahmadi, and W.Miller, "A 2-digit multidimensional Logarithmic number system filter bank for a Digital hearing aid architecture, "IEEE Int. Symp. Circuits Syst., AZ, pp. II-760-763, 2002.]. Later, some simple methods for critical sampling filters were extended to the case of oversampling [[6]D.Hermann, E.Chau, RDDony and SMAreibi, "Window Based Prototype Filter Design for Highly Oversampled Filter banks in Audio Applications, "IEEE International Conference on Acoustics, Speech and Signal Processing, II-405-II-408, 15-20 April 2007, Honolulu, HI.]. Its efficiency stems from the flexibility of generating multiple prototype filters in one way. Sex. To meet the needs of both audio coding and hearing aid applications, the complexity of hearing aid systems is further reduced by using joint stereo filter banks [[7]Rong Dong, D.Hermann, R.Brennan, and E.Chau,"Joint Filter bank structures for integrating audio coding into hearing aid applications, "IEEE International Conference on Acoustics, Speech and Signal Processing, pp. 1533-1536, March 31 2008-April 4 2008.].
均匀地划分频带较为简单，然而没有考虑到人类听觉的独特性。因此，模仿人类听觉分辨特性的非均匀滤波器组得到了助听器研究者的关注。在[[8]R.Cassidy,J.O.Smith,“A tunable,nonsubsampled,nonuniform filter bank for multi-band audition and level modification of audio signals,”The 38th Asilomar Conference on Signals,Systems and Computers,vol.2,pp.2228-2232,7-10Nov.2004.]中，基于全通补偿滤波器和椭圆最小Q因子(EMQF)滤波器的树状结构滤波器组被用来作为分析滤波器组。在[[9]Yong.Lian,and Ying Wei,“A Computationally Efficient Non-Uniform FIR Digital Filter bank for Hearing Aid,”IEEE Transactions on Circuits and Systems I:Regular Papers,vol.52,pp.2754-2762,Dec.2005.]中，提出了一个基于频率响应遮蔽(FRM)技术的8频带滤波器组，与[[8]R.Cassidy,J.O.Smith,“A tunable,nonsubsampled,nonuniform filter bank for multi-band audition and level modification of audio signals,”The 38th Asilomar Conference on Signals,Systems and Computers,vol.2,pp.2228-2232,7-10Nov.2004.]中的方法一样，是以时延为代价来降低复杂度。[[10]K.S.Chong,B.H.Gwee,and J.S.Chang,“A 16-channel low-power nonuniform spaced filter bank core for digital hearing aid,”IEEE Transaction on Circuits and Systems,vol.53,no.9,pp.853–857,Sep.2006.]中使用了一个带状间隔滤波器组，该算法可以取得满意的听力补偿，但是频带的不规则性增加了设计和实现的难度。在[[11]Yu-Ting Kuo,Tay-Jyi Lin,Yueh-Tai Li and Chih-Wei Liu,“Design and Implementation of Low-Power ANSI S1.11Filter bank for Digital Hearing Aids,”IEEE Transactions on Circuits and Systems I:Regular Papers,Volume:57,Issue:7,pp.1684–1696,2010.]中，1/3倍频滤波器组实现了听力频率范围的覆盖，该滤波器组基于IIR结构，因此不能提供线性响应。一般地，非均匀滤波器组相比均匀滤波器组在听力补偿方面具有更好的性能，然而，非均匀滤波器组的复杂度通常比均匀滤波器组的复杂度高很多。Evenly dividing the frequency band is relatively simple, but does not take into account the uniqueness of human hearing. Therefore, non-uniform filter banks that mimic human auditory resolution characteristics have attracted the attention of hearing aid researchers. In [[8] R. Cassidy, JOSmith, "A tunable, nonsubsampled, nonuniform filter bank for multi-band audition and level modification of audio signals," The 38th Asilomar Conference on Signals, Systems and Computers, vol. 2, pp In .2228-2232, 7-10Nov.2004.], a tree-structure filter bank based on an all-pass compensation filter and an elliptical minimum Q factor (EMQF) filter is used as the analysis filter bank. In [[9] Yong. Lian, and Ying Wei, "A Computationally Efficient Non-Uniform FIR Digital Filter bank for Hearing Aid," IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 52, pp. 2754-2762, In Dec.2005.], an 8-band filter bank based on frequency response masking (FRM) technology is proposed, and [[8]R.Cassidy, JOSmith, "A tunable, nonsubsampled, nonuniform filter bank for multi-band Audition and level modification of audio signals, as in the method of The 38th Asilomar Conference on Signals, Systems and Computers, vol. 2, pp. 2228-2232, 7-10 Nov. 2004.], is reduced at the expense of time delay the complexity. [[10]KSChong, BHGwee, and JSChang, "A 16-channel low-power nonuniform spaced filter bank core for digital hearing aid," IEEE Transaction on Circuits and Systems, vol. 53, no. 9, pp. A band-spaced filter bank is used in 853–857, Sep. 2006.] The algorithm can achieve satisfactory hearing compensation, but the band irregularity increases the difficulty of design and implementation. In [[11] Yu-Ting Kuo, Tay-Jyi Lin, Yueh-Tai Li and Chih-Wei Liu, "Design and Implementation of Low-Power ANSI S1.11 Filter bank for Digital Hearing Aids," IEEE Transactions on Circuits and Systems I: Regular Papers, Volume: 57, Issue: 7, pp. 1684–1696, 2010.], the 1/3 octave filter bank achieves coverage of the hearing frequency range, which is based on the IIR structure and therefore cannot Provide a linear response. In general, a non-uniform filter bank has better performance in terms of hearing compensation than a uniform filter bank, however, the complexity of a non-uniform filter bank is typically much higher than the complexity of a uniform filter bank.
随着助听器技术的发展，对助听器***有了新的要求。其中之一就是‘灵活性’，这就要求数字助听***的核心，即滤波器组，能根据患者的听力损失特性进行调节。针对助听器的可调(重构)滤波器组的研究还很少。在[[12]A.B.Hamida,“An adjustable filter-bank based algorithm for hearing aid systems,”International Conference on Industrial Electronics,Control and  Instrumentation,vol.3,pp.1187-1192,1999.]中，一个可编程频谱分割器允许根据患者的病理学来调整滤波器的频带。但是，文中对每个子带的实现并没有进行讨论。最近提出了一种三通道可变的滤波器组[[13]T.B.Deng,“Three-channel variable filter-bank for digital hearing aids”IET Signal Processing,vol.4,no.2,pp.181-196,Apr.2010.][[14]Noboru Ito and Tian-Liang Deng,“Variable-Bandwidth Filter-Bank for Low-Power Hearing Aids,”3rd International Congress on Image and Signal Processing,pp.3207-3201,2010.]，由于使用IIR结构，该可变滤波器组具有较低的复杂度。在[[15]Ying Wei and Debao Liu,“A Design of Digital FIR Filter banks with Adjustable Subband Distribution for Hearing Aids,”8th International Conference on Information,Communications and Signal Processing,pp.361-364，13-16Dec.,2011,Singapore.]中，提出了一种可调滤波器组，首先生成所有的子带，然后在子带中选择需要的频带，丢弃不需要的频带。这样的设计可以达到满意的性能但是复杂度比较高。在[[16]Ying Wei and Debao Liu,“A Reconfigurable Digital Filterbank for Hearing Aid Systems with a Variety of Sound Wave Decomposition Plans”，IEEE Transactions on Biomedical Engineering,Vol.60,Issue:6,pp.1628–1635,2013.]中提出了使用频率响应遮蔽技术的可重构滤波器组。该滤波器组具有低复杂度，然而它的时延太长以至于不能实践应用。虽然可调滤波器组满足了数字助听器的新趋势，但是在高效和有效的设计方面的研究是远远不够的。With the development of hearing aid technology, new requirements have been placed on hearing aid systems. One of them is 'flexibility', which requires the core of the digital hearing aid system, the filter bank, to be adjusted according to the patient's hearing loss characteristics. Little research has been done on the adjustable (reconstructed) filter banks for hearing aids. In [[12]A.B.Hamida, "An adjustable filter-bank based algorithm for hearing aid systems," International Conference on Industrial Electronics, Control and In Instrumentation, vol. 3, pp. 1187-1192, 1999.], a programmable spectrum splitter allows the frequency band of the filter to be adjusted according to the patient's pathology. However, the implementation of each subband is not discussed in the text. Recently, a three-channel variable filter bank has been proposed [[13]TBDeng, "Three-channel variable filter-bank for digital hearing aids" IET Signal Processing, vol. 4, no. 2, pp. 181-196 , Apr.2010.][[14]Noboru Ito and Tian-Liang Deng, "Variable-Bandwidth Filter-Bank for Low-Power Hearing Aids," 3rd International Congress on Image and Signal Processing, pp. 3207-3201, 2010. The variable filter bank has a lower complexity due to the use of the IIR structure. In [[15] Ying Wei and Debao Liu, "A Design of Digital FIR Filter banks with Adjustable Subband Distribution for Hearing Aids," 8th International Conference on Information, Communications and Signal Processing, pp. 361-364, 13-16Dec., In 2011, Singapore.], a tunable filter bank is proposed, which first generates all subbands, then selects the required frequency bands in the subbands and discards the unwanted frequency bands. This design can achieve satisfactory performance but high complexity. In [[16] Ying Wei and Debao Liu, "A Reconfigurable Digital Filterbank for Hearing Aid Systems with a Variety of Sound Wave Decomposition Plans", IEEE Transactions on Biomedical Engineering, Vol. 60, Issue: 6, pp. 1628 - 1635, A reconfigurable filter bank using frequency response masking techniques is proposed in 2013. This filter bank has low complexity, however its delay is too long to be practical. While tunable filter banks meet the new trends in digital hearing aids, research on efficient and effective design is not enough.
发明内容Summary of the invention
本发明的目的就是为了解决上述问题，提供一种用于数字助听器的低复杂度可调滤波器组及其工作方法，它具有复杂度低，并且延迟较小的优点。The object of the present invention is to solve the above problems, and to provide a low complexity tunable filter bank for a digital hearing aid and a working method thereof, which have the advantages of low complexity and small delay.
为了实现上述目的，本发明采用如下技术方案：In order to achieve the above object, the present invention adopts the following technical solutions:
用于数字助听器的低复杂度可调滤波器组，包括依次连接的掩蔽模块和多通带产生模块，A low complexity tunable filter bank for digital hearing aids, including a masking module and a multi-passband generating module that are sequentially connected,
所述掩蔽模块用于将接收的声音信号按照频率划分为低频、中频和高频三个区域，The masking module is configured to divide the received sound signal into three regions of low frequency, intermediate frequency and high frequency according to frequency.
所述多通带产生模块用于对低频、中频和高频三个区域，每个区域给出三个不同的子带分解状态，然后将子带信号输出；The multi-passband generating module is configured to provide three different sub-band decomposition states for each of the low frequency, intermediate frequency and high frequency regions, and then output the sub-band signals;
所述三个不同的子带分解状态是：The three different subband decomposition states are:
分解状态一：将每个区域分解为带宽为π/3的子带；Decomposition state 1: Decompose each region into subbands with a bandwidth of π/3;
分解状态二：将每个区域均匀分解为两个带宽为π/6的子带；Decomposition state 2: uniformly decompose each region into two sub-bands with a bandwidth of π/6;
分解状态三：将每个区域均匀分解为四个带宽为π/12的子带。Decomposition state three: Each region is evenly decomposed into four sub-bands with a bandwidth of π/12.
用于数字助听器的低复杂度可调滤波器组，包括依次连接的掩蔽模块和多通带产生模块，A low complexity tunable filter bank for digital hearing aids, including a masking module and a multi-passband generating module that are sequentially connected,
所述掩蔽模块包括基于原型滤波器F(z)的掩蔽滤波模块和三个寄存器，基于原型滤波器 F(z)的掩蔽滤波模块的输入端接收输入信号，基于原型滤波器F(z)的掩蔽滤波模块有两个输出端，分别是原型滤波器F(z)的原输出端和π/2对称输出端，所述原输出端与第一寄存器的输入端连接，所述第一寄存器的输出端连接单刀三掷开关S1的第一触点，所述π/2对称输出端连接第二寄存器的输入端，所述第二寄存器的输出端连接单刀三掷开关S1的第二触点，输入信号还与第一加法器的输入端连接，所述第一加法器的输出端与第二加法器的输入端连接，所述第二加法器的输出端与第三寄存器的输入端连接，所述第三寄存器的输出端与单刀三掷开关S1的第三触点连接，所述第一加法器的输入端还与基于原型滤波器F(z)的掩蔽滤波模块的原输出端连接，所述第二加法器的输入端还与原型滤波器F(z)的π/2对称输出端连接；The masking module includes a masking filter module based on a prototype filter F(z) and three registers, based on a prototype filter The input of the masking filter module of F(z) receives the input signal, and the masking filter module based on the prototype filter F(z) has two outputs, which are the original output of the prototype filter F(z) and π/2 respectively. a symmetric output terminal, the original output terminal is connected to the input end of the first register, the output end of the first register is connected to the first contact of the single-pole three-throw switch S1, and the π/2 symmetric output terminal is connected to the second register The input end of the second register is connected to the second contact of the single-pole three-throw switch S1, and the input signal is also connected to the input end of the first adder, the output of the first adder and the second addition The input of the second adder is connected to the input of the third register, and the output of the third register is connected to the third contact of the single-pole triple-throw switch S1, the first addition The input of the device is also connected to the original output of the masking filter module based on the prototype filter F(z), and the input of the second adder is also connected to the π/2 symmetric output of the prototype filter F(z) ;
所述多通带产生模块包括单刀双掷开关S2，所述单刀双掷开关S2的第一触点连接第四寄存器的输入端，The multi-pass band generating module includes a single-pole double-throw switch S2, and a first contact of the single-pole double-throw switch S2 is connected to an input end of the fourth register,
所述单刀双掷开关S2的第二触点连接第一分数内插滤波模块的输入端，所述第一分数内插滤波模块的原输出端连接第四寄存器的输入端，所述第一分数内插滤波模块的补输出端连接第一单刀单掷开关S4的一端，所述第一单刀单掷开关S4的另外一端连接第四寄存器的输入端；The second contact of the single-pole double-throw switch S2 is connected to the input end of the first fractional interpolation filter module, and the original output end of the first fractional interpolation filter module is connected to the input end of the fourth register, the first fraction The complementary output end of the interpolation filter module is connected to one end of the first single-pole single-throw switch S4, and the other end of the first single-pole single-throw switch S4 is connected to the input end of the fourth register;
所述单刀双掷开关S2的第二触点还通过第一单刀单掷开关S3分别连接第二分数内插滤波模块的输入端和第三分数内插滤波模块的输入端；The second contact of the single-pole double-throw switch S2 is further connected to the input end of the second fractional interpolation filter module and the input end of the third fractional interpolation filter module through the first single-pole single-throw switch S3;
所述第二分数内插滤波模块的输出端与第四寄存器的输入端连接，An output end of the second fractional interpolation filter module is connected to an input end of the fourth register,
所述第三分数内插滤波模块的原输出端与第三加法器的输入端连接，所述第三加法器的输出端与第四寄存器的输入端连接；所述第三加法器的输入端还与第一分数内插滤波模块的原输出端连接；The original output end of the third fractional interpolation filter module is connected to the input end of the third adder, and the output end of the third adder is connected to the input end of the fourth register; the input end of the third adder Also connected to the original output end of the first fractional interpolation filter module;
所述第三分数内插滤波模块的补输出端与第四寄存器的输入端连接；The complementary output end of the third fractional interpolation filter module is connected to the input end of the fourth register;
所述第一分数内插滤波模块的原输出端与第四加法器的输入端连接，所述第三分数内插滤波模块的补输出端与第四加法器的输入端连接，所述第四加法器的输出端与第四寄存器连接，所述第四寄存器输出信号；The original output end of the first fractional interpolation filter module is connected to the input end of the fourth adder, and the complementary output end of the third fractional interpolation filter module is connected to the input end of the fourth adder, the fourth An output of the adder is coupled to the fourth register, the fourth register outputting a signal;
所述单刀三掷开关S1的刀与所述单刀双掷开关S2的刀连接。The knife of the single-pole triple-throw switch S1 is connected to the knife of the single-pole double-throw switch S2.
所述第一分数内插滤波器模块包括输入端、第一分数内插滤波器模块原输出端、第一分数内插滤波器模块补输出端，所述输入端依次通过模块D和加法器A1与第一分数内插滤波器模块补输出端连接，所述输入端还通过若干个并联的乘法器与模块D&A-1连接，模块D&A-1 与第一分数内插滤波器模块的原输出端连接；The first fractional interpolation filter module includes an input end, a first fractional interpolation filter module original output end, and a first fractional interpolation filter module complement output end, and the input end sequentially passes through the module D and the adder A1. Connected to the first fractional interpolation filter module complement output, the input is also connected to the module D&A-1 by a number of parallel multipliers, module D&A-1 Connected to the original output of the first fractional interpolation filter module;
所述若干个并联的乘法器包括乘法器h(N-1)/2、乘法器h(N-3)/2，乘法器h(N-5)/2依次类推，一直到乘法器h0；N为奇数；N是原型滤波器H(z)的长度；The plurality of parallel multipliers include a multiplier h (N-1)/2 , a multiplier h (N-3)/2 , a multiplier h (N-5)/2 and so on, up to the multiplier h 0 ; N is an odd number; N is the length of the prototype filter H(z);
所述模块D为若干个移位寄存器；所述模块D&A-1为包括串联且依次交替的寄存器组和加法器；The module D is a plurality of shift registers; the module D&A-1 is a register group and an adder including serially and sequentially alternating;
乘法器h(N-1)/2、乘法器h(N-5)/2依次类推，一直到乘法器h0或乘法器h1，与其对应的每个D&A-1单元的加法器连接；乘法器h(N-1)/2只连接一个加法器，除h(N-1)/2外每个乘法器连接两个加法器，这两个加法器在位置上以h(N-1)/2所连接的加法器为对称中心。The multiplier h (N-1)/2 , the multiplier h (N-5)/2 and so on, until the multiplier h 0 or the multiplier h 1 is connected to the adder of each corresponding D&A-1 unit; a multiplier connected h (N-1) / 2 only one adder, in addition to h (N-1) / 2 connecting two outer each multiplier adders, which adders in two locations to h (N-1 The adder connected to /2 is the center of symmetry.
乘法器h0(当(N-1)/2为偶数时)或乘法器h1(当(N-1)/2为奇数时)与模块D&A-1的一端的首个寄存器组连接，乘法器h0(当(N-1)/2为偶数时)或乘法器h1(当(N-1)/2为奇数时)与模块D&A-1的另一端的首个加法器连接；(结构图以(N-1)/2为偶数时为例)Multiplier h 0 (when (N-1)/2 is even) or multiplier h 1 (when (N-1)/2 is odd) is connected to the first register bank at one end of module D&A-1, multiplication H 0 (when (N-1)/2 is even) or multiplier h 1 (when (N-1)/2 is odd) is connected to the first adder at the other end of module D&A-1; The structure diagram takes (N-1)/2 as an even number as an example)
所述加法器A1的输入端还与第一分数内插滤波器模块补输出端连接。The input of the adder A1 is also connected to the complementary input of the first fractional interpolation filter module.
所述第二分数内插滤波器模块包括输入端和第二分数内插滤波器模块的输出端，所述输入端还通过若干个并联的乘法器与模块D&A-2连接，模块D&A-2与第二分数内插滤波器模块的输出端连接；The second fractional interpolation filter module includes an input end and an output end of the second fractional interpolation filter module, and the input end is further connected to the module D&A-2 by a plurality of parallel multipliers, the module D&A-2 and The output of the second fractional interpolation filter module is connected;
所述若干个并联的乘法器包括乘法器h(N-1)/2、乘法器h(N-3)/2、乘法器h(N-5)/2、乘法器h(N-7)/2依次类推，一直到乘法器h0；乘法器h(N-1)/2只连接一个加法器；除h(N-1)/2外每个乘法器连接两个加法器，这两个加法器在位置上以h(N-1)/2所连接的加法器为对称中心。所述模块D为若干个移位寄存器；所述模块D&A-2为包括串联且依次交替的寄存器组和加法器；The plurality of parallel multipliers include a multiplier h (N-1)/2 , a multiplier h (N-3)/2 , a multiplier h (N-5)/2 , and a multiplier h (N-7) /2 and so on, up to the multiplier h 0 ; the multiplier h (N-1)/2 is connected to only one adder; each multiplier is connected to two adders except h (N-1)/2 . The adders are symmetrical centers with adders connected by h (N-1)/2 in position. The module D is a plurality of shift registers; the module D&A-2 is a register group and an adder including serially and sequentially alternating;
乘法器h(N-1)/2、乘法器h(N-3)/2、乘法器h(N-5)/2、乘法器h(N-7)/2依次类推，一直到乘法器h0均通过单刀单掷开关S3与其对应的模块D&A-2的加法器连接；Multiplier h (N-1)/2 , multiplier h (N-3)/2 , multiplier h (N-5)/2 , multiplier h (N-7)/2 and so on, up to the multiplier h 0 is connected to the adder of its corresponding module D&A-2 through the single-pole single-throw switch S3;
乘法器h0与模块D&A-2的一端的首个寄存器组连接，乘法器h0与模块D&A-2的另一端的首个加法器连接；(结构图以(N-1)/2为偶数时为例)The multiplier h 0 is connected to the first register bank at one end of the module D&A-2, and the multiplier h 0 is connected to the first adder at the other end of the module D&A-2; (the structure diagram is evenly numbered (N-1)/2 Time as an example)
所述第三分数内插滤波器模块包括输入端、第三分数内插滤波器模块原输出端、第三分数内插滤波器模块补输出端，所述输入端依次通过模块D和加法器A2与第三分数内插滤波器模块补输出端连接，所述输入端还通过若干个并联的乘法器与模块D&A-3连接，模块D&A-3 与第三分数内插滤波器模块的原输出端连接；The third fractional interpolation filter module includes an input end, a third fractional interpolation filter module original output end, and a third fractional interpolation filter module complement output end, and the input end passes through the module D and the adder A2 in sequence. Connected to the third fractional interpolation filter module complement output, the input is also connected to the module D&A-3 by a number of parallel multipliers, module D&A-3 Connected to the original output of the third fractional interpolation filter module;
所述若干个并联的乘法器包括乘法器h(N-1)/2、乘法器h(N-7)/2、乘法器h(N-13)/2依次类推，直到乘法器
Figure PCTCN2015096155-appb-000001
N为奇数。The plurality of parallel multipliers include a multiplier h (N-1)/2 , a multiplier h (N-7)/2 , a multiplier h (N-13)/2, and so on, until the multiplier
Figure PCTCN2015096155-appb-000001
N is an odd number.
所述模块D为若干个移位寄存器；The module D is a plurality of shift registers;
所述模块D&A-3为包括串联且依次交替的寄存器组和加法器；The module D&A-3 is a register group and an adder including serially and sequentially alternating;
乘法器h(N-1)/2、乘法器h(N-7)/2、乘法器h(N-13)/2，依次类推，直到乘法器
Figure PCTCN2015096155-appb-000002
与其对应的每个D&A-3单元的加法器连接；乘法器h(N-1)/2只连接一个加法器，除乘法器h(N-1)/2外每个乘法器连接两个加法器，这两个加法器在位置上以h(N-1)/2所连接的加法器为对称中心。Multiplier h (N-1)/2 , multiplier h (N-7)/2 , multiplier h (N-13)/2 , and so on, until multiplier
Figure PCTCN2015096155-appb-000002
Adds to each adder of its corresponding D&A-3 unit; multiplier h (N-1)/2 connects only one adder, except multiplier h (N-1)/2 , each multiplier connects two additions The adders are symmetrical centers with adders connected by h (N-1)/2 in position.
乘法器
Figure PCTCN2015096155-appb-000003
与D&A-3模块的一端的首个寄存器组连接；乘法器
Figure PCTCN2015096155-appb-000004
与D&A-3模块的另一端的首个加法器连接；其中，
Figure PCTCN2015096155-appb-000005
为(N-1)/2除以3的余数；Multiplier
Figure PCTCN2015096155-appb-000003
Connect to the first register bank at one end of the D&A-3 module; multiplier
Figure PCTCN2015096155-appb-000004
Connected to the first adder on the other end of the D&A-3 module;
Figure PCTCN2015096155-appb-000005
Divide (N-1)/2 by the remainder of 3;
所述加法器A2的输入端还与第三分数内插滤波器模块原输出端连接。The input of the adder A2 is also connected to the original output of the third fractional interpolation filter module.
由于三个分数内插滤波器来自同一个原型滤波器，因而他们的乘法器可以共享，从而大大降低了***的复杂度。Since the three fractional interpolation filters are from the same prototype filter, their multipliers can be shared, greatly reducing the complexity of the system.
所述掩蔽模块将信号分到三个等均匀的频带，所述三个等均匀的频带分别是低频区、高频区和中频区；The masking module divides the signal into three equal uniform frequency bands, and the three equal uniform frequency bands are a low frequency region, a high frequency region, and an intermediate frequency region, respectively;
所述低频区的传递函数F1(z)表示为：The transfer function F 1 (z) of the low frequency region is expressed as:
F1(z)＝F(z)  (4)；F 1 (z)=F(z) (4);
所述高频区的传递函数F3(z)表示为：The transfer function F 3 (z) of the high frequency region is expressed as:
F3(z)＝Fh(z)  (5)；F 3 (z)=F h (z) (5);
其中，Fh(z)表示与F(z)在π/2对称的高通滤波器；Where F h (z) represents a high-pass filter symmetrical with F(z) at π/2;
所述中频区的传递函数F2(z)表示为：The transfer function F 2 (z) of the intermediate frequency region is expressed as:
F2(z)＝z-Δ-F(z)-Fh(z)  (6)；F 2 (z)=z -Δ -F(z)-F h (z) (6);
其中，z-Δ表示时延。Where z - Δ represents the time delay.
用于数字助听器的低复杂度可调滤波器组的工作方法，包括如下步骤：A working method for a low complexity tunable filter bank for a digital hearing aid, comprising the steps of:
步骤(1)：掩蔽模块将接收的声音信号按照频率划分为低频、中频和高频三个区域， Step (1): The masking module divides the received sound signal into three regions of low frequency, intermediate frequency and high frequency according to frequency.
步骤(2)：多通带产生模块用于对低频、中频和高频三个区域，每个区域给出三个不同的子带分解状态，然后将子带信号输出；Step (2): the multi-passband generating module is configured to provide three different sub-band decomposition states for the low frequency, intermediate frequency and high frequency regions, and then output the sub-band signals;
所述三个不同的子带分解状态是：The three different subband decomposition states are:
分解状态一：将每个区域分解为带宽为π/3的子带；Decomposition state 1: Decompose each region into subbands with a bandwidth of π/3;
分解状态二：将每个区域均匀分解为两个带宽为π/6的子带；Decomposition state 2: uniformly decompose each region into two sub-bands with a bandwidth of π/6;
分解状态三：将每个区域均匀分解为四个带宽为π/12的子带。Decomposition state three: Each region is evenly decomposed into four sub-bands with a bandwidth of π/12.
用于数字助听器的低复杂度可调滤波器组的工作方法，包括如下步骤：A working method for a low complexity tunable filter bank for a digital hearing aid, comprising the steps of:
步骤(1)：原型滤波模块接收输入信号后，将信号进行处理，得到三个频率区域的信号，低频区域的信号频率范围是(0，π/3)，中频区域的信号频率范围是(π/3，2π/3)，高频区域的信号频率范围是(2π/3，π)；将低频区域的信号存入第一寄存器，将中频区域的信号存入第二寄存器，将高频区域的信号存入第三寄存器；Step (1): After receiving the input signal, the prototype filtering module processes the signal to obtain signals of three frequency regions, the signal frequency range of the low frequency region is (0, π/3), and the signal frequency range of the intermediate frequency region is (π) /3,2π/3), the signal frequency range of the high frequency region is (2π/3, π); the signal of the low frequency region is stored in the first register, and the signal of the intermediate frequency region is stored in the second register, and the high frequency region is The signal is stored in the third register;
步骤(2)：假设Step (2): Assumption
单刀三掷开关S1的刀打到单刀三掷开关S1的第一触点，此时，w1为00；The knife of the single-pole three-throw switch S1 hits the first contact of the single-pole three-throw switch S1, and at this time, w 1 is 00;
单刀三掷开关S1的刀打到单刀三掷开关S1的第二触点，此时，w1为01；The knife of the single-pole three-throw switch S1 hits the second contact of the single-pole three-throw switch S1, and at this time, w 1 is 01;
单刀三掷开关S1的刀打到单刀三掷开关S1的第三触点，此时，w1为10；The knife of the single-pole three-throw switch S1 hits the third contact of the single-pole three-throw switch S1, and at this time, w 1 is 10;
单刀双掷开关S2的刀打到单刀双掷开关S2的第一触点，此时，w2为0；The knife of the single-pole double-throw switch S2 hits the first contact of the single-pole double-throw switch S2, and at this time, w 2 is 0;
单刀双掷开关S2的刀打到单刀双掷开关S2的第二触点，此时，w2为1；The knife of the single-pole double-throw switch S2 hits the second contact of the single-pole double-throw switch S2, and at this time, w 2 is 1;
单刀单掷开关S3打开，且单刀单掷开关S4关闭，此时，w3为0；The single pole single throw switch S3 is opened, and the single pole single throw switch S4 is closed, at this time, w 3 is 0;
单刀单掷开关S3关闭，且单刀单掷开关S4打开，此时，w3为1；The single pole single throw switch S3 is closed, and the single pole single throw switch S4 is opened, at this time, w 3 is 1;
当控制信号W＝[w1w2w3]为0000时，低频区域子带信号即为遮蔽滤波模块输出的信号，子带信号被存储到第四寄存器；When the control signal W=[w 1 w 2 w 3 ] is 0000, the low-frequency area sub-band signal is the signal output by the shadow filtering module, and the sub-band signal is stored in the fourth register;
当控制信号W＝[w1w2w3]为0010时；低频区域被第一分数内插滤波模块均匀地分为两个带宽为π/6的子带，子带信号被存储到第四寄存器；When the control signal W=[w 1 w 2 w 3 ] is 0010; the low frequency region is evenly divided into two subbands with a bandwidth of π/6 by the first fractional interpolation filter module, and the subband signal is stored to the fourth register;
当控制信号W＝[w1w2w3]为0011时；低频区域被第一、二、三分数内插滤波模块及后续的加法器均匀地分为四个带宽为π/12的子带，子带信号被存储到第四寄存器；When the control signal W=[w 1 w 2 w 3 ] is 0011; the low frequency region is evenly divided into four subbands with a bandwidth of π/12 by the first, second and third fractional interpolation filtering modules and subsequent adders. , the subband signal is stored to the fourth register;
当控制信号W＝[w1w2w3]为0100时；中频区域子带信号即为遮蔽滤波模块输出的信号， 子带信号被存储到第四寄存器；When the control signal W=[w 1 w 2 w 3 ] is 0100; the intermediate frequency zone subband signal is the signal output by the shadow filtering module, and the subband signal is stored in the fourth register;
当控制信号W＝[w1w2w3]为0110时；中频区域被第一分数滤波模块均匀地分为两个带宽为π/6的子带，子带信号被存储到第四寄存器；When the control signal W=[w 1 w 2 w 3 ] is 0110; the intermediate frequency region is evenly divided into two sub-bands with a bandwidth of π/6 by the first fractional filtering module, and the sub-band signal is stored in the fourth register;
当控制信号W＝[w1w2w3]为0111时；中频区域被第一、二、三分数内插滤波模块及后续的加法器均匀地分为四个带宽为π/12的子带，子带信号被存储到第四寄存器；When the control signal W=[w 1 w 2 w 3 ] is 0111; the intermediate frequency region is evenly divided into four subbands with a bandwidth of π/12 by the first, second and third fractional interpolation filtering modules and subsequent adders. , the subband signal is stored to the fourth register;
当控制信号W＝[w1w2w3]为1000时；高频区域子带信号即为遮蔽滤波模块输出的信号，子带信号被存储到第四寄存器；When the control signal W=[w 1 w 2 w 3 ] is 1000; the high frequency region subband signal is the signal output by the shadow filtering module, and the subband signal is stored in the fourth register;
当控制信号W＝[w1w2w3]为1010时；高频区域被第一分数滤波模块均匀地分为两个带宽为π/6的子带，子带信号被存储到第四寄存器；When the control signal W=[w 1 w 2 w 3 ] is 1010; the high frequency region is evenly divided into two subbands with a bandwidth of π/6 by the first fractional filtering module, and the subband signal is stored in the fourth register. ;
当控制信号W＝[w1w2w3]为1011时；高频区域被第一、二、三分数内插滤波模块及后续的加法器均匀地分为四个带宽为π/12的子带，子带信号被存储到第四寄存器；When the control signal W=[w 1 w 2 w 3 ] is 1011; the high frequency region is evenly divided into four sub-bands of π/12 by the first, second and third fractional interpolation filtering modules and subsequent adders. The subband signal is stored in the fourth register;
所述低频区域的传递函数为：The transfer function of the low frequency region is:
F1(z)＝F(z)  (4)F 1 (z)=F(z) (4)
所述中频区域的传递函数为：The transfer function of the intermediate frequency region is:
F3(z)＝Fh(z)  (5)F 3 (z)=F h (z) (5)
所述高频区域的传递函数为：The transfer function of the high frequency region is:
F2(z)＝z-Δ-F(z)-Fh(z)  (6)。F 2 (z)=z -Δ -F(z)-F h (z) (6).
步骤(3)：所述第四寄存器的信号输出。Step (3): Signal output of the fourth register.
本发明的有益效果：The beneficial effects of the invention:
1本发明复杂度低，并且延迟较小，能够通过对参数的控制在不改变滤波器组结构的情况下改变频带的划分状态，从而实现根据患者的听力损失特性进行声音分解的目标。1 The present invention has low complexity and small delay, and can change the division state of the frequency band without changing the filter bank structure by controlling the parameters, thereby realizing the target of sound decomposition according to the hearing loss characteristic of the patient.
2分数内插使本发明可以使用少量的原型滤波器来构建***，从而降低了复杂度。The 2 fractional interpolation allows the present invention to use a small number of prototype filters to build the system, thereby reducing complexity.
3整个频率范围被划分成三个区域，每个区域都有三种不同的子带分解状态，实例表明该滤波器组可以在可接受的延时下满足各种听力损失的需求。3 The entire frequency range is divided into three regions, each of which has three different sub-band decomposition states. The example shows that the filter bank can meet various hearing loss requirements with acceptable delay.
附图说明DRAWINGS
图1为分数内插滤波器和掩蔽滤波器的频率响应；Figure 1 shows the frequency response of the fractional interpolation filter and the masking filter;
图2为本发明的滤波器组的结构； Figure 2 is a diagram showing the structure of a filter bank of the present invention;
图3为本发明的方法流程图；Figure 3 is a flow chart of the method of the present invention;
图4(a)为本发明的分解状态1的子带的生成示意图；4(a) is a schematic diagram showing the generation of sub-bands in the exploded state 1 of the present invention;
图4(b)和图4(c)为本发明的分解状态2的子带的生成示意图；4(b) and 4(c) are schematic diagrams showing the generation of sub-bands in the exploded state 2 of the present invention;
图4(d)、图4(e)、图4(f)、图4(g)和图4(h)为本发明的分解状态3的子带的生成示意图；4(d), 4(e), 4(f), 4(g), and 4(h) are schematic diagrams showing the generation of sub-bands in the exploded state 3 of the present invention;
图5为F(z)和Fh(z)的实现示意图；Figure 5 is a schematic diagram of the implementation of F(z) and F h (z);
图6分数内插模块结构图((N-1)/2为偶数)；Figure 6 is a structural diagram of the fractional interpolation module ((N-1)/2 is an even number);
图7(a)为例子1的在高频轻度听力损失下的听力图；Figure 7 (a) is an audiogram of Example 1 under high frequency mild hearing loss;
图7(b)为例子1的该滤波器组的幅度响应示意图；Figure 7 (b) is a schematic diagram of the amplitude response of the filter bank of Example 1;
图8(a)为例子2的在所有频带轻度听力损失下的听力图；Figure 8 (a) is an audiogram of Example 2 under mild hearing loss in all bands;
图8(b)为例子2的该滤波器组的幅度响应示意图。Fig. 8(b) is a schematic diagram showing the amplitude response of the filter bank of Example 2.
具体实施方式detailed description
下面结合附图与实施例对本发明作进一步说明。The invention will be further described below in conjunction with the drawings and embodiments.
本发明设计的基本原则：The basic principles of the design of the invention:
本发明提出的滤波器组算法基于分数内插[R.Mahesh and A.P.Vinod,"Coefficient decimation approach for realizing reconfigurable finite impulse response filters,"Proceedings of IEEE international symposium on circuits and syatems,pp.81-84,seattle USA,May 2008.]。对一个原型滤波器，将每D个原型滤波器的系数组合在一起并丢弃其余没有被选中的系数，然后在两个系数之间***M-1个零点，即构成一个分数内插滤波器H(zM/D)的系数。H(zM/D)幅度响应的通带数量Nf由内插因子M来决定，如公式(1)所示，The filter bank algorithm proposed by the present invention is based on fractional interpolation [R. Mahesh and APVinod, "Coefficient decimation approach for realizing reconfigurable finite impulse response filters," Proceedings of IEEE international symposium on circuits and syatems, pp. 81-84, seattle USA , May 2008.]. For a prototype filter, combine the coefficients of each D prototype filter and discard the remaining coefficients that are not selected, then insert M-1 zeros between the two coefficients to form a fractional interpolation filter H. The coefficient of (z M/D ). H (z M / D) in response to the magnitude of the number N f of the passband by the interpolation factor M is determined, as shown in Equation (1),
Figure PCTCN2015096155-appb-000006
Figure PCTCN2015096155-appb-000006
第i个通带的带宽，Bw(i)，由抽取因子D和内插因子M的比值来决定，如公式(2)所示，The bandwidth of the i-th passband, B w (i), is determined by the ratio of the decimation factor D to the interpolation factor M, as shown in equation (2).
Figure PCTCN2015096155-appb-000007
Figure PCTCN2015096155-appb-000007
式中，B0是原型滤波器H(z)的带宽。通带的中心频率ωk通过公式(3)来计算，Where B 0 is the bandwidth of the prototype filter H(z). The center frequency ω k of the pass band is calculated by the formula (3),
Figure PCTCN2015096155-appb-000008
Figure PCTCN2015096155-appb-000008
从公式(1)和公式(3)中可以看出，通过改变内插因子M，可以改变H(zM/D)通带的数量和通带的 位置。从公式(2)中可以看出，改变内插因子M和抽取因子D，H(zM/D)的通带带宽将被改变。分数内插滤波器的上述特殊性构成了滤波器组的可重构基础。此外，如果采用互补运算将会产生更多的通带。应当注意的是，相比原始的滤波器，抽取会导致通带和阻带波纹的增大。因此，原型滤波器的设计应该留有余量，具有较小的通带和阻带波纹，以便使得最终的滤波器符合要求。It can be seen from equations (1) and (3) that by changing the interpolation factor M, the number of H(z M/D ) pass bands and the position of the pass band can be changed. As can be seen from equation (2), changing the interpolation factor M and the decimation factor D, the passband bandwidth of H(z M/D ) will be changed. The above specificity of the fractional interpolation filter constitutes the reconfigurable basis of the filter bank. In addition, if you use complementary operations, you will generate more passbands. It should be noted that the extraction results in an increase in the passband and stopband ripples compared to the original filter. Therefore, the design of the prototype filter should leave a margin with a small passband and stopband ripple to make the final filter meet the requirements.
通过分数内插生成的通带由掩蔽滤波器来提取。根据公式(2)和(3)，为了产生均匀的子带，通带的中心频率，除第一个和最后一个以外，应该与掩蔽滤波器的3dB截止频率相一致。可以对不同的分数内插滤波器直接地分配不同的掩蔽滤波器，然而，这种方案***的复杂度是巨大的。为了提高效率，掩蔽滤波器最好是可重复使用的。根据公式(3)，只要内插因子确定，则通带的中心是固定的。这表明，具有相同内插因子的分数内插滤波器产生的通带有可能使用相同的掩蔽滤波器来提取。这个思路如图1所示，图中展示了两个分数内插滤波器
Figure PCTCN2015096155-appb-000009
和
Figure PCTCN2015096155-appb-000010
由于它们的内插因子都是M，因此通带的中心频率是相同的。除了第一个和最后一个通带，其他的通带被两个相邻的掩蔽滤波器分为两部分，这两个分数内插滤波器可以共享同一组掩蔽滤波器。掩蔽滤波器共同覆盖整个频率范围，数量为M。The passband generated by fractional interpolation is extracted by a masking filter. According to equations (2) and (3), in order to produce a uniform subband, the center frequency of the passband, in addition to the first and last, should coincide with the 3dB cutoff frequency of the masking filter. Different fractional interpolation filters can be directly assigned to different masking filters. However, the complexity of such a scheme system is enormous. To improve efficiency, the masking filter is preferably reusable. According to formula (3), the center of the pass band is fixed as long as the interpolation factor is determined. This suggests that passbands generated by fractional interpolation filters with the same interpolation factor may be extracted using the same masking filter. This idea is shown in Figure 1. The figure shows two fractional interpolation filters.
Figure PCTCN2015096155-appb-000009
with
Figure PCTCN2015096155-appb-000010
Since their interpolation factors are all M, the center frequency of the passband is the same. In addition to the first and last passbands, the other passbands are divided into two parts by two adjacent masking filters, which can share the same set of masking filters. The masking filter covers the entire frequency range together and the number is M.
基于上述基本原则本发明设计一种用于助听器的新型可调滤波器组算法。整个频率范围被均匀地分成三个区域，低频区域(0,π/3),中频区域(π/3,2π/3)和高频区域(2π/3,π)，每个区域，有三种频带分解状态供选择，Based on the above basic principles, the present invention designs a novel tunable filter bank algorithm for hearing aids. The entire frequency range is evenly divided into three regions, a low frequency region (0, π/3), an intermediate frequency region (π/3, 2π/3), and a high frequency region (2π/3, π). Each region has three types. The band decomposition state is available for selection.
1)分解状态一：一个带宽为π/3的子带1) Decomposition state one: a subband with a bandwidth of π/3
2)分解状态二：两个带宽为π/6的子带2) Decomposition state 2: two subbands with a bandwidth of π/6
3)分解状态三：四个带宽为π/12的子带3) Decomposition state three: four subbands with a bandwidth of π/12
根据上述要求，提出的滤波器的结构图如图2所示，它有两个功能块，即通带生成模块和掩蔽模块。由于级联的顺序不影响最终结果，为了减少时延，本发明把掩蔽模块放在多通道生成模块的之前。为了平衡群延迟，应该向分支增加适当数目的时延单元，这在图中没有示出。According to the above requirements, the structure diagram of the proposed filter is shown in Figure 2. It has two functional blocks, namely a passband generation module and a masking module. Since the order of the cascade does not affect the final result, in order to reduce the delay, the present invention places the masking module in front of the multi-channel generating module. In order to balance the group delay, an appropriate number of delay units should be added to the branch, which is not shown in the figure.
如图2所示，用于数字助听器的低复杂度可调滤波器组，包括依次连接的掩蔽模块和多通带产生模块，As shown in FIG. 2, the low complexity tunable filter bank for the digital hearing aid comprises a masking module and a multi-passband generating module which are sequentially connected,
所述掩蔽模块包括基于原型滤波器F(z)的掩蔽滤波模块和三个寄存器，基于原型滤波器F(z)的掩蔽滤波模块的输入端接收输入信号，基于原型滤波器F(z)的掩蔽滤波模块有两个输 出端，分别是原型滤波器F(z)的原输出端和π/2对称输出端，所述原输出端与第一寄存器的输入端连接，所述第一寄存器的输出端连接单刀三掷开关S1的第一触点，所述π/2对称输出端连接第二寄存器的输入端，所述第二寄存器的输出端连接单刀三掷开关S1的第二触点，输入信号还与第一加法器的输入端连接，所述第一加法器的输出端与第二加法器的输入端连接，所述第二加法器的输出端与第三寄存器的输入端连接，所述第三寄存器的输出端与单刀三掷开关S1的第三触点连接，所述第一加法器的输入端还与基于原型滤波器F(z)的掩蔽滤波模块的原输出端连接，所述第二加法器的输入端还与原型滤波器F(z)的π/2对称输出端连接；The masking module includes a masking filter module based on the prototype filter F(z) and three registers, and an input signal of the masking filter module based on the prototype filter F(z) receives an input signal based on the prototype filter F(z) The masking filter module has two inputs The output end is the original output end of the prototype filter F(z) and the π/2 symmetrical output end, respectively, the original output end is connected to the input end of the first register, and the output end of the first register is connected to the single-pole three-throw a first contact of the switch S1, the π/2 symmetrical output is connected to the input end of the second register, and the output of the second register is connected to the second contact of the single-pole three-throw switch S1, and the input signal is also first An input of the adder is connected, an output of the first adder is connected to an input of the second adder, and an output of the second adder is connected to an input of the third register, the third register The output terminal is connected to the third contact of the single-pole triple-throw switch S1, and the input end of the first adder is also connected to the original output end of the masking filter module based on the prototype filter F(z), the second adder The input is also connected to the π/2 symmetrical output of the prototype filter F(z);
所述多通带产生模块包括单刀双掷开关S2，所述单刀双掷开关S2的第一触点连接第四寄存器的输入端，The multi-pass band generating module includes a single-pole double-throw switch S2, and a first contact of the single-pole double-throw switch S2 is connected to an input end of the fourth register,
所述单刀双掷开关S2的第二触点连接第一分数内插滤波模块的输入端，所述第一分数内插滤波模块的原输出端连接第四寄存器的输入端，所述第一分数内插滤波模块的补输出端连接第一单刀单掷开关S4的一端，所述第一单刀单掷开关S4的另外一端连接第四寄存器的输入端；The second contact of the single-pole double-throw switch S2 is connected to the input end of the first fractional interpolation filter module, and the original output end of the first fractional interpolation filter module is connected to the input end of the fourth register, the first fraction The complementary output end of the interpolation filter module is connected to one end of the first single-pole single-throw switch S4, and the other end of the first single-pole single-throw switch S4 is connected to the input end of the fourth register;
所述单刀双掷开关S2的第二触点还通过第一单刀单掷开关S3分别连接第二分数内插滤波模块的输入端和第三分数内插滤波模块的输入端；The second contact of the single-pole double-throw switch S2 is further connected to the input end of the second fractional interpolation filter module and the input end of the third fractional interpolation filter module through the first single-pole single-throw switch S3;
所述第二分数内插滤波模块的输出端与第四寄存器的输入端连接，An output end of the second fractional interpolation filter module is connected to an input end of the fourth register,
所述第三分数内插滤波模块的原输出端与第三加法器的输入端连接，所述第三加法器的输出端与第四寄存器的输入端连接；所述第三加法器的输入端还与第一分数内插滤波模块的原输出端连接；The original output end of the third fractional interpolation filter module is connected to the input end of the third adder, and the output end of the third adder is connected to the input end of the fourth register; the input end of the third adder Also connected to the original output end of the first fractional interpolation filter module;
所述第三分数内插滤波模块的补输出端与第四寄存器的输入端连接；The complementary output end of the third fractional interpolation filter module is connected to the input end of the fourth register;
所述第一分数内插滤波模块的原输出端与第四加法器的输入端连接，所述第三分数内插滤波模块的补输出端与第四加法器的输入端连接，所述第四加法器的输出端与第四寄存器连接，所述第四寄存器输出信号；The original output end of the first fractional interpolation filter module is connected to the input end of the fourth adder, and the complementary output end of the third fractional interpolation filter module is connected to the input end of the fourth adder, the fourth An output of the adder is coupled to the fourth register, the fourth register outputting a signal;
所述单刀三掷开关S1的刀与所述单刀双掷开关S2的刀连接。The knife of the single-pole triple-throw switch S1 is connected to the knife of the single-pole double-throw switch S2.
如图3所示，As shown in Figure 3,
用于数字助听器的低复杂度可调滤波器组的工作方法，包括如下步骤：A working method for a low complexity tunable filter bank for a digital hearing aid, comprising the steps of:
步骤(1)：掩蔽模块将接收的声音信号按照频率划分为低频、中频和高频三个区域，Step (1): The masking module divides the received sound signal into three regions of low frequency, intermediate frequency and high frequency according to frequency.
步骤(2)：多通带产生模块用于对低频、中频和高频三个区域，每个区域给出三个不同的子带分解状态，然后将子带信号输出； Step (2): the multi-passband generating module is configured to provide three different sub-band decomposition states for the low frequency, intermediate frequency and high frequency regions, and then output the sub-band signals;
所述三个不同的子带分解状态是：The three different subband decomposition states are:
分解状态一：将每个区域分解为带宽为π/3的子带；Decomposition state 1: Decompose each region into subbands with a bandwidth of π/3;
分解状态二：将每个区域均匀分解为两个带宽为π/6的子带；Decomposition state 2: uniformly decompose each region into two sub-bands with a bandwidth of π/6;
分解状态三：将每个区域均匀分解为四个带宽为π/12的子带。Decomposition state three: Each region is evenly decomposed into four sub-bands with a bandwidth of π/12.
用于数字助听器的低复杂度可调滤波器组的工作方法，包括如下步骤：A working method for a low complexity tunable filter bank for a digital hearing aid, comprising the steps of:
步骤(1)：原型滤波模块接收输入信号后，将信号进行处理，得到三个频率区域的信号，低频区域的信号频率范围是(0，π/3)，中频区域的信号频率范围是(π/3，2π/3)，高频区域的信号频率范围是(2π/3，π)；将低频区域的信号存入第一寄存器，将中频区域的信号存入第二寄存器，将高频区域的信号存入第三寄存器；Step (1): After receiving the input signal, the prototype filtering module processes the signal to obtain signals of three frequency regions, the signal frequency range of the low frequency region is (0, π/3), and the signal frequency range of the intermediate frequency region is (π) /3,2π/3), the signal frequency range of the high frequency region is (2π/3, π); the signal of the low frequency region is stored in the first register, and the signal of the intermediate frequency region is stored in the second register, and the high frequency region is The signal is stored in the third register;
步骤(2)：假设Step (2): Assumption
单刀三掷开关S1的刀打到单刀三掷开关S1的第一触点，此时，w1为00；The knife of the single-pole three-throw switch S1 hits the first contact of the single-pole three-throw switch S1, and at this time, w 1 is 00;
单刀三掷开关S1的刀打到单刀三掷开关S1的第二触点，此时，w1为01；The knife of the single-pole three-throw switch S1 hits the second contact of the single-pole three-throw switch S1, and at this time, w 1 is 01;
单刀三掷开关S1的刀打到单刀三掷开关S1的第三触点，此时，w1为10；The knife of the single-pole three-throw switch S1 hits the third contact of the single-pole three-throw switch S1, and at this time, w 1 is 10;
单刀双掷开关S2的刀打到单刀双掷开关S2的第一触点，此时，w2为0；The knife of the single-pole double-throw switch S2 hits the first contact of the single-pole double-throw switch S2, and at this time, w 2 is 0;
单刀双掷开关S2的刀打到单刀双掷开关S2的第二触点，此时，w2为1；The knife of the single-pole double-throw switch S2 hits the second contact of the single-pole double-throw switch S2, and at this time, w 2 is 1;
单刀单掷开关S3打开，且单刀单掷开关S4关闭，此时，w3为0；The single pole single throw switch S3 is opened, and the single pole single throw switch S4 is closed, at this time, w 3 is 0;
单刀单掷开关S3关闭，且单刀单掷开关S4打开，此时，w3为1；The single pole single throw switch S3 is closed, and the single pole single throw switch S4 is opened, at this time, w 3 is 1;
当控制信号W＝[w1w2w3]为0000时，低频区域子带信号即为遮蔽滤波模块输出的信号，子带信号被存储到第四寄存器；When the control signal W=[w 1 w 2 w 3 ] is 0000, the low-frequency area sub-band signal is the signal output by the shadow filtering module, and the sub-band signal is stored in the fourth register;
当控制信号W＝[w1w2w3]为0010时；低频区域被第一分数内插滤波模块均匀地分为两个带宽为π/6的子带，子带信号被存储到第四寄存器；When the control signal W=[w 1 w 2 w 3 ] is 0010; the low frequency region is evenly divided into two subbands with a bandwidth of π/6 by the first fractional interpolation filter module, and the subband signal is stored to the fourth register;
当控制信号W＝[w1w2w3]为0011时；低频区域被第一、二、三分数内插滤波模块及后续的加法器均匀地分为四个带宽为π/12的子带，子带信号被存储到第四寄存器；When the control signal W=[w 1 w 2 w 3 ] is 0011; the low frequency region is evenly divided into four subbands with a bandwidth of π/12 by the first, second and third fractional interpolation filtering modules and subsequent adders. , the subband signal is stored to the fourth register;
当控制信号W＝[w1w2w3]为0100时；中频区域子带信号即为遮蔽滤波模块输出的信号，子带信号被存储到第四寄存器；When the control signal W=[w 1 w 2 w 3 ] is 0100; the intermediate frequency region subband signal is the signal output by the shadow filtering module, and the subband signal is stored in the fourth register;
当控制信号W＝[w1w2w3]为0110时；中频区域被第一分数滤波模块均匀地分为两个带宽 为π/6的子带，子带信号被存储到第四寄存器；When the control signal W=[w 1 w 2 w 3 ] is 0110; the intermediate frequency region is evenly divided into two sub-bands having a bandwidth of π/6 by the first fractional filtering module, and the sub-band signal is stored in the fourth register;
当控制信号W＝[w1w2w3]为0111时；中频区域被第一、二、三分数内插滤波模块及后续的加法器均匀地分为四个带宽为π/12的子带，子带信号被存储到第四寄存器；When the control signal W=[w 1 w 2 w 3 ] is 0111; the intermediate frequency region is evenly divided into four subbands with a bandwidth of π/12 by the first, second and third fractional interpolation filtering modules and subsequent adders. , the subband signal is stored to the fourth register;
当控制信号W＝[w1w2w3]为1000时；高频区域子带信号即为遮蔽滤波模块输出的信号，子带信号被存储到第四寄存器；When the control signal W=[w 1 w 2 w 3 ] is 1000; the high frequency region subband signal is the signal output by the shadow filtering module, and the subband signal is stored in the fourth register;
当控制信号W＝[w1w2w3]为1010时；高频区域被第一分数滤波模块均匀地分为两个带宽为π/6的子带，子带信号被存储到第四寄存器；When the control signal W=[w 1 w 2 w 3 ] is 1010; the high frequency region is evenly divided into two subbands with a bandwidth of π/6 by the first fractional filtering module, and the subband signal is stored in the fourth register. ;
当控制信号W＝[w1w2w3]为1011时；高频区域被第一、二、三分数内插滤波模块及后续的加法器均匀地分为四个带宽为π/12的子带，子带信号被存储到第四寄存器；When the control signal W=[w 1 w 2 w 3 ] is 1011; the high frequency region is evenly divided into four sub-bands of π/12 by the first, second and third fractional interpolation filtering modules and subsequent adders. The subband signal is stored in the fourth register;
A.掩蔽模块A. Masking module
掩蔽模块的目的是提取所需的通带，其原型滤波器F(z)的3db截止频率为π/3。基于F(z)，可以得到各个频率段的掩蔽滤波器，这些掩蔽滤波器将整个频率范围分成3个均匀的区域。子滤波器中的‘o’端口产生原始滤波器F(z)的输出，‘h’端口产生与F(z)在π/2对称的高通滤波器(表示为Fh(z))的输出。这个高通滤波器可以容易地由原始滤波器得到，这将稍后讨论。三个掩蔽滤波器的z变换表示为Fi(z),i＝1,2,3,如以下公式所示，The purpose of the masking module is to extract the required passband with a 3db cutoff frequency of π/3 for the prototype filter F(z). Based on F(z), masking filters for the various frequency segments can be obtained, which divide the entire frequency range into three uniform regions. The 'o' port in the sub-filter produces the output of the original filter F(z), and the 'h' port produces an output of the high-pass filter (denoted as F h (z)) symmetrical with F(z) π/2 . This high pass filter can be easily obtained from the original filter, which will be discussed later. The z-transform of the three masking filters is expressed as F i (z), i = 1, 2, 3, as shown in the following formula,
F1(z)＝F(z)  (4)F 1 (z)=F(z) (4)
F2(z)＝z-Δ-F(z)-Fh(z)  (5)F 2 (z)=z -Δ -F(z)-F h (z) (5)
F3(z)＝Fh(z)  (6)F 3 (z)=F h (z) (6)
F1(z),F2(z)和F3(z)的输出被保存下来，按照开关S1的2比特选择信号w1，逐个发送到通带生成模块。如果w1为00，则选择低频区域，如果w1是01，则选择中频区域，如果w1是10，则选择高频区域。The outputs of F 1 (z), F 2 (z) and F 3 (z) are saved and transmitted to the passband generation module one by one in accordance with the 2-bit selection signal w 1 of the switch S 1 . If w 1 is 00, the low frequency region is selected, if w 1 is 01, the intermediate frequency region is selected, and if w 1 is 10, the high frequency region is selected.
B.多通道生成模块B. Multi-channel generation module
H(z)和它的分数内插滤波器构成多通道生产模块，其功能是生成多个通带。内插滤波器的‘o’端口提供原始的输出，‘c’端口则提供互补滤波器的输出。因为掩蔽滤波器的数量和内插因子的数量相同，所以M等于3。子带的产生如图4(a)-图4(h)所示。该模块的输出记为
Figure PCTCN2015096155-appb-000011
表示在区域r,分解状态i的第j个子带。H(z) and its fractional interpolation filter form a multi-channel production module whose function is to generate multiple passbands. The 'o' port of the interpolation filter provides the original output, and the 'c' port provides the output of the complementary filter. Since the number of masking filters is the same as the number of interpolation factors, M is equal to 3. The generation of the sub-bands is shown in Figures 4(a) - 4(h). The output of this module is recorded as
Figure PCTCN2015096155-appb-000011
Indicates the jth subband of the decomposition state i in the region r.
对于分解状态1，掩蔽滤波器本身产生了带宽为π/3的均匀子带，因此不需要新的分数内插 滤波器，如图4(a)所示。For decomposition state 1, the masking filter itself produces a uniform subband with a bandwidth of π/3, so no new fractional interpolation is needed. The filter is shown in Figure 4(a).
对于分解状态2，一半通带由
Figure PCTCN2015096155-appb-000012
生成，一半通带由
Figure PCTCN2015096155-appb-000013
的补滤波器生成,然后使用掩蔽滤波器提取这些通带，如图4(b)和图4(c)所示。假定H(z)和F(z)的3dB带宽截止频率分别是ωhc和ωfc，为了产生带宽为π/6(F(z)带宽的一半)的均匀通带，按照公式(2)和图4(b)，有下式成立，For the decomposition state 2, the half pass band is
Figure PCTCN2015096155-appb-000012
Generated, half passband
Figure PCTCN2015096155-appb-000013
The complementary filter is generated and then extracted using a masking filter as shown in Figures 4(b) and 4(c). Assuming that the 3dB bandwidth cutoff frequencies of H(z) and F(z) are ω hc and ω fc , respectively, in order to generate a uniform passband with a bandwidth of π/6 (half of the F(z) bandwidth), according to equation (2) and Figure 4 (b), the following formula is established,
Figure PCTCN2015096155-appb-000014
Figure PCTCN2015096155-appb-000014
对于分解状态3，通过
Figure PCTCN2015096155-appb-000015
和
Figure PCTCN2015096155-appb-000016
的运算产生带宽为π/12(F(z)带宽的四分之一)的期望带宽，如图4(d)、图4(e)、图4(f)、图4(g)和图4(h)。为方便描述，令For decomposition state 3, pass
Figure PCTCN2015096155-appb-000015
with
Figure PCTCN2015096155-appb-000016
The operation produces a desired bandwidth of π/12 (a quarter of the F(z) bandwidth), as shown in Figure 4(d), Figure 4(e), Figure 4(f), Figure 4(g), and Figure 4(h). For the convenience of description, order
Figure PCTCN2015096155-appb-000017
Figure PCTCN2015096155-appb-000017
Figure PCTCN2015096155-appb-000018
Figure PCTCN2015096155-appb-000018
Figure PCTCN2015096155-appb-000019
Figure PCTCN2015096155-appb-000019
Figure PCTCN2015096155-appb-000020
Figure PCTCN2015096155-appb-000020
Pi(z)的幅度响应经掩蔽之后得到子带
Figure PCTCN2015096155-appb-000021
和
Figure PCTCN2015096155-appb-000022
为了得到均匀的子带，应该满足以下公式，The amplitude response of P i (z) is masked to obtain the subband
Figure PCTCN2015096155-appb-000021
with
Figure PCTCN2015096155-appb-000022
In order to obtain a uniform sub-band, the following formula should be satisfied.
Figure PCTCN2015096155-appb-000023
Figure PCTCN2015096155-appb-000023
Figure PCTCN2015096155-appb-000024
Figure PCTCN2015096155-appb-000024
令D2＝1，同时将
Figure PCTCN2015096155-appb-000025
带入公式(7),(12)和(13),可以得到，Let D 2 =1, at the same time
Figure PCTCN2015096155-appb-000025
Bring into equations (7), (12) and (13), you can get
Figure PCTCN2015096155-appb-000026
Figure PCTCN2015096155-appb-000026
D1＝2  (15)D 1 = 2 (15)
D3＝3  (16)D 3 =3 (16)
既原型滤波器F(z)和H(z)的截止频率分别是π/3和π/4。为了确保该掩蔽滤波器能完整地提取出期望的子带，F1(z)的阻带边缘，ωfs，应该比
Figure PCTCN2015096155-appb-000027
二阶通带的左通带边缘ωn小，如图4(f)中所示， The cutoff frequencies of both the prototype filters F(z) and H(z) are π/3 and π/4, respectively. In order to ensure that the masking filter can completely extract the desired sub-band, the stop band edge of F 1 (z), ω fs , should be
Figure PCTCN2015096155-appb-000027
The left pass band edge ω n of the second-order pass band is small, as shown in Fig. 4(f),
ωfs≤ωn    (17)ω fs ≤ω n (17)
假设F(z)和H(z)的过渡带宽分别是df和dh，在(17)中利用已知变量来替代ωfs和ωn，可以得到，Suppose that the transition bandwidths of F(z) and H(z) are d f and d h , respectively, and in (17), by using known variables instead of ω fs and ω n , we can get
Figure PCTCN2015096155-appb-000028
Figure PCTCN2015096155-appb-000028
化简(18)得到df和dh之间的关系，Simplification (18) gives the relationship between d f and d h ,
Figure PCTCN2015096155-appb-000029
Figure PCTCN2015096155-appb-000029
在多通带生成模块中，开关S2,S3和S4由参数w2和w3来控制。对开关S2来说，当w2＝0时，接通上支路；当w2＝1时，接通下支路。对开关S3来说，当w3＝0时，状态为打开；当w3＝1时，状态为关闭(稍后将会看到S3是代表一组开关的符号)。开关S4的状态和S3的状态相反,可以由w3的补信号控制。表1中给出了S2,S3和S4的控制信号以及相应的输入和输出。例如，当控制信号W＝[w1w2w3]为1010，在区域3中使用分解状态2。由于有3个区域，按照该结构，需要3轮得到所有的输出。每一轮的输出被保存起来等待最后被输出。In the multi-pass band generation module, switches S 2 , S 3 and S 4 are controlled by parameters w 2 and w 3 . For switch S 2 , when w 2 =0, the upper branch is turned on; when w 2 =1, the lower branch is turned on. Switch S 3, when w 3 = 0, open state; when w 3 = 1, the closed state (S 3 will be seen later, a group of symbols is representative of the switch). The state of switch S 4 is opposite to the state of S 3 and can be controlled by the complement signal of w 3 . The control signals for S 2 , S 3 and S 4 and the corresponding inputs and outputs are given in Table 1. For example, when the control signal W = [w 1 w 2 w 3 ] is 1010, the decomposition state 2 is used in the region 3. Since there are three regions, according to this structure, it takes three rounds to get all the outputs. The output of each round is saved and waits for the final output.
表1.子带生成Table 1. Subband generation
Figure PCTCN2015096155-appb-000030
Figure PCTCN2015096155-appb-000030
Figure PCTCN2015096155-appb-000031
Figure PCTCN2015096155-appb-000031
C实现C implementation
本发明提出的滤波器组可以有效地实现。原型滤波器F(z)和H(z)都是线性相位奇数长度的FIR滤波器。假定F(z)和H(z)的系数分别为[f0,f1,…,fN]和[h0,h1,…,hL]，这里的N和L为滤波器的阶数，可以得到，The filter bank proposed by the present invention can be effectively implemented. The prototype filters F(z) and H(z) are both linear phase odd length FIR filters. Suppose the coefficients of F(z) and H(z) are [f 0 , f 1 , . . . , f N ] and [h 0 , h 1 , . . . , h L ], where N and L are the order of the filter. Number, can be obtained,
f(k)＝f(N-k),k＝0,...,N   (20)f(k)=f(N-k),k=0,...,N (20)
h(k)＝h(L-k),k＝0,...,L   (21)h(k)=h(L-k),k=0,...,L (21)
在掩蔽模块中，原始滤波器和与其在π/2处对称的滤波器可以集成在一起，如图5所示。Fh(z)可以通过交替地改变F(z)系数符号产生,因此乘法器可以共享。In the masking module, the original filter and its symmetrical filter at π/2 can be integrated, as shown in Figure 5. F h (z) can be generated by alternately changing the F(z) coefficient symbol, so the multiplier can be shared.
在多通带生成模块中，需要考虑分数内插滤波器和它们的补滤波器的实现。为了共享乘法器，使用了转置形式的原型滤波器。选择乘法器的每D个输出组成抽取滤波器的乘法器输出，并通过使用M个延迟原件替换原始滤波器的单个延迟原件来获得内插。In the multi-passband generation module, the implementation of the fractional interpolation filters and their complementary filters needs to be considered. In order to share the multiplier, a prototype filter in the form of a transposition is used. Each D output of the multiplier is selected to form a multiplier output of the decimation filter, and interpolation is obtained by replacing the single delay original of the original filter with M delay primitives.
图6分数内插滤波器的实体构架(假设原型滤波器长度为N，且(N+1)/2为偶数；若为奇数，则去掉图中系数为h0的乘法器处的开关S3) Figure 6 shows the physical architecture of the fractional interpolation filter (assuming the prototype filter is of length N and (N+1)/2 is an even number; if it is an odd number, the switch S 3 at the multiplier with the coefficient h 0 in the figure is removed )
如图6所示，所述第一分数内插滤波器模块包括输入端、第一分数内插滤波器模块原输出端、第一分数内插滤波器模块补输出端，所述输入端依次通过模块D和加法器A1与第一分数内插滤波器模块补输出端连接，所述输入端还通过若干个并联的乘法器与模块D&A-1连接，模块D&A-1与第一分数内插滤波器模块的原输出端连接；As shown in FIG. 6, the first fractional interpolation filter module includes an input end, a first fractional interpolation filter module original output end, and a first fractional interpolation filter module complement output end, and the input end passes through Module D and adder A1 are coupled to a first fractional interpolation filter module complement output, which is also coupled to module D&A-1 by a number of parallel multipliers, module D&A-1 and first fractional interpolation filtering The original output of the module is connected;
所述若干个并联的乘法器包括乘法器h(N-1)/2、乘法器h(N-3)/2，乘法器h(N-5)/2依次类推，一直到乘法器h0；N为奇数；N是原型滤波器H(z)的长度；The plurality of parallel multipliers include a multiplier h (N-1)/2 , a multiplier h (N-3)/2 , a multiplier h (N-5)/2 and so on, up to the multiplier h 0 ; N is an odd number; N is the length of the prototype filter H(z);
所述模块D为若干个移位寄存器；所述模块D&A-1为包括串联且依次交替的寄存器组和加法器；The module D is a plurality of shift registers; the module D&A-1 is a register group and an adder including serially and sequentially alternating;
乘法器h(N-1)/2、乘法器h(N-5)/2依次类推，一直到乘法器h0或乘法器h1，与其对应的每个D&A-1单元的加法器连接；除h(N-1)/2外每个乘法器连接两个加法器，这两个加法器在位置上以h(N-1)/2所连接的加法器为对称中心。The multiplier h (N-1)/2 , the multiplier h (N-5)/2 and so on, until the multiplier h 0 or the multiplier h 1 is connected to the adder of each corresponding D&A-1 unit; Each multiplier is connected to two adders except h (N-1)/2 , which are symmetrical centers with adders connected by h (N-1)/2 in position.
乘法器h0(当(N-1)/2为偶数时)或乘法器h1(当(N-1)/2为奇数时)与模块D&A-1的一端的首个寄存器组连接，乘法器h0(当(N-1)/2为偶数时)或乘法器h1(当(N-1)/2为奇数时)与模块D&A-1的另一端的首个加法器连接；(结构图以(N-1)/2为偶数时为例)Multiplier h 0 (when (N-1)/2 is even) or multiplier h 1 (when (N-1)/2 is odd) is connected to the first register bank at one end of module D&A-1, multiplication H 0 (when (N-1)/2 is even) or multiplier h 1 (when (N-1)/2 is odd) is connected to the first adder at the other end of module D&A-1; The structure diagram takes (N-1)/2 as an even number as an example)
所述加法器A1的输入端还与第一分数内插滤波器模块补输出端连接。The input of the adder A1 is also connected to the complementary input of the first fractional interpolation filter module.
所述第二分数内插滤波器模块包括输入端和第二分数内插滤波器模块的输出端，所述输入端还通过若干个并联的乘法器与模块D&A-2连接，模块D&A-2与第二分数内插滤波器模块的输出端连接；The second fractional interpolation filter module includes an input end and an output end of the second fractional interpolation filter module, and the input end is further connected to the module D&A-2 by a plurality of parallel multipliers, the module D&A-2 and The output of the second fractional interpolation filter module is connected;
所述若干个并联的乘法器包括乘法器h(N-1)/2、乘法器h(N-3)/2、乘法器h(N-5)/2、乘法器h(N-7)/2依次类推，一直到乘法器h0；除h(N-1)/2外每个乘法器连接两个加法器，这两个加法器在位置上以h(N-1)/2所连接的加法器为对称中心。所述模块D为若干个移位寄存器；所述模块D&A-2为包括串联且依次交替的寄存器组和加法器；The plurality of parallel multipliers include a multiplier h (N-1)/2 , a multiplier h (N-3)/2 , a multiplier h (N-5)/2 , and a multiplier h (N-7) /2 and so on, up to the multiplier h 0 ; each multiplier is connected to two adders except h (N-1)/2 , which are in position h (N-1)/2 The connected adder is the center of symmetry. The module D is a plurality of shift registers; the module D&A-2 is a register group and an adder including serially and sequentially alternating;
乘法器h(N-1)/2、乘法器h(N-3)/2、乘法器h(N-5)/2、乘法器h(N-7)/2依次类推，一直到乘法器h0均通过单刀单掷开关S3与其对应的模块D&A-2的加法器连接；Multiplier h (N-1)/2 , multiplier h (N-3)/2 , multiplier h (N-5)/2 , multiplier h (N-7)/2 and so on, up to the multiplier h 0 is connected to the adder of its corresponding module D&A-2 through the single-pole single-throw switch S3;
乘法器h0与模块D&A-2的一端的首个寄存器组连接，乘法器h0与模块D&A-2的另一端的首个加法器连接；(结构图以(N-1)/2为偶数时为例) The multiplier h 0 is connected to the first register bank at one end of the module D&A-2, and the multiplier h 0 is connected to the first adder at the other end of the module D&A-2; (the structure diagram is evenly numbered (N-1)/2 Time as an example)
所述第三分数内插滤波器模块包括输入端、第三分数内插滤波器模块原输出端、第三分数内插滤波器模块补输出端，所述输入端依次通过模块D和加法器A2与第三分数内插滤波器模块补输出端连接，所述输入端还通过若干个并联的乘法器与模块D&A-3连接，模块D&A-3与第三分数内插滤波器模块的原输出端连接；The third fractional interpolation filter module includes an input end, a third fractional interpolation filter module original output end, and a third fractional interpolation filter module complement output end, and the input end passes through the module D and the adder A2 in sequence. Connected to the third fraction interpolation filter module complement output terminal, the input terminal is also connected to the module D&A-3 through a plurality of parallel multipliers, the original output end of the module D&A-3 and the third fractional interpolation filter module connection;
所述若干个并联的乘法器包括乘法器h(N-1)/2、乘法器h(N-7)/2、乘法器h(N-13)/2依次类推，直到乘法器
Figure PCTCN2015096155-appb-000032
N为奇数。The plurality of parallel multipliers include a multiplier h (N-1)/2 , a multiplier h (N-7)/2 , a multiplier h (N-13)/2, and so on, until the multiplier
Figure PCTCN2015096155-appb-000032
N is an odd number.
所述模块D为若干个移位寄存器；The module D is a plurality of shift registers;
所述模块D&A-3为包括串联且依次交替的寄存器组和加法器；The module D&A-3 is a register group and an adder including serially and sequentially alternating;
乘法器h(N-1)/2、乘法器h(N-7)/2、乘法器h(N-13)/2，依次类推，直到乘法器
Figure PCTCN2015096155-appb-000033
与其对应的每个D&A-3单元的加法器连接；乘法器h(N-1)/2只连接一个加法器，除乘法器h(N-1)/2外每个乘法器连接两个加法器，这两个加法器在位置上以h(N-1)/2所连接的加法器为对称中心。Multiplier h (N-1)/2 , multiplier h (N-7)/2 , multiplier h (N-13)/2 , and so on, until multiplier
Figure PCTCN2015096155-appb-000033
Adds to each adder of its corresponding D&A-3 unit; multiplier h (N-1)/2 connects only one adder, except multiplier h (N-1)/2 , each multiplier connects two additions The adders are symmetrical centers with adders connected by h (N-1)/2 in position.
乘法器
Figure PCTCN2015096155-appb-000034
与D&A-3模块的一端的首个寄存器组连接；乘法器
Figure PCTCN2015096155-appb-000035
与D&A-3模块的另一端的首个加法器连接；其中，
Figure PCTCN2015096155-appb-000036
为(N-1)/2除以3的余数；Multiplier
Figure PCTCN2015096155-appb-000034
Connect to the first register bank at one end of the D&A-3 module; multiplier
Figure PCTCN2015096155-appb-000035
Connected to the first adder on the other end of the D&A-3 module;
Figure PCTCN2015096155-appb-000036
Divide (N-1)/2 by the remainder of 3;
所述加法器A2的输入端还与第三分数内插滤波器模块原输出端连接。The input of the adder A2 is also connected to the original output of the third fractional interpolation filter module.
由于三个分数内插滤波器来自同一个原型滤波器，因而他们的乘法器可以共享，从而大大降低了***的复杂度。Since the three fractional interpolation filters are from the same prototype filter, their multipliers can be shared, greatly reducing the complexity of the system.
下面用例子来说明该滤波器的思路。根据公式(14)，F(z)的截止频率为π/3，H(z)的截止频率为π/4。从公式(19)可知，这两个原型滤波器的过渡带宽之和至多不超过π/6。为了降低复杂度，本发明采用
Figure PCTCN2015096155-appb-000037
令dh＝0.1π，则df＝0.067π。F(z)和H(z)的通带边缘分别是(0.3π，0.3667π)和(0.2π,0.3π),理想的通带波纹是0.005，阻带衰减是-50dB。使用的子带越多在该区域中提供的补偿越灵活，因此本发明在阈值曲线斜率较大的区域使用具有更多子带(窄带)的分解状态。下面给出两个例子。The following is an example to illustrate the idea of the filter. According to the formula (14), the cutoff frequency of F(z) is π/3, and the cutoff frequency of H(z) is π/4. It can be seen from equation (19) that the sum of the transition bandwidths of the two prototype filters does not exceed π/6 at most. In order to reduce the complexity, the present invention adopts
Figure PCTCN2015096155-appb-000037
Let d h =0.1π, then d f =0.067π. The passband edges of F(z) and H(z) are (0.3π, 0.3667π) and (0.2π, 0.3π), respectively, the ideal passband ripple is 0.005, and the stopband attenuation is -50dB. The more sub-bands used, the more flexible the compensation provided in this region, so the present invention uses a decomposition state with more sub-bands (narrowbands) in the region where the slope of the threshold curve is larger. Two examples are given below.
例1.高频轻度听力损失Example 1. High frequency mild hearing loss
这种类型听力损失的患者不能听到r s's,z's,th's,v's,以及其他高频清辅音。图7(a)给出了听力敏度图,本发明据此对右耳听力阈值(由’O’表示)进行补偿。在中频范围区域内阈值曲线的斜率较大，因此本发明放置更多的子带在该区域。由于在低频区域听力较好，可以在低频区域使用较宽的子带。区域1,2,3的分解计划分别为分解状态1，分解状态3和分解状态2。总 共产生7个子带。图7(b)中给出了该滤波器组的幅度响应。Patients with this type of hearing loss cannot hear r s's, z's, th's, v's, and other high-frequency clear consonants. Figure 7(a) shows a hearing sensitivity map from which the present invention compensates for the right ear hearing threshold (represented by 'O'). The slope of the threshold curve is large in the region of the intermediate frequency range, so the present invention places more sub-bands in this region. Since the hearing is better in the low frequency region, a wider sub-band can be used in the low frequency region. The decomposition plans of the regions 1, 2, and 3 are decomposition state 1, decomposition state 3, and decomposition state 2, respectively. Total A total of 7 sub-bands are produced. The amplitude response of the filter bank is given in Figure 7(b).
例2.所有频带轻度听力损失Example 2. Mild hearing loss in all bands
具有图8(a)的听力敏度图的听力损失患者，能理解1到2米距离之内的会话，这个会话距离明显比一个听力正常的人小很多(正常听力的人可以理解会话的距离高达12米)。听力阈值曲线在低频区域比在中频和高频区域有更高的波动。因此考虑在低频放置更多的子带。对区域1,2,3的分解计划分别为分解状态3、分解状态2和分解状态1。图8(b)给出了该滤波器组的幅度响应。A hearing loss patient with the audiogram of Figure 8(a) can understand a conversation within a distance of 1 to 2 meters. This conversation distance is significantly smaller than a normal hearing person (normal hearing people can understand the distance of the conversation) Up to 12 meters). The hearing threshold curve has higher fluctuations in the low frequency region than in the intermediate frequency and high frequency regions. So consider placing more subbands at low frequencies. The decomposition plans for the regions 1, 2, and 3 are the decomposition state 3, the decomposition state 2, and the decomposition state 1, respectively. Figure 8(b) shows the amplitude response of the filter bank.
该滤波器组由一个长度为81的F(z)和长度为69的H(z)产生。由于它们都是线性相位滤波器，需要76个不同的系数来生成21个不同的子带。表2显示了该滤波器组与其他可调滤波器组(有相同性能指标)复杂度的比较。与IIR可调滤波器组[[13]T.B.Deng,“Three-channel variable filter-bank for digital hearing aids”IET Signal Processing,vol.4,no.2,pp.181-196,Apr.2010.]相比，上述滤波器组在复杂度上稍有降低，但是提供了更多的子带，并且具有严格的线性相位性质。与非均匀滤波器组[[9]Yong.Lian,and Ying Wei,“A Computationally Efficient Non-Uniform FIR Digital Filter bank for Hearing Aid,”IEEE Transactions on Circuits and Systems I:Regular Papers,vol.52,pp.2754-2762,Dec.2005.]相比复杂度降低了54.1％，与可配置滤波器组[Ying Wei and Debao Liu,“A Reconfigurable Digital Filterbank for Hearing Aid Systems with a Variety of Sound Wave Decomposition Plans”，IEEE Transactions on Biomedical Engineering,Vol.60,Issue:6,pp.1628–1635,2013.]相比复杂度降低了15.6％。The filter bank is generated by an F (z) of length 81 and an H (z) of length 69. Since they are all linear phase filters, 76 different coefficients are needed to generate 21 different sub-bands. Table 2 shows the comparison of the complexity of this filter bank with other tunable filter banks (with the same performance specifications). And IIR tunable filter bank [[13]TBDeng, "Three-channel variable filter-bank for digital hearing aids" IET Signal Processing, vol.4, no.2, pp.181-196, Apr.2010.] In contrast, the filter bank described above is slightly less complex, but provides more subbands and has strict linear phase properties. And non-uniform filter banks [[9]Yong.Lian, and Ying Wei, "A Computationally Efficient Non-Uniform FIR Digital Filter bank for Hearing Aid," IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 52, pp .2754-2762, Dec.2005.] Reduced complexity by 54.1% with configurable filter banks [Ying Wei and Debao Liu, "A Reconfigurable Digital Filterbank for Hearing Aid Systems with a Variety of Sound Wave Decomposition Plans" , IEEE Transactions on Biomedical Engineering, Vol. 60, Issue: 6, pp. 1628–1635, 2013.] The complexity was reduced by 15.6%.
表2.本发明滤波器组和其他滤波器组的复杂性比较Table 2. Comparison of the complexity of the filter bank and other filter banks of the present invention
Figure PCTCN2015096155-appb-000038
Figure PCTCN2015096155-appb-000038
上述虽然结合附图对本发明的具体实施方式进行了描述，但并非对本发明保护范围的限制，所属领域技术人员应该明白，在本发明的技术方案的基础上，本领域技术人员不需要付出创造性劳动即可做出的各种修改或变形仍在本发明的保护范围以内。 The above description of the specific embodiments of the present invention has been described with reference to the accompanying drawings, but it is not intended to limit the scope of the present invention. Those skilled in the art should understand that the skilled in the art does not require the creative work on the basis of the technical solutions of the present invention. Various modifications or variations that can be made are still within the scope of the invention.

Claims (8)

  1. 用于数字助听器的低复杂度可调滤波器组，其特征是，包括依次连接的掩蔽模块和多通带产生模块，A low complexity tunable filter bank for a digital hearing aid, comprising: a masking module and a multi-passband generating module connected in sequence,
    所述掩蔽模块用于将接收的声音信号按照频率划分为低频、中频和高频三个区域，The masking module is configured to divide the received sound signal into three regions of low frequency, intermediate frequency and high frequency according to frequency.
    所述多通带产生模块用于对低频、中频和高频三个区域，每个区域给出三个不同的子带分解状态，然后将子带信号输出；The multi-passband generating module is configured to provide three different sub-band decomposition states for each of the low frequency, intermediate frequency and high frequency regions, and then output the sub-band signals;
    所述三个不同的子带分解状态是：The three different subband decomposition states are:
    分解状态一：将每个区域分解为带宽为π/3的子带；Decomposition state 1: Decompose each region into subbands with a bandwidth of π/3;
    分解状态二：将每个区域均匀分解为两个带宽为π/6的子带；Decomposition state 2: uniformly decompose each region into two sub-bands with a bandwidth of π/6;
    分解状态三：将每个区域均匀分解为四个带宽为π/12的子带。Decomposition state three: Each region is evenly decomposed into four sub-bands with a bandwidth of π/12.
  2. 如权利要求1所述用于数字助听器的低复杂度可调滤波器组，其特征是，包括依次连接的掩蔽模块和多通带产生模块，A low complexity tunable filter bank for a digital hearing aid according to claim 1, comprising a masking module and a multipass band generating module connected in series,
    所述掩蔽模块包括基于原型滤波器F(z)的掩蔽滤波模块和三个寄存器，基于原型滤波器F(z)的掩蔽滤波模块的输入端接收输入信号，基于原型滤波器F(z)的掩蔽滤波模块有两个输出端，分别是原型滤波器F(z)的原输出端和π/2对称输出端，所述原输出端与第一寄存器的输入端连接，所述第一寄存器的输出端连接单刀三掷开关S1的第一触点，所述π/2对称输出端连接第二寄存器的输入端，所述第二寄存器的输出端连接单刀三掷开关S1的第二触点，输入信号还与第一加法器的输入端连接，所述第一加法器的输出端与第二加法器的输入端连接，所述第二加法器的输出端与第三寄存器的输入端连接，所述第三寄存器的输出端与单刀三掷开关S1的第三触点连接，所述第一加法器的输入端还与基于原型滤波器F(z)的掩蔽滤波模块的原输出端连接，所述第二加法器的输入端还与原型滤波器F(z)的π/2对称输出端连接；The masking module includes a masking filter module based on the prototype filter F(z) and three registers, and an input signal of the masking filter module based on the prototype filter F(z) receives an input signal based on the prototype filter F(z) The masking filter module has two outputs, which are the original output end of the prototype filter F(z) and the π/2 symmetric output end, and the original output end is connected to the input end of the first register, the first register The output terminal is connected to the first contact of the single-pole three-throw switch S1, the π/2 symmetrical output terminal is connected to the input end of the second register, and the output end of the second register is connected to the second contact of the single-pole three-throw switch S1. The input signal is also coupled to the input of the first adder, the output of the first adder is coupled to the input of the second adder, and the output of the second adder is coupled to the input of the third register, The output end of the third register is connected to the third contact of the single-pole three-throw switch S1, and the input end of the first adder is also connected to the original output end of the masking filter module based on the prototype filter F(z). The input of the second adder is further Connected to the π/2 symmetrical output of the prototype filter F(z);
    所述多通带产生模块包括单刀双掷开关S2，所述单刀双掷开关S2的第一触点连接第四寄存器的输入端，The multi-pass band generating module includes a single-pole double-throw switch S2, and a first contact of the single-pole double-throw switch S2 is connected to an input end of the fourth register,
    所述单刀双掷开关S2的第二触点连接第一分数内插滤波模块的输入端，所述第一分数内插滤波模块的原输出端连接第四寄存器的输入端，所述第一分数内插滤波模块的补输出端连接第一单刀单掷开关S4的一端，所述第一单刀单掷开关S4的另外一端连接第四寄存器的输入端；The second contact of the single-pole double-throw switch S2 is connected to the input end of the first fractional interpolation filter module, and the original output end of the first fractional interpolation filter module is connected to the input end of the fourth register, the first fraction The complementary output end of the interpolation filter module is connected to one end of the first single-pole single-throw switch S4, and the other end of the first single-pole single-throw switch S4 is connected to the input end of the fourth register;
    所述单刀双掷开关S2的第二触点还通过第一单刀单掷开关S3分别连接第二分数内插滤波模块的输入端和第三分数内插滤波模块的输入端； The second contact of the single-pole double-throw switch S2 is further connected to the input end of the second fractional interpolation filter module and the input end of the third fractional interpolation filter module through the first single-pole single-throw switch S3;
    所述第二分数内插滤波模块的输出端与第四寄存器的输入端连接，An output end of the second fractional interpolation filter module is connected to an input end of the fourth register,
    所述第三分数内插滤波模块的原输出端与第三加法器的输入端连接，所述第三加法器的输出端与第四寄存器的输入端连接；所述第三加法器的输入端还与第一分数内插滤波模块的原输出端连接；The original output end of the third fractional interpolation filter module is connected to the input end of the third adder, and the output end of the third adder is connected to the input end of the fourth register; the input end of the third adder Also connected to the original output end of the first fractional interpolation filter module;
    所述第三分数内插滤波模块的补输出端与第四寄存器的输入端连接；The complementary output end of the third fractional interpolation filter module is connected to the input end of the fourth register;
    所述第一分数内插滤波模块的原输出端与第四加法器的输入端连接，所述第三分数内插滤波模块的补输出端与第四加法器的输入端连接，所述第四加法器的输出端与第四寄存器连接，所述第四寄存器输出信号；The original output end of the first fractional interpolation filter module is connected to the input end of the fourth adder, and the complementary output end of the third fractional interpolation filter module is connected to the input end of the fourth adder, the fourth An output of the adder is coupled to the fourth register, the fourth register outputting a signal;
    所述单刀三掷开关S1的刀与所述单刀双掷开关S2的刀连接。The knife of the single-pole triple-throw switch S1 is connected to the knife of the single-pole double-throw switch S2.
  3. 如权利要求2所述用于数字助听器的低复杂度可调滤波器组，其特征是，所述第一分数内插滤波器模块包括输入端、第一分数内插滤波器模块原输出端、第一分数内插滤波器模块补输出端，所述输入端依次通过模块D和加法器A1与第一分数内插滤波器模块补输出端连接，所述输入端还通过若干个并联的乘法器与模块D&A-1连接，模块D&A-1与第一分数内插滤波器模块的原输出端连接；A low complexity tunable filter bank for a digital hearing aid according to claim 2, wherein said first fractional interpolation filter module comprises an input, a first fractional interpolation filter module original output, The first fractional interpolation filter module complements the output end, and the input end is sequentially connected to the first fractional interpolation filter module complement output terminal through the module D and the adder A1, and the input end is further passed through a plurality of parallel multipliers. Connected to the module D&A-1, the module D&A-1 is connected to the original output of the first fractional interpolation filter module;
    所述若干个并联的乘法器包括乘法器h(N-1)/2、乘法器h(N-3)/2，乘法器h(N-5)/2依次类推，一直到乘法器h0；N为奇数；N是原型滤波器H(z)的长度；The plurality of parallel multipliers include a multiplier h (N-1)/2 , a multiplier h (N-3)/2 , a multiplier h (N-5)/2 and so on, up to the multiplier h 0 ; N is an odd number; N is the length of the prototype filter H(z);
    所述模块D为若干个移位寄存器；所述模块D&A-1为包括串联且依次交替的寄存器组和加法器；The module D is a plurality of shift registers; the module D&A-1 is a register group and an adder including serially and sequentially alternating;
    乘法器h(N-1)/2、乘法器h(N-5)/2依次类推，一直到乘法器h0或乘法器h1，与其对应的每个D&A-1单元的加法器连接；除h(N-1)/2外每个乘法器连接两个加法器，这两个加法器在位置上以h(N-1)/2所连接的加法器为对称中心；The multiplier h (N-1)/2 , the multiplier h (N-5)/2 and so on, until the multiplier h 0 or the multiplier h 1 is connected to the adder of each corresponding D&A-1 unit; Each multiplier is connected to two adders except h (N-1)/2 , which are symmetrical centers with adders connected by h (N-1)/2 at positions;
    乘法器h0或乘法器h1与模块D&A-1的一端的首个寄存器组连接，乘法器h0或乘法器h1与模块D&A-1的另一端的首个加法器连接；The multiplier h 0 or the multiplier h 1 is connected to the first register set of one end of the module D&A-1, and the multiplier h 0 or the multiplier h 1 is connected to the first adder of the other end of the module D&A-1;
    所述加法器A1的输入端还与第一分数内插滤波器模块补输出端连接。The input of the adder A1 is also connected to the complementary input of the first fractional interpolation filter module.
  4. 如权利要求2所述用于数字助听器的低复杂度可调滤波器组，其特征是，A low complexity tunable filter bank for a digital hearing aid according to claim 2, wherein
    所述第二分数内插滤波器模块包括输入端和第二分数内插滤波器模块的输出端，所述输入端还通过若干个并联的乘法器与模块D&A-2连接，模块D&A-2与第二分数内插滤波器模块的输出端连接； The second fractional interpolation filter module includes an input end and an output end of the second fractional interpolation filter module, and the input end is further connected to the module D&A-2 by a plurality of parallel multipliers, the module D&A-2 and The output of the second fractional interpolation filter module is connected;
    所述若干个并联的乘法器包括乘法器h(N-1)/2、乘法器h(N-3)/2、乘法器h(N-5)/2、乘法器h(N-7)/2依次类推，一直到乘法器h0；除h(N-1)/2外每个乘法器连接两个加法器，这两个加法器在位置上以h(N-1)/2所连接的加法器为对称中心；The plurality of parallel multipliers include a multiplier h (N-1)/2 , a multiplier h (N-3)/2 , a multiplier h (N-5)/2 , and a multiplier h (N-7) /2 and so on, up to the multiplier h 0 ; each multiplier is connected to two adders except h (N-1)/2 , which are in position h (N-1)/2 The connected adder is a symmetric center;
    所述模块D为若干个移位寄存器；所述模块D&A-2为包括串联且依次交替的寄存器组和加法器；The module D is a plurality of shift registers; the module D&A-2 is a register group and an adder including serially and sequentially alternating;
    乘法器h(N-1)/2、乘法器h(N-3)/2、乘法器h(N-5)/2、乘法器h(N-7)/2依次类推，一直到乘法器h0均通过单刀单掷开关S3与其对应的模块D&A-2的加法器连接；Multiplier h (N-1)/2 , multiplier h (N-3)/2 , multiplier h (N-5)/2 , multiplier h (N-7)/2 and so on, up to the multiplier h 0 is connected to the adder of its corresponding module D&A-2 through the single-pole single-throw switch S3;
    乘法器h0与模块D&A-2的一端的首个寄存器组连接，乘法器h0与模块D&A-2的另一端的首个加法器连接。The multiplier h 0 is connected to the first register bank at one end of the module D&A-2, and the multiplier h 0 is connected to the first adder at the other end of the module D&A-2.
  5. 如权利要求2所述用于数字助听器的低复杂度可调滤波器组，其特征是，A low complexity tunable filter bank for a digital hearing aid according to claim 2, wherein
    所述第三分数内插滤波器模块包括输入端、第三分数内插滤波器模块原输出端、第三分数内插滤波器模块补输出端，所述输入端依次通过模块D和加法器A2与第三分数内插滤波器模块补输出端连接，所述输入端还通过若干个并联的乘法器与模块D&A-3连接，模块D&A-3与第三分数内插滤波器模块的原输出端连接；The third fractional interpolation filter module includes an input end, a third fractional interpolation filter module original output end, and a third fractional interpolation filter module complement output end, and the input end passes through the module D and the adder A2 in sequence. Connected to the third fraction interpolation filter module complement output terminal, the input terminal is also connected to the module D&A-3 through a plurality of parallel multipliers, the original output end of the module D&A-3 and the third fractional interpolation filter module connection;
    所述若干个并联的乘法器包括乘法器h(N-1)/2、乘法器h(N-7)/2、乘法器h(N-13)/2依次类推，直到乘法器
    Figure PCTCN2015096155-appb-100001
    N为奇数；    The plurality of parallel multipliers include a multiplier h (N-1)/2 , a multiplier h (N-7)/2 , a multiplier h (N-13)/2, and so on, until the multiplier
    Figure PCTCN2015096155-appb-100001
    N is an odd number;
    所述模块D为若干个移位寄存器；The module D is a plurality of shift registers;
    所述模块D&A-3为包括串联且依次交替的寄存器组和加法器；The module D&A-3 is a register group and an adder including serially and sequentially alternating;
    乘法器h(N-1)/2、乘法器h(N-7)/2、乘法器h(N-13)/2，依次类推，直到乘法器
    Figure PCTCN2015096155-appb-100002
    与其对应的每个D&A-3单元的加法器连接；乘法器h(N-1)/2只连接一个加法器，除乘法器h(N-1)/2外每个乘法器连接两个加法器，这两个加法器在位置上以h(N-1)/2所连接的加法器为对称中心；    Multiplier h (N-1)/2 , multiplier h (N-7)/2 , multiplier h (N-13)/2 , and so on, until multiplier
    Figure PCTCN2015096155-appb-100002
    Adds to each adder of its corresponding D&A-3 unit; multiplier h (N-1)/2 connects only one adder, except multiplier h (N-1)/2 , each multiplier connects two additions The two adders are symmetrical centers with adders connected by h (N-1)/2 in position;
    乘法器
    Figure PCTCN2015096155-appb-100003
    与D&A-3模块的一端的首个寄存器组连接；乘法器
    Figure PCTCN2015096155-appb-100004
    与D&A-3模块的另一端的首个加法器连接；其中，
    Figure PCTCN2015096155-appb-100005
    为(N-1)/2除以3的余数；    Multiplier
    Figure PCTCN2015096155-appb-100003
    Connect to the first register bank at one end of the D&A-3 module; multiplier
    Figure PCTCN2015096155-appb-100004
    Connected to the first adder on the other end of the D&A-3 module;
    Figure PCTCN2015096155-appb-100005
    Divide (N-1)/2 by the remainder of 3;
    所述加法器A2的输入端还与第三分数内插滤波器模块原输出端连接。The input of the adder A2 is also connected to the original output of the third fractional interpolation filter module.
  6. 如权利要求1所述用于数字助听器的低复杂度可调滤波器组，其特征是，所述掩蔽模块将信号分到三个等均匀的频带，所述三个等均匀的频带分别是低频区、高频区和中频区； A low complexity tunable filter bank for a digital hearing aid according to claim 1, wherein said masking module divides the signal into three equal frequency bands, said three equal frequency bands being respectively low frequencies Zone, high frequency zone and intermediate frequency zone;
    所述低频区的传递函数F1(z)表示为：The transfer function F 1 (z) of the low frequency region is expressed as:
    F1(z)＝F(z)     (4)；F 1 (z)=F(z) (4);
    所述高频区的传递函数F3(z)表示为：The transfer function F 3 (z) of the high frequency region is expressed as:
    F3(z)＝Fh(z)     (5)；F 3 (z)=F h (z) (5);
    其中，Fh(z)表示与F(z)在π/2对称的高通滤波器Where F h (z) denotes a high-pass filter that is symmetric with F(z) at π/2
    所述中频区的传递函数F2(z)表示为：The transfer function F 2 (z) of the intermediate frequency region is expressed as:
    F2(z)＝z-Δ-F(z)-Fh(z)     (6)；F 2 (z)=z -Δ -F(z)-F h (z) (6);
    其中，z-Δ表示时延。Where z - Δ represents the time delay.
  7. 用于数字助听器的低复杂度可调滤波器组的工作方法，其特征是，包括如下步骤：A working method for a low complexity tunable filter bank for a digital hearing aid, comprising the steps of:
    步骤(1)：掩蔽模块将接收的声音信号按照频率划分为低频、中频和高频三个区域，Step (1): The masking module divides the received sound signal into three regions of low frequency, intermediate frequency and high frequency according to frequency.
    步骤(2)：多通带产生模块用于对低频、中频和高频三个区域，每个区域给出三个不同的子带分解状态，然后将子带信号输出；Step (2): the multi-passband generating module is configured to provide three different sub-band decomposition states for the low frequency, intermediate frequency and high frequency regions, and then output the sub-band signals;
    所述三个不同的子带分解状态是：The three different subband decomposition states are:
    分解状态一：将每个区域分解为带宽为π/3的子带；Decomposition state 1: Decompose each region into subbands with a bandwidth of π/3;
    分解状态二：将每个区域均匀分解为两个带宽为π/6的子带；Decomposition state 2: uniformly decompose each region into two sub-bands with a bandwidth of π/6;
    分解状态三：将每个区域均匀分解为四个带宽为π/12的子带。Decomposition state three: Each region is evenly decomposed into four sub-bands with a bandwidth of π/12.
  8. 如权利要求7所述的方法，其特征是，包括如下步骤：The method of claim 7 including the steps of:
    步骤(1)：原型滤波模块接收输入信号后，将信号进行处理，得到三个频率区域的信号，低频区域的信号频率范围是(0，π/3)，中频区域的信号频率范围是(π/3，2π/3)，高频区域的信号频率范围是(2π/3，π)；将低频区域的信号存入第一寄存器，将中频区域的信号存入第二寄存器，将高频区域的信号存入第三寄存器；Step (1): After receiving the input signal, the prototype filtering module processes the signal to obtain signals of three frequency regions, the signal frequency range of the low frequency region is (0, π/3), and the signal frequency range of the intermediate frequency region is (π) /3,2π/3), the signal frequency range of the high frequency region is (2π/3, π); the signal of the low frequency region is stored in the first register, and the signal of the intermediate frequency region is stored in the second register, and the high frequency region is The signal is stored in the third register;
    步骤(2)：假设Step (2): Assumption
    单刀三掷开关S1的刀打到单刀三掷开关S1的第一触点，此时，w1为00；The knife of the single-pole three-throw switch S1 hits the first contact of the single-pole three-throw switch S1, and at this time, w 1 is 00;
    单刀三掷开关S1的刀打到单刀三掷开关S1的第二触点，此时，w1为01；The knife of the single-pole three-throw switch S1 hits the second contact of the single-pole three-throw switch S1, and at this time, w 1 is 01;
    单刀三掷开关S1的刀打到单刀三掷开关S1的第三触点，此时，w1为10；The knife of the single-pole three-throw switch S1 hits the third contact of the single-pole three-throw switch S1, and at this time, w 1 is 10;
    单刀双掷开关S2的刀打到单刀双掷开关S2的第一触点，此时，w2为0； The knife of the single-pole double-throw switch S2 hits the first contact of the single-pole double-throw switch S2, and at this time, w 2 is 0;
    单刀双掷开关S2的刀打到单刀双掷开关S2的第二触点，此时，w2为1；The knife of the single-pole double-throw switch S2 hits the second contact of the single-pole double-throw switch S2, and at this time, w 2 is 1;
    单刀单掷开关S3打开，且单刀单掷开关S4关闭，此时，w3为0；The single pole single throw switch S3 is opened, and the single pole single throw switch S4 is closed, at this time, w 3 is 0;
    单刀单掷开关S3关闭，且单刀单掷开关S4打开，此时，w3为1；The single pole single throw switch S3 is closed, and the single pole single throw switch S4 is opened, at this time, w 3 is 1;
    当控制信号W＝[w1w2w3]为0000时，低频区域子带信号即为遮蔽滤波模块输出的信号，子带信号被存储到第四寄存器；When the control signal W=[w 1 w 2 w 3 ] is 0000, the low-frequency area sub-band signal is the signal output by the shadow filtering module, and the sub-band signal is stored in the fourth register;
    当控制信号W＝[w1w2w3]为0010时；低频区域被第一分数内插滤波模块均匀地分为两个带宽为π/6的子带，子带信号被存储到第四寄存器；When the control signal W=[w 1 w 2 w 3 ] is 0010; the low frequency region is evenly divided into two subbands with a bandwidth of π/6 by the first fractional interpolation filter module, and the subband signal is stored to the fourth register;
    当控制信号W＝[w1w2w3]为0011时；低频区域被第一、二、三分数内插滤波模块及后续的加法器均匀地分为四个带宽为π/12的子带，子带信号被存储到第四寄存器；When the control signal W=[w 1 w 2 w 3 ] is 0011; the low frequency region is evenly divided into four subbands with a bandwidth of π/12 by the first, second and third fractional interpolation filtering modules and subsequent adders. , the subband signal is stored to the fourth register;
    当控制信号W＝[w1w2w3]为0100时；中频区域子带信号即为遮蔽滤波模块输出的信号，子带信号被存储到第四寄存器；When the control signal W=[w 1 w 2 w 3 ] is 0100; the intermediate frequency region subband signal is the signal output by the shadow filtering module, and the subband signal is stored in the fourth register;
    当控制信号W＝[w1w2w3]为0110时；中频区域被第一分数滤波模块均匀地分为两个带宽为π/6的子带，子带信号被存储到第四寄存器；When the control signal W=[w 1 w 2 w 3 ] is 0110; the intermediate frequency region is evenly divided into two sub-bands with a bandwidth of π/6 by the first fractional filtering module, and the sub-band signal is stored in the fourth register;
    当控制信号W＝[w1w2w3]为0111时；中频区域被第一、二、三分数内插滤波模块及后续的加法器均匀地分为四个带宽为π/12的子带，子带信号被存储到第四寄存器；When the control signal W=[w 1 w 2 w 3 ] is 0111; the intermediate frequency region is evenly divided into four subbands with a bandwidth of π/12 by the first, second and third fractional interpolation filtering modules and subsequent adders. , the subband signal is stored to the fourth register;
    当控制信号W＝[w1w2w3]为1000时；高频区域子带信号即为遮蔽滤波模块输出的信号，子带信号被存储到第四寄存器；When the control signal W=[w 1 w 2 w 3 ] is 1000; the high frequency region subband signal is the signal output by the shadow filtering module, and the subband signal is stored in the fourth register;
    当控制信号W＝[w1w2w3]为1010时；高频区域被第一分数滤波模块均匀地分为两个带宽为π/6的子带，子带信号被存储到第四寄存器；When the control signal W=[w 1 w 2 w 3 ] is 1010; the high frequency region is evenly divided into two subbands with a bandwidth of π/6 by the first fractional filtering module, and the subband signal is stored in the fourth register. ;
    当控制信号W＝[w1w2w3]为1011时；高频区域被第一、二、三分数内插滤波模块及后续的加法器均匀地分为四个带宽为π/12的子带，子带信号被存储到第四寄存器；When the control signal W=[w 1 w 2 w 3 ] is 1011; the high frequency region is evenly divided into four sub-bands of π/12 by the first, second and third fractional interpolation filtering modules and subsequent adders. The subband signal is stored in the fourth register;
    所述低频区域的传递函数为：The transfer function of the low frequency region is:
    F1(z)＝F(z)     (4)F 1 (z)=F(z) (4)
    所述中频区域的传递函数为：The transfer function of the intermediate frequency region is:
    F3(z)＝Fh(z)     (5) F 3 (z)=F h (z) (5)
    所述高频区域的传递函数为：The transfer function of the high frequency region is:
    F2(z)＝z-Δ-F(z)-Fh(z)     (6)；F 2 (z)=z -Δ -F(z)-F h (z) (6);
    步骤(3)：所述第四寄存器的信号输出。 Step (3): Signal output of the fourth register.
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