WO2016047889A1 - Display driving device - Google Patents

Display driving device Download PDF

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Publication number
WO2016047889A1
WO2016047889A1 PCT/KR2015/005857 KR2015005857W WO2016047889A1 WO 2016047889 A1 WO2016047889 A1 WO 2016047889A1 KR 2015005857 W KR2015005857 W KR 2015005857W WO 2016047889 A1 WO2016047889 A1 WO 2016047889A1
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WO
WIPO (PCT)
Prior art keywords
data
data signals
switch
source terminal
pixel information
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PCT/KR2015/005857
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French (fr)
Korean (ko)
Inventor
권용중
윤정배
최정희
Original Assignee
주식회사 실리콘웍스
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Publication of WO2016047889A1 publication Critical patent/WO2016047889A1/en

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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275Details of drivers for data electrodes
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals

Definitions

  • the present invention relates to a display apparatus, and more particularly, to a display driving apparatus which can obtain the benefits of reduced integrated circuit area, reduced power consumption, and reduced heat generation.
  • a display apparatus includes a display panel having a plurality of gate lines and a plurality of data lines, a gate driving circuit supplying a gate driving signal to the plurality of gate lines, a data driving circuit supplying a data signal to the plurality of data lines, and a pixel. And a timing controller for transmitting a data signal having information to the data driving circuit.
  • the display panel may be configured of a liquid crystal display panel, an LED display panel, and the like.
  • the liquid crystal display panel includes a lower substrate on which the pixel electrode is formed, an upper substrate on which the common electrode is formed, and a liquid crystal layer interposed therebetween, and applies a voltage to the pixel electrode to rearrange the liquid crystal molecules of the liquid crystal layer to pass through the liquid crystal layer. Adjust the light transmittance.
  • the OLED display panel includes an organic light emitting diode and emits light when a current flows through the organic light emitting diode when a voltage is applied.
  • Pixels such as red (R), green (G), and blue (B) are formed in the display panel, and each pixel is driven by a data signal to perform a display operation.
  • RGBW method of further adding a white (W) pixel has been proposed.
  • the data driving circuit may include an output buffer unit for buffering and outputting a data signal, and the output buffer unit may include a number of amplifiers for amplifying and outputting the data signal.
  • the number of amplifiers in the output buffer unit also increases significantly, which may cause problems such as an increase in integrated circuit area, power consumption, and heat generation of the data driving circuit.
  • An object of the present invention is to provide a display driving apparatus capable of obtaining integrated circuit area reduction, power consumption reduction, and heat generation reduction by excluding an amplifier corresponding to a data signal having a fixed value.
  • the present invention includes a selector for switching a data signal having pixel information and a data signal having a fixed value between the data driving circuit and the display panel to drive a relatively large number of data lines with a relatively small number of channels. It is an object of the present invention to provide a display driving device that can be used.
  • a display driving apparatus is a display driving apparatus for providing first to fourth data signals to a unit display area of a display panel, the display driving apparatus comprising: a buffering and outputting the first to third data signals having pixel information; An output buffer unit including first to third buffers; And a selector configured to switch the fourth data signal having the fixed value and the first to third data signals to be applied to the corresponding first to fourth pads, respectively.
  • the display driving apparatus includes a data driving circuit including first to third channels for outputting first to third data signals corresponding to pixel information; A source for generating a fourth data signal having a fixed value; And a selector configured to switch the first to third data signals and the fourth data signals by the first to third channels to be applied to corresponding first to fourth pads, respectively.
  • the present invention can obtain the benefits of reduced integrated circuit area, reduced power consumption, and reduced heat generation by excluding an amplifier corresponding to a data signal having a fixed value.
  • the present invention also provides a selector for switching a data signal having pixel information and a data signal having a fixed value between the data driving circuit and the display panel to drive a relatively large number of data lines with a relatively small number of channels. Can be.
  • FIG. 1 is a circuit diagram illustrating an embodiment of a display driving apparatus according to the present invention.
  • FIG. 2 is a table illustrating an example of pixel information of FIG. 1.
  • 3 to 6 are diagrams for describing an operation process of FIG. 1.
  • FIG. 7 is a block diagram showing another embodiment of a display driving apparatus according to the present invention.
  • An embodiment of the present invention discloses a display driving apparatus in which a data signal having pixel information uses a buffer and a data signal having a fixed value excludes the buffer so that the integrated circuit area, power consumption, and heat generation can be obtained. do.
  • An embodiment of the present invention discloses a display driving apparatus including a selector for implementing an interface between a data driving circuit and a display panel so as to drive a relatively large number of data lines with a relatively small number of channels.
  • the embodiment of the present invention exemplifies outputting the first to fourth data signals to the unit display area of the display panel for simplicity of explanation.
  • FIG. 1 is a circuit diagram illustrating an embodiment of a display driving apparatus according to the present invention.
  • a display driving device 80 includes a latch unit 10, a digital-to-analog converter (DAC) unit 20, an output buffer unit 30, and a selection unit. And 40.
  • DAC digital-to-analog converter
  • the latch unit 10 latches pixel information provided from the control unit 60 (shown in FIG. 7) and provides it to the DAC unit 20.
  • the DAC 20 converts this into an analog to the output buffer unit 30. to provide.
  • the output buffer unit 30 buffers the first to third data signals DATA1, DATA2, and DATA3 corresponding to pixel information provided from the DAC 20, and outputs the first to third buffers BUF1, BUF2, and BUF3. ).
  • the selector 40 includes first to fourth pads R_OUT, W_OUT, G_OUT, and B_OUT to which the first to third data signals DATA1, DATA2, and DATA3 and the fourth data signal DATA_REF having a fixed value respectively correspond.
  • the first to third data signals DATA1, DATA2, and DATA3 having pixel information are input to the selection unit 40 through the output buffer unit 30, and the fourth data signal having a fixed value ( DATA_REF) is input to the selection unit 40 without passing through the output buffer unit 30.
  • the selector 40 may include first to fourth data signals corresponding to the first to fourth data signals corresponding to WGB, RGB, RWB, or RWG, which are allocated to the first to fourth data signals.
  • the switch is applied to the pads R_OUT, W_OUT, G_OUT, and B_OUT to be provided to the display panel 50.
  • the first to third data signals DATA1, DATA2, and DATA3 have W, G, and B pixel information.
  • the case surface selector 40 applies the fourth data signal DATA_REF to the first pad R_OUT, and applies the first to third data signals to the corresponding second to fourth pads W_OUT, G_OUT, and B_OUT. Is applied to.
  • Other examples corresponding to a case in which the first to third data signals DATA1, DATA2, and DATA3 are input to R G B, R W B, or R W G will be described in detail with reference to FIGS. 2 to 6.
  • the fourth data signal DATA_REF has a level for blacking one pixel.
  • the fourth data signal DATA_REF may be configured to be generated inside the display driving device or supplied from the outside. For example, it may be configured to be supplied from an internal source supplying the gamma voltage to the DAC unit 20. Alternatively, a voltage having a predetermined level may be supplied from an external source of the display driving apparatus.
  • the selector 40 controls the first to fourth data signals DATA1, DATA2, DATA3, and DATA_REF corresponding to the control signal provided from the controller 60 (shown in FIG. 7) of the display panel 50.
  • the first pad to the fourth pad R_OUT, W_OUT, G_OUT, and B_OUT may be configured to be transferred.
  • control signal is determined corresponding to the pixel information provided to the latch unit 10 by the controller 60.
  • the control signal applies the fourth data signal DATA_REF to the first pad R_OUT and applies the first to third data signals to the second pad to fourth pad W_OUT. , G_OUT, B_OUT).
  • the selector 40 may be configured as a multiplexer.
  • the selector 40 may switch the first switch SW1, the first, second, and fourth data signals DATA1, DATA2, and DATA_REF to switch in response to the first and fourth data signals DATA1 and DATA_REF.
  • the second switch SW2 and the second, third and fourth data signals DATA2, DATA3, and DATA_REF that perform the switching in response to the third switch SW3 and the third and third switches.
  • the fourth switch SW4 performs switching in response to the four data signals DATA3 and DATA_REF.
  • the first to fourth switches SW1, SW2, SW3, and SW4 are configured to select different data signals.
  • the first switch SW1 includes a first common terminal C1, a first source terminal S1, and a second source terminal S2, and the second switch SW2 includes a second common terminal C2.
  • the third switch SW3 includes a third common terminal C3, a fourth source terminal S4, a fifth source terminal S5, and a sixth source terminal S6, and the fourth switch SW4 is formed of a third switch SW4.
  • Four common terminals C4, a sixth source terminal S6, and a seventh source terminal S7 are included.
  • the first and second switches SW1 and SW2 share the second source terminal S2, and the second and third switches SW2 and SW3 share the fourth source terminal S4, and the third The fourth switches SW3 and SW4 may be configured to share the sixth source terminal S6.
  • the first to fourth pads R_OUT, W_OUT, G_OUT, and B_OUT of the display panel 50 may include the first to fourth common terminals C1, C2, and C1 of the first to fourth switches SW1, SW2, SW3, and SW4. C3 and C4, respectively, and the first to fourth pads R_OUT, W_OUT, G_OUT, and B_OUT are connected to the first to fourth data lines provided in the display panel 50, respectively.
  • FIG. 2 is a table illustrating an example of pixel information of FIG. 1, and FIGS. 3 to 6 are diagrams for describing an operation process of FIG. 1 corresponding to pixel information.
  • FIG. 3 is a circuit diagram illustrating an operation process when pixel information is inputted with W, G, and B.
  • FIG. 4 is a circuit diagram illustrating an operation process when inputting R, G, and B.
  • FIG. 5 is a circuit diagram for describing an operation process when R, W, and B are input, and
  • FIG. 6 is a circuit diagram for explaining an operation process when R, W, and G are input.
  • the first to third buffers BUF1, BUF2, and BUF3 output first to third data signals DATA_W, DATA_G, and DATA_B corresponding to W, G, and B.
  • the first switch SW1 switches to the first source terminal S1
  • the second switch SW2 switches to the second source terminal S2
  • the third switch SW3 is connected to the fourth source terminal S1. S4)
  • the fourth switch SW4 switches to the sixth source terminal S6.
  • the fourth data signal DATA_REF is applied to the first pad R_OUT and the second to fourth pads W_OUT, G_OUT, and B_OUT.
  • the first to third buffers BUF1, BUF2, and BUF3 output first to third data signals DATA_R, DATA_G, and DATA_B corresponding to R, G, and B.
  • the first switch SW1 switches to the second source terminal S2
  • the second switch SW2 switches to the third source terminal S3
  • the third switch SW3 is connected to the fourth source terminal S3. S4)
  • the fourth switch SW4 switches to the sixth source terminal S6.
  • the fourth data signal DATA_REF is applied to the second pad W_OUT, and the first, third, and fourth pads R_OUT,
  • the first to third data signals DATA_R, DATA_G, and DATA_B are applied to G_OUT and B_OUT.
  • the first to third buffers BUF1, BUF2, and BUF3 output first to third data signals DATA_R, DATA_W, and DATA_B corresponding to R, W, and B.
  • the first switch SW1 switches to the second source terminal S2
  • the second switch SW2 switches to the fourth source terminal S4
  • the third switch SW3 switches to the fifth source terminal (S). S5)
  • the fourth switch SW4 switches to the sixth source terminal S6.
  • the fourth data signal DATA_REF is applied to the third pad G_OUT, and the first, second, and fourth pads R_OUT,
  • the first to third data signals DATA_R, DATA_W, and DATA_B are applied to W_OUT and B_OUT.
  • the first to third buffers BUF1, BUF2, and BUF3 output first to third data signals DATA_R, DATA_W, and DATA_G corresponding to R, W, and G.
  • the first switch SW1 switches to the second source terminal S2
  • the second switch SW2 switches to the fourth source terminal S4
  • the third switch SW3 switches to the sixth source terminal (S). S6)
  • the fourth switch SW4 switches to the seventh source terminal S7.
  • the fourth data signal DATA_REF is applied to the fourth pad B_OUT and the first to third pads R_OUT, W_OUT, and G_OUT. ) Is applied to the first to third data signals DATA_R, DATA_W, and DATA_G.
  • the selector 40 corresponds to the first to fourth data signals DATA1, DATA2, DATA3, and DATA_REF corresponding to the case input to WGB, RGB, RWB, or RWG, respectively.
  • the switching operation is performed to be applied to the pads R_OUT, W_OUT, G_OUT, and B_OUT.
  • the selector 40 may display the first to fourth data signals DATA1, DATA2, DATA3, and DATA_REF according to a control signal determined corresponding to a case input to WGB, RGB, RWB, or RWG.
  • a switching operation is performed to be applied to the first to fourth pads R_OUT, W_OUT, G_OUT, and B_OUT of FIG. 50.
  • FIG. 7 is a block diagram illustrating another embodiment of a display driving apparatus according to the present invention.
  • a display driving apparatus includes a data driving circuit 70 and a selection unit 40.
  • the data driving circuit 70 includes first to third channels 72, 74, and 76 which output first to third data signals DATA1, DATA2, and DATA3 in response to pixel information.
  • the selector 40 may correspond to the first to third data signals DATA1, DATA2, and DATA3 and the fourth data signal DATA_REF by the first to third channels 72, 74, and 76 in response to a predetermined case.
  • the switching operation is performed to be applied to the first to fourth pads R_OUT, W_OUT, G_OUT, and B_OUT, respectively.
  • the data driving circuit 70 includes a latch unit 10, a DAC unit 20, and an output buffer unit 30.
  • the data driving circuit 70 outputs the first to third data signals DATA1, DATA2, and DATA3 through the first to third channels 72, 74, and 76.
  • the first channel 72 includes a first latch LATCH1, a DAC1, and a first buffer BUF1
  • the second channel 74 includes a second latch LATCH2, a DAC2, and a second buffer BUF2.
  • the third channel 76 includes a third latch LATCH3, a DAC3, and a third buffer BUF3.
  • the fourth data signal DATA_REF may be provided from a specified source, and the source may be configured inside or outside the display driving apparatus.
  • a gamma voltage unit (not shown) for supplying a gamma voltage to the DAC unit 20 inside the display driving device is used as a source, or as an external example of the display driving device, in a power supply device (not shown). It can be configured that a voltage having a constant level is supplied.
  • the selector 40 may include the first to third data signals DATA1, DATA2, and DATA3 and the fourth according to a control signal determined to correspond to the pixel information allocated to the first to third channels 72, 74, and 76.
  • the data signal DATA_REF is switched to be applied to the first to fourth pads R_OUT, W_OUT, G_OUT, and B_OUT of the corresponding display panel 50, respectively.
  • the control signal may transmit the fourth data signal DATA_REF to the first pad R_OUT. It is determined to apply the data signal to the second to fourth pads W_OUT, G_OUT, and B_OUT, respectively.
  • the control signal may include a fourth data signal DATA_REF on the second pad W_OUT.
  • the signal is determined to be applied to the first, third, and fourth pads R_OUT, G_OUT, and B_OUT, respectively.
  • the control signal may include a fourth data signal DATA_REF on the third pad G_OUT.
  • the signal is determined to be applied to the first, second, and fourth pads R_OUT, W_OUT, and B_OUT, respectively.
  • the control signal may include a fourth data signal DATA_REF on the fourth pad B_OUT.
  • the signal is determined to be applied to the first to third pads R_OUT, W_OUT, and G_OUT, respectively.
  • the selector 40 connects one channel of the data driving circuit 70 to a plurality of data lines and transfers the data signals supplied through the one channel to the plurality of data lines with a time difference.
  • the display panel 50 is configured to turn on pixels of a selected row according to a gate driving signal supplied through a gate driving circuit (not shown), and the first to third data signals supplied from the data driving circuit 70.
  • the fourth data signal having a fixed value is sequentially supplied to the unit display area of the display panel 50 through the selector 40 to display an image.
  • the display apparatus may further include a controller 60 that provides pixel information to the data driving circuit 70 and a control signal to the selector 40.
  • the data driving circuit 70 outputs the first to third data signals DATA1, DATA2, and DATA3 through the first to third channels 72, 74, and 76 in response to the pixel information input from the controller 60. do.
  • the selector 40 may further include a display panel corresponding to the fourth data signal DATA_REF having a fixed value and the first to third data signals DATA1, DATA2, and DATA3, respectively, according to a control signal input from the controller 60. Switching is applied to the first to fourth pads R_OUT, W_OUT, G_OUT, and B_OUT of 50.
  • the fourth data signal DATA_REF has a level for blacking one pixel and is set to be generated inside or outside the data driving circuit 70.
  • the controller 60 provides the pixel information to the data driving circuit 70 and performs a switching operation of the selector 40 in response to the pixel information allocated to the first to third data signals DATA1, DATA2, and DATA3.
  • a control signal for controlling is generated and provided to the selector 40.
  • the controller 60 switches the selection unit 40 in response to the pixel information of at least one of WGB, RGB, RWB, and RWG allocated to the first to third data signals DATA1, DATA2, and DATA3. Generate a control signal for control.
  • the controller 60 may be included inside or outside the display driving apparatus 80.
  • the controller 60 may be a control circuit provided in a timing controller or a source driver of the display apparatus.
  • the data driver circuit 70 includes a selector 40 for switching the first to third data signals DATA1, DATA2, and DATA3 having pixel information and the fourth data signal DATA_REF having a fixed value.
  • a selector 40 for switching the first to third data signals DATA1, DATA2, and DATA3 having pixel information and the fourth data signal DATA_REF having a fixed value.
  • the present invention can obtain the benefits of reduced integrated circuit area, reduced power consumption, and reduced heat generation by excluding an amplifier corresponding to the fourth data signal DATA_REF having a fixed value.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

A display driving device is disclosed. The display driving device, which provides first to fourth data signals to a unit display region of a display panel, comprises: an output buffer unit comprising first to third buffers for buffering and outputting the first to third data signals having pixel information; and a selection unit for performing switching so as to enable the fourth data signal having a fixed value and the first to third data signals to be applied to respectively corresponding first to fourth pads.

Description

디스플레이 구동 장치Display drive
본 발명은 디스플레이 장치에 관한 것으로, 더 상세하게는 집적회로 면적 감소, 소비전력 감소 및 발열 저감의 이득을 얻을 수 있도록 한 디스플레이 구동 장치에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display apparatus, and more particularly, to a display driving apparatus which can obtain the benefits of reduced integrated circuit area, reduced power consumption, and reduced heat generation.
일반적으로 디스플레이 장치는 복수의 게이트 라인과 복수의 데이터 라인이 구비된 디스플레이 패널, 복수의 게이트 라인에 게이트 구동 신호를 공급하는 게이트 구동 회로, 복수의 데이터 라인에 데이터 신호를 공급하는 데이터 구동 회로 및 화소 정보를 갖는 데이터 신호를 데이터 구동 회로에 전달하는 타이밍 컨트롤러 등을 포함할 수 있다.In general, a display apparatus includes a display panel having a plurality of gate lines and a plurality of data lines, a gate driving circuit supplying a gate driving signal to the plurality of gate lines, a data driving circuit supplying a data signal to the plurality of data lines, and a pixel. And a timing controller for transmitting a data signal having information to the data driving circuit.
디스플레이 패널은 액정 표시 패널, 오엘이디 표시 패널 등으로 구성될 수 있다. The display panel may be configured of a liquid crystal display panel, an LED display panel, and the like.
액정 표시 패널은 화소 전극이 형성된 하부 기판과 공통 전극이 형성된 상부 기판 및 이들 사이에 삽입되어 있는 액정층으로 이루어져, 화소 전극에 전압을 인가하여 액정층의 액정 분자들을 재배열시킴으로써 액정층을 통과하는 빛의 투과율을 조절한다. The liquid crystal display panel includes a lower substrate on which the pixel electrode is formed, an upper substrate on which the common electrode is formed, and a liquid crystal layer interposed therebetween, and applies a voltage to the pixel electrode to rearrange the liquid crystal molecules of the liquid crystal layer to pass through the liquid crystal layer. Adjust the light transmittance.
오엘이디 표시 패널은 유기 발광 소자를 포함하며 전압이 인가될 때 유기 발광 소자에 전류가 흐르면서 발광한다.The OLED display panel includes an organic light emitting diode and emits light when a current flows through the organic light emitting diode when a voltage is applied.
이러한 디스플레이 패널에는 적색(R), 녹색(G) 및 청색(B) 등의 화소들이 형성되며, 데이터 신호에 의해 각 화소들이 구동되어 표시 동작이 이루어진다. 최근에는 휘도를 더욱 개선하기 위해 적색(R), 녹색(G) 및 청색(B) 화소에 부가적인 화소 일례로, 흰색(W) 화소를 더 추가하는 RGBW 방식이 제안되고 있다.Pixels such as red (R), green (G), and blue (B) are formed in the display panel, and each pixel is driven by a data signal to perform a display operation. Recently, in order to further improve luminance, as an example of additional pixels to the red (R), green (G), and blue (B) pixels, an RGBW method of further adding a white (W) pixel has been proposed.
데이터 구동 회로는 데이터 신호를 버퍼링하여 출력하는 출력 버퍼부를 포함할 수 있고, 출력 버퍼부는 데이터 신호를 증폭하여 출력하기 위한 수많은 증폭기를 포함할 수 있다.The data driving circuit may include an output buffer unit for buffering and outputting a data signal, and the output buffer unit may include a number of amplifiers for amplifying and outputting the data signal.
그런데, RGBW 방식과 같이 디스플레이 패널의 화소가 늘어나면, 출력 버퍼부의 증폭기의 개수도 대폭 증가하고, 이로 인해 데이터 구동 회로의 집적회로 면적 증가, 소비전력 증가 및 발열 증가 등의 문제점이 발생할 수 있다.However, as the pixels of the display panel increase, as in the RGBW method, the number of amplifiers in the output buffer unit also increases significantly, which may cause problems such as an increase in integrated circuit area, power consumption, and heat generation of the data driving circuit.
본 발명은 고정값을 갖는 데이터 신호에 대응되는 증폭기를 배제함으로써 집적회로 면적 감소, 소비전력 감소 및 발열 저감의 이득을 얻을 수 있도록 한 디스플레이 구동 장치를 제공하는데 그 목적이 있다.SUMMARY OF THE INVENTION An object of the present invention is to provide a display driving apparatus capable of obtaining integrated circuit area reduction, power consumption reduction, and heat generation reduction by excluding an amplifier corresponding to a data signal having a fixed value.
또한, 본 발명은 화소 정보를 갖는 데이터 신호와 고정값을 갖는 데이터 신호를 스위칭하는 선택부를 데이터 구동 회로와 디스플레이 패널 사이에 구비함으로써 상대적으로 적은 수의 채널로 상대적으로 많은 수의 데이터 라인을 구동할 수 있는 디스플레이 구동 장치를 제공하는데 그 목적이 있다.In addition, the present invention includes a selector for switching a data signal having pixel information and a data signal having a fixed value between the data driving circuit and the display panel to drive a relatively large number of data lines with a relatively small number of channels. It is an object of the present invention to provide a display driving device that can be used.
본 발명에 의한 디스플레이 구동 장치는 디스플레이 패널의 단위표시영역에 대하여 제1 내지 제4 데이터 신호를 제공하는 디스플레이 구동 장치에 있어서, 화소 정보를 갖는 상기 제1 내지 제3 데이터 신호를 버퍼링하여 출력하는 제1 내지 제3 버퍼를 포함하는 출력 버퍼부; 및 고정값을 갖는 상기 제4 데이터 신호와 상기 제1 내지 제3 데이터 신호가 각각 대응되는 제1 내지 제4 패드에 인가되도록 스위칭하는 선택부;를 포함한다.A display driving apparatus according to the present invention is a display driving apparatus for providing first to fourth data signals to a unit display area of a display panel, the display driving apparatus comprising: a buffering and outputting the first to third data signals having pixel information; An output buffer unit including first to third buffers; And a selector configured to switch the fourth data signal having the fixed value and the first to third data signals to be applied to the corresponding first to fourth pads, respectively.
또한, 본 발명에 의한 디스플레이 구동 장치는 화소 정보에 대응하여 제1 내지 제3 데이터 신호를 출력하는 제1 내지 제3 채널을 포함하는 데이터 구동 회로; 고정값을 갖는 제4 데이터 신호를 생성하는 소스; 및 상기 제1 내지 제3 채널에 의한 상기 제1 내지 제3 데이터 신호와 상기 제4 데이터 신호가 각각 대응되는 제1 내지 제4 패드에 인가되도록 스위칭하는 선택부;를 포함한다.In addition, the display driving apparatus according to the present invention includes a data driving circuit including first to third channels for outputting first to third data signals corresponding to pixel information; A source for generating a fourth data signal having a fixed value; And a selector configured to switch the first to third data signals and the fourth data signals by the first to third channels to be applied to corresponding first to fourth pads, respectively.
본 발명은 고정값을 갖는 데이터 신호에 대응되는 증폭기를 배제함으로써 집적회로 면적 감소, 소비전력 감소 및 발열 저감의 이득을 얻을 수 있다.The present invention can obtain the benefits of reduced integrated circuit area, reduced power consumption, and reduced heat generation by excluding an amplifier corresponding to a data signal having a fixed value.
또한, 본 발명은 화소 정보를 갖는 데이터 신호와 고정값을 갖는 데이터 신호를 스위칭하는 선택부를 데이터 구동 회로와 디스플레이 패널 사이에 구비함으로써 상대적으로 많은 수의 데이터 라인을 상대적으로 적은 수의 채널로 구동할 수 있다.The present invention also provides a selector for switching a data signal having pixel information and a data signal having a fixed value between the data driving circuit and the display panel to drive a relatively large number of data lines with a relatively small number of channels. Can be.
도 1은 본 발명에 따른 디스플레이 구동 장치의 일 실시예를 나타낸 회로도이다.1 is a circuit diagram illustrating an embodiment of a display driving apparatus according to the present invention.
도 2는 도 1의 화소 정보의 일례를 도시한 테이블이다.FIG. 2 is a table illustrating an example of pixel information of FIG. 1.
도 3 내지 도 6은 도 1의 동작 과정을 설명하기 위한 도면이다.3 to 6 are diagrams for describing an operation process of FIG. 1.
도 7은 본 발명에 따른 디스플레이 구동 장치의 다른 실시예를 나타낸 블럭도이다.7 is a block diagram showing another embodiment of a display driving apparatus according to the present invention.
이하, 첨부된 도면을 참조하여 본 발명의 바람직한 실시예를 상세하게 설명한다. 본 명세서 및 특허청구범위에 사용된 용어는 통상적이거나 사전적 의미로 한정되어 해석되지 아니하며, 본 발명의 기술적 사항에 부합하는 의미와 개념으로 해석되어야 한다.Hereinafter, with reference to the accompanying drawings will be described in detail a preferred embodiment of the present invention. The terms used in the present specification and claims are not to be construed as being limited to ordinary or dictionary meanings, but should be interpreted as meanings and concepts corresponding to the technical matters of the present invention.
본 명세서에 기재된 실시예와 도면에 도시된 구성은 본 발명의 바람직한 실시예이며, 본 발명의 기술적 사상을 모두 대변하는 것이 아니므로, 본 출원 시점에서 이들을 대체할 수 있는 다양한 균등물과 변형예들이 있을 수 있다.The embodiments described in the specification and the configuration shown in the drawings are preferred embodiments of the present invention, and do not represent all of the technical idea of the present invention, various equivalents and modifications that can replace them at the time of the present application are There may be.
본 발명의 실시예는 집적회로 면적 감소, 소비전력 감소 및 발열 저감의 이득을 얻을 수 있도록 화소 정보를 갖는 데이터 신호는 버퍼를 이용하고 고정값을 갖는 데이터 신호는 버퍼를 배제하는 디스플레이 구동 장치를 개시한다.An embodiment of the present invention discloses a display driving apparatus in which a data signal having pixel information uses a buffer and a data signal having a fixed value excludes the buffer so that the integrated circuit area, power consumption, and heat generation can be obtained. do.
본 발명의 실시예는 상대적으로 적은 수의 채널로 상대적으로 많은 수의 데이터 라인을 구동할 수 있도록 데이터 구동 회로와 디스플레이 패널 사이에서 인터페이스를 구현하는 선택부를 포함하는 디스플레이 구동 장치를 개시한다.An embodiment of the present invention discloses a display driving apparatus including a selector for implementing an interface between a data driving circuit and a display panel so as to drive a relatively large number of data lines with a relatively small number of channels.
본 발명의 실시예는 설명의 간략화를 위해 디스플레이 패널의 단위표시영역에 대하여 제1 내지 제4 데이터 신호를 출력하는 것을 예시한다.The embodiment of the present invention exemplifies outputting the first to fourth data signals to the unit display area of the display panel for simplicity of explanation.
도 1은 본 발명에 따른 디스플레이 구동 장치의 일 실시예를 나타낸 회로도이다.1 is a circuit diagram illustrating an embodiment of a display driving apparatus according to the present invention.
도 1을 참고하면, 본 발명의 일 실시예에 따른 디스플레이 구동 장치(80)는 래치부(10), DAC(Digital-to-Analog Converter)부(20), 출력 버퍼부(30) 및 선택부(40)를 포함한다. Referring to FIG. 1, a display driving device 80 according to an embodiment of the present invention includes a latch unit 10, a digital-to-analog converter (DAC) unit 20, an output buffer unit 30, and a selection unit. And 40.
래치부(10)는 제어부(60, 도 7에 도시)로부터 제공되는 화소 정보를 래치하고 이를 DAC부(20)로 제공하며, DAC(20)는 이를 아날로그로 변환하여 출력 버퍼부(30)로 제공한다. The latch unit 10 latches pixel information provided from the control unit 60 (shown in FIG. 7) and provides it to the DAC unit 20. The DAC 20 converts this into an analog to the output buffer unit 30. to provide.
출력 버퍼부(30)는 DAC(20)로부터 제공되는 화소 정보에 대응하는 제1 내지 제3 데이터 신호(DATA1, DATA2, DATA3)를 버퍼링하여 출력하는 제1 내지 제3 버퍼(BUF1, BUF2, BUF3)를 포함한다. The output buffer unit 30 buffers the first to third data signals DATA1, DATA2, and DATA3 corresponding to pixel information provided from the DAC 20, and outputs the first to third buffers BUF1, BUF2, and BUF3. ).
선택부(40)는 제1 내지 제3 데이터 신호(DATA1, DATA2, DATA3) 및 고정값을 갖는 제4 데이터 신호(DATA_REF)가 각각 대응되는 제1 내지 제4 패드(R_OUT, W_OUT, G_OUT, B_OUT)에 인가되도록 스위칭 동작을 수행한다. 본 발명의 실시예는 화소 정보를 갖는 제1 내지 제3 데이터 신호(DATA1, DATA2, DATA3)가 출력 버퍼부(30)를 통해 선택부(40)로 입력되고 고정값을 갖는 제4 데이터 신호(DATA_REF)가 출력 버퍼부(30)를 통하지 않고 선택부(40)로 입력되도록 구성한다.The selector 40 includes first to fourth pads R_OUT, W_OUT, G_OUT, and B_OUT to which the first to third data signals DATA1, DATA2, and DATA3 and the fourth data signal DATA_REF having a fixed value respectively correspond. To perform the switching operation. According to an exemplary embodiment of the present invention, the first to third data signals DATA1, DATA2, and DATA3 having pixel information are input to the selection unit 40 through the output buffer unit 30, and the fourth data signal having a fixed value ( DATA_REF) is input to the selection unit 40 without passing through the output buffer unit 30.
선택부(40)는 제1 내지 제4 데이터 신호에 할당된 W G B, 또는 R G B, 또는 R W B, 또는 R W G의 케이스(Case)에 대응하여 제1 내지 제4 데이터 신호가 각각 대응되는 제1 내지 제4패드(R_OUT, W_OUT, G_OUT, B_OUT)에 인가되도록 스위칭하여 디스플레이 패널(50)에 제공한다. The selector 40 may include first to fourth data signals corresponding to the first to fourth data signals corresponding to WGB, RGB, RWB, or RWG, which are allocated to the first to fourth data signals. The switch is applied to the pads R_OUT, W_OUT, G_OUT, and B_OUT to be provided to the display panel 50.
일례로, 적색(R), 녹색(G), 청색(B), 및 흰색(W) 화소 정보 중 제1 내지 제3 데이터 신호(DATA1, DATA2, DATA3)가 W, G, B 화소 정보를 갖는 케이스면 선택부(40)는 제4 데이터 신호(DATA_REF)를 제1 패드(R_OUT)에 인가시키고, 제1 내지 제3 데이터 신호를 대응되는 제2 패드 내지 제4 패드(W_OUT, G_OUT, B_OUT)에 인가시킨다. 제1 내지 제3 데이터 신호(DATA1, DATA2, DATA3)가 R G B, 또는 R W B, 또는 R W G로 입력되는 케이스에 대응한 다른 일례들은 도 2 내지 도 6의 동작 과정에서 상세히 설명하기로 한다.For example, among the red (R), green (G), blue (B), and white (W) pixel information, the first to third data signals DATA1, DATA2, and DATA3 have W, G, and B pixel information. The case surface selector 40 applies the fourth data signal DATA_REF to the first pad R_OUT, and applies the first to third data signals to the corresponding second to fourth pads W_OUT, G_OUT, and B_OUT. Is applied to. Other examples corresponding to a case in which the first to third data signals DATA1, DATA2, and DATA3 are input to R G B, R W B, or R W G will be described in detail with reference to FIGS. 2 to 6.
여기서, 제4 데이터 신호(DATA_REF)는 화소 하나를 블랙 처리하기 위한 레벨을 갖는다. 이러한 제4 데이터 신호(DATA_REF)는 디스플레이 구동 장치의 내부에서 생성하거나 외부에서 공급되는 것으로 구성할 수 있다. 일례로, DAC부(20)에 감마 전압을 공급하는 내부 소스로부터 공급되는 것으로 구성할 수 있다. 또는 디스플레이 구동 장치의 외부 소스로부터 일정 레벨을 갖는 전압이 공급되는 것으로 구성할 수 있다. Here, the fourth data signal DATA_REF has a level for blacking one pixel. The fourth data signal DATA_REF may be configured to be generated inside the display driving device or supplied from the outside. For example, it may be configured to be supplied from an internal source supplying the gamma voltage to the DAC unit 20. Alternatively, a voltage having a predetermined level may be supplied from an external source of the display driving apparatus.
또한, 선택부(40)는 제어부(60, 도 7에 도시)에서 제공되는 제어신호에 따라 제1 내지 제4 데이터 신호(DATA1, DATA2, DATA3, DATA_REF)를 대응되는 디스플레이 패널(50)의 제1 패드 내지 제4 패드(R_OUT, W_OUT, G_OUT, B_OUT)에 전달되도록 구성할 수 있다. In addition, the selector 40 controls the first to fourth data signals DATA1, DATA2, DATA3, and DATA_REF corresponding to the control signal provided from the controller 60 (shown in FIG. 7) of the display panel 50. The first pad to the fourth pad R_OUT, W_OUT, G_OUT, and B_OUT may be configured to be transferred.
여기서, 제어 신호는 제어부(60)가 래치부(10)로 제공하는 화소 정보에 대응하여 결정된다. 일례로, W, G, B 화소 정보가 제공되면 제어 신호는 제4 데이터 신호(DATA_REF)를 제1 패드(R_OUT)에 인가시키고 제1 내지 제3 데이터 신호를 제2 패드 내지 제4 패드(W_OUT, G_OUT, B_OUT)에 각각 인가되도록 결정된다. 보다 구체적인 설명과 다른 일례는 도 2 내지 도 6의 동작 과정에서 상세히 설명하기로 한다.Here, the control signal is determined corresponding to the pixel information provided to the latch unit 10 by the controller 60. For example, when the W, G, and B pixel information are provided, the control signal applies the fourth data signal DATA_REF to the first pad R_OUT and applies the first to third data signals to the second pad to fourth pad W_OUT. , G_OUT, B_OUT). A more detailed description and another example will be described in detail in the operation of FIGS. 2 to 6.
선택부(40)는 멀티플렉서로 구성할 수 있다. 이러한 선택부(40)는 제1, 제4 데이터 신호(DATA1, DATA_REF)에 대응하여 스위칭을 수행하는 제1 스위치(SW1), 제1, 제2, 제4 데이터 신호(DATA1, DATA2, DATA_REF)에 대응하여 스위칭을 수행하는 제2 스위치(SW2), 상기 제2, 제3, 제4 데이터 신호(DATA2, DATA3, DATA_REF)에 대응하여 스위칭을 수행하는 제3 스위치(SW3) 및 제3, 제4 데이터 신호(DATA3, DATA_REF)에 대응하여 스위칭을 수행하는 제4스위치(SW4)를 포함한다. 여기서, 제1 내지 제4 스위치(SW1, SW2, SW3, SW4)는 서로 다른 데이터 신호를 선택하도록 구성한다.The selector 40 may be configured as a multiplexer. The selector 40 may switch the first switch SW1, the first, second, and fourth data signals DATA1, DATA2, and DATA_REF to switch in response to the first and fourth data signals DATA1 and DATA_REF. In response to the second switch SW2 and the second, third and fourth data signals DATA2, DATA3, and DATA_REF that perform the switching in response to the third switch SW3 and the third and third switches. The fourth switch SW4 performs switching in response to the four data signals DATA3 and DATA_REF. Here, the first to fourth switches SW1, SW2, SW3, and SW4 are configured to select different data signals.
그리고, 제1 스위치(SW1)는 제1 커먼 단자(C1), 제1 소스 단자(S1) 및 제2 소스 단자(S2)를 포함하고, 제2 스위치(SW2)는 제2 커먼 단자(C2), 제2 소스 단자(S2), 제3 소스 단자(S3) 및 제4 소스 단자(S4)를 포함한다. 제3 스위치(SW3)는 제3 커먼 단자(C3), 제4 소스 단자(S4), 제5 소스 단자(S5) 및 제6 소스 단자(S6)를 포함하고, 제4 스위치(SW4)는 제4 커먼 단자(C4), 제6 소스 단자(S6) 및 제7 소스 단자(S7)를 포함한다. 여기서, 제1, 제2 스위치(SW1, SW2)는 제2 소스 단자(S2)를 공유하고, 제2, 제3 스위치(SW2, SW3)는 제4 소스 단자(S4)를 공유하며, 제3, 제4 스위치(SW3, SW4)는 제6 소스 단자(S6)를 공유하도록 구성할 수 있다.The first switch SW1 includes a first common terminal C1, a first source terminal S1, and a second source terminal S2, and the second switch SW2 includes a second common terminal C2. , A second source terminal S2, a third source terminal S3, and a fourth source terminal S4. The third switch SW3 includes a third common terminal C3, a fourth source terminal S4, a fifth source terminal S5, and a sixth source terminal S6, and the fourth switch SW4 is formed of a third switch SW4. Four common terminals C4, a sixth source terminal S6, and a seventh source terminal S7 are included. Here, the first and second switches SW1 and SW2 share the second source terminal S2, and the second and third switches SW2 and SW3 share the fourth source terminal S4, and the third The fourth switches SW3 and SW4 may be configured to share the sixth source terminal S6.
디스플레이 패널(50)의 제1 내지 제4 패드(R_OUT, W_OUT, G_OUT, B_OUT)는 제1 내지 제4 스위치(SW1, SW2, SW3, SW4)의 제1 내지 제4 커먼 단자(C1, C2, C3, C4)와 각각 연결되고, 제1 내지 제4 패드(R_OUT, W_OUT, G_OUT, B_OUT)는 디스플레이 패널(50)에 구비된 제1 내지 제4 데이터 라인과 각각 연결된다.The first to fourth pads R_OUT, W_OUT, G_OUT, and B_OUT of the display panel 50 may include the first to fourth common terminals C1, C2, and C1 of the first to fourth switches SW1, SW2, SW3, and SW4. C3 and C4, respectively, and the first to fourth pads R_OUT, W_OUT, G_OUT, and B_OUT are connected to the first to fourth data lines provided in the display panel 50, respectively.
도 2는 도 1의 화소 정보의 일례를 도시한 테이블이고, 도 3 내지 도 6은 화소 정보에 대응한 도 1의 동작 과정을 설명하기 위한 도면이다.2 is a table illustrating an example of pixel information of FIG. 1, and FIGS. 3 to 6 are diagrams for describing an operation process of FIG. 1 corresponding to pixel information.
구체적으로 설명하면, 도 3은 화소 정보가 W, G, B가 입력될 때의 동작과정을 설명하기 위한 회로도이고, 도 4는 R, G, B가 입력될 때의 동작과정을 설명하기 위한 회로도이며, 도 5는 R, W, B가 입력될 때의 동작과정을 설명하기 위한 회로도이고, 도 6은 R, W, G가 입력될 때의 동작 과정을 설명하기 위한 회로도이다.Specifically, FIG. 3 is a circuit diagram illustrating an operation process when pixel information is inputted with W, G, and B. FIG. 4 is a circuit diagram illustrating an operation process when inputting R, G, and B. FIG. 5 is a circuit diagram for describing an operation process when R, W, and B are input, and FIG. 6 is a circuit diagram for explaining an operation process when R, W, and G are input.
먼저, 화소 정보로 W, G, B가 입력될 때의 동작과정을 설명하면 다음과 같다.First, an operation process when W, G, and B are input as pixel information will be described.
도 2와 도 3을 참고하면, 제1 내지 제3 버퍼(BUF1, BUF2, BUF3)는 W, G, B에 대응되는 제1 내지 제3 데이터 신호(DATA_W, DATA_G, DATA_B)를 출력한다.2 and 3, the first to third buffers BUF1, BUF2, and BUF3 output first to third data signals DATA_W, DATA_G, and DATA_B corresponding to W, G, and B. Referring to FIGS.
그러면, 제1 스위치(SW1)는 제1 소스 단자(S1)로 스위칭하고, 제2 스위치(SW2)는 제2 소스 단자(S2)로 스위칭하며, 제3 스위치(SW3)는 제4 소스 단자(S4)로 스위칭하고, 제4 스위치(SW4)는 제6 소스 단자(S6)로 스위칭한다. Then, the first switch SW1 switches to the first source terminal S1, the second switch SW2 switches to the second source terminal S2, and the third switch SW3 is connected to the fourth source terminal S1. S4), and the fourth switch SW4 switches to the sixth source terminal S6.
이러한 제1 내지 제4 스위치(SW1, SW2, SW3, SW4)의 스위칭에 의해 제1 패드(R_OUT)에는 제4 데이터 신호(DATA_REF)가 인가되고, 제2 내지 제4 패드(W_OUT, G_OUT, B_OUT)에는 제1 내지 제3 데이터 신호(DATA_W, DATA_G, DATA_B)가 인가된다.By the switching of the first to fourth switches SW1, SW2, SW3, and SW4, the fourth data signal DATA_REF is applied to the first pad R_OUT and the second to fourth pads W_OUT, G_OUT, and B_OUT. ) Is applied to the first to third data signals DATA_W, DATA_G, and DATA_B.
화소 정보로 R, G, B가 입력될 때의 동작과정을 설명하면 다음과 같다.An operation process when R, G, and B are input as pixel information will be described below.
도 2와 도 4를 참고하면, 제1 내지 제3 버퍼(BUF1, BUF2, BUF3)는 R, G, B에 대응되는 제1 내지 제3 데이터 신호(DATA_R, DATA_G, DATA_B)를 출력한다.2 and 4, the first to third buffers BUF1, BUF2, and BUF3 output first to third data signals DATA_R, DATA_G, and DATA_B corresponding to R, G, and B. Referring to FIG.
그러면, 제1 스위치(SW1)는 제2 소스 단자(S2)로 스위칭하고, 제2 스위치(SW2)는 제3 소스 단자(S3)로 스위칭하며, 제3 스위치(SW3)는 제4 소스 단자(S4)로 스위칭하고, 제4 스위치(SW4)는 제6 소스 단자(S6)로 스위칭한다.Then, the first switch SW1 switches to the second source terminal S2, the second switch SW2 switches to the third source terminal S3, and the third switch SW3 is connected to the fourth source terminal S3. S4), and the fourth switch SW4 switches to the sixth source terminal S6.
이러한 제1 내지 제4 스위치(SW1, SW2, SW3, SW4)의 스위칭에 의해 제2 패드(W_OUT)에는 제4 데이터 신호(DATA_REF)가 인가되고, 제1, 제3, 제4 패드(R_OUT, G_OUT, B_OUT)에는 제1 내지 제3 데이터 신호(DATA_R, DATA_G, DATA_B)가 인가된다.By the switching of the first to fourth switches SW1, SW2, SW3, and SW4, the fourth data signal DATA_REF is applied to the second pad W_OUT, and the first, third, and fourth pads R_OUT, The first to third data signals DATA_R, DATA_G, and DATA_B are applied to G_OUT and B_OUT.
화소 정보로 R, W, B가 입력될 때의 동작과정을 설명하면 다음과 같다.An operation process when R, W, and B are input as pixel information will be described below.
도 2와 도 5를 참고하면, 제1 내지 제3 버퍼(BUF1, BUF2, BUF3)는 R, W, B에 대응되는 제1 내지 제3 데이터 신호(DATA_R, DATA_W, DATA_B)를 출력한다.2 and 5, the first to third buffers BUF1, BUF2, and BUF3 output first to third data signals DATA_R, DATA_W, and DATA_B corresponding to R, W, and B. Referring to FIGS.
그러면, 제1 스위치(SW1)는 제2 소스 단자(S2)로 스위칭하고, 제2 스위치(SW2)는 제4 소스 단자(S4)로 스위칭하며, 제3 스위치(SW3)는 제5 소스 단자(S5)로 스위칭하고, 제4 스위치(SW4)는 제6 소스 단자(S6)로 스위칭한다. Then, the first switch SW1 switches to the second source terminal S2, the second switch SW2 switches to the fourth source terminal S4, and the third switch SW3 switches to the fifth source terminal (S). S5), and the fourth switch SW4 switches to the sixth source terminal S6.
이러한 제1 내지 제4 스위치(SW1, SW2, SW3, SW4)의 스위칭에 의해 제3 패드 (G_OUT)에는 제4 데이터 신호(DATA_REF)가 인가되고, 제1, 제2, 제4 패드(R_OUT, W_OUT, B_OUT)에는 제1 내지 제3 데이터 신호(DATA_R, DATA_W, DATA_B)가 인가된다.By the switching of the first to fourth switches SW1, SW2, SW3, and SW4, the fourth data signal DATA_REF is applied to the third pad G_OUT, and the first, second, and fourth pads R_OUT, The first to third data signals DATA_R, DATA_W, and DATA_B are applied to W_OUT and B_OUT.
화소 정보로 R, W, G가 입력될 때의 동작과정을 설명하면 다음과 같다.An operation process when R, W, and G are input as pixel information will be described below.
도 2와 도 6을 참고하면, 제1 내지 제3 버퍼(BUF1, BUF2, BUF3)는 R, W, G에 대응되는 제1 내지 제3 데이터 신호(DATA_R, DATA_W, DATA_G)를 출력한다.2 and 6, the first to third buffers BUF1, BUF2, and BUF3 output first to third data signals DATA_R, DATA_W, and DATA_G corresponding to R, W, and G. Referring to FIG.
그러면, 제1 스위치(SW1)는 제2 소스 단자(S2)로 스위칭하고, 제2 스위치(SW2)는 제4 소스 단자(S4)으로 스위칭하며, 제3 스위치(SW3)는 제6 소스 단자(S6)로 스위칭하고, 제4 스위치(SW4)는 제7 소스 단자(S7)로 스위칭한다. Then, the first switch SW1 switches to the second source terminal S2, the second switch SW2 switches to the fourth source terminal S4, and the third switch SW3 switches to the sixth source terminal (S). S6), and the fourth switch SW4 switches to the seventh source terminal S7.
이러한 제1 내지 제4 스위치(SW1, SW2, SW3, SW4)의 스위칭에 의해 제4 패드(B_OUT)에는 제4 데이터 신호(DATA_REF)가 인가되고, 제1 내지 제3 패드(R_OUT, W_OUT, G_OUT)에는 제1 내지 제3 데이터 신호(DATA_R, DATA_W, DATA_G)가 인가된다.By the switching of the first to fourth switches SW1, SW2, SW3, and SW4, the fourth data signal DATA_REF is applied to the fourth pad B_OUT and the first to third pads R_OUT, W_OUT, and G_OUT. ) Is applied to the first to third data signals DATA_R, DATA_W, and DATA_G.
이와 같이 선택부(40)는 W G B, 또는 R G B, 또는 R W B, 또는 R W G로 입력되는 케이스에 대응하여 제1 내지 제4 데이터 신호(DATA1, DATA2, DATA3, DATA_REF)를 각각 대응되는 제1 내지 제4 패드(R_OUT, W_OUT, G_OUT, B_OUT)에 인가되도록 스위칭 동작을 수행한다. 또한, 선택부(40)는 W G B, 또는 R G B, 또는 R W B, 또는 R W G로 입력되는 케이스에 대응하여 결정되는 제어신호에 따라 제1 내지 제4 데이터 신호(DATA1, DATA2, DATA3, DATA_REF)를 디스플레이 패널(50)의 제1 패드 내지 제4 패드(R_OUT, W_OUT, G_OUT, B_OUT)에 인가되도록 스위칭 동작을 수행한다.도 7은 본 발명에 따른 디스플레이 구동 장치의 다른 실시예를 나타낸 블럭도이다.In this way, the selector 40 corresponds to the first to fourth data signals DATA1, DATA2, DATA3, and DATA_REF corresponding to the case input to WGB, RGB, RWB, or RWG, respectively. The switching operation is performed to be applied to the pads R_OUT, W_OUT, G_OUT, and B_OUT. In addition, the selector 40 may display the first to fourth data signals DATA1, DATA2, DATA3, and DATA_REF according to a control signal determined corresponding to a case input to WGB, RGB, RWB, or RWG. A switching operation is performed to be applied to the first to fourth pads R_OUT, W_OUT, G_OUT, and B_OUT of FIG. 50. FIG. 7 is a block diagram illustrating another embodiment of a display driving apparatus according to the present invention.
도 7을 참고하면, 본 발명의 다른 실시예에 따른 디스플레이 구동 장치는 데이터 구동 회로(70), 선택부(40)를 포함한다. 데이터 구동 회로(70)는 화소 정보에 대응하여 제1 내지 제3 데이터 신호(DATA1, DATA2, DATA3)를 출력하는 제1 내지 제3 채널(72, 74, 76)을 포함한다. 선택부(40)는 제1 내지 제3 채널(72, 74, 76)에 의한 제1 내지 제3 데이터 신호(DATA1, DATA2, DATA3)와 제4 데이터 신호(DATA_REF)를 미리 정해진 케이스에 대응하여 각각 대응되는 제1 내지 제4 패드(R_OUT, W_OUT, G_OUT, B_OUT)에 인가되도록 스위칭 동작을 수행한다.Referring to FIG. 7, a display driving apparatus according to another embodiment of the present invention includes a data driving circuit 70 and a selection unit 40. The data driving circuit 70 includes first to third channels 72, 74, and 76 which output first to third data signals DATA1, DATA2, and DATA3 in response to pixel information. The selector 40 may correspond to the first to third data signals DATA1, DATA2, and DATA3 and the fourth data signal DATA_REF by the first to third channels 72, 74, and 76 in response to a predetermined case. The switching operation is performed to be applied to the first to fourth pads R_OUT, W_OUT, G_OUT, and B_OUT, respectively.
데이터 구동 회로(70)는 래치부(10), DAC부(20) 및 출력 버퍼부(30)를 포함한다. 이러한 데이터 구동 회로(70)는 제1 내지 제3 채널(72, 74, 76)을 통해 제1 내지 제3 데이터 신호(DATA1, DATA2, DATA3)를 출력한다. 여기서, 제1 채널(72)은 제1 래치(LATCH1), DAC1 및 제1 버퍼(BUF1)를 포함하고, 제2 채널(74)은 제2 래치(LATCH2), DAC2 및 제2 버퍼(BUF2)를 포함하며, 제3 채널(76)은 제3 래치(LATCH3), DAC3 및 제3 버퍼(BUF3)를 포함하는 것을 나타낸다.The data driving circuit 70 includes a latch unit 10, a DAC unit 20, and an output buffer unit 30. The data driving circuit 70 outputs the first to third data signals DATA1, DATA2, and DATA3 through the first to third channels 72, 74, and 76. Here, the first channel 72 includes a first latch LATCH1, a DAC1, and a first buffer BUF1, and the second channel 74 includes a second latch LATCH2, a DAC2, and a second buffer BUF2. The third channel 76 includes a third latch LATCH3, a DAC3, and a third buffer BUF3.
제4 데이터 신호(DATA_REF)는 지정된 소스에서 제공될 수 있으며, 소스는 디스플레이 구동 장치의 내부 또는 외부에 구성할 수 있다. 일례로, 디스플레이 구동 장치 내부에서 DAC부(20)에 감마 전압을 공급하는 감마 전압부(도시되지 않음)가 소스로 이용되거나, 디스플레이 구동 장치의 외부 일례로, 전원 공급장치(도시되지 않음)에서 일정 레벨을 갖는 전압이 공급되는 것으로 구성할 수 있다.The fourth data signal DATA_REF may be provided from a specified source, and the source may be configured inside or outside the display driving apparatus. For example, a gamma voltage unit (not shown) for supplying a gamma voltage to the DAC unit 20 inside the display driving device is used as a source, or as an external example of the display driving device, in a power supply device (not shown). It can be configured that a voltage having a constant level is supplied.
선택부(40)는 제1 내지 제3 채널(72, 74, 76)에 할당된 화소 정보에 대응하여 결정되는 제어신호에 따라 제1 내지 제3 데이터 신호(DATA1, DATA2, DATA3)와 제4 데이터 신호(DATA_REF)를 각각 대응되는 디스플레이 패널(50)의 제1 내지 제4 패드(R_OUT, W_OUT, G_OUT, B_OUT)에 인가되도록 스위칭한다. The selector 40 may include the first to third data signals DATA1, DATA2, and DATA3 and the fourth according to a control signal determined to correspond to the pixel information allocated to the first to third channels 72, 74, and 76. The data signal DATA_REF is switched to be applied to the first to fourth pads R_OUT, W_OUT, G_OUT, and B_OUT of the corresponding display panel 50, respectively.
일례로, 제1 내지 제3 채널(72, 74, 76)에 화소 정보 W, G, B가 할당되면 제어 신호는 제4 데이터 신호(DATA_REF)를 제1 패드(R_OUT)에 제1 내지 제3 데이터 신호를 제2 패드 내지 제4 패드(W_OUT, G_OUT, B_OUT)에 각각 인가되도록 결정된다. For example, when pixel information W, G, and B are allocated to the first to third channels 72, 74, and 76, the control signal may transmit the fourth data signal DATA_REF to the first pad R_OUT. It is determined to apply the data signal to the second to fourth pads W_OUT, G_OUT, and B_OUT, respectively.
또한, 제1 내지 제3 채널(72, 74, 76)에 화소 정보 R, G, B가 할당되면 제어 신호는 제4 데이터 신호(DATA_REF)를 제2 패드(W_OUT)에 제1 내지 제3 데이터 신호를 제1, 제3, 제4 패드(R_OUT, G_OUT, B_OUT)에 각각 인가되도록 결정된다. In addition, when pixel information R, G, and B are allocated to the first to third channels 72, 74, and 76, the control signal may include a fourth data signal DATA_REF on the second pad W_OUT. The signal is determined to be applied to the first, third, and fourth pads R_OUT, G_OUT, and B_OUT, respectively.
또한, 제1 내지 제3 채널(72, 74, 76)에 화소 정보 R, W, B가 할당되면 제어 신호는 제4 데이터 신호(DATA_REF)를 제3 패드(G_OUT)에 제1 내지 제3 데이터 신호를 제1, 제2, 제4 패드(R_OUT, W_OUT, B_OUT)에 각각 인가되도록 결정된다. In addition, when pixel information R, W, and B are allocated to the first to third channels 72, 74, and 76, the control signal may include a fourth data signal DATA_REF on the third pad G_OUT. The signal is determined to be applied to the first, second, and fourth pads R_OUT, W_OUT, and B_OUT, respectively.
또한, 제1 내지 제3 채널(72, 74, 76)에 화소 정보 R, W, G가 할당되면 제어 신호는 제4 데이터 신호(DATA_REF)를 제4 패드(B_OUT)에 제1 내지 제3 데이터 신호를 제1 내지 제3 패드(R_OUT, W_OUT, G_OUT)에 각각 인가되도록 결정된다.In addition, when the pixel information R, W, and G are allocated to the first to third channels 72, 74, and 76, the control signal may include a fourth data signal DATA_REF on the fourth pad B_OUT. The signal is determined to be applied to the first to third pads R_OUT, W_OUT, and G_OUT, respectively.
이러한 선택부(40)는 데이터 구동 회로(70)의 하나의 채널과 복수의 데이터 라인을 연결하고, 하나의 채널을 통해 공급된 데이터 신호를 복수의 데이터 라인에 시간차를 두고 전달한다. The selector 40 connects one channel of the data driving circuit 70 to a plurality of data lines and transfers the data signals supplied through the one channel to the plurality of data lines with a time difference.
따라서, 디스플레이 패널(50)은 게이트 구동 회로(도시되지 않음)를 통해 공급된 게이트 구동 신호에 따라 선택된 행의 화소들이 턴온되고, 데이터 구동 회로(70)로부터 공급된 제1 내지 제3 데이터 신호와 고정값을 갖는 제4 데이터 신호가 선택부(40)를 통해 디스플레이 패널(50)의 단위표시영역에 시간차를 두고 순차적으로 공급되어 화상을 표시하게 된다.Accordingly, the display panel 50 is configured to turn on pixels of a selected row according to a gate driving signal supplied through a gate driving circuit (not shown), and the first to third data signals supplied from the data driving circuit 70. The fourth data signal having a fixed value is sequentially supplied to the unit display area of the display panel 50 through the selector 40 to display an image.
한편, 본 발명의 실시예에 따른 디스플레이 장치는 데이터 구동 회로(70)에 화소 정보를 제공하고, 선택부(40)에 제어 신호를 제공하는 제어부(60)를 더 포함하여 구성할 수 있다. Meanwhile, the display apparatus according to the exemplary embodiment of the present invention may further include a controller 60 that provides pixel information to the data driving circuit 70 and a control signal to the selector 40.
데이터 구동 회로(70)는 제어부(60)로부터 입력되는 화소 정보에 대응하여 제1 내지 제3 채널(72, 74, 76)을 통해 제1 내지 제3 데이터 신호(DATA1, DATA2, DATA3)를 출력한다.The data driving circuit 70 outputs the first to third data signals DATA1, DATA2, and DATA3 through the first to third channels 72, 74, and 76 in response to the pixel information input from the controller 60. do.
선택부(40)는 제어부(60)로부터 입력되는 제어 신호에 따라 고정값을 갖는 제4 데이터 신호(DATA_REF)와 상기 제1 내지 제3 데이터 신호(DATA1, DATA2, DATA3)가 각각 대응되는 디스플레이 패널(50)의 제1 내지 제4 패드(R_OUT, W_OUT, G_OUT, B_OUT)에 인가되도록 스위칭한다. 여기서, 제4데이터 신호(DATA_REF)는 화소 하나를 블랙 처리하기 위한 레벨을 가지며, 데이터 구동 회로(70)의 내부 또는 외부에서 생성하도록 설정된다.The selector 40 may further include a display panel corresponding to the fourth data signal DATA_REF having a fixed value and the first to third data signals DATA1, DATA2, and DATA3, respectively, according to a control signal input from the controller 60. Switching is applied to the first to fourth pads R_OUT, W_OUT, G_OUT, and B_OUT of 50. Here, the fourth data signal DATA_REF has a level for blacking one pixel and is set to be generated inside or outside the data driving circuit 70.
제어부(60)는 화소 정보를 데이터 구동 회로(70)에 제공하고, 상기 제1 내지 제3 데이터 신호(DATA1, DATA2, DATA3)에 할당된 화소 정보에 대응하여 선택부(40)의 스위칭 동작을 제어하기 위한 제어신호를 생성하고, 이를 선택부(40)로 제공한다. 이러한 제어부60)는 제1 내지 제3 데이터 신호(DATA1, DATA2, DATA3)에 할당되는 W G B, 또는 R G B, 또는 R W B, 또는 RWG 중 적어도 어느 하나의 상기 화소 정보에 대응하여 선택부(40)의 스위칭 제어를 위한 제어신호를 생성한다.The controller 60 provides the pixel information to the data driving circuit 70 and performs a switching operation of the selector 40 in response to the pixel information allocated to the first to third data signals DATA1, DATA2, and DATA3. A control signal for controlling is generated and provided to the selector 40. The controller 60 switches the selection unit 40 in response to the pixel information of at least one of WGB, RGB, RWB, and RWG allocated to the first to third data signals DATA1, DATA2, and DATA3. Generate a control signal for control.
여기서, 제어부(60)는 디스플레이 구동 장치(80) 내부 또는 외부에 포함될 수 있으며, 일례로, 제어부(60)는 디스플레이 장치의 타이밍 컨트롤러 또는 소스 드라이버 내에 구비된 제어 회로가 될 수 있다.Herein, the controller 60 may be included inside or outside the display driving apparatus 80. For example, the controller 60 may be a control circuit provided in a timing controller or a source driver of the display apparatus.
이와 같이 본 발명은 화소 정보를 갖는 제1 내지 제3 데이터 신호(DATA1, DATA2, DATA3)와 고정값을 갖는 제4 데이터 신호(DATA_REF)를 스위칭하는 선택부(40)를 데이터 구동 회로(70)와 디스플레이 패널 사이(50)에 구비함으로써 상대적으로 적은 수의 채널로 상대적으로 많은 수의 데이터 라인을 구동할 수 있다.As described above, according to the present invention, the data driver circuit 70 includes a selector 40 for switching the first to third data signals DATA1, DATA2, and DATA3 having pixel information and the fourth data signal DATA_REF having a fixed value. By being provided between the display panel and the display panel 50, a relatively large number of data lines can be driven with a relatively small number of channels.
또한, 본 발명은 고정값을 갖는 제4 데이터 신호(DATA_REF)에 대응되는 증폭기를 배제함으로써 집적회로 면적 감소, 소비전력 감소 및 발열 저감의 이득을 얻을 수 있다.In addition, the present invention can obtain the benefits of reduced integrated circuit area, reduced power consumption, and reduced heat generation by excluding an amplifier corresponding to the fourth data signal DATA_REF having a fixed value.

Claims (14)

  1. 디스플레이 패널의 단위표시영역에 대하여 제1 내지 제4 데이터 신호를 제공하는 디스플레이 구동 장치에 있어서,A display driving apparatus for providing first to fourth data signals to a unit display area of a display panel, the display driving device comprising:
    화소 정보를 갖는 상기 제1 내지 제3 데이터 신호를 버퍼링하여 출력하는 제1 내지 제3 버퍼를 포함하는 출력 버퍼부; 및An output buffer unit including first to third buffers configured to buffer and output the first to third data signals having pixel information; And
    고정 값을 갖는 상기 제4 데이터 신호와 상기 제1 내지 제3 데이터 신호가 각각 대응되는 제1 내지 제4 패드에 인가되도록 스위칭하는 선택부;A selector configured to switch the fourth data signal having a fixed value and the first to third data signals to be applied to corresponding first to fourth pads, respectively;
    를 포함하는 것을 특징으로 하는 디스플레이 구동 장치.Display driving apparatus comprising a.
  2. 제 1 항에 있어서, 상기 제4 데이터 신호는The method of claim 1, wherein the fourth data signal is
    화소 하나를 블랙 처리하기 위한 상기 고정 값을 갖는 것을 특징으로 하는 디스플레이 구동 장치.And said fixed value for blacking one pixel.
  3. 제 1 항에 있어서, 상기 선택부는The method of claim 1, wherein the selection unit
    상기 제1 내지 제3 데이터 신호에 할당된 W G B, 또는 R G B, 또는 R W B, 또는 R W G의 케이스(Case)에 대응하여 상기 제1 내지 제4 데이터 신호가 각각 대응되는 상기 제1 내지 제4 패드에 인가되도록 스위칭하는 디스플레이 구동 장치.The first to fourth data signals are applied to the first to fourth pads corresponding to the WGB, RGB, RWB, or RWG cases allocated to the first to third data signals, respectively. Display driving device for switching.
  4. 제 1 항에 있어서, 상기 선택부는The method of claim 1, wherein the selection unit
    제어 신호에 따라 상기 제1 내지 제4 데이터 신호가 각각 대응되는 상기 제1 내지 제4 패드에 인가되도록 스위칭하는 것을 특징으로 하는 디스플레이 구동 장치.And switching the first to fourth data signals to be applied to the first to fourth pads corresponding to the control signals, respectively.
  5. 제 4 항에 있어서, 상기 제어 신호는The method of claim 4, wherein the control signal is
    상기 화소 정보에 대응하여 결정되는 것을 특징으로 하는 디스플레이 구동 장치.And a display driving device determined in correspondence with the pixel information.
  6. 제 1 항에 있어서, 상기 선택부는The method of claim 1, wherein the selection unit
    멀티플렉서를 포함하는 것을 특징으로 하는 디스플레이 구동 장치.Display driving apparatus comprising a multiplexer.
  7. 제 1 항에 있어서, 상기 선택부는The method of claim 1, wherein the selection unit
    상기 제1, 제4 데이터 신호에 대응하여 스위칭을 수행하는 제1 스위치;A first switch configured to perform switching in response to the first and fourth data signals;
    상기 제1, 제2, 제4 데이터 신호에 대응하여 스위칭을 수행하는 제2 스위치;A second switch configured to perform switching in response to the first, second, and fourth data signals;
    상기 제2, 제3, 제4 데이터 신호에 대응하여 스위칭을 수행하는 제3 스위치; 및A third switch configured to perform switching in response to the second, third, and fourth data signals; And
    상기 제3, 제4 데이터 신호에 대응하여 스위칭을 수행하는 제4스위치;를 포함하고,And a fourth switch configured to perform switching in response to the third and fourth data signals.
    상기 제1 내지 제4 스위치는 서로 다른 데이터 신호를 선택하는 것을 특징으로 하는 디스플레이 구동 장치.And the first to fourth switches select different data signals.
  8. 제 7 항에 있어서, The method of claim 7, wherein
    상기 제1 스위치는 제1 커먼 단자, 제1 소스 단자 및 제2 소스 단자를 포함하고,The first switch includes a first common terminal, a first source terminal and a second source terminal,
    상기 제2 스위치는 제2 커먼 단자, 제2 소스 단자, 제3 소스 단자 및 제4 소스 단자를 포함하며,The second switch includes a second common terminal, a second source terminal, a third source terminal, and a fourth source terminal.
    상기 제3 스위치는 제3 커먼 단자, 제4 소스 단자, 제5 소스 단자 및 제6 소스 단자를 포함하고,The third switch includes a third common terminal, a fourth source terminal, a fifth source terminal, and a sixth source terminal,
    상기 제4 스위치는 제4 커먼 단자, 제6 소스 단자 및 제7 소스 단자를 포함하며,The fourth switch includes a fourth common terminal, a sixth source terminal, and a seventh source terminal.
    상기 제1 스위치와 상기 제2 스위치는 상기 제2 소스 단자를 공유하고,The first switch and the second switch share the second source terminal,
    상기 제2 스위치와 상기 제3 스위치는 상기 제4 소스 단자를 공유하며,The second switch and the third switch share the fourth source terminal,
    상기 제3 스위치와 상기 제4 스위치는 상기 제6 소스 단자를 공유함을 특징으로 하는 디스플레이 구동 장치.And the third switch and the fourth switch share the sixth source terminal.
  9. 화소 정보에 대응하여 제1 내지 제3 데이터 신호를 출력하는 제1 내지 제3 채널을 포함하는 데이터 구동 회로;A data driving circuit including first to third channels configured to output first to third data signals corresponding to pixel information;
    고정값을 갖는 제4 데이터 신호를 생성하는 소스; 및A source for generating a fourth data signal having a fixed value; And
    상기 제1 내지 제3 채널에 의한 상기 제1 내지 제3 데이터 신호와 상기 제4 데이터 신호가 각각 대응되는 제1 내지 제4 패드에 인가되도록 스위칭하는 선택부;A selector configured to switch the first to third data signals and the fourth data signals by the first to third channels to be applied to corresponding first to fourth pads, respectively;
    를 포함하는 것을 특징으로 하는 디스플레이 구동 장치.Display driving apparatus comprising a.
  10. 제 9 항에 있어서, 상기 선택부는 The method of claim 9, wherein the selection unit
    상기 화소 정보에 대응하여 결정되는 제어신호에 따라 상기 제1 내지 제4 데이터 신호가 각각 대응되는 상기 제1 내지 제4 패드에 인가되도록 스위칭하는 디스플레이 구동 장치.And the first to fourth data signals are switched to correspond to the first to fourth pads corresponding to the control signals determined corresponding to the pixel information.
  11. 제 9 항에 있어서, 상기 선택부는The method of claim 9, wherein the selection unit
    상기 제1 내지 제3 채널에 할당된 W G B, 또는 R G B, 또는 R W B, 또는 R W G의 케이스에 대응하여 상기 제1 내지 제4 데이터 신호가 각각 대응되는 상기 제1 내지 제4 패드에 인가되도록 스위칭하는 디스플레이 구동 장치.A display for switching the first to fourth data signals to be applied to the corresponding first to fourth pads corresponding to cases of WGB, RGB, or RWB, or RWG allocated to the first to third channels, respectively; drive.
  12. 화소 정보에 대응하여 제1 내지 제3 데이터 신호를 생성하는 데이터 구동 회로;A data driving circuit configured to generate first to third data signals corresponding to the pixel information;
    상기 제1 내지 제3데이터 신호와 고정값을 갖는 제4데이터 신호를 수신하고, 제어신호에 대응하여 상기 제1 내지 상기 제4데이터 신호를 각각 대응하는 제1 내지 제4패드에 인가하도록 설정된 선택부; 및A selection configured to receive a fourth data signal having a fixed value with the first to third data signals, and apply the first to fourth data signals to corresponding first to fourth pads in response to a control signal, respectively; part; And
    상기 화소 정보를 상기 데이터 구동 회로에 제공하고, 상기 제1 내지 제3데이터 신호에 할당된 상기 화소 정보에 대응하여 상기 제어신호를 생성하며, 상기 제어신호를 상기 선택부에 제공하는 제어부;A control unit providing the pixel information to the data driving circuit, generating the control signal in response to the pixel information allocated to the first to third data signals, and providing the control signal to the selection unit;
    를 포함하는 디스플레이 구동 장치.Display driving device comprising a.
  13. 제 12 항에 있어서, 상기 제어부는The method of claim 12, wherein the control unit
    상기 제1 내지 제3 데이터 신호에 할당되는 W G B, 또는 R G B, 또는 R W B, 또는 RWG 중 적어도 어느 하나의 상기 화소 정보에 대응하여 상기 선택부의 스위칭 제어를 위한 상기 제어신호를 생성하는 디스플레이 구동 장치.And a control signal for switching control of the selection unit in response to the pixel information of at least one of W G B, R G B, R W B, and RWG assigned to the first to third data signals.
  14. 제 12 항에 있어서The method of claim 12
    상기 제4데이터 신호는 화소 하나를 블랙 처리하기 위한 레벨을 가지며, 상기 데이터 구동 회로의 내부 또는 외부에서 생성하도록 설정된 디스플레이 구동 장치.And the fourth data signal has a level for blacking one pixel and is configured to be generated inside or outside the data driving circuit.
PCT/KR2015/005857 2014-09-25 2015-06-11 Display driving device WO2016047889A1 (en)

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Citations (5)

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Publication number Priority date Publication date Assignee Title
JP2003047021A (en) * 2001-07-31 2003-02-14 Matsushita Electric Ind Co Ltd Image processing apparatus
KR20040020844A (en) * 2002-09-02 2004-03-09 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Liquid crystal display device and method of driving a liquid crystal display device
KR20050068193A (en) * 2003-12-29 2005-07-05 엘지.필립스 엘시디 주식회사 Lcd and the driving method
KR20080026390A (en) * 2006-09-20 2008-03-25 삼성전자주식회사 Source dirver, common voltage driver, and driving method for display device using time division driving method
KR20110121952A (en) * 2010-05-03 2011-11-09 한양대학교 산학협력단 Data driver of display apparatus and method for operating data driver of display apparatus

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003047021A (en) * 2001-07-31 2003-02-14 Matsushita Electric Ind Co Ltd Image processing apparatus
KR20040020844A (en) * 2002-09-02 2004-03-09 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Liquid crystal display device and method of driving a liquid crystal display device
KR20050068193A (en) * 2003-12-29 2005-07-05 엘지.필립스 엘시디 주식회사 Lcd and the driving method
KR20080026390A (en) * 2006-09-20 2008-03-25 삼성전자주식회사 Source dirver, common voltage driver, and driving method for display device using time division driving method
KR20110121952A (en) * 2010-05-03 2011-11-09 한양대학교 산학협력단 Data driver of display apparatus and method for operating data driver of display apparatus

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