WO2016026221A1 - 有机薄膜晶体管及其制作方法、阵列基板和显示装置 - Google Patents

有机薄膜晶体管及其制作方法、阵列基板和显示装置 Download PDF

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WO2016026221A1
WO2016026221A1 PCT/CN2014/091113 CN2014091113W WO2016026221A1 WO 2016026221 A1 WO2016026221 A1 WO 2016026221A1 CN 2014091113 W CN2014091113 W CN 2014091113W WO 2016026221 A1 WO2016026221 A1 WO 2016026221A1
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layer
drain
source
thin film
film transistor
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PCT/CN2014/091113
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English (en)
French (fr)
Inventor
方汉铿
谢应涛
欧阳世宏
蔡述澄
石强
刘则
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京东方科技集团股份有限公司
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Priority to US14/769,313 priority Critical patent/US9620729B2/en
Publication of WO2016026221A1 publication Critical patent/WO2016026221A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/40—Organic transistors
    • H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462—Insulated gate field-effect transistors [IGFETs]
    • H10K10/466—Lateral bottom-gate IGFETs comprising only a single gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/40—Organic transistors
    • H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462—Insulated gate field-effect transistors [IGFETs]
    • H10K10/468—Insulated gate field-effect transistors [IGFETs] characterised by the gate dielectrics
    • H10K10/474—Insulated gate field-effect transistors [IGFETs] characterised by the gate dielectrics the gate dielectric comprising a multilayered structure
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/40—Organic transistors
    • H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462—Insulated gate field-effect transistors [IGFETs]
    • H10K10/481—Insulated gate field-effect transistors [IGFETs] characterised by the gate conductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/80—Constructional details
    • H10K10/82—Electrodes
    • H10K10/84—Ohmic electrodes, e.g. source or drain electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/20—Changing the shape of the active layer in the devices, e.g. patterning
    • H10K71/231—Changing the shape of the active layer in the devices, e.g. patterning by etching of existing layers
    • H10K71/233—Changing the shape of the active layer in the devices, e.g. patterning by etching of existing layers by photolithographic etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/80—Constructional details
    • H10K10/88—Passivation; Containers; Encapsulations

Definitions

  • At least one embodiment of the present invention is directed to an organic thin film transistor and a method of fabricating the same, an array substrate, and a display device.
  • the source and drain of the thin film transistor device are generally formed of a metal material, which ensures the conductivity of the source and the drain.
  • an organic semiconductor layer is usually formed on the source and the drain.
  • At least one embodiment of the present invention provides an organic thin film transistor, a method of fabricating the same, an array substrate, and a display device to avoid the problem that the organic semiconductor layer is prone to disconnection due to a large contact angle of the electrode layer in the thin film transistor. Reduced production costs.
  • At least one embodiment of the present invention provides an organic thin film transistor including: a source, a drain, an organic semiconductor layer disposed above the source and the drain, and a modifying layer,
  • the modifying layer is disposed under the organic semiconductor layer at a position corresponding to the source and the drain; the modifying layer covers the source and the drain; and the modifying layer is used to change the source and the drain Extreme contact angle.
  • At least one embodiment of the present invention provides an array substrate comprising the organic thin film transistor of the first aspect.
  • At least one embodiment of the present invention provides a display device comprising the organic thin film transistor of the first aspect or the array substrate of the second aspect.
  • At least one embodiment of the present invention provides a method of fabricating an organic thin film transistor, the method comprising: forming a source, a drain, and an organic semiconductor layer above the source and drain; A modifying layer covering the source and the drain is formed at a position above the source and the drain and corresponding to the organic semiconductor layer, and the modifying layer is used to change a contact angle of the source and the drain.
  • FIG. 1 is a schematic structural diagram of an organic thin film transistor according to an embodiment of the present invention.
  • FIG. 2 is a schematic structural diagram of another organic thin film transistor according to an embodiment of the present invention.
  • FIG. 3 is a schematic structural diagram of still another organic thin film transistor according to an embodiment of the present invention.
  • FIG. 4 is a schematic flow chart of a method for fabricating an organic thin film transistor according to an embodiment of the present invention.
  • FIG. 5 is a schematic flow chart of another method for fabricating an organic thin film transistor according to an embodiment of the present invention.
  • FIG. 6 is a schematic flow chart of still another method for fabricating an organic thin film transistor according to an embodiment of the present invention.
  • the inventors of the present application have noticed that since the contact angles of the source and the drain of the thin film transistor are relatively large, a phenomenon in which the spreading behavior is poor when the organic semiconductor layer is formed may occur, so that the thickness of the finally formed organic semiconductor layer is not uniform. Therefore, it is easy to cause the semiconductor layer to be broken. Thus, the performance of the thin film transistor cannot be guaranteed.
  • the organic thin film transistor provides an organic thin film transistor, which may be of a gate bottom contact and a gate top contact.
  • the organic thin film transistor includes a substrate 1 , a gate 2 , a gate insulating layer 3 , a source 4 , a drain 5 , and an organic semiconductor layer 6 disposed above the source 4 and the drain 5 .
  • a modifying layer 7 the modifying layer 7 is disposed above the source 4 and the drain 5 at a position corresponding to the organic semiconductor layer 6, the finishing layer 7 completely covers the source 4 and the drain 5, and the modifying layer 7 is used to change the source 4 and the contact angle of the drain 5.
  • the modifying layer may be formed by using an organic small molecule material such as Hexamethyl Disilazane (HMDS) and octyltrichlorosilane (OTS) or a self-assembling small molecule material.
  • HMDS Hexamethyl Disilazane
  • OTS octyltrichlorosilane
  • a modification layer is formed over the source and the drain. Since the modification layer can react with the molecules in the source and the drain, the contact angle between the source and the drain after the reaction is reduced, thereby the source and the drain The surface potential energy is lowered, so that the organic semiconductor layer can be uniformly formed, the spreading effect of the organic semiconductor layer is improved, and the stability of the thin film transistor is ensured.
  • the substrate may be a glass substrate, a plastic substrate, or a substrate of stainless steel and an insulating film.
  • the gate insulating layer may be formed by forming an insulating film using silicon oxide, silicon nitride, metal oxide, metal nitride or an organic material, and then performing a patterning process.
  • the thickness of the gate insulating layer may be 30 to 1000 nm.
  • the gate electrode may be formed of metal, ITO, doped silicon, organic conductive material, or the like, and the thickness of the gate electrode may be 20 to 200 nm.
  • the source and the drain are generally formed of a noble metal such as gold (Au) or silver (Ag), and the source and drain electrodes may have a thickness of 1 to 30 nm.
  • a modifying layer capable of changing the contact angle between the source and the drain is disposed at a position corresponding to the source and the drain below the organic semiconductor layer of the thin film transistor, and the modifying layer makes the source
  • the contact angles of the drain and the drain are reduced, so that the organic semiconductor layer can be in sufficient contact with the source and the drain, which ensures that the organic semiconductor layer can be uniformly formed on the source and the drain, and the electrode layer in the thin film transistor is solved.
  • the large contact angle results in poor formation of the organic semiconductor layer and is prone to disconnection, which ensures the quality and performance of the thin film transistor, avoids waste of raw materials, and reduces production costs.
  • the modification layer 7 may also be disposed at a position between the organic semiconductor layer 6 and the gate insulating layer 3.
  • the modification layer 7 can also be used to change the contact angle of the gate insulating layer 3, that is, the modification layer 7 disposed at a position between the organic semiconductor layer 6 and the gate insulating layer 3 can be used to change the contact angle of the gate insulating layer 3.
  • the organic semiconductor layer is formed over the source and the drain, and the portion of the organic semiconductor layer as shown in FIG. 2 is in direct contact with the gate insulating layer, and further on the gate insulating layer.
  • Forming a modifying layer can reduce the contact angle of the gate insulating layer, thereby facilitating the preparation of organic
  • the semiconductor layer ensures the uniformity of the film thickness of the formed organic semiconductor layer.
  • the organic thin film transistor may further include a buffer layer 8 disposed at a position below the electrode corresponding to the electrode, the buffer layer 8 being covered by the electrode, and the buffer layer 8
  • the adhesion of the material is greater than the adhesion of the electrode.
  • the electrode is a combination of at least one or a combination of a source, a drain, and a gate. 3 shows that the electrode is a source, a drain, and a gate, that is, the buffer layer 8 is disposed under the source 4, the drain 5, and the gate 2, respectively, corresponding to the source 4, the drain 5, and the gate 2. The location.
  • the buffer layer 6 is covered by the source 4, the drain 5, and the gate 2, respectively.
  • the adhesion of the material of the buffer layer 6 is greater than the adhesion of the source, drain and gate.
  • the metal electrode is formed of a noble metal material such as gold, silver, or the like
  • a buffer layer is further formed under the source, the drain and the gate. Since the surface adhesion of the material of the buffer layer is high, the source, the drain and the gate can be stably formed on the substrate. In the above, the occurrence of source, drain and gate dropout is avoided, and the performance of the organic thin film transistor is ensured.
  • FIG. 3 shows that the buffer layer 8 is provided on the basis of the thin film transistor shown in FIG. 2, but the embodiment of the present invention is not limited thereto, for example, it may also be based on the thin film transistor shown in FIG.
  • a buffer layer is disposed, that is, no modification layer is disposed between the organic semiconductor layer and the gate insulating layer.
  • the buffer layer may be formed of a material having a strong adhesion such as a common metal (molybdenum Mo, aluminum Al, copper Cu, or alloy) or indium tin oxide (ITO).
  • a common metal molybdenum Mo, aluminum Al, copper Cu, or alloy
  • ITO indium tin oxide
  • the thickness of the modifying layer 7 can be from 0.1 to 10 nm.
  • the buffer layer 8 can have a thickness of 20 to 300 nm.
  • the thickness of the buffer layer is set to 20 to 300 nm, and the thickness of the modified layer is set to 0.1 to 10 nm. This ensures that the buffer layer and the modified layer can be formed to achieve the desired function of each layer structure, while avoiding the occurrence of buffer layers and modifications.
  • the thickness of the formed thin film transistor caused by the layer being too thick is too large, the thickness of the finally formed display device is too large, and the situation in which the display effect of the display device affects the performance of the display device is lowered.
  • the thickness of the buffer layer, the modification layer, the gate, the source and the drain can be reasonably set according to specific requirements, cost, practicability, etc., and the structure of each layer can be fully utilized. At the same time, it is possible to avoid the case where the thickness of the formed thin film transistor is too thick.
  • the organic thin film transistor provided by the above embodiments of the present invention may further include a protective layer covering the organic semiconductor layer, the source, the drain, and the data line.
  • a modifying layer capable of changing the contact angle between the source and the drain is disposed at a position corresponding to the source and the drain below the organic semiconductor layer of the organic thin film transistor, and the modifying layer is provided.
  • the contact angle of the source and the drain is reduced, so that the organic semiconductor layer can be in sufficient contact with the source and the drain, which ensures that the organic semiconductor layer can be uniformly formed on the source and the drain, solving the problem in the thin film transistor.
  • the contact angle of the electrode layer is large, resulting in poor formation of the organic semiconductor layer, easy breakage, ensuring the quality and performance of the thin film transistor, avoiding waste of raw materials, and reducing production costs. Further, the production efficiency is improved.
  • At least one embodiment of the present invention provides an array substrate comprising the organic thin film transistor provided by any of the above embodiments, and the organic thin film transistor may be of a gate bottom contact and a gate top contact.
  • a modifying layer capable of changing the contact angle between the source and the drain is disposed at a position corresponding to the source and the drain below the organic semiconductor layer of the organic thin film transistor of the array substrate, and the modification is performed.
  • the layer reduces the contact angle of the source and the drain, so that the organic semiconductor layer can be in sufficient contact with the source and the drain, which ensures that the organic semiconductor layer can be uniformly formed on the source and the drain, solving the thin film transistor
  • the contact angle of the electrode layer is large, resulting in poor formation of the organic semiconductor layer, easy breakage, ensuring the quality and performance of the thin film transistor, avoiding waste of raw materials, and reducing production costs. Further, the production efficiency is improved.
  • At least one embodiment of the present invention provides a display device including an array substrate or an organic thin film transistor provided by an embodiment of the present invention.
  • the display device can be any display product, component such as a display panel, a mobile phone, a tablet computer, a television, a notebook computer, a digital photo frame, a navigator, and the like.
  • a modifying layer capable of changing a contact angle between a source and a drain is disposed at a position corresponding to a source and a drain below an organic semiconductor layer of an organic thin film transistor in the display device,
  • the modifying layer reduces the contact angle of the source and the drain, so that the organic semiconductor layer can be in sufficient contact with the source and the drain, which ensures that the organic semiconductor layer can be uniformly formed on the source and the drain, and the thin film transistor is solved.
  • the contact angle of the electrode layer in the middle of the electrode layer is poor, and the problem of disconnection is prone to occur, which ensures the quality and performance of the thin film transistor, avoids waste of raw materials, and reduces production cost. Further, the production efficiency is improved.
  • At least one embodiment of the present invention provides a method of fabricating an organic thin film transistor, including: forming a source, a drain, and an organic semiconductor layer above the source and drain, and at a source A modified layer covering the source and the drain is formed at a position above the pole and the drain and corresponding to the organic semiconductor layer, and the modified layer is used to change the contact angle of the source and the drain.
  • the organic thin film transistor may be of two types: a gate bottom contact and a gate top contact.
  • a gate bottom contact mode will be described as an example.
  • a modification layer formed at a position corresponding to the source and the drain and below the organic semiconductor layer is referred to as a first layer of a modification layer between the gate insulating layer and the organic semiconductor layer.
  • the finishing layer is called the second layer of decoration.
  • the position of the modified layer formed is different, and the materials forming the modified layer may be the same.
  • the method may include the following steps 101 to 105, which are specifically described below.
  • Step 101 forming a gate metal layer including a gate, a gate line, and a gate line lead on the substrate.
  • a method of magnetron sputtering may be used to deposit a layer thickness on a substrate such as a glass substrate or a quartz substrate.
  • a metal film which can usually be made of a precious metal such as gold or silver.
  • the gate metal layer is formed on a certain area of the substrate by a patterning process such as exposure, development, etching, and peeling using a mask.
  • Step 102 forming a gate insulating layer on the gate metal layer.
  • the thickness can be deposited on a glass substrate by chemical vapor deposition or magnetron sputtering.
  • the gate insulating film is usually made of silicon nitride, and silicon oxide, silicon oxynitride or the like can also be used.
  • Step 103 forming a source and a drain on the gate insulating layer.
  • a source and a drain may be formed in a similar manner to the formation of a gate.
  • Step 104 forming a first layer of modified layers covering the source and the drain on the source and the drain.
  • the first layer of the modification layer is used to change the contact angle of the source and the drain.
  • a film in which a material for forming a modified layer is first plated on the source and the drain may be used, and then a pattern of the modified layer is formed by a patterning process, or a pattern of the modified layer is formed by using a photoresist, and then a pattern is applied.
  • the material of the layer modification layer may be used, and then a pattern of the modified layer is formed by a patterning process, or a pattern of the modified layer is formed by using a photoresist, and then a pattern is applied.
  • Step 105 forming an organic semiconductor layer covering the source, the drain and the modification layer on the first layer of the modification layer.
  • a metal oxide semiconductor thin film may be deposited on the first modified layer by chemical vapor deposition, and then the metal oxide semiconductor thin film is patterned once to form an organic semiconductor layer, that is, after the photoresist is coated,
  • the mask may expose, develop, and etch the substrate to form an organic semiconductor layer.
  • the fabricating method may further include: forming a gate insulating layer, the modifying layer is formed at a position between the gate insulating layer and the organic semiconductor layer, the modifying layer further for changing a gate insulating layer
  • the contact angle that is, the decorative layer located at a position between the gate insulating layer and the organic semiconductor layer is used to change the contact angle of the gate insulating layer.
  • the method may include the following steps 201 to 206, which are specifically described below.
  • Step 201 Form a gate metal layer including a gate, a gate line, and a gate line lead on the substrate.
  • Step 202 forming a gate insulating layer on the gate metal layer.
  • Step 203 forming a source and a drain on the gate insulating layer.
  • Step 204 forming a first layer of modified layers covering the source and the drain over the source and the drain.
  • Step 205 forming a second layer of a modification layer at a position above the gate insulating layer and the organic semiconductor layer.
  • the second layer of the modification layer can be formed in the same manner as the formation of the first layer of the modification layer.
  • Step 206 fabricating an organic semiconductor layer covering the first layer of the modification layer, the second layer of the modification layer, the source and the drain.
  • the method may further include: forming a gate, respectively forming a buffer layer covered by the gate, the source, and the drain under the gate, the source, and the drain; a material of the buffer layer
  • the adhesion is greater than the adhesion of the source, drain and gate.
  • the embodiment of the present invention is not limited thereto.
  • a buffer layer covered by a source and a drain may be formed only under the source and the drain, respectively, and the adhesion of the material of the buffer layer is greater than the adhesion of the source and the drain. That is, no modification layer is provided between the organic semiconductor layer and the gate insulating layer at this time.
  • a buffer layer covered by the gate, the source, and the drain is respectively formed under the gate, the source, and the drain.
  • the method may include the following steps 301 to 309 for convenience. Understand, in the following steps, the buffer layer under the gate is called the first buffer layer, at the source and drain The buffer formed under the pole is called the second buffer layer. Of course, only the positions of the respective buffer layers formed are different, but the materials forming the respective buffer layers may be the same. These steps are described in detail below.
  • Step 301 Form a first buffer layer at a position on the substrate corresponding to the gate.
  • a pattern of a buffer layer may be formed using a negative photoresist, and then a buffer layer may be formed by vacuum or solution coating.
  • a thin film of a material forming a buffer layer is first plated on the substrate, and then a buffer layer pattern is formed using the mask.
  • Step 302 Form a gate metal layer including a gate, a gate line and a gate line lead on the first buffer layer, and the gate covers the first buffer layer.
  • a method of magnetron sputtering may be used to deposit a layer thickness on a substrate such as a glass substrate or a quartz substrate.
  • the metal thin film may be made of at least one or a combination of a metal such as molybdenum, aluminum, an aluminum-nickel alloy, a molybdenum-tungsten alloy, chromium, or copper.
  • the gate metal layer is formed on a certain area of the substrate by a patterning process such as exposure, development, etching, and peeling using a mask.
  • Step 303 forming a gate insulating layer covering the gate metal layer on the gate metal layer.
  • Step 304 forming a second buffer layer at a position on the gate insulating layer corresponding to the source and the drain.
  • the second layer buffer layer may be formed by referring to a method of forming the first layer buffer layer.
  • Step 305 forming a source, a drain, and a data line on the second buffer layer.
  • the data lines can be formed in the same manner as the source and drain are formed.
  • Step 306 forming a first layer of modified layers covering the source and the drain over the source and the drain.
  • Step 307 forming a second layer of the modification layer at a position above the gate insulating layer and the organic semiconductor layer.
  • Step 308 preparing an organic semiconductor layer covering the first layer of the modification layer, the second layer of the modification layer, the source and the drain.
  • Step 309 fabricating a protective layer covering the organic semiconductor layer, the source, the drain, and the data line.
  • the protective layer is usually made of silicon nitride or a transparent organic resin material.
  • the method for fabricating an organic thin film transistor provided by the above embodiments of the present invention can change the contact between the source and the drain by providing a position corresponding to the source and the drain under the organic semiconductor layer when forming the organic thin film transistor.
  • the corner modification layer, the modification layer reduces the contact angle of the source and the drain, and thus the organic semiconductor layer can be in sufficient contact with the source and the drain, which ensures that the organic semiconductor layer can be uniformly formed on the source and the drain.
  • the invention solves the problem that the organic semiconductor layer formation effect is poor and the disconnection is easy due to the large contact angle of the electrode layer in the thin film transistor, which ensures the quality and performance of the thin film transistor, avoids waste of raw materials, and reduces production. cost. Further, the production efficiency is improved.

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Abstract

一种有机薄膜晶体管及其制作方法、阵列基板和显示装置，该薄膜晶体管包括：源极（4）、漏极（5）、设置于源极（4）和漏极（5）上方的有机半导体层（6），以及修饰层（7）；修饰层（7）设置于有机半导体层（6）的下方与源极（4）和漏极（5）对应的位置处，修饰层（7）覆盖源极（4）和漏极（5），修饰层（7）用于改变源极（4）和漏极（5）的接触角。该薄膜晶体管中避免了因电极层的接触角较大造成的有机半导体层（6）形成效果不佳、容易出现断线的问题，降低了生产成本。

Description

有机薄膜晶体管及其制作方法、阵列基板和显示装置 技术领域
本发明的至少一个实施例涉及一种有机薄膜晶体管及其制作方法、阵列基板和显示装置。
背景技术
近年，随着科技的不断发展，电子器件(例如，显示面板中的薄膜晶体管器件)的性能逐步得到提升。薄膜晶体管器件的源极和漏极一般都是采用金属材料制作形成，这保证了源极和漏极的导电性能。同时，为了保证电子器件的性能通常会在源极和漏极上形成有机半导体层。
发明内容
本发明的至少一个实施例提供一种有机薄膜晶体管及其制作方法、阵列基板和显示装置，以避免因薄膜晶体管中的电极层的接触角较大导致的有机半导体层容易出现断线的问题，降低了生产成本。
第一方面，本发明的至少一个实施例提供一种有机薄膜晶体管，所述有机薄膜晶体管包括：源极、漏极、设置于所述源极和漏极上方的有机半导体层，以及修饰层，所述修饰层设置于有机半导体层的下方与所述源极和漏极对应的位置处；所述修饰层覆盖所述源极和漏极；所述修饰层用于改变所述源极和漏极的接触角。
第二方面，本发明的至少一个实施例提供一种阵列基板，所述阵列基板包括第一方面所述的有机薄膜晶体管。
第三方面，本发明的至少一个实施例提供一种显示装置，所述显示装置包括第一方面所述的有机薄膜晶体管或第二方面所述的阵列基板。
第四方面，本发明的至少一个实施例提供一种有机薄膜晶体管的制作方法，所述方法包括：形成源极、漏极和所述源极和漏极上方的有机半导体层；以及在所述源极和漏极上方且与所述有机半导体层对应的位置处形成覆盖所述源极和漏极的修饰层，所述修饰层用于改变所述源极和漏极的接触角。
附图说明
为了更清楚地说明本发明实施例的技术方案，下面将对实施例的附图作简单地介绍，显而易见地，下面描述中的附图仅仅涉及本发明的一些实施例，而非对本发明的限制。
图1为本发明的实施例提供的一种有机薄膜晶体管的结构示意图；
图2为本发明的实施例提供的另一种有机薄膜晶体管的结构示意图；
图3为本发明的实施例提供的又一种有机薄膜晶体管的结构示意图；
图4为本发明的实施例提供的一种有机薄膜晶体管的制作方法的流程示意图；
图5为本发明的实施例提供的另一种有机薄膜晶体管的制作方法的流程示意图；
图6为本发明的实施例提供的又一种有机薄膜晶体管的制作方法的流程示意图。
附图标记：1-基板；2-栅极；3-栅绝缘层；4-源极；5-漏极；6-有机半导体层；7-修饰层；8-缓冲层。
具体实施方式
为使本发明实施例的目的、技术方案和优点更加清楚，下面将结合本发明实施例的附图，对本发明实施例中的技术方案进行清楚、完整地描述。显然，所描述的实施例是本发明的一部分实施例，而不是全部的实施例。基于所描述的本发明的实施例，本领域普通技术人员在无需创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
本申请的发明人注意到，由于薄膜晶体管的源极和漏极的接触角比较大，在形成有机半导体层时会出现铺展行为不佳的情形，使得最终形成的有机半导体层膜厚不均一，从而容易引起半导体层断线。这样，薄膜晶体管的性能无法得到保证。
本发明的至少一个实施例提供一种有机薄膜晶体管，该有机薄膜晶体管可以是栅极底接触和栅极顶接触两种类型，本发明实施例中仅以栅极底接触模式为例进行说明。参照图1所示，该有机薄膜晶体管包括：基板1、栅极2、栅绝缘层3、源极4、漏极5、设置于源极4和漏极5上方的有机半导体层6 和修饰层7；修饰层7设置于源极4和漏极5的上方与有机半导体层6对应的位置处，修饰层7完全覆盖源极4和漏极5，修饰层7用于改变源极4和漏极5的接触角。
在至少一个实施例中，修饰层可以采用例如六甲基二硅烷(Hexamethyl Disilazane，简称HMDS)和正辛基三氯硅烷(octyltrichlorosilane，简称OTS)等有机小分子材料或者自组装小分子材料等制作形成。在源极和漏极上方制作修饰层，由于修饰层可以与源极和漏极中的分子发生反应，发生反应之后的源极和漏极的接触角会减小，从而源极和漏极的表面势能降低，使得有机半导体层可以均匀地形成，提高了有机半导体层的铺展效果，保证了薄膜晶体管的稳定性。
基板可以是玻璃基板、塑料基板或者不锈钢与绝缘薄膜的衬底等。栅绝缘层可以是通过采用氧化硅、氮化硅、金属氧化物、金属氮化物或者有机材料等形成绝缘薄膜，之后进行构图工艺形成的。栅绝缘层的厚度可以是30～1000nm。栅极可以是采用金属、ITO、掺杂硅、有机导电物等形成的，栅极的厚度可以为20～200nm。源极和漏极一般都是采用金(Au)、银(Ag)等贵金属形成的，源极和漏极的厚度可以为1～30nm。
本发明的实施例提供的有机薄膜晶体管中，在薄膜晶体管的有机半导体层的下方与源极和漏极对应的位置处设置可以改变源极和漏极的接触角的修饰层，修饰层使得源极和漏极的接触角减小，因此有机半导体层可以与源极和漏极充分接触，这保证了有机半导体层可以均匀地形成在源极和漏极上，解决了薄膜晶体管中的电极层的接触角较大导致的有机半导体层形成效果不佳、容易出现断线的问题，保证了薄膜晶体管的质量和性能，避免了对原材料的浪费，降低了生产成本。
在一个实施例中，参照图2所示，修饰层7还可以设置于有机半导体层6与栅绝缘层3之间的位置处。修饰层7还可以用于改变栅绝缘层3的接触角，即设置于有机半导体层6和栅绝缘层3之间的位置处的修饰层7可以用于改变栅绝缘层3的接触角。
需要说明的是，本发明实施例中有机半导体层形成在源极和漏极的上方，如图2中所示有机半导体层的部分会与栅绝缘层直接接触，通过进一步的在栅绝缘层上形成修饰层，可以减小栅绝缘层的接触角，从而有利于制备有机 半导体层，保证了形成的有机半导体层的膜厚的均一性。
在至少一个实施例中，参照图3所示，该有机薄膜晶体管还可以包括设置于电极的下方与该电极对应的位置处的缓冲层8，缓冲层8被该电极覆盖，并且缓冲层8的材料的附着力大于该电极的附着力。在至少一个实施例中，该电极为源极、漏极和栅极中的至少一个或几个的组合。图3示出了该电极为源极、漏极以及栅极，即缓冲层8分别设置于源极4、漏极5和栅极2的下方与源极4、漏极5和栅极2对应的位置处。缓冲层6分别被源极4、漏极5和栅极2覆盖。缓冲层6的材料的附着力大于源极、漏极和栅极的附着力。
当金属电极采用贵金属材料例如金、银等形成时，由于贵金属材料的表面附着力较差，形成的源极、漏极和栅极容易出现脱落的问题。本发明实施例中进一步的在源极、漏极和栅极的下方制作一层缓冲层，由于缓冲层的材料的表面附着力较高，源极、漏极和栅极可以稳固的形成在基板上，避免了源极、漏极和栅极脱落的情况发生，保证了有机薄膜晶体管的性能。
需要注意的是，图3示出了在图2所示的薄膜晶体管的基础上设置缓冲层8，但本发明实施例不限于此，例如，还可以在图1所示的薄膜晶体管的基础上设置缓冲层，即此时有机半导体层和栅绝缘层之间未设置修饰层。
在至少一个实施例中，缓冲层可以采用例如普通金属(钼Mo、铝Al、铜Cu或者合金等)、氧化铟锡(Indium Tin Oxide，简称ITO)等附着力较强的材料制作形成。
在至少一个实施例中，修饰层7的厚度可以为0.1～10nm。
在至少一个实施例中，缓冲层8的厚度可以为20～300nm。
缓冲层的厚度设定为20～300nm，修饰层的厚度设定为0.1～10nm，这样可以保证形成的缓冲层和修饰层可以实现各个层结构应有的作用，同时避免出现因缓冲层和修饰层太厚导致的形成的薄膜晶体管厚度太大，最终形成的显示装置的盒厚过大，以及降低显示装置的显示效果影响显示装置的性能的情形。
在实际制作有机薄膜晶体管时，可以根据具体的需求、成本、实用性等综合考虑，合理设置缓冲层、修饰层、栅极、源极和漏极的厚度，在保证各层结构可以充分发挥应有的作用的同时，避免出现形成的薄膜晶体管的厚度太厚的情形。
此外，本发明的上述实施例提供的有机薄膜晶体管还可以包括覆盖有机半导体层、源极、漏极和数据线的保护层。
本发明的实施例提供的有机薄膜晶体管中，在该有机薄膜晶体管的有机半导体层的下方与源极和漏极对应的位置处设置可以改变源极和漏极的接触角的修饰层，修饰层使得源极和漏极的接触角减小，因此有机半导体层可以与源极和漏极充分接触，这保证了有机半导体层可以均匀地形成在源极和漏极上，解决了薄膜晶体管中的电极层的接触角较大导致的有机半导体层形成效果不佳、容易出现断线的问题，保证了薄膜晶体管的质量和性能，避免了对原材料的浪费，降低了生产成本。进而，提高了生产效率。
本发明的至少一个实施例提供一种阵列基板，该阵列基板包括上述任一实施例提供的有机薄膜晶体管，该有机薄膜晶体管可以是栅极底接触和栅极顶接触两种类型。
本发明的实施例提供的阵列基板中，在阵列基板的有机薄膜晶体管的有机半导体层的下方与源极和漏极对应的位置处设置可以改变源极和漏极的接触角的修饰层，修饰层使得源极和漏极的接触角减小，因此有机半导体层可以与源极和漏极充分接触，这保证了有机半导体层可以均匀地形成在源极和漏极上，解决了薄膜晶体管中的电极层的接触角较大导致的有机半导体层形成效果不佳、容易出现断线的问题，保证了薄膜晶体管的质量和性能，避免了对原材料的浪费，降低了生产成本。进而，提高了生产效率。
本发明的至少一个实施例提供一种显示装置，该显示装置包括本发明的实施例提供的阵列基板或有机薄膜晶体管。该显示装置可以为：显示面板、手机、平板电脑、电视机、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
本发明的实施例提供的显示装置中，在显示装置中的有机薄膜晶体管的有机半导体层的下方与源极和漏极对应的位置处设置可以改变源极和漏极的接触角的修饰层，修饰层使得源极和漏极的接触角减小，因此有机半导体层可以与源极和漏极充分接触，这保证了有机半导体层可以均匀地形成在源极和漏极上，解决了薄膜晶体管中的电极层的接触角较大导致的有机半导体层形成效果不佳、容易出现断线的问题，保证了薄膜晶体管的质量和性能，避免了对原材料的浪费，降低了生产成本。进而，提高了生产效率。
本发明的至少一个实施例提供一种有机薄膜晶体管的制作方法，该有机薄膜晶体管的制作方法，包括：形成源极、漏极和所述源极和漏极上方的有机半导体层，以及在源极和漏极上方且与有机半导体层对应的位置处形成覆盖源极和漏极的修饰层，该修饰层用于改变源极和漏极的接触角。
在本发明实施例提供的有机薄膜晶体管的制作方法中，该有机薄膜晶体管可以是栅极底接触和栅极顶接触两种类型。本发明的以下实施例中仅以栅极底接触模式为例进行说明。同时，为了便于理解，本发明实施例中将形成在与源极和漏极对应且在有机半导体层下方的位置处的修饰层叫第一层修饰层，在栅绝缘层和有机半导体层之间的修饰层叫第二层修饰层。当然这里只是限定形成的修饰层的位置不同，形成修饰层的材料可以是相同的。
例如，参照图4所示，该方法可以包括以下步骤101至步骤105，下面具体介绍这些步骤。
步骤101、在基板上形成包括栅极、栅线和栅线引线的栅金属层。
例如，可以采用磁控溅射的方法在基板例如玻璃基板或石英基板上沉积一层厚度在
Figure PCTCN2014091113-appb-000001
至
Figure PCTCN2014091113-appb-000002
的金属薄膜，该金属薄膜通常可以采用金或者银等贵金属。然后，用掩模板通过曝光、显影、刻蚀、剥离等构图工艺处理，在基板的一定区域上形成栅金属层。
步骤102、在栅金属层上形成栅绝缘层。
例如，可以利用化学汽相沉积法或者磁控溅射的方法在玻璃基板上沉积厚度为
Figure PCTCN2014091113-appb-000003
至
Figure PCTCN2014091113-appb-000004
的栅绝缘层薄膜，该栅绝缘层薄膜的材料通常是氮化硅，也可以使用氧化硅和氮氧化硅等。
步骤103、在栅绝缘层上形成源极和漏极。
例如，可以采用与形成栅极类似的方法来形成源极和漏极。
步骤104、在源极和漏极上形成覆盖源极和漏极的第一层修饰层。，第一层修饰层用于改变源极和漏极的接触角。
例如，可以采用在源极和漏极上先镀一层形成修饰层的材料的薄膜，然后通过构图工艺形成修饰层的图案，或者先利用光刻胶形成修饰层的图案，之后再涂敷一层修饰层的材料。
步骤105、在第一层修饰层上形成覆盖源极、漏极和修饰层的有机半导体层。
例如，可以利用化学汽相沉积法在第一层修饰层上沉积金属氧化物半导体薄膜，然后对金属氧化物半导体薄膜进行一次构图工艺形成有机半导体层，即在光刻胶涂覆后，用普通的掩模板对基板进行曝光、显影、刻蚀形成有机半导体层即可。
在至少一个实施例中，所述制作方法还可以包括：形成栅绝缘层，在栅绝缘层和有机半导体层之间的位置处形成所述修饰层，所述修饰层还用于改变栅绝缘层的接触角，即位于栅绝缘层和有机半导体层之间的位置处的修饰层用于改变栅绝缘层的接触角。
例如，参照图5所示，该方法可以包括以下步骤201至步骤206，下面具体介绍这些步骤。
步骤201、在基板上形成一层包括栅极、栅线和栅线引线的栅金属层。
步骤202、在栅金属层上形成栅绝缘层。
步骤203、在栅绝缘层上形成源极、漏极。
步骤204、在源极和漏极上方形成覆盖源极和漏极的第一层修饰层。
步骤205、在栅绝缘层的上方与有机半导体层之间的位置处形成第二层修饰层。
例如，可以采用与形成第一层修饰层相同的方法形成第二层修饰层。
步骤206、制作覆盖第一层修饰层、第二层修饰层、源极和漏极的有机半导体层。
需要说明的是，本实施例中的流程与上述实施例中的步骤相同的描述可以参照上述实施例中的说明，此处不再赘述。
在至少一个实施例中，所述方法还可以包括：形成栅极，在栅极、源极和漏极下方分别形成被所述栅极、源极和漏极覆盖的缓冲层；缓冲层的材料的附着力大于源极、漏极和栅极的附着力。本发明实施例不限于此，例如，还可以仅在源极和漏极下方分别形成被源极和漏极覆盖的缓冲层，并且缓冲层的材料的附着力大于源极和漏极的附着力，即此时有机半导体层和栅绝缘层之间未设置修饰层。
以在栅极、源极和漏极下方分别形成被所述栅极、源极和漏极覆盖的缓冲层为例，参照图6所示，该方法可以包括以下步骤301至步骤309，为了便于理解，在以下步骤中，将栅极下的缓冲层叫第一层缓冲层，在源极和漏 极下方形成的缓冲叫第二层缓冲层，当然这里只是限定形成的各个缓冲层的位置不同，但是形成各个缓冲层的材料也可以是相同的。下面具体介绍这些步骤。
步骤301、在基板上与栅极对应的位置处形成第一层缓冲层。
例如，可以采用负性光刻胶形成缓冲层的图案，然后再采用真空或者溶液法镀膜形成缓冲层。或者先在基板上镀一层形成缓冲层的材料的薄膜，然后利用掩膜板形成缓冲层图案。
步骤302、在第一层缓冲层上形成一层包括栅极、栅线和栅线引线的栅金属层，栅极覆盖第一层缓冲层。
例如，可以采用磁控溅射的方法在基板例如玻璃基板或石英基板上沉积一层厚度在
Figure PCTCN2014091113-appb-000005
至
Figure PCTCN2014091113-appb-000006
的金属薄膜，该金属薄膜的材料通常可以采用钼、铝、铝镍合金、钼钨合金、铬、或铜等金属中的至少一种或几种的组合。然后，用掩模板通过曝光、显影、刻蚀、剥离等构图工艺处理，在基板的一定区域上形成栅金属层。
步骤303、在栅金属层上形成一层覆盖栅金属层的栅绝缘层。
步骤304、在栅绝缘层上与源极和漏极对应的位置处形成第二层缓冲层。
例如，可以参照形成第一层缓冲层的方法来形成第二层缓冲层。
步骤305、在第二层缓冲层上形成源极、漏极和数据线。
例如，可以采用与形成源极和漏极相同的方法形成数据线。
步骤306、在源极和漏极上方形成覆盖源极和漏极的第一层修饰层。
步骤307、在栅绝缘层的上方与有机半导体层之间的位置处形成第二层修饰层。
步骤308、制作覆盖第一层修饰层、第二层修饰层、源极和漏极的有机半导体层。
步骤309、制作覆盖有机半导体层、源极、漏极和数据线的保护层。
例如，采用和栅绝缘层以及有机半导体层相类似的方法，在整个基板上涂覆一层厚度在
Figure PCTCN2014091113-appb-000007
到
Figure PCTCN2014091113-appb-000008
的保护层，其材料通常是氮化硅或透明的有机树脂材料。
需要说明的是，本实施例中的流程与上述实施例中的步骤相同的描述可以参照上述实施例中的说明，此处不再赘述。
本发明的上述实施例提供的有机薄膜晶体管的制作方法，通过在制作形成有机薄膜晶体管时，在有机半导体层的下方与源极和漏极对应的位置处设置可以改变源极和漏极的接触角的修饰层，修饰层使得源极和漏极的接触角减小，因而有机半导体层可以与源极和漏极充分接触，这保证了有机半导体层可以均匀地形成在源极和漏极上，解决了薄膜晶体管中的电极层的接触角较大导致的有机半导体层形成效果不佳、容易出现断线的问题，保证了薄膜晶体管的质量和性能，避免了对原材料的浪费，降低了生产成本。进而，提高了生产效率。
以上所述，仅为本发明的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本发明的保护范围之内。因此，本发明的保护范围应以所述权利要求的保护范围为准。
本申请要求于2014年8月20日递交的中国专利申请第201410413117.2号的优先权，在此全文引用上述中国专利申请公开的内容以作为本申请的一部分。

Claims (14)

  1. 一种有机薄膜晶体管，包括：源极、漏极、设置于所述源极和漏极上方的有机半导体层，以及修饰层，其中：
    所述修饰层设置于所述有机半导体层的下方与所述源极和漏极对应的位置处，所述修饰层覆盖所述源极和漏极；
    所述修饰层用于改变所述源极和漏极的接触角。
  2. 根据权利要求1所述的有机薄膜晶体管，还包括栅绝缘层，其中：
    所述修饰层还设置于所述有机半导体层与所述栅绝缘层之间的位置处；
    所述修饰层还用于改变所述栅绝缘层的接触角。
  3. 根据权利要求1或2所述的有机薄膜晶体管，还包括：缓冲层，其中：
    所述缓冲层设置于电极的下方与所述电极对应的位置处；
    所述缓冲层被所述电极覆盖；
    所述缓冲层的材料的附着力大于所述电极的附着力。
  4. 根据权利要求3所述的有机薄膜晶体管，还包括：栅极，其中，所述电极为所述源极、漏极和栅极中的至少一个或几个的组合。
  5. 根据权利要求3或4所述的有机薄膜晶体管，其中，
    所述缓冲层的厚度为20～300nm。
  6. 根据权利要求1～5任一所述的有机薄膜晶体管，其中，
    所述修饰层的厚度为0.1～10nm。
  7. 根据权利要求1～6任一所述的有机薄膜晶体管，其中，
    所述源极和漏极的材料包括：金或银。
  8. 根据权利要求1～7任一所述的有机薄膜晶体管，其中，所述修饰层的材料包括：有机小分子材料或自组装小分子材料。
  9. 一种阵列基板，包括权利要求1～8任一所述的有机薄膜晶体管。
  10. 一种显示装置，包括如权利要求1～8任一所述的有机薄膜晶体管或如权利要求9所述的阵列基板。
  11. 一种有机薄膜晶体管的制作方法，包括：
    形成源极、漏极和所述源极和漏极上方的有机半导体层，以及
    在所述源极和漏极上方且与所述有机半导体层对应的位置处形成覆盖所 述源极和漏极的修饰层，其中，所述修饰层用于改变所述源极和漏极的接触角。
  12. 根据权利要求11所述的方法，还包括：
    形成栅绝缘层，以及
    在所述栅绝缘层和所述有机半导体层之间的位置处形成所述修饰层，其中，所述修饰层还用于改变所述栅绝缘层的接触角。
  13. 根据权利要求11或12所述的方法，还包括：
    在所述源极和漏极下方分别形成被所述源极和漏极覆盖的缓冲层；
    其中，所述缓冲层的材料的附着力大于所述源极和漏极的附着力。
  14. 根据权利要求11或12所述的方法，还包括：
    形成栅极，以及
    在所述栅极、源极和漏极下方分别形成被所述栅极、源极和漏极覆盖的缓冲层；
    其中，所述缓冲层的材料的附着力大于所述源极、漏极和栅极的附着力。
PCT/CN2014/091113 2014-08-20 2014-11-14 有机薄膜晶体管及其制作方法、阵列基板和显示装置 WO2016026221A1 (zh)

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