WO2016011810A1 - Method for preparing nitride semiconductor - Google Patents

Method for preparing nitride semiconductor Download PDF

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WO2016011810A1
WO2016011810A1 PCT/CN2015/073465 CN2015073465W WO2016011810A1 WO 2016011810 A1 WO2016011810 A1 WO 2016011810A1 CN 2015073465 W CN2015073465 W CN 2015073465W WO 2016011810 A1 WO2016011810 A1 WO 2016011810A1
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layer
nitride semiconductor
type
buffer layer
gallium nitride
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PCT/CN2015/073465
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French (fr)
Chinese (zh)
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谢翔麟
徐志波
李政鸿
林兓兓
卓昌正
张家宏
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厦门市三安光电科技有限公司
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Publication of WO2016011810A1 publication Critical patent/WO2016011810A1/en
Priority to US15/401,091 priority Critical patent/US10263139B2/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/0254—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/0242—Crystalline insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02458—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02505—Layer structure consisting of more than two layers
    • H01L21/2056—
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/10—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector

Definitions

  • the invention relates to the technical field of light-emitting diodes, and in particular to a method for preparing a nitride semiconductor.
  • PVD Physical Vapor Deposition
  • a material source a solid or liquid surface
  • a gaseous atom a molecule or a partially ionized ion under vacuum
  • a low pressure gas or plasma
  • Physical vapor deposition methods mainly include: vacuum evaporation, sputter coating, arc plasma plating, ion plating, and molecular beam epitaxy; it can deposit not only metal films, alloy films, but also compounds, ceramics, semiconductors, polymers.
  • Membrane and the like the technology has simple process, low environmental pollution, low consumption of raw materials, uniform film formation and strong adhesion to the substrate.
  • the method in the case of rapid development of light-emitting diode (LED) research, the method is also widely used in the preparation of light-emitting diodes.
  • US Patent Publication No. 2013/0285065 discloses that the surface of the AlN film layer formed by the PVD method has a surface roughness of less than 1 nm; the lattice quality is superior, and the 002 half-width is less than 200; and then the chemical vapor deposition method is used on the film layer.
  • CVD method A nitride layer such as an n-type layer, a light-emitting layer, and a p-type layer is redeposited.
  • the difference between the crystal layer deposited by the chemical vapor deposition method and the growth chamber of the PVD method is increased, and the material composition is GaN, and the lattice mismatch with the AlN thin film layer is large.
  • the present invention provides a method for preparing a nitride semiconductor by depositing a CVD Al x In y Ga 1-xy N material layer between a PVD AlN thin film layer and a CVD nitride layer.
  • the material layer can reduce the stress between the AlN film layer and the nitride layer, improve the overall quality of the light emitting diode, and ultimately improve the luminous efficiency.
  • the technical solution of the present invention to solve the above problems is: a method for preparing a nitride semiconductor, comprising the following steps:
  • Step 1 providing a substrate, depositing an AlN layer on the substrate by physical vapor deposition (PVD method) to form a first buffer layer;
  • PVD method physical vapor deposition
  • Step 2 depositing an Al x In y Ga 1-xy N (0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1) layer on the AlN layer by chemical vapor deposition (CVD) to form a second buffer layer;
  • the second buffer layer is combined with the first buffer layer to form a bottom layer;
  • Step 3 depositing an n-type gallium nitride layer, a light-emitting layer, and a p-type gallium nitride layer on the nitride underlayer by a CVD method.
  • the second buffer layer composed of the Al x In y Ga 1-xy N material formed by the CVD method and the first buffer layer composed of the AlN material are both aluminum-containing material layers, so the material coefficients are similar, and the lattice mismatch is Small; and because the second buffer layer is deposited in the same manner as the deposition layer of the third step, metal organic chemical vapor deposition (MOCVD) may be preferred, thereby reducing the material stress between step one and step three, thereby Improve the quality of the underlying lattice layer and improve the overall epitaxial structure quality.
  • MOCVD metal organic chemical vapor deposition
  • the formed first buffer layer has a thickness ranging from 5 angstroms to 350 angstroms.
  • the formed second buffer layer has a thickness ranging from 5 angstroms to 1500 angstroms.
  • the formed second buffer layer has a growth temperature ranging from 400 to 1150 °C.
  • the n-type gallium nitride layer formed in the third step is an n-type doped gallium nitride layer or a combined layer of an undoped gallium nitride layer and an n-type gallium nitride layer.
  • the formed underlayer is undoped or doped with n-type or p-type impurities.
  • the n-type impurity is one of silicon or tin.
  • the p-type impurity is one of zinc, magnesium, calcium, and barium.
  • the concentration of the n-type or p-type impurity ranges from 10 17 to 10 20 /cm 3 .
  • the first buffer layer is deposited in a PVD chamber; the second buffer layer is deposited in an MOCVD chamber.
  • the present invention has at least the following beneficial effects: in the method of the present invention, the second buffer layer composed of the Al x In y Ga 1-xy N material formed by the MOCVD method and the first buffer layer composed of the AlN material have a small lattice mismatch And the deposition chamber environment is consistent with the growth environment of the third step deposition layer, thereby reducing the material stress between step one and step three, and improving the overall epitaxial structure quality.
  • 1 to 2 are schematic views showing the structure of an LED according to an embodiment of the present invention.
  • FIG. 3 is a flow chart of a method for preparing a nitride semiconductor according to the present invention.
  • substrate 2. bottom layer; 21. first buffer layer; 22. second buffer layer; 3. n-type gallium nitride layer; 31. undoped gallium nitride layer; 32. n-type doping a gallium nitride layer; 4. a light-emitting layer; 5. a p-type gallium nitride layer.
  • a method for preparing a nitride semiconductor includes the following steps:
  • Step 1 Providing a substrate 1.
  • the substrate may be a sapphire substrate or a silicon substrate, or may be a patterned substrate, placed in a physical vapor deposition chamber, and lining by physical vapor deposition (PVD).
  • PVD physical vapor deposition
  • Step 2 The substrate deposited with the first buffer layer 21 is placed in a chemical vapor deposition (CVD) chamber, and a thickness ranging from 5 ⁇ to 1500 ⁇ Al x In y Ga 1-xy N (0) is deposited by CVD. ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1) layer, adjusting the Al composition so that the lattice constant is between the AlN layer and the gallium nitride series layer to form the second buffer layer 22, and the growth temperature ranges from 400 to 1150. °C; the second buffer layer 22 combined with the first buffer layer 21 to form the bottom layer 2;
  • Step 3 Continue to adjust the growth parameters such as temperature and gas flow in the CVD chamber of the second step, and deposit the n-type gallium nitride layer 3, the light-emitting layer 4 and the p-type gallium nitride layer 5 on the underlayer 2 by CVD.
  • the n-type gallium nitride layer 3 is sequentially a combination layer of the undoped gallium nitride layer 31 and the n-type doped gallium nitride layer 32; and the n-type gallium nitride layer 3 can also be directly n-type doped nitrided Gallium layer 32 (shown in Figure 2).
  • the n-type gallium nitride layer 3 the light-emitting layer 4, and the p-type nitride layer 5 are deposited in the CVD chamber directly in step three, due to the PVD cavity
  • the depositional environment of the chamber and the deposition environment of the CVD chamber are quite different.
  • the crystal state of the deposited thin film is quite different, and the lattice coefficient of the AlN layer material and the subsequent nitride layer material are greatly different, which is likely to cause the underlying layer 2 and the subsequent nitrogen.
  • the buffer layer When the buffer layer is inserted into the second Al x In y Ga 1-xy N material 22, because between the Al x In y Ga 1-xy N AlN and GaN-based material with a lattice coefficient difference reduction layer material, the crystal The lattice matching degree is increased, and both the layer and the subsequent layer are deposited in the CVD chamber, and the deposition method is small, so that the stress between the n-type gallium nitride layer 3 and the subsequent layer and the AlN layer can be reduced, and the overall crystal can be improved. quality.
  • first buffer layer and the second buffer layer included in the bottom layer 2 may be doped with an n-type impurity, preferably a silicon impurity, and the doping concentration is about 10 17 to 10 20 /cm 3 . .
  • first buffer layer and the second buffer layer included in the bottom layer 2 may be doped with a p-type impurity, preferably a magnesium impurity, and the doping concentration is about 10 17 to 10 20 /cm 3 . .

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Abstract

A method for preparing a nitride semiconductor, by depositing an AlxInyGa1-x-yN material layer by the CVD method between an AlN thin film layer by the PVD method and a gallium nitride series layer by the CVD method, the use of the material layer can reduce the stress effect between the AlN thin film layer and the gallium nitride series layer, improves the whole quality of a light-emitting diode, and thereby improves the light-emitting efficiency.

Description

一种氮化物半导体的制备方法Method for preparing nitride semiconductor
本申请要求于2014年7月24日提交中国专利局、申请号为201410354965.0、发明名称为“一种氮化物半导体的制备方法”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。The present application claims priority to Chinese Patent Application No. 2014-10354965.0, entitled "Preparation of a Nitride Semiconductor" by the Chinese Patent Office on July 24, 2014, the entire contents of which is incorporated herein by reference. in.
技术领域Technical field
本发明涉及发光二极管制备技术领域，特别涉及一种氮化物半导体的制备方法。The invention relates to the technical field of light-emitting diodes, and in particular to a method for preparing a nitride semiconductor.
背景技术Background technique
物理气相沉积(Physical Vapor Deposition，PVD)技术是指在真空条件下，采用物理方法，将材料源——固体或液体表面气化成气态原子、分子或部分电离成离子，并通过低压气体(或等离子体)过程，在基体表面沉积具有某种特殊功能的薄膜的技术。物理气相沉积方法主要包括：真空蒸镀、溅射镀膜、电弧等离子体镀、离子镀膜，及分子束外延等；其不仅可以沉积金属膜、合金膜、还可以沉积化合物、陶瓷、半导体、聚合物膜等；该技术工艺过程简单，对环境污染小，原材料消耗少，且成膜均匀致密，与基板的结合力强。Physical Vapor Deposition (PVD) technology refers to the physical method of vaporizing a material source, a solid or liquid surface, into a gaseous atom, a molecule or a partially ionized ion under vacuum, and passing a low pressure gas (or plasma). The process of depositing a film with a special function on the surface of a substrate. Physical vapor deposition methods mainly include: vacuum evaporation, sputter coating, arc plasma plating, ion plating, and molecular beam epitaxy; it can deposit not only metal films, alloy films, but also compounds, ceramics, semiconductors, polymers. Membrane and the like; the technology has simple process, low environmental pollution, low consumption of raw materials, uniform film formation and strong adhesion to the substrate.
鉴于PVD法的以上优势，在发光二极管(Light-emitting diode，LED)研究快速发展的情况下，该法也被广泛应用与发光二极管的制备中。美国专利文献US2013/0285065揭示了利用PVD法形成的AlN薄膜层表面平整，其粗糙度小于1nm；晶格质量较优，其002半峰宽小于200；后在此薄膜层上利用化学气相沉积法(CVD法)再沉积n型层、发光层和p型层等氮化物层。而在实际制备中，后续利用化学气相沉积法沉积的晶体层与前述PVD法的生长腔室环境差异加大，且材料组成为GaN系，其与AlN薄膜层的晶格失配较大，因而造成PVD法AlN薄膜层与CVD法氮化物层之间存在较大应力，从而易导致发光二极管质量变差，发光效率降低。In view of the above advantages of the PVD method, in the case of rapid development of light-emitting diode (LED) research, the method is also widely used in the preparation of light-emitting diodes. US Patent Publication No. 2013/0285065 discloses that the surface of the AlN film layer formed by the PVD method has a surface roughness of less than 1 nm; the lattice quality is superior, and the 002 half-width is less than 200; and then the chemical vapor deposition method is used on the film layer. (CVD method) A nitride layer such as an n-type layer, a light-emitting layer, and a p-type layer is redeposited. In the actual preparation, the difference between the crystal layer deposited by the chemical vapor deposition method and the growth chamber of the PVD method is increased, and the material composition is GaN, and the lattice mismatch with the AlN thin film layer is large. There is a large stress between the AlN film layer of the PVD method and the nitride layer of the CVD method, which tends to cause deterioration of the quality of the light emitting diode and lower luminous efficiency.
发明内容Summary of the invention
针对上述问题，本发明提出了一种氮化物半导体的制备方法，通过在PVD法AlN薄膜层与CVD法氮化物层之间沉积一CVD法AlxInyGa1-x-yN材料层，利用该材料层可减小 AlN薄膜层与氮化物层之间的应力作用，改善发光二极管的整体质量，从而最终改善发光效率。In view of the above problems, the present invention provides a method for preparing a nitride semiconductor by depositing a CVD Al x In y Ga 1-xy N material layer between a PVD AlN thin film layer and a CVD nitride layer. The material layer can reduce the stress between the AlN film layer and the nitride layer, improve the overall quality of the light emitting diode, and ultimately improve the luminous efficiency.
本发明解决上述问题的技术方案为：一种氮化物半导体的制备方法，包括以下步骤：The technical solution of the present invention to solve the above problems is: a method for preparing a nitride semiconductor, comprising the following steps:
步骤一：提供一衬底，利用物理气相沉积法(PVD法)在所述衬底上沉积一AlN层，形成第一缓冲层；Step 1: providing a substrate, depositing an AlN layer on the substrate by physical vapor deposition (PVD method) to form a first buffer layer;
步骤二：在所述AlN层上利用化学气相沉积法(CVD)沉积一AlxInyGa1-x-yN(0<x≤1，0≤y≤1)层，形成第二缓冲层；所述第二缓冲层与所述第一缓冲层组合构成底层；Step 2: depositing an Al x In y Ga 1-xy N (0<x≤1, 0≤y≤1) layer on the AlN layer by chemical vapor deposition (CVD) to form a second buffer layer; The second buffer layer is combined with the first buffer layer to form a bottom layer;
步骤三：在所述氮化物底层上利用CVD法沉积n型氮化镓层、发光层和p型氮化镓系层。Step 3: depositing an n-type gallium nitride layer, a light-emitting layer, and a p-type gallium nitride layer on the nitride underlayer by a CVD method.
该CVD法形成的AlxInyGa1-x-yN材料组成的第二缓冲层与所述AlN材料组成的第一缓冲层均为含铝材料层，故其材料系数相近，晶格失配较小；且因第二缓冲层的沉积方式与第三步骤沉积层的沉积方式相同，可优选金属有机化学气相沉积(MOCVD)法，因而可减小步骤一与步骤三之间的材料应力，从而改善底层的晶格层质量，改善整体外延结构质量。The second buffer layer composed of the Al x In y Ga 1-xy N material formed by the CVD method and the first buffer layer composed of the AlN material are both aluminum-containing material layers, so the material coefficients are similar, and the lattice mismatch is Small; and because the second buffer layer is deposited in the same manner as the deposition layer of the third step, metal organic chemical vapor deposition (MOCVD) may be preferred, thereby reducing the material stress between step one and step three, thereby Improve the quality of the underlying lattice layer and improve the overall epitaxial structure quality.
优选的，所述形成的第一缓冲层的厚度范围为5埃～350埃。Preferably, the formed first buffer layer has a thickness ranging from 5 angstroms to 350 angstroms.
优选的，所述形成的第二缓冲层的厚度范围为5埃～1500埃。Preferably, the formed second buffer layer has a thickness ranging from 5 angstroms to 1500 angstroms.
优选的，所述形成的第二缓冲层的生长温度范围为400～1150℃。Preferably, the formed second buffer layer has a growth temperature ranging from 400 to 1150 °C.
优选的，所述步骤三形成的n型氮化镓层为n型掺杂氮化镓层或无掺杂氮化镓层与n型氮化镓层之组合层。Preferably, the n-type gallium nitride layer formed in the third step is an n-type doped gallium nitride layer or a combined layer of an undoped gallium nitride layer and an n-type gallium nitride layer.
优选的，所述形成的底层为无掺杂或掺杂有n型或p型杂质。Preferably, the formed underlayer is undoped or doped with n-type or p-type impurities.
优选的，所述n型杂质为硅或锡的其中一种。Preferably, the n-type impurity is one of silicon or tin.
优选的，所述p型杂质为锌、镁、钙、钡的其中一种。Preferably, the p-type impurity is one of zinc, magnesium, calcium, and barium.
优选的，所述n型或p型杂质的浓度范围为1017～1020/cm3。Preferably, the concentration of the n-type or p-type impurity ranges from 10 17 to 10 20 /cm 3 .
优选的，所述第一缓冲层在PVD腔室中沉积形成；所述第二缓冲层在MOCVD腔室中沉积形成。Preferably, the first buffer layer is deposited in a PVD chamber; the second buffer layer is deposited in an MOCVD chamber.
本发明至少具有以下有益效果：本发明方法中，该MOCVD法形成的AlxInyGa1-x-yN材料组成的第二缓冲层与所述AlN材料组成的第一缓冲层晶格失配小，且其沉积腔室环 境与所述第三步骤沉积层生长环境一致，因而可减小步骤一与步骤三之间的材料应力，改善整体外延结构质量。The present invention has at least the following beneficial effects: in the method of the present invention, the second buffer layer composed of the Al x In y Ga 1-xy N material formed by the MOCVD method and the first buffer layer composed of the AlN material have a small lattice mismatch And the deposition chamber environment is consistent with the growth environment of the third step deposition layer, thereby reducing the material stress between step one and step three, and improving the overall epitaxial structure quality.
附图说明DRAWINGS
附图用来提供对本发明的进一步理解，并且构成说明书的一部分，与本发明的实施例一起用于解释本发明，并不构成对本发明的限制。此外，附图数据是描述概要，不是按比例绘制。The drawings are intended to provide a further understanding of the invention, and are intended to be a In addition, the drawing figures are a summary of the description and are not drawn to scale.
图1～2为本发明之实施例的发光二极管结构示意图。1 to 2 are schematic views showing the structure of an LED according to an embodiment of the present invention.
图3为本发明之一种氮化物半导体的制备方法流程图。3 is a flow chart of a method for preparing a nitride semiconductor according to the present invention.
图中：1.衬底；2.底层；21.第一缓冲层；22.第二缓冲层；3.n型氮化镓层；31.无掺杂氮化镓层；32.n型掺杂氮化镓层；4.发光层；5.p型氮化镓系层。In the figure: 1. substrate; 2. bottom layer; 21. first buffer layer; 22. second buffer layer; 3. n-type gallium nitride layer; 31. undoped gallium nitride layer; 32. n-type doping a gallium nitride layer; 4. a light-emitting layer; 5. a p-type gallium nitride layer.
具体实施方式detailed description
下面结合附图和实施例对本发明的具体实施方式进行详细说明。The specific embodiments of the present invention will be described in detail below with reference to the drawings and embodiments.
实施例1Example 1
请参看附图1～3，一种氮化物半导体的制备方法，包括以下步骤：Referring to Figures 1-3, a method for preparing a nitride semiconductor includes the following steps:
步骤一：提供衬底1，衬底可为蓝宝石衬底或硅衬底，也可以是图形化衬底，将其置于物理气相沉积腔室中，利用物理气相沉积法(PVD法)在衬底1上沉积厚度为5埃～350埃的AlN层，形成第一缓冲层21；Step 1: Providing a substrate 1. The substrate may be a sapphire substrate or a silicon substrate, or may be a patterned substrate, placed in a physical vapor deposition chamber, and lining by physical vapor deposition (PVD). Depositing an AlN layer having a thickness of 5 angstroms to 350 angstroms on the bottom 1 to form a first buffer layer 21;
步骤二：将沉积有第一缓冲层21的衬底置于化学气相沉积(CVD)腔室中，利用CVD法沉积一厚度范围为5埃～1500埃AlxInyGa1-x-yN(0<x≤1，0≤y≤1)层，调节Al组分，使其晶格常数介于AlN层与氮化镓系列层之间，形成第二缓冲层22，生长温度范围为400～1150℃；第二缓冲层22与所述第一缓冲层21组合形成底层2；Step 2: The substrate deposited with the first buffer layer 21 is placed in a chemical vapor deposition (CVD) chamber, and a thickness ranging from 5 Å to 1500 Å Al x In y Ga 1-xy N (0) is deposited by CVD. <x≤1, 0≤y≤1) layer, adjusting the Al composition so that the lattice constant is between the AlN layer and the gallium nitride series layer to form the second buffer layer 22, and the growth temperature ranges from 400 to 1150. °C; the second buffer layer 22 combined with the first buffer layer 21 to form the bottom layer 2;
步骤三：继续在步骤二的CVD腔室中，调节温度、气流等生长参数，在底层2上利用CVD法沉积n型氮化镓层3、发光层4和p型氮化镓系层5。其中，n型氮化镓层3依次为无掺杂氮化镓层31和n型掺杂氮化镓层32组合层；此外n型氮化镓层3亦可直接为n型掺杂氮化镓层32(如图2所示)。 Step 3: Continue to adjust the growth parameters such as temperature and gas flow in the CVD chamber of the second step, and deposit the n-type gallium nitride layer 3, the light-emitting layer 4 and the p-type gallium nitride layer 5 on the underlayer 2 by CVD. The n-type gallium nitride layer 3 is sequentially a combination layer of the undoped gallium nitride layer 31 and the n-type doped gallium nitride layer 32; and the n-type gallium nitride layer 3 can also be directly n-type doped nitrided Gallium layer 32 (shown in Figure 2).
在本实施例中，利用PVD法沉积第一缓冲层后，如直接进行步骤三在CVD腔室中沉积n型氮化镓层3、发光层4和p型氮化物层5时，由于PVD腔室沉积环境与CVD腔室沉积环境差异较大，其沉积的薄膜晶体状态有较大差异，且AlN层材料与后续氮化物层材料晶格系数有较大差异，从而易造成底层2与后续氮化镓系列层3之间存在一定应力，进而影响发光二极管的整体质量和性能。而当***AlxInyGa1-x-yN材料的第二缓冲层22时，因AlxInyGa1-x-yN材料与AlN及氮化镓系层之间材料晶格系数差异缩小，晶格匹配度增加，且该层与后续层均在CVD腔室中沉积，沉积方式差异较小，因此可减小n型氮化镓层3及后续层与AlN层之间的应力，改善整体晶体质量。In this embodiment, after depositing the first buffer layer by the PVD method, if the n-type gallium nitride layer 3, the light-emitting layer 4, and the p-type nitride layer 5 are deposited in the CVD chamber directly in step three, due to the PVD cavity The depositional environment of the chamber and the deposition environment of the CVD chamber are quite different. The crystal state of the deposited thin film is quite different, and the lattice coefficient of the AlN layer material and the subsequent nitride layer material are greatly different, which is likely to cause the underlying layer 2 and the subsequent nitrogen. There is a certain stress between the gallium series layer 3, which in turn affects the overall quality and performance of the LED. When the buffer layer is inserted into the second Al x In y Ga 1-xy N material 22, because between the Al x In y Ga 1-xy N AlN and GaN-based material with a lattice coefficient difference reduction layer material, the crystal The lattice matching degree is increased, and both the layer and the subsequent layer are deposited in the CVD chamber, and the deposition method is small, so that the stress between the n-type gallium nitride layer 3 and the subsequent layer and the AlN layer can be reduced, and the overall crystal can be improved. quality.
实施例2Example 2
本实施例与实施例1的区别在于：底层2中包含的第一缓冲层和第二缓冲层可掺杂有n型杂质，优选硅杂质，掺杂浓度为1017～1020/cm3左右。The difference between this embodiment and the first embodiment is that the first buffer layer and the second buffer layer included in the bottom layer 2 may be doped with an n-type impurity, preferably a silicon impurity, and the doping concentration is about 10 17 to 10 20 /cm 3 . .
实施例3Example 3
本实施例与实施例1的区别在于：底层2中包含的第一缓冲层和第二缓冲层可掺杂有p型杂质，优选镁杂质，掺杂浓度为1017～1020/cm3左右。The difference between this embodiment and the first embodiment is that the first buffer layer and the second buffer layer included in the bottom layer 2 may be doped with a p-type impurity, preferably a magnesium impurity, and the doping concentration is about 10 17 to 10 20 /cm 3 . .
应当理解的是，上述具体实施方案为本发明的优选实施例，本发明的范围不限于该实施例，凡依本发明所做的任何变更，皆属本发明的保护范围之内。 It is to be understood that the above-described embodiments are a preferred embodiment of the invention, and the scope of the invention is not limited to the embodiment, and any modifications made in accordance with the invention are within the scope of the invention.

Claims (10)

  1. 一种氮化物半导体的制备方法，包括以下步骤：A method for preparing a nitride semiconductor, comprising the steps of:
    步骤一：提供一衬底，利用物理气相沉积法(PVD法)在所述衬底上沉积一AlN层，形成第一缓冲层；Step 1: providing a substrate, depositing an AlN layer on the substrate by physical vapor deposition (PVD method) to form a first buffer layer;
    步骤二：在所述AlN层上利用化学气相沉积法(CVD)沉积一AlxInyGa1-x-yN(0<x≤1，0≤y≤1)层，形成第二缓冲层；所述第二缓冲层与所述第一缓冲层组合构成底层；Step 2: depositing an Al x In y Ga 1-xy N (0<x≤1, 0≤y≤1) layer on the AlN layer by chemical vapor deposition (CVD) to form a second buffer layer; The second buffer layer is combined with the first buffer layer to form a bottom layer;
    步骤三：在所述底层上利用化学气相沉积法沉积n型氮化镓层、发光层和p型氮化镓层。Step 3: depositing an n-type gallium nitride layer, a light-emitting layer, and a p-type gallium nitride layer by chemical vapor deposition on the underlayer.
  2. 根据权利要求1所述的氮化物半导体的制备方法，其特征在于：所述第二步骤与第三步骤沉积方式相同，均为金属有机化学气相沉积(MOCVD)法。The method for preparing a nitride semiconductor according to claim 1, wherein the second step is the same as the third step, and is a metal organic chemical vapor deposition (MOCVD) method.
  3. 根据权利要求1所述的氮化物半导体的制备方法，其特征在于：所述形成的第一缓冲层的厚度范围为5埃～350埃。The method of producing a nitride semiconductor according to claim 1, wherein the first buffer layer is formed to have a thickness ranging from 5 angstroms to 350 angstroms.
  4. 根据权利要求1所述的氮化物半导体的制备方法，其特征在于：所述形成的第二缓冲层的厚度范围为5埃～1500埃。The method of producing a nitride semiconductor according to claim 1, wherein the second buffer layer is formed to have a thickness ranging from 5 Å to 1,500 Å.
  5. 根据权利要求1所述的氮化物半导体的制备方法，其特征在于：所述第二缓冲层的生长温度范围为400～1150℃。The method of producing a nitride semiconductor according to claim 1, wherein the second buffer layer has a growth temperature in the range of 400 to 1150 °C.
  6. 根据权利要求1所述的氮化物半导体的制备方法，其特征在于：所述步骤三中形成的n型氮化镓层为n型掺杂氮化镓层或无掺杂氮化镓层与n型氮化镓层之组合层。The method for fabricating a nitride semiconductor according to claim 1, wherein the n-type gallium nitride layer formed in the third step is an n-type doped gallium nitride layer or an undoped gallium nitride layer and n A combined layer of a type of gallium nitride layer.
  7. 根据权利要求1所述的氮化物半导体的制备方法，其特征在于：所述形成的底层为无掺杂或掺杂有n型或p型杂质。The method of preparing a nitride semiconductor according to claim 1, wherein the underlayer formed is undoped or doped with an n-type or p-type impurity.
  8. 根据权利要求7所述的氮化物半导体的制备方法，其特征在于：所述n型杂质为硅或锡。The method of producing a nitride semiconductor according to claim 7, wherein the n-type impurity is silicon or tin.
  9. 根据权利要求7所述的氮化物半导体的制备方法，其特征在于：所述p型杂质为锌或镁或钙或钡的其中一种。 The method of producing a nitride semiconductor according to claim 7, wherein the p-type impurity is one of zinc or magnesium or calcium or strontium.
  10. 根据权利要求7所述的氮化物半导体的制备方法，其特征在于：所述n型或p型杂质的浓度范围为1017～1020/cm3。 The method of producing a nitride semiconductor according to claim 7, wherein the concentration of the n-type or p-type impurity ranges from 10 17 to 10 20 /cm 3 .
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