WO2016009758A1 - モーター制御装置、画像形成装置、モーター制御方法、画像形成装置の制御方法 - Google Patents
モーター制御装置、画像形成装置、モーター制御方法、画像形成装置の制御方法 Download PDFInfo
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- WO2016009758A1 WO2016009758A1 PCT/JP2015/067009 JP2015067009W WO2016009758A1 WO 2016009758 A1 WO2016009758 A1 WO 2016009758A1 JP 2015067009 W JP2015067009 W JP 2015067009W WO 2016009758 A1 WO2016009758 A1 WO 2016009758A1
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03G—ELECTROGRAPHY; ELECTROPHOTOGRAPHY; MAGNETOGRAPHY
- G03G15/00—Apparatus for electrographic processes using a charge pattern
- G03G15/75—Details relating to xerographic drum, band or plate, e.g. replacing, testing
- G03G15/757—Drive mechanisms for photosensitive medium, e.g. gears
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P29/00—Arrangements for regulating or controlling electric motors, appropriate for both AC and DC motors
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/18—Numerical control [NC], i.e. automatically operating machines, in particular machine tools, e.g. in a manufacturing environment, so as to execute positioning, movement or co-ordinated operations by means of programme data in numerical form
- G05B19/402—Numerical control [NC], i.e. automatically operating machines, in particular machine tools, e.g. in a manufacturing environment, so as to execute positioning, movement or co-ordinated operations by means of programme data in numerical form characterised by control arrangements for positioning, e.g. centring a tool relative to a hole in the workpiece, additional detection means to correct position
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02K—DYNAMO-ELECTRIC MACHINES
- H02K29/00—Motors or generators having non-mechanical commutating devices, e.g. discharge tubes or semiconductor devices
- H02K29/14—Motors or generators having non-mechanical commutating devices, e.g. discharge tubes or semiconductor devices with speed sensing devices
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P23/00—Arrangements or methods for the control of AC motors characterised by a control method other than vector control
- H02P23/0077—Characterised by the use of a particular software algorithm
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P23/00—Arrangements or methods for the control of AC motors characterised by a control method other than vector control
- H02P23/16—Controlling the angular speed of one shaft
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P23/00—Arrangements or methods for the control of AC motors characterised by a control method other than vector control
- H02P23/22—Controlling the speed digitally using a reference oscillator, a speed proportional pulse rate feedback and a digital comparator
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P6/00—Arrangements for controlling synchronous motors or other dynamo-electric motors using electronic commutation dependent on the rotor position; Electronic commutators therefor
- H02P6/06—Arrangements for speed regulation of a single motor wherein the motor speed is measured and compared with a given physical value so as to adjust the motor speed
Definitions
- the present invention relates to a motor control device, an image forming apparatus that controls a motor that drives an image carrier by the motor control device, a motor control method, and a control method for the image forming apparatus.
- an electrophotographic image forming apparatus power supplied to a motor for driving a drum-shaped image carrier is adjusted, and thereby the rotational speed and the position (orientation) of the image carrier are controlled.
- the motor is controlled by feedback control that adjusts the supplied power in a direction in which a difference between a target position of the motor and a measurement position (detection position) of the motor is reduced.
- the target position is obtained by counting the edges of the reference pulse signal.
- the measurement position is obtained by counting the edges of the encoder pulse signal synchronized with the rotation of the motor.
- the encoder pulse signal is output by an encoder attached to the motor.
- the difference between the generation periods of the two pulse signals is used as a deviation in the feedback control of the motor.
- the deviation exceeds the generation period of one of the two pulse signals, information on the difference between the target position and the measurement position is lost. Therefore, if the difference between the target position and the measurement position becomes large when the speed of the motor is changed, such as when the motor is started and stopped, the position of the motor cannot be controlled.
- An object of the present invention is to provide a motor control device, an image forming apparatus, a motor control method, and an image forming apparatus control method capable of controlling the position of the motor with high accuracy even when the rotational speed of the motor is changed. It is in.
- a motor control device includes a target cycle recording unit, a measurement cycle recording unit, a phase error calculation unit, and a power adjustment unit.
- the target cycle recording unit outputs target cycle data representing an elapsed time from the previous generation of the reference pulse signal each time a reference pulse signal is generated in a first ring buffer having three or more first data buffers. Recording is sequentially performed on each of the first data buffers.
- the measurement cycle recording unit has the same number of measurement cycle data as the number of the first data buffers, each representing an elapsed time from the previous generation of the encoder pulse signal each time an encoder pulse signal synchronized with the rotation of the motor is generated. Are sequentially recorded in each of the second data buffers in the second ring buffer having the second data buffer.
- the phase error calculation unit includes the target cycle data and the measurement cycle data that are sequentially recorded in the first data buffer and the second data buffer corresponding to each other in the first ring buffer and the second ring buffer, respectively.
- the phase error is calculated by integrating the differences.
- the power adjusting unit adjusts the power supplied to the motor in a direction in which the phase error is reduced.
- a motor control device includes a target cycle recording unit, the measurement cycle recording unit, the phase error calculation unit, an error pulse count unit, a first power adjustment unit, and a second power. And an adjustment unit.
- the error pulse count unit counts error pulses of the encoder pulse signal with respect to the reference pulse signal.
- the first power adjustment unit adjusts the power supplied to the motor when the error pulse is less than the number of the first data buffers in a direction in which the phase error is reduced.
- the second power adjustment unit adjusts the power supplied to the motor when the error pulse is greater than or equal to the number of the first data buffers in a direction in which the error pulse decreases.
- An image forming apparatus includes an image carrier, a motor that drives the image carrier, an encoder, and the motor control device.
- the encoder outputs an encoder pulse signal synchronized with the rotation of the motor.
- the motor control device adjusts electric power supplied to the motor.
- a motor control method includes a target cycle recording step, a measurement cycle recording step, a phase error calculation step, and a power adjustment step.
- the target cycle recording step each time a reference pulse signal is generated, target cycle data representing an elapsed time from the previous generation of the reference pulse signal is stored in a first ring buffer having three or more first data buffers.
- the measurement cycle recording step every time an encoder pulse signal synchronized with the rotation of the motor is generated, measurement cycle data representing the elapsed time from the previous generation of the encoder pulse signal is the same as the number of the first data buffers. Recording in the second data buffer in the second ring buffer having the second data buffer.
- the target period data and the measurement period data sequentially recorded in the first data buffer and the second data buffer corresponding to each other in the first ring buffer and the second ring buffer, respectively.
- This is a step of calculating a phase error by integrating the differences.
- the power adjustment step is a step of adjusting the power supplied to the motor in a direction in which the phase error is reduced.
- the motor control method includes the target cycle recording step, the measurement cycle recording step, the phase error calculation step, the error pulse count step, the first power adjustment step, and the second power. Adjusting step.
- the error pulse counting step is a step of counting error pulses of the encoder pulse signal with respect to the reference pulse signal.
- the first power adjustment step is a step of adjusting the power supplied to the motor in a direction in which the phase error is reduced when the error pulse is less than the number of the first data buffers.
- the second power adjustment step is a step of adjusting the power supplied to the motor in a direction in which the error pulse decreases when the error pulse is equal to or greater than the number of the first data buffers.
- a method for controlling an image forming apparatus comprising: an image carrier; a motor that drives the image carrier; and an encoder that outputs an encoder pulse signal synchronized with the rotation of the motor.
- a method for controlling an apparatus In this control method, the electric power supplied to the motor is adjusted by the motor control method.
- a motor control device capable of controlling the position of the motor with high accuracy even when the rotational speed of the motor is changed. Is possible.
- FIG. 1 is a configuration diagram of an image forming apparatus according to the first embodiment of the present invention.
- FIG. 2 is a block diagram of the motor control device according to the first embodiment of the present invention.
- FIG. 3 is a block diagram of the phase comparison unit in the motor control device according to the first embodiment of the present invention.
- FIG. 4 is a diagram illustrating a memory map of the first ring buffer in the phase comparison unit of the motor control device according to the first embodiment of the present invention.
- FIG. 5 is a diagram illustrating a memory map of the second ring buffer in the phase comparison unit of the motor control device according to the first embodiment of the present invention.
- FIG. 6 is a diagram illustrating an example of a time chart of the reference pulse signal and the encoder pulse signal input by the phase comparison unit of the motor control device according to the first embodiment of the present invention.
- FIG. 7 is a block diagram of a motor control device according to the second embodiment of the present invention.
- FIG. 8 is a block diagram of a motor control device according to the third embodiment of the present invention.
- FIG. 9 is a diagram illustrating a memory map of the first ring buffer in the phase comparison unit of the motor control device according to the third embodiment of the present invention.
- FIG. 10 is a diagram illustrating a memory map of the second ring buffer in the phase comparison unit of the motor control device according to the third embodiment of the present invention.
- FIG. 11 is a diagram illustrating an example of a time chart of the reference pulse signal and the encoder pulse signal input by the phase comparison unit of the motor control device according to the third embodiment of the present invention.
- FIG. 12 is a diagram illustrating an example of a time chart of the reference pulse signal and the encoder pulse signal when the control mode of the motor control device according to the third embodiment of the present invention is switched from the first mode to the second mode.
- FIG. 13 is a diagram illustrating an example of a time chart of the reference pulse signal and the encoder pulse signal when the control mode of the motor control device according to the third embodiment of the present invention is switched from the second mode to the first mode.
- FIG. 14 is a block diagram of a motor control device according to the fourth embodiment of the present invention.
- the image forming apparatus 10 is an electrophotographic image forming apparatus. As shown in FIG. 1, the image forming apparatus 10 includes a sheet supply unit 2, a sheet conveying unit 3, an image forming unit 4, an optical scanning unit 5, a fixing device 6, and a control unit 8 in a housing 100.
- the image forming apparatus 10 is, for example, a printer, a copier, a facsimile machine, or a multifunction machine.
- the multifunction device is a device that has both the function of the printer and the function of the copier.
- the sheet supply unit 2 includes a sheet receiving unit 21 and a sheet sending unit 22.
- the sheet receiving portion 21 is configured to be able to stack a plurality of recording sheets 9.
- the recording sheet 9 is a sheet-like image forming medium such as paper, coated paper, postcard, envelope, and OHP sheet.
- the sheet feeding unit 22 rotates in contact with the recording sheet 9 to feed the recording sheet 9 from the sheet receiving unit 21 toward the conveyance path 30.
- the sheet conveyance unit 3 includes a registration roller 31, a conveyance roller 32, a discharge roller 33, and the like.
- the registration roller 31 and the conveyance roller 32 convey the recording sheet 9 supplied from the sheet supply unit 2 toward the image forming unit 4. Further, the discharge roller 33 discharges the recording sheet 9 after image formation from the discharge port of the transport path 30 onto the discharge tray 101.
- the image forming unit 4 forms an image on the surface of the recording sheet 9 which is supplied from the sheet sending unit 22 and is moving along the conveyance path 30.
- the image forming unit 4 includes a drum-shaped photoconductor 41, a charging unit 42, a developing unit 43, a transfer unit 45, a cleaning unit 47, a motor 40, a rotation driving mechanism 401, and the like.
- the photoreceptor 41 is an example of an image carrier.
- the photoconductor 41 rotates, and the charging unit 42 charges the surface of the photoconductor 41 uniformly.
- the charging roller 421 included in the charging unit 42 rotates to face the rotating photoconductor 41 to charge the photoconductor 41.
- the optical scanning unit 5 writes an electrostatic latent image on the photosensitive member 41 by laser light irradiation.
- the developing unit 43 includes a developing roller 431 that develops the electrostatic latent image by supplying a developer to the photoreceptor 41.
- the transfer unit 45 transfers the image (developer) on the surface of the photoreceptor 41 to the recording sheet 9 that is moving along the conveyance path 30. Finally, the cleaning unit 47 removes the developer remaining on the surface of the photoreceptor 41.
- the motor 40 drives the photosensitive member 41 and other rotating members arranged around it.
- the motor 40 is a drive source that drives the photoconductor 41, the charging roller 421, the developing roller 431, and the like.
- the rotation drive mechanism 401 is a gear mechanism or the like interlocking with the motor 40, and transmits the rotational force of the motor 40 to the photosensitive member 41 and other rotating members around it.
- the motor 40 is a servo motor, for example, a DC motor such as a DC brushless motor.
- An encoder 400 is attached to the motor 40.
- the encoder 400 outputs an encoder pulse signal Pe (see FIG. 2) that is a pulse signal synchronized with the rotation of the motor 40.
- the encoder pulse signal Pe is generated every time the motor 40 rotates by a unit angle.
- the unit angle is determined by the resolution of the encoder 400.
- the encoder pulse signal is input to the control unit 8.
- a heating roller 61 that encloses a heater 611 and a pressure roller 62 that faces the heater 611 send the recording sheet 9 on which an image is formed between them to a subsequent process. Accordingly, the fixing device 6 heats the developer on the recording sheet 9 and fixes the image on the recording sheet 9.
- the control unit 8 includes a motor control device 80 that controls the motor 40.
- the control unit 8 includes an MPU (Micro Processor Unit) for controlling devices other than the motor 40 included in the image forming apparatus 10, a memory, a signal interface, and the like.
- MPU Micro Processor Unit
- the motor control device 80 controls the rotational speed and the position (orientation) of the rotational direction of the motor 40 by adjusting the power supplied to the motor 40. That is, the motor control device 80 performs feedback control to adjust the supplied power in a direction in which the difference between the target position of the motor 40 and the measurement position (detection position) of the motor 40 is reduced.
- the target position is given as a reference pulse signal Ps (see FIG. 2) described later.
- the difference between the generation periods of two pulse signals (the reference pulse signal Ps and the encoder pulse signal Pe) is used as a deviation in the feedback control of the motor.
- the deviation exceeds the generation period of one of the two pulse signals, information on the difference between the target position and the measurement position is lost. Therefore, if the difference between the target position and the measurement position becomes large when the speed of the motor 40 is changed when the motor 40 is started and stopped, the position of the motor cannot be controlled.
- the motor control device 80 has a configuration shown below, and controls the position of the motor 40 in the rotational direction with high accuracy even when the rotational speed of the motor 40 is changed. Can do.
- the motor control device 80 includes a reference pulse generation unit 81, a phase comparison unit 82, and a motor power adjustment unit 83.
- the reference pulse generator 81 generates a reference pulse signal Ps that serves as a reference for a target position in the rotation direction of the motor 40.
- the reference pulse generator 81 includes a target speed calculator 811, a low-pass filter processor 812, and a voltage controlled oscillator 813.
- the target speed calculation unit 811 calculates a primary target speed Vx that is a rotation speed of the motor 40 necessary for operating the photoconductor 41 in accordance with a predetermined rule.
- the low-pass filter processing unit 812 performs low-pass filter processing on a signal having a level corresponding to the primary target speed Vx.
- the voltage controlled oscillator 813 generates the reference pulse signal Ps which is a pulse signal having a frequency corresponding to the signal of the secondary target speed Vy after the low pass filter process.
- the phase comparator 82 calculates a phase error PHE that is an integrated value of the phase difference between the reference pulse signal Ps and the encoder pulse signal Pe. Details of the phase comparator 82 will be described later.
- the motor power adjustment unit 83 adjusts the power supplied to the motor 40 in a direction in which the phase error PHE is reduced.
- the motor power adjustment unit 83 includes a proportional element amplifier 831, an integrator 832, an integration element amplifier 833, an adder 834, a pulse width modulation unit 835, and a motor drive circuit 836.
- the direction in which the phase error PHE is reduced can be said to be the direction in which the phase error PHE is converged to 0 or the direction in which the phase error PHE is eliminated.
- the proportional element amplifier 831 is an amplifier that generates a proportional control signal Xp that reflects the proportional element of the phase error PHE by amplifying a signal corresponding to the phase error PHE with a preset proportional gain.
- the integrator 832 performs an integration process on a signal corresponding to the phase error PHE.
- the integral element amplifier 833 generates an integral control signal Xi that reflects the integral element of the phase error PHE by amplifying a signal corresponding to the integral value of the phase error PHE with a preset integral gain. Amplifier.
- the adder 834 adds the proportional control signal Xp and the integral control signal Xi to generate a power supply amount signal Xo representing the magnitude of power supplied to the motor 40. That is, the proportional element amplifier 831, the integrator 832, the integral element amplifier 833, and the adder 834 are control units that adjust the power supplied to the motor 40 by so-called PI control.
- the pulse width modulation unit 835 performs pulse width modulation processing on the power supply amount signal Xo to generate a pulse width modulation signal Pc whose pulse width is adjusted at a duty ratio corresponding to the level of the power supply amount signal Xo. .
- the motor drive circuit 836 is a circuit that generates a drive pulse signal Pd that is a pulsed motor drive power signal synchronized with the pulse width modulation signal Pc.
- the drive pulse signal Pd is supplied to the motor 40.
- the pulse width modulation unit 835 has a duty ratio of the drive pulse signal Pd supplied to the motor 40 in accordance with an input signal (the power supply amount signal Xo) in which a proportional element and an integral element of the phase error PHE are reflected. Adjust the ratio. Thereby, the electric power supplied to the motor 40 is adjusted according to the phase error PHE.
- step of adjusting the power supplied to the motor 40 by the motor power adjustment unit 83 is an example of a power adjustment step.
- the step of adjusting the duty ratio of the drive pulse signal Pd by the pulse width modulation unit 835 is an example of the pulse width modulation step.
- a portion other than the motor drive circuit 836 in the motor control device 80 is configured by a combination of a microcomputer, an ASIC (Application Specific Integrated Circuit), other semiconductor devices, and other electronic circuits.
- ASIC Application Specific Integrated Circuit
- the various operations shown below can be realized not only by the microcomputer executing a program stored in advance in a memory but also by hardware such as a logic operation circuit.
- the phase comparison unit 82 includes a memory 820, a target cycle recording unit 821, a measurement cycle recording unit 822, and a phase error calculation unit 823.
- the memory 820 is a data storage medium accessed from each of the target cycle recording unit 821, the measurement cycle recording unit 822, and the phase error calculation unit 823.
- the data storage area of the memory 820 includes a first ring buffer 824 area and a second ring buffer 825 area.
- the first ring buffer 824 includes three or more data buffers.
- the second ring buffer 825 includes the same number of data buffers as the number of data buffers of the first ring buffer 824.
- the data buffer included in the first ring buffer 824 is referred to as a first data buffer 8240.
- the data buffer included in the second ring buffer 825 is referred to as a second data buffer 8250.
- FIG. 4 shows a memory map of the first ring buffer 824 having 16 first data buffers 8240 with buffer numbers 0 to 15.
- FIG. 5 shows a memory map of the second ring buffer 825 having 16 second data buffers 8250 with buffer numbers 0 to 15. 4 and 5, the buffer numbers 3 to 12 are omitted.
- the processing of the target cycle recording unit 821, the measurement cycle recording unit 822, and the phase error calculation unit 823 will be described in more detail with reference to the time chart of FIG.
- the example shown in FIG. 6 is an example in the case where the phase delay of the encoder pulse signal Pe with respect to the reference pulse signal Ps occurs.
- phase delay of the encoder pulse signal Pe with respect to the reference pulse signal Ps increases with time.
- the phase difference is reduced by the control of the motor control device 80.
- the target cycle recording unit 821 generates target cycle data Tref representing the elapsed time from the previous generation of the reference pulse signal Ps each time the reference pulse signal Ps is generated, in the first ring buffer 824. Data is sequentially recorded in each of the data buffers 8240. At this time, the target cycle recording unit 821 notifies the phase error calculation unit 823 of the number of the first data buffer 8240 in which the latest target cycle data Tref is recorded.
- the process in which the target period recording unit 821 calculates and records the target period data Tref is an example of the target period recording process.
- the target cycle recording unit 821 uses the target cycle data Tref determined at that time as the above-described target cycle data Tref. Recording is performed in each of the first data buffers 8240 having buffer numbers 0 to 5. Further, at each of the timings t1, t3, t5, t6, t8, and t10, the target cycle recording unit 821 has the numbers 0, 1, 2, and 3 of the first data buffer 8240 that is the data recording destination at each time point. , 4, 5 are notified to the phase error calculation unit 823.
- the i-th target cycle data Tref (i) recorded when the i-th reference pulse signal Ps (i) is generated is the (i-1) -th reference pulse signal Ps (i-1). This is data representing the elapsed time from the time of occurrence to the time of generation of the i-th reference pulse signal Ps (i).
- the target cycle data Tref (0) which is the initial value of the target cycle data, is the elapsed time from the start of processing until the first (0th) reference pulse signal Ps (0) is generated. is there.
- the measurement cycle recording unit 822 generates measurement cycle data Tenc representing the elapsed time from the previous generation of the encoder pulse signal Pe every time the encoder pulse signal Pe is generated, in the second ring buffer 825. Data is sequentially recorded in each data buffer 8250. At this time, the measurement cycle recording unit 822 notifies the phase error calculation unit 823 of the number of the second data buffer 8250 in which the latest measurement cycle data Tenc is recorded.
- the process in which the measurement cycle recording unit 822 calculates and records the measurement cycle data Tenc is an example of the measurement cycle recording process.
- the measurement cycle recording unit 822 uses the buffer number 0 as the measurement cycle data Tenc determined at that time. To No. 3 to the second data buffer 8250. Further, at each of timings t2, t4, t7, and t9, the measurement cycle recording unit 822 assigns the numbers 0, 1, 2, and 3 of the second data buffer 8250 that is the data recording destination at each time point to the phase error. The calculation unit 823 is notified.
- the j-th measurement cycle data Tenc (j) recorded when the j-th encoder pulse signal Pe (j) is generated has the (j ⁇ 1) -th encoder pulse signal Pe (j ⁇ 1). This is data representing the elapsed time from the time of occurrence to the time of occurrence of the j-th encoder pulse signal Pe (j).
- the measurement cycle data Tenc (0) which is the initial value of the measurement cycle data, is the elapsed time from the start of processing until the first (0th) encoder pulse signal Pe (0) is generated. is there.
- the target cycle data Tref (i) and the measurement cycle data Tenc (j) are numeric data in units of time such as milliseconds, for example, and numeric data representing the count-up number of a predetermined clock signal. It can be considered that.
- the phase error calculation unit 823 is configured to sequentially record the target period data Tref recorded in the first data buffer 8240 and the second data buffer 8250 corresponding to each other in the first ring buffer 824 and the second ring buffer 825, respectively.
- the phase error PHE is calculated by integrating the difference between the measurement cycle data Tenc.
- the first data buffer 8240 and the second data buffer 8250 correspond to each other in the same order in which the target cycle data Tref and the measurement cycle data Tenc are recorded.
- the phase error calculation unit 823 calculates the phase error PHE every time data is recorded in both the first ring buffer 824 and the second ring buffer 825 corresponding to each other.
- phase error calculation unit 823 performs the following (1 ) To calculate the (k + 1) -th phase error PHE (k + 1). However, the initial value of the phase error PHE (0) is zero.
- Equation (1) is an equation for accumulating the difference between the target cycle data Tref and the measurement cycle data Tenc that are sequentially recorded in the first data buffer 8240 and the second data buffer 8250 that correspond to each other.
- the phase error PHE that is an integrated value of the difference corresponds to an error (position error) of a measurement position with respect to a target position in the rotation direction of the motor 40.
- the phase error PHE can change within a range exceeding one period of the reference pulse signal Ps.
- phase error PHE (k + 1) calculated by the equation (1) When the phase error PHE (k + 1) calculated by the equation (1) is 0, the phase of the reference pulse signal Ps and the phase of the encoder pulse signal Pe match. When the value of the phase error PHE (k + 1) calculated by the equation (1) is a positive value, the phase of the reference pulse signal Ps is ahead of the phase of the encoder pulse signal Pe. When the value of the phase error PHE (k + 1) calculated by the equation (1) is a negative value, the phase of the reference pulse signal Ps is delayed from the phase of the encoder pulse signal Pe.
- the phase error calculation unit 823 notifies the number j from the measurement cycle recording unit 822.
- k j
- the (k + 1) -th phase error PHE (k + 1) is calculated.
- step of calculating the phase error PHE by the phase error calculation unit 823 is an example of a phase error calculation step.
- phase error calculation unit 823 applies the 0th target cycle data Tref (0) and the 0th measurement cycle data Tenc (0) to the equation (1) to thereby obtain the first phase error.
- PHE (1) is calculated.
- phase error calculation unit 823 applies the first target cycle data Tref (1) and the first measurement cycle data Tenc (1) to the equation (1), so that the second phase error is calculated.
- PHE (2) is calculated.
- phase error calculation unit 823 similarly calculates the third and fourth phase errors PHE (3) and PHE (4).
- the latest phase error PHE sequentially calculated as described above is input to the motor power adjustment unit 83. Accordingly, the motor power adjustment unit 83 adjusts the power supplied to the motor 40 in a direction in which the phase error PHE is reduced.
- the phase error PHE which is an integrated value of the difference between the generation periods of the reference pulse signal Ps and the encoder pulse signal Pe, is used as a deviation in feedback control of the motor 40. Therefore, even if the phase error PHE (deviation) is a time difference of less than one pulse, the power supplied to the motor 40 is adjusted in such a direction that the time difference disappears. Therefore, the resolution of position measurement based on the encoder pulse signal Pe does not become a restriction on control performance, and the position of the motor 40 can be controlled with high accuracy.
- the latest three or more target cycle data Tref and the measurement cycle data Tenc are stored in two ring buffers, respectively. Therefore, even if the phase difference (deviation) between the reference pulse signal Ps and the encoder pulse signal Pe exceeds the generation period of one of the two pulse signals, the correct phase error PHE is calculated.
- the phase difference between the two pulse signals is (N ⁇ 1) times the generation period of one of the two pulse signals. Even if it becomes, the information on the difference between the target position of the motor 40 and the measurement position is not lost. Therefore, even when the speed of the motor 40 is changed relatively large, such as when the motor 40 is started and stopped, that is, even when the difference between the target position and the measurement position becomes large, the position of the motor 40 Can be controlled correctly.
- the pulse width modulation unit 835 is supplied to the motor 40 in accordance with an input signal (the power supply amount signal Xo) reflecting a proportional element of the phase error PHE.
- the duty ratio of the pulse signal Pd is adjusted. Such control is effective as control for quickly reducing the phase error PHE.
- the pulse width modulation unit 835 further includes the drive pulse signal Pd supplied to the motor 40 in accordance with an input signal (the power supply amount signal Xo) that also reflects an integral element of the phase error PHE. Adjust the duty ratio. Thereby, it is possible to prevent an offset from occurring in the position control of the motor 40.
- FIG. 7 is a block diagram of the motor control device 80A.
- the same components as those shown in FIG. 2 are given the same reference numerals.
- differences of the motor control device 80A from the motor control device 80 will be described.
- the motor control device 80A has a configuration in which a target speed detection unit 84, an actual measurement level detection unit 85, a subtractor 86, a speed feedback control amplifier 87, and a feedforward control amplifier 88 are added to the configuration of the motor control device 80. Have.
- the target speed detector 84 detects (calculates) the target rotational speed of the motor 40 by calculating the reciprocal of the generation period of the reference pulse signal Ps.
- the actual measurement degree detection unit 85 detects (calculates) the actual rotational speed of the motor 40 by calculating the reciprocal of the generation period of the encoder pulse signal Pe.
- the subtractor 86 calculates a speed deviation that is a difference between the target rotation speed and the actual rotation speed.
- the speed feedback control amplifier 87 is an amplifier that generates a speed control signal that reflects the speed deviation by amplifying a signal corresponding to the speed deviation with a preset gain.
- the feedforward control amplifier 88 is an amplifier that amplifies a signal corresponding to the target rotation speed with a preset gain to generate a feedforward control signal in which an element of the change in the target rotation speed is reflected. is there.
- the speed control signal and the feedforward control signal are added together with the proportional control signal Xp and the integral control signal Xi by the adder 834 and reflected in the power supply amount signal Xo.
- the image forming apparatus has a configuration in which the motor control device 80 in the image forming device 10 is replaced with the motor control device 80A.
- the motor control device 80A performs feedback control and feedforward control based on the rotation speed of the motor 40 in parallel with feedback control based on the phase error PHE. Thereby, the phase error PHE can be reduced more quickly.
- the control unit 8 of the image forming apparatus 10 includes a motor control device 80 ⁇ / b> B that controls the motor 40 instead of the motor control device 80.
- the motor control device 80B includes a reference pulse generation unit 81, a phase comparison unit 82, a first power adjustment unit 83, an error pulse count unit 84, a second power adjustment unit 85, a signal selection unit 86, A motor drive signal generation unit 87 is provided.
- differences of the motor control device 80B from the motor control device 80 will be described.
- the reference pulse generator 81 generates the reference pulse signal Ps that serves as a reference for the target position in the rotation direction of the motor 40. Further, as described above, the phase comparator 82 calculates a phase error PHE that is a phase difference between the reference pulse signal Ps and the encoder pulse signal Pe (see FIG. 8).
- the first power adjustment unit 83 generates a first control signal X1 that is a control signal for adjusting the power supplied to the motor 40 in a direction in which the phase error PHE is reduced.
- the first power adjustment unit 83 includes a proportional element amplifier 831, an integrator 832, an integral element amplifier 833, and an adder 834.
- the proportional element amplifier 831 is an amplifier that generates a proportional control signal Xp that reflects the proportional element of the phase error PHE by amplifying a signal corresponding to the phase error PHE with a preset proportional gain.
- the integrator 832 performs an integration process on a signal corresponding to the phase error PHE.
- the integral element amplifier 833 generates an integral control signal Xi that reflects the integral element of the phase error PHE by amplifying a signal corresponding to the integral value of the phase error PHE with a preset integral gain. Amplifier.
- the adder 834 generates a first control signal X1 representing the magnitude of power supplied to the motor 40 by adding the proportional control signal Xp and the integral control signal Xi.
- the first control signal X1 is a signal indicating the magnitude of power supplied to the motor 40.
- the proportional element amplifier 831, the integrator 832, the integral element amplifier 833, and the adder 834 are control units that adjust the power supplied to the motor 40 by so-called PI control.
- the error pulse count unit 84 counts the error pulse EP of the encoder pulse signal Pe with respect to the reference pulse signal Ps.
- the error pulse EP is a difference in the number of occurrences of the encoder pulse signal Pe with respect to the number of occurrences of the reference pulse signal Ps.
- the error pulse EP is input to the second power adjustment unit 85 and the signal selection unit 86. Further, it is conceivable that the error pulse EP is input to the phase comparator 82.
- the error pulse EP is a parameter that represents the deviation of the measurement position with respect to the target position in the rotation direction of the motor 40 by the number of pulses.
- the error pulse EP is also referred to as a droop pulse or a deviation pulse.
- the process in which the error pulse counting unit 84 counts the error pulse EP is an example of an error pulse counting process.
- the second power adjustment unit 85 generates a second control signal X2 that is a control signal for adjusting the power supplied to the motor 40 in a direction in which the error pulse EP decreases.
- the second control signal X2 is a signal representing the magnitude of power supplied to the motor 40.
- the second power adjustment unit 85 is an amplifier that generates the second control signal X2 by amplifying a signal corresponding to the error pulse EP with a preset proportional gain.
- the signal selection unit 86 selects one of the first control signal X1 and the second control signal X2 according to the magnitude of the error pulse EP, and sends the selected signal to the motor drive signal generation unit 87 in the subsequent stage. Output.
- the signal selected by the signal selector 86 is referred to as a power supply amount signal Xo.
- the signal selector 86 is a so-called signal switch. A method by which the signal selection unit 86 selects a control signal based on the error pulse EP will be described later.
- the motor drive signal generator 87 supplies power to the motor 40 according to the power supply amount signal Xo.
- the motor drive signal generation unit 87 includes a low pass filter processing unit 871, a pulse width modulation unit 872, and a motor drive circuit 873.
- the low-pass filter processing unit 871 performs low-pass filter processing on the power supply amount signal Xo.
- the power supply amount signal Xo after the low-pass filter processing is input to the pulse width modulator 872.
- the low-pass filter processing unit 871 prevents a sudden change in the input signal of the pulse width modulation unit 872 when the selection state of the signal selection unit 86 changes.
- the pulse width modulation unit 872 performs pulse width modulation processing on the power supply amount signal Xo after the low-pass filter processing, and thereby the pulse width modulation whose pulse width is adjusted with a duty ratio corresponding to the level of the power supply amount signal Xo. A signal Pc is generated.
- the motor drive circuit 873 is a circuit that generates a drive pulse signal Pd, which is a pulsed motor drive power signal synchronized with the pulse width modulation signal Pc.
- the drive pulse signal Pd is supplied to the motor 40.
- control mode of the motor control device 80B when the signal selection unit 86 selects the first control signal X1 is referred to as a first mode.
- the control mode of the motor control device 80B when the signal selection unit 86 selects the second control signal X2 is referred to as a second mode.
- the pulse width modulator 872 causes the motor 40 to respond to an input signal (the first control signal X1) in which the proportional and integral elements of the phase error PHE are reflected.
- the duty ratio of the drive pulse signal Pd supplied to is adjusted.
- the power supplied to the motor 40 is adjusted in the direction in which the phase error PHE is reduced.
- the step of adjusting the duty ratio of the drive pulse signal Pd by the pulse width modulator 872 is an example of the pulse width modulation step.
- the pulse width modulation unit 872 causes the motor 40 to respond to an input signal (the second control signal X2) that reflects the magnitude of the error pulse EP.
- the duty ratio of the supplied drive pulse signal Pd is adjusted. As a result, the power supplied to the motor 40 is adjusted so that the error pulse EP decreases.
- the part other than the motor drive circuit 872 in the motor control device 80B is configured by a combination of a microcomputer, an ASIC (Application Specific Integrated Circuit), other semiconductor devices, and other electronic circuits.
- ASIC Application Specific Integrated Circuit
- the various operations shown below can be realized not only by the microcomputer executing a program stored in advance in a memory but also by hardware such as a logic operation circuit.
- the phase comparison unit 82 includes a memory 820, a target cycle recording unit 821, a measurement cycle recording unit 822, and a phase error calculation unit 823.
- the memory 820 is a data storage medium accessed from each of the target cycle recording unit 821, the measurement cycle recording unit 822, and the phase error calculation unit 823.
- the data storage area of the memory 820 includes a first ring buffer 824 area and a second ring buffer 825 area.
- the first ring buffer 824 includes three or more data buffers.
- the second ring buffer 825 includes the same number of data buffers as the number of data buffers of the first ring buffer 824.
- the data buffer included in the first ring buffer 824 is referred to as a first data buffer 8240.
- the data buffer included in the second ring buffer 825 is referred to as a second data buffer 8250.
- FIG. 9 shows a memory map of the first ring buffer 824 having four first data buffers 8240 with buffer numbers 0-3.
- FIG. 10 shows a memory map of the second ring buffer 825 having four second data buffers 8250 with buffer numbers 0 to 3.
- FIG. 11 is an example in the case where a phase delay of the encoder pulse signal Pe with respect to the reference pulse signal Ps occurs.
- the phase delay of the encoder pulse signal Pe with respect to the reference pulse signal Ps increases with the passage of time.
- the phase difference is reduced by the control of the motor control device 80B.
- the target cycle recording unit 821 generates target cycle data Tref representing the elapsed time from the previous generation of the reference pulse signal Ps each time the reference pulse signal Ps is generated, in the first ring buffer 824. Data is sequentially recorded in each of the data buffers 8240. At this time, the target cycle recording unit 821 notifies the phase error calculation unit 823 of the number of the first data buffer 8240 in which the latest target cycle data Tref is recorded.
- the process in which the target period recording unit 821 calculates and records the target period data Tref is an example of the target period recording process.
- the target period recording unit 821 uses the target period data Tref determined at that time as the above-described target period data Tref.
- the data is recorded in each of the first data buffers 8240 with buffer numbers 0, 1, 2, 3, 0, and 1.
- the target cycle recording unit 821 has the numbers 0, 1, 2, and 3 of the first data buffer 8240 that is the data recording destination at each time point. , 0, 1 are notified to the phase error calculator 823.
- the i-th target cycle data Tref (i) recorded when the i-th reference pulse signal Ps (i) is generated is the (i-1) -th reference pulse signal Ps (i-1). This is data representing the elapsed time from the time of occurrence to the time of generation of the i-th reference pulse signal Ps (i).
- the target cycle data Tref (0) which is the initial value of the target cycle data, is the elapsed time from the start of processing until the first (0th) reference pulse signal Ps (0) is generated. is there.
- the measurement cycle recording unit 822 generates measurement cycle data Tenc representing the elapsed time from the previous generation of the encoder pulse signal Pe every time the encoder pulse signal Pe is generated, in the second ring buffer 825. Data is sequentially recorded in each data buffer 8250. At this time, the measurement cycle recording unit 822 notifies the phase error calculation unit 823 of the number of the second data buffer 8250 in which the latest measurement cycle data Tenc is recorded.
- the process in which the measurement cycle recording unit 822 calculates and records the measurement cycle data Tenc is an example of the measurement cycle recording process.
- the measurement cycle recording unit 822 uses the buffer number 0 as the measurement cycle data Tenc determined at that time. To No. 3 to the second data buffer 8250. Further, at each of timings t2, t4, t7, and t9, the measurement cycle recording unit 822 assigns the numbers 0, 1, 2, and 3 of the second data buffer 8250 that is the data recording destination at each time point to the phase error. The calculation unit 823 is notified.
- the j-th measurement cycle data Tenc (j) recorded when the j-th encoder pulse signal Pe (j) is generated has the (j ⁇ 1) -th encoder pulse signal Pe (j ⁇ 1). This is data representing the elapsed time from the time of occurrence to the time of occurrence of the j-th encoder pulse signal Pe (j).
- the measurement cycle data Tenc (0) which is the initial value of the measurement cycle data, is the elapsed time from the start of processing until the first (0th) encoder pulse signal Pe (0) is generated. is there.
- the target cycle data Tref (i) and the measurement cycle data Tenc (j) are numeric data in units of time such as milliseconds, for example, and numeric data representing the count-up number of a predetermined clock signal. It can be considered that.
- the phase error calculation unit 823 is configured to sequentially record the target period data Tref recorded in the first data buffer 8240 and the second data buffer 8250 corresponding to each other in the first ring buffer 824 and the second ring buffer 825, respectively.
- the phase error PHE is calculated by integrating the difference between the measurement cycle data Tenc.
- the first data buffer 8240 and the second data buffer 8250 correspond to each other in the same order in which the target cycle data Tref and the measurement cycle data Tenc are recorded.
- the 0th, 1st, 2nd and 3rd first data buffers 8240 and the 0th, 1st, 2nd and 3rd second data buffers 8250 correspond to each other. Have a relationship.
- the phase error calculation unit 823 calculates the phase error PHE every time data is recorded in both the first ring buffer 824 and the second ring buffer 825 corresponding to each other.
- phase error calculation unit 823 records data in both the k-th (0-3) first ring buffer 824 and the second ring buffer 825
- the equation (1) shown above is used.
- the (k + 1) th phase error PHE (k + 1) can be calculated according to However, the initial value of the phase error PHE (0) is zero.
- the phase error calculation unit 823 performs the (k + 1) -th operation according to the following equation (2). It is also conceivable to calculate the phase error PHE (k + 1). However, g1 in the equation (2) is the number of pulses that the encoder pulse signal Pe is delayed with respect to the reference pulse signal Ps at the time of calculation. That is, the magnitude of the error pulse EP when the phase (position) of the encoder pulse signal Pe is delayed is g1.
- the phase error calculator 823 (k + 1) according to the following equation (3): It is also conceivable to calculate the th phase error PHE (k + 1).
- g2 in the equation (3) is the number of pulses that the encoder pulse signal Pe advances with respect to the reference pulse signal Ps at the time of calculation. That is, the magnitude of the error pulse EP when the phase (position) of the encoder pulse signal Pe is advanced is g2.
- Expressions (1), (2), and (3) are expressed by the target period data Tref and the measurement period data Tenc that are sequentially recorded in the first data buffer 8240 and the second data buffer 8250, respectively. This is an equation for integrating the differences.
- the phase error PHE that is an integrated value of the difference corresponds to an error (position error) of a measurement position with respect to a target position in the rotation direction of the motor 40.
- the phase error PHE can change within a range exceeding one period of the reference pulse signal Ps.
- phase of the reference pulse signal Ps matches the phase of the encoder pulse signal Pe.
- the value of the phase error PHE (k + 1) is a positive value
- the phase of the reference pulse signal Ps is ahead of the phase of the encoder pulse signal Pe.
- the value of the phase error PHE (k + 1) is a negative value
- the phase of the reference pulse signal Ps is delayed from the phase of the encoder pulse signal Pe.
- the phase error calculation unit 823 notifies the number j from the measurement cycle recording unit 822.
- k j
- the (k + 1) -th phase error PHE (k + 1) is calculated.
- step of calculating the phase error PHE by the phase error calculation unit 823 is an example of a phase error calculation step.
- the phase error calculation unit 823 applies the 0th target cycle data Tref (0) and the 0th measurement cycle data Tenc (0) to the equation (1) to thereby obtain the first phase error.
- PHE (1) is calculated.
- phase error calculation unit 823 applies the first target cycle data Tref (1) and the first measurement cycle data Tenc (1) to the equation (1), so that the second phase error is calculated.
- PHE (2) is calculated.
- phase error calculation unit 823 similarly calculates the third phase error PHE (3).
- the phase error calculation unit 823 calculates the 0th phase error PHE (0) again in the same manner.
- the latest phase error PHE sequentially calculated as described above is input to the first power adjustment unit 83. Further, when the control mode is the first mode, the first power adjustment unit 83 adjusts the power supplied to the motor 40 in a direction in which the phase error PHE is reduced.
- the phase error PHE that is an integrated value of the difference between the generation periods of the reference pulse signal Ps and the encoder pulse signal Pe is used as a deviation in feedback control of the motor 40. . Therefore, even if the phase error PHE (deviation) is a time difference of less than one pulse, the power supplied to the motor 40 is adjusted in such a direction that the time difference disappears. Therefore, the resolution of position measurement based on the encoder pulse signal Pe does not become a restriction on control performance, and the position of the motor 40 can be controlled with high accuracy.
- the latest three or more target cycle data Tref and the measurement cycle data Tenc are stored in two ring buffers 824 and 825, respectively. Therefore, even if the phase difference (deviation) between the reference pulse signal Ps and the encoder pulse signal Pe exceeds the generation period of one of the two pulse signals, the correct phase error PHE is calculated.
- the phase difference between the two pulse signals is (N ⁇ 1) times the generation period of one of the two pulse signals. Even if it becomes, the information on the difference between the target position of the motor 40 and the measurement position is not lost. Therefore, even when the speed of the motor 40 is changed relatively large, such as when the motor 40 is started and stopped, that is, even when the difference between the target position and the measurement position becomes large, the position of the motor 40 Can be controlled correctly.
- the pulse width modulation unit 871 is supplied to the motor 40 in accordance with an input signal (the power supply amount signal Xo) reflecting a proportional element of the phase error PHE.
- the duty ratio of the drive pulse signal Pd is adjusted. Such control is effective as control for quickly reducing the phase error PHE.
- the pulse width modulator 871 further includes the drive pulse signal Pd supplied to the motor 40 in accordance with an input signal (the power supply amount signal Xo) that also reflects the integral element of the phase error PHE. Adjust the duty ratio. Thereby, it is possible to prevent an offset from occurring in the position control of the motor 40.
- phase difference (the phase error PHE) between the reference pulse signal Ps and the encoder pulse signal Pe can be large when the motor 40 is started and stopped. Therefore, in the phase comparison unit 82, in order to prevent the situation where the difference information between the target position and the measurement position is lost more reliably, the number of data buffers in each of the two ring buffers 824 and 825 is increased. There is a need to.
- the capacity of the memory 820 be as small as possible in order to reduce the power consumption and cost of the motor control device 80B. Further, even when the phase error PHE becomes larger than expected, high robustness is required so that control can be surely converged.
- the motor control device 80B includes the error pulse count unit 84, the second power adjustment unit 85, and the signal selection unit 86. Accordingly, even if the number of data buffers in each of the two ring buffers 824 and 825 is small, the position control of the motor 40 can be reliably converged. This will be described below.
- the signal selection unit 86 selects the first control signal X1 when the error pulse EP is less than a predetermined threshold SL equal to or less than the number of the first data buffers 8240. As a result, the control mode becomes the first mode.
- the state in which the error pulse EP is less than the number of the first data buffers 8240 is a state in which information on the difference between the target position and the measurement position is not lost.
- the threshold SL may be equal to the number of the first data buffers 8240. However, the threshold value SL is 2 or more.
- the signal selection unit 86 selects the second control signal X2 when at least the error pulse EP is equal to or greater than the number of the first data buffers 8240.
- the state where the error pulse EP is equal to or greater than the number of the first data buffers 8240 is a state where information on the difference between the target position and the measurement position is lost.
- the signal selection unit 86 selects the second control signal X2 when the error pulse EP is equal to or greater than the threshold value SL. Thereby, the control mode becomes the second mode.
- the state where the error pulse EP is equal to or greater than the number of the first data buffers 8240 is a state where information on the difference between the target position and the measurement position is lost.
- the first power adjustment unit 83 adjusts the power supplied to the motor 40 when the error pulse EP is less than the number of the first data buffers 8240 so that the phase error PHE is reduced. Note that the step of adjusting the power supplied to the motor 40 by the first power adjustment unit 83 outputting the first control signal X1 is an example of a first power adjustment step.
- the second power adjustment unit 85 adjusts the power supplied to the motor 40 in a direction in which the error pulse EP decreases when the error pulse EP is equal to or greater than the number of the first data buffers 8240.
- the step of adjusting the power supplied to the motor 40 by the second power adjustment unit 85 outputting the second control signal X2 is an example of a second power adjustment step.
- FIG. 12 shows an example of a time chart of the reference pulse signal Ps and the encoder pulse signal Pe when the control mode of the motor control device 80B is switched from the first mode to the second mode.
- the target period recording unit 821 uses the target period data Tref determined at that time as the first period data. Records in each of the data buffers 8240. Similarly, at each of the rising edge timings t1, t3, t5, t8, and t10 of the encoder pulse signal Pe, the measurement cycle recording unit 822 sets the measurement cycle data Tenc determined at that time as the second data buffer 8250. Record each.
- phase (position) of the encoder pulse signal Pe is delayed with respect to the reference pulse signal Ps and the error pulse EP is 3 at the timing t1.
- the error pulse EP at each timing t3 and t5 is 3, which is the same as the error pulse EP at the timing t1.
- the error pulse EP is less than the threshold value SL, and the signal selection unit 86 selects the first control signal X1. Therefore, the control mode in the period from timing t1 to timing t5 is the first mode. Thereby, the motor 40 is controlled with high accuracy.
- the error pulse EP at the timing t8 is increased by one from the error pulse EP at the timing t5 to 4. Further, the error pulse EP at the timing t10 is 4, which is the same as the error pulse EP at the timing t8.
- the error pulse EP is equal to or greater than the threshold value SL, and the signal selector 86 selects the second control signal X2. Therefore, the control mode in the period from timing t8 to timing t10 is the second mode.
- the error pulse EP is equal to or greater than the number N of the first data buffers 8240. In this case, the difference information between the target position and the measurement position is lost in the two ring buffers 824 and 825. Therefore, feedback control in the second mode using the error pulse EP is performed. Thereby, the position of the motor can be converged to the target position based on the reference pulse signal Ps. Further, even when the phase error PHE becomes larger than expected, the control is surely converged and the robustness is improved.
- FIG. 13 shows that the control mode of the motor control device 80B is changed from the second mode to the first mode.
- An example of a time chart of the reference pulse signal Ps and the encoder pulse signal Pe when switching to a mode is shown.
- the target cycle recording unit 821 sets the target cycle data Tref determined at that time as the first data buffer. 8240 each.
- the measurement cycle recording unit 822 sets the measurement cycle data Tenc determined at that time as the second data buffer 8250. Record each.
- phase (position) of the encoder pulse signal Pe is delayed with respect to the reference pulse signal Ps and the error pulse EP is 4 at the timing t1.
- the error pulse EP at each timing t3 and t5 is 4, which is the same as the error pulse EP at the timing t1.
- the error pulse EP is equal to or greater than the threshold value SL, and the signal selector 86 selects the second control signal X2. Therefore, the control mode in the period from timing t1 to timing t5 is the second mode. Thereby, the motor 40 is controlled based on the error pulse EP.
- the error pulse EP at the timing t6 is reduced by one to 3 from the error pulse EP at the timing t5. Further, the error pulse EP at the timing t8 is 3, which is the same as the error pulse EP at the timing t6.
- the error pulse EP is less than the threshold value SL, and the signal selector 86 selects the first control signal X1. Therefore, the control mode in the period from timing t6 to timing t8 is the first mode.
- the error pulse EP is equal to or more than the number N of the first data buffers 8240. In this case, the difference information between the target position and the measurement position is lost in the two ring buffers 824 and 825. Therefore, feedback control in the second mode using the error pulse EP is performed. Thereby, the position of the motor can be converged to the target position based on the reference pulse signal Ps.
- the error pulse EP is less than the number N of the first data buffers 8240. Therefore, in the two ring buffers 824 and 825, information on the difference between the target position once lost and the measurement position is restored.
- phase error PHE reflecting the correct position information is calculated by applying the data recorded in the two ring buffers 824 and 825 to the above formula (2) or (3). Can do. Thereby, the position of the motor can be quickly converged to the target position based on the correct phase error PHE.
- the capacity of the two ring buffers 824 and 825 can be reduced, and as a result, the power consumption and cost of the motor control device 80B can be reduced.
- FIG. 14 is a block diagram of the motor control device 80C. 14, the same components as those shown in FIG. 8 are given the same reference numerals. Hereinafter, differences of the motor control device 80C from the motor control device 80B will be described.
- the motor control device 80C has a configuration in which a target speed detection unit 881, an actual speed detection unit 882, a subtractor 883, a speed feedback control amplifier 884, and a feedforward control amplifier 885 are added to the configuration of the motor control apparatus 80B. Have.
- the target speed detector 881 detects (calculates) the target rotational speed of the motor 40 by calculating the reciprocal of the generation period of the reference pulse signal Ps.
- the actual speed detector 882 detects (calculates) the actual rotation speed of the motor 40 by calculating the reciprocal of the generation period of the encoder pulse signal Pe.
- the subtracter 883 calculates a speed deviation which is a difference between the target rotation speed and the actual rotation speed.
- the speed feedback control amplifier 884 is an amplifier that generates a speed control signal reflecting the speed deviation by amplifying a signal corresponding to the speed deviation with a preset gain.
- the feedforward control amplifier 885 is an amplifier that generates a feedforward control signal in which an element of change in the target rotational speed is reflected by amplifying a signal corresponding to the target rotational speed with a preset gain. is there.
- the speed control signal and the feedforward control signal are added together with the proportional control signal Xp and the integral control signal Xi by the adder 834 and reflected in the first control signal X1.
- the image forming apparatus has a configuration in which the motor control device 80 in the image forming device 10 is replaced with the motor control device 80C.
- the motor control device 80C performs feedback control and feedforward control based on the rotation speed of the motor 40 in parallel with feedback control based on the phase error PHE. Thereby, the phase error PHE can be reduced more quickly.
- the motor control device, the image forming apparatus, the motor control method, and the image forming apparatus according to the present invention can be freely combined within the scope of the invention described in each claim.
- the embodiment and application examples may be modified as appropriate, or may be configured by omitting a part thereof.
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Abstract
Description
まず、図1を参照しつつ、本発明の第1実施形態に係る画像形成装置10の構成について説明する。前記画像形成装置10は、電子写真方式の画像形成装置である。図1が示すように、前記画像形成装置10は、筐体100内にシート供給部2、シート搬送部3、画像形成部4、光走査部5、定着装置6および制御部8などを備える。
次に、図2~6を参照しつつ、前記モーター制御装置80の詳細について説明する。図2が示すように、前記モーター制御装置80は、基準パルス生成部81、位相比較部82およびモーター電力調節部83を備える。
次に、図7を参照しつつ、本発明の第2実施形態に係るモーター制御装置80Aについて説明する。図7は、前記モーター制御装置80Aのブロック図である。図7において、図2に示される構成要素と同じ構成要素は、同じ参照符号が付されている。以下、前記モーター制御装置80Aにおける前記モーター制御装置80と異なる点について説明する。
次に、図8~10を参照しつつ、第3実施形態に係る前記モーター制御装置80Bの詳細について説明する。本実施形態において、前記画像形成装置10の前記制御部8が、前記モーター制御装置80の代わりに前記モーター40を制御するモーター制御装置80Bを含む。図8が示すように、前記モーター制御装置80Bは、基準パルス生成部81、位相比較部82、第1電力調節部83、誤差パルスカウント部84、第2電力調節部85、信号選択部86、モーター駆動信号生成部87を備える。以下、前記モーター制御装置80Bにおける前記モーター制御装置80と異なる点について説明する。
前記信号選択部86は、前記誤差パルスEPが前記第1データバッファー8240の数以下の予め定められたしきい値SL未満であるときに、前記第1制御信号X1を選択する。これにより、前記制御モードが前記第1モードになる。前記誤差パルスEPが前記第1データバッファー8240の数未満である状態は、前記目標位置と前記計測位置との差分の情報が失われない状態である。例えば、前記しきい値SLが前記第1データバッファー8240の数と等しいことが考えられる。但し、前記しきい値SLは2以上である。
以下、図12を参照しつつ、前記制御モードが前記第1モードから前記第2モードへ切り替わるときの具体例について説明する。以下に示す例は、前記第1データバッファー8240の数Nおよび前記しきい値SLはともに4である。
続いて、図13を参照しつつ、前記制御モードが前記第2モードから前記第1モードへ切り替わるときの具体例について説明する。以下に示す例は、前記第1データバッファー8240の数Nおよび前記しきい値SLはともに4である。
モードへ切り替わるときの前記基準パルス信号Psおよび前記エンコーダーパルス信号Peのタイムチャートの一例を表す。
次に、図14を参照しつつ、本発明の第4実施形態に係るモーター制御装置80Cについて説明する。図14は、前記モーター制御装置80Cのブロック図である。図14において、図8に示される構成要素と同じ構成要素は、同じ参照符号が付されている。以下、前記モーター制御装置80Cにおける前記モーター制御装置80Bと異なる点について説明する。
前記モーター制御装置80,80A,80B,80Cにおいて、前記積分器832および前記積分要素増幅器833が省略されることも考えられなくはない。
Claims (10)
- 基準パルス信号が発生するごとに前回の前記基準パルス信号の発生時からの経過時間を表す目標周期データを、3つ以上の第1データバッファーを有する第1リングバッファーにおける前記第1データバッファー各々に順次記録する目標周期記録部と、
モーターの回転に同期したエンコーダーパルス信号が発生するごとに前回の前記エンコーダーパルス信号の発生時からの経過時間を表す計測周期データを、前記第1データバッファーの数と同数の第2データバッファーを有する第2リングバッファーにおける前記第2データバッファー各々に順次記録する計測周期記録部と、
前記第1リングバッファーおよび前記第2リングバッファーにおける相互に対応する前記第1データバッファーおよび前記第2データバッファー各々に順次記録される前記目標周期データおよび前記計測周期データの差分を積算することにより位相誤差を算出する位相誤差算出部と、
前記モーターに供給する電力を前記位相誤差が縮小する方向へ調節する電力調節部と、を備えるモーター制御装置。 - 前記電力調節部は、少なくとも前記位相誤差の比例要素が反映される入力信号に応じて前記モーターに供給される駆動パルス信号のデューティー比を調節するパルス幅変調部を有する、請求項1に記載のモーター制御装置。
- 像担持体と、
前記像担持体を駆動するモーターと、
前記モーターの回転に同期したエンコーダーパルス信号を出力するエンコーダーと、
前記モーターに供給する電力を調節する請求項1に記載のモーター制御装置と、を備える画像形成装置。 - 基準パルス信号が発生するごとに前回の前記基準パルス信号の発生時からの経過時間を表す目標周期データを、3つ以上の第1データバッファーを有する第1リングバッファーにおける前記第1データバッファー各々に順次記録する目標周期記録工程と、
モーターの回転に同期したエンコーダーパルス信号が発生するごとに前回の前記エンコーダーパルス信号の発生時からの経過時間を表す計測周期データを、前記第1データバッファーの数と同数の第2データバッファーを有する第2リングバッファーにおける前記第2データバッファー各々に順次記録する計測周期記録工程と、
前記第1リングバッファーおよび前記第2リングバッファーにおける相互に対応する前記第1データバッファーおよび前記第2データバッファー各々に順次記録される前記目標周期データおよび前記計測周期データの差分を積算することにより位相誤差を算出する位相誤差算出工程と、
前記モーターに供給する電力を前記位相誤差が縮小する方向へ調節する電力調節工程と、を含むモーター制御方法。 - 像担持体と、前記像担持体を駆動するモーターと、前記モーターの回転に同期したエンコーダーパルス信号を出力するエンコーダーとを備える画像形成装置の制御方法であって、
前記モーターに供給する電力を調節する工程が、
基準パルス信号が発生するごとに前回の前記基準パルス信号の発生時からの経過時間を表す目標周期データを、3つ以上の第1データバッファーを有する第1リングバッファーにおける前記第1データバッファー各々に順次記録する目標周期記録工程と、
モーターの回転に同期したエンコーダーパルス信号が発生するごとに前回の前記エンコーダーパルス信号の発生時からの経過時間を表す計測周期データを、前記第1データバッファーの数と同数の第2データバッファーを有する第2リングバッファーにおける前記第2データバッファー各々に順次記録する計測周期記録工程と、
前記第1リングバッファーおよび前記第2リングバッファーにおける相互に対応する前記第1データバッファーおよび前記第2データバッファー各々に順次記録される前記目標周期データおよび前記計測周期データの差分を積算することにより位相誤差を算出する位相誤差算出工程と、
前記モーターに供給する電力を前記位相誤差が縮小する方向へ調節する電力調節工程と、と含む、画像形成装置の制御方法。 - 基準パルス信号が発生するごとに前回の前記基準パルス信号の発生時からの経過時間を表す目標周期データを、3つ以上の第1データバッファーを有する第1リングバッファーにおける前記第1データバッファー各々に順次記録する目標周期記録部と、
モーターの回転に同期したエンコーダーパルス信号が発生するごとに前回の前記エンコーダーパルス信号の発生時からの経過時間を表す計測周期データを、前記第1データバッファーの数と同数の第2データバッファーを有する第2リングバッファーにおける前記第2データバッファー各々に順次記録する計測周期記録部と、
前記第1リングバッファーおよび前記第2リングバッファーにおける相互に対応する前記第1データバッファーおよび前記第2データバッファー各々に順次記録される前記目標周期データおよび前記計測周期データの差分を積算することにより位相誤差を算出する位相誤差算出部と、
前記基準パルス信号に対する前記エンコーダーパルス信号の誤差パルスをカウントする誤差パルスカウント部と、
前記誤差パルスが前記第1データバッファーの数未満であるときに前記モーターに供給する電力を前記位相誤差が縮小する方向へ調節する第1電力調節部と、
前記誤差パルスが前記第1データバッファーの数以上であるときに前記モーターに供給する電力を前記誤差パルスが減少する方向へ調節する第2電力調節部と、を備えるモーター制御装置。 - 前記第1電力調節部は、少なくとも前記位相誤差の比例要素が反映される入力信号に応じて前記モーターに供給される駆動パルス信号のデューティー比を調節するパルス幅変調部を有する、請求項6に記載のモーター制御装置。
- 像担持体と、
前記像担持体を駆動するモーターと、
前記モーターの回転に同期したエンコーダーパルス信号を出力するエンコーダーと、
前記モーターに供給する電力を調節する請求項6に記載のモーター制御装置と、を備える画像形成装置。 - 基準パルス信号が発生するごとに前回の前記基準パルス信号の発生時からの経過時間を表す目標周期データを、3つ以上の第1データバッファーを有する第1リングバッファーにおける前記第1データバッファー各々に順次記録する目標周期記録工程と、
モーターの回転に同期したエンコーダーパルス信号が発生するごとに前回の前記エンコーダーパルス信号の発生時からの経過時間を表す計測周期データを、前記第1データバッファーの数と同数の第2データバッファーを有する第2リングバッファーにおける前記第2データバッファー各々に順次記録する計測周期記録工程と、
前記第1リングバッファーおよび前記第2リングバッファーにおける相互に対応する前記第1データバッファーおよび前記第2データバッファー各々に順次記録される前記目標周期データおよび前記計測周期データの差分を積算することにより位相誤差を算出する位相誤差算出工程と、
前記基準パルス信号に対する前記エンコーダーパルス信号の誤差パルスをカウントする誤差パルスカウント工程と、
前記誤差パルスが前記第1データバッファーの数未満であるときに前記モーターに供給する電力を前記位相誤差が縮小する方向へ調節する第1電力調節工程と、
前記誤差パルスが前記第1データバッファーの数以上であるときに前記モーターに供給する電力を前記誤差パルスが減少する方向へ調節する第2電力調節工程と、を含むモーター制御方法。 - 像担持体と、前記像担持体を駆動するモーターと、前記モーターの回転に同期したエンコーダーパルス信号を出力するエンコーダーとを備える画像形成装置の制御方法であって、
前記モーターに供給する電力を調節する工程が、
基準パルス信号が発生するごとに前回の前記基準パルス信号の発生時からの経過時間を表す目標周期データを、3つ以上の第1データバッファーを有する第1リングバッファーにおける前記第1データバッファー各々に順次記録する目標周期記録工程と、
モーターの回転に同期したエンコーダーパルス信号が発生するごとに前回の前記エンコーダーパルス信号の発生時からの経過時間を表す計測周期データを、前記第1データバッファーの数と同数の第2データバッファーを有する第2リングバッファーにおける前記第2データバッファー各々に順次記録する計測周期記録工程と、
前記第1リングバッファーおよび前記第2リングバッファーにおける相互に対応する前記第1データバッファーおよび前記第2データバッファー各々に順次記録される前記目標周期データおよび前記計測周期データの差分を積算することにより位相誤差を算出する位相誤差算出工程と、
前記基準パルス信号に対する前記エンコーダーパルス信号の誤差パルスをカウントする誤差パルスカウント工程と、
前記誤差パルスが前記第1データバッファーの数未満であるときに前記モーターに供給する電力を前記位相誤差が縮小する方向へ調節する第1電力調節工程と、
前記誤差パルスが前記第1データバッファーの数以上であるときに前記モーターに供給する電力を前記誤差パルスが減少する方向へ調節する第2電力調節工程と、を含む、画像形成装置の制御方法。
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