WO2015196593A1 - Array substrate, manufacturing method therefor and display apparatus - Google Patents

Array substrate, manufacturing method therefor and display apparatus Download PDF

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Publication number
WO2015196593A1
WO2015196593A1 PCT/CN2014/087020 CN2014087020W WO2015196593A1 WO 2015196593 A1 WO2015196593 A1 WO 2015196593A1 CN 2014087020 W CN2014087020 W CN 2014087020W WO 2015196593 A1 WO2015196593 A1 WO 2015196593A1
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region
conductive film
photoresist
film
array substrate
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PCT/CN2014/087020
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French (fr)
Chinese (zh)
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李旭远
成军
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京东方科技集团股份有限公司
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401—Multistep manufacturing processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725—Source or drain electrodes for field effect devices
    • H01L29/41733—Source or drain electrodes for field effect devices for thin film transistors with insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film

Definitions

  • Embodiments of the present invention relate to an array substrate, a method of fabricating the same, and a display device.
  • the display device needs to be provided with a Thin Film Transistor (TFT) on the array substrate to realize screen display.
  • TFT Thin Film Transistor
  • the TFT disposed on the array substrate may be an oxide TFT having a high mobility and a good uniformity in a large size range, that is,
  • the material of the active layer is an oxide TFT.
  • a method for fabricating an array substrate including an oxide TFT includes: forming an active layer of a TFT on a substrate, wherein a material of the active layer is an oxide; and depositing a data line on the active layer And a conductive film of the source and the drain of the TFT; etching the conductive film with an etching solution to form the data line and the source and drain of the TFT.
  • the etching liquid contacts the active layer of the material oxide, and the oxide is etched.
  • the liquid is sensitive, so the performance of the fabricated TFT is relatively poor.
  • an etch stop layer is generally formed on the active layer, such that the etch stop layer and the conductive film are disposed adjacent to each other, and the conductive film is etched.
  • the etching solution only contacts the etch barrier layer without contacting the active layer, thereby ensuring that the fabricated TFT has better performance.
  • At least one embodiment of the present invention provides an array substrate, a method of fabricating the same, and a display device for solving the need for the etchant to contact the active layer during etching of the conductive film.
  • An etch barrier layer is disposed between the active layer and the conductive film, thereby increasing the thickness of the array substrate.
  • At least one embodiment of the present invention provides a method of fabricating an array substrate, comprising: depositing a conductive film for forming a source, a drain, and a data line on a substrate having an active layer; the conductive thin a surface of the film is divided into a first region corresponding to the source, a second region corresponding to the drain, a third region corresponding to the data line, and a first region, a second region, and a third region a fourth region other than the fourth region; converting the conductive film of the fourth region into a non-conductive film; and using the conductive film of the first region as the source and the conductive film of the second region as The drain is a conductive film of the third region as the data line.
  • At least one embodiment of the present invention provides an array substrate, wherein the array substrate is fabricated by the method for fabricating an array substrate according to an embodiment of the present invention.
  • At least one embodiment of the present invention provides a display device, wherein the display device includes the array substrate provided by the embodiment of the present invention.
  • FIG. 1 is a schematic flow chart of a method for fabricating an array substrate according to an embodiment of the invention
  • FIGS. 2A-2F are schematic structural views of an array substrate according to an embodiment of the invention.
  • a method for fabricating an array substrate according to at least one embodiment of the present invention includes the following steps:
  • Step 101 depositing a conductive film for forming a source, a drain, and a data line on a substrate on which an active layer is formed;
  • Step 102 The surface of the conductive film is divided into a first region corresponding to the source, a second region corresponding to the drain, a third region corresponding to the data line, and a first region, a fourth region other than the second region and the third region; converting the conductive film of the fourth region into a non-conductive film; and, using the conductive film of the first region as the source, A conductive film of the two regions serves as the drain, and a conductive film of the third region is used as the data line.
  • patterning of the source, drain, and data lines is achieved by converting the conductive film of the fourth region into a non-conductive film; that is, the conductive film is not required. Patterning the source, drain, and data lines by performing a wet etching process, thereby eliminating the need to provide an etch barrier between the active layer and the conductive film;
  • the thickness of the array substrate further reduces the volume of the display device including the array substrate; in addition, since the process steps are saved, the production efficiency of the array substrate can be improved, and the fabrication cost of the array substrate can be reduced.
  • the manufacturing method before the step 101, further includes: forming a gate and a gate line on the substrate; forming a gate insulating layer on the film layer where the gate and the gate line are located; An active layer is formed on the gate insulating layer.
  • the manner in which the gate and the gate lines are formed on the base substrate in the embodiment of the present invention may employ a known technique.
  • forming a gate and a gate line on a base substrate includes: depositing a gate metal layer on the base substrate by sputtering or thermal evaporation; etching the gate metal layer by etching A gate and a gate line are formed on the base substrate.
  • the base substrate is a transparent glass substrate or quartz.
  • the thickness of the gate metal layer ranges from
  • the material of the gate metal layer includes a metal of Cr (chromium), W (tungsten), Ti (titanium), Ta (germanium), Mo (molybdenum), Al (aluminum), Nd (germanium), and Cu (copper) or One of the alloys.
  • the gate metal layer may be one or more layers.
  • a gate insulating layer is formed on the film layer where the gate and the gate line are located, including: by plasma enhanced chemical vapor deposition (PECVD)
  • PECVD plasma enhanced chemical vapor deposition
  • a vapor deposition method is to form a gate insulating layer on a film layer on which a gate electrode and a gate line are located.
  • the thickness of the gate insulating layer ranges from
  • the reaction gas corresponding to the gate insulating layer may be a mixed gas of SiH 4 (silane), NH 3 (ammonia gas) and N 2 , or a mixture of SiH 2 Cl 2 (dichlorosilane), NH 3 and N 2 .
  • the gas, the material of the gate insulating layer includes one of an oxide (for example, silicon dioxide), a nitride (for example, a nitride of silicon), and an oxynitride compound.
  • forming an active layer on the gate insulating layer includes: depositing an active thin film on the gate insulating layer by sputtering or thermal evaporation; The film is etched to form the active layer.
  • the material of the active film includes one of a semiconductor material and an oxide.
  • the semiconductor material includes one of amorphous silicon, polycrystalline silicon, and single crystal silicon.
  • the oxide is a metal oxide such as ZnO (zinc oxide), IGZO (indium gallium zinc oxide), ITZO (indium tin zinc oxide), or HIZO (indium zinc oxide).
  • ZnO zinc oxide
  • IGZO indium gallium zinc oxide
  • ITZO indium tin zinc oxide
  • HIZO indium zinc oxide
  • the active film may be one or more layers.
  • a conductive film for forming a source, a drain, and a data line is deposited on a substrate having an active layer on the surface layer, including: using a sputtering method, The conductive film is deposited on the substrate of the source layer.
  • the conductive film may be any film known to be electrically conductive.
  • the material of the electroconductive thin film includes one of a metal or an alloy of Cr, W, Ti, Ta, Nd, Mo, Al, and Cu.
  • the material of the conductive film may further include a non-metal conductive material such as graphene.
  • the conductive film may be a single layer or a plurality of layers.
  • any of the embodiments capable of converting the conductive film of the fourth region into a non-conductive film is applicable to the embodiment of the present invention.
  • the conductive film of the fourth region needs to be processed to be converted into a non-conductive film; in addition, in order to realize only the conductive film of the fourth region After the treatment, the conductive film of the first region, the second region and the third region may be blocked, but after the conductive film of the fourth region is exposed, the conductive film of the fourth region is processed.
  • any one of the first region, the second region, and the third region can be blocked.
  • Embodiments of the conductive film of the region, but exposing the conductive film of the fourth region, are all applicable to the embodiments of the present invention.
  • a mask for fabricating the source, drain, and data lines is placed on the conductive film, and a light-transmitting region of the mask corresponds to the fourth region; or, in the conductive film
  • a shielding member is disposed on the first region, the second region, and the third region, and the shielding member may be any component that functions as a shielding, such as a photoresist.
  • step 102 converting the conductive film of the fourth region into a non-conductive film, for example, may be performed by coating a photoresist on the conductive film, and coating the light Engraving and exposing the photoresist to retain the photoresist of the first region, the second region, and the third region, and removing the photoresist of the fourth region; and performing the conductive film on the fourth region Processing to convert the conductive film of the fourth region into a non-conductive film.
  • the conductive film covering the first region, the second region and the third region can be realized, and the conductive film of the fourth region is exposed; Compared with other shielding members, etching treatment is not required, thereby reducing the complexity of converting the conductive film of the fourth region into a non-conductive film.
  • the photoresist on the conductive film and the first region, the second region, and the third region are in close contact with the conductive films of the first region, the second region, and the third region, and can When the conductive film of the fourth region is processed, the conductive film that affects the first region, the second region, and the third region is largely avoided.
  • the photoresist is subjected to an exposure and development process to retain the photoresist of the first region, the second region, and the third region, and to remove the photoresist of the fourth region, for example,
  • the photoresist may be exposed to light by using a mask; when the photoresist is a positive photoresist, the transparent region of the mask corresponds to the fourth region; When the photoresist is a negative photoresist, the opaque region of the mask corresponds to the fourth region; and the exposed photoresist is developed to retain the first a photoresist of a region, a second region, and a third region, and removing the photoresist of the fourth region.
  • the method of processing the conductive film of the fourth region to convert it into a non-conductive film is also different; for example, the material of the conductive film is In the case of graphene, the conductive film of the fourth region can be converted into a non-conductive film after a physical reaction occurs.
  • the conductive film is a metal film; conductive to the fourth region Processing the film to convert the conductive film of the fourth region into a non-conductive film, comprising: generating a plasma of an oxidizing gas on a surface of the substrate on which the photoresist is formed, and causing a plasma of the oxidizing gas
  • the conductive film of the fourth region is chemically reacted to form a non-conductive metal compound film; wherein the oxidizing gas includes one of oxygen, nitrogen monoxide and nitrous oxide.
  • the plasma of the oxidizing gas chemically reacts with the exposed conductive film of the fourth region to form a non-conductive metal compound film to convert the conductive film of the fourth region into a non-conductive film.
  • any of the embodiments capable of realizing plasma generating an oxidizing gas on the surface of the substrate on which the photoresist is formed is applicable to the embodiment of the present invention.
  • the substrate on which the photoresist is formed is placed in a cavity of a dry etching apparatus or a PECVD apparatus, and an oxidation reaction is generated on the surface of the substrate on which the photoresist is formed by the dry etching apparatus or the PECVD apparatus.
  • the plasma of the gas is performed by the dry etching apparatus or the PECVD apparatus.
  • the rate and degree of chemical reaction of the plasma of the oxidizing gas with the conductive film of the fourth region can be controlled by controlling the deposition power, concentration, and temperature of the plasma of the oxidizing gas.
  • the temperature inside the chamber of the apparatus that generates the plasma of the oxidizing gas is not more than 200 °C.
  • the temperature in the chamber of the apparatus that produces the plasma of the oxidizing gas is room temperature.
  • the conductive film may be any metal film.
  • the conductive film is an aluminum film
  • the oxidizing gas further includes nitrogen.
  • the metal aluminum has relatively high conductivity, and when the conductive film is an aluminum film, the conductivity of the produced source, drain and data lines can be enhanced.
  • the method further includes: removing the first region, the second region, and the first Three-region photoresist.
  • removing the photoresist of the first region, the second region, and the third region can reduce the thickness of the fabricated array substrate, and further reduce the volume of the display device including the array substrate.
  • the method further includes: forming a passivation layer covering the source, the drain, and the data line; etching away the passivation layer corresponding to the drain to form the exposed a via hole of the drain; a pixel electrode electrically connected to the drain through the via hole is formed on the passivation layer.
  • forming a passivation layer covering the source, drain, and data lines includes forming a passivation layer covering the source, drain, and data lines by a PECVD method.
  • the thickness of the passivation layer is the thickness of the passivation layer.
  • the reaction gas corresponding to the passivation layer may be a mixed gas of SiH 4 , NH 3 and N 2 , or a mixed gas of SiH 2 Cl 2 , NH 3 and N 2
  • the material of the passivation layer includes an oxide (for example, Silica), one of a nitride (such as a nitride of silicon) or an oxygen-nitrogen compound.
  • the passivation layer may be one layer or multiple layers.
  • a transparent conductive layer is deposited on the passivation layer by sputtering or thermal evaporation; the transparent conductive layer is etched to form a pixel electrode electrically connected to the drain through the via hole in the pixel region.
  • the thickness of the transparent conductive layer ranges from
  • the material of the transparent conductive layer includes one or more of indium tin oxide, indium zinc oxide, and aluminum zinc oxide.
  • the method for fabricating the array substrate of the embodiment of the present invention includes the following steps.
  • Step 1 as shown in FIG. 2A, forming a gate electrode 11 and a gate line 12 on a substrate substrate (not shown in FIG. 2A);
  • Step 2 forming a gate insulating layer on the film layer where the gate and the gate line are located;
  • Step 3 as shown in FIG. 2B, forming an active layer 20 on the gate insulating layer (not shown in FIG. 2B);
  • Step 4 depositing an Al metal thin film 100 for forming a source, a drain, and a data line on the active layer 20;
  • Step 5 dividing a surface of the Al metal thin film 100 into a first region corresponding to the source, a second region corresponding to the drain, a third region corresponding to the data line, and a fourth area outside the area, the second area and the third area;
  • Step 6 Applying a photoresist on the Al metal film, and exposing and developing the photoresist to retain the photoresist of the first region, the second region, and the third region, and Removing the photoresist of the fourth region;
  • Step 7 generating an oxygen (O 2 ) plasma on the surface of the substrate on which the photoresist is formed, and chemically reacting the O 2 plasma with the Al metal thin film in the fourth region to form a non-conductive Al. 2 O 3 (alumina) film;
  • O 2 oxygen
  • Step 8 removing the photoresist of the first region, the second region, and the third region;
  • Step 9 As shown in FIG. 2D, the Al metal thin film 100 of the first region is used as the source 31, and the Al metal thin film 100 of the second region is used as the drain 32, and the third a region of the Al metal thin film 100 as the data line 33, the source 31 and the data line 33 are connected to each other;
  • the fourth region of the non-conductive Al 2 O 3 film 200 effects patterning of the source 31, the drain 32, and the data line 33.
  • Step 10 forming a passivation layer covering the source, the drain, and the data line;
  • Step 11 as shown in FIG. 2E, etching away the passivation layer corresponding to the drain corresponding position (not shown in FIG. 2E) to form a via hole 40 exposing the drain;
  • Step 12 as shown in FIG. 2F, a pixel electrode 50 electrically connected through the via 40 and the drain 32 is formed on the passivation layer (not shown in FIG. 2F).
  • At least one embodiment of the present invention provides an array substrate fabricated by the method for fabricating an array substrate according to the embodiment of the present invention.
  • the array substrate fabricated by the method for fabricating an array substrate provided by at least one embodiment of the present invention does not include an etch barrier layer between the active layer and a film layer between a source, a drain, and a data line. Therefore, the method reduces the thickness of the array substrate, and further reduces the volume of the display device including the array substrate.
  • At least one embodiment of the present invention provides a display device including the array substrate.
  • the volume of the display device including the array substrate of at least one embodiment of the present invention is reduced.
  • the display device may be: a liquid crystal panel, an electronic paper, an OLED (Organic Light Emitting Diode) panel, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, etc., having any display function. Product or part.
  • OLED Organic Light Emitting Diode

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Abstract

An array substrate, a manufacturing method therefor and a display apparatus. The manufacturing method comprises: depositing a conductive thin film (100) used for forming a source electrode (31), a drain electrode (32) and a data line (33) on a substrate on which an active layer (20) is formed; dividing a surface of the conductive thin film (100) into a first area corresponding to the source electrode (31), a second area corresponding to the drain electrode (32), a third area corresponding to the data line (33) and a fourth area except the first area, the second area and the third area; converting the conductive thin film in the fourth area into a non-conductive thin film (200); and taking the conductive thin film in the first area as the source electrode (31), the conductive thin film in the second area as the drain electrode (32), and the conductive thin film in the third area as the data line (33).

Description

阵列基板及其制作方法、以及显示装置Array substrate, manufacturing method thereof, and display device 技术领域Technical field
本发明的实施例涉及一种阵列基板及其制作方法、以及显示装置。Embodiments of the present invention relate to an array substrate, a method of fabricating the same, and a display device.
背景技术Background technique
显示装置需要在阵列基板上设置薄膜晶体管(Thin Film Transistor，TFT)来驱动，以实现画面显示。目前，对于高解析度、大尺寸和高帧频的显示装置，在阵列基板上设置的TFT可以为具有迁移率高和在大尺寸范围内具有较好均一性等优点的氧化物TFT，即，有源层的材料为氧化物的TFT。The display device needs to be provided with a Thin Film Transistor (TFT) on the array substrate to realize screen display. At present, for a high resolution, large size, and high frame rate display device, the TFT disposed on the array substrate may be an oxide TFT having a high mobility and a good uniformity in a large size range, that is, The material of the active layer is an oxide TFT.
目前，包含氧化物TFT的阵列基板的制作方法包括：在基板上形成TFT的有源层，其中，所述有源层的材料为氧化物；在所述有源层上沉积用于形成数据线、以及TFT的源极和漏极的导电薄膜；采用刻蚀液，对所述导电薄膜进行刻蚀处理，以形成所述数据线、以及TFT的源极和漏极。At present, a method for fabricating an array substrate including an oxide TFT includes: forming an active layer of a TFT on a substrate, wherein a material of the active layer is an oxide; and depositing a data line on the active layer And a conductive film of the source and the drain of the TFT; etching the conductive film with an etching solution to form the data line and the source and drain of the TFT.
由于所述有源层和导电薄膜邻层设置，因此在对所述导电薄膜进行刻蚀处理时，刻蚀液会接触到材料为氧化物的所述有源层，而由于氧化物对刻蚀液敏感，因此制作出的TFT的性能比较差。目前，在有源层上沉积导电薄膜之前，一般会在所述有源层上形成刻蚀阻挡层，这样刻蚀阻挡层和导电薄膜邻层设置，在对所述导电薄膜进行刻蚀处理时，刻蚀液只会接触到所述刻蚀阻挡层，而不会接触到所述有源层，从而可以保证制作出的TFT具有较好的性能。Since the active layer and the conductive film are disposed adjacent to each other, when the conductive film is etched, the etching liquid contacts the active layer of the material oxide, and the oxide is etched. The liquid is sensitive, so the performance of the fabricated TFT is relatively poor. At present, before depositing a conductive film on the active layer, an etch stop layer is generally formed on the active layer, such that the etch stop layer and the conductive film are disposed adjacent to each other, and the conductive film is etched. The etching solution only contacts the etch barrier layer without contacting the active layer, thereby ensuring that the fabricated TFT has better performance.
发明内容Summary of the invention
本发明至少一实施例提供了一种阵列基板及其制作方法、以及显示装置，用以解决为了避免在对所述导电薄膜进行刻蚀处理时刻蚀液接触到所述有源层，需要在所述有源层和导电薄膜之间设置刻蚀阻挡层，从而增大了阵列基板的厚度的问题。At least one embodiment of the present invention provides an array substrate, a method of fabricating the same, and a display device for solving the need for the etchant to contact the active layer during etching of the conductive film. An etch barrier layer is disposed between the active layer and the conductive film, thereby increasing the thickness of the array substrate.
本发明至少一实施例提供一种阵列基板的制作方法，包括：在表层为有源层的基板上沉积用于形成源极、漏极和数据线的导电薄膜；将所述导电薄 膜的表面划分为所述源极对应的第一区域，所述漏极对应的第二区域，所述数据线对应的第三区域，以及除所述第一区域、第二区域和第三区域以外的第四区域；将所述第四区域的导电薄膜转化为不导电的薄膜；以及，将所述第一区域的导电薄膜作为所述源极，将所述第二区域的导电薄膜作为所述漏极，将所述第三区域的导电薄膜作为所述数据线。At least one embodiment of the present invention provides a method of fabricating an array substrate, comprising: depositing a conductive film for forming a source, a drain, and a data line on a substrate having an active layer; the conductive thin a surface of the film is divided into a first region corresponding to the source, a second region corresponding to the drain, a third region corresponding to the data line, and a first region, a second region, and a third region a fourth region other than the fourth region; converting the conductive film of the fourth region into a non-conductive film; and using the conductive film of the first region as the source and the conductive film of the second region as The drain is a conductive film of the third region as the data line.
本发明至少一实施例提供一种阵列基板，其中：所述阵列基板是采用本发明实施例提供的所述的制作阵列基板的方法制作的。At least one embodiment of the present invention provides an array substrate, wherein the array substrate is fabricated by the method for fabricating an array substrate according to an embodiment of the present invention.
本发明至少一实施例提供一种显示装置，其中：所述显示装置包括本发明实施例提供的所述阵列基板。At least one embodiment of the present invention provides a display device, wherein the display device includes the array substrate provided by the embodiment of the present invention.
附图说明DRAWINGS
为了更清楚地说明本发明实施例的技术方案，下面将对实施例的附图作简单地介绍，显而易见地，下面描述中的附图仅仅涉及本发明的一些实施例，而非对本发明的限制。In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings of the embodiments will be briefly described below. It is obvious that the drawings in the following description relate only to some embodiments of the present invention, and are not intended to limit the present invention. .
图1为本发明一实施例制作阵列基板的方法流程示意图；1 is a schematic flow chart of a method for fabricating an array substrate according to an embodiment of the invention;
图2A～图2F为本发明一实施例中的阵列基板的结构示意图。2A-2F are schematic structural views of an array substrate according to an embodiment of the invention.
具体实施方式detailed description
为使本发明实施例的目的、技术方案和优点更加清楚，下面将结合本发明实施例的附图，对本发明实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本发明的一部分实施例，而不是全部的实施例。基于所描述的本发明的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例，都属于本发明保护的范围。The technical solutions of the embodiments of the present invention will be clearly and completely described in the following with reference to the accompanying drawings. It is apparent that the described embodiments are part of the embodiments of the invention, and not all of the embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the described embodiments of the present invention without departing from the scope of the invention are within the scope of the invention.
需要说明的是，本发明所提到的方向用语，如表示方向的“上”、“下”，仅是参考附图的方向以说明及理解本发明，而不用于限制本发明实施例；而且，附图中各层膜层的厚度和形状不反映真实比例，目的只是示意说明本发明内容。It is to be understood that the terms of the present invention are to be construed as an &quot The thickness and shape of each layer of the film in the drawings do not reflect the true ratio, and the purpose is only to illustrate the contents of the present invention.
如上所述，目前为了避免在对导电薄膜进行刻蚀处理时刻蚀液接触到有源层，需要在所述有源层和导电薄膜之间设置刻蚀阻挡层，但是这种设置会增大阵列基板的厚度，进而增大显示装置的体积。 As described above, in order to avoid the etching liquid contacting the active layer when the conductive film is etched, it is necessary to provide an etch barrier between the active layer and the conductive film, but this arrangement increases the array. The thickness of the substrate, which in turn increases the volume of the display device.
如图1所示，本发明至少一个实施例提供的一种阵列基板的制作方法，包括如下步骤：As shown in FIG. 1 , a method for fabricating an array substrate according to at least one embodiment of the present invention includes the following steps:
步骤101、在形成有有源层的基板上沉积用于形成源极、漏极和数据线的导电薄膜； Step 101, depositing a conductive film for forming a source, a drain, and a data line on a substrate on which an active layer is formed;
步骤102、将所述导电薄膜的表面划分为所述源极对应的第一区域，所述漏极对应的第二区域，所述数据线对应的第三区域，以及除所述第一区域、第二区域和第三区域以外的第四区域；将所述第四区域的导电薄膜转化为不导电的薄膜；以及，将所述第一区域的导电薄膜作为所述源极，将所述第二区域的导电薄膜作为所述漏极，将所述第三区域的导电薄膜作为所述数据线。Step 102: The surface of the conductive film is divided into a first region corresponding to the source, a second region corresponding to the drain, a third region corresponding to the data line, and a first region, a fourth region other than the second region and the third region; converting the conductive film of the fourth region into a non-conductive film; and, using the conductive film of the first region as the source, A conductive film of the two regions serves as the drain, and a conductive film of the third region is used as the data line.
在本发明至少一实施例中，通过将所述第四区域的导电薄膜转化为不导电的薄膜，实现所述源极、漏极和数据线的图形化；即，不需要对所述导电薄膜进行湿法刻蚀处理，即可实现所述源极、漏极和数据线的图形化，从而无需在所述有源层和导电薄膜之间设置刻蚀阻挡层；因此，减小了制作出的阵列基板的厚度，进一步地，减小了包含所述阵列基板的显示装置的体积；另外，由于节省了工艺步骤，可以提高阵列基板的生产效率、以及降低阵列基板的制作成本。In at least one embodiment of the present invention, patterning of the source, drain, and data lines is achieved by converting the conductive film of the fourth region into a non-conductive film; that is, the conductive film is not required. Patterning the source, drain, and data lines by performing a wet etching process, thereby eliminating the need to provide an etch barrier between the active layer and the conductive film; The thickness of the array substrate further reduces the volume of the display device including the array substrate; in addition, since the process steps are saved, the production efficiency of the array substrate can be improved, and the fabrication cost of the array substrate can be reduced.
在本发明至少一实施例中，在步骤101之前，该制作方法还包括：在衬底基板上形成栅极和栅线；在栅极和栅线所在膜层上形成栅极绝缘层；在所述栅极绝缘层上形成有源层。例如，本发明实施例的在衬底基板上形成栅极和栅线的方式可以采用已知技术。In at least one embodiment of the present invention, before the step 101, the manufacturing method further includes: forming a gate and a gate line on the substrate; forming a gate insulating layer on the film layer where the gate and the gate line are located; An active layer is formed on the gate insulating layer. For example, the manner in which the gate and the gate lines are formed on the base substrate in the embodiment of the present invention may employ a known technique.
例如，在一个示例中，在衬底基板上形成栅极和栅线，包括：采用溅射或者热蒸发的方法，在衬底基板上沉积栅金属层；通过对栅金属层进行刻蚀，在衬底基板上形成栅极和栅线。For example, in one example, forming a gate and a gate line on a base substrate includes: depositing a gate metal layer on the base substrate by sputtering or thermal evaporation; etching the gate metal layer by etching A gate and a gate line are formed on the base substrate.
例如，衬底基板为透明玻璃基板或者石英。For example, the base substrate is a transparent glass substrate or quartz.
例如，栅金属层的厚度范围为
Figure PCTCN2014087020-appb-000001
For example, the thickness of the gate metal layer ranges from
Figure PCTCN2014087020-appb-000001
例如，栅金属层的材料包括Cr(铬)、W(钨)、Ti(钛)、Ta(钽)、Mo(钼)、Al(铝)、Nd(钕)和Cu(铜)的金属或合金中的一种。For example, the material of the gate metal layer includes a metal of Cr (chromium), W (tungsten), Ti (titanium), Ta (germanium), Mo (molybdenum), Al (aluminum), Nd (germanium), and Cu (copper) or One of the alloys.
例如，栅金属层可以为一层或多层。For example, the gate metal layer may be one or more layers.
例如，在一个示例中，在栅极和栅线所在膜层上形成栅极绝缘层，包括：通过PECVD(plasma enhanced chemical vapor deposition，等离子体增强化学 气相沉积)方法，在栅极和栅线所在膜层上形成栅极绝缘层。For example, in one example, a gate insulating layer is formed on the film layer where the gate and the gate line are located, including: by plasma enhanced chemical vapor deposition (PECVD) A vapor deposition method is to form a gate insulating layer on a film layer on which a gate electrode and a gate line are located.
例如，栅极绝缘层的厚度范围为
Figure PCTCN2014087020-appb-000002
For example, the thickness of the gate insulating layer ranges from
Figure PCTCN2014087020-appb-000002
例如，栅极绝缘层对应的反应气体可以为SiH4(硅烷)、NH3(氨气)和N2的混合气体，或者为SiH2Cl2(二氯硅烷)、NH3和N2的混合气体，栅极绝缘层的材料包括氧化物(比如，二氧化硅)、氮化物(比如，硅的氮化物)和氧氮化合物中的一种。For example, the reaction gas corresponding to the gate insulating layer may be a mixed gas of SiH 4 (silane), NH 3 (ammonia gas) and N 2 , or a mixture of SiH 2 Cl 2 (dichlorosilane), NH 3 and N 2 . The gas, the material of the gate insulating layer includes one of an oxide (for example, silicon dioxide), a nitride (for example, a nitride of silicon), and an oxynitride compound.
例如，在一个示例中，在所述栅极绝缘层上形成有源层，包括：采用溅射或者热蒸发的方法，在所述栅极绝缘层上沉积有源薄膜；通过对所述有源薄膜进行刻蚀，形成所述有源层。For example, in one example, forming an active layer on the gate insulating layer includes: depositing an active thin film on the gate insulating layer by sputtering or thermal evaporation; The film is etched to form the active layer.
例如，有源薄膜的材料包括半导体材料和氧化物中的一种。For example, the material of the active film includes one of a semiconductor material and an oxide.
例如，所述半导体材料包括非晶硅、多晶硅和单晶硅中的一种。For example, the semiconductor material includes one of amorphous silicon, polycrystalline silicon, and single crystal silicon.
例如，所述氧化物为金属氧化物，比如，ZnO(氧化锌)，IGZO(氧化铟镓锌)，ITZO(氧化铟锡锌)，或者HIZO(氧化铟锌铪)。For example, the oxide is a metal oxide such as ZnO (zinc oxide), IGZO (indium gallium zinc oxide), ITZO (indium tin zinc oxide), or HIZO (indium zinc oxide).
例如，有源薄膜可以为一层或多层。For example, the active film may be one or more layers.
本发明至少一实施例中，在步骤101中，在表层为有源层的基板上沉积用于形成源极、漏极和数据线的导电薄膜，包括：采用溅射的方法，在表层为有源层的基板上沉积所述导电薄膜。In at least one embodiment of the present invention, in step 101, a conductive film for forming a source, a drain, and a data line is deposited on a substrate having an active layer on the surface layer, including: using a sputtering method, The conductive film is deposited on the substrate of the source layer.
所述导电薄膜可以采用已知的任一种能够导电的薄膜。The conductive film may be any film known to be electrically conductive.
例如，所述导电薄膜的材料包括Cr、W、Ti、Ta、Nd、Mo、Al和Cu的金属或合金中的一种。For example, the material of the electroconductive thin film includes one of a metal or an alloy of Cr, W, Ti, Ta, Nd, Mo, Al, and Cu.
例如，所述导电薄膜的材料还可以包括非金属导电材料，比如，石墨烯。For example, the material of the conductive film may further include a non-metal conductive material such as graphene.
例如，所述导电薄膜可以是单层，也可以是多层。For example, the conductive film may be a single layer or a plurality of layers.
需要说明的是，任一种能够实现将所述第四区域的导电薄膜转化为不导电的薄膜的实施方式均适用于本发明实施例。It should be noted that any of the embodiments capable of converting the conductive film of the fourth region into a non-conductive film is applicable to the embodiment of the present invention.
本发明至少一实施例中，在步骤102中，需要对所述第四区域的导电薄膜进行处理，以使其转化为不导电的薄膜；另外，为了实现仅对所述第四区域的导电薄膜进行处理，可以在遮挡住所述第一区域、第二区域和第三区域的导电薄膜，但露出所述第四区域的导电薄膜后，对所述第四区域的导电薄膜进行处理。In at least one embodiment of the present invention, in step 102, the conductive film of the fourth region needs to be processed to be converted into a non-conductive film; in addition, in order to realize only the conductive film of the fourth region After the treatment, the conductive film of the first region, the second region and the third region may be blocked, but after the conductive film of the fourth region is exposed, the conductive film of the fourth region is processed.
需要说明的是，任一种能够实现遮挡住所述第一区域、第二区域和第三 区域的导电薄膜，但露出所述第四区域的导电薄膜的实施方式均适用于本发明实施例。比如，将制作所述源极、漏极和数据线的掩膜版放置在所述导电薄膜上，所述掩膜版的透光区域与所述第四区域对应；或者，在所述导电薄膜上制作位于所述第一区域、第二区域和第三区域的遮挡部件，所述遮挡部件可以为任一种起到遮挡作用的部件，比如光刻胶。It should be noted that any one of the first region, the second region, and the third region can be blocked. Embodiments of the conductive film of the region, but exposing the conductive film of the fourth region, are all applicable to the embodiments of the present invention. For example, a mask for fabricating the source, drain, and data lines is placed on the conductive film, and a light-transmitting region of the mask corresponds to the fourth region; or, in the conductive film A shielding member is disposed on the first region, the second region, and the third region, and the shielding member may be any component that functions as a shielding, such as a photoresist.
本发明至少一实施例中，在步骤102中，将第四区域的导电薄膜转化为不导电的薄膜，例如，可如下进行：在所述导电薄膜上涂布光刻胶，并对所述光刻胶进行曝光和显影处理，以保留所述第一区域、第二区域和第三区域的光刻胶，并去除所述第四区域的光刻胶；对所述第四区域的导电薄膜进行处理，使所述第四区域的导电薄膜转化为不导电的薄膜。In at least one embodiment of the present invention, in step 102, converting the conductive film of the fourth region into a non-conductive film, for example, may be performed by coating a photoresist on the conductive film, and coating the light Engraving and exposing the photoresist to retain the photoresist of the first region, the second region, and the third region, and removing the photoresist of the fourth region; and performing the conductive film on the fourth region Processing to convert the conductive film of the fourth region into a non-conductive film.
实施中，通过对所述光刻胶进行曝光和显影处理后，即可实现遮挡住所述第一区域、第二区域和第三区域的导电薄膜，并露出所述第四区域的导电薄膜；与其他遮挡部件相比，不需要进行刻蚀处理，从而降低了将第四区域的导电薄膜转化为不导电的薄膜的复杂度。In an implementation, after exposing and developing the photoresist, the conductive film covering the first region, the second region and the third region can be realized, and the conductive film of the fourth region is exposed; Compared with other shielding members, etching treatment is not required, thereby reducing the complexity of converting the conductive film of the fourth region into a non-conductive film.
实施中，在所述导电薄膜上制作的位于所述第一区域、第二区域和第三区域的光刻胶与所述第一区域、第二区域和第三区域的导电薄膜紧密接触，能够在对所述第四区域的导电薄膜进行处理时，最大程度地避免影响所述第一区域、第二区域和第三区域的导电薄膜。In an implementation, the photoresist on the conductive film and the first region, the second region, and the third region are in close contact with the conductive films of the first region, the second region, and the third region, and can When the conductive film of the fourth region is processed, the conductive film that affects the first region, the second region, and the third region is largely avoided.
较佳地，对所述光刻胶进行曝光和显影处理，以保留所述第一区域、第二区域和第三区域的光刻胶，并去除所述第四区域的光刻胶，例如，可以如下进行：采用掩膜版，对所述光刻胶进行曝光处理；在所述光刻胶为正性光刻胶时，所述掩膜版的透光区域与所述第四区域对应；在所述光刻胶为负性光刻胶时，所述掩膜版的不透光区域与所述第四区域对应；对经过曝光处理的所述光刻胶进行显影处理，保留所述第一区域、第二区域和第三区域的光刻胶，并去除所述第四区域的光刻胶。Preferably, the photoresist is subjected to an exposure and development process to retain the photoresist of the first region, the second region, and the third region, and to remove the photoresist of the fourth region, for example, The photoresist may be exposed to light by using a mask; when the photoresist is a positive photoresist, the transparent region of the mask corresponds to the fourth region; When the photoresist is a negative photoresist, the opaque region of the mask corresponds to the fourth region; and the exposed photoresist is developed to retain the first a photoresist of a region, a second region, and a third region, and removing the photoresist of the fourth region.
需要说明的是，在所述导电薄膜的材料不同时，对所述第四区域的导电薄膜进行处理以使其转化为不导电的薄膜的方法也不同；比如，在所述导电薄膜的材料为石墨烯时，可以通过使所述第四区域的导电薄膜在发生物理反应后，转化为不导电的薄膜。It should be noted that, when the materials of the conductive film are different, the method of processing the conductive film of the fourth region to convert it into a non-conductive film is also different; for example, the material of the conductive film is In the case of graphene, the conductive film of the fourth region can be converted into a non-conductive film after a physical reaction occurs.
本发明至少一实施例中，所述导电薄膜为金属薄膜；对第四区域的导电 薄膜进行处理，使所述第四区域的导电薄膜转化为不导电的薄膜，包括：在形成有所述光刻胶的基板表面上产生氧化气体的等离子体，使所述氧化气体的等离子体与所述第四区域的导电薄膜发生化学反应，生成不导电的金属化合物薄膜；其中，所述氧化气体包括氧气、一氧化氮和一氧化二氮中的一种。In at least one embodiment of the present invention, the conductive film is a metal film; conductive to the fourth region Processing the film to convert the conductive film of the fourth region into a non-conductive film, comprising: generating a plasma of an oxidizing gas on a surface of the substrate on which the photoresist is formed, and causing a plasma of the oxidizing gas The conductive film of the fourth region is chemically reacted to form a non-conductive metal compound film; wherein the oxidizing gas includes one of oxygen, nitrogen monoxide and nitrous oxide.
实施中，氧化气体的等离子体会与暴露出的所述第四区域的导电薄膜发生化学反应，生成不导电的金属化合物薄膜，以实现将所述第四区域的导电薄膜转化为不导电的薄膜，以节省在所述有源层和导电薄膜之间设置刻蚀阻挡层的工艺步骤。In an implementation, the plasma of the oxidizing gas chemically reacts with the exposed conductive film of the fourth region to form a non-conductive metal compound film to convert the conductive film of the fourth region into a non-conductive film. To save the process step of providing an etch barrier between the active layer and the conductive film.
需要说明的是，任一种能够实现在形成有所述光刻胶的基板表面上产生氧化气体的等离子体的实施方式均适用于本发明实施例。比如，将形成有所述光刻胶的基板放置于干刻设备或者PECVD设备的腔体内，由所述干刻设备或者PECVD设备在形成有所述光刻胶的基板表面上产生氧化反应的氧化气体的等离子体。It should be noted that any of the embodiments capable of realizing plasma generating an oxidizing gas on the surface of the substrate on which the photoresist is formed is applicable to the embodiment of the present invention. For example, the substrate on which the photoresist is formed is placed in a cavity of a dry etching apparatus or a PECVD apparatus, and an oxidation reaction is generated on the surface of the substrate on which the photoresist is formed by the dry etching apparatus or the PECVD apparatus. The plasma of the gas.
例如，可以通过控制氧化气体的等离子体的沉积功率、浓度、以及温度，以控制所述氧化气体的等离子体与所述第四区域的导电薄膜发生化学反应的速度和充分程度。For example, the rate and degree of chemical reaction of the plasma of the oxidizing gas with the conductive film of the fourth region can be controlled by controlling the deposition power, concentration, and temperature of the plasma of the oxidizing gas.
例如，产生氧化气体的等离子体的设备的腔体内的温度不大于200oC。For example, the temperature inside the chamber of the apparatus that generates the plasma of the oxidizing gas is not more than 200 °C.
例如，产生氧化气体的等离子体的设备的腔体内的温度为室温。For example, the temperature in the chamber of the apparatus that produces the plasma of the oxidizing gas is room temperature.
例如，所述导电薄膜可以为任一种金属薄膜。For example, the conductive film may be any metal film.
例如，所述导电薄膜为铝薄膜，所述氧化气体还包括氮气。For example, the conductive film is an aluminum film, and the oxidizing gas further includes nitrogen.
实施中，金属铝的导电性比较强，在所述导电薄膜为铝薄膜时，可以增强制作出的源极、漏极和数据线的导电性。In the implementation, the metal aluminum has relatively high conductivity, and when the conductive film is an aluminum film, the conductivity of the produced source, drain and data lines can be enhanced.
本发明至少一实施例中，对第四区域的导电薄膜进行处理，使所述第四区域的导电薄膜转化为不导电的薄膜之后，还包括：去除所述第一区域、第二区域和第三区域的光刻胶。In at least one embodiment of the present invention, after the conductive film of the fourth region is processed to convert the conductive film of the fourth region into a non-conductive film, the method further includes: removing the first region, the second region, and the first Three-region photoresist.
实施中，去除所述第一区域、第二区域和第三区域的光刻胶，可以减小制作出的阵列基板的厚度，进一步地，减小了包含所述阵列基板的显示装置的体积。In the implementation, removing the photoresist of the first region, the second region, and the third region can reduce the thickness of the fabricated array substrate, and further reduce the volume of the display device including the array substrate.
本发明至少一实施例中，在步骤102之后，该方法还包括：形成覆盖源极、漏极和数据线的钝化层；刻蚀掉漏极对应位置的钝化层，以形成暴露出 漏极的过孔；在钝化层上形成通过过孔与漏极进行电性连接的像素电极。In at least one embodiment of the present invention, after the step 102, the method further includes: forming a passivation layer covering the source, the drain, and the data line; etching away the passivation layer corresponding to the drain to form the exposed a via hole of the drain; a pixel electrode electrically connected to the drain through the via hole is formed on the passivation layer.
例如，形成覆盖源极、漏极和数据线的钝化层，包括：通过PECVD方法，形成覆盖源极、漏极和数据线的钝化层。For example, forming a passivation layer covering the source, drain, and data lines includes forming a passivation layer covering the source, drain, and data lines by a PECVD method.
例如，钝化层的厚度范围为
Figure PCTCN2014087020-appb-000003
For example, the thickness of the passivation layer is
Figure PCTCN2014087020-appb-000003
例如，钝化层对应的反应气体可以为SiH4、NH3和N2的混合气体，或者为SiH2Cl2、NH3和N2的混合气体，钝化层的材料包括氧化物(比如，二氧化硅)、氮化物(比如，硅的氮化物)或者氧氮化合物中的一种。For example, the reaction gas corresponding to the passivation layer may be a mixed gas of SiH 4 , NH 3 and N 2 , or a mixed gas of SiH 2 Cl 2 , NH 3 and N 2 , and the material of the passivation layer includes an oxide (for example, Silica), one of a nitride (such as a nitride of silicon) or an oxygen-nitrogen compound.
例如，钝化层可以为一层，也可以为多层。For example, the passivation layer may be one layer or multiple layers.
例如，通过溅射或者热蒸发方法，在钝化层上沉积透明导电层；对透明导电层进行刻蚀，在像素区域形成通过过孔与漏极进行电性连接的像素电极。For example, a transparent conductive layer is deposited on the passivation layer by sputtering or thermal evaporation; the transparent conductive layer is etched to form a pixel electrode electrically connected to the drain through the via hole in the pixel region.
例如，透明导电层的厚度范围为
Figure PCTCN2014087020-appb-000004
For example, the thickness of the transparent conductive layer ranges from
Figure PCTCN2014087020-appb-000004
例如，透明导电层的材料包括氧化铟锡、氧化铟锌和氧化铝锌中的一种或多种。For example, the material of the transparent conductive layer includes one or more of indium tin oxide, indium zinc oxide, and aluminum zinc oxide.
下面以底栅型TFT结构为例，对本发明至少一实施例中的阵列基板的制作方法进行详细介绍。The method for fabricating the array substrate in at least one embodiment of the present invention will be described in detail below by taking the bottom gate type TFT structure as an example.
例如，本发明实施例的阵列基板的制作方法，包括如下步骤。For example, the method for fabricating the array substrate of the embodiment of the present invention includes the following steps.
步骤一、如图2A所示，在衬底基板(图2A中未示出)上形成栅极11和栅线12；Step 1, as shown in FIG. 2A, forming a gate electrode 11 and a gate line 12 on a substrate substrate (not shown in FIG. 2A);
步骤二、在栅极和栅线所在膜层上形成栅极绝缘层；Step 2, forming a gate insulating layer on the film layer where the gate and the gate line are located;
步骤三、如图2B所示，在所述栅极绝缘层(图2B中未示出)上形成有源层20；Step 3, as shown in FIG. 2B, forming an active layer 20 on the gate insulating layer (not shown in FIG. 2B);
步骤四、如图2C所示，在有源层20上沉积用于形成源极、漏极和数据线的Al金属薄膜100；Step 4, as shown in FIG. 2C, depositing an Al metal thin film 100 for forming a source, a drain, and a data line on the active layer 20;
步骤五、将所述Al金属薄膜100的表面划分为所述源极对应的第一区域，所述漏极对应的第二区域，所述数据线对应的第三区域，以及除所述第一区域、第二区域和第三区域以外的第四区域；Step 5: dividing a surface of the Al metal thin film 100 into a first region corresponding to the source, a second region corresponding to the drain, a third region corresponding to the data line, and a fourth area outside the area, the second area and the third area;
步骤六、在所述Al金属薄膜上涂布光刻胶，并对所述光刻胶进行曝光和显影处理，以保留所述第一区域、第二区域和第三区域的光刻胶，并去除所述第四区域的光刻胶；Step 6. Applying a photoresist on the Al metal film, and exposing and developing the photoresist to retain the photoresist of the first region, the second region, and the third region, and Removing the photoresist of the fourth region;
步骤七、在形成有所述光刻胶的基板表面上产生氧气(O2)等离子体， 使所述O2等离子体与所述第四区域的Al金属薄膜发生化学反应，生成不导电的Al2O3(氧化铝)薄膜；Step 7. generating an oxygen (O 2 ) plasma on the surface of the substrate on which the photoresist is formed, and chemically reacting the O 2 plasma with the Al metal thin film in the fourth region to form a non-conductive Al. 2 O 3 (alumina) film;
步骤八、去除所述第一区域、第二区域和第三区域的光刻胶；Step 8. removing the photoresist of the first region, the second region, and the third region;
步骤九、如图2D所示，将所述第一区域的Al金属薄膜100作为所述源极31，将所述第二区域的Al金属薄膜100作为所述漏极32，将所述第三区域的Al金属薄膜100作为所述数据线33，源极31与数据线33彼此连接；Step 9: As shown in FIG. 2D, the Al metal thin film 100 of the first region is used as the source 31, and the Al metal thin film 100 of the second region is used as the drain 32, and the third a region of the Al metal thin film 100 as the data line 33, the source 31 and the data line 33 are connected to each other;
如图2D所示，所述第四区域的不导电的Al2O3薄膜200实现了所述源极31、漏极32和数据线33的图形化。As shown in FIG. 2D, the fourth region of the non-conductive Al 2 O 3 film 200 effects patterning of the source 31, the drain 32, and the data line 33.
步骤十、形成覆盖源极、漏极和数据线的钝化层；Step 10, forming a passivation layer covering the source, the drain, and the data line;
步骤十一、如图2E所示，刻蚀掉漏极对应位置的钝化层(图2E中未示出)，以形成暴露出漏极的过孔40； Step 11 as shown in FIG. 2E, etching away the passivation layer corresponding to the drain corresponding position (not shown in FIG. 2E) to form a via hole 40 exposing the drain;
步骤十二、如图2F所示，在钝化层(图2F中未示出)上形成通过过孔40与漏极32进行电性连接的像素电极50。 Step 12, as shown in FIG. 2F, a pixel electrode 50 electrically connected through the via 40 and the drain 32 is formed on the passivation layer (not shown in FIG. 2F).
本发明至少一实施例提供一种阵列基板，所述阵列基板是采用本发明实施例提供的所述的制作阵列基板的方法制作的。At least one embodiment of the present invention provides an array substrate fabricated by the method for fabricating an array substrate according to the embodiment of the present invention.
实施中，采用本发明至少一实施例提供的制作阵列基板的方法制作出的阵列基板不包括位于所述有源层和源极、漏极和数据线所在膜层之间的刻蚀阻挡层，因此，该方法减小了阵列基板的厚度，进一步地，减小了包含所述阵列基板的显示装置的体积。In an implementation, the array substrate fabricated by the method for fabricating an array substrate provided by at least one embodiment of the present invention does not include an etch barrier layer between the active layer and a film layer between a source, a drain, and a data line. Therefore, the method reduces the thickness of the array substrate, and further reduces the volume of the display device including the array substrate.
本发明至少一实施例提供一种显示装置，包括所述的阵列基板。At least one embodiment of the present invention provides a display device including the array substrate.
由于本发明实施例的阵列基板的厚度减小了，因而包括本发明至少一实施例的阵列基板的显示装置的体积减小了。Since the thickness of the array substrate of the embodiment of the present invention is reduced, the volume of the display device including the array substrate of at least one embodiment of the present invention is reduced.
所述显示装置可以为：液晶面板、电子纸、OLED(Organic Light Emitting Diode，有机发光二极管)面板、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。The display device may be: a liquid crystal panel, an electronic paper, an OLED (Organic Light Emitting Diode) panel, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, etc., having any display function. Product or part.
以上所述仅是本发明的示范性实施方式，而非用于限制本发明的保护范围，本发明的保护范围由所附的权利要求确定。The above is only an exemplary embodiment of the present invention, and is not intended to limit the scope of the present invention. The scope of the present invention is defined by the appended claims.
本申请要求于2014年6月23日递交的中国专利申请第201410283614.5号的优先权，在此全文引用上述中国专利申请公开的内容以作为本申请的一部分。 The present application claims the priority of the Chinese Patent Application No. 20141028361, filed on Jun. 23, 2014, the entire disclosure of which is hereby incorporated by reference.

Claims (10)

  1. 一种阵列基板的制作方法，包括：A method for fabricating an array substrate, comprising:
    在形成有有源层的基板上沉积用于形成源极、漏极和数据线的导电薄膜；Depositing a conductive film for forming a source, a drain, and a data line on a substrate on which an active layer is formed;
    将所述导电薄膜的表面划分为所述源极对应的第一区域，所述漏极对应的第二区域，所述数据线对应的第三区域，以及除所述第一区域、第二区域和第三区域以外的第四区域；将所述第四区域的导电薄膜转化为不导电的薄膜；以及，将所述第一区域的导电薄膜作为所述源极，将所述第二区域的导电薄膜作为所述漏极，将所述第三区域的导电薄膜作为所述数据线。Dividing a surface of the conductive film into a first region corresponding to the source, a second region corresponding to the drain, a third region corresponding to the data line, and a first region and a second region And a fourth region outside the third region; converting the conductive film of the fourth region into a non-conductive film; and, using the conductive film of the first region as the source, the second region As the drain, a conductive film of the third region is used as the data line.
  2. 如权利要求1所述的方法，其中，在所述导电薄膜上涂布光刻胶，并对所述光刻胶进行曝光和显影处理，以保留所述第一区域、第二区域和第三区域的光刻胶，并去除所述第四区域的光刻胶；The method of claim 1, wherein a photoresist is coated on the conductive film, and the photoresist is subjected to exposure and development processing to retain the first region, the second region, and the third a photoresist of the region, and removing the photoresist of the fourth region;
    对所述第四区域的导电薄膜进行处理，使所述第四区域的导电薄膜转化为不导电的薄膜。The conductive film of the fourth region is treated to convert the conductive film of the fourth region into a non-conductive film.
  3. 如权利要求2所述的方法，其中，所述导电薄膜为金属薄膜，在形成有所述光刻胶的基板表面上产生氧化气体的等离子体，使所述氧化气体的等离子体与所述第四区域的导电薄膜发生化学反应，生成不导电的金属化合物薄膜；The method according to claim 2, wherein said conductive film is a metal film, and a plasma of an oxidizing gas is generated on a surface of said substrate on which said photoresist is formed, said plasma of said oxidizing gas and said first The conductive film of the four regions undergoes a chemical reaction to form a non-conductive metal compound film;
    其中，所述氧化气体包括氧气、一氧化氮和一氧化二氮中的一种。Wherein, the oxidizing gas comprises one of oxygen, nitrogen monoxide and nitrous oxide.
  4. 如权利要求3所述的方法，其中，所述导电薄膜为铝薄膜，所述氧化气体还包括氮气。The method of claim 3 wherein said conductive film is an aluminum film and said oxidizing gas further comprises nitrogen.
  5. 如权利要求2所述的方法，所述对第四区域的导电薄膜进行处理，使所述第四区域的导电薄膜转化为不导电的薄膜之后，还包括：The method of claim 2, after the processing of the conductive film of the fourth region to convert the conductive film of the fourth region into a non-conductive film, the method further comprises:
    去除所述第一区域、第二区域和第三区域的光刻胶。The photoresist of the first region, the second region, and the third region is removed.
  6. 如权利要求1所述的方法，其中，采用溅射的方法，在表层为有源层的基板上沉积所述导电薄膜。The method according to claim 1, wherein said electroconductive thin film is deposited on a substrate having an active layer as a surface layer by sputtering.
  7. 如权利要求1～6任一项所述的方法，其中，所述有源层的材料为氧化物。The method according to any one of claims 1 to 6, wherein the material of the active layer is an oxide.
  8. 如权利要求7所述的方法，其中，所述有源层的材料包括氧化锌、氧化铟镓锌、氧化铟锡锌和氧化铟锌铪中的一种。 The method of claim 7, wherein the material of the active layer comprises one of zinc oxide, indium gallium zinc oxide, indium tin zinc oxide, and indium zinc oxide.
  9. 一种阵列基板，采用如权利要求1～8任一项所述方法制作。An array substrate produced by the method according to any one of claims 1 to 8.
  10. 一种显示装置，包括如权利要求9所述的阵列基板。 A display device comprising the array substrate of claim 9.
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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001028446A (en) * 2000-01-01 2001-01-30 Semiconductor Energy Lab Co Ltd Semiconductor device
US20070093003A1 (en) * 2005-10-25 2007-04-26 Chuan-Yi Wu Method for fabricating thin film transistors
CN101908537A (en) * 2009-06-03 2010-12-08 乐金显示有限公司 Array substrate for display equipment and method of fabricating the same
CN102270604A (en) * 2010-06-03 2011-12-07 北京京东方光电科技有限公司 Structure of array substrate and manufacturing method thereof
CN102646699A (en) * 2012-01-13 2012-08-22 京东方科技集团股份有限公司 Oxide TFT (thin film transistor) and manufacturing method thereof
CN102812555A (en) * 2010-03-11 2012-12-05 夏普株式会社 Semiconductor device and method for manufacturing the same
JP2013021305A (en) * 2011-06-17 2013-01-31 Semiconductor Energy Lab Co Ltd Method for manufacturing semiconductor device

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100344777B1 (en) * 2000-02-28 2002-07-20 엘지.필립스 엘시디 주식회사 method for forming device having a thin film transistor
KR100759086B1 (en) * 2007-02-23 2007-09-19 실리콘 디스플레이 (주) Thin film transistor using part oxidation and method for manufacturing thereof
CN102709329A (en) * 2012-06-14 2012-10-03 深超光电（深圳）有限公司 Thin film transistor and manufacturing method thereof

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001028446A (en) * 2000-01-01 2001-01-30 Semiconductor Energy Lab Co Ltd Semiconductor device
US20070093003A1 (en) * 2005-10-25 2007-04-26 Chuan-Yi Wu Method for fabricating thin film transistors
CN101908537A (en) * 2009-06-03 2010-12-08 乐金显示有限公司 Array substrate for display equipment and method of fabricating the same
CN102812555A (en) * 2010-03-11 2012-12-05 夏普株式会社 Semiconductor device and method for manufacturing the same
CN102270604A (en) * 2010-06-03 2011-12-07 北京京东方光电科技有限公司 Structure of array substrate and manufacturing method thereof
JP2013021305A (en) * 2011-06-17 2013-01-31 Semiconductor Energy Lab Co Ltd Method for manufacturing semiconductor device
CN102646699A (en) * 2012-01-13 2012-08-22 京东方科技集团股份有限公司 Oxide TFT (thin film transistor) and manufacturing method thereof

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