WO2015158091A1 - Amoled像素驱动电路、方法和显示装置 - Google Patents

Amoled像素驱动电路、方法和显示装置 Download PDF

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Publication number
WO2015158091A1
WO2015158091A1 PCT/CN2014/085277 CN2014085277W WO2015158091A1 WO 2015158091 A1 WO2015158091 A1 WO 2015158091A1 CN 2014085277 W CN2014085277 W CN 2014085277W WO 2015158091 A1 WO2015158091 A1 WO 2015158091A1
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WIPO (PCT)
Prior art keywords
current
data
data writing
unit
transistor
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PCT/CN2014/085277
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English (en)
French (fr)
Inventor
王颖
刘颖
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京东方科技集团股份有限公司
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Application filed by 京东方科技集团股份有限公司 filed Critical 京东方科技集团股份有限公司
Priority to EP14859296.7A priority Critical patent/EP3133586A4/en
Priority to US14/433,598 priority patent/US10152916B2/en
Publication of WO2015158091A1 publication Critical patent/WO2015158091A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3216—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using a passive matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2003—Display of colours
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275—Details of drivers for data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275—Details of drivers for data electrodes
    • G09G3/3283—Details of drivers for data electrodes in which the data driver supplies a variable data current for setting the current through, or the voltage across, the light-emitting elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor

Definitions

  • the current-type AMOLED pixel driving circuit directly uses a current type signal to drive the pixel circuit, and the brightness of the OLED is proportional to the magnitude of the driving current, so that multi-level gray scale display can be realized.
  • the current current-mode AMOLED pixel driving circuit includes a driving transistor TP1, a data writing transistor TP2, and a memory cell, and TP1 and TP2 are PMOS transistors, and the memory cell includes a storage capacitor C and a resistor connected in parallel with each other.
  • R in the data writing phase, the data write control signal Gate connected to the gate of TP2 is low level, TP2 is turned on, Idata charges storage capacitor C through TP2; in the pixel lighting stage, access TP 1
  • the illuminating control signal EM of the gate is low level, TP 1 is turned on, C is discharged to illuminate the OLED, and the cathode of the OLED is connected to the low level output terminal ELVSS of the driving power source.
  • the current current-type AMOLED pixel driving circuit requires a certain driving current to drive the OLED, and since the amount of charging of the storage capacitor is fixed during the data writing phase, the charging amount cannot be adjusted during this process, and thus cannot be adjusted. Grayscale.
  • a main object of the present disclosure is to provide an AMOLED pixel driving circuit, method and display device capable of driving an OLED with a small data current, and adjusting the ash by adjusting the magnitude of a current flowing through the OLED during a pixel lighting phase. Order.
  • the present disclosure provides a pixel driving circuit for driving organic hair
  • the light-emitting diode tube OOLLEEDD the package includes:: an electric charge storage storage unit cell, ffiffi is charged and charged in the stage of writing data into the data stage
  • the OOLLEEDD is discharged in a bright-stage stage like a pixel pixel, and the OOLLEEDD is written in a light-emitting manner; the data is written into the single unit, and the ffiffi is written in the data.
  • the input stage segment writes the input data data according to the electric current flow;
  • the illuminating light control unit is used to control the single unit element, and is used for lighting the bright phase in the pixel stage Describe the electrical charge storage storage unit cell and the connection with the OOLLEEDD;
  • the AAMMOOLLEEDD image pixilator drive circuit further includes an electric current discharge amplification
  • the unit element which is used to amplify the large data data current flow during the data writing and writing stage, and to pass the over-amplification to enlarge the digital data current
  • the stream charges the pair of said electric charge storage storage unit cells. .
  • the electric current current amplifier amplifies the large single unit element to amplify the large data data current flow during the time when the data is written and written into all the stages of the stage stage, and passes through The digital data after the amplification is large is charged and charged according to the electric current flow to the electric charge storage storage unit. .
  • the electric circuit circuit amplifier When the implementation time is implemented, the electric circuit circuit amplifier amplifies the large single unit element root according to the requirement of the gray gray level, and selects the time portion of the time portion in the data writing stage.
  • the data of the electric charge storage storage unit is charged and charged according to the electric current flow through the over-amplification data. .
  • the data to be written into the in-stage stage includes the electric current excitation amplification large-stage stage and the direct direct charge charging electric stage stage;; in the electric current exile amplification The large-stage stage, the electric current excavation amplifies the large single unit element to amplify the large data data current flow and the said data is written into the single unit element through the over-amplification amplification
  • the data of the electric current is charged and charged to the electric charge storage storage unit cell, and in the direct charging and charging phase, the data is written and written.
  • the incoming single cell is also used to charge the stored charge cell unit directly by the current flow through the data. .
  • the electric current flow amplification large single unit package includes an electric current excitation amplification large control mold module block and a proportional proportional electric current flow mirror, wherein, the electric The current excitation amplifying control module module is used for guiding the conduction between time and time of the all-time portion of the data segment in the data segment. Writing a connection between the node node and the electric current input and output terminal of the electric current mirror of the proportional ratio;
  • the electrical current streaming output end of the proportional current current flow mirror is connected to the node of the write and write node;
  • the proportional proportional electric current flow mirror is used for performing row-amplification amplification on the current data flowing in the pair of data. .
  • the data to be written into the single unit cell package includes: the data is written into the crystal transistor, and the gate gate is connected to the data packet. Writing a write control signal signal, the first first pole is connected to the data stream, and the second pole is connected to the write and write section Nodes are connected. .
  • the amplifier is controlled by a large-scale control system, and the base pole is connected with the node of the write-in and write node, and the first pole is connected to the current and the current is amplified.
  • the main control system writes the control transistor, the gate is connected to the data write control signal, the first pole is connected to the current input end of the proportional current mirror, and the second pole is connected to the second pole of the amplification control transistor .
  • the timings of the current amplification control signal and the data write control signal are the same or different.
  • the data write transistor and the write control transistor are PMOS transistors.
  • one or both of the data write transistor and the write control transistor are NMOS transistors.
  • the proportional current mirror includes an input branch and an output branch
  • the input branch includes:
  • a first PMOS transistor the first pole is connected to a high level output end of the driving power source; and, the first NMOS transistor, the cabinet pole is connected to the first pole of the first NMOS transistor, and the first pole is low with the driving power source a flat output terminal is connected, a second pole is connected to the second pole of the first PMOS transistor; a second pole of the first NMOS transistor is a current input end of the proportional current mirror;
  • the output branch includes:
  • a second PMOS transistor a gate is connected to a gate of the first PMOS transistor, a first pole is connected to a high level output end of the driving power source, and a second pole is connected to a gate of the second PMOS transistor;
  • a second NMOS transistor the cabinet is connected to the gate of the first NMOS transistor, the first electrode is connected to the second electrode of the second PMOS transistor.
  • the width to length ratio of the second PMOS transistor is equal to the width to length ratio of the second NMOS transistor;
  • the width to length ratio of the first PMOS transistor is equal to the width to length ratio of the first NMOS transistor;
  • the width to length ratio of the second PMOS transistor is K times the width to length ratio of the first PMOS transistor, and K is greater than i.
  • the illumination control unit includes a driving transistor; a gate of the driving transistor is connected to an emission control signal, a first pole is connected to the write node, and a second pole is connected to an anode of the 0 LED; a cathode and a driver of the 0 LED The low level output of the power supply is connected.
  • the charge storage unit includes a storage capacitor and a resistor connected in parallel with each other;
  • the storage capacitor has one end connected to the write node and the other end connected to a low level output of the driving power source.
  • the present disclosure also provides a pixel driving method, including:
  • the data writing unit writes the data current
  • the current amplifying unit amplifies the data current and charges the charge storage unit by the amplified data current;
  • the illumination control unit controls the connection of the on-charge storage unit to the OLED, and the charge storage unit discharges to illuminate the OLED.
  • the data writing phase includes a current amplification phase and a direct charging phase; in the current amplification phase, the current amplifying unit amplifies the data current, and the data writing unit charges the charge storage unit by the amplified data current ;
  • the data writing unit directly charges the charge storage unit by the data current.
  • the present disclosure also provides a display device including an OLED and the above pixel driving circuit, the pixel driving circuit driving the OLED.
  • the pixel driving circuit, the method and the display device of the present disclosure use a current amplifying unit to amplify a data current written by a data writing unit in a data writing phase, and charge storage by an amplified data current.
  • the unit is charged, and the charge storage unit is discharged in the pixel lighting stage to illuminate the OLED, so that the OLED can be driven by a small data current, and the time during which the data current is amplified by controlling the current amplifying unit can be adjusted in the pixel lighting stage.
  • the amount of current flowing through the OLED allows the gray scale to be adjusted.
  • FIG. 1 is a circuit diagram of a conventional current-type AMOLED pixel driving circuit
  • FIG. 2 is a structural block diagram of an AMOLED pixel driving circuit according to an embodiment of the present disclosure
  • FIG. 3 is a structural block diagram of an AMOLED pixel driving circuit according to another embodiment of the present disclosure
  • FIG. 5 is a circuit diagram of an AMOLED pixel driving circuit according to still another embodiment of the present disclosure
  • FIG. 6 is a timing chart of an operation signal of an embodiment of the AMOLED pixel driving circuit shown in FIG. 5.
  • the transistors employed in all embodiments of the present disclosure may each be a thin film transistor or a field effect transistor or He has the same features.
  • one of the poles is referred to as a source and the other pole is referred to as a drain.
  • the AMOLED pixel driving circuit of the embodiment of the present disclosure is used to drive an OLED (Organic Light-Emitting Diode), including:
  • a charge storage unit 21 configured to be charged during a data writing phase and discharged during a pixel lighting phase to illuminate the OLED;
  • a data writing unit 22 configured to write a data current Idata in a data writing phase
  • the illuminating control unit 23 is configured to control the connection between the charge storage unit 21 and the OLED during the pixel lighting phase;
  • a current amplifying unit 24 for amplifying the data current ata in the data writing phase and charging the charge storage unit 21 by the amplified data current Idata.
  • the AMOLED pixel driving circuit is a current-type AMOLED pixel driving circuit, which uses a current amplifying unit to amplify a data current written by a data writing unit in a data writing phase, and a charge current through the amplified data current.
  • the storage unit is charged, and the charge storage unit is discharged in the pixel lighting stage to illuminate the OLED, so that the OLED can be driven by a small data current, and the time during which the data current is amplified by controlling the current amplifying unit can be adjusted.
  • the current amplifying unit may amplify the data current at all times of the data writing phase and charge the charge storage unit through the amplified data current; or may select the portion in the data writing phase according to the gray scale requirement The time charges the charge storage unit by the amplified data current.
  • the data writing phase may be divided into a current amplifying phase and a direct charging phase;
  • the current amplifying unit amplifies a data current in a current amplification phase and the data writing unit charges the charge storage unit by an amplified data current, the data writing unit further transmitting the data in a direct charging phase Current charges the charge storage unit directly.
  • connection point between the data writing unit 22 and the charge storage unit 21 is a write node N1;
  • the current amplifying unit includes a current amplification control module 241 and a t ⁇ example current mirror 242, wherein The current amplification control module 241 is configured to turn on a connection between the write node N1 and the current input terminal IN of the proportional current mirror 242 at all time or part of a data writing phase; The current output end of the mirror 242 is connected to the write node ;;
  • the proportional current mirror 242 is configured to amplify the data current Idata
  • a proportional current mirror is used to amplify the data current Idata, since the proportional current mirror can amplify the current without being affected by the process and temperature, further ensuring the stability of the display picture.
  • the data writing unit includes: a data writing transistor ⁇ , a » pole access data writing control signal Gate, a first pole accessing the data current Idata, and a second pole
  • the write node N1 is connected;
  • the current amplification control module includes:
  • Amplifying the control transistor TC the base thereof is connected to the writing node N1, and the first pole is connected to the current amplification control signal Gatel;
  • TI and TIC are PMOS transistors (p-channel metal oxide semiconductor field effect transistors). In actual operation, TI and TIC may also select all or a layer of OS tubes. The pin connection and control signals need to be adjusted accordingly.
  • the timing of Gate1 may be the same as the timing of the Gate.
  • the current amplification control module turns on the write node N1 and the proportional current mirror at all times of the data writing phase. a connection between current input terminals IN of 242;
  • Gatel timing can also be different from Gate's timing.
  • Gate control TC and TIC When Gate control TC and TIC are turned on, Gater controls TC to turn on during part of the time. During the rest of the time, Gatel controls TC to turn off, and current amplification control module writes data. A portion of the phase turns on the connection between the write node N1 and the current input IN of the proportional current mirror 242.
  • the proportional current mirror includes an input branch and an output branch; and the input branch includes:
  • a first PMOS transistor TP1 having a first pole connected to a high level output terminal ELVDD of the driving power source; as well as
  • a first NM0S transistor having a gate connected to the first pole of the first NMOS transistor, a first pole connected to a low level output ELVSS of the driving power source, and a second pole to the first PM0 transistor TP1 Second pole connection;
  • the second NMOS transistor TN1 is second to the current input terminal IN of the proportional current mirror; the output branch includes:
  • a second PMOS transistor TP2 having a gate connected to a » pole of the first PMOS transistor TP1, a first pole connected to a high level output terminal ELVDD of the driving power source, and a second pole and the second PMOS transistor TP2 Gate connection;
  • a second NMOS transistor 2 having a gate connected to a gate of the first NMOS transistor, a first current output terminal of the proportional current mirror, a second pole and a second pole of the second PMOS transistor TP2 connection.
  • the charge storage unit includes a storage capacitor C and a resistor R connected in parallel with each other;
  • One end of the storage capacitor C is connected to the write node N1, and the other end of the storage capacitor C is connected to the low-level output terminal ELVSS of the driving power source;
  • the illumination control unit includes a driving transistor DTFT
  • the driving transistor DTFT has a gate connected to the light emission control signal EM, a first pole is connected to the writing node N1, and a second pole is connected to an anode of the 0LED;
  • the cathode of the 0 LED is connected to the low level output terminal ELVSS of the driving power supply.
  • the DTFT is a PMOS transistor. In actual operation, the DTFT can also be an NMOS transistor;
  • the N2 point is a node connected to the drain of TP 1, and the N3 point is a node connected to the gate of TN1.
  • the aspect ratio of the second PMOS transistor TP2 is equal to the width to length ratio of the second NMOS transistor TN2; the aspect ratio of the first PMOS transistor TPi is The width and length ratio of the first NM0S tube TN1 are equal;
  • the timing of the Gate is the same as that of Gate 1, that is, the current during the data write phase.
  • the amplifying unit amplifies the data current and charges the charge storage unit by the amplified data current.
  • the appropriate bias voltage is applied at points N2 and N3 so that TP1, TP2, TNI and TN2 all operate in the saturation region, and Iref and lout are almost independent of ELVDD, which can avoid fluctuations due to power supply voltage.
  • the flicker caused by the unstable current ensures the stability of the display screen;
  • Gate and Gatel are high level signals
  • EM is low level signal
  • TI is low level signal
  • TIC and TC are turned off
  • DTFT is turned on
  • the storage capacitor is discharged to illuminate the OLED.
  • the turn-on time of the TC can be controlled by adjusting the timing of the Gate1, thereby controlling lout, and the gray scale can be adjusted.
  • the number of tubes is relatively large, and is suitable for top emission, but since the output current of the proportional current mirror is only related to the ratio of the width to length ratio of the MOS tube, the MOS tube The size can be made small and does not take up a lot of space. It can be applied to OLED-on silicon (micro-display technology).
  • the present disclosure also provides an AMOLED pixel driving method, which should be used in the above AMOLED pixel driving circuit, including:
  • the data writing unit writes the data current
  • the current amplifying unit amplifies the data current and charges the charge storage unit through the amplified data current;
  • the illumination control unit controls the connection of the charge storage unit to the OLED, and the charge storage unit discharges to illuminate the OLED.
  • the data writing phase includes a current amplifying phase and a direct charging phase
  • the current amplifying unit amplifies a data current
  • the data writing unit Charging the charge storage unit with an amplified data current
  • the data writing unit directly charges the charge storage unit by the data current.
  • the present disclosure also provides a display device including an OLED and the AMOLED pixel driving circuit described above, the AMOLED pixel driving circuit for driving the OLED.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

一种AMOLED像素驱动电路、方法和显示装置。所述AMOLED像素驱动电路，用于驱动有机发光二极管OLED，包括：电荷存储单元（21），用于在数据写入阶段（T1）被充电并在像素点亮阶段（T2）放电以点亮所述OLED；用于在数据写入阶段（T1）写入数据电流的数据写入单元（22）；发光控制单元（23），用于在像素点亮阶段（T2）控制导通所述电荷存储单元（21）和所述OLED的连接；所述AMOLED像素驱动电路还包括电流放大单元（24），其用于在数据写入阶段（T1）放大数据电流，并通过放大后的数据电流对所述电荷存储单元（21）充电。

Description

AMOLED像素驱动电路、 方法和显示装置
本申请主张在 2014 年 4 月 18 日在中国提交的中国专利申请号 No. 20141 0158960.0的优先权， 其全部内容通过引用包含于此。
尤其涉及一种 AMOLED ( Active
Matrix/Organic Light Emitting Diode ；有机发光二极管） 像素驱动电
电流型 AMOLED像素驱动电路直接采用电流型信号进行像素电路的驱 动， OLED的亮度和驱动电流的大小成正比， 可以实现多级灰阶的显示。
如图 1所示，现有的电流型 AMOLED像素驱动电路包括驱动晶体管 TP1、 数据写入晶体管 TP2和存储单元， TP 1和 TP2为 PMOS管， 所述存储单元包 括相互并联的存储电容 C和电阻 R， 在数据写入阶段， 接入 TP2的栅极的数 据写入控制信号 Gate为低电平， TP2导通， Idata通过 TP2对存储电容 C进 行充电； 在像素点亮阶段， 接入 TP 1的栅极的发光控制信号 EM为低电平， TP 1 导通， C放电以点亮 OLED， OLED的阴极与驱动电源的低电平输出端 ELVSS连接。 现有的电流型 AMOLED像素驱动电路需要一定大小的驱动电 流才能够驱动 OLED， 并且由于在数据写入阶段对存储电容充电的量固定， 在此过程中无法对该充电量进行调节， 因此无法调节灰阶。
本公开的主要目的在于提供一种 AMOLED像素驱动电路、 方法和显示 装置， 以通过很小的数据电流就可以驱动 OLED， 并且可以通过调节在像素 点亮阶段流过 OLED的电流的大小来调节灰阶。
为了达到上述目的， 本公开提供了一种像素驱动电路， 用于驱动有机发 光光二二极极管管 OOLLEEDD，， 包包括括：： 电电荷荷存存储储单单元元，， ffiffi于于在在数数据据写写入入阶阶段段被被充充电电并并在在像像 素素点点亮亮阶阶段段放放电电以以点点亮亮所所述述 OOLLEEDD;; 数数据据写写入入单单元元，， ffiffi于于在在数数据据写写入入阶阶段段写写 入入数数据据电电流流；； 发发光光控控制制单单元元，， 用用于于在在像像素素点点亮亮阶阶段段控控制制导导通通所所述述电电荷荷存存储储单单 元元和和所所述述 OOLLEEDD的的连连接接；；所所述述 AAMMOOLLEEDD像像素素驱驱动动电电路路还还包包括括电电流流放放大大单单元元，， 其其用用于于在在数数据据写写入入阶阶段段放放大大数数据据电电流流，， 并并通通过过放放大大后后的的数数据据电电流流对对所所述述电电荷荷 存存储储单单元元充充电电。。
实实施施时时，， 电电流流放放大大单单元元在在数数据据写写入入阶阶段段的的全全部部时时间间放放大大数数据据电电流流，， 并并通通 过过放放大大后后的的数数据据电电流流对对电电荷荷存存储储单单元元充充电电。。
实实施施时时，， 电电路路放放大大单单元元根根据据灰灰阶阶的的要要求求选选择择在在数数据据写写入入阶阶段段的的部部分分时时间间 通通过过放放大大后后的的数数据据电电流流对对电电荷荷存存储储单单元元充充电电。。
实实施施时时，， 所所述述数数据据写写入入阶阶段段包包括括电电流流放放大大阶阶段段和和直直接接充充电电阶阶段段；； 在在电电流流放放大大阶阶段段，， 所所述述电电流流放放大大单单元元放放大大数数据据电电流流并并且且所所述述数数据据写写入入单单 元元通通过过放放大大的的数数据据电电流流对对所所述述电电荷荷存存储储单单元元充充电电，， 在在直直接接充充电电阶阶段段，， 所所述述数数 据据写写入入单单元元还还用用于于通通过过所所述述数数据据电电流流直直接接对对所所述述电电荷荷存存储储单单元元充充电电。。
实实施施时时，， 所所述述数数据据写写入入单单元元和和所所述述电电荷荷存存储储单单元元的的连连接接点点为为写写入入节节点点；； 所所述述电电流流放放大大单单元元包包括括电电流流放放大大控控制制模模块块和和比比例例电电流流镜镜，， 其其中中，， 所所述述电电流流放放大大控控制制模模块块，， 用用于于在在数数据据写写入入阶阶段段的的全全部部时时间间或或部部分分时时间间导导 通通所所述述写写入入节节点点与与所所述述比比例例电电流流镜镜的的电电流流输输入入端端之之间间的的连连接接；；
所所述述比比例例电电流流镜镜的的电电流流输输出出端端与与所所述述写写入入节节点点连连接接；；
所所述述比比例例电电流流镜镜，， 用用于于对对所所述述数数据据电电流流进进行行放放大大。。
实实施施时时，， 所所述述数数据据写写入入单单元元包包括括：： 数数据据写写入入晶晶体体管管，， 栅栅极极接接入入数数据据写写入入 控控制制信信号号，， 第第一一极极接接入入所所述述数数据据电电流流，， 第第二二极极与与所所述述写写入入节节点点连连接接。。
Figure imgf000004_0001
放放大大控控制制三三极极管管，， 基基极极与与所所述述写写入入节节点点连连接接，， 第第一一极极接接入入电电流流放放大大控控制制 写入控制晶体管， 栅极接入所述数据写入控制信号， 第一极与所述比例 电流镜的电流输入端连接， 第二极与所述放大控制三极管的第二极连接。
实施时， 电流放大控制信号和数据写入控制信号的时序相同或不同。 实施时， 所述数据写入晶体管和写入控制晶体管为 PMOS管。 实施时， 所述数据写入晶体管和写入控制晶体管的一个或全部为 NMOS 管。
实施时， 所述比例电流镜包括输入支路和输出支路；
所述输入支路包括：
第一 PMOS管， 第一极与驱动电源的高电平输出端连接； 以及， 第一 NMOS管， 櫥极与所述第一 NMOS管的第一极连接， 第一极与驱 动电源的低电平输出端连接， 第二极与所述第一 PMOS管的第二极连接； 所述第一 NMOS管的第二极为所述比例电流镜的电流输入端；
所述输出支路包括：
第二 PMOS管， 栅极与所述第一 PMOS管的栅极连接， 第一极与所述驱 动电源的高电平输出端连接，第二极与所述第二 PMOS管的栅极连接；以及， 第二 NMOS管， 櫥极与所述第一 NMOS管的栅极连接， 第一极为所述 电流输出端， 第二极与所述第二 PMOS管的第二极连接。
实施时，所述第二 PMOS管的宽长比与所述第二 NMOS管的宽长比相等； 所述第一 PMOS管的宽长比与所述第一 NMOS管的宽长比相等；
所述第二 PMOS管的宽长比为所述第一 PMOS管的宽长比的 K倍， K大 于 i。
实施时， 所述发光控制单元包括驱动晶体管； 所述驱动晶体管的栅极接 入发光控制信号，第一极与所述写入节点连接，第二极与 0LED 的阳极连接; 0LED的阴极与驱动电源的低电平输出端连接。
实施时， 所述电荷存储单元包括相互并联的存储电容和电阻；
所述存储电容， 一端与所述写入节点连接， 另一端与所述驱动电源的低 电平输出端连接。
本公开还提供了一种像素驱动方法， 包括：
在数据写入阶段， 数据写入单元写入数据电流；
在数据写入阶段的全部时间或部分时间， 电流放大单元放大所述数据电 流， 并通过放大后的数据电流对电荷存储单元充电；
在像素点亮阶段，发光控制单元控制导通电荷存储单元与 0LED的连接， 电荷存储单元放电以点亮所述 0LED。 实施时， 所述数据写入阶段包括电流放大阶段和直接充电阶段； 在电流放大阶段， 所述电流放大单元放大数据电流， 所述数据写入单元 通过放大的数据电流对所述电荷存储单元充电；
在直接充电阶段， 所述数据写入单元通过所述数据电流直接对所述电荷 存储单元充电。
本公开还提供了一种显示装置， 包括 OLED和上述的像素驱动电路， 所 述像素驱动电路^于驱动所述 OLED。
与现有技术相比， 本公开所述的像素驱动电路、 方法和显示装置， 采用 电流放大单元在数据写入阶段放大数据写入单元写入的数据电流， 通过放大 后的数据电流对电荷存储单元充电， 在像素点亮阶段电荷存储单元放电以点 亮 OLED, 从而通过很小的数据电流就可以驱动 OLED， 并且通过控制电流 放大单元对数据电流进行放大的时间， 可以调节在像素点亮阶段流过 OLED 的电流的大小， 从而可以调节灰阶。
图 1是现有的电流型 AMOLED像素驱动电路的电路图；
图 2是本公开实施例所述的 AMOLED像素驱动电路的结构框图； 图 3是本公开另一实施例所述的 AMOLED像素驱动电路的结构框图； 图 4是本公开又一实施例所述的 AMOLED像素驱动电路的结构图； 图 5是本公开再一实施例所述的 AMOLED像素驱动电路的电路图； 图 6是如图 5所示的 AMOLED像素驱动电路的实施例的工作信号时序 图。
下面将结合本公开实施例中的附图， 对本公开实施例中的技术方案进行 清楚、 完整地描述， 显然， 所描述的实施例仅仅是本公开一部分实施例， 而 不是全部的实施例。 基于本公开中的实施例， 本领域普通技术人员在没有做 出创造性劳动前提下所获得的所有其他实施例， 都属于本公开保护的范围。
本公开所有实施例中采用的晶体管均可以为薄膜晶体管或场效应管或其 他特性相同的器件。 在本公开实施例中， 为区分晶体管除栅极之外的两极， 将其中一极称为源极， 另一极称为漏极。
如图 2所示， 本公开实施例所述的 AMOLED像素驱动电路， 用于驱动 OLED (Organic Light- Emitting Diode, 有机发光二极管）， 包括：
电荷存储单元 21， 用于在数据写入阶段被充电并在像素点亮阶段放电以 点亮所述 OLED;
数据写入单元 22， 用于在数据写入阶段写入数据电流 Idata;
发光控制单元 23， 用于在像素点亮阶段控制导通所述电荷存储单元 21 和所述 OLED的连接；
以及， 电流放大单元 24， 其用于在数据写入阶段放大数据电流 ata， 并 通过放大后的数据电流 Idata对所述电荷存储单元 21充电。
本公开实施例所述的 AMOLED像素驱动电路， 是一种电流型 AMOLED 像素驱动电路， 采用电流放大单元在数据写入阶段放大数据写入单元写入的 数据电流， 通过放大后的数据电流对电荷存储单元充电， 在像素点亮阶段电 荷存储单元放电以点亮 OLED，从而通过很小的数据电流就可以驱动 OLED, 并—巨.通过控制电流放大单元对数据电流进行放大的时间， 可以调节在像素点 亮阶段流过 OLED的电流的大小， 从而可以调节灰阶。
在以上实施例中， 电流放大单元可以在数据写入阶段的全部时间放大数 据电流， 并通过放大后的数据电流对电荷存储单元充电； 也可以根据灰阶的 要求选择在数据写入阶段的部分时间通过放大后的数据电流对电荷存储单元 充电。
具体的， 当电流放大单元在数据写入阶段的部分时间放大数据电流时， 可以将所述数据写入阶段划分为电流放大阶段和直接充电阶段；
所述电流放大单元在电流放大阶段放大数据电流并且所述数据写入单元 通过放大的数据电流对所述电荷存储单元充电， 所述数据写入单元还) ¾于在 直接充电阶段通过所述数据电流直接对所述电荷存储单元充电。
具体的， 如图 3所示， 所述数据写入单元 22和所述电荷存储单元 21的 连接点为写入节点 N1 ;
所述电流放大单元包括电流放大控制模块 241和 t匕例电流镜 242,其中， 所述电流放大控制模块 241， 用于在数据写入阶段的全部时间或部分时 间导通所述写入节点 N1与所述比例电流镜 242的电流输入端 IN之间的连接； 所述比例电流镜 242的电流输出端与所述写入节点 ΝΊ连接；
所述比例电流镜 242 , 用于放大数据电流 Idata;
在如图 3所示的实施例中， 釆用了比例电流镜来放大数据电流 Idata， 由 于比例电流镜能够放大电流而 ϋ不受工艺和温度的影响， 进一步保证了显示 画面的稳定性。
具体的， 如图 4所示， 所述数据写入单元包括： 数据写入晶体管 ΤΙ， 其 »极接入数据写入控制信号 Gate , 第一极接入所述数据电流 Idata， 第二极与 所述写入节点 N1连接；
所述电流放大控制模块包括：
放大控制三极管 TC， 其基极与所述写入节点 Nl连接， 第一极接入电流 放大控制信号 Gatel ;
写入控制晶体管 TIC， 其栅极接入所述数据写入控制信号 Gate， 第一极 与所述比例电流镜 242的电流输入端 IN连接，第二极与所述放大控制三极管 TC的第二极连接。
在如图 4所示的实施例中， TI和 TIC为 PMOS管 （p沟道金属氧化物半 导体场效应晶体管），在实际操作时， TI和 TIC也可以全部或择一选用層 OS 管， 只需相应调整管脚连接及控制信号即可。
在如图 4所示的实施例中， Gatel的时序可以和 Gate的时序相同，此时， 电流放大控制模块在数据写入阶段的全部时间导通所述写入节点 N1 与所述 比例电流镜 242的电流输入端 IN之间的连接；
Gatel的时序也可以和 Gate的时序不同， 即当 Gate控制 TC和 TIC导通 时，在部分时间内 Gatel控制 TC导通，在其余的时间内 Gatel控制 TC关闭， 电流放大控制模块在数据写入阶段的部分时间导通所述写入节点 N1 与所述 比例电流镜 242的电流输入端 IN之间的连接。
具体的， 如图 5所示， 所述比例电流镜包括输入支路和输出支路； 所述输入支路包括：
第一 PMOS管 TP1，其第一极与驱动电源的高电平输出端 ELVDD连接； 以及
第一 NM0S管 ΤΉΊ , 其栅极与所述第一 NM0S管 ΤΝΊ的第一极连接， 第一极与驱动电源的低电平输出端 ELVSS 连接， 第二极与所述第一 PM0S 管 TP1的第二极连接；
所述第一 NM0S管 TN1的第二极为所述比例电流镜的电流输入端 IN; 所述输出支路包括：
第二 PM0S管 TP2 , 其栅极与所述第一 PM0S管 TP1的 »极连接， 第一 极与所述驱动电源的高电平输出端 ELVDD连接， 第二极与所述第二 PM0S 管 TP2的栅极连接； 以及
第二 NM0S管 ΤΉ2 , 其栅极与所述第一 NM0S管 ΤΝΊ的栅极连接， 第 一极为所述比例电流镜的电流输出端， 第二极与所述第二 PM0S管 TP2的第 二极连接。
所述电荷存储单元包括相互并联的存储电容 C和电阻 R;
所述存储电容 C的一端与所述写入节点 N1连接， 所述存储电容 C的另 一端与驱动电源的低电平输出端 ELVSS连接；
所述发光控制单元包括驱动晶体管 DTFT;
所述驱动晶体管 DTFT , 栅极接入发光控制信号 EM， 第一极与所述写入 节点 N1连接， 第二极与 0LED 的阳极连接；
0LED的阴极与驱动电源的低电平输出端 ELVSS连接。
在如图 5所示的实施例中， DTFT为 PMOS管， 在实际操作时， DTFT 也可以选用 NMOS管；
N2点是与 TP 1的欐极连接的节点， N3点是与 TN1的栅极连接的节点。 在如图 5所示的实施例中， 所述第二 PMOS管 TP2的宽长比与所述第二 NM0S管 TN2的宽长比相等； 所述第一 PMOS管 TPi的宽长比与所述第一 NM0S管 TN1的宽长比相等；
所述第二 PMOS管 TP2的宽长比为所述第一 PMOS管 TP i的宽长比的 K 倍， K大于 1， 则由 Iout=KIref， 其中， lout为比例电流镜的输出电流， Iref 为比例电流镜的输入电流。
如图 6所示， Gate的时序和 Gate 1的时序相同， 即在数据写入阶段电流 放大单元放大数据电流，并通过放大后的数据电流对电荷存储单元进行充电。 如图 5所示的 AMOLED像素驱动电路在工作时，
在数据写入阶段 Tl， Gate和 Gate〗为低电平信号， EM为高电平信号， TI、 TIC和 TC开启， DTFT关闭， 首先： [data通过 TI输入 TC的基极， TC对 ata进行第一步的放大， 比例电流镜的输入电流 Iref为 N X Idata， 比例电流 镜的输出电流 lout为 KXN X Idaia, lout对存储电容 C充电， 其中 N为 TC 的放大倍数；
在数据写入阶段 T1，在 N2点和 N3点加合适的偏置电压使得 TP1、TP2、 TNI和 TN2全部工作在饱和区， 此时 Iref和 lout几乎与 ELVDD无关， 能避 免由于电源电压波动引起的电流不稳定引起的闪烁， 保证了显示画面的稳定 性；
在像素点亮阶段 T2， Gate和 Gatel为高电平信号， EM为低电平信号， TI、 TIC和 TC关闭， DTFT开启， 存储电容放电以点亮 OLED。
在实际操作时， 可以通过调节 Gatel的时序来控制 TC的导通时间，进而 控制 lout, 能够调节灰阶。
如图 5所述的 AMOLED像素驱动电路的实施例中管子数目较多， 较适 )¾于顶发射，但是由于比例电流镜的输出电流只与 MOS管的宽长比的比例有 关， 因此 MOS管的尺寸可以做的很小， 不会占用很多空间， 可以应用于单晶 硅衬底 OLED- on silicon (硅基有机发光二极管） 微型显示技术。
本公开还提供了一种 AMOLED像素驱动方法， 应) ¾于上述的 AMOLED 像素驱动电路， 包括：
在数据写入阶段， 数据写入单元写入数据电流；
在数据写入阶段， 电流放大单元放大所述数据电流， 并通过放大后的数 据电流对电荷存储单元充电；
在像素点亮阶段，发光控制单元控制导通电荷存储单元与 OLED的连接， 电荷存储单元放电以点亮所述 OLED。
具体的， 当电流放大单元在数据写入阶段的部分时间放大数据电流时， 所述数据写入阶段包括电流放大阶段和直接充电阶段；
在电流放大阶段， 所述电流放大单元放大数据电流， 所述数据写入单元 通过放大的数据电流对所述电荷存储单元充电；
在直接充电阶段， 所述数据写入单元通过所述数据电流直接对所述电荷 存储单元充电。
本公开还提供了一种显示装置， 包括 OLED和上述的 AMOLED像素驱 动电路， 所述 AMOLED像素驱动电路用于驱动所述 OLED。
以上所述是本公开的优选实施方式， 应当指出， 对于本技术领域的普通 技术人员来说， 在不脱离本公开所述原理的前提下， 还可以作出若千改进和 润饰， 这些改进和润饰也应视为本公开的保护范围。

Claims

一种像素驱动电路， ^于驱动有机发光二极管 0LED， 包括： 电荷存储单元， 用于在数据写入阶段被充电并在像素点亮阶段放电以点 亮所述 OLED;
数据写入单元， ^于在数据写入阶段写入数据电流；
发光控制单元， 用于在像素点亮阶段控制导通所述电荷存储单元和所述 OLED的连接； 以及
电流放大单元， 用于在数据写入阶段放大数据电流， 并通过放大后的数 据电流对所述电荷存储单元充电。
2、 如权利要求 1所述的像素驱动电路， 其中， 电流放大单元在数据写入 阶段的全部时间放大数据电流， 并通过放大后的数据电流对电荷存储单元充 电。
3、 如权利要求 1所述的像素驱动电路， 其中， 电路放大单元根据灰阶的 要求选择在数据写入阶段的部分时间通过放大后的数据电流对电荷存储单元 充电。
4、 如权利要求 3所述的像素驱动电路， 其中， 所述数据写入阶段包括电 流放大阶段和直接充电阶段；
在电流放大阶段， 所述电流放大单元放大数据电流并且所述数据写入单 元通过放大的数据电流对所述电荷存储单元充电， 在直接充电阶段， 所述数 据写入单元还用于通过所述数据电流直接对所述电荷存储单元充电。
5、 如权利要求 1-4中任一项所述的像素驱动电路， 其中，
所述数据写入单元和所述电荷存储单元的连接点为写入节点；
所述电流放大单元包括电流放大控制模块和比例电流镜， 其中， 所述电流放大控制模块， 用于在数据写入阶段的全部时间或部分时间导 通所述写入节点与所述比例电流镜的电流输入端之间的连接；
所述比例电流镜的电流输出端与所述写入节点连接；
所述比例电流镜， 用于对所述数据电流进行放大。
6、 如权利要求 5所述的像素驱动电路， 其中， 所述数据写入单元包括： 数据写入晶体管，其栅极接入数据写入控制信号，第一极接入所述数据电流， 第二极与所述写入节点连接。
Ί、 如权利要求 6所述的像素驱动电路， 其中， 所述电流放大控制模块包 括：
放大控制三极管， 其基极与所述写入节点连接， 第一极接入电流放大控 制信号；
写入控制晶体管， 其栅极接入所述数据写入控制信号， 第一极与所述比 例电流镜的电流输入端连接， 第二极与所述放大控制三极管的第二极连接。
8、 如权利要求 7所述的像素驱动电路， 其中，
电流放大控制信号和数据写入控制信号的时序相同或不同。
9、 如权利要求 7所述的像素驱动电路， 其中，
所述数据写入晶体管和写入控制晶体管为 PMOS管。
10、 如权利要求 7所述的像素驱动电路， 其中，
所述数据写入晶体管和写入控制晶体管的一个或全部为 NMOS管。
11、 如权利要求 5- 10中任一项所述的像素驱动电路， 其中， 所述比例电 流镜包括输入支路和输出支路；
所述输入支路包括：
第一 PMOS管， 第一极与驱动电源的高电平输出端连接； 以及
第一丽 OS管, 其栅极与所述第一 NMOS管的第一极连接， 第一极与 驱动电源的低电平输出端连接， 第二极与所述第一 PMOS管的第二极连接； 所述第一 NMOS管的第二极为所述比例电流镜的电流输入端；
所述输出支路包括；
第::二 PMOS管， 其栅极与所述第一 PMOS管的栅极连接， 第一极与所述 驱动电源的高电平输出端连接， 第二极与所述第二 PMOS管的栅极连接； 以 及
第二 NMOS管， 其栅极与所述第一 NMOS管的栅极连接， 第一极为所 述电流输出端， 第二极与所述第二 PMOS管的第二极连接。
12、如权利要求 11所述的像素驱动电路， 其中， 所述第二 PMOS管的宽 长比与所述第二 NMOS管的宽长比相等；所述第一 PMOS管的宽长比与所述 第一 NMOS管的宽长比相等；
所述第二 PM0S管的宽长比为所述第一 PM0S管的宽长比的 K倍， K大 于 1。
13、 如权利要求】 12中任一项所述的像素驱动电路， 其中， 所述发光控 制单元包括驱动晶体管；
所述驱动晶体管的栅极接入发光控制信号，第一极与所述写入节点连接， 第二极与 OLED 的阳极连接；
OLED的阴极与驱动电源的低电平输出端连接。
14、 如权利要求 1至 13中任一权利要求所述的像素驱动电路， 其中， 所 述电荷存储单元包括相互并联的存储电容和电阻；
所述存储电容， 一端与所述写入节点连接， 另一端与所述驱动电源的低 电平输出端连接。
15、 一种像素驱动方法， 包括：
在数据写入阶段， 数据写入单元写入数据电流；
在数据写入阶段， 电流放大单元放大所述数据电流， 并通过放大后的数 据电流对电荷存储单元充电；
在像素点亮阶段，发光控制单元控制导通电荷存储单元与 OLED的连接， 电荷存储单元放电以点亮所述 OLED。
16、 如权利要求 15所述的像素驱动方法， 其中，
所述数据写入阶段包括电流放大阶段和直接充电阶段；
在电流放大阶段， 所述电流放大单元放大数据电流， 所述数据写入单元 通过放大的数据电流对所述电荷存储单元充电；
在直接充电阶段， 所述数据写入单元通过所述数据电流直接对所述电荷 存储单元充电。
17、 一种显示装置， 其特征在于， 包括 OLED和如权利要求 1至 14所述 的像素驱动电路， 所述像素驱动电路) ¾于驱动所述 OLED。
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