WO2015154538A1 - 存储器的启动方法及装置 - Google Patents

存储器的启动方法及装置 Download PDF

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Publication number
WO2015154538A1
WO2015154538A1 PCT/CN2014/095687 CN2014095687W WO2015154538A1 WO 2015154538 A1 WO2015154538 A1 WO 2015154538A1 CN 2014095687 W CN2014095687 W CN 2014095687W WO 2015154538 A1 WO2015154538 A1 WO 2015154538A1
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Prior art keywords
boot
physical address
nand
memory
startup
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PCT/CN2014/095687
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English (en)
French (fr)
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沈楠科
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中兴通讯股份有限公司
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Publication of WO2015154538A1 publication Critical patent/WO2015154538A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/445—Program loading or initiating
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operation

Definitions

  • the present invention relates to the field of memory startup technologies, and in particular, to a memory startup method and apparatus.
  • Boot needs to complete the minimum initialization of the system hardware, and load the system program code to the location where the system program code is running; finally, Boot gives control to the system program, so that the CPU from the system program The entry point begins execution.
  • Boot supports more and more features.
  • Boot online upgrade function becomes more necessary.
  • the main purpose of the present invention is to implement startup control, especially the startup control of the NAND-Flash dual boot boot, to avoid the problem that the initial boot area cannot be upgraded at the same time, and improve the stability of the system operation.
  • a startup method that includes:
  • the target physical address is a physical address read by the CPU by default, sending a first signal sent by the CPU to the NAND-Flash interface through the logic device to the memory, where the first signal includes the target physical address,
  • the memory returns a first boot boot corresponding to the target physical address; the system reads the first boot boot and starts according to the first boot boot;
  • the target physical address is not the physical address read by the CPU by default, parsing a second signal sent by the CPU to the NAND-Flash interface via the logic device, where the second signal includes a NAND to be accessed An address of the flash memory; thereafter, translating the second signal according to the target physical address, and transmitting the translated second signal to the memory, the memory returning a number corresponding to the target physical address Second booting; the system reads the second boot boot and starts according to the second boot boot.
  • the second signal is translated according to the target physical address, and the translated second signal is sent to the NAND-Flash memory, and the NAND-Flash memory returns with the target
  • the second boot boot corresponding to the physical address, and then the booting according to the second boot boot includes:
  • the NAND-Flash memory Replacing an address of the NAND-Flash memory to be accessed in the second signal with the target physical address, and transmitting a second signal after the replacement address to the NAND-Flash memory, the NAND-Flash memory Returning a second boot boot corresponding to the target physical address, and then starting according to the second boot boot.
  • the method further includes:
  • the system sends the CPU to the logic device through the logic device according to the stop translation instruction
  • a second signal of the NAND-Flash interface is sent to the memory to continue reading the second boot boot, and booting according to the second boot boot.
  • the method further includes:
  • the method further includes:
  • the method before the step of parsing the second signal sent by the CPU to the NAND-Flash interface by the logic device, the method further includes:
  • the second signal is sent to the memory, so that the CPU reads the preset non-boot related storage data.
  • An activation device includes an acquisition module, a first determination module, a first startup control module, and a second startup control module, wherein:
  • the obtaining module is configured to: when the system is started, acquire a preset startup flag and a physical address table for starting the booting;
  • the first determining module is configured to: obtain a target physical address corresponding to the startup flag according to the startup flag and a physical address table that initiates booting, and determine whether the target physical address is a physical address read by a CPU by default;
  • the first startup control module is configured to: when the target physical address corresponding to the startup flag is When the CPU reads the physical address by default, a first signal sent by the CPU to the NAND-Flash interface through the logic device is sent to the memory, the first signal includes the target physical address, and the memory returns with the target Corresponding first booting of the physical address; the system reads the first booting boot and starts according to the first booting boot;
  • the second startup control module is configured to: when the target physical address corresponding to the startup flag is not a physical address read by the CPU, send the second to the NAND-Flash interface by the CPU through the logic device
  • the signal is parsed, the second signal includes an address of the NAND-Flash memory to be accessed; thereafter, the second signal is translated according to the target physical address, and the translated second signal is sent to the memory
  • the memory returns a second boot boot corresponding to the target physical address; the system reads the second boot boot and initiates according to the second boot boot.
  • the second startup control module is configured to translate the second signal according to the target physical address, and send the translated second signal to the NAND flash memory.
  • the NAND-Flash memory returns a second boot boot corresponding to the target physical address, and then starts according to the second boot boot:
  • the NAND-Flash memory Replacing an address of the NAND-Flash memory to be accessed in the second signal with the target physical address, and transmitting a second signal after the replacement address to the NAND-Flash memory, the NAND-Flash memory Returning a second boot boot corresponding to the target physical address, and then starting according to the second boot boot.
  • the apparatus further includes a receiving module, wherein:
  • the receiving module is configured to: receive a stop translation instruction sent by the CPU after acquiring the first block of the second booting;
  • the second startup control module is further configured to: send, according to the stop translation instruction, a second signal sent by the CPU to the NAND-Flash interface by using the logic device to the memory, to continue reading The second booting is initiated according to the second booting.
  • the device further includes a second determining module and a control module, wherein:
  • the second determining module is configured to: determine whether the system startup is successful
  • the control module is configured to: when the system startup is unsuccessful, modify the startup flag, and restart Move the system to switch the boot.
  • the device further includes a downloading module, a processing module, and a modifying module, where:
  • the download module is set to: when the system starts successfully, and the system has an update, download the image file and start the boot;
  • the processing module is configured to: update the boot boot used by the non-current boot according to the downloaded boot boot;
  • the modification module is configured to: when the update is successful, modify the startup flag and the physical address table of the booting to control the system to perform the next startup according to the updated startup boot; when the update fails, the startup flag is not modified and started.
  • the physical address table for the boot is configured to: when the update is successful, modify the startup flag and the physical address table of the booting to control the system to perform the next startup according to the updated startup boot; when the update fails, the startup flag is not modified and started.
  • the apparatus further includes a third determining module, wherein:
  • the third determining module is configured to: determine whether the target physical address is an illegal startup address
  • the first startup control module is further configured to: when the target address is an illegal startup address, send the belonging second signal to the memory, so that the CPU reads the preset non-boot related storage data.
  • a computer program comprising program instructions that, when executed by a computer, cause the computer to perform the method of booting any of the above-described memories.
  • a carrier carrying the computer program A carrier carrying the computer program.
  • the preset startup flag and the physical address table for starting the boot are obtained, so as to determine whether the target physical address corresponding to the startup flag is a specific physical address read by the CPU by default, thereby Start booting or booting with the second boot boot, thereby implementing the boot control of the NAND-Flash dual boot boot. Since the NAND-Flash memory-based address translation method is used to map the boot device, the entire boot of the NAND-Flash can be upgraded without the need to additionally set the initial boot area, thereby avoiding the initial boot area. The problem of being upgraded at the same time improves the stability and stability of the system operation. Avant-garde.
  • FIG. 1 is a schematic flow chart of a first embodiment of a method for starting a memory according to the present invention
  • FIG. 2 is a schematic flow chart of a second embodiment of a method for starting a memory according to the present invention
  • FIG. 3 is a schematic flow chart of a third embodiment of a method for starting a memory according to the present invention.
  • FIG. 4 is a schematic flow chart of a fourth embodiment of a method for starting a memory according to the present invention.
  • FIG. 5 is a schematic diagram of functional modules of a first embodiment of a boot device for a memory according to the present invention.
  • FIG. 6 is a schematic diagram of functional modules of a second embodiment of a boot device for a memory according to the present invention.
  • FIG. 7 is a schematic diagram of functional modules of a third embodiment of a boot device for a memory according to the present invention.
  • FIG. 8 is a schematic diagram of functional modules of a fourth embodiment of a memory activation device according to the present invention.
  • FIG. 9 is a schematic diagram of functional modules of a fifth embodiment of a boot device for a memory according to the present invention.
  • the embodiment of the present invention provides a method for starting a memory.
  • the method for starting the memory includes:
  • Step S10 when the system is started, acquiring a preset startup flag and a physical address table for starting the booting;
  • the booting method of the memory provided in this embodiment is applied to start control of an electronic product, and specifically, the system of the electronic product runs in a hardware environment including a processor (CPU), a logic device (FPGA or CPLD), and a NAND-Flash memory. .
  • the preset boot flag and the physical address table for booting boot may be stored in the flash inside the logic device or the non-insertion of the logic device Volatile memory.
  • the booting boot includes a first boot boot (Boot1) and a second boot boot (Boot2) stored in the NAND-Flash memory, and the first boot boot stores the first block stored in the NAND-Flash memory (ie, block0).
  • the second boot boot is stored in other blocks of the NAND-Flash memory.
  • the NAND-Flash memory is divided into three areas, two of which are Boot areas, which store mutually alternate Boots, and the other partitions store image files (large version files) and other information.
  • the physical address table for starting booting is to start the address information in the NAND-Flash memory, and the physical address table may be only the address information corresponding to the second booting, or may include the address information corresponding to the first booting boot. Address information corresponding to the second boot guide.
  • the above startup flag is identification information for determining whether to start with the first boot boot or the second boot boot. It should be noted that the above CPU can access the startup flag and the physical address table in the internal Flash or the external nonvolatile memory of the logic device through the control interface, and simultaneously provide the NAND-Flash interface to the logic device.
  • the interface that the CPU accesses can be various types, such as interfaces in the form of IIC, LOCAL-BUS, SPI, etc. The type of the specific interface depends on the CPU.
  • Step S11 Obtain a target physical address corresponding to the startup flag according to the startup flag and a physical address table for starting booting; the target physical address is an actual physical address corresponding to the booting boot.
  • step S12 it is determined whether the target physical address is a physical address read by the CPU by default; if yes, step S13 is performed, and if no, step S14 is performed.
  • the physical address read by the CPU by default is generally block 0 of the NAND-Flash memory. If the target physical address is the physical address read by the CPU by default, it is required to start with the first boot boot, because the block0 stores the first Start the boot.
  • the actual physical address corresponding to the boot boot that is currently started is determined according to the boot flag and the physical address table for starting the boot.
  • the step includes: indexing to the actual physical address in the physical address table of the booting according to the boot flag.
  • Step S13 sending, by the logic device, a first signal including the target physical address sent to the NAND-Flash interface by the logic device to the NAND-Flash memory, where the NAND-Flash memory returns a corresponding physical address corresponding to the target First booting, then according to the first Boot to start;
  • the logic device is serially connected between the CPU and the NAND-Flash interface.
  • Step S14 parsing a second signal that is sent by the logic device to the NAND-Flash interface and including an address of the NAND-Flash memory to be accessed by the logic device, and then, the second signal according to the target physical address.
  • Translating, transmitting the translated second signal to the NAND-Flash memory, the NAND-Flash memory returns a second booting boot corresponding to the target physical address, and then performing according to the second booting start up.
  • the second signal is translated according to the target physical address, and the translated second signal is sent to the NAND-Flash memory, and the NAND-Flash memory returns with the target physical address.
  • Corresponding second booting, and then starting according to the second booting booting comprises:
  • the NAND-Flash memory Replacing an address of the NAND-Flash memory to be accessed in the second signal with the target physical address, and transmitting a second signal after the replacement address to the NAND-Flash memory, the NAND-Flash memory Returning a second boot boot corresponding to the target physical address, and then starting according to the second boot boot.
  • the first boot is stored in the block 0 (as the start address) stored in the NAND-Flash memory
  • the second boot guides the block 1 stored in the NAND-Flash memory (as the start address, which may actually be A detailed description is made within the legally distinguishable block of any of the blocks:
  • the CPU transmits the signal outputted by the CPU through the NAND-Flash interface of the logic device, and the logic device forwards the signal to the NAND-Flash memory, thereby reading the NAND- The first boot boot in block 0 of the flash memory, the CPU will boot boot according to the first boot boot.
  • the NAND-Flash interface connected to the CPU and the CPU, when receiving the signal output by the CPU, parses the signal by the logic device, and according to the target physical address pair signal Translation of the address signal to translate the target physical address as the address signal; then send the converted signal to The NAND-Flash memory is read to the second boot boot in block 1, and the CPU will boot boot according to the second boot boot. After the boot is completed, the above image file will be loaded to complete the normal startup of the system.
  • the preset startup flag and the physical address table for starting the boot are obtained, so as to determine whether the target physical address corresponding to the startup flag is a physical address read by the CPU by default, thereby starting with the first
  • the boot is booted or booted with the second boot boot, thereby implementing the boot control of the NAND-Flash dual boot boot. Since the method based on NAND-Flash memory address translation is introduced into the booting method, the entire boot on the NAND-Flash can be upgraded without additionally setting an initial boot area, which can prevent the initial boot area from being simultaneously upgraded. The problem is to improve the stability and convenience of the system operation.
  • the method further includes:
  • Step S15 receiving a stop translation instruction sent by the CPU when acquiring the first block of the second booting boot
  • Step S16 according to the stop translation instruction, send a second signal sent by the CPU to the NAND-Flash interface through the logic device to the NAND-Flash memory to continue reading the second boot guide, according to the The second boot boot is initiated.
  • the CPU when booting with the second boot boot, the CPU performs boot boot after reading the first block that obtains the second boot boot, and after the first block is normally read and run, the logic device stops.
  • the CPU accesses the NAND-Flash in the normal order to continue reading the rest of the second boot boot.
  • step S13 and step S14 further include
  • Step S17 determining whether the system startup is successful
  • step S18 when the system startup is unsuccessful, the startup flag is modified, and the system is restarted to switch the booting.
  • the manner of determining whether the system startup is successful may be set according to actual needs.
  • Shorten the waiting time caused by the fault. Set the fast and slow timers respectively.
  • the first timer expires (shorter time) after the boot starts it is judged whether there is a fault in the startup. If there is a fault, flip it to Another boot starts; if there is no fault, when the second timer expires (longer time) after the boot starts, it is judged whether there is a fault. When the fault occurs, it flips to another boot.
  • the method further includes:
  • Step S19 when the system is successfully started, and the system has an update, downloading the image file and starting the boot;
  • Step S20 according to the downloaded startup boot update, the boot boot adopted by the non-current boot;
  • Step S21 when the update is successful, modify the startup flag and the boot physical address table to control the system to perform the next boot according to the updated boot boot; when the update fails, the boot flag is not modified and the boot boot is not performed. Physical address table.
  • the image file is downloaded and booting is started. After the download is completed, the image file update in the NAND-Flash memory is replaced with the downloaded image file, and the current non-boot boot is updated (the boot boot to be downloaded is stored in other blocks of the NAND-Flash memory) .
  • the logic device receives the instruction sent by the CPU, and modifies the boot flag and the boot physical address table according to the update information provided in the instruction of the CPU, so as to control the system to start according to the updated boot boot at the next startup. If the boot update is unsuccessful, the boot address and the boot physical address table are not modified.
  • the method further includes:
  • Step S22 determining whether the target physical address is an illegal startup address; if yes, executing step S13, otherwise performing step S23.
  • Step S23 sending a signal received by the logic device and the NAND-Flash interface connected to the CPU to the NAND-Flash memory, so that the CPU reads the preset non-boot related storage data.
  • the illegal boot address is a physical address that does not exist in the NAND-Flash memory, or the address does not store boot boot in the NAND-Flash memory. At this time, the address signal in the signal is not translated, and the signal is directly transmitted.
  • the embodiment of the present invention further provides a booting device for a memory.
  • the booting device of the memory includes:
  • the obtaining module 100 is configured to: when the system is started, acquire a preset startup flag and a physical address table for starting the booting;
  • the boot device of the memory is applied to boot control of an electronic product, and in particular, the system of the electronic product runs in a hardware environment including a processor (CPU), a logic device (FPGA or CPLD), and a NAND-Flash memory.
  • the preset boot flag and the bootable physical address table may be stored in a flash inside the logic device or in a non-volatile memory external to the logic device.
  • the booting boot includes a first boot boot (Boot1) and a second boot boot (Boot2) stored in the NAND-Flash memory, and the first boot boot stores the first block stored in the NAND-Flash memory (ie, block0). As the starting address, the second booting is stored in other blocks of the NAND-Flash memory.
  • the NAND-Flash memory is divided into three areas, two of which are Boot areas, and the spare Boots are stored, and the other is Partitions store image files (large version files) and other information.
  • the physical address table for starting booting is to start the address information in the NAND-Flash memory, and the physical address table may be only the address information corresponding to the second booting, or may include the address information corresponding to the first booting boot. Address information corresponding to the second boot guide.
  • the above startup flag is identification information for determining whether to boot with the first boot or the second boot.
  • the above CPU can access the startup flag and the physical address table in the internal Flash or the external nonvolatile memory of the logic device through the control interface, and simultaneously provide the NAND-Flash interface to the logic device.
  • the interface that the CPU accesses can be various types. For example, interfaces such as IIC, LOCAL-BUS, and SPI, the type of the specific interface depends on the CPU.
  • the first determining module 110 is configured to: obtain a target physical address corresponding to the startup flag according to the startup flag and a physical address table that initiates booting, and determine whether the target physical address is a physical address read by a CPU by default;
  • the physical address read by the CPU by default is generally block 0 of the NAND-Flash memory. According to the startup flag, whether the booting is started by the first boot boot or the booting by the second boot boot, according to the boot flag and the physical address of the boot boot. The table obtains the actual physical address corresponding to the boot boot that is determined to be started this time.
  • the first startup control module 120 is configured to: when the target physical address corresponding to the startup flag is a physical address read by the CPU by default, send the CPU to the NAND-Flash interface by using the logical device to include the target physical address. Sending a signal to the NAND-Flash memory, the NAND-Flash memory returns a first booting boot corresponding to the target physical address, and then starting according to the first booting boot;
  • the second startup control module 130 is configured to: when the target physical address corresponding to the startup flag is not the physical address read by the CPU, access to the NAND-Flash interface sent by the CPU through the logic device needs to be accessed.
  • the second signal of the address of the NAND-Flash memory is parsed, and then the second signal is translated according to the target physical address, and the translated second signal is sent to the NAND-Flash memory.
  • the NAND-Flash memory returns a second boot boot corresponding to the target physical address, and then starts according to the second boot boot.
  • the second startup control module 130 is configured to translate the second signal according to the target physical address, and send the translated second signal to the NAND flash memory.
  • the NAND-Flash memory returns a second boot boot corresponding to the target physical address, and then starts according to the second boot boot:
  • the NAND-Flash memory Replacing an address of the NAND-Flash memory to be accessed in the second signal with the target physical address, and transmitting a second signal after the replacement address to the NAND-Flash memory, the NAND-Flash memory Returning a second boot boot corresponding to the target physical address, and then starting according to the second boot boot.
  • the first boot is stored in the block 0 (as the start address) stored in the NAND-Flash memory
  • the second boot guides the block 1 stored in the NAND-Flash memory (as the start address; It is a legal, non-block0 block that can store Boots.
  • the signal of the interface between the logic device and the NAND-Flash connected to the CPU is directly forwarded to the NAND-Flash memory, thereby reading the first of the block 0 of the NAND-Flash memory.
  • Boot is started, and the CPU will boot according to the first boot boot.
  • the startup flag corresponds to the second booting
  • the signal sent by the CPU between the interface between the logic device and the NAND-Flash connected to the CPU is collected by the logic device, and the signal is parsed, and then according to the target physical address pair.
  • the address signal in the signal is translated, thereby transmitting the target physical address as the above address signal to the NAND-Flash memory, thereby reading the second boot boot in block 1.
  • the above image file will be loaded to complete the normal startup of the system.
  • the preset startup flag and the physical address table for starting the boot are obtained, so as to determine whether the target physical address corresponding to the startup flag is a physical address read by the CPU by default, thereby starting with the first
  • the boot is booted or booted with the second boot boot, thereby implementing the boot control of the NAND-Flash dual boot boot. Since the method based on NAND-Flash memory address translation is introduced into the boot device, the entire boot on the NAND-Flash can be upgraded without the need to additionally set the initial boot area, so that the initial boot area cannot be upgraded at the same time. The problem is to improve the stability and convenience of the system operation.
  • the device for starting the memory further includes:
  • the receiving module 140 is configured to: receive a stop translation instruction sent by the CPU when acquiring the first block of the second booting;
  • the second startup control module 130 is further configured to: send, according to the stop translation instruction, a second signal sent by the CPU to the NAND-Flash interface through the logic device to the NAND-Flash memory to continue reading The second booting is initiated according to the second booting.
  • the CPU when starting with the second booting, the CPU sends a stop translation instruction to the logic device after reading the first block that obtains the second booting, and the receiving module 140 of the logic device receives the After the translation command is stopped, the translation of the address signal will be stopped. Specifically, the CPU reads the first block in the boot code from the Boot area, and performs Boot boot. After reading and running, the logic device stops translating the address signal, and the CPU accesses the NAND-Flash in the normal order. Continue reading the rest of the second boot boot.
  • the device for starting the memory further includes:
  • the second determining module 150 is configured to: determine whether the system startup is successful;
  • the control module 160 is configured to: when the system startup is unsuccessful, modify the startup flag, and restart the system to switch the boot boot.
  • the manner of determining whether the system startup is successful may be set according to actual needs.
  • fast and slow timers are set respectively.
  • the first timer timing shorter time
  • the Boot starts it is judged whether there is a fault in the startup. If there is a fault, it is flipped. If another fault occurs, if the second timer expires (longer time) after the boot starts, it is judged whether there is a fault. When the fault occurs, it flips to another boot.
  • the device for starting the memory further includes:
  • the download module 170 is configured to: when the system starts successfully, and the system has an update, download the image file and start booting;
  • the processing module 180 is configured to: according to the downloaded boot boot update, use the boot boot that is not the current boot, that is, store the downloaded boot boot to the NAND-Flash memory. In the address area;
  • the modifying module 190 is configured to: when the update is successful, modify the startup flag and the boot physical address table to control the system to restart according to the updated boot boot; when the update fails, the boot flag is not modified and started.
  • the physical address table for the boot is configured to: when the update is successful, modify the startup flag and the boot physical address table to control the system to restart according to the updated boot boot; when the update fails, the boot flag is not modified and started.
  • the image file is downloaded and booting is started. After the download is completed, the image file update in the NAND-Flash memory is replaced with the downloaded image file, and the non-current boot boot is updated, and the boot boot that is to be downloaded is stored in the legal block of the NAND-Flash memory.
  • the logic device receives the instruction sent by the CPU, and modifies the boot flag and the boot physical address table according to the update information provided by the instruction of the CPU, so as to control the system to start according to the updated boot boot at the next startup. That is, after the startup flag is modified, the physical address corresponding to the modified startup flag is the physical address of the updated boot boot stored in the NAND-Flash memory. If it is unsuccessful, the boot address and the boot physical address table are not modified.
  • the device for starting the memory further includes:
  • the third determining module 200 is configured to: determine whether the target physical address is an illegal startup address
  • the first startup control module 120 is further configured to: when the target address is an illegal startup address, send a first signal sent by the CPU to the NAND-Flash interface through the logic device to be sent to the NAND-Flash memory, so that The CPU reads the preset non-boot related storage data.
  • the illegal boot address may be a physical address that does not exist in the NAND-Flash memory, or the address does not store boot boot in the NAND-Flash memory. At this time, the address signal in the signal is not translated, and the signal is directly transmitted.
  • the startup method and apparatus of the embodiments of the present invention may be applied to any dual boot boot memory, and may be applied to NAND-Flash memory, and may be applied to any other system that can implement the present invention. Narration.
  • the preset startup flag and the physical address table for starting the boot are obtained, so as to determine whether the target physical address corresponding to the startup flag is a physical address read by the CPU by default, thereby starting with the first
  • the boot is booted or booted with the second boot boot, thereby implementing the boot control of the NAND-Flash dual boot boot. Since the NAND-Flash memory-based address translation method is used to map the boot device, the entire boot of the NAND-Flash can be upgraded without the need to additionally set the initial boot area, thereby avoiding the initial boot area. The problem of being upgraded at the same time improves the stability and convenience of the system operation. Therefore, the present invention has strong industrial applicability.

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Abstract

一种基于NAND-Flash的双启动引导的启动方法包括:在***启动时，获取预置的启动标志及启动引导的物理地址表（S10）;获得启动标志对应的目标物理地址（S11），判断目标物理地址是否为CPU默认读取的物理地址（S12）; 若则将逻辑器件接收到的信号直接发送至NAND-Flash存储器（S13）;若否则将逻辑器件接收到的信号中地址信号解析后按照目标物理地址进行翻译，将翻译后的信号发送至NAND-Flash存储器（S14）。还公开了一种存储器的启动装置，实现了NAND-Flash双启动引导的启动控制，避免了初始引导区不能被同时升级的问题，提高了***运行的稳定性与便捷性。

Description

存储器的启动方法及装置 技术领域
本发明涉及存储器的启动技术领域，尤其涉及一种存储器的启动方法及装置。
背景技术
作为操作***的引导程序，Boot要完成对***硬件的最小初始化，并且把***程序代码加载到***程序代码运行时所处的位置；最后Boot将控制权交给***程序，使CPU从***程序的入口点开始执行。在许多应用场合中，Boot支持的功能越来越多。为了在***原有的Boot上合入功能和解决相关的bug，Boot在线升级功能变得尤为必要。
为了防止Boot升级中由于新版本的Boot不能正常工作而导致***故障，一般需要将升级前的Boot保留来进行备份。这样就要求在存储器中要有两个Boot，也就是双Boot，并且两个Boot可以自动切换。目前比较常见的Boot存储器一般是NOR-Flash存储器，由于NOR-Flash存储器相对NAND-Flash存储器而言，NOR-Flash存储器的单位存储容量所对应的成本高，以及容量相对小等特点，NAND-Flash存储器更有优势。
上述内容仅用于辅助理解本发明的技术方案，并不代表承认上述内容是现有技术。
发明内容
本发明的主要目的在于实现启动控制，尤其是NAND-Flash双启动引导的启动控制，避免初始引导区不能被同时升级的问题，提高***运行的稳定性。
为实现上述目的，采用如下技术方案：
一种启动方法，包括：
当所述存储器所在的***启动时，获取预置的启动标志及启动引导的物理地址表；
根据所述启动标志及所述启动引导的物理地址表，获得所述启动标志对应的目标物理地址；
判断所述目标物理地址是否为CPU默认读取的物理地址；
若所述目标物理地址是CPU默认读取的物理地址，则将CPU通过逻辑器件发送到NAND-Flash接口的第一信号发送至所述存储器，所述第一信号包含所述目标物理地址，所述存储器返回与所述目标物理地址相应的第一启动引导；所述***读取所述第一启动引导，并根据第一启动引导进行启动；
若所述目标物理地址不是CPU默认读取的物理地址，则对所述CPU经过所述逻辑器件发送到所述NAND-Flash接口的第二信号进行解析，所述第二信号包含需要访问的NAND-Flash存储器的地址；之后，按照所述目标物理地址对所述第二信号进行翻译，将翻译后的第二信号发送至所述存储器中，所述存储器返回与所述目标物理地址相应的第二启动引导；所述***读取所述第二启动引导，并根据所述第二启动引导进行启动。
可选地，所述按照所述目标物理地址对所述第二信号进行翻译，将翻译后的所述第二信号发送至所述NAND-Flash存储器，所述NAND-Flash存储器返回与所述目标物理地址相应的第二启动引导，之后根据所述第二启动引导进行启动的步骤包括：
将所述第二信号中的需要访问的NAND-Flash存储器的地址替换为所述目标物理地址，并将替换地址后的第二信号发送至所述NAND-Flash存储器中，所述NAND-Flash存储器返回与所述目标物理地址相应的第二启动引导，之后根据所述第二启动引导进行启动。
可选地，所述将翻译后的所述第二信号发送至所述存储器中的步骤之后，该方法还包括：
接收CPU在获取所述第二启动引导的第一个block时发送的停止翻译指令；
所述***根据所述停止翻译指令，将所述CPU通过所述逻辑器件发送到 所述NAND-Flash接口的第二信号发送至所述存储器中，以继续读取所述第二启动引导，根据所述第二启动引导进行启动。
可选地，在根据第一启动引导启动后或根据第二启动引导启动的步骤之后，该方法还包括：
判断***启动是否成功；
当***启动不成功时，修改启动标志，并重新启动***，以切换启动引导。
可选地，所述判断启动是否成功的步骤之后，该方法还包括：
当***启动成功，且***存在更新时，下载映像文件和启动引导；
根据下载的启动引导更新非当前启动所采用的启动引导；
当更新成功时，修改所述启动标志及启动引导的物理地址表，以控制***按照更新后的启动引导进行下次启动；当更新失败时，不修改所述启动标志及启动引导的物理地址表。
可选地，在对所述CPU经过所述逻辑器件发送到所述NAND-Flash接口的第二信号进行解析的步骤之前，该方法还包括：
判断所述目标物理地址是否为非法启动地址；
当所述目标物理地址为非法启动地址时，则将所述第二信号发送至所述存储器，以使CPU读取预设的非启动相关的存储数据。
一种启动装置，所述装置包括获取模块、第一判断模块、第一启动控制模块和第二启动控制模块，其中：
所述获取模块设置成：在***启动时，获取预置的启动标志及启动引导的物理地址表；
所述第一判断模块设置成：根据所述启动标志及启动引导的物理地址表，获得所述启动标志对应的目标物理地址，并判断所述目标物理地址是否为CPU默认读取的物理地址；
所述第一启动控制模块设置成：当所述启动标志对应的目标物理地址为 CPU默认读取的物理地址时，将CPU通过逻辑器件发送到NAND-Flash接口的第一信号发送至所述存储器，所述第一信号包含所述目标物理地址，所述存储器返回与所述目标物理地址相应的第一启动引导；所述***读取所述第一启动引导，并根据第一启动引导进行启动；
所述第二启动控制模块设置成：当所述启动标志对应的目标物理地址不是CPU默认读取的物理地址时，对所述CPU经过所述逻辑器件发送到所述NAND-Flash接口的第二信号进行解析，所述第二信号包含需要访问的NAND-Flash存储器的地址；之后，按照所述目标物理地址对所述第二信号进行翻译，将翻译后的第二信号发送至所述存储器中，所述存储器返回与所述目标物理地址相应的第二启动引导；所述***读取所述第二启动引导，并根据所述第二启动引导进行启动。
可选地，所述第二启动控制模块设置成按照如下方式按照所述目标物理地址对所述第二信号进行翻译，将翻译后的所述第二信号发送至所述NAND-Flash存储器，所述NAND-Flash存储器返回与所述目标物理地址相应的第二启动引导，之后根据所述第二启动引导进行启动：
将所述第二信号中的需要访问的NAND-Flash存储器的地址替换为所述目标物理地址，并将替换地址后的第二信号发送至所述NAND-Flash存储器中，所述NAND-Flash存储器返回与所述目标物理地址相应的第二启动引导，之后根据所述第二启动引导进行启动。
可选地，该装置还包括接收模块，其中：
所述接收模块设置成：接收所述CPU在获取第二启动引导的第一个block后发送的停止翻译指令；
所述第二启动控制模块还设置成：根据所述停止翻译指令，将所述CPU通过所述逻辑器件发送到所述NAND-Flash接口的第二信号发送至所述存储器中，以继续读取所述第二启动引导，根据所述第二启动引导进行启动。
可选地，该装置还包括第二判断模块和控制模块，其中：
所述第二判断模块设置成：判断***启动是否成功；
所述控制模块设置成：当***启动不成功时，修改启动标志，并重新启 动***，以切换启动引导。
可选地，该装置还包括下载模块、处理模块和修改模块，其中：
下载模块设置成：当***启动成功，且***存在更新时，下载映像文件和启动引导；
处理模块设置成：根据下载的启动引导更新非当前启动所采用的启动引导；
修改模块设置成：当更新成功时，修改所述启动标志及启动引导的物理地址表，以控制***按照更新后的启动引导进行下次启动；当更新失败时，不修改所述启动标志及启动引导的物理地址表。
可选地，该装置还包括第三判断模块，其中：
所述第三判断模块设置成：判断所述目标物理地址是否为非法启动地址；
所述第一启动控制模块还设置成：当所述目标地址为非法启动地址时，将所属第二信号发送至所述存储器中，以使CPU读取预设的非启动相关的存储数据。
一种计算机程序，包括程序指令，当该程序指令被计算机执行时，使得该计算机可执行上述任意的存储器的启动方法。
一种载有所述计算机程序的载体。
本发明实施例通过在***启动时，获取预置的启动标志及启动引导的物理地址表，以判断所述启动标志对应的目标物理地址是否为CPU默认读取的特定物理地址，从而以第一启动引导进行启动或以第二启动引导进行启动，进而实现了NAND-Flash双启动引导的启动控制。由于是采用基于NAND-Flash存储器的地址翻译的方法来映射启动引导(Boot)的存储装置，因此可以对NAND-Flash上整个Boot进行升级，不需要额外设置初始引导区，可以避免初始引导区不能被同时升级的问题，提高了***运行的稳定性与便 捷性。
附图概述
图1为本发明存储器的启动方法的第一实施例的流程示意图；
图2为本发明存储器的启动方法的第二实施例的流程示意图；
图3为本发明存储器的启动方法的第三实施例的流程示意图；
图4为本发明存储器的启动方法的第四实施例的流程示意图；
图5为本发明存储器的启动装置的第一实施例的功能模块示意图；
图6为本发明存储器的启动装置的第二实施例的功能模块示意图；
图7为本发明存储器的启动装置的第三实施例的功能模块示意图；
图8为本发明存储器的启动装置的第四实施例的功能模块示意图；
图9为本发明存储器的启动装置的第五实施例的功能模块示意图。
本发明目的的实现、功能特点及优点将结合实施例，参照附图做进一步说明。
本发明的较佳实施方式
应当理解，此处所描述的具体实施例仅仅用以解释本发明，并不用于限定本发明。
本发明实施例提供了一种存储器的启动方法，参照图1，在第一实施例中，该存储器的启动方法包括：
步骤S10，在***启动时，获取预置的启动标志及启动引导的物理地址表；
本实施例提供的存储器的启动方法应用于电子产品的启动控制，具体地，该电子产品的***运行于包括处理器(CPU)、逻辑器件(FPGA或者CPLD)以及NAND-Flash存储器的硬件环境中。上述预置的启动标志及启动引导的物理地址表可储存于所述逻辑器件内部的Flash中或所述逻辑器件外挂的非 易失存储器中。上述启动引导(Boot)包括存储于NAND-Flash存储器中的第一启动引导(Boot1)和第二启动引导(Boot2)，该第一启动引导储存于NAND-Flash存储器的第一个block(即block0，作为起始地址)，第二启动引导储存于NAND-Flash存储器的其他block中。具体地，NAND-Flash存储器划分为三个区，其中两个是Boot区，存放互为备用的Boot，另外的分区存放映像文件(大版本文件)及其他信息。
上述启动引导的物理地址表为启动引导在所述NAND-Flash存储器中的地址信息，具体该物理地址表可以仅为第二启动引导对应的地址信息，也可以包括第一启动引导对应的地址信息和第二启动引导对应的地址信息。
上述启动标志为用于确定以第一启动引导启动还是以第二启动引导启动的标识信息。应当说明的是，上述CPU可以通过控制接口访问逻辑器件的内部Flash或外挂非易失存储器中的启动标志和物理地址表，同时向逻辑器件提供NAND-Flash接口。CPU进行访问的接口可以是各种类型的，比如IIC、LOCAL-BUS、SPI等形式的接口，具体接口的类型依赖于CPU。
步骤S11，根据所述启动标志及启动引导的物理地址表，获得所述启动标志对应的目标物理地址；该目标物理地址就是启动引导所对应的实际物理地址。
步骤S12，判断所述目标物理地址是否为CPU默认读取的物理地址；若是，则执行步骤S13，若否，则执行步骤S14。
上述CPU默认读取的物理地址一般为NAND-Flash存储器的block0，如果所述目标物理地址是CPU默认读取的物理地址，则说明需要用第一启动引导来启动，因为block0中存储有第一启动引导。
根据该启动标志和启动引导的物理地址表确定本次进行启动的启动引导对应的实际物理地址。可选地，该步骤包括：根据启动标志索引到启动引导的物理地址表中的实际物理地址。
步骤S13，将CPU通过逻辑器件发送到NAND-Flash接口的包含所述目标物理地址的第一信号发送至所述NAND-Flash存储器中，所述NAND-Flash存储器返回与所述目标物理地址相应的第一启动引导，之后根据所述第一启 动引导进行启动；
逻辑器件串接在CPU与NAND-Flash接口之间。
根据启动引导进行启动的方法属于现有技术，在此不再赘述。
步骤S14，对CPU经过所述逻辑器件发送到所述NAND-Flash接口的包含需要访问的NAND-Flash存储器的地址的第二信号进行解析，之后，按照所述目标物理地址对所述第二信号进行翻译，将翻译后的所述第二信号发送至所述NAND-Flash存储器，所述NAND-Flash存储器返回与所述目标物理地址相应的第二启动引导，之后根据所述第二启动引导进行启动。
可选地，按照所述目标物理地址对所述第二信号进行翻译，将翻译后的所述第二信号发送至所述NAND-Flash存储器，所述NAND-Flash存储器返回与所述目标物理地址相应的第二启动引导，之后根据所述第二启动引导进行启动的步骤包括：
将所述第二信号中的需要访问的NAND-Flash存储器的地址替换为所述目标物理地址，并将替换地址后的第二信号发送至所述NAND-Flash存储器中，所述NAND-Flash存储器返回与所述目标物理地址相应的第二启动引导，之后根据所述第二启动引导进行启动。
本实施例中，以第一启动引导存储于NAND-Flash存储器中的block0(作为起始地址)内，第二启动引导存储于NAND-Flash存储器中的block1(作为起始地址，实际中可以是合法的区别于block0的任一可用块)内做出详细说明：
当上述启动标志对应为第一启动引导时，则CPU通过逻辑器件连接的NAND-Flash接口在接收到CPU输出的信号时，将由逻辑器件对该信号转发至NAND-Flash存储器，从而读取NAND-Flash存储器的block0中的第一启动引导，CPU将根据该第一启动引导进行Boot启动。
当上述启动标志对应为第二启动引导时，则逻辑器件与CPU连接的NAND-Flash接口在接收到CPU输出的信号时，将由逻辑器件对该信号进行解析，并根据上述目标物理地址对信号中的地址信号翻译，从而将目标物理地址作为上述地址信号进行翻译转换；然后将转换后的信号发送给 NAND-Flash存储器，从而读取到block1中的第二启动引导，CPU将根据该第二启动引导进行Boot启动。在Boot启动完成后，将加载上述映像文件，从而完成***的正常启动。
本发明实施例通过在***启动时，获取预置的启动标志及启动引导的物理地址表，以判断所述启动标志对应的目标物理地址是否为CPU默认读取的物理地址，从而以第一启动引导进行启动或以第二启动引导进行启动，进而实现了NAND-Flash双启动引导的启动控制。由于是将基于NAND-Flash存储器地址翻译的方法引入启动引导(Boot)的方法，因此可以对NAND-Flash上整个Boot进行升级，不需要额外设置初始引导区，可以避免初始引导区不能被同时升级的问题，提高了***运行的稳定性与便捷性。
可选地，参照图2，基于上述实施例，本实施例中，上述步骤S14之后还包括：
步骤S15，接收CPU在获取第二启动引导的第一个block时发送的停止翻译指令；
步骤S16，根据所述停止翻译指令，将CPU通过所述逻辑器件发送到NAND-Flash接口的第二信号发送至所述NAND-Flash存储器中，以继续读取所述第二启动引导，根据所述第二启动引导进行启动。
本实施例中，当以第二启动引导进行启动时，CPU在读取获得第二启动引导的第一个block后，进行Boot启动，在第一个block正常读出并运行后，逻辑器件停止对地址信号翻译，CPU按照正常的顺序对NAND-Flash进行访问，以继续读取后续的该第二启动引导其余部分。
可选地，参照图3，基于上述实施例，本实施例中，上述步骤S13和步骤S14之后还包括
步骤S17，判断***启动是否成功；
步骤S18，当***启动不成功时，修改启动标志，并重新启动***，以切换启动引导。
本实施例中，在***启动的过程中可监听启动过程中是否存在故障，当启动存在故障时，切换启动引导，以保证***能够正常启动。具体地在根据第一启动引导启动后或根据第二启动引导启动均需要判断***启动是否成功；应当说明的是，判断***启动是否成功的方式可根据实际需要进设置，本实施例中，为了缩短由于故障导致的等候时间，分别设置了快速与慢速的定时器，当Boot启动后第一定时器定时时间(较短的时间)到达时判断启动是否出现故障，若出现故障，则翻转到另一个Boot启动；若没有出现故障，则当Boot启动后第二定时器定时时间(较长的时间)到达时判断是否出现故障，当出现故障时，翻转到另一个Boot启动。
可选地，基于上述实施例，本实施例中，上述步骤S17之后还包括：
步骤S19，当***启动成功，且***存在更新时，下载映像文件和启动引导；
步骤S20，根据下载的启动引导更新非当前启动所采用启动引导；
步骤S21，当更新成功时，修改所述启动标志及启动引导的物理地址表，以控制***按照更新后的启动引导进行下次启动；当更新失败时，不修改所述启动标志及启动引导的物理地址表。
本实施例中，在***启动成功后，检测到***存在更新时，将下载映像文件和启动引导。下载完成后，将NAND-Flash存储器中的映像文件更新替换为下载的映像文件，同时对当前非启动引导进行更新(即将下载的所述启动引导储存至所述NAND-Flash存储器的其他block中)。如果更新操作成功，逻辑器件接收CPU发送的指令，根据CPU的指令中提供的更新信息修改启动标志和启动引导的物理地址表，以控制***在下次启动时按照更新后的启动引导进行启动。如果引导更新不成功，则不进行修改启动标志和启动引导的物理地址表。
可选地，参照图4，基于上述实施例，本实施例中，执行上述步骤S14之前还包括：
步骤S22，判断所述目标物理地址是否为非法启动地址；若是，则执行步骤S13，否则执行步骤S23。
步骤S23，将逻辑器件与CPU连接的NAND-Flash接口接收到的信号发送至所述NAND-Flash存储器中，以使CPU读取预设的非启动相关的存储数据。
本实施例中，上述非法启动地址，为NAND-Flash存储器中不存在的物理地址，或者该地址在NAND-Flash存储器并非存储有启动引导。此时则不翻译信号中地址信号，将信号直接透传。
本发明实施例还提供一种存储器的启动装置，参照图5，在第一实施例中，存储器的启动装置包括：
获取模块100，设置成：在***启动时，获取预置的启动标志及启动引导的物理地址表；
本实施例提供的存储器的启动装置应用于电子产品的启动控制，具体地该电子产品的***运行于包括处理器(CPU)、逻辑器件(FPGA或者CPLD)以及NAND-Flash存储器的硬件环境中。上述预置的启动标志及启动引导的物理地址表可储存于所述逻辑器件内部的Flash中或所述逻辑器件外挂的非易失存储器中。上述启动引导(Boot)包括存储于NAND-Flash存储器中的第一启动引导(Boot1)和第二启动引导(Boot2)，该第一启动引导储存于NAND-Flash存储器的第一个block(即block0，作为起始地址)，第二启动引导储存于NAND-Flash存储器的其他block中，具体地NAND-Flash存储器划分为三个区，其中两个是Boot区，存放互为备用的Boot，另外的分区存放映像文件(大版本文件)及其他信息。上述启动引导的物理地址表为启动引导在所述NAND-Flash存储器中的地址信息，具体该物理地址表可以仅为第二启动引导对应的地址信息，也可以包括第一启动引导对应的地址信息和第二启动引导对应的地址信息。上述启动标志为用于确定以第一启动引导还是以第二启动引导的标识信息。应当说明的是，上述CPU可以通过控制接口访问逻辑器件的内部Flash或外挂非易失存储器中的启动标志和物理地址表，同时向逻辑器件提供NAND-Flash接口。CPU进行访问的接口可以是各种类型 的，比如IIC、LOCAL-BUS、SPI等形式的接口，具体接口的类型依赖于CPU。
第一判断模块110，设置成：根据所述启动标志及启动引导的物理地址表，获得所述启动标志对应的目标物理地址，并判断所述目标物理地址是否为CPU默认读取的物理地址；
上述CPU默认读取的物理地址一般为NAND-Flash存储器的block0，根据启动标志获得本次是以第一启动引导进行启动还是以第二启动引导进行启动，根据该启动标志和启动引导的物理地址表获取确定本次进行启动的启动引导对应的实际物理地址。
第一启动控制模块120，设置成：当所述启动标志对应的目标物理地址为CPU默认读取的物理地址时，将CPU通过逻辑器件发送到NAND-Flash接口的包含所述目标物理地址的第一信号发送至所述NAND-Flash存储器中，所述NAND-Flash存储器返回与所述目标物理地址相应的第一启动引导，之后根据所述第一启动引导进行启动；
第二启动控制模块130，设置成：当所述启动标志对应的目标物理地址不为CPU默认读取的物理地址时，对CPU经过所述逻辑器件发送到所述NAND-Flash接口的包含需要访问的NAND-Flash存储器的地址的第二信号进行解析，之后，按照所述目标物理地址对所述第二信号进行翻译，将翻译后的所述第二信号发送至所述NAND-Flash存储器，所述NAND-Flash存储器返回与所述目标物理地址相应的第二启动引导，之后根据所述第二启动引导进行启动。
可选地，第二启动控制模块130，设置成按照如下方式按照所述目标物理地址对所述第二信号进行翻译，将翻译后的所述第二信号发送至所述NAND-Flash存储器，所述NAND-Flash存储器返回与所述目标物理地址相应的第二启动引导，之后根据所述第二启动引导进行启动：
将所述第二信号中的需要访问的NAND-Flash存储器的地址替换为所述目标物理地址，并将替换地址后的第二信号发送至所述NAND-Flash存储器中，所述NAND-Flash存储器返回与所述目标物理地址相应的第二启动引导，之后根据所述第二启动引导进行启动。
本实施例中，以第一启动引导存储于NAND-Flash存储器中的block0(作为起始地址)内，第二启动引导存储于NAND-Flash存储器中的block1(作为起始地址；实际实现上可以是合法的、可存放Boot的、非block0的块)内做出详细说明：
当上述启动标志对应为第一启动引导时，则逻辑器件与CPU连接的NAND-Flash之间接口的信号将被直接转发至NAND-Flash存储器，从而读取NAND-Flash存储器的block0中的第一启动引导，CPU将根据该第一启动引导进行Boot启动。当上述启动标志对应为第二启动引导时，则逻辑器件与CPU连接的NAND-Flash之间接口的由CPU发出的信号将由逻辑器件采集，并对该信号进行解析，然后根据上述目标物理地址对信号中的地址信号翻译，从而将目标物理地址作为上述地址信号发送给NAND-Flash存储器，从而读取到block1中的第二启动引导。在Boot启动完成后，将加载上述映像文件，从而完成***的正常启动。
本发明实施例通过在***启动时，获取预置的启动标志及启动引导的物理地址表，以判断所述启动标志对应的目标物理地址是否为CPU默认读取的物理地址，从而以第一启动引导进行启动或以第二启动引导进行启动，进而实现了NAND-Flash双启动引导的启动控制。由于将基于NAND-Flash存储器地址翻译的方法引入启动引导(Boot)的存储装置，因此可以对NAND-Flash上整个Boot进行升级，不需要额外设置初始引导区，可以避免初始引导区不能被同时升级的问题，提高了***运行的稳定性与便捷性。
可选地，参照图6，基于上述实施例，本实施例中，上述存储器的启动装置还包括：
接收模块140，设置成：接收CPU在获取第二启动引导的第一个block时发送的停止翻译指令；
所述第二启动控制模块130，还设置成：根据所述停止翻译指令，将所述CPU通过逻辑器件发送到NAND-Flash接口的第二信号发送至所述NAND-Flash存储器，以继续读取所述第二启动引导，根据所述第二启动引导进行启动。
本实施例中，当以第二启动引导进行启动时，CPU在读取获得第二启动引导的第一个block后，将发送一个停止翻译指令至逻辑器件，逻辑器件的接收模块140在接收到该停止翻译指令后，将会停止对地址信号翻译。具体地CPU从Boot区中读取启动引导代码中的首个block，进行Boot启动，在读出并运行后，逻辑器件停止对地址信号翻译，CPU按照正常的顺序对NAND-Flash进行访问，以继续读取后续的该第二启动引导其余部分。
可选地，参照图7，基于上述实施例，本实施例中，上述存储器的启动装置还包括：
第二判断模块150，设置成：判断***启动是否成功；
控制模块160，设置成：当***启动不成功时，修改启动标志，并重新启动***，以切换启动引导。
本实施例中，在***启动的过程中可监听启动过程中是否存在故障，当启动存在故障时，切换启动引导，以保证***能够正常启动。具体地在根据第一启动引导启动后或根据第二启动引导启动后均需要判断***启动是否成功；应当说明的是，判断***启动是否成功的方式可根据实际需要进设置，本实施例中，为了缩短由于故障导致的等候时间，分别设置了快速与慢速的定时器，当Boot启动后第一定时器定时时间(较短的时间)到达时判断启动是否出现故障，若出现故障，则翻转到另一个Boot启动；若没有出现故障，则当Boot启动后第二定时器定时时间(较长的时间)到达时判断是否出现故障，当出现故障时，翻转到另一个Boot启动。
可选地，参照图8，基于上述实施例，本实施例中，上述存储器的启动装置还包括：
下载模块170，设置成：当***启动成功，且***存在更新时，下载映像文件和启动引导；
处理模块180，设置成：根据下载的启动引导更新非当前的启动所采用启动引导也就是将下载的所述启动引导储存至所述NAND-Flash存储器的物 理地址区域中；
修改模块190，设置成：当更新成功时修改所述启动标志及启动引导的物理地址表，以控制***按照更新后的启动引导进行重新启动；当更新失败时，不修改所述启动标志及启动引导的物理地址表。
本实施例中，在***启动成功后，检测到***存在更新时，将下载映像文件和启动引导。下载完成后，将NAND-Flash存储器中的映像文件更新替换为下载的映像文件，同时对非当前启动引导进行更新，即将下载的所述启动引导储存至所述NAND-Flash存储器的合法block中。如果更新操作成功，则逻辑器件接收CPU发送的指令，根据CPU的指令提供的更新信息修改启动标志和启动引导的物理地址表，以控制***在下次启动时按照更新后的启动引导进行启动。即在修改启动标志后，修改后的启动标志对应的物理地址为更新的启动引导储存在NAND-Flash存储器中的物理地址。如果不成功，则不进行修改启动标志和启动引导的物理地址表。
可选地，参照图9，基于上述实施例，本实施例中，上述存储器的启动装置还包括：
第三判断模块200，设置成：判断所述目标物理地址是否为非法启动地址；
所述第一启动控制模块120，还设置成：当所述目标地址为非法启动地址时，将CPU通过逻辑器件发送到NAND-Flash接口第一信号发送至所述NAND-Flash存储器中，以使CPU读取预设的非启动相关的存储数据。
本实施例中，上述非法启动地址，可以是NAND-Flash存储器中不存在的物理地址，或者该地址在NAND-Flash存储器并非存储有启动引导。此时则不翻译信号中地址信号，将信号直接透传。
可选地，本发明实施例的启动方法和装置可以应用于任意的双启动引导存储器，尤其可以应用于NAND-Flash存储器，也可以应用于其他任何可以实现本发明的其他***，在此不再赘述。
以上仅为本发明的优选实施例，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。
工业实用性
本发明实施例通过在***启动时，获取预置的启动标志及启动引导的物理地址表，以判断所述启动标志对应的目标物理地址是否为CPU默认读取的物理地址，从而以第一启动引导进行启动或以第二启动引导进行启动，进而实现了NAND-Flash双启动引导的启动控制。由于是采用基于NAND-Flash存储器的地址翻译的方法来映射启动引导(Boot)的存储装置，因此可以对NAND-Flash上整个Boot进行升级，不需要额外设置初始引导区，可以避免初始引导区不能被同时升级的问题，提高了***运行的稳定性与便捷性。因此本发明具有很强的工业实用性。

Claims (14)

  1. 一种启动方法，包括：
    当所述存储器所在的***启动时，获取预置的启动标志及启动引导的物理地址表；
    根据所述启动标志及所述启动引导的物理地址表，获得所述启动标志对应的目标物理地址；
    判断所述目标物理地址是否为CPU默认读取的物理地址；
    若所述目标物理地址是CPU默认读取的物理地址，则将CPU通过逻辑器件发送到NAND-Flash接口的第一信号发送至所述存储器，所述第一信号包含所述目标物理地址，所述存储器返回与所述目标物理地址相应的第一启动引导；所述***读取所述第一启动引导，并根据第一启动引导进行启动；
    若所述目标物理地址不是CPU默认读取的物理地址，则对所述CPU经过所述逻辑器件发送到所述NAND-Flash接口的第二信号进行解析，所述第二信号包含需要访问的NAND-Flash存储器的地址；之后，按照所述目标物理地址对所述第二信号进行翻译，将翻译后的第二信号发送至所述存储器中，所述存储器返回与所述目标物理地址相应的第二启动引导；所述***读取所述第二启动引导，并根据所述第二启动引导进行启动。
  2. 如权利要求1所述的存储器的启动方法，所述按照所述目标物理地址对所述第二信号进行翻译，将翻译后的所述第二信号发送至所述NAND-Flash存储器，所述NAND-Flash存储器返回与所述目标物理地址相应的第二启动引导，之后根据所述第二启动引导进行启动的步骤包括：
    将所述第二信号中的需要访问的NAND-Flash存储器的地址替换为所述目标物理地址，并将替换地址后的第二信号发送至所述NAND-Flash存储器中，所述NAND-Flash存储器返回与所述目标物理地址相应的第二启动引导，之后根据所述第二启动引导进行启动。
  3. 如权利要求1或2所述的存储器的启动方法，其中，所述将翻译后的所述第二信号发送至所述存储器中的步骤之后，该方法还包括：
    接收CPU在获取所述第二启动引导的第一个block时发送的停止翻译指 令；
    所述***根据所述停止翻译指令，将所述CPU通过所述逻辑器件发送到所述NAND-Flash接口的第二信号发送至所述存储器中，以继续读取所述第二启动引导，根据所述第二启动引导进行启动。
  4. 如权利要求1或2所述的存储器的启动方法，其中，在根据第一启动引导启动后或根据第二启动引导启动的步骤之后，该方法还包括：
    判断***启动是否成功；
    当***启动不成功时，修改启动标志，并重新启动***，以切换启动引导。
  5. 如权利要求5所述的存储器的启动方法，其中，所述判断启动是否成功的步骤之后，该方法还包括：
    当***启动成功，且***存在更新时，下载映像文件和启动引导；
    根据下载的启动引导更新非当前启动所采用的启动引导；
    当更新成功时，修改所述启动标志及启动引导的物理地址表，以控制***按照更新后的启动引导进行下次启动；当更新失败时，不修改所述启动标志及启动引导的物理地址表。
  6. 如权利要求1或2所述的存储器的启动方法，其中，在对所述CPU经过所述逻辑器件发送到所述NAND-Flash接口的第二信号进行解析的步骤之前，该方法还包括：
    判断所述目标物理地址是否为非法启动地址；
    当所述目标物理地址为非法启动地址时，则将所述第二信号发送至所述存储器，以使CPU读取预设的非启动相关的存储数据。
  7. 一种启动装置，所述装置包括获取模块、第一判断模块、第一启动控制模块和第二启动控制模块，其中：
    所述获取模块设置成：在***启动时，获取预置的启动标志及启动引导的物理地址表；
    所述第一判断模块设置成：根据所述启动标志及启动引导的物理地址表，获得所述启动标志对应的目标物理地址，并判断所述目标物理地址是否为CPU默认读取的物理地址；
    所述第一启动控制模块设置成：当所述启动标志对应的目标物理地址为CPU默认读取的物理地址时，将CPU通过逻辑器件发送到NAND-Flash接口的第一信号发送至所述存储器，所述第一信号包含所述目标物理地址，所述存储器返回与所述目标物理地址相应的第一启动引导；所述***读取所述第一启动引导，并根据第一启动引导进行启动；
    所述第二启动控制模块设置成：当所述启动标志对应的目标物理地址不是CPU默认读取的物理地址时，对所述CPU经过所述逻辑器件发送到所述NAND-Flash接口的第二信号进行解析，所述第二信号包含需要访问的NAND-Flash存储器的地址；之后，按照所述目标物理地址对所述第二信号进行翻译，将翻译后的第二信号发送至所述存储器中，所述存储器返回与所述目标物理地址相应的第二启动引导；所述***读取所述第二启动引导，并根据所述第二启动引导进行启动。
  8. 如权利要求7所述的存储器的启动装置，所述第二启动控制模块设置成按照如下方式按照所述目标物理地址对所述第二信号进行翻译，将翻译后的所述第二信号发送至所述NAND-Flash存储器，所述NAND-Flash存储器返回与所述目标物理地址相应的第二启动引导，之后根据所述第二启动引导进行启动：
    将所述第二信号中的需要访问的NAND-Flash存储器的地址替换为所述目标物理地址，并将替换地址后的第二信号发送至所述NAND-Flash存储器中，所述NAND-Flash存储器返回与所述目标物理地址相应的第二启动引导，之后根据所述第二启动引导进行启动。
  9. 如权利要求7或8所述的存储器的启动装置，该装置还包括接收模块，其中：
    所述接收模块设置成：接收所述CPU在获取第二启动引导的第一个block后发送的停止翻译指令；
    所述第二启动控制模块还设置成：根据所述停止翻译指令，将所述CPU通过所述逻辑器件发送到所述NAND-Flash接口的第二信号发送至所述存储器中，以继续读取所述第二启动引导，根据所述第二启动引导进行启动。
  10. 如权利要求7或8所述的存储器的启动装置，该装置还包括第二判断模块和控制模块，其中：
    所述第二判断模块设置成：判断***启动是否成功；
    所述控制模块设置成：当***启动不成功时，修改启动标志，并重新启动***，以切换启动引导。
  11. 如权利要求7或8所述的存储器的启动装置，该装置还包括下载模块、处理模块和修改模块，其中：
    下载模块设置成：当***启动成功，且***存在更新时，下载映像文件和启动引导；
    处理模块设置成：根据下载的启动引导更新非当前启动所采用的启动引导；
    修改模块设置成：当更新成功时，修改所述启动标志及启动引导的物理地址表，以控制***按照更新后的启动引导进行下次启动；当更新失败时，不修改所述启动标志及启动引导的物理地址表。
  12. 如权利要求7或8所述的存储器的启动装置，该装置还包括第三判断模块，其中：
    所述第三判断模块设置成：判断所述目标物理地址是否为非法启动地址；
    所述第一启动控制模块还设置成：当所述目标地址为非法启动地址时，将所属第二信号发送至所述存储器中，以使CPU读取预设的非启动相关的存储数据。
  13. 一种计算机程序，包括程序指令，当该程序指令被计算机执行时，使得该计算机可执行权利要求1-6中任一项所述的存储器的启动方法。
  14. 一种载有权利要求13所述计算机程序的载体。
PCT/CN2014/095687 2014-07-08 2014-12-30 存储器的启动方法及装置 WO2015154538A1 (zh)

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