WO2015132877A1 - 計算機およびメモリ制御方法 - Google Patents
計算機およびメモリ制御方法 Download PDFInfo
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- WO2015132877A1 WO2015132877A1 PCT/JP2014/055444 JP2014055444W WO2015132877A1 WO 2015132877 A1 WO2015132877 A1 WO 2015132877A1 JP 2014055444 W JP2014055444 W JP 2014055444W WO 2015132877 A1 WO2015132877 A1 WO 2015132877A1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
- G06F12/0842—Multiuser, multiprocessor or multiprocessing cache systems for multiprocessing or multitasking
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
- G06F12/0871—Allocation or management of cache space
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0893—Caches characterised by their organisation or structure
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/10—Providing a specific technical effect
- G06F2212/1016—Performance improvement
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/10—Providing a specific technical effect
- G06F2212/1048—Scalability
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/60—Details of cache memory
- G06F2212/601—Reconfiguration of cache memory
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/60—Details of cache memory
- G06F2212/6042—Allocation of cache space to multiple users or processors
Definitions
- the present invention generally relates to memory control.
- the HDD I / O Input / Output
- a cache technology in which a part of data in the HDD is stored in the DRAM cache area, and when the data to be read exists in the DRAM cache area, the data is read from the cache area instead of the HDD.
- Patent Document 1 Known (Patent Document 1). As a result, when the cache hits, data can be read faster than when reading from the HDD.
- the DRAM has a work area for storing data such as application programs. Since the storage area of the DRAM is finite, a technique is known in which a swap area is provided in the HDD as a save destination of data in the work area in case the work area is insufficient.
- the work area is secured in preference to the cache area. Since an HDD with a swap area has a lower I / O speed than a DRAM as described above, if a swap occurs, an application program needs to be loaded from the HDD to the work area. This is because the performance is degraded. Therefore, it is considered appropriate to prevent the occurrence of swap as much as possible in order to suppress the deterioration of the performance of the entire computer.
- SSD Solid State Drive
- an object of the present invention is to suppress a decrease in the performance of the entire computer by appropriately adjusting the size of the work area on the memory and the size of the cache area.
- a computer includes a first memory, a second memory having an I / O speed slower than the first memory, and a processor connected to the first memory, the second memory, and the storage device.
- the first memory has a work area and a first cache area in which data input / output to / from the storage device is temporarily stored.
- the second memory has a second cache area in which data input / output to / from the storage device is temporarily stored, and a swap area that is a save destination of data stored in the work area.
- the processor reduces the work area and expands the first cache area when the input / output amount, which is the amount of data input / output to / from the storage device, is larger than the predetermined input / output amount.
- the present invention it is possible to appropriately adjust the size of the work area on the memory and the size of the cache area, and it is possible to suppress a decrease in the performance of the entire computer.
- summary of the computer regarding 1st Embodiment It is a block diagram which shows the structural example of the computer regarding 1st Embodiment. It is a block diagram which shows the structural example of the allocation adjustment part regarding 1st Embodiment. An example of the policy information regarding 1st Embodiment is shown. An example of the operation information regarding 1st Embodiment is shown. It is a flowchart which shows an example of the memory adjustment process regarding 1st Embodiment. It is a flowchart which shows an example of the 1st cache area adjustment process regarding 1st Embodiment. It is a flowchart which shows an example of the swap area
- the computer program may be installed from a program source.
- the program source may be a program distribution server or a storage medium (for example, a portable storage medium).
- the first embodiment describes a method of adjusting a work area and a cache area on a memory, and a swap area and a cache area on a swap storage device in a computer.
- FIG. 1 is a schematic diagram illustrating an outline of the operation of the computer 1 relating to the first embodiment.
- the computer 1 includes a processor 3, a first memory 810, and a second memory 820.
- the first memory 810 is a main memory configured by, for example, a DRAM.
- the second memory 820 is a storage device configured by, for example, an SSD. That is, the I / O speed of the first memory 810 is faster than that of the second memory 820.
- the storage area of the first memory 810 has a predetermined size, for example, and includes a system area 811, a work area 812, a first cache area 814, and a free area 813.
- the system area 811 is an area for storing a program related to the OS (Operating System).
- the work area 812 is an area in which an execution program (for example, an application program) executed on the OS and data used by at least one of the OS and the execution program are temporarily stored. In the following description, data stored in the work area 812 may be collectively referred to as “data” regardless of whether it is a program or data used in the program.
- the first cache area 814 is an area in which data input / output to / from the external storage device 830 is temporarily stored.
- the free area 813 is an area other than the system area 811, work area 812, and first cache area 814 in the first storage area.
- the processor 3 can change the sizes of at least the work area 812 and the first cache area 814 in the
- the storage area of the second memory 820 has a predetermined size, for example, and includes a swap area 821 and a second cache area 822.
- the swap area 821 is a data swap area in the work area 812 (that is, a data save destination area in the work area 812).
- the second cache area 822 is an area in which data input / output to / from the external storage device 830 is temporarily stored.
- the data stored in the second cache area 822 is not stored in the first cache area 814.
- the data stored in the first cache area 814 is not stored in the second cache area 822, but the same data is stored in the second cache area 822. It may be stored in both the first cache area 814 and the second cache area 822.
- the processor 3 can change the sizes of the swap area 821 and the second cache area 822.
- the execution program is, for example, an application program executed by the user.
- the processor 3 expands the work area 812 when the work area 812 shows a shortage tendency. However, if the work area 812 still runs short, the processor 3 saves the work area 812 shortage by saving a part of the data (for example, an execution program) in the work area 812 to the swap area 821.
- a part of the data for example, an execution program
- the processor 3 reduces a part of the data stored in the external storage device 830 to the first cache area 814 or the second cache area 822 in order to reduce the I / O amount for the external storage device 830.
- the processor 3 reads the cache data.
- the amount of I / O to the external storage device 830 is reduced. That is, by expanding at least one of the first cache area 814 and the second cache area 822, the cache hit rate is increased and the I / O amount for the external storage device 830 is reduced.
- a swap area is provided in an external storage device 830 (for example, HDD) having a slower I / O speed than that of the first memory 810 (for example, DRAM). It is appropriate not to use the swap space of the device 830 as much as possible.
- the swap area 821 is provided in the second memory 820 (for example, SSD) having an I / O speed slower than the first memory 810 but an I / O speed faster than the external storage device 830.
- the idea of increasing the size of the work area 812 as much as possible is not always appropriate.
- the size of the first cache area 814 of the first memory 810 increases the cache hit rate, thereby reducing the I / O amount for the external storage device 830. Can be reduced.
- Increasing the size of the first cache area 814 of the first memory 810 reduces the size of the work area 812 and increases the possibility that swap will occur in the swap area 821, but as described above, the second memory 820 Since the I / O speed is relatively high, it does not necessarily lead to performance degradation.
- the processor 3 appropriately resizes the work area 812 and the first cache area 814 of the first memory 810 and the swap area 821 and the second cache area 822 of the second memory 820 according to the situation, A method for suppressing a decrease in performance in the computer 1 will be described in detail.
- FIG. 2 is a block diagram illustrating a configuration example of the computer 1 according to the first embodiment.
- the computer 1 includes a memory 2, a processor 3, a device controller 4, and an SSD 6 and an HDD 5 connected to the device controller 4 as hardware.
- the SSD 6 and the HDD 5 may be provided either inside or outside the computer 1.
- the processor 3 executes various operations in accordance with an arithmetic circuit or a computer program, and controls the other elements 2, 4, 5, and 6 to realize various functions of the computer 1.
- the memory 2, the processor 3, and the device controller 4 are connected by an internal bus 11 capable of transmitting data bidirectionally.
- the internal bus 11 is composed of, for example, a memory bus and a PCI-Express bus.
- the HDD 5 which is an example of an external storage device, reads and writes data in accordance with an I / O request from the processor 3.
- the HDD 5 may be another nonvolatile storage device such as an SSD 6.
- the SSD 6 may be, for example, a PRAM (Phase Change RAM), an MRAM (Magnetorescent Random Access Memory), a ReRAM (Resistance Random Access Memory), or a FeRAM (Ferroelectric Memory).
- the device controller 4 controls the SSD 6 and the HDD 5 connected to the device controller 4.
- the device controller 4 has a control function conforming to a connection method such as SATA (Serial ATA), SCSI, iSCSI, or FC (Fibre Channel).
- HDD 5 and SSD 6 may be connected to separate device controllers 4.
- the device controller 4 may be a PCI-Express interface and the SSD 6 may be a flash memory chip.
- the HDD 5 and the SSD 6 may be shared by a plurality of computers 1.
- the memory 2 as an example of the first memory stores a computer program and data used by the processor 3.
- the memory 2 is composed of, for example, DDR3-DRAM, MRAM, or FeRAM.
- the storage area in the memory 2 may be configured by a plurality of pages having a predetermined size.
- the memory 2 has a system area 10, a work area 30, a cache area 20, and a free area 40.
- the system area 10 holds programs related to the OS.
- the OS includes an allocation adjustment unit 100, a memory control unit 210, an SSD control unit 230, and an I / O control unit 220 (or the allocation adjustment unit 100 by a function provided by the OS and a computer program executed on the OS.
- Memory control unit 210, SSD control unit 230, and I / O control unit 220 are realized). Details of these functions will be described later.
- the work area 30 stores an application program 31 and the like.
- the empty area 40 is an area that has not been used yet.
- the I / O control unit 220 controls I / O to the HDD 5.
- the I / O control unit 220 issues an I / O request to the HDD 5 based on the I / O request issued from the application program 31.
- the I / O control unit 220 may store read data and write data for the HDD 5 in the first cache area 20 or the second cache area 8.
- the I / O control unit 220 receives data from the cache areas 20 and 8. You may lead. As a result, the I / O amount for the HDD 5 is reduced.
- the I / O control unit 220 may measure the I / O amount for the HDD 5.
- the I / O amount is, for example, the number of I / O requests issued per unit time or the amount of transfer data.
- the I / O control unit 220 may provide the measured I / O amount to the allocation adjustment unit 100.
- the I / O control unit 220 may adjust the I / O amount per unit time so as not to exceed the upper limit value specified by the allocation adjustment unit 100.
- the memory control unit 210 controls the memory 2.
- the memory control unit 210 performs data write, read, erase, and the like on the storage area of the memory 2.
- the memory control unit 210 swaps the data stored in the work area 30 and the data stored in the swap area 7.
- the memory control unit 210 changes the sizes of the work area 30 and the first cache area 20 in the storage area of the memory 2 based on an instruction from the allocation adjustment unit 100. That is, the memory control unit 210 changes the number of pages allocated to the work area 30 and the first cache area 20.
- the SSD control unit 230 controls the SSD 6.
- the SSD control unit 230 performs data write, read, erase, and the like on the storage area of the SSD 6.
- the SSD control unit 230 secures the swap area 7 and the second cache area 8 in the storage area of the SSD 6, or based on the instruction from the allocation adjustment unit 100, the swap area 7 and the second cache occupied in the storage area of the SSD 6
- the size of the area 8 is changed.
- the SSD control unit 230 may be a kind of SSD6 device driver, or may be a predetermined program interposed between the I / O control unit 220 and the SSD6 device driver.
- the SSD control unit 130 secures the swap area 7 and the second cache area 8 by executing an lvresize command or an lvcreate command using an LVM (logical volume manager). Or you may change.
- the SSD control unit 130 may secure or change the swap area 7 and the second cache area 8 by executing an fdisk command or the like using GNU Parted.
- the SSD control unit 130 may execute a swappon command, a swappoff command, and the like to change the validity and invalidity of the page related to the swap area 7.
- the allocation adjustment unit 100 adjusts the work area 30 and the first cache area 20 occupying the storage area of the memory 2, and the swap area 7 and the second cache area 8 occupying the storage area of the SSD 6. Details of the allocation adjustment unit 100 will be described below.
- FIG. 3 is a block diagram illustrating a configuration example of the allocation adjustment unit 100.
- the allocation adjustment unit 100 includes a policy setting unit 110, an operation status observation unit 120, a memory adjustment unit 130, a swap device adjustment unit 140, policy information 111, and operation information 150.
- FIG. 4 shows an example of the policy information 111.
- the policy information 111 includes information serving as a reference for changing the work area 30 and the first cache area 20, and the swap area 7 and the second cache area 8.
- the policy information 111 may be set by a user of the computer 1, for example, or may be acquired from an external server or the like via a communication network.
- the policy information 111 has an HDD I / O reference amount 112, a swap frequency reference amount 113, a swap securing reference value 114, a swap use upper limit value 115, and a swap use lower limit value 116 as attributes.
- the HDD I / O reference amount 112 is used to determine whether or not the HDD 5 I / O amount is too large.
- the HDD I / O reference amount 112 is expressed, for example, as a data amount per second.
- the swap frequency reference amount 113 is used for determining whether or not the occurrence frequency of swap is too large.
- the swap frequency reference amount 113 is represented, for example, by the number of occurrences of swap per second.
- the swap securing reference value 114 is used as a reference for the unused area to be secured in the swap area 7.
- the swap securing reference value 114 is represented, for example, by the ratio of the used area to the swap area 7.
- the swap usage upper limit 115 is used for determining whether or not the swap area 7 should be expanded.
- the swap use upper limit value 115 is represented, for example, by the ratio of the used area to the swap area 7.
- the swap usage lower limit 116 is used to determine whether or not the swap area 7 should be reduced.
- the swap use lower limit value 116 is represented by, for example, the ratio of the used area to the swap area 7.
- Policy setting unit 110 acquires policy information 111.
- the policy setting unit 110 acquires the policy information 111 input by the user of the computer 1, or acquires the policy information 111 from an external device or the like through a communication network.
- the policy setting unit 110 may pass the I / O reference amount 112 of the HDD 5 included in the policy information 111 to the I / O control unit 220.
- the I / O control unit 220 may adjust the I / O amount of the HDD 5 so as not to exceed the I / O reference amount 112 of the HDD 5.
- FIG. 5 shows an example of the operation information 150.
- the operation information 150 includes information regarding the operation status of the computer 1.
- the operation information 150 indicates whether or not the size of the work area 30 and the first cache area 20 occupying the storage area of the memory 2 and the size of the swap area 7 and the second cache area 8 occupying the storage area of the SSD 6 should be changed. It is used for determination and calculation of how much the size should be changed.
- the operation information 150 includes a work area amount 151, a swap area amount 152, a swap usage amount 153, a swap frequency 154, a second cache read hit amount 155, a second cache read miss amount 156, and a second cache write hit.
- the work area amount 151 represents the size of the work area 30 at a certain time.
- the swap area amount 152 represents the size of the swap area 7 at a certain point in time.
- the swap usage amount 153 represents the usage amount of the swap area amount 157 at a certain time.
- the swap frequency 154 represents the frequency of swaps occurring per unit time.
- the swap frequency 154 is represented by, for example, the number of swap occurrences per second.
- the second cache read hit amount 155 represents the amount of data hit by the cache data in the second cache area 8 in response to a read request per unit time (for example, 1 second).
- the second cache read miss amount 156 represents the amount of missed cache data in the second cache area 8 in response to a read request per unit time. That is, the second cache read miss amount represents the amount of data read from the HDD 5.
- the second cache write hit amount 157 represents the amount of cache data hit in the second cache area 8 in response to a write request per unit time.
- the second cache write miss amount 158 represents the amount that the cache data in the second cache area 8 did not hit (miss) in response to a write request per unit time. That is, the second cache write miss amount 158 represents the amount of data written to the HDD 5.
- the work area amount 151, the swap area amount 152, the swap usage amount 153, and the swap frequency 154 may be measured by the memory control unit 210.
- the hit amounts 155 and 157 and the miss amounts 156 and 158 of the second cache may be measured by the SSD control unit 6 and the I / O control unit 220.
- the first cache area 20 and the second cache area 8 may be used as one cache memory area and may not be used properly, or may be used separately by the processor 3. For example, cache data with a relatively high cache hit rate may be stored in the first cache area 20, cache data with a relatively low cache hit rate may be stored in the second cache area 8, or read data may be stored in the first cache area 20. Write data stored in one cache area 20 may be stored in the second cache area 8. Cache data that has been hit-read in the second cache area 8 (or cache data in which the read hit rate is higher than the threshold among the cache data in the second cache area 8) is moved from the second cache area 8 to the first cache area 20. May be. At that time, data having the lowest hit rate in the first cache area 20 may be moved to the second cache area 8.
- the I / O amount of the HDD 5 per unit time may vary depending on the write mode in the computer 1. Examples of the write mode include a write back mode and a write through mode. In the “write back mode”, the I / O control unit 220 responds to the application program 31 with the write completion when the write data according to the write request from the application program 31 is written to the second cache area 8 or the first cache area 20. Thereafter, the write data (cache data) is written to the HDD 5.
- the I / O control unit 220 writes the write data according to the write request from the application program 31 to the second cache area 8 or the first cache area 20 (or writes the write data to the cache area 8).
- the write completion is returned to the application program 31.
- HDD I / O amount second cache read miss amount + second cache write hit amount + second cache write miss amount
- the operation status observation unit 120 observes information 151 to 158 related to the operation information 150 and updates the operation information 150 based on the observation result.
- the operation status observation unit 120 may acquire information 151 to 158 related to the operation information 150 from the I / O control unit 220, the memory control unit 210, the SSD control unit 230, and the like at a predetermined timing (for example, a constant cycle). .
- the memory adjustment unit 130 refers to the operation information 150 and adjusts how the pages of the memory 2 are allocated to the work area 30 and the first cache area 20.
- the area expands when the number of allocated pages is increased, and the area decreases when the allocated number of pages is decreased.
- the memory adjustment unit 130 may enlarge the work area 30 when “swap frequency 154> swap frequency reference amount 113”. That is, the memory adjustment unit 130 may make it difficult for swapping to occur.
- the memory adjustment unit 130 may change the “swappiness value” to adjust the ease of occurrence of data swap in the work area 30.
- the smaller the swappines value the harder the data in the work area 30 is swapped.
- the larger the swappines value the easier the data in the work area 30 is swapped. Therefore, the memory adjustment unit 130 may enlarge the work area 30 by reducing the swaplines value so that the data in the work area 30 is not easily swapped.
- the memory adjustment unit 130 may reduce the work area 30 when “HDD I / O amount> HDD I / O reference amount 112”. That is, the memory adjustment unit 130 may reduce the work area 30 when the cache hit rate is smaller than a predetermined reference value.
- the memory control unit 210 allocates an area remaining after securing the work area 30 (an area as a difference before and after the reduction of the work area 30) in the storage area of the memory 2 as one area of the first cache area 20. Therefore, when the work area 30 is reduced, the first cache area 20 is enlarged accordingly.
- the cache hit rate can be improved, so that the I / O amount of the HDD can be reduced.
- the process of actually changing the work area 30 and the first cache area 20 may be executed by the memory control unit 210. That is, the memory adjustment unit 130 may change the swappines value, and the memory control unit 210 may actually change the work area 30 and the first cache area 20 on the memory according to the changed swappines value.
- the memory control unit 210 may change the ratio of the work area 30 and the first cache area 20 to the storage area of the memory 2 according to the swappines value.
- the swap device adjustment unit 140 refers to the operation information 150 and adjusts the swap area 7 and the second cache area 8 in the SSD 6.
- the swap device adjustment unit 140 calculates “(((work area amount 151 + swap use amount 153) / (work area amount 151 + swap area amount 152) ⁇ 100 (%))”.
- the swap device adjustment unit 140 expands the swap area 7 and reduces the second cache area 8 when “work & swap use ratio> swap use upper limit 115”. This is because the swap area 7 tends to be insufficient.
- the swap device adjustment unit 140 reduces the swap area 7 and expands the second cache area 8 when “work & swap usage ratio ⁇ swap usage lower limit 116”. This is because the cache hit rate can be improved by allocating an unused area of the swap area 7 to the second cache area 8.
- the processing for actually changing the swap area 7 and the second cache area 8 may be executed by the SSD control unit 230. That is, the swap device adjustment unit 140 determines the size of the swap area 7, and the SSD control unit 130 actually sets the swap area 7 and the second cache area 8 on the SSD 6 according to the determined size of the swap area 7. It may be changed.
- the amount of change in the size of the work area 30 may be different from the amount of change in the size of the first cache area 20. Further, the expansion or reduction of the work area 30 and the reduction or expansion of the first cache area 20 do not necessarily have to be linked. For example, when the size of the free area 40 is sufficiently large, both the work area 30 and the first cache area 20 may be enlarged and the free area 40 may be reduced.
- the change amount of the size of the swap area 7 and the change amount of the size of the second cache area 20 may be different.
- the enlargement or reduction of the size of the swap area 7 and the reduction or enlargement of the second cache area 8 are not necessarily linked.
- FIG. 6 is a flowchart showing an example of the memory adjustment process. This process is executed at a constant cycle, for example.
- the memory adjustment unit 130 acquires the operation information 150 and determines whether or not “swap frequency> swap frequency reference value” (S101).
- the memory adjustment unit 130 instructs the memory control unit 210 to expand the work area 30 (decreases the swappines value) (S102), and performs the processing. End (END).
- the memory adjustment unit 130 determines whether or not “HDD I / O amount> HDD I / O reference amount” (S103). .
- the memory adjustment unit 130 executes the first cache area adjustment process (S104) and ends the process (END). . Details of the first cache area adjustment processing will be described later.
- FIG. 7 is a flowchart showing an example of the first cache area adjustment process. This process corresponds to S104 in FIG.
- the memory adjustment unit 130 determines whether the write mode is “write back mode” or “write through mode” (S111).
- the memory adjustment unit 130 instructs the memory control unit 210 to reduce the work area 30 (increase the swappines value) (S113). This process ends (END).
- the memory adjustment unit 130 refers to the operation information 150 and reads “second cache read miss amount> (HDD I / O amount ⁇ HDD I / O”). O reference amount) ”is determined (S112).
- the first cache area 20 of the memory 2 is expanded. Thereby, the cache hit rate can be improved and the I / O amount of the HDD can be reduced.
- FIG. 8 is a flowchart showing an example of swap area adjustment processing. This process is executed at a constant cycle, for example.
- the swap device adjustment unit 140 refers to the operation information 150 and determines whether or not “work & swap usage ratio> swap usage upper limit value” (S201).
- the swap device adjustment unit 140 executes a process of expanding the swap area 7 of the SSD 6 and reducing the second cache area 8 (S203). ), The process is terminated (END).
- the swap device adjustment unit 140 determines whether or not “work & swap usage ratio ⁇ swap usage lower limit value” is satisfied (S202). .
- the swap device adjustment unit 140 executes a process of reducing the swap area 7 of the SSD 6 and expanding the second cache area 8 (S204). ), The process is terminated (END).
- the swap area 7 of the SSD 6 is expanded. Thereby, it is possible to avoid a shortage of the swap area 7.
- the swap area 7 of the SSD 6 is reduced.
- the second cache area 8 is expanded, and the cache hit rate for the HDD 5 can be improved. That is, the HDD I / O amount can be reduced.
- FIG. 9 is a block diagram illustrating a configuration example of the computer 1 according to the second embodiment.
- the hardware configuration of the computer 1 is the same as that of the computer 1 shown in FIG.
- the memory 2 has a system area 10, a work area 30, a free area 40, and a first cache area 20.
- the processor 3 executes the hypervisor 50 in the work area 20.
- the hypervisor 50 is an application program serving as a base for realizing a virtual machine.
- a plurality of virtual machines 51A and 51B are executed on the hypervisor 50, and an independent virtual OS is executed in each of the virtual machines 51A and 51B.
- the hypervisor 50 has a virtual machine memory manager 52.
- the virtual machine memory manager 52 allocates a page of the physical memory 2 to a virtual memory (referred to as “virtual memory”) included in the virtual machines 51A and 51B, or allocates a page of the physical memory 2 allocated to the virtual memory. To collect.
- An area allocated to the virtual memory of the virtual machine in the memory 2 is referred to as a “virtual memory allocation area”.
- virtual memory allocation areas 53A and 53B are allocated to virtual memories of virtual machines 51A and 51B, respectively.
- the SSD 6 has virtual machine swap areas 61A and 61B used from the virtual OS on each virtual machine, a swap area 7 used from the OS on the computer 1, and a second cache area 8.
- virtual machine swap areas 61A and 61B are used from virtual OSes of virtual machines 51A and 51B, respectively.
- the second cache area 8 may not be secured for each virtual machine. This is because the read and write requests issued from the virtual machines 51A and 51B are finally executed as I / O of the computer 1.
- the OS on the computer 1 saves the data in the work area 30 to the swap area 7 of the SSD 6. However, it is not desirable that the data in the virtual memory allocation areas 53A and 53B be saved in the swap area 7. This is because if the virtual memory allocation areas 53A and 53B allocated to the virtual memory are saved in the swap area 7 of the SSD 6 whose I / O speed is slower than that of the memory 2, the I / O speed of the virtual memory is higher than that of the swap area. This is because the virtual OS on the virtual machine operating assuming that it is fast may perform an unexpected operation.
- a program called a balloon driver is executed on the virtual OS on the virtual machine.
- the balloon driver is used when the virtual machine memory manager 52 collects unnecessary pages of the virtual memory.
- the balloon driver on the virtual machine 51A secures a large number of virtual memory pages.
- the virtual OS on the virtual machine 51A saves data that can be saved to the swap area in the virtual memory to the virtual machine swap area 61A.
- the virtual machine memory manager 52 collects the pages of the virtual memory allocation area 53A allocated to the virtual memory pages secured by the balloon driver. As a result, the virtual memory allocation area 53A is reduced, and the data in the virtual memory allocation area 53A can be avoided from being saved in the swap area 7.
- FIG. 10 is a block diagram illustrating a configuration example of the allocation adjustment unit 300 according to the second embodiment.
- the allocation adjustment unit 300 includes a policy setting unit 310, an operation status observation unit 320, a memory adjustment unit 330, a swap device adjustment unit 340, policy information 111, and operation information 160.
- a policy setting unit 310 an operation status observation unit 320
- a memory adjustment unit 330 a swap device adjustment unit 340
- policy information 111 policy information
- operation information 160 policy information
- FIG. 11 shows an example of the operation information 160 related to the second embodiment.
- the operation information 160 includes information on the operation status of the virtual machines 51A and 51B and the operation status of the computer 1.
- the operation information 160 has a virtual memory usage amount 161, a swap area amount 162, a swap usage amount 163, and a swap frequency 164 as attributes for each virtual machine.
- the operation information 160 includes the second cache read hit amount 155, the second cache read miss amount 156, the second cache write hit amount 157, and the second cache write miss amount 158 as attributes. Have as.
- the virtual memory usage 161, the swap area 162, the swap usage 163, and the swap frequency 164 may be measured by the virtual OS on the virtual machine and the virtual machine memory manager 52.
- the operation status observation unit 320 observes information related to the operation information 160 and updates the operation information 160 based on the observation result.
- the operation status observation unit 320 may acquire information regarding the operation information 160 of each virtual machine through the virtual machine memory manager 52 at a predetermined timing (for example, at a constant cycle).
- the memory adjustment unit 330 refers to the operation information 160 and adjusts how the page of the memory 2 is allocated to the virtual machine allocation areas 53A and 53B and the first cache area 20.
- the memory adjustment unit 330 When “swap frequency 161> swap frequency reference value 113” is satisfied for each of the virtual machines 51A and 51B (that is, when the swap frequency of the virtual OS on the virtual machine is large), the memory adjustment unit 330 has the virtual machines 51A and 51B.
- the virtual memory allocation areas 53A and 53B allocated to the virtual memory may be enlarged.
- the memory adjustment unit 330 instructs the balloon driver on the virtual machines 51A and 51B to reduce the balloon through the virtual machine memory manager 52.
- the balloon driver receives an instruction to reduce the balloon, the balloon driver releases the reserved virtual memory page.
- the virtual OS on the virtual machine increases the available virtual memory, thereby reducing the occurrence of swapping.
- the memory adjustment unit 330 When “swap frequency 161 ⁇ swap frequency reference value 113” is satisfied for each of the virtual machines 51A and 51B (that is, when the swap frequency of the virtual OS on the virtual machine is small), the memory adjustment unit 330 has the virtual machines 51A and 51B. May be registered as reduction candidates for the virtual machine allocation areas 53A and 53B. Then, when “HDD I / O amount> HDD I / O reference amount 112”, the memory adjustment unit 330 sends a balloon driver to the balloon driver on the virtual machine registered as a reduction candidate through the virtual machine memory manager 52. May be instructed to enlarge. When the balloon driver receives a balloon expansion instruction, the balloon driver newly secures a page in the virtual memory.
- the memory adjustment unit 330 collects the virtual memory allocation areas 53A and 53B corresponding to the virtual memory page secured by the balloon driver. As a result, the virtual memory allocation areas 53A and 53B are reduced, and the first cache area 20 is expanded accordingly. When the first cache area 20 is expanded, the cache hit rate can be improved, so that the I / O amount of the HDD can be reduced.
- processing for actually changing the work area 30 and the first cache area 20 may be executed by the memory control unit 210 as in the first embodiment.
- the swap device adjustment unit 340 calculates “(virtual memory usage 161 + swap usage 163) / (virtual memory usage 161 + swap area 162) ⁇ 100 (%)” for each of the virtual machines 51A and 51B. This calculated value is referred to as “virtual machine & swap usage ratio”.
- the swap device adjustment unit 340 registers the virtual machines 51A and 51B as swap expansion candidates when “virtual machine & swap use ratio> swap use upper limit 115” for each of the virtual machines 51A and 51B. If “virtual machine & swap usage ratio ⁇ swap usage lower limit 116” for each of the virtual machines 51A and 51B, the swap device adjustment unit 340 registers the virtual machines 51A and 51B as swap reduction candidates.
- the swap device adjustment unit 340 then adds the virtual machine swap areas 61A and 61B of the virtual machines 51A and 51B registered as swap expansion candidates (referred to as “expansion total”) and the virtual machines registered as swap reduction candidates.
- FIG. 12 is a flowchart illustrating an example of the memory adjustment process according to the second embodiment. This process is executed at a constant cycle, for example.
- the memory adjustment unit 330 determines a virtual machine to be processed (referred to as “target virtual machine”) from unprocessed virtual machines, and acquires operation information 160 regarding the target virtual machine (S301).
- target virtual machine a virtual machine to be processed
- the memory adjustment unit 330 determines whether or not “swap frequency 164> swap frequency reference value 113” in the target virtual machine (S302).
- the memory adjustment unit 330 instructs the balloon driver of the target virtual machine to reduce the balloon through the virtual machine memory manager 52 (S303), and proceeds to S305.
- the memory adjustment unit 330 registers the target virtual machine as a balloon expansion candidate (S304), and proceeds to S305.
- the memory adjustment unit 330 determines whether there is an unprocessed virtual machine (S305). When there is an unprocessed virtual machine (S305: YES), the memory adjustment unit 130 returns to S301.
- the memory adjustment unit 330 executes the first cache area adjustment process (S307) and ends the process (END). Details of the first cache adjustment processing will be described later.
- the balloon driver on the virtual machine shrinks the balloon and the usable pages on the virtual memory increase. This reduces the frequency of occurrence of swap in the virtual machine.
- FIG. 13 is a flowchart showing an example of the first cache area adjustment process. This process corresponds to S307 in FIG.
- the memory adjustment unit 330 executes the same process as in FIG. 6, but executes the following process instead of S113. That is, the memory adjustment unit 330 instructs the balloon driver of the virtual machine registered as a balloon reduction candidate through the virtual machine memory manager 52 to expand the balloon (S313), and ends this processing (END).
- the balloon driver on the virtual machine expands the balloon, and the pages of the virtual memory allocation area can be collected. Therefore, the virtual memory allocation area is reduced, and the first cache area 20 of the memory 2 is enlarged accordingly. Thereby, the cache hit rate can be improved and the I / O amount of the HDD can be reduced.
- FIG. 14 is a flowchart showing an example of swap area adjustment processing. This process is executed at a constant cycle, for example.
- the swap device adjustment unit 340 determines the target virtual machine from the unprocessed virtual machines and acquires the operation information 160 of the target virtual machine (S401).
- the swap device adjustment unit 340 determines whether or not “virtual machine & swap usage ratio> swap usage upper limit 115” for the target virtual machine (S402).
- the swap device adjustment unit 340 registers this virtual machine as a swap expansion candidate (S403), and proceeds to S406.
- the swap device adjustment unit 340 determines whether or not “virtual machine & swap usage ratio ⁇ swap usage lower limit value 116”. (S404).
- the swap device adjustment unit 340 registers this virtual machine as a swap reduction candidate (S405), and proceeds to S406.
- the swap device adjustment unit 340 determines whether there is an unprocessed virtual machine (S406). When there is an unprocessed virtual machine (S406: YES), the swap device adjustment unit 340 returns to S401.
- the swap device adjustment unit 340 determines the number of SSDs in the SSD 6 based on the size of the virtual machine swap area of the virtual machine registered in the swap expansion candidate and the swap reduction candidate. 2 The amount of change in the cache area 6 is calculated. Then, the swap device adjusting unit 340 changes the size of each virtual machine swap area, changes the size of the second cache area 8 based on the change amount (S408), and ends the process (END).
- the swap space for virtual machines that tend to be insufficient is expanded. As a result, the shortage of the virtual machine swap area can be avoided. In addition, the excessive swap space for virtual machines is reduced. As a result, the second cache area 8 is expanded, and the cache hit rate for the HDD 5 can be improved. That is, the HDD I / O amount can be reduced.
- the computer 1 described in the first and second embodiments is provided in a storage apparatus (for example, a disk array apparatus) having a plurality of storage devices (for example, HDDs or SSDs) and a storage controller for controlling I / O for them.
- a storage apparatus for example, a disk array apparatus
- storage controller for example, HDDs or SSDs
- the present invention may be applied to a storage controller or a host computer that issues an I / O request to a storage apparatus (external storage device).
- a storage device having an I / O speed slower than that of the second memory does not necessarily have to be an external storage device of the computer 1 and may be built in the computer 1.
- Second cache area 20 First cache area 30: Work area 40: Free area 51A, 51B: Virtual machine 52: Virtual machine memory manager 53A, 53B: Virtual memory allocation area 61A, 61B: Virtual machine swap area
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Abstract
Description
Claims (8)
- 第1メモリと、
前記第1メモリよりもI/O速度が遅い第2メモリと、
前記第1メモリ、前記第2メモリ及び記憶デバイスに接続されたプロセッサと
を備え、
前記第1メモリは、ワーク領域と、前記記憶デバイスに対して入出力されるデータが一時格納される第1キャッシュ領域とを有し、
前記第2メモリは、前記記憶デバイスに対して入出力されるデータが一時格納される第2キャッシュ領域と、前記ワーク領域に格納されるデータの退避先であるスワップ領域とを有し、
前記プロセッサは、
前記記憶デバイスに対して入出力されたデータ量である入出力量が所定の入出力量よりも大きい場合に、前記ワーク領域を縮小し前記第1キャッシュ領域を拡大する第1キャッシュ領域拡大処理を実行する、
計算機。
- 前記プロセッサは、
前記スワップ領域へのデータ退避の発生頻度が所定の発生頻度以下ならば、前記第1キャッシュ領域拡大処理を実行する、
請求項1に記載の計算機。
- 前記プロセッサは、
ライトバックモードが設定されているならば、前記第1キャッシュ領域拡大処理を実行し、
前記ライトバックモードが設定されている場合、前記プロセッサは、ライトデータを前記第1キャッシュ領域又は前記第2キャッシュ領域にライトした場合、ライト完了とし、その後、前記ライトデータを前記第1キャッシュ領域又は前記第2キャッシュ領域から前記記憶デバイスへライトするようになっている、
請求項2に記載の計算機。
- 前記プロセッサは、
ライトスルーモードが設定されており、且つ、キャッシュリードミス量が所定のキャッシュリードミス量よりも大きいならば、前記第1キャッシュ領域拡大処理を実行し、
前記ライトスルーモードが設定されている場合、前記プロセッサは、ライトデータを前記記憶デバイスへライトした場合に、ライト完了とし、
前記キャッシュリードミス量は、前記第1キャッシュ領域及び第2キャッシュ領域に格納されているデータの何れにもヒットしなかったリードデータの総量である、
請求項2に記載の計算機。
- 前記プロセッサは、
前記ワーク領域及びスワップ領域の合計量に対する使用量の割合が第1の割合よりも大きい場合、前記スワップ領域を拡大し前記第2キャッシュ領域を縮小し、
前記使用量の割合が第2の割合よりも小さい場合、前記スワップ領域を縮小し前記第2キャッシュ領域を拡大し、
前記第2の割合は、前記第1の割合よりも小さい、
請求項2に記載の計算機。
- 前記プロセッサによって複数の仮想マシンが実行されるようになっており、
前記ワーク領域は、前記複数の仮想マシンの各々の仮想メモリに割り当てられた仮想メモリ割当領域を含み、
前記第2メモリは、前記複数の仮想マシンの各々に割り当てられた仮想マシン用スワップ領域をさらに有し、
前記第1キャッシュ領域拡大処理は、
前記複数の仮想マシンのうち縮小対象の仮想マシンに割り当てられている仮想メモリ割当領域を縮小することにより、前記第1メモリに占めるワーク領域を縮小し前記第1キャッシュ領域を拡大する処理であり、
前記縮小対象の仮想マシンは、仮想マシン用スワップ領域へのスワップ発生頻度が所定のスワップ発生頻度以下の仮想マシンである、
請求項1に記載の計算機。
- 前記プロセッサは、
前記複数の仮想マシンうち、前記仮想メモリ及び前記仮想マシン用スワップ領域の合計量のうちの使用量の割合が第3の割合よりも大きい仮想マシンを、スワップ拡大候補とし、
前記使用量の割合が第4の割合よりも小さい仮想マシンを、スワップ縮小候補とし、
前記スワップ拡大候補としての各仮想マシンに割り当てる仮想マシン用スワップ領域と、前記スワップ縮小候補としての各仮想マシンに割り当てる仮想マシン用スワップ領域との差に基づいて、前記第2メモリに占める前記第2キャッシュ領域のサイズを変更する
請求項6に記載の計算機。
- 第1キャッシュ領域と第2キャッシュ領域とのうちの少なくとも1つを使用して記憶デバイスに入出力されたデータの量である入出力量が、所定の入出力量よりも大きいか否かを判定し、前記第1キャッシュ領域は第1メモリにあり、前記第2キャッシュ領域は前記第1メモリよりI/O速度が遅い第2メモリにあり、前記第1メモリは、更にワーク領域を有しており、前記第2メモリは、更に前記ワーク領域に格納されるデータの退避先であるスワップ領域を有しており、
前記入出力量が前記所定の入出力量よりも大きい場合に、前記ワーク領域を縮小し前記第1キャッシュ領域を拡大する第1キャッシュ領域拡大処理を実行する、
メモリ制御方法。
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JP2016181030A (ja) * | 2015-03-23 | 2016-10-13 | 富士通株式会社 | 情報処理装置、記憶装置制御方法、記憶装置制御プログラム及び情報処理システム |
KR20180057374A (ko) * | 2016-11-22 | 2018-05-30 | 이화여자대학교 산학협력단 | 입출력 특성에 따른 스토리지 할당 방법 및 장치 |
JP2018156582A (ja) * | 2017-03-21 | 2018-10-04 | キヤノン株式会社 | 情報処理装置および画像形成装置等のストレージ制御方法 |
US11366595B2 (en) | 2020-08-13 | 2022-06-21 | Fujitsu Limited | Management apparatus and non-transitory computer-readable storage medium for storing program |
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US10282100B2 (en) * | 2014-08-19 | 2019-05-07 | Samsung Electronics Co., Ltd. | Data management scheme in virtualized hyperscale environments |
US20170031601A1 (en) * | 2015-07-30 | 2017-02-02 | Kabushiki Kaisha Toshiba | Memory system and storage system |
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