WO2015131346A1 - 发送设备、接收设备、同步信号传输方法及*** - Google Patents

发送设备、接收设备、同步信号传输方法及*** Download PDF

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Publication number
WO2015131346A1
WO2015131346A1 PCT/CN2014/072902 CN2014072902W WO2015131346A1 WO 2015131346 A1 WO2015131346 A1 WO 2015131346A1 CN 2014072902 W CN2014072902 W CN 2014072902W WO 2015131346 A1 WO2015131346 A1 WO 2015131346A1
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Prior art keywords
synchronization signal
characters
synchronization
zero
signal
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PCT/CN2014/072902
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English (en)
French (fr)
Inventor
汪凡
马雪利
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华为技术有限公司
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Priority to PCT/CN2014/072902 priority Critical patent/WO2015131346A1/zh
Priority to CN201480000428.4A priority patent/CN105103509B/zh
Publication of WO2015131346A1 publication Critical patent/WO2015131346A1/zh

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04WWIRELESS COMMUNICATION NETWORKS
    • H04W56/00Synchronisation arrangements

Definitions

  • the present invention relates to the field of wireless communications, and in particular, to a transmitting device, a receiving device, a synchronization signal transmission method and system. Background technique
  • UMTS Universal Mobile Telecommunications System
  • 3GPP The 3rd Generation Partnership Project
  • S-UMTS Scalable UMTS
  • 3GPP The 3rd Generation Partnership Project
  • the conventional UMTS baseband signal has a chip rate of 3.84 Mcps and a bandwidth of 5 MHz after passing through a 5 MHz filter.
  • the baseband signal of 3.84Mcps can pass through a filter with a bandwidth less than 5MHz.
  • S-UMTS also sets N-1 of every N characters in the baseband signal of 3.84 Mcps to 0. For example, to support a transmission bandwidth of 2.5 MHz, one of every two characters in the baseband signal of 3.84 Mcps can be set to 0. To support the transmission bandwidth of 1.25 MHz, each of the four characters of the baseband signal of 3.84 Mcps can be used. 3 of them are set to 0.
  • the prior art has at least the following problems:
  • N-1 of each N characters in the baseband signal is set to 0, which causes the synchronization signal included in the baseband signal to lose part of the information, thereby causing the synchronization sequence orthogonality to be destroyed and the synchronization performance to be poor.
  • the example provides a transmitting device, a receiving device, a synchronization signal transmission method and system.
  • a sending device where the sending device includes:
  • a signal generating module configured to generate a synchronization signal, where each consecutive N characters of the synchronization signal includes 1 synchronization sequence character and N-1 insertion characters, and the N-1 insertion characters are in the N characters
  • the specified position in , N > 2, N is an integer
  • a zeroing module configured to: at each of the N characters in the synchronization signal
  • N-1 characters are set to zero
  • the sending module is configured to send the zeroed synchronization signal to the receiving device.
  • the sending module includes:
  • a first sending unit configured to: when the synchronization signal is a primary synchronization signal, send the primary synchronization signal that is zeroed by the first M chips of each of the N consecutive time slots to the receiving
  • the device includes: at least one set of primary synchronization sequences, and the primary synchronization sequence includes M characters.
  • the sending module includes:
  • a second sending unit configured to: when the synchronization signal is a secondary synchronization signal, send the secondary synchronization signal after being zeroed by the first M chips in each time slot in the N consecutive radio frames Receiving device
  • the K-slots are included in one radio frame, and the K-sequences are included in the sub-synchronization signal, and each of the sub-synchronization sequences includes M characters.
  • the sending module includes:
  • a third sending unit configured to: when the synchronization signal is a primary synchronization signal, send the primary synchronization signal that is zeroed by the first M*N chips in one time slot to the receiving device;
  • the primary synchronization signal includes at least one set of primary synchronization sequences, and the primary synchronization sequence includes M characters.
  • the sending module includes:
  • a fourth sending unit configured to send, when the synchronization signal is a secondary synchronization signal, the secondary synchronization signal after being zeroed by the first M*N chips in each time slot in one radio frame
  • the receiving device
  • the one radio frame includes K time slots, and the secondary synchronization signal includes at least K sets of secondary synchronization sequences, and each group of the secondary synchronization sequences includes M characters.
  • a second aspect provides a transmitting device, where the sending device includes: a processor and a transmitter; the processor, configured to generate a synchronization signal, where the synchronization signal includes one synchronization sequence per N characters a character and N-1 insertion characters, wherein the N-1 insertion characters are at a specified position among the N characters, N > 2, and N is an integer;
  • the processor is further configured to zero the N-1 characters in the specified position in each of the synchronization signals;
  • the processor is further configured to control the transmitter to send a synchronization signal after the zero is sent to the receiving device.
  • the processor configured to: when the synchronization signal is a primary synchronization signal, control the primary synchronization signal that the transmitter will be zeroed by the first M chips of each of the N consecutive time slots Sent to the receiving device;
  • the primary synchronization signal includes at least one set of primary synchronization sequences, and the primary synchronization sequence includes M characters.
  • the processor configured to: when the synchronization signal is a secondary synchronization signal, control the transmitter to pass the first M chips in each time slot in the N consecutive radio frames to be zeroed a synchronization signal is sent to the receiving device;
  • the K-slots are included in one radio frame, and the K-sequences are included in the sub-synchronization signal, and each of the sub-synchronization sequences includes M characters.
  • the processor configured to: when the synchronization signal is a primary synchronization signal, control the transmitter to send the primary synchronization signal after zeroing through the first M*N chips in one time slot to the
  • the receiving device includes: at least one set of primary synchronization sequences, and the primary synchronization sequence includes M characters.
  • the processor configured to: when the synchronization signal is a secondary synchronization signal, control, by the transmitter, that the first M*N chips in each time slot in one radio frame are to be zeroed Sending a secondary synchronization signal to the receiving device;
  • the one radio frame includes K time slots, and the secondary synchronization signal includes at least K sets of secondary synchronization sequences, and each group of the secondary synchronization sequences includes M characters.
  • a receiving device is provided, where the receiving device includes:
  • a receiving module configured to receive a zero-synchronized synchronization signal, where the zero-set synchronization signal is a signal sent by the transmitting device after the N-1 characters in a specified position in each of the N characters in the synchronization signal are zeroed.
  • Each of the N characters of the synchronization signal includes one synchronization sequence character and N-1 insertion characters, and the N-1 insertion characters are in the specified position of the N characters, N > 2, N is an integer;
  • an obtaining module configured to acquire a sequence consisting of non-zero characters in the zeroed synchronization signal as a synchronization sequence.
  • the receiving module is configured to acquire, when the synchronization signal is a primary synchronization signal, a character carried in a first M chips of each of the N consecutive time slots as the primary synchronization signal after being zeroed .
  • the receiving module is configured to: when the synchronization signal is a secondary synchronization signal, acquire a character carried in the first M chips in each time slot in the N consecutive radio frames as the secondary after the zeroing Synchronization signal.
  • the receiving module is configured to acquire, when the synchronization signal is a primary synchronization signal, a character carried in the first M*N chips in one time slot as the primary synchronization signal after being zeroed.
  • the receiving module is configured to: when the synchronization signal is a secondary synchronization signal, acquire the characters carried in the first M*N chips in each time slot in one radio frame as the zeroed Secondary sync signal.
  • a receiving device includes: a receiver and a processor, where the processor is configured to control the synchronization signal after the receiver receives zero, and the synchronization after the zero is set
  • the signal is a signal sent by the transmitting device after the N-1 characters at a specified position in each of the N characters in the synchronization signal are zeroed, and each of the N characters of the synchronization signal includes one synchronization sequence character and N- 1 insertion character, wherein the N-1 insertion characters are in the specified position among the N characters, N > 2, and N is an integer;
  • the processor is further configured to obtain a sequence consisting of non-zero characters in the zeroed synchronization signal as a synchronization sequence.
  • the processor configured to: when the synchronization signal is a primary synchronization signal, control the receiver to acquire a character carried in a first M chips of each of the N consecutive time slots as zeroed The primary synchronization signal.
  • the processor configured to: when the synchronization signal is a secondary synchronization signal, control the receiver to acquire a character carried in the first M chips in each time slot in the N consecutive radio frames as zero The secondary synchronization signal.
  • the processor configured to: when the synchronization signal is a primary synchronization signal, control the receiver to acquire a character carried in a first M*N chips in one time slot as the primary after being zeroed Synchronization signal.
  • the processor configured to: when the synchronization signal is a secondary synchronization signal, control the receiver to acquire a character carried in a first M*N chip in each time slot in one radio frame.
  • the secondary synchronization signal after zero.
  • a fifth aspect provides a synchronization signal transmission method, where the method includes:
  • each consecutive N characters of the synchronization signal includes one synchronization sequence character and N-1 insertion characters, and the N-1 insertion characters are at a specified position among the N characters.
  • N 2 N > 2, N is an integer
  • N-1 characters at the specified position among every N characters in the synchronization signal are set to zero; the zero-synchronized synchronization signal is transmitted to the receiving device.
  • the sending the zero-synchronized synchronization signal to the receiving device includes:
  • the primary synchronization signal When the synchronization signal is a primary synchronization signal, the primary synchronization signal after being zeroed is transmitted to the receiving device by the first M chips in the N consecutive time slots;
  • the primary synchronization signal includes at least one set of primary synchronization sequences, and the primary synchronization sequence includes M characters.
  • the one radio frame includes K time slots
  • the sending the zeroed synchronization signal to the receiving device includes:
  • the secondary synchronization signal When the synchronization signal is a secondary synchronization signal, the secondary synchronization signal after being zeroed by the first M chips in each of the N consecutive radio frames is sent to the receiving device;
  • the secondary synchronization signal includes at least K sets of secondary synchronization sequences, and each of the secondary synchronization sequences includes M characters.
  • the sending the zeroed synchronization signal to the receiving device includes: When the synchronization signal is a primary synchronization signal, the primary synchronization signal after zeroing is sent to the receiving device by the first M*N chips in one time slot;
  • the primary synchronization signal includes at least one set of primary synchronization sequences, and the primary synchronization sequence includes M characters.
  • the one radio frame includes K time slots
  • the sending the zeroed synchronization signal to the receiving device includes:
  • the secondary synchronization signal When the synchronization signal is a secondary synchronization signal, the secondary synchronization signal after being zeroed by the first M*N chips in each time slot in one radio frame is sent to the receiving device;
  • the secondary synchronization signal includes at least K sets of secondary synchronization sequences, and each of the secondary synchronization sequences includes M characters.
  • N-1 insertion characters are the same as the synchronization sequence characters
  • N-1 insertion characters are opposite to the synchronization sequence characters
  • N-1 insertion characters are 0;
  • N-1 insertion characters are arbitrary values.
  • a synchronization signal transmission method includes:
  • the zero-set synchronization signal is a signal sent by the transmitting device after the N-1 characters at a specified position in each of the N characters in the synchronization signal are zeroed, and the synchronization signal is
  • Each N characters includes one synchronization sequence character and N-1 insertion characters, and the N-1 insertion characters are in the specified position among the N characters, N > 2, and N is an integer;
  • a sequence consisting of non-zero characters in the zeroed synchronization signal is acquired as a synchronization sequence.
  • the receiving the zeroed synchronization signal includes: when the synchronization signal is a primary synchronization signal, the first M of each of the N consecutive time slots The character carried in the chip is obtained as the primary synchronization signal after being zeroed.
  • the receiving, after the zeroing, the synchronization signal includes: when the synchronization signal is a secondary synchronization signal, the former of each time slot in the N consecutive radio frames The characters carried in the M chips are acquired as the secondary synchronization signal after being set to zero.
  • the receiving the zeroed synchronization signal includes: when the synchronization signal is a primary synchronization signal, placing the first M*N chips in one time slot The carried character is acquired as the primary synchronization signal after being zeroed.
  • the receiving, after the zeroing, the synchronization signal includes:
  • the synchronization signal is a secondary synchronization signal
  • the character carried in the first M*N chips in each time slot in one radio frame is acquired as the secondary synchronization signal after zeroing.
  • a synchronization signal transmission system where the system includes:
  • a transmitting device and a receiving device as described above are identical to each other.
  • FIG. 1 is a schematic structural diagram of a transmitting device according to an embodiment of the present invention.
  • FIG. 2 is a schematic structural diagram of a transmitting device according to another embodiment of the present invention.
  • FIG. 3 is a schematic diagram of synchronization signal transmission in UMTS according to another embodiment of the present invention
  • FIG. 4 is a schematic diagram of synchronization signal transmission in S-UMTS according to another embodiment of the present invention
  • FIG. 5 is another embodiment of the present invention.
  • FIG. 6 is a schematic structural diagram of a transmitting device according to another embodiment of the present invention.
  • FIG. 7 is a schematic structural diagram of a transmitting device according to still another embodiment of the present invention.
  • FIG. 8 is a schematic structural diagram of a receiving device according to an embodiment of the present invention.
  • FIG. 9 is a schematic structural diagram of a receiving device according to another embodiment of the present invention.
  • FIG. 10 is a schematic structural diagram of a receiving device according to another embodiment of the present invention.
  • FIG. 11 is a schematic structural diagram of a receiving device according to still another embodiment of the present invention.
  • FIG. 12 is a flowchart of a method for transmitting a synchronization signal according to an embodiment of the present invention
  • FIG. 13 is a flowchart of a method for transmitting a synchronization signal according to another embodiment of the present invention
  • FIG. 14 is a synchronization provided by an embodiment of the present invention.
  • Method flow chart of signal transmission method 15 is a flowchart of a method for transmitting a synchronization signal according to another embodiment of the present invention
  • FIG. 16 is a system configuration diagram of a synchronization signal transmission system according to an embodiment of the present invention
  • FIG. 17 is a transmission according to an embodiment of the present invention. Schematic diagram of the device;
  • FIG. 18 is a schematic structural diagram of a sending device according to another embodiment of the present invention.
  • FIG. 19 is a schematic structural diagram of a transmitting device according to another embodiment of the present invention.
  • FIG. 20 is a schematic structural diagram of a transmitting device according to still another embodiment of the present invention.
  • FIG. 21 is a flowchart of a method for transmitting a synchronization signal according to an embodiment of the present invention.
  • FIG. 22 is a flowchart of a method for transmitting a synchronization signal according to another embodiment of the present invention. detailed description
  • FIG. 1 is a schematic structural diagram of a transmitting device according to an embodiment of the present invention.
  • the transmitting device can transmit a baseband signal having a higher chip rate through a smaller transmission bandwidth.
  • the transmitting device may be a transmitting device supporting S-UMTS.
  • the sending device can include:
  • the signal generating module 101 is configured to generate a synchronization signal, where each consecutive N characters of the synchronization signal includes one synchronization sequence character and N-1 insertion characters, and the N-1 insertion characters are in the N characters. Specify the position, N > 2, N is an integer;
  • the zeroing module 102 is configured to zero the N-1 characters in the specified position in each of the synchronization signals;
  • the sending module 103 is configured to send the zeroed synchronization signal to the receiving device.
  • the transmitting device provided by the embodiment of the present invention generates a synchronization signal including one synchronization sequence character and N-1 insertion characters at a specified position every N characters, and each of the synchronization signals is generated.
  • N-1 characters of the N characters at the specified position are set to zero and then sent to the receiving device, and the insertion character is added at the 0 position in the synchronization signal, thereby solving N-1 of every N characters in the baseband signal.
  • the synchronization signal loses part of the information, which causes the orthogonality of the synchronization sequence to be destroyed, and achieves the purpose of ensuring synchronization performance while reducing inter-symbol interference. Please refer to FIG.
  • the transmitting device can enable a baseband signal with a higher chip rate to pass through a smaller transmission bandwidth.
  • Line is sent.
  • the sending device is a sending device that supports S-UMTS.
  • the sending device may include: a signal generating module 201, configured to generate a synchronization signal, where each consecutive N characters of the synchronization signal includes one synchronization sequence character and N - 1 insertion character, the N-1 insertion characters are at specified positions in the N characters, N > 2, N is an integer;
  • a zeroing module 202 configured to: at each of the N characters in the synchronization signal
  • N-1 characters are set to zero
  • the sending module 203 is configured to send the zeroed synchronization signal to the receiving device.
  • the N-1 insertion characters are the same as the synchronization sequence characters; or, the N-1 insertion characters are opposite to the synchronization sequence characters; or, the N-1 insertion characters are 0; or, the N-1 Insert characters are arbitrary values.
  • the transmitting device may insert N-1 insertion characters corresponding to the characters in each synchronization sequence when generating the synchronization signal, and the insertion character may be any value, such as The inserted character may be the same as the character in the corresponding synchronization sequence, or may be opposite to the character in the corresponding synchronization sequence, or the insertion character may also be 0.
  • N is a positive integer greater than or equal to 2, and the S-UMTS is supported by the sending device. If the baseband signal of 3.84 Mcps is required to support a transmission bandwidth of 2.5 MHz, the value of N may be 2; if necessary, 3.84 Mcps The baseband signal supports a transmission bandwidth of 1.25 MHz, and N can take a value of 4.
  • the synchronization signal includes a primary synchronization signal and a secondary synchronization signal.
  • the synchronization signal in the S-UMTS system can be obtained by interpolation from the synchronization signal in the UMTS system, as follows:
  • Cpsc (1 + j) x ⁇ a, a, a, -a, -a, a, -a, -a, a, a, a, -a, a, -a, a, a, a>;
  • b ⁇ xl, x2, x3, x4, x5, x6, x7, x8, -x9, -xlO, -xll, -xl2, -xl3, -xl4, -xl5, -xl6> ;
  • ⁇ xl, x2, x3 , xl6> ⁇ 1, 1, 1, 1, 1, 1, 1, -1, -1, 1, -1, 1, -1, 1, -1, 1>;
  • a, b , z represents a vector; xl , x2, x3, ..., xl6 represent an element in the vector.
  • H is the Hadamard matrix
  • Cssc,k (1 + j) X ⁇ hm(0) x z(0), hm(l) x z(l), hm(2) x z(2), hm(255) x z(255)>;
  • Each group of secondary synchronization signals contains 15 secondary synchronization signal sequences Cssc,k.
  • Cssc,k When different sets of secondary synchronization signals are transmitted in different time slots, the value of k is allocated by fixed code resources. The table is determined.
  • a when generating the primary synchronization signal sequence Cpsc_Scal, a can be interpolated first, for example, inserting N-1 interpolations before or after each character in a to obtain p, the interpolation can be any value, typically Ground, the N-1 interpolations may be equal to the reference values of the a sequence, or all of them are 0, or all vice versa. For example, insert N-1 characters after each character in a as an example.
  • p ⁇ l, yl(l), yl(2), ...yl(Nl), 1 , y2(l), y2(2), y2(Nl), 1 , y3(l), y3(2 ), y3(Nl), 1 , y4(l), y4(2), y4(Nl), 1 , y5(l), y5(2), y5(Nl), 1 , y6(l), y6( 2), y6(Nl), -1, y7(l), y7(2), y7(Nl), -1, y8(l), y8(2), y8(Nl), 1 , y9(l) , y9(2), y9(Nl), -1 , ylO(l), yl0(2), ylO(Nl), 1 , yll(l), yll(2), yll(Nl), -1 , yl2 (l),
  • Cpsc_Scal (l + j) x ⁇ p, p, p, -p, -p, p, -p, -p, p, p, p, -p, p, -p, p, p>.
  • Cssc,k when generating the secondary synchronization signal sequence Cssc, k_Scal, Cssc,k can be obtained by interpolation, for example, inserting N-1 interpolations before or after each character in Cssc,k to obtain Cssc, k_Scal,
  • the interpolation can be any value, typically the N-1 interpolations can be equal to the reference values of the Cssc, k sequences, or all zeros, or all the opposite. For example, inserting after each character in Cssc,k Take Nl characters as an example.
  • the position corresponding to the inserted character is set to the 0 position.
  • the corresponding position of the last N-1 characters in each of the N characters in the synchronization signal is set to the 0 position; or, when the inserted character is in the corresponding synchronization sequence character In the front, the position corresponding to the first N-1 characters out of every N characters in the synchronization signal is set to the 0 position.
  • the sending module 203 includes:
  • the first sending unit 203a is configured to: when the synchronization signal is a primary synchronization signal, send the primary synchronization signal that is zeroed by the first M chips of each of the N consecutive time slots to the receiving device;
  • the second sending unit 203b is configured to: when the synchronization signal is a secondary synchronization signal, send the secondary synchronization signal that is zeroed to the receiving by the first M chips in each slot in the N consecutive radio frames.
  • one radio frame includes K time slots
  • the main synchronization signal includes at least one set of primary synchronization sequences
  • the primary synchronization sequence includes M characters
  • the secondary synchronization signal includes at least K sets of secondary synchronization sequences.
  • Each set of the secondary synchronization sequence contains M characters.
  • each 10ms radio frame used to carry the synchronization signal contains 15 time slots, each of which transmits 2560 chips.
  • a set of primary synchronization signals includes a Cpsc of 256 characters, which is completed in one time slot; and a complete set of secondary synchronization signals contains 15 Cssc,k, each Cssc,k also has 256 characters.
  • a complete set of secondary synchronization signals needs to be transmitted in one radio frame, and one Cssc,k is transmitted per time slot.
  • the receiving device in the UMTS system acquires the primary synchronization signal in units of one time slot, and acquires the secondary synchronization signal in units of one radio frame.
  • the S-UMTS is supported by the sending device, and the value of N is 2, as shown in Figure 4.
  • a schematic diagram of synchronization signal transmission in S-UMTS wherein the S-UMTS follows the synchronization channel in the UMTS, and the primary synchronization signal and the secondary synchronization signal occupy the first 256 chips in each time slot for transmission.
  • a set of primary synchronization signals includes a Cpsc_Scal, which is 256*2 characters, which needs to be transmitted in two time slots; and a complete set of secondary synchronization signals contains 15 Cssc, k_Scal, each Cssc, k_Scal With 256*2 characters, a complete set of secondary sync signals needs to be transmitted in two radio frames, and a complete Cssc, k_Scal is transmitted every two slots.
  • the receiving device in the S-UMTS system acquires the primary synchronization signal in units of two time slots, and acquires the secondary synchronization signal in units of two radio frames.
  • a group of primary synchronization signals includes a Cpsc_Scal, which is The transmission is completed in N time slots; and a complete set of secondary synchronization signals contains 15 Cssc, k_Scal, which need to be transmitted in N radio frames, and a complete Cssc, k_Scal is transmitted every N time slots.
  • the sending module 203 includes:
  • the third sending unit 203c is configured to: when the synchronization signal is the primary synchronization signal, send the primary synchronization signal that is zeroed to the receiving device by using the first M*N chips in one time slot;
  • the fourth sending unit 203d is configured to send, when the synchronization signal is a secondary synchronization signal, the secondary synchronization signal that is zeroed by the first M*N chips in each time slot in one radio frame.
  • one radio frame includes K time slots
  • the main synchronization signal includes at least one set of primary synchronization sequences
  • the primary synchronization sequence includes M characters
  • the secondary synchronization signal includes at least K sets of secondary synchronization sequences.
  • Each set of the secondary synchronization sequence contains M characters.
  • the synchronization channel in the UMTS system can also be modified to use the first 256*N chips in each slot as the synchronization channel. It should be noted that the value of N must be less than 10.
  • the S-UMTS is supported by the sending device, and the value of N is 2, for example, refer to another synchronization signal transmission diagram in the S-UMTS as shown in FIG. 5, where the S-UMTS modifies the synchronization channel in the UMTS,
  • the sync signal and the secondary sync signal occupy the first 256*2 chips in each time slot for transmission.
  • a set of primary synchronization signals includes a Cpsc_Scal, a total of 256*2 characters, which can be transmitted in one time slot; and a complete set of secondary synchronization signals includes 15 Cssc, k_Scal, each Cssc, k_Scal 256 * 2 characters, a complete set of secondary synchronization signals can only be transmitted within one radio frame, and each time slot transmits a complete Cssc, k_Scal.
  • Receiver in S-UMTS system When receiving the synchronization signal, the primary synchronization signal is acquired in units of one time slot, and the secondary synchronization signal is acquired in units of one radio frame.
  • the method provided by the above solution when generating the synchronization signal, inserts N-1 interpolations for each character in the corresponding synchronization sequence, and sets the N-1 insertion character of each N characters to 0 when transmitting the synchronization signal, thereby
  • the sync sequence characters in the original baseband signal can remain intact after being set to 0, thereby ensuring the synchronization performance of the signal while supporting a smaller transmission bandwidth and reducing intersymbol interference.
  • the transmitting device provided by the embodiment of the present invention generates a synchronization signal including one synchronization sequence character and N-1 insertion characters at a specified position every N characters, and each of the synchronization signals is generated.
  • N-1 characters of the N characters at the specified position are set to zero and then sent to the receiving device, and the insertion character is added at the 0 position in the synchronization signal, thereby solving N-1 of every N characters in the baseband signal.
  • the synchronization signal loses part of the information, which causes the orthogonality of the synchronization sequence to be destroyed, and achieves the purpose of ensuring synchronization performance while reducing inter-symbol interference. Please refer to FIG.
  • the transmitting device can transmit a baseband signal having a higher chip rate through a smaller transmission bandwidth.
  • the transmitting device may be a transmitting device supporting S-UMTS.
  • the transmitting device can include: a processor 001 and a transmitter 002;
  • the processor 001 is configured to generate a synchronization signal, where each consecutive N characters of the synchronization signal includes one synchronization sequence character and N-1 insertion characters, and the N-1 insertion characters are in the N characters. Specify the position, N > 2, N is an integer;
  • the processor 001 is further configured to zero the N-1 characters in the specified position among the N characters in the synchronization signal;
  • the processor 001 is further configured to control the transmitter 002 to send a zero-synchronized synchronization signal to the receiving device.
  • the transmitting device provided by the embodiment of the present invention generates a synchronization signal including one synchronization sequence character and N-1 insertion characters at a specified position every N characters, and each of the synchronization signals is generated.
  • N-1 characters of the N characters at the specified position are set to zero and then sent to the receiving device, and the insertion character is added at the 0 position in the synchronization signal, thereby solving N-1 of every N characters in the baseband signal.
  • the synchronization signal loses part of the information, which causes the orthogonality of the synchronization sequence to be destroyed, and achieves the purpose of ensuring synchronization performance while reducing inter-symbol interference. Please refer to FIG.
  • the transmitting device can transmit a baseband signal with a higher chip rate through a smaller transmission bandwidth.
  • the transmitting device may be a transmitting device supporting S-UMTS.
  • the sending device may include: a processor 003 and a transmitter 004;
  • the processor 003 is configured to generate a synchronization signal, where each consecutive N characters of the synchronization signal includes one synchronization sequence character and N-1 insertion characters, and the N-1 insertion characters are in the N characters. Specify the position, N > 2, N is an integer;
  • the processor 003 is further configured to zero the N-1 characters in the specified position in each of the synchronization signals;
  • the processor 003 is further configured to control the transmitter 004 to send the zeroed synchronization signal to the receiving device.
  • the synchronization signal can be obtained by interpolating the synchronization signal in the conventional UMTS system.
  • the specific generation method of the synchronization signal in the S-UMTS system refer to the description in the embodiment corresponding to FIG. 2, and details are not described herein again.
  • the processor 003 is configured to: when the synchronization signal is a primary synchronization signal, control the transmitter 004 to send the primary synchronization signal after the zeroth of the first M chips of each of the N consecutive time slots to The receiving device;
  • the processor 003 is configured to, when the synchronization signal is a secondary synchronization signal, control the secondary synchronization signal that the transmitter 004 will be zeroed by the first M chips in each time slot in the N consecutive radio frames. Sent to the receiving device;
  • one radio frame includes K time slots
  • the main synchronization signal includes at least one set of primary synchronization sequences
  • the primary synchronization sequence includes M characters
  • the secondary synchronization signal includes at least K sets of secondary synchronization sequences.
  • Each set of the secondary synchronization sequence contains M characters.
  • the transmitting device supports the S-UMTS as an example.
  • the transmitting device sends the primary synchronization signal in units of N time slots, and the transmission process of the secondary synchronization signal in units of N radio frames. Referring to the embodiment corresponding to FIG. 2 and FIG. 4 The relevant expressions in the description are not repeated here.
  • the processor 003 is configured to: when the synchronization signal is a primary synchronization signal, control the transmitter 004 to send the primary synchronization signal that is zeroed to the receiving device by using the first M*N chips in one time slot.
  • the processor 003 is configured to, when the synchronization signal is a secondary synchronization signal, control the transmitter 004 to pass the zero of the first M*N chips in each time slot in one radio frame.
  • a synchronization signal is sent to the receiving device; Wherein, one radio frame includes K time slots, and the main synchronization signal includes at least one set of primary synchronization sequences, the primary synchronization sequence includes one character, and the secondary synchronization signal includes at least a group of secondary synchronization sequences. Each set of the secondary synchronization sequence contains one character.
  • the transmitting device supports the S-UMTS, and the transmitting device sends the primary synchronization signal in units of one time slot.
  • the transmission process of transmitting the secondary synchronization signal in units of one radio frame is referred to the embodiment corresponding to FIG. 2 and FIG. The relevant expressions in the description are not repeated here.
  • the N-1 insertion characters are the same as the synchronization sequence characters; or, the N-1 insertion characters are opposite to the synchronization sequence characters; or, the N-1 insertion characters are 0; or, the N-1 Insert characters are arbitrary values.
  • the transmitting device provided by the embodiment of the present invention generates a synchronization signal including one synchronization sequence character and N-1 insertion characters at a specified position in each character, and each of the synchronization signals is generated.
  • N-1 characters in the specified position are set to zero and then sent to the receiving device, and the insertion character is added at the 0 position in the synchronization signal, and N-1 of each character in the baseband signal is solved.
  • the synchronization signal loses part of the information, which causes the orthogonality of the synchronization sequence to be destroyed, and achieves the purpose of ensuring synchronization performance while reducing inter-symbol interference.
  • FIG. 8 is a schematic structural diagram of a receiving device according to an embodiment of the present invention.
  • the receiving device can receive a synchronization signal transmitted through a smaller transmission bandwidth.
  • the receiving device may be a receiving device supporting S-UMTS.
  • the receiving device can include:
  • the receiving module 301 is configured to receive a zero-synchronized synchronization signal, where the zero-synchronized synchronization signal is a signal that is sent by the sending device after the N-1 characters in a specified position in each of the synchronization signals are zeroed.
  • Each character of the synchronization signal includes one synchronization sequence character and N-1 insertion characters, and the N-1 insertion characters are at the specified position in the one character, ⁇ > 2, ⁇ is an integer;
  • the obtaining module 302 is configured to obtain a sequence consisting of non-zero characters in the zeroed synchronization signal as a synchronization sequence.
  • the receiving device receives, by the receiving and transmitting device, a synchronization signal including one synchronization sequence character and N-1 insertion characters at a specified position in each character, and A synchronization signal after 0 is sent after the N-1 characters in the specified position in each of the synchronization characters are zeroed, and a sequence consisting of non-zero characters in the synchronization signal after the 0 is acquired as a synchronization.
  • the sequence solves the problem that when the N-1 of each character in the baseband signal is set to 0, the synchronization signal loses part of the information, resulting in the destruction of the orthogonality of the synchronization sequence, and the interference between the symbols is reduced.
  • FIG. 9 is a schematic structural diagram of a receiving device according to another embodiment of the present invention.
  • the receiving device can receive a synchronization signal transmitted through a smaller transmission bandwidth.
  • the receiving device can include:
  • the receiving module 401 is configured to receive a zero-synchronized synchronization signal, where the zero-set synchronization signal is a signal that is sent by the transmitting device to zero the N-1 characters in a specified position in each of the N characters in the synchronization signal.
  • Each of the N characters of the synchronization signal includes one synchronization sequence character and N-1 insertion characters, and the N-1 insertion characters are at the specified position in the N characters, N > 2, and N is an integer;
  • the obtaining module 402 is configured to obtain a sequence consisting of non-zero characters in the zeroed synchronization signal as a synchronization sequence.
  • the interpolation can be obtained on the basis of the traditional UMTS synchronization signal.
  • the specific steps of the transmission device to generate the synchronization signal refer to the corresponding embodiment in FIG. Description, no longer repeat here.
  • the receiving module 401 is configured to: when the synchronization signal is a primary synchronization signal, acquire a character carried in the first M chips of each of the N consecutive time slots as the primary synchronization signal after being zeroed;
  • the receiving module 401 is configured to: when the synchronization signal is a secondary synchronization signal, acquire a character carried in the first M chips in each slot in the N consecutive radio frames as the secondary synchronization signal after being zeroed. .
  • the receiving module 401 is configured to: when the synchronization signal is a primary synchronization signal, acquire a character carried in the first M*N chips in one time slot as the primary synchronization signal after being zeroed;
  • the receiving module 401 is configured to: when the synchronization signal is a secondary synchronization signal, acquire a character carried in the first M*N chips in each time slot in one radio frame as the secondary synchronization after being set to zero. signal.
  • the transmitting device when the transmitting device sends the primary synchronization signal in units of one time slot and the secondary synchronization signal is transmitted in units of one radio frame, the specific transmission method and channel structure refer to FIG. The embodiment and the related expression in FIG. 5 are not described herein again.
  • the transmitting device inserts N-1 interpolations for each character in the corresponding synchronization sequence when generating the synchronization signal, and sets the N-1 insertion character of each N characters to 0 when transmitting the synchronization signal. Therefore, the synchronization sequence character in the original baseband signal can be completely received after being set to 0. The receiver receives, thereby ensuring the synchronization performance of the signal while supporting a smaller transmission bandwidth and reducing inter-symbol interference.
  • the receiving device provided by the embodiment of the present invention generates, by the receiving and transmitting device, a synchronization signal including one synchronization sequence character and N-1 insertion characters at a specified position in each N characters.
  • a synchronization signal after 0 is sent after the N-1 characters at the specified position in each of the N characters in the synchronization signal are set to zero, and a sequence consisting of non-zero characters in the synchronization signal after the 0 is acquired as a synchronization.
  • FIG. 10 is a schematic structural diagram of a receiving device according to another embodiment of the present invention.
  • the receiving device can receive a synchronization signal transmitted through a smaller transmission bandwidth.
  • the receiving device may be a receiving device supporting S-UMTS.
  • the receiving device may include: a receiver 005 and a processor 006;
  • the processor 005 is configured to control the receiver 006 to receive the zeroed synchronization signal, where the zeroed synchronization signal is set by the transmitting device to set N-1 characters in a specified position in each of the N characters in the synchronization signal.
  • a signal transmitted after zero, each synchronization character of the synchronization signal includes one synchronization sequence character and N-1 insertion characters, and the N-1 insertion characters are at the specified position in the N characters, N > 2, N is an integer;
  • the processor 005 is further configured to obtain a sequence consisting of non-zero characters in the zeroed synchronization signal as a synchronization sequence.
  • the receiving device provided by the embodiment of the present invention generates, by the receiving and transmitting device, a synchronization signal including one synchronization sequence character and N-1 insertion characters at a specified position in each N characters.
  • a synchronization signal after 0 is sent after the N-1 characters at the specified position in each of the N characters in the synchronization signal are set to zero, and a sequence consisting of non-zero characters in the synchronization signal after the 0 is acquired as a synchronization.
  • FIG. 11 is a schematic structural diagram of a receiving device according to still another embodiment of the present invention.
  • the receiving device can receive a synchronization signal transmitted through a smaller transmission bandwidth.
  • Receiving The device is an example of a receiving device that supports S-UMTS.
  • the receiving device may include: a receiver 007 and a processor 008;
  • the processor 007 is configured to control the receiver 008 to receive the zeroed synchronization signal, where the zeroed synchronization signal is set by the transmitting device to set the N-1 characters in the specified position in each of the N characters in the synchronization signal.
  • a signal transmitted after zero, each synchronization character of the synchronization signal includes one synchronization sequence character and N-1 insertion characters, and the N-1 insertion characters are at the specified position in the N characters, N > 2, N is an integer;
  • the processor 007 is further configured to obtain a sequence consisting of non-zero characters in the zeroed synchronization signal as a synchronization sequence.
  • the interpolation can be obtained on the basis of the traditional UMTS synchronization signal.
  • the specific steps of the transmission device to generate the synchronization signal refer to the corresponding embodiment in FIG. Description, no longer repeat here.
  • the processor 007 is configured to: when the synchronization signal is a primary synchronization signal, control the receiver to acquire a character carried in the first M chips of each of the N consecutive time slots as the primary after zeroing Synchronization signal
  • the processor 007 is configured to: when the synchronization signal is a secondary synchronization signal, control the receiver to acquire a character carried in the first M chips in each time slot in the N consecutive radio frames to be zeroed.
  • the secondary synchronization signal is a secondary synchronization signal.
  • the processor 007 is configured to: when the synchronization signal is a primary synchronization signal, control the receiver to acquire the character carried in the first M*N chips in one time slot as the primary synchronization signal after being zeroed;
  • the processor 007 is configured to: when the synchronization signal is a secondary synchronization signal, control the receiver to acquire a character carried in the first M*N chips in each time slot in one radio frame as zero The secondary sync signal.
  • the transmitting device when the transmitting device sends the primary synchronization signal in units of one time slot and the secondary synchronization signal is transmitted in units of one radio frame, the specific transmission method and channel structure refer to FIG. The embodiment and the related expression in FIG. 5 are not described herein again.
  • the receiving device provided by the embodiment of the present invention generates, by the receiving and transmitting device, a synchronization message including one synchronization sequence character and N-1 insertion characters at a specified position in every N characters. And set a zero-synchronization signal sent after the N-1 characters at the specified position in each of the N characters in the synchronization signal are set to zero, and the non-zero characters in the synchronization signal after the zero is set.
  • the sequence is obtained as a synchronization sequence, which solves the problem that when the N-1 of each N characters in the baseband signal is set to 0, the synchronization signal loses part of the information, resulting in the destruction of the orthogonality of the synchronization sequence, and the symbol is reduced.
  • the purpose of simultaneous performance while ensuring synchronization performance.
  • FIG. 12 is a flowchart of a method for synchronizing signal transmission according to an embodiment of the present invention.
  • the method can be used to enable a baseband signal with a higher chip rate to be transmitted through a smaller transmission bandwidth in a transmitting device.
  • the transmitting device may be a transmitting device supporting S-UMTS.
  • the synchronization signal transmission method may include:
  • Step 502 Generate a synchronization signal, where each consecutive N characters of the synchronization signal includes one synchronization sequence character and N-1 insertion characters, and the N-1 insertion characters are at a specified position in the N characters, N > 2, N is an integer;
  • Step 504 setting N-1 characters in the specified position among the N characters in the synchronization signal to zero;
  • Step 506 Send the zeroed synchronization signal to the receiving device.
  • the synchronization signal transmission method generates a synchronization signal including one synchronization sequence character and N-1 insertion characters at a specified position every N characters, and the synchronization signal is generated.
  • the N-1 characters at the specified position in each of the N characters are set to zero and then sent to the receiving device, and the insertion character is added at the 0 position in the synchronization signal, thereby solving the N- in every N characters in the baseband signal.
  • the synchronization signal loses part of the information, which causes the orthogonality of the synchronization sequence to be destroyed, and achieves the purpose of ensuring synchronization performance while reducing inter-symbol interference. Referring to FIG.
  • the sending device is a sending device that supports S-UMTS
  • the synchronization signal transmission method may include:
  • Step 602 Generate a synchronization signal, where each consecutive N characters of the synchronization signal includes one synchronization sequence character and N-1 insertion characters, and the N-1 insertion characters are at a specified position in the N characters, N > 2, N is an integer;
  • the N-1 insertion characters are the same as the synchronization sequence characters; or, the N-1 insertion words The character is opposite to the synchronization sequence character; or, the N-1 insertion characters are 0; or, the N-1 insertion characters are arbitrary values.
  • the transmitting device may insert N-1 insertion characters corresponding to the characters in each synchronization sequence when generating the synchronization signal, and the insertion character may be any value, such as The inserted character may be the same as the character in the corresponding synchronization sequence, or may be opposite to the character in the corresponding synchronization sequence, or the insertion character may also be 0.
  • N is a positive integer greater than or equal to 2, and the S-UMTS is supported by the sending device. If the baseband signal of 3.84 Mcps is required to support a transmission bandwidth of 2.5 MHz, the value of N may be 2; if necessary, 3.84 Mcps The baseband signal supports a transmission bandwidth of 1.25 MHz, and N can take a value of 4.
  • the synchronization signal includes a primary synchronization signal and a secondary synchronization signal.
  • the synchronization signal in the S-UMTS system can be obtained by interpolation from the synchronization signal in the UMTS system, as follows:
  • Cpsc (1 + j) x ⁇ a, a, a, -a, -a, a, -a, -a, a, a, a, -a, a, -a, a, a, a>;
  • b ⁇ xl, x2, x3, x4, x5, x6, x7, x8, -x9, -xlO, -xll, -xl2, -xl3, -xl4, -xl5, -xl6> ;
  • ⁇ xl, x2, x3 , xl6> ⁇ 1, 1, 1, 1, 1, 1, 1, -1, -1, 1, -1, 1, -1, 1, -1, 1>;
  • a, b, z represents a vector; xl , x2, x3, ..., xl6 represent an element in the vector.
  • Cssc,k (1 + j) X ⁇ hm(0) x z(0), hm(l) x z(l), hm(2) x z(2), hm(255) x z(255)>;
  • each group of secondary synchronization signals contains 15 secondary synchronization signals.
  • the sequence Cssc,k when different sets of secondary synchronization signals are transmitted in different time slots, the value of k is determined by a fixed code resource allocation table.
  • a when generating the primary synchronization signal sequence Cpsc_Scal, a can be interpolated first, for example, inserting N-1 interpolations before or after each character in a to obtain p, the interpolation can be any value, typically Ground, the N-1 interpolations may be equal to the reference values of the a sequence, or all of them are 0, or all vice versa. For example, insert N-1 characters after each character in a as an example.
  • p ⁇ l , yl(l), yl(2), ...yl(Nl), 1 , y2(l), y2(2), y2(Nl), 1 , y3(l), y3(2 ), y3(Nl), 1 , y4(l), y4(2), y4(Nl), 1 , y5(l), y5(2), y5(Nl), 1 , y6(l), y6( 2), y6(Nl), -1, y7(l), y7(2), y7(Nl), -1, y8(l), y8(2), y8(Nl), 1 , y9(l) , y9(2), y9(Nl), -1 , ylO(l), yl0(2), ylO(Nl), 1 , yll(l), yll(2), yll(Nl), -1 , yl2 (
  • Cssc,k when generating the secondary synchronization signal sequence Cssc, k_Scal, Cssc,k can be obtained by interpolation, for example, inserting N-1 interpolations before or after each character in Cssc,k to obtain Cssc, k_Scal,
  • the interpolation can be any value, typically the N-1 interpolations can be equal to the reference values of the Cssc, k sequences, or all zeros, or all the opposite. For example, insert after each character in Cssc,k
  • Step 604 setting N-1 characters in the specified position among the N characters in the synchronization signal to zero;
  • the position corresponding to the inserted character is set to 0.
  • the corresponding position of the last N-1 characters in each of the N characters in the synchronization signal is set to the 0 position; or, when the inserted character is in the corresponding synchronization sequence character In the front, the position corresponding to the first N-1 characters in every N characters in the synchronization signal is set to the 0 position.
  • Step 606 When the synchronization signal is a primary synchronization signal, send the primary synchronization signal that is zeroed by the first M chips of each of the N consecutive time slots to the receiving device; There is at least one set of primary synchronization sequences, and the primary synchronization sequence includes M characters;
  • Step 608 When the synchronization signal is a secondary synchronization signal, send the secondary synchronization signal that is zeroed by the first M chips in each time slot in the N consecutive radio frames to the receiving device;
  • the signal includes at least K sets of secondary synchronization sequences, and each of the secondary synchronization sequences includes M characters;
  • each 10ms radio frame used to carry the synchronization signal contains 15 time slots, each of which transmits 2560 chips.
  • a set of primary synchronization signals includes a Cpsc of 256 characters, which is completed in one time slot; and a complete set of secondary synchronization signals contains 15 Cssc,k, each Cssc,k also has 256 characters.
  • a complete set of secondary synchronization signals needs to be transmitted in one radio frame, and one Cssc,k is transmitted per time slot.
  • the receiving device in the UMTS system acquires the primary synchronization signal in units of one time slot, and acquires the secondary synchronization signal in units of one radio frame.
  • the S-UMTS is supported by the sending device, and the value of N is 2, for example, refer to a synchronization signal transmission diagram in S-UMTS as shown in FIG. 4, where the S-UMTS inherits the synchronization channel in the UMTS, the main The sync signal and the secondary sync signal occupy the first 256 chips in each time slot for transmission.
  • a set of primary synchronization signals includes a Cpsc_Scal, which is 256*2 characters, which needs to be transmitted in two time slots; and a complete set of secondary synchronization signals contains 15 Cssc, k_Scal, each Cssc, k_Scal With 256*2 characters, a complete set of secondary sync signals needs to be transmitted in two radio frames, and a complete Cssc, k_Scal is transmitted every two slots.
  • the receiving device in the S-UMTS system acquires the primary synchronization signal in units of two time slots, and acquires the secondary synchronization signal in units of two radio frames.
  • a group of primary synchronization signals includes a Cpsc_Scal, which is The transmission is completed in N time slots; and a complete set of secondary synchronization signals contains 15 Cssc, k_Scal, which need to be transmitted in N radio frames, and a complete Cssc, k_Scal is transmitted every N time slots.
  • Step 610 When the synchronization signal is a primary synchronization signal, send the primary synchronization signal to the receiving device by using the first M*N chips in one time slot; the primary synchronization signal includes at least 1 set of primary synchronization sequences, the primary synchronization sequence comprising M characters;
  • Step 612 When the synchronization signal is a secondary synchronization signal, send the secondary synchronization signal that is zeroed to the receiving device by using the first M*N chips in each time slot in one radio frame.
  • the signal includes at least K sets of secondary synchronization sequences, and each of the secondary synchronization sequences includes M characters.
  • the synchronization channel in the UMTS system can also be modified to use the first 256*N chips in each slot as the synchronization channel. It should be noted that the value of N must be less than 10.
  • the S-UMTS is supported by the sending device, and the value of N is 2, for example, refer to another synchronization signal transmission diagram in the S-UMTS as shown in FIG. 5, where the S-UMTS modifies the synchronization channel in the UMTS,
  • the sync signal and the secondary sync signal occupy the first 256*2 chips in each time slot for transmission.
  • a set of primary synchronization signals includes a Cpsc_Scal, a total of 256*2 characters, which can be transmitted in one time slot; and a complete set of secondary synchronization signals includes 15 Cssc, k_Scal, each Cssc, k_Scal 256 * 2 characters, a complete set of secondary synchronization signals can only be transmitted within one radio frame, and each time slot transmits a complete Cssc, k_Scal.
  • the receiving device in the S-UMTS system acquires the primary synchronization signal in units of one time slot, and acquires the secondary synchronization signal in units of one radio frame.
  • the method provided by the above solution when generating the synchronization signal, inserts N-1 interpolations for each character in the corresponding synchronization sequence, and sets the N-1 insertion character of each N characters to 0 when transmitting the synchronization signal, thereby
  • the sync sequence characters in the original baseband signal can remain intact after being set to 0, thereby ensuring the synchronization performance of the signal while supporting a smaller transmission bandwidth and reducing intersymbol interference.
  • the synchronization signal transmission method generates a synchronization signal including one synchronization sequence character and N-1 insertion characters at a specified position every N characters, and the synchronization signal is generated.
  • the N-1 characters at the specified position in each of the N characters are set to zero and then sent to the receiving device, and the insertion character is added at the 0 position in the synchronization signal, thereby solving the N- in every N characters in the baseband signal.
  • the synchronization signal loses part of the information, which causes the orthogonality of the synchronization sequence to be destroyed, and achieves the purpose of ensuring synchronization performance while reducing inter-symbol interference. Please refer to FIG.
  • the method can be used for receiving at a receiving device to transmit through a smaller transmission bandwidth.
  • Synchronization signal may be a receiving device supporting S-UMTS.
  • the synchronization signal transmission method may include:
  • Step 702 Receive a zero-synchronization signal, where the zero-set synchronization signal is a signal sent by the transmitting device after the N-1 characters in a specified position in each of the N characters in the synchronization signal are zeroed, and the synchronization signal is sent.
  • Each N characters includes one synchronization sequence character and N-1 insertion characters, and the N-1 insertion characters are at the specified position among the N characters, N > 2, and N is an integer;
  • Step 704 Acquire a sequence consisting of non-zero characters in the zeroed synchronization signal as a synchronous sequence.
  • the synchronization signal transmission method generates, by the receiving and transmitting device, a synchronization signal including one synchronization sequence character and N-1 insertion characters at a specified position in each N characters. And setting a zero-synchronization signal sent after the N-1 characters at the specified position in each of the N characters in the synchronization signal are set to zero, and acquiring a sequence consisting of non-zero characters in the synchronization signal after the 0 is set.
  • the problem that the synchronization signal loses part of the information when the N-1 of each N characters in the baseband signal is set to 0 is solved, resulting in the problem that the orthogonality of the synchronization sequence is destroyed, and the inter-symbol interference is reduced.
  • FIG. 15 a flowchart of a method for synchronizing signal transmission according to another embodiment of the present invention is shown.
  • the method can be used to receive a synchronization signal transmitted over a smaller transmission bandwidth at a receiving device.
  • the receiving device Take the receiving device as a receiving device supporting S-UMTS as an example.
  • the synchronization signal transmission method may include:
  • Step 802 When the synchronization signal is the primary synchronization signal, obtain the character carried in the first M chips of each of the N consecutive time slots as the primary synchronization signal after zeroing;
  • Step 804 When the synchronization signal is the primary synchronization signal, obtain the character carried in the first M*N chips in one time slot as the primary synchronization signal after the zero is set;
  • the zero-synchronized synchronization signal is a signal that is sent by the transmitting device to zero the N-1 characters in a specified position among every N characters in the synchronization signal, and the synchronization signal includes one per N characters.
  • the transmitting device can generate the synchronization signal, and the interpolation can be performed on the basis of the synchronization signal of the conventional UMTS.
  • the specific steps of the synchronization signal generated by the transmitting device refer to step 602 of the embodiment corresponding to FIG. The description is not repeated here.
  • the transmitting device sends the primary synchronization signal in units of N time slots and transmits the secondary synchronization signal in units of N radio frames
  • the specific transmission method and channel structure refer to the corresponding embodiment in FIG. 13 and the correlation in FIG. The statement is not repeated here.
  • Step 806 When the synchronization signal is a secondary synchronization signal, obtain a character carried in the first M chips in each time slot in the N consecutive radio frames as a secondary synchronization signal after being set to zero;
  • Step 808 When the synchronization signal is a secondary synchronization signal, obtain a character carried in the first M*N chips in each time slot in one radio frame as a secondary synchronization signal after being set to zero;
  • Step 810 Acquire a sequence consisting of non-zero characters in the zeroed synchronization signal as a synchronization sequence.
  • the transmitting device inserts N-1 interpolations for each character in the corresponding synchronization sequence when generating the synchronization signal, and sets the N-1 insertion character of each N characters to 0 when transmitting the synchronization signal. Therefore, the synchronization sequence characters in the original baseband signal can be completely received by the receiving device after being set to 0, thereby achieving the synchronization performance of the signal while supporting a smaller transmission bandwidth and reducing inter-symbol interference.
  • the synchronization signal transmission method generates, by the receiving and transmitting device, a synchronization signal including one synchronization sequence character and N-1 insertion characters at a specified position in each N characters. And setting a zero-synchronization signal sent after the N-1 characters at the specified position in each of the N characters in the synchronization signal are set to zero, and acquiring a sequence consisting of non-zero characters in the synchronization signal after the 0 is set.
  • the problem that the synchronization signal loses part of the information when the N-1 of each N characters in the baseband signal is set to 0 is solved, resulting in the problem that the orthogonality of the synchronization sequence is destroyed, and the inter-symbol interference is reduced.
  • FIG. 16 there is shown a system configuration diagram of a synchronization signal transmission system according to an embodiment of the present invention.
  • the system can be used to enable baseband signals with higher chip rates to be transmitted over a smaller transmit bandwidth.
  • the system may be a system supporting S-UMTS, and the synchronous signal transmission system may include:
  • the transmitting device 901 as shown in any of the above-mentioned Fig. 1, Fig. 2, Fig. 6, or Fig. 7 and the receiving device 902 as shown in any of Figs. 8 to 11 above.
  • the sending device generates each The N characters include a synchronization sequence character and a synchronization signal of N-1 insertion characters at a specified position, and zero values of N-1 characters at the specified position among every N characters in the synchronization signal are set.
  • the receiving device acquires a sequence consisting of non-zero characters in the synchronization signal after being set to 0 as a synchronization sequence, and solves the problem of synchronizing N-1 of each N characters in the baseband signal to 0.
  • FIG. 17 is a schematic structural diagram of a transmitting device according to an embodiment of the present invention.
  • the transmitting device can transmit a baseband signal with a higher chip rate through a smaller transmission bandwidth.
  • the transmitting device may be a transmitting device supporting S-UMTS.
  • the sending device can include:
  • the signal generating module 1001 is configured to generate a synchronization signal, where each consecutive N characters of the synchronization signal includes one synchronization sequence character and N-1 insertion characters, and the N-1 insertion characters are in the N characters. Specify the position, N > 2, N is an integer;
  • the sending module 1002 is configured to send the synchronization signal to the receiving device.
  • the transmitting device provided by the embodiment of the present invention generates a synchronization signal including one synchronization sequence character and N-1 insertion characters at a specified position every N characters and transmits the synchronization signal to the receiving device, in synchronization.
  • the insertion position is added to the specified position in the signal to increase the transmission energy, and the effect of the processing gain of the transmission channel can be ensured when the baseband signal passes through the filter with a small bandwidth.
  • FIG. 18 it is a schematic structural diagram of a transmitting device according to another embodiment of the present invention.
  • the transmitting device can transmit a baseband signal having a higher chip rate through a smaller transmission bandwidth.
  • the sending device is a sending device that supports S-UMTS, and the sending device may include: a signal generating module 1101, configured to generate a synchronization signal, where each consecutive N characters of the synchronization signal includes one synchronization sequence character and N - 1 insert character, the N-1 insert character is at a specified position among the N characters, N > 2, N is an integer;
  • the sending module 1102 is configured to send the synchronization signal to the receiving device.
  • the N-1 insertion characters are the same as the synchronization sequence characters; or, the N-1 insertion characters are opposite to the synchronization sequence characters; or, the N-1 insertion characters are 0; or, the N-1 Insert characters are arbitrary values.
  • the device may insert N1 insertion characters corresponding to the characters in each synchronization sequence when generating the synchronization signal, and the insertion characters may be the same as the characters in the corresponding synchronization sequence, or may be opposite to the characters in the corresponding synchronization sequence, or The inserted character can be any value.
  • N is a positive integer greater than or equal to 2, and the S-UMTS is supported by the sending device. If the baseband signal of 3.84 Mcps is required to support a transmission bandwidth of 2.5 MHz, the value of N may be 2; if necessary, 3.84 Mcps The baseband signal supports a transmission bandwidth of 1.25 MHz, and N can take a value of 4.
  • the synchronization signal includes a primary synchronization signal and a secondary synchronization signal.
  • the synchronization signal in the S-UMTS system can be obtained by interpolation from the synchronization signal in the UMTS system, as follows:
  • Cpsc (1 + j) x ⁇ a, a, a, -a, -a, a, -a, -a, a, a, a, -a, a, -a, a, a, a>;
  • b ⁇ xl, x2, x3, x4, x5, x6, x7, x8, -x9, -xlO, -xll, -xl2, -xl3, -xl4, -xl5,
  • ⁇ xl, x2, x3, xl6> ⁇ 1, 1, 1, 1, 1, 1, 1, 1, -1, -1, 1, -1, 1, -1, 1, -1, -1, 1>;
  • a, b, z represent a vector;
  • xl , x2, x3, ..., xl6 represent an element in the vector.
  • Cssc,k (1 + j) X ⁇ hm(0) x z(0), hm(l) x z(l), hm(2) x z(2), hm(255) x z(255)>;
  • Each group of secondary synchronization signals contains 15 secondary synchronization signal sequences Cssc,k.
  • Cssc,k When different sets of secondary synchronization signals are transmitted in different time slots, the value of k is allocated by fixed code resources. The table is determined.
  • the interpolation when generating the primary synchronization signal sequence Cpsc_Scal, it is possible to first perform a Interpolation, for example, inserting N-1 interpolations before or after each character in a, obtaining p, the interpolation can be any value, typically, the N-1 interpolations can be equal to the reference value of the a sequence, or all 0, or all the opposite. For example, insert N-1 characters after each character in a as an example.
  • p ⁇ l , yl(l), yl(2), ...yl(Nl), 1 , y2(l), y2(2), y2(Nl), 1 , y3(l), y3(2 ), y3(Nl), 1 , y4(l), y4(2), y4(Nl), 1 , y5(l), y5(2), y5(Nl), 1 , y6(l), y6( 2), y6(Nl), -1, y7(l), y7(2), y7(Nl), -1, y8(l), y8(2), y8(Nl), 1 , y9(l) , y9(2), y9(Nl), -1 , ylO(l), yl0(2), ylO(Nl), 1 , yll(l), yll(2), yll(Nl), -1 , yl2 (
  • Cssc,k when generating the secondary synchronization signal sequence Cssc,k_Scal, Cssc,k can be interpolated. For example, insert N-1 interpolation before or after each character in Cssc,k.
  • the interpolation can be any value.
  • the N-1 interpolations can be equal to the reference values of the Cssc, k sequences, or all of 0, or all vice versa. For example, insert after each character in Cssc,k
  • the sending module 1102 includes:
  • the first sending unit 1102a is configured to: when the synchronization signal is a primary synchronization signal, send the primary synchronization signal to the receiving device by using the first M chips in the N consecutive time slots;
  • the second sending unit 1102b is configured to: when the synchronization signal is a secondary synchronization signal, send the secondary synchronization signal to the receiving device by using the first M chips in each of the N consecutive wireless frames;
  • one radio frame includes K time slots
  • the main synchronization signal includes at least one group of main The step sequence
  • the main synchronization sequence includes M characters
  • the auxiliary synchronization signal includes at least K sets of secondary synchronization sequences, and each group of the secondary synchronization sequences includes M characters.
  • each 10ms radio frame used to carry the synchronization signal contains 15 time slots, each of which transmits 2560 chips.
  • a set of primary synchronization signals includes a Cpsc of 256 characters, which is completed in one time slot; and a complete set of secondary synchronization signals contains 15 Cssc,k, each Cssc,k also has 256 characters.
  • a complete set of secondary synchronization signals needs to be transmitted in one radio frame, and one Cssc,k is transmitted per time slot.
  • the receiving device in the UMTS system acquires the primary synchronization signal in units of one time slot, and acquires the secondary synchronization signal in units of one radio frame.
  • the S-UMTS is supported by the sending device, and the value of N is 2, for example, refer to a synchronization signal transmission diagram in S-UMTS as shown in FIG. 4, where the S-UMTS inherits the synchronization channel in the UMTS, the main The sync signal and the secondary sync signal occupy the first 256 chips in each time slot for transmission.
  • a set of primary synchronization signals includes a Cpsc_Scal, which is 256*2 characters, which needs to be transmitted in two time slots; and a complete set of secondary synchronization signals contains 15 Cssc, k_Scal, each Cssc, k_Scal With 256*2 characters, a complete set of secondary sync signals needs to be transmitted in two radio frames, and a complete Cssc, k_Scal is transmitted every two slots.
  • the receiving device in the S-UMTS system acquires the primary synchronization signal in units of two time slots, and acquires the secondary synchronization signal in units of two radio frames.
  • a group of primary synchronization signals includes a Cpsc_Scal, which is The transmission is completed in N time slots; and a complete set of secondary synchronization signals contains 15 Cssc, k_Scal, which need to be transmitted in N radio frames, and a complete Cssc, k_Scal is transmitted every N time slots.
  • the sending module 1102 includes:
  • the third sending unit 1102c is configured to: when the synchronization signal is a primary synchronization signal, send the primary synchronization signal to the receiving device by using the first M*N chips in one time slot;
  • the fourth sending unit 1102d is configured to: when the synchronization signal is a secondary synchronization signal, send the secondary synchronization signal to the receiving device by using the first M*N chips in each time slot in one wireless frame;
  • one radio frame includes K time slots
  • the main synchronization signal includes at least one set of primary synchronization sequences
  • the primary synchronization sequence includes M characters
  • the secondary synchronization signal includes at least K sets of secondary synchronization sequences.
  • Each set of the secondary synchronization sequence contains M characters.
  • the synchronization channel in the UMTS system can also be modified to use the first 256*N chips in each slot as the synchronization channel. It should be noted that the value of N must be less than 10.
  • the S-UMTS is supported by the sending device, and the value of N is 2, for example, refer to another synchronization signal transmission diagram in the S-UMTS as shown in FIG. 5, where the S-UMTS modifies the synchronization channel in the UMTS,
  • the sync signal and the secondary sync signal occupy the first 256*2 chips in each time slot for transmission.
  • a set of primary synchronization signals includes a Cpsc_Scal, a total of 256*2 characters, which can be transmitted in one time slot; and a complete set of secondary synchronization signals includes 15 Cssc, k_Scal, each Cssc, k_Scal 256 * 2 characters, a complete set of secondary synchronization signals can only be transmitted within one radio frame, and each time slot transmits a complete Cssc, k_Scal.
  • the receiving device in the S-UMTS system acquires the primary synchronization signal in units of one time slot, and acquires the secondary synchronization signal in units of one radio frame.
  • the method provided by the above solution when generating the synchronization signal, inserts N-1 interpolations for each character in the corresponding synchronization sequence, and can ensure the processing gain of the transmission channel when the baseband signal passes the filter with a small bandwidth.
  • the transmitting device provided by the embodiment of the present invention generates a synchronization signal in a synchronization signal by generating a synchronization signal including one synchronization sequence character and N-1 insertion characters at a specified position every N characters. Adding an insertion character increases the transmission energy, and the effect of the processing gain of the transmission channel can be ensured when the baseband signal passes through a filter having a small bandwidth.
  • FIG. 19 it is a schematic structural diagram of a transmitting device according to another embodiment of the present invention.
  • the transmitting device can transmit a baseband signal having a higher chip rate through a smaller transmission bandwidth.
  • the transmitting device may be a transmitting device supporting S-UMTS.
  • the transmitting device can include: a processor 009 and a transmitter 010;
  • the processor 009 is configured to generate a synchronization signal, where each consecutive N characters of the synchronization signal includes one synchronization sequence character and N-1 insertion characters, and the N-1 insertion characters are in the N characters. Specify the location, N > 2;
  • the processor 009 is further configured to control the transmitter 010 to send a synchronization signal to the receiving device.
  • the transmitting device provided by the embodiment of the present invention generates a synchronization signal in a synchronization signal by generating a synchronization signal including one synchronization sequence character and N-1 insertion characters at a specified position every N characters. Adding inserted characters, increasing the transmit energy, reaching the baseband signal with a small bandwidth The filter can guarantee the effect of the processing gain of the transmission channel.
  • FIG. 20 it is a schematic structural diagram of a transmitting device according to another embodiment of the present invention.
  • the transmitting device can transmit a baseband signal with a higher chip rate through a smaller transmission bandwidth.
  • the transmitting device may be a transmitting device supporting S-UMTS.
  • the sending device may include: a processor 011 and a transmitter 012;
  • the processor 011 is configured to generate a synchronization signal, where each consecutive N characters of the synchronization signal includes one synchronization sequence character and N-1 insertion characters, and the N-1 insertion characters are in the N characters. Specify the position, N > 2, N is an integer;
  • the processor 011 is further configured to control the transmitter 012 to send a synchronization signal to the receiving device.
  • the synchronization signal can be obtained by interpolating the synchronization signal in the conventional UMTS system.
  • the specific generation method of the synchronization signal in the S-UMTS system refer to the description in the embodiment corresponding to FIG. 2, and details are not described herein again.
  • the processor 011 is configured to: when the synchronization signal is a primary synchronization signal, control the transmitter 012 to send the primary synchronization signal to the receiving device by using the first M chips in the N consecutive time slots;
  • the processor 011 is configured to, when the synchronization signal is a secondary synchronization signal, control the transmitter 012 to send the secondary synchronization signal to the receiving by using the first M chips in each time slot in the N consecutive radio frames.
  • one radio frame includes K time slots
  • the main synchronization signal includes at least one set of primary synchronization sequences
  • the primary synchronization sequence includes M characters
  • the secondary synchronization signal includes at least K sets of secondary synchronization sequences.
  • Each set of the secondary synchronization sequence contains M characters.
  • the transmitting device supports the S-UMTS as an example.
  • the transmitting device sends the primary synchronization signal in units of N time slots, and the transmission process of the secondary synchronization signal in units of N radio frames. Referring to the embodiment corresponding to FIG. 2 and FIG. 4 The relevant expressions in the description are not repeated here.
  • the processor 011 is configured to: when the synchronization signal is a primary synchronization signal, control the transmitter 012 to send the primary synchronization signal to the receiving device by using the first M*N chips in one time slot;
  • the processor 011 is configured to, when the synchronization signal is a secondary synchronization signal, control the transmitter 012 to send the secondary synchronization signal to the first M*N chips in each time slot in one radio frame.
  • one radio frame includes K time slots
  • the main synchronization signal includes at least one group of main synchronization sequences
  • the main synchronization sequence includes M characters
  • the auxiliary synchronization signal includes at least K group auxiliary Step sequence, each group of the secondary synchronization sequence contains M characters.
  • the transmitting device supports the S-UMTS, and the transmitting device sends the primary synchronization signal in units of one time slot.
  • the transmission process of transmitting the secondary synchronization signal in units of one radio frame is referred to the embodiment corresponding to FIG. 2 and FIG. The relevant expressions in the description are not repeated here.
  • N-1 insertion characters are the same as the synchronization sequence characters
  • N-1 insertion characters are opposite to the synchronization sequence characters
  • N-1 insertion characters are arbitrary values.
  • the transmitting device provided by the embodiment of the present invention generates a synchronization signal in a synchronization signal by generating a synchronization signal including one synchronization sequence character and N-1 insertion characters at a specified position every N characters. Adding an insertion character increases the transmission energy, and the effect of the processing gain of the transmission channel can be ensured when the baseband signal passes through a filter having a small bandwidth.
  • FIG. 21 a flow chart of a method for synchronizing signal transmission according to an embodiment of the present invention is shown. The method can be used to enable a baseband signal having a higher chip rate to be transmitted through a smaller transmission bandwidth in a transmitting device.
  • the transmitting device may be a transmitting device supporting S-UMTS.
  • the synchronization signal transmission method may include:
  • Step 1202 Generate a synchronization signal, where each consecutive N characters of the synchronization signal includes one synchronization sequence character and N-1 insertion characters, and the N-1 insertion characters are at a specified position in the N characters, N > 2, N is an integer;
  • Step 1204 Send the synchronization signal to the receiving device.
  • the synchronization signal transmission method generates a synchronization signal including one synchronization sequence character and N-1 insertion characters at a specified position in each N character in the synchronization signal.
  • the insertion position is added at the specified position to increase the transmission energy, and the effect of the processing gain of the transmission channel can be ensured when the baseband signal passes through the filter with a small bandwidth.
  • FIG. 22 a flow chart of a method for synchronizing signal transmission according to another embodiment of the present invention is shown. The method can be used to enable a baseband signal having a higher chip rate to be transmitted through a smaller transmission bandwidth in a transmitting device.
  • the sending device is a sending device that supports S-UMTS
  • the synchronization signal transmission method may include:
  • Step 1302 Generate a synchronization signal, where each consecutive N characters of the synchronization signal includes one synchronization sequence character and N-1 insertion characters, and the N-1 insertion characters are in the N characters. Position, N > 2, N is an integer;
  • the N-1 insertion characters are the same as the synchronization sequence characters; or, the N-1 insertion characters are opposite to the synchronization sequence characters; or, the N-1 insertion characters are arbitrary values.
  • the specific method for generating the synchronization signal refer to the description in the embodiment corresponding to FIG. 18, and details are not described herein again.
  • Step 1304 When the synchronization signal is a primary synchronization signal, send the primary synchronization signal to the receiving device by using the first M chips of each of the N consecutive time slots.
  • the primary synchronization signal includes at least one set of primary synchronization sequences, and the primary synchronization sequence includes M characters;
  • Step 1306 When the synchronization signal is a secondary synchronization signal, send the secondary synchronization signal to the receiving device by using the first M chips in each time slot in the N consecutive radio frames.
  • the secondary synchronization signal includes at least K groups of secondary synchronization sequences, and each group of the secondary synchronization sequences includes M characters;
  • the transmitting device supports the S-UMTS, the transmitting device sends the primary synchronization signal in units of N time slots, and the transmission process of the secondary synchronization signal in units of N wireless frames.
  • the primary synchronization signal includes at least one set of primary synchronization sequences, and the primary synchronization sequence includes M characters;
  • Step 1310 When the synchronization signal is a secondary synchronization signal, send the secondary synchronization signal to the receiving device by using the first M*N chips in each time slot in one radio frame.
  • the secondary synchronization signal includes at least K sets of secondary synchronization sequences, and each of the secondary synchronization sequences includes M characters.
  • the transmitting device supports the S-UMTS as an example, and the transmitting device transmits the primary synchronization signal in units of one time slot, and transmits the secondary synchronization signal in units of one radio frame.
  • the transmitting device transmits the primary synchronization signal in units of one time slot, and transmits the secondary synchronization signal in units of one radio frame.
  • the N-1 insertion characters are the same as the synchronization sequence characters; or, the N-1 insertion characters are opposite to the synchronization sequence characters; or, the N-1 insertion characters are arbitrary values.
  • the synchronization signal transmission method provided by the embodiment of the present invention generates a synchronization signal including one synchronization sequence character and N-1 insertion characters at a specified position in each N character in the synchronization signal.
  • the insertion position is added at the specified position to increase the transmission energy, and the effect of the processing gain of the transmission channel can be ensured when the baseband signal passes through the filter with a small bandwidth.

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Abstract

本发明实施例提供了一种发送设备、接收设备、同步信号传输方法及***,涉及无线通信领域,发送设备包括:信号生成模块,用于生成同步信号,同步信号每N个字符中包含1个同步序列字符和处于指定位置的N-1个***字符;置零模块,用于将同步信号每N个字符中处于指定位置的N-1个置零;发送模块,用于将置零后的同步信号发送给接收设备。本发明通过生成每N个字符中包含有1个同步序列字符和处于指定位置的N-1个***字符的同步信号,并将该同步信号中每N个字符中处于该指定位置的N-1个字符置零后发送给接收设备,解决了将基带信号中每N个字符中的N-1个置0时使得同步信号丧失部分信息的问题,达到保证同步性能的目的。

Description

发送设备、 接收设备、 同步信号传输方法及*** 技术领域
本发明涉及无线通信领域, 特别涉及一种发送设备、 接收设备、 同步信号 传输方法及***。 背景技术
UMTS ( Universal Mobile Telecommunications System, 通用移动通讯*** ) 是 3GPP ( The 3rd Generation Partnership Project, 第三代合作伙伴计划)制定的 主流第三代无线通信技术标准。 S-UMTS ( Scalable UMTS , 可伸缩的 UMTS ) 则是对传统 UMTS的进一步扩展。
支持更小的发送带宽是 S-UMTS的目标特性之一。 传统的 UMTS的基带 信号的码片速率为 3.84Mcps,通过带宽为 5MHz的滤波器后占用带宽为 5MHz。 在 S-UMTS中, 为了使发送带宽小于 5MHz, 可以将 3.84Mcps的基带信号通 过一个小于 5MHz带宽的滤波器。 同时, 为了减少符号间干扰, S-UMTS还将 3.84Mcps的基带信号中每 N个字符中的 N-1个置为 0。比如,为了支持 2.5MHz 的发送带宽,可以将 3.84Mcps的基带信号中每 2个字符中的 1个置为 0; 为了 支持 1.25MHz的发送带宽, 可以将 3.84Mcps的基带信号中每 4个字符中的 3 个置为 0。
在实现本发明的过程中, 发明人发现现有技术至少存在以下问题: 现有技术中, 为了在支持更小的发送带宽的同时能够减少符号间干扰, 需 要将同步信道通过更小的带宽, 并进一步的将基带信号中每 N个字符中的 N-1 个置为 0, 这样会使得基带信号中包含的同步信号丧失部分信息, 从而导致同 步序列正交性遭到破坏, 同步性能差。 发明内容
为了解决现有技术中为了在支持更小的发送带宽的同时能够减少符号间 干扰, 需要将基带信号中每 N个字符中的 N-1个置为 0, 从而导致基带信号中 包含的同步信号丧失部分信息, 同步序列正交性遭到破坏的问题, 本发明实施 例提供了一种发送设备、 接收设备、 同步信号传输方法及***。 所述技术方案 :¾口下:
第一方面, 提供了一种发送设备, 所述发送设备包括:
信号生成模块,用于生成同步信号,所述同步信号的每连续 N个字符中包 含有 1个同步序列字符和 N-1个***字符, 所述 N-1个***字符处于所述 N 个字符中的指定位置, N > 2, N为整数;
置零模块, 用于将所述同步信号中的每 N 个字符中处于所述指定位置的
N-1个字符置零;
发送模块, 用于将置零后的同步信号发送给接收设备。
在第一方面的第一种可能实现方式中, 所述发送模块, 包括:
第一发送单元,用于当所述同步信号为主同步信号时,通过 N个连续时隙 中每个时隙的前 M个码片将置零后的所述主同步信号发送给所述接收设备; 其中, 所述主同步信号中至少包含有 1组主同步序列, 所述主同步序列包 含 M个字符。
在第一方面的第二种可能实现方式中, 所述发送模块, 包括:
第二发送单元,用于当所述同步信号为辅同步信号时,通过 N个连续无线 帧内的每个时隙中的前 M个码片将置零后的所述辅同步信号发送给所述接收 设备;
其中, 1个无线帧中包含 K个时隙, 所述辅同步信号中至少包含有 K组辅 同步序列, 每组所述辅同步序列包含 M个字符。
在第一方面的第三种可能实现方式中, 所述发送模块, 包括:
第三发送单元, 用于当所述同步信号为主同步信号时, 通过 1个时隙中的 前 M*N个码片将置零后的所述主同步信号发送给所述接收设备;
其中, 所述主同步信号中至少包含有 1组主同步序列, 所述主同步序列包 含 M个字符。
在第一方面的第四种可能实现方式中, 所述发送模块, 包括:
第四发送单元, 用于当所述同步信号为辅同步信号时, 通过 1个无线帧内 的每个时隙中的前 M*N个码片将置零后的所述辅同步信号发送给所述接收设 备;
其中, 1个无线帧中包含 K个时隙, 所述辅同步信号中至少包含有 K组辅 同步序列, 每组所述辅同步序列包含 M个字符。 第二方面, 提供了一种发送设备, 所述发送设备包括: 处理器和发射机; 所述处理器, 用于生成同步信号, 所述同步信号的每 N个字符中包含有 1 个同步序列字符和 N-1个***字符, 所述 N-1个***字符处于所述 N个字符 中的指定位置, N > 2, N为整数;
所述处理器,还用于将所述同步信号中的每 N个字符中处于所述指定位置 的 N-1个字符置零;
所述处理器, 还用于控制所述发射机将置零后的同步信号发送给接收设 备。
在第二方面的第一种可能实现方式中,
所述处理器, 用于当所述同步信号为主同步信号时, 控制所述发射机通过 N个连续时隙中每个时隙的前 M个码片将置零后的所述主同步信号发送给所 述接收设备;
其中, 所述主同步信号中至少包含有 1组主同步序列, 所述主同步序列包 含 M个字符。
在第二方面的二种可能实现方式中,
所述处理器, 用于当所述同步信号为辅同步信号时, 控制所述发射机通过 N个连续无线帧内的每个时隙中的前 M个码片将置零后的所述辅同步信号发 送给所述接收设备;
其中, 1个无线帧中包含 K个时隙, 所述辅同步信号中至少包含有 K组辅 同步序列, 每组所述辅同步序列包含 M个字符。
在第二方面的第三种可能实现方式中,
所述处理器, 用于当所述同步信号为主同步信号时, 控制所述发射机通过 1个时隙中的前 M*N个码片将置零后的所述主同步信号发送给所述接收设备; 其中, 所述主同步信号中至少包含有 1组主同步序列, 所述主同步序列包 含 M个字符。
在第二方面的第四种可能实现方式中,
所述处理器, 用于当所述同步信号为辅同步信号时, 控制所述发射机通过 1 个无线帧内的每个时隙中的前 M*N个码片将置零后的所述辅同步信号发送 给所述接收设备;
其中, 1个无线帧中包含 K个时隙, 所述辅同步信号中至少包含有 K组辅 同步序列, 每组所述辅同步序列包含 M个字符。 第三方面, 提供了一种接收设备, 所述接收设备包括:
接收模块, 用于接收置零后的同步信号, 所述置零后的同步信号为发送设 备将同步信号中的每 N个字符中处于指定位置的 N-1个字符置零后发送的信 号,所述同步信号的每 N个字符中包含有 1个同步序列字符和 N-1个***字符, 所述 N-1个***字符处于所述 N个字符中的所述指定位置, N > 2, N为整数; 获取模块, 用于将所述置零后的同步信号中的非零字符组成的序列获取为 同步序列。
在第三方面第一种可能实现方式中,
所述接收模块,用于当所述同步信号为主同步信号时,将 N个连续时隙中 每个时隙的前 M个码片中携带的字符获取为置零后的所述主同步信号。
在第三方面第二种可能实现方式中,
所述接收模块,用于当所述同步信号为辅同步信号时,将 N个连续无线帧 内的每个时隙中的前 M个码片中携带的字符获取为置零后的所述辅同步信号。
在第三方面第三种可能实现方式中,
所述接收模块, 用于当所述同步信号为主同步信号时, 将 1个时隙中的前 M*N个码片中携带的字符获取为置零后的所述主同步信号。
在第三方面第四种可能实现方式中,
所述接收模块, 用于当所述同步信号为辅同步信号时, 将 1个无线帧内的 每个时隙中的前 M*N个码片中携带的字符获取为置零后的所述辅同步信号。
第四方面, 提供了一种接收设备, 所述接收设备包括: 接收机和处理器; 所述处理器, 用于控制所述接收机接收置零后的同步信号, 所述置零后的 同步信号为发送设备将同步信号中的每 N个字符中处于指定位置的 N-1个字符 置零后发送的信号,所述同步信号的每 N个字符中包含有 1个同步序列字符和 N-1个***字符, 所述 N-1个***字符处于所述 N个字符中的所述指定位置, N > 2, N为整数;
所述处理器,还用于将所述置零后的同步信号中的非零字符组成的序列获 取为同步序列。
在第四方面第一种可能实现方式中,
所述处理器, 用于当所述同步信号为主同步信号时, 控制所述接收机将 N 个连续时隙中每个时隙的前 M个码片中携带的字符获取为置零后的所述主同 步信号。 在第四方面第二种可能实现方式中,
所述处理器, 用于当所述同步信号为辅同步信号时, 控制所述接收机将 N 个连续无线帧内的每个时隙中的前 M个码片中携带的字符获取为置零后的所 述辅同步信号。
在第四方面第三种可能实现方式中,
所述处理器, 用于当所述同步信号为主同步信号时, 控制所述接收机将 1 个时隙中的前 M*N个码片中携带的字符获取为置零后的所述主同步信号。
在第四方面第四种可能实现方式中,
所述处理器, 用于当所述同步信号为辅同步信号时, 控制所述接收机将 1 个无线帧内的每个时隙中的前 M*N个码片中携带的字符获取为置零后的所述 辅同步信号。
第五方面, 提供了一种同步信号传输方法, 所述方法包括:
生成同步信号,所述同步信号的每连续 N个字符中包含有 1个同步序列字 符和 N-1个***字符, 所述 N-1个***字符处于所述 N个字符中的指定位置,
N > 2, N为整数;
将所述同步信号中的每 N个字符中处于所述指定位置的 N-1个字符置零; 将置零后的同步信号发送给接收设备。
在第五方面第一种可能实现方式中, 所述将置零后的同步信号发送给接收 设备, 包括:
当所述同步信号为主同步信号时, 通过 N个连续时隙中的前 M个码片将 置零后的所述主同步信号发送给所述接收设备;
其中, 所述主同步信号中至少包含有 1组主同步序列, 所述主同步序列包 含 M个字符。
在第五方面第二种可能实现方式中, 1个无线帧中包含 K个时隙, 所述将 置零后的同步信号发送给接收设备, 包括:
当所述同步信号为辅同步信号时,通过 N个连续无线帧内的每个时隙中的 前 M个码片将置零后的所述辅同步信号发送给所述接收设备;
其中, 所述辅同步信号中至少包含有 K组辅同步序列,每组所述辅同步序 列包含 M个字符。
在第五方面第三种可能实现方式中, 所述将所述置零后的同步信号发送给 接收设备, 包括: 当所述同步信号为主同步信号时, 通过 1个时隙中的前 M*N个码片将置 零后的所述主同步信号发送给所述接收设备;
其中, 所述主同步信号中至少包含有 1组主同步序列, 所述主同步序列包 含 M个字符。
在第五方面第四种可能实现方式中, 1个无线帧中包含 K个时隙, 所述将 所述置零后的同步信号发送给接收设备, 包括:
当所述同步信号为辅同步信号时, 通过 1 个无线帧内的每个时隙中的前 M*N个码片将置零后的所述辅同步信号发送给所述接收设备;
其中, 所述辅同步信号中至少包含有 K组辅同步序列,每组所述辅同步序 列包含 M个字符。
在第五方面第五种可能实现方式中,
所述 N-1个***字符与所述同步序列字符相同;
或者, 所述 N-1个***字符与所述同步序列字符相反;
或者, 所述 N-1个***字符为 0;
或者, 所述 N-1个***字符为任意值。
第六方面, 提供了一种同步信号传输方法, 所述方法包括:
接收置零后的同步信号, 所述置零后的同步信号为发送设备将同步信号中 的每 N个字符中处于指定位置的 N-1个字符置零后发送的信号,所述同步信号 的每 N个字符中包含有 1个同步序列字符和 N-1个***字符, 所述 N-1个插 入字符处于所述 N个字符中的所述指定位置, N > 2, N为整数;
将所述置零后的同步信号中的非零字符组成的序列获取为同步序列。 在第六方面第一种可能实现方式中, 所述接收置零后的同步信号, 包括: 当所述同步信号为主同步信号时, 将 N个连续时隙中每个时隙的前 M个 码片中携带的字符获取为置零后的所述主同步信号。
在第六方面第二种可能实现方式中, 所述接收置零后的同步信号, 包括: 当所述同步信号为辅同步信号时,将 N个连续无线帧内的每个时隙中的前 M个码片中携带的字符获取为置零后的所述辅同步信号。
在第六方面第三种可能实现方式中, 所述接收置零后的同步信号, 包括: 当所述同步信号为主同步信号时, 将 1个时隙中的前 M*N个码片中携带 的字符获取为置零后的所述主同步信号。
在第六方面第四种可能实现方式中, 所述接收置零后的同步信号, 包括: 当所述同步信号为辅同步信号时,将 1个无线帧内的每个时隙中的前 M*N 个码片中携带的字符获取为置零后的所述辅同步信号。
第七方面, 提供了一种同步信号传输***, 所述***包括:
如上所述的发送设备和接收设备。
本发明实施例提供的技术方案的有益效果是:
通过生成每 N个字符中包含有 1 个同步序列字符和处于指定位置的 N-1 个***字符的同步信号, 并将该同步信号中每 N 个字符中处于该指定位置的 N-1个字符置零后发送给接收设备, 在同步信号中的置 0位置添加***字符, 解决了将基带信号中每 N个字符中的 N-1个置为 0时使得同步信号丧失部分信 息, 导致同步序列正交性遭到破坏的问题, 达到在减少符号间干扰的同时保证 同步性能的目的。 附图说明
为了更清楚地说明本发明实施例中的技术方案, 下面将对实施例描述中所 需要使用的附图作筒单地介绍, 显而易见地, 下面描述中的附图仅仅是本发明 的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下, 还可以根据这些附图获得其他的附图。
图 1是本发明一个实施例提供的发送设备的结构示意图;
图 2是本发明另一实施例提供的发送设备的结构示意图;
图 3是本发明另一实施例提供的 UMTS中同步信号发送示意图; 图 4是本发明另一实施例提供的 S-UMTS中的一种同步信号发送示意图; 图 5是本发明另一实施例提供的 S-UMTS中的另一同步信号发送示意图; 图 6是本发明又一实施例提供的发送设备的结构示意图;
图 7是本发明再一实施例提供的发送设备的结构示意图;
图 8是本发明一个实施例提供的接收设备的结构示意图;
图 9是本发明另一实施例提供的接收设备的结构示意图;
图 10是本发明又一实施例提供的接收设备的结构示意图;
图 11是本发明再一实施例提供的接收设备的结构示意图;
图 12是本发明一个实施例提供的同步信号传输方法的方法流程图; 图 13是本发明另一实施例提供的同步信号传输方法的方法流程图; 图 14是本发明一个实施例提供的同步信号传输方法的方法流程图; 图 15是本发明另一实施例提供的同步信号传输方法的方法流程图; 图 16是本发明一个实施例提供的同步信号传输***的***构成图; 图 17是本发明一个实施例提供的发送设备的结构示意图;
图 18是本发明另一实施例提供的发送设备的结构示意图;
图 19是本发明又一实施例提供的发送设备的结构示意图;
图 20是本发明再一实施例提供的发送设备的结构示意图;
图 21是本发明一个实施例提供的同步信号传输方法的方法流程图; 图 22是本发明另一实施例提供的同步信号传输方法的方法流程图。 具体实施方式
为使本发明的目的、 技术方案和优点更加清楚, 下面将结合附图对本发明 实施方式作进一步地详细描述。
请参考图 1 , 其示出了本发明一个实施例提供的发送设备的结构示意图。 该发送设备可以使码片速率较高的基带信号能够通过一个较小的发送带宽进 行发送。 比如, 该发送设备可以是支持 S-UMTS的发送设备。 该发送设备可以 包括:
信号生成模块 101 , 用于生成同步信号, 该同步信号的每连续 N个字符中 包含有 1个同步序列字符和 N-1个***字符, 该 N-1个***字符处于该 N个 字符中的指定位置, N > 2, N为整数;
置零模块 102, 用于将该同步信号中的每 N 个字符中处于该指定位置的 N-1个字符置零;
发送模块 103 , 用于将置零后的同步信号发送给接收设备。
综上所述,本发明实施例提供的发送设备,通过生成每 N个字符中包含有 1个同步序列字符和处于指定位置的 N-1个***字符的同步信号, 并将该同步 信号中每 N个字符中处于该指定位置的 N-1个字符置零后发送给接收设备,在 同步信号中的置 0位置添加***字符, 解决了将基带信号中每 N个字符中的 N-1个置为 0时使得同步信号丧失部分信息, 导致同步序列正交性遭到破坏的 问题, 达到在减少符号间干扰的同时保证同步性能的目的。 请参考图 2, 其示出了本发明另一实施例提供的发送设备的结构示意图。 该发送设备可以使码片速率较高的基带信号能够通过一个较小的发送带宽进 行发送。 以发送设备为支持 S-UMTS的发送设备为例, 该发送设备可以包括: 信号生成模块 201 , 用于生成同步信号, 该同步信号的每连续 N个字符中 包含有 1个同步序列字符和 N-1个***字符, 该 N-1个***字符处于该 N个 字符中的指定位置, N > 2, N为整数;
置零模块 202, 用于将该同步信号中的每 N 个字符中处于该指定位置的
N-1个字符置零;
发送模块 203 , 用于将置零后的同步信号发送给接收设备。
其中, 该 N-1个***字符与该同步序列字符相同; 或者, 该 N-1个***字 符与该同步序列字符相反; 或者, 该 N-1个***字符为 0; 或者, 该 N-1个插 入字符为任意值。
为了使同步序列中的字符在发送时不会被置 0, 发送设备可以在生成同步 信号时, 对应每个同步序列中的字符*** N-1个***字符, 该***字符可以是 任意值, 比如, 该***字符可以与对应的同步序列中的字符相同, 也可以与对 应的同步序列中的字符相反, 或者, 该***字符也可以为 0。
其中, N是大于等于 2的正整数, 以该发送设备支持 S-UMTS为例, 若需 要使得 3.84Mcps的基带信号支持 2.5MHz的发送带宽, 则 N可以取值为 2; 若 需要使得 3.84Mcps的基带信号支持 1.25MHz的发送带宽,则 N可以取值为 4。
具体比如, 在 UMTS和 S-UMTS中, 同步信号包括主同步信号和辅同步 信号。 且 S-UMTS***中的同步信号可以由 UMTS***中的同步信号进行插 值获得, 具体如下:
在 UMTS中, 对于主同步信号, 其序列生成公式为:
Cpsc = (1 + j) x <a, a, a, -a, -a, a, -a, -a, a, a, a, -a, a, -a, a, a>; 其中 ,
a = <xl, x2, x3, . . . , X16> = <1, 1, 1, 1, 1, 1, -1, -1, 1, -1, 1, -1, 1, -1, -1, 1>。 对于辅同步信号, 定义:
z = <b, b, b, -b, b, b, -b, -b, b, -b, b, -b, -b, -b, -b, -b>;
b = <xl, x2, x3, x4, x5, x6, x7, x8, -x9, -xlO, -xll, -xl2, -xl3, -xl4, -xl5, -xl6> ; <xl, x2, x3, xl6> = <1, 1, 1, 1, 1, 1, -1, -1, 1, -1, 1, -1, 1, -1, -1, 1>; 其 中, a, b , z表示一个向量; xl , x2, x3, ..., xl6表示向量中的一个元素。
H为 Hadamard矩阵, H0 = (1)
Figure imgf000012_0001
hm(n)为 H8的第 n行向量, 其中 n = 0, 1, 2, ..., 255;
则 UMTS中的辅同步信号的序列生成公式为:
Cssc,k = (1 + j) X <hm(0) x z(0), hm(l) x z(l), hm(2) x z(2), hm(255) x z(255)>;
其中, m=16* ( k-1 ) ; k = l, 2, 3,..., 16。 其中, K表示辅同步信号序列的 编号; z(i)表示向量 z的第 i个元素 (i= 0, 1, 2, 255)。
UMTS中的辅同步信号共有 64组,每组辅同步信号包含 15个辅同步信号 序列 Cssc,k, 不同组的辅同步信号在不同时隙中传输时, k的取值由固定的码 资源分配表确定。
在 S-UMTS中, 在生成主同步信号序列 Cpsc_Scal时, 可以首先对 a进行 插值, 比如在 a中每个字符前面或者后面*** N-1个插值, 获得 p, 该插值可 为任意值, 典型地, 该 N-1个插值可与 a序列的参考值相等, 或全部为 0, 或 全部相反。 比如, 以在 a中的每个字符后*** N-1个字符为例,
p=<l , yl(l), yl(2), ...yl(N-l), 1 , y2(l), y2(2), y2(N-l), 1 , y3(l), y3(2), y3(N-l), 1 , y4(l), y4(2), y4(N-l), 1 , y5(l), y5(2), y5(N-l), 1 , y6(l), y6(2), y6(N-l), -1 , y7(l), y7(2), y7(N-l), -1 , y8(l), y8(2), y8(N-l), 1 , y9(l), y9(2), y9(N-l), -1 , ylO(l), yl0(2), ylO(N-l), 1 , yll(l), yll(2), yll(N-l), -1 , yl2(l), yl2(2), yl2(N-l), 1 , yl3(l), yl3(2), yl3(N-l), -1 , yl4(l), yl4(2), yl4(N-l), -1 , yl5(l), yl5(2), ...yl5(N-l), 1 , yl6(l), yl6(2), yl6(N-l)>;
其中, yt(l), yt(2), ...yt(N-l)可为任意值,典型地,可取值为: yt(l)=yt(2)=... =yt(N-l) = xt; 或 yt(l)=yt(2)=... =yt(N-l) = -xt; 或 ytl)=yt(2)=... =yt(N-l) = 0。
则 S-UMTS中的主同步信号序列的生成公式为: Cpsc_Scal = (l + j) x <p, p, p, -p, -p, p, -p, -p, p, p, p, -p, p, -p, p, p>。
在 S-UMTS中, 在生成辅同步信号序列 Cssc,k_Scal时, 可以对 Cssc,k进 行插值获得, 比如在 Cssc,k中每个字符前面或者后面*** N-1 个插值, 获得 Cssc,k_Scal, 该插值可为任意值, 典型地, 该 N-1个插值可与 Cssc,k序列的参 考值相等, 或全部为 0, 或全部相反。 比如, 以在 Cssc,k中的每个字符后*** N-l个字符为例,
Cssc,k_Scal= Cssc,k = (1 + j) x <hm(0) x z(0), tO(l),tO(2),...tO(N-l), hm(l) x z(l), tl(l),tl(2),...tl(N-l), hm(2) x z(2), t2(l),t2(2),...t2(N-l),..., hm(255) x z(255), t255(l),t255(2),...t255(N-l) >;
其中 tk(l),tk(2),...tk(N-l)可为任意值, 典型地, 可取值为: tk(l)=tk(2)=... =tk(N-l) = hm(k) x z(k); 或 yk(l)=yk(2)=... =yk(N-l) = - hm(k) x z(k); 或 tk(l)=tk(2)=... =tk(N-l) = 0。
置零模块 202对同步信号中的字符置 0时, 将***字符对应的位置作为置 0位置。 比如, 当***字符处于对应的同步序列字符的后面时, 将同步信号中 每 N个字符中的后 N-1个字符对应位置作为置 0位置; 或者, 当***字符处于 对应的同步序列字符的前面时,将同步信号中每 N个字符中的前 N-1个字符对 应位置作为置 0位置。
该发送模块 203 , 包括:
第一发送单元 203a, 用于当该同步信号为主同步信号时, 通过 N个连 续时隙中每个时隙的前 M个码片将置零后的该主同步信号发送给该接收设 备;
第二发送单元 203b, 用于当该同步信号为辅同步信号时, 通过 N个连续 无线帧内的每个时隙中的前 M个码片将置零后的该辅同步信号发送给该接收 设备;
其中, 1个无线帧中包含 K个时隙, 该主同步信号中至少包含有 1组主同 步序列, 该主同步序列包含 M个字符, 该辅同步信号中至少包含有 K组辅同 步序列, 每组该辅同步序列包含 M个字符。
在 UMTS和 S-UMTS***中,每个用于携带同步信号的 10ms无线帧中包 含 15个时隙, 每个时隙传输 2560个码片 (chip )。 请参考图 3所示的 UMTS 中同步信号发送示意图, 其中, 主同步信号和辅同步信号在每个时隙中占用前 256个码片进行传输。 其中, 一组主同步信号包含一个 Cpsc, 共 256字符, 其 在一个时隙内传输完成; 而一组完整的辅同步信号包含的 15个 Cssc,k, 每个 Cssc,k同样有 256字符,一组完整的辅同步信号需要在一个无线帧内传输完成, 每个时隙传输一个 Cssc,k。 UMTS***中的接收设备在接收同步信号时, 以一 个时隙为单位获取主同步信号, 以一个无线帧为单位获取辅同步信号。
以该发送设备支持 S-UMTS , N取值为 2 为例, 请参考如图 4 所示的 S-UMTS中的一种同步信号发送示意图, 其中, S-UMTS沿用 UMTS中的同步 信道, 主同步信号和辅同步信号在每个时隙中占用前 256个码片进行传输。 其 中, 一组主同步信号包含一个 Cpsc_Scal, 共 256*2个字符, 其需要在两个时 隙内传输完成; 而一组完整的辅同步信号包含的 15 个 Cssc,k_Scal, 每个 Cssc,k_Scal有 256*2个字符,一组完整的辅同步信号需要在两个无线帧内传输 完成, 每两个时隙传输一个完整的 Cssc,k_Scal。 S-UMTS***中的接收设备在 接收同步信号时, 以两个时隙为单位获取主同步信号, 以两个无线帧为单位获 取辅同步信号。
需要说明的是, 图 4所示的 S-UMTS中的同步信号发送示意图以 N取值 为 2为例进行说明,当 N取值为其它值时,一组主同步信号包含一个 Cpsc_Scal, 其在 N个时隙内传输完成;而一组完整的辅同步信号包含的 15个 Cssc,k_Scal, 其需要在 N个无线帧内传输完成, 每 N个时隙传输一个完整的 Cssc,k_Scal。
该发送模块 203 , 包括:
第三发送单元 203c, 用于当该同步信号为主同步信号时,通过 1个时隙中 的前 M*N个码片将置零后的该主同步信号发送给该接收设备;
第四发送单元 203d,用于当该同步信号为辅同步信号时,通过 1个无线帧 内的每个时隙中的前 M*N 个码片将置零后的该辅同步信号发送给该接收设 备;
其中, 1个无线帧中包含 K个时隙, 该主同步信号中至少包含有 1组主同 步序列, 该主同步序列包含 M个字符, 该辅同步信号中至少包含有 K组辅同 步序列, 每组该辅同步序列包含 M个字符。
或者, 在 S-UMTS***中, 也可以对 UMTS***中的同步信道进行修改, 将每个时隙中的前 256*N个码片作为同步信道。 需要说明的是, 此时 N的取 值须小于 10。
以该发送设备支持 S-UMTS , N取值为 2 为例, 请参考如图 5 所示的 S-UMTS中的另一同步信号发送示意图, 其中, S-UMTS修改 UMTS中的同步 信道, 主同步信号和辅同步信号在每个时隙中占用前 256*2个码片进行传输。 其中, 一组主同步信号包含一个 Cpsc_Scal, 共 256*2个字符, 其可以在一个 时隙内传输完成; 而一组完整的辅同步信号包含的 15 个 Cssc,k_Scal, 每个 Cssc,k_Scal有 256*2个字符,一组完整的辅同步信号只需要在一个无线帧内即 可传输完成, 每个时隙传输一个完整的 Cssc,k_Scal。 S-UMTS***中的接收设 备在接收同步信号时, 以一个时隙为单位获取主同步信号, 以一个无线帧为单 位获取辅同步信号。
上述方案提供的方法, 在生成同步信号时, 对应同步序列中的每个字符插 入 N-1个插值, 在发送同步信号时, 将每 N个字符中的 N-1***字符置 0, 从 而使原始基带信号中的同步序列字符在置 0后能够保持完整,从而达到在支持 更小的发送带宽且减少符号间干扰的同时, 保证信号的同步性能。
综上所述,本发明实施例提供的发送设备,通过生成每 N个字符中包含有 1个同步序列字符和处于指定位置的 N-1个***字符的同步信号, 并将该同步 信号中每 N个字符中处于该指定位置的 N-1个字符置零后发送给接收设备,在 同步信号中的置 0位置添加***字符, 解决了将基带信号中每 N个字符中的 N-1个置为 0时使得同步信号丧失部分信息, 导致同步序列正交性遭到破坏的 问题, 达到在减少符号间干扰的同时保证同步性能的目的。 请参考图 6, 其示出了本发明又一实施例提供的发送设备的结构示意图。 该发送设备可以使码片速率较高的基带信号能够通过一个较小的发送带宽进 行发送。 比如, 该发送设备可以是支持 S-UMTS的发送设备。 该发送设备可以 包括: 处理器 001和发射机 002;
该处理器 001 , 用于生成同步信号, 该同步信号的每连续 N个字符中包含 有 1个同步序列字符和 N-1个***字符, 该 N-1个***字符处于该 N个字符 中的指定位置, N > 2, N为整数;
该处理器 001 , 还用于将该同步信号中的每 N个字符中处于该指定位置的 N-1个字符置零;
该处理器 001 , 还用于控制该发射机 002将置零后的同步信号发送给接收 设备。
综上所述,本发明实施例提供的发送设备,通过生成每 N个字符中包含有 1个同步序列字符和处于指定位置的 N-1个***字符的同步信号, 并将该同步 信号中每 N个字符中处于该指定位置的 N-1个字符置零后发送给接收设备,在 同步信号中的置 0位置添加***字符, 解决了将基带信号中每 N个字符中的 N-1个置为 0时使得同步信号丧失部分信息, 导致同步序列正交性遭到破坏的 问题, 达到在减少符号间干扰的同时保证同步性能的目的。 请参考图 7, 其示出了本发明再一实施例提供的发送设备的结构示意图。 该发送设备可以使码片速率较高的基带信号能够通过一个较小的发送带宽进 行发送。 比如, 该发送设备可以是支持 S-UMTS的发送设备。 该发送设备可以 包括: 处理器 003和发射机 004;
该处理器 003, 用于生成同步信号, 该同步信号的每连续 N个字符中包含 有 1个同步序列字符和 N-1个***字符, 该 N-1个***字符处于该 N个字符 中的指定位置, N > 2, N为整数;
该处理器 003 , 还用于将该同步信号中的每 N个字符中处于该指定位置的 N-1个字符置零;
该处理器 003 , 还用于控制该发射机 004将置零后的同步信号发送给接收 设备。
以该发送设备支持 S-UMTS为例, 在 S-UMTS ***中, 该同步信号可以 通过对传统的 UMTS***中的同步信号进行插值获得。 S-UMTS***中的同步 信号具体生成方法请参考图 2对应的实施例中的描述, 此处不再赘述。
该处理器 003, 用于当该同步信号为主同步信号时, 控制该发射机 004通 过 N个连续时隙中每个时隙的前 M个码片将置零后的该主同步信号发送给该 接收设备;
该处理器 003 , 用于当该同步信号为辅同步信号时, 控制该发射机 004通 过 N个连续无线帧内的每个时隙中的前 M个码片将置零后的该辅同步信号发 送给该接收设备;
其中, 1个无线帧中包含 K个时隙, 该主同步信号中至少包含有 1组主同 步序列, 该主同步序列包含 M个字符, 该辅同步信号中至少包含有 K组辅同 步序列, 每组该辅同步序列包含 M个字符。
以该发送设备支持 S-UMTS为例, 发送设备以 N个时隙为单位发送主同 步信号,以 N个无线帧为单位发送辅同步信号的发送过程请参考图 2对应的实 施例和图 4中的相关表述, 此处不再赘述。
该处理器 003 , 用于当该同步信号为主同步信号时, 控制该发射机 004通 过 1个时隙中的前 M*N个码片将置零后的该主同步信号发送给该接收设备; 该处理器 003, 用于当该同步信号为辅同步信号时, 控制该发射机 004通 过 1个无线帧内的每个时隙中的前 M*N个码片将置零后的该辅同步信号发送 给该接收设备; 其中, 1个无线帧中包含 K个时隙, 该主同步信号中至少包含有 1组主同 步序列, 该主同步序列包含 Μ个字符, 该辅同步信号中至少包含有 Κ组辅同 步序列, 每组该辅同步序列包含 Μ个字符。
以该发送设备支持 S-UMTS为例,发送设备以 1个时隙为单位发送主同步 信号, 以 1个无线帧为单位发送辅同步信号的发送过程请参考图 2对应的实施 例和图 5中的相关表述, 此处不再赘述。
其中, 该 N-1个***字符与该同步序列字符相同; 或者, 该 N-1个***字 符与该同步序列字符相反; 或者, 该 N-1个***字符为 0; 或者, 该 N-1个插 入字符为任意值。
综上所述,本发明实施例提供的发送设备,通过生成每 Ν个字符中包含有 1个同步序列字符和处于指定位置的 N-1个***字符的同步信号, 并将该同步 信号中每 Ν个字符中处于该指定位置的 N-1个字符置零后发送给接收设备,在 同步信号中的置 0位置添加***字符, 解决了将基带信号中每 Ν个字符中的 N-1个置为 0时使得同步信号丧失部分信息, 导致同步序列正交性遭到破坏的 问题, 达到在减少符号间干扰的同时保证同步性能的目的。 请参考图 8, 其示出了本发明一个实施例提供的接收设备的结构示意图。 该接收设备可以接收通过一个较小的发送带宽进行发送的同步信号。 比如, 该 接收设备可以是支持 S-UMTS的接收设备。 该接收设备可以包括:
接收模块 301 , 用于接收置零后的同步信号, 该置零后的同步信号为发送 设备将同步信号中的每 Ν个字符中处于指定位置的 N-1个字符置零后发送的信 号, 该同步信号的每 Ν个字符中包含有 1个同步序列字符和 N-1个***字符, 该 N-1个***字符处于该 Ν个字符中的该指定位置, Ν > 2, Ν为整数;
获取模块 302, 用于将该置零后的同步信号中的非零字符组成的序列获取 为同步序列。
综上所述, 本发明实施例提供的接收设备, 通过接收发送设备在生成每 Ν 个字符中包含有 1个同步序列字符和处于指定位置的 N-1个***字符的同步信 号,并将该同步信号中每 Ν个字符中处于该指定位置的 N-1个字符置零后发送 的置 0后的同步信号, 并将该置 0后的同步信号中的非零字符组成的序列获取 为同步序列,解决了将基带信号中每 Ν个字符中的 N-1个置为 0时使得同步信 号丧失部分信息, 导致同步序列正交性遭到破坏的问题, 达到在减少符号间干 扰的同时保证同步性能的目的。 请参考图 9, 其示出了本发明另一实施例提供的接收设备的结构示意图。 该接收设备可以接收通过一个较小的发送带宽进行发送的同步信号。 以该接收 设备是支持 S-UMTS的接收设备为例。 该接收设备可以包括:
接收模块 401 , 用于接收置零后的同步信号, 该置零后的同步信号为发送 设备将同步信号中的每 N个字符中处于指定位置的 N-1个字符置零后发送的信 号, 该同步信号的每 N个字符中包含有 1个同步序列字符和 N-1个***字符, 该 N-1个***字符处于该 N个字符中的该指定位置, N > 2, N为整数;
获取模块 402, 用于将该置零后的同步信号中的非零字符组成的序列获取 为同步序列。
其中, 以支持 S-UMTS 为例, 发送设备生成同步信号时, 可以在传统的 UMTS的同步信号的基础上进行插值获得,发送设备生成同步信号的具体步骤 请参考图 2对应的实施例中的描述, 此处不再赘述。
该接收模块 401 , 用于当该同步信号为主同步信号时, 将 N个连续时隙中 每个时隙的前 M个码片中携带的字符获取为置零后的该主同步信号;
该接收模块 401 , 用于当该同步信号为辅同步信号时, 将 N个连续无线帧 内的每个时隙中的前 M个码片中携带的字符获取为置零后的该辅同步信号。
以支持 S-UMTS为例, 当发送设备以 N个时隙为单位发送主同步信号, 以 N个无线帧为单位发送辅同步信号时,其具体的发送方法和信道结构请参考 图 2对应的实施例和图 4中的相关表述, 此处不再赘述。
该接收模块 401 , 用于当该同步信号为主同步信号时, 将 1个时隙中的前 M*N个码片中携带的字符获取为置零后的该主同步信号;
该接收模块 401 , 用于当该同步信号为辅同步信号时, 将 1个无线帧内的 每个时隙中的前 M*N个码片中携带的字符获取为置零后的该辅同步信号。
以支持 S-UMTS为例, 当发送设备以 1个时隙为单位发送主同步信号, 以 1个无线帧为单位发送辅同步信号时, 其具体的发送方法和信道结构请参考图 2对应的实施例和图 5中的相关表述, 此处不再赘述。
上述方案提供的方法, 发送设备在生成同步信号时, 对应同步序列中的每 个字符*** N-1个插值, 在发送同步信号时, 将每 N个字符中的 N-1***字 符置 0, 从而使原始基带信号中的同步序列字符在置 0后能够完整的被接收设 备所接收, 从而达到在支持更小的发送带宽且减少符号间干扰的同时, 保证信 号的同步性能。
综上所述, 本发明实施例提供的接收设备, 通过接收发送设备在生成每 N 个字符中包含有 1个同步序列字符和处于指定位置的 N-1个***字符的同步信 号,并将该同步信号中每 N个字符中处于该指定位置的 N-1个字符置零后发送 的置 0后的同步信号, 并将该置 0后的同步信号中的非零字符组成的序列获取 为同步序列,解决了将基带信号中每 N个字符中的 N-1个置为 0时使得同步信 号丧失部分信息, 导致同步序列正交性遭到破坏的问题, 达到在减少符号间干 扰的同时保证同步性能的目的。 请参考图 10, 其示出了本发明又一实施例提供的接收设备的结构示意图。 该接收设备可以接收通过一个较小的发送带宽进行发送的同步信号。 比如, 该 接收设备可以是支持 S-UMTS的接收设备。 该接收设备可以包括: 接收机 005 和处理器 006;
该处理器 005, 用于控制该接收机 006接收置零后的同步信号, 该置零后 的同步信号为发送设备将同步信号中的每 N个字符中处于指定位置的 N-1个字 符置零后发送的信号,该同步信号的每 N个字符中包含有 1个同步序列字符和 N-1个***字符, 该 N-1个***字符处于该 N个字符中的该指定位置, N > 2, N为整数;
该处理器 005, 还用于将该置零后的同步信号中的非零字符组成的序列获 取为同步序列。
综上所述, 本发明实施例提供的接收设备, 通过接收发送设备在生成每 N 个字符中包含有 1个同步序列字符和处于指定位置的 N-1个***字符的同步信 号,并将该同步信号中每 N个字符中处于该指定位置的 N-1个字符置零后发送 的置 0后的同步信号, 并将该置 0后的同步信号中的非零字符组成的序列获取 为同步序列,解决了将基带信号中每 N个字符中的 N-1个置为 0时使得同步信 号丧失部分信息, 导致同步序列正交性遭到破坏的问题, 达到在减少符号间干 扰的同时保证同步性能的目的。 请参考图 11 , 其示出了本发明再一实施例提供的接收设备的结构示意图。 该接收设备可以接收通过一个较小的发送带宽进行发送的同步信号。 以该接收 设备是支持 S-UMTS的接收设备为例。 该接收设备可以包括: 接收机 007和处 理器 008;
该处理器 007, 用于控制该接收机 008接收置零后的同步信号, 该置零后 的同步信号为发送设备将同步信号中的每 N个字符中处于指定位置的 N-1个字 符置零后发送的信号,该同步信号的每 N个字符中包含有 1个同步序列字符和 N-1个***字符, 该 N-1个***字符处于该 N个字符中的该指定位置, N > 2, N为整数;
该处理器 007, 还用于将该置零后的同步信号中的非零字符组成的序列获 取为同步序列。
其中, 以支持 S-UMTS 为例, 发送设备生成同步信号时, 可以在传统的 UMTS的同步信号的基础上进行插值获得,发送设备生成同步信号的具体步骤 请参考图 2对应的实施例中的描述, 此处不再赘述。
该处理器 007, 用于当该同步信号为主同步信号时, 控制该接收机将 N个 连续时隙中每个时隙的前 M个码片中携带的字符获取为置零后的该主同步信 号;
该处理器 007, 用于当该同步信号为辅同步信号时, 控制该接收机将 N个 连续无线帧内的每个时隙中的前 M个码片中携带的字符获取为置零后的该辅 同步信号。
以支持 S-UMTS为例, 当发送设备以 N个时隙为单位发送主同步信号, 以 N个无线帧为单位发送辅同步信号时,其具体的发送方法和信道结构请参考 图 2对应的实施例和图 4中的相关表述, 此处不再赘述。
该处理器 007, 用于当该同步信号为主同步信号时, 控制该接收机将 1个 时隙中的前 M*N个码片中携带的字符获取为置零后的该主同步信号;
该处理器 007, 用于当该同步信号为辅同步信号时, 控制该接收机将 1个 无线帧内的每个时隙中的前 M*N个码片中携带的字符获取为置零后的该辅同 步信号。
以支持 S-UMTS为例, 当发送设备以 1个时隙为单位发送主同步信号, 以 1个无线帧为单位发送辅同步信号时, 其具体的发送方法和信道结构请参考图 2对应的实施例和图 5中的相关表述, 此处不再赘述。
综上所述, 本发明实施例提供的接收设备, 通过接收发送设备在生成每 N 个字符中包含有 1个同步序列字符和处于指定位置的 N-1个***字符的同步信 号,并将该同步信号中每 N个字符中处于该指定位置的 N-1个字符置零后发送 的置 0后的同步信号, 并将该置 0后的同步信号中的非零字符组成的序列获取 为同步序列,解决了将基带信号中每 N个字符中的 N-1个置为 0时使得同步信 号丧失部分信息, 导致同步序列正交性遭到破坏的问题, 达到在减少符号间干 扰的同时保证同步性能的目的。 请参考图 12 ,其示出了本发明一个实施例提供的同步信号传输方法的方法 流程图。该方法可以用于在发送设备中使码片速率较高的基带信号能够通过一 个较小的发送带宽进行发送。 比如, 该发送设备可以是支持 S-UMTS的发送设 备。 该同步信号传输方法可以包括:
步骤 502, 生成同步信号, 该同步信号的每连续 N个字符中包含有 1个同 步序列字符和 N-1个***字符, 该 N-1个***字符处于该 N个字符中的指定 位置, N > 2, N为整数;
步骤 504,将该同步信号中的每 N个字符中处于该指定位置的 N-1个字符 置零;
步骤 506 , 将置零后的同步信号发送给接收设备。
综上所述,本发明实施例提供的同步信号传输方法,通过生成每 N个字符 中包含有 1个同步序列字符和处于指定位置的 N-1个***字符的同步信号,并 将该同步信号中每 N个字符中处于该指定位置的 N-1个字符置零后发送给接收 设备,在同步信号中的置 0位置添加***字符,解决了将基带信号中每 N个字 符中的 N-1个置为 0时使得同步信号丧失部分信息,导致同步序列正交性遭到 破坏的问题, 达到在减少符号间干扰的同时保证同步性能的目的。 请参考图 13,其示出了本发明另一实施例提供的同步信号传输方法的方法 流程图。该方法可以用于在发送设备中使码片速率较高的基带信号能够通过一 个较小的发送带宽进行发送。 比如, 以发送设备是支持 S-UMTS的发送设备为 例, 该同步信号传输方法可以包括:
步骤 602, 生成同步信号, 该同步信号的每连续 N个字符中包含有 1个同 步序列字符和 N-1个***字符, 该 N-1个***字符处于该 N个字符中的指定 位置, N > 2, N为整数;
其中, 该 N-1个***字符与该同步序列字符相同; 或者, 该 N-1个***字 符与该同步序列字符相反; 或者, 该 N-1个***字符为 0; 或者, 该 N-1个插 入字符为任意值。
为了使同步序列中的字符在发送时不会被置 0, 发送设备可以在生成同步 信号时, 对应每个同步序列中的字符*** N-1个***字符, 该***字符可以是 任意值, 比如, 该***字符可以与对应的同步序列中的字符相同, 也可以与对 应的同步序列中的字符相反, 或者, 该***字符也可以为 0。
其中, N是大于等于 2的正整数, 以该发送设备支持 S-UMTS为例, 若需 要使得 3.84Mcps的基带信号支持 2.5MHz的发送带宽, 则 N可以取值为 2; 若 需要使得 3.84Mcps的基带信号支持 1.25MHz的发送带宽,则 N可以取值为 4。
具体比如, 在 UMTS和 S-UMTS中, 同步信号包括主同步信号和辅同步 信号。 且 S-UMTS***中的同步信号可以由 UMTS***中的同步信号进行插 值获得, 具体如下:
在 UMTS中, 对于主同步信号, 其序列生成公式为:
Cpsc = (1 + j) x <a, a, a, -a, -a, a, -a, -a, a, a, a, -a, a, -a, a, a>; 其中 ,
a = <xl, x2, x3, . . . , X16> = <1, 1, 1, 1, 1, 1, -1, -1, 1, -1, 1, -1, 1, -1, -1, 1>。 对于辅同步信号, 定义:
z = <b, b, b, -b, b, b, -b, -b, b, -b, b, -b, -b, -b, -b, -b>;
b = <xl, x2, x3, x4, x5, x6, x7, x8, -x9, -xlO, -xll, -xl2, -xl3, -xl4, -xl5, -xl6> ; <xl, x2, x3, xl6> = <1, 1, 1, 1, 1, 1, -1, -1, 1, -1, 1, -1, 1, -1, -1, 1>; 其 中, a, b, z表示一个向量; xl , x2, x3, ..., xl6表示向量中的一个元素。
H为 Hadamard矩阵,
= (ι)
Figure imgf000022_0001
hm(n)为 ¾的第 n行向量, 其中 n = 0, 1, 2, ..., 255;
则 UMTS中的辅同步信号的序列生成公式为:
Cssc,k = (1 + j) X <hm(0) x z(0), hm(l) x z(l), hm(2) x z(2), hm(255) x z(255)>;
其中, m=16* ( k-1 ) ; k = l, 2, 3,..., 16。 其中, K表示辅同步信号序列的 编号; z(i)表示向量 z的第 i个元素 (i= 0, 1, 2, 255)。
UMTS中的辅同步信号共有 64组,每组辅同步信号包含 15个辅同步信号 序列 Cssc,k, 不同组的辅同步信号在不同时隙中传输时, k的取值由固定的码 资源分配表确定。
在 S-UMTS中, 在生成主同步信号序列 Cpsc_Scal时, 可以首先对 a进行 插值, 比如在 a中每个字符前面或者后面*** N-1个插值, 获得 p, 该插值可 为任意值, 典型地, 该 N-1个插值可与 a序列的参考值相等, 或全部为 0, 或 全部相反。 比如, 以在 a中的每个字符后*** N-1个字符为例,
p=<l , yl(l), yl(2), ...yl(N-l), 1 , y2(l), y2(2), y2(N-l), 1 , y3(l), y3(2), y3(N-l), 1 , y4(l), y4(2), y4(N-l), 1 , y5(l), y5(2), y5(N-l), 1 , y6(l), y6(2), y6(N-l), -1 , y7(l), y7(2), y7(N-l), -1 , y8(l), y8(2), y8(N-l), 1 , y9(l), y9(2), y9(N-l), -1 , ylO(l), yl0(2), ylO(N-l), 1 , yll(l), yll(2), yll(N-l), -1 , yl2(l), yl2(2), yl2(N-l), 1 , yl3(l), yl3(2), yl3(N-l), -1 , yl4(l), yl4(2), yl4(N-l), -1 , yl5(l), yl5(2), ...yl5(N-l), 1 , yl6(l), yl6(2), yl6(N-l)>;
其中, yt(l), yt(2), ...yt(N-l)可为任意值,典型地,可取值为: yt(l)=yt(2)=... =yt(N-l) = xt; 或 yt(l)=yt(2)=... =yt(N-l) = -xt; 或 yt(l)=yt(2)=... =yt(N-l) = 0。
则 S-UMTS中的主同步信号序列的生成公式为: Cpsc_Scal = (l + j) x <p, p,
P, -P, -P, P, -P, -P, P, P, P, -P, P, -P, P, P>°
在 S-UMTS中, 在生成辅同步信号序列 Cssc,k_Scal时, 可以对 Cssc,k进 行插值获得, 比如在 Cssc,k中每个字符前面或者后面*** N-1 个插值, 获得 Cssc,k_Scal, 该插值可为任意值, 典型地, 该 N-1个插值可与 Cssc,k序列的参 考值相等, 或全部为 0, 或全部相反。 比如, 以在 Cssc,k中的每个字符后***
N-1个字符为例,
Cssc,k_Scal= Cssc,k = (1 + j) x <hm(0) x z(0), tO(l),tO(2),...tO(N-l), hm(l) x z(l), tl(l),tl(2),...tl(N-l), hm(2) x z(2), t2(l),t2(2),...t2(N-l),..., hm(255) x z(255), t255(l),t255(2),...t255(N-l) >;
其中 tk(l),tk(2),...tk(N-l)可为任意值, 典型地, 可取值为: tk(l)=tk(2)=... =tk(N-l) = hm(k) x z(k); 或 yk(l)=yk(2)=... =yk(N-l) = - hm(k) x z(k); 或 tk(l)=tk(2)=... =tk(N-l) = 0。
步骤 604,将该同步信号中的每 N个字符中处于该指定位置的 N-1个字符 置零;
发送设备对同步信号中的字符置 0时,将***字符对应的位置作为置 0位 置。 比如, 当***字符处于对应的同步序列字符的后面时, 将同步信号中每 N 个字符中的后 N-1个字符对应位置作为置 0位置; 或者, 当***字符处于对应 的同步序列字符的前面时,将同步信号中每 N个字符中的前 N- 1个字符对应位 置作为置 0位置。
步骤 606, 当该同步信号为主同步信号时, 通过 N个连续时隙中每个时隙 的前 M个码片将置零后的该主同步信号发送给该接收设备; 该主同步信号中 至少包含有 1组主同步序列, 该主同步序列包含 M个字符;
步骤 608, 当该同步信号为辅同步信号时, 通过 N个连续无线帧内的每个 时隙中的前 M个码片将置零后的该辅同步信号发送给该接收设备; 该辅同步 信号中至少包含有 K组辅同步序列, 每组该辅同步序列包含 M个字符;
在 UMTS和 S-UMTS***中,每个用于携带同步信号的 10ms无线帧中包 含 15个时隙, 每个时隙传输 2560个码片 (chip )。 请参考图 3所示的 UMTS 中同步信号发送示意图, 其中, 主同步信号和辅同步信号在每个时隙中占用前 256个码片进行传输。 其中, 一组主同步信号包含一个 Cpsc, 共 256字符, 其 在一个时隙内传输完成; 而一组完整的辅同步信号包含的 15个 Cssc,k, 每个 Cssc,k同样有 256字符,一组完整的辅同步信号需要在一个无线帧内传输完成, 每个时隙传输一个 Cssc,k。 UMTS***中的接收设备在接收同步信号时, 以一 个时隙为单位获取主同步信号, 以一个无线帧为单位获取辅同步信号。
以该发送设备支持 S-UMTS , N取值为 2 为例, 请参考如图 4 所示的 S-UMTS中的一种同步信号发送示意图, 其中, S-UMTS沿用 UMTS中的同步 信道, 主同步信号和辅同步信号在每个时隙中占用前 256个码片进行传输。 其 中, 一组主同步信号包含一个 Cpsc_Scal, 共 256*2个字符, 其需要在两个时 隙内传输完成; 而一组完整的辅同步信号包含的 15 个 Cssc,k_Scal, 每个 Cssc,k_Scal有 256*2个字符,一组完整的辅同步信号需要在两个无线帧内传输 完成, 每两个时隙传输一个完整的 Cssc,k_Scal。 S-UMTS***中的接收设备在 接收同步信号时, 以两个时隙为单位获取主同步信号, 以两个无线帧为单位获 取辅同步信号。
需要说明的是, 图 4所示的 S-UMTS中的同步信号发送示意图以 N取值 为 2为例进行说明,当 N取值为其它值时,一组主同步信号包含一个 Cpsc_Scal, 其在 N个时隙内传输完成;而一组完整的辅同步信号包含的 15个 Cssc,k_Scal, 其需要在 N个无线帧内传输完成, 每 N个时隙传输一个完整的 Cssc,k_Scal。 步骤 610, 当该同步信号为主同步信号时, 通过 1个时隙中的前 M*N个 码片将置零后的该主同步信号发送给该接收设备; 该主同步信号中至少包含有 1组主同步序列, 该主同步序列包含 M个字符;
步骤 612, 当该同步信号为辅同步信号时, 通过 1个无线帧内的每个时隙 中的前 M*N个码片将置零后的该辅同步信号发送给该接收设备该辅同步信号 中至少包含有 K组辅同步序列, 每组该辅同步序列包含 M个字符。
或者, 在 S-UMTS***中, 也可以对 UMTS***中的同步信道进行修改, 将每个时隙中的前 256*N个码片作为同步信道。 需要说明的是, 此时 N的取 值须小于 10。
以该发送设备支持 S-UMTS , N取值为 2 为例, 请参考如图 5 所示的 S-UMTS中的另一同步信号发送示意图, 其中, S-UMTS修改 UMTS中的同步 信道, 主同步信号和辅同步信号在每个时隙中占用前 256*2个码片进行传输。 其中, 一组主同步信号包含一个 Cpsc_Scal, 共 256*2个字符, 其可以在一个 时隙内传输完成; 而一组完整的辅同步信号包含的 15 个 Cssc,k_Scal, 每个 Cssc,k_Scal有 256*2个字符,一组完整的辅同步信号只需要在一个无线帧内即 可传输完成, 每个时隙传输一个完整的 Cssc,k_Scal。 S-UMTS***中的接收设 备在接收同步信号时, 以一个时隙为单位获取主同步信号, 以一个无线帧为单 位获取辅同步信号。
上述方案提供的方法, 在生成同步信号时, 对应同步序列中的每个字符插 入 N-1个插值, 在发送同步信号时, 将每 N个字符中的 N-1***字符置 0, 从 而使原始基带信号中的同步序列字符在置 0后能够保持完整,从而达到在支持 更小的发送带宽且减少符号间干扰的同时, 保证信号的同步性能。
综上所述,本发明实施例提供的同步信号传输方法,通过生成每 N个字符 中包含有 1个同步序列字符和处于指定位置的 N-1个***字符的同步信号,并 将该同步信号中每 N个字符中处于该指定位置的 N-1个字符置零后发送给接收 设备,在同步信号中的置 0位置添加***字符,解决了将基带信号中每 N个字 符中的 N-1个置为 0时使得同步信号丧失部分信息,导致同步序列正交性遭到 破坏的问题, 达到在减少符号间干扰的同时保证同步性能的目的。 请参考图 14,其示出了本发明一个实施例提供的同步信号传输方法的方法 流程图。该方法可以用于在接收设备接收通过一个较小的发送带宽进行发送的 同步信号。 比如, 该接收设备可以是支持 S-UMTS的接收设备。 该同步信号传 输方法可以包括:
步骤 702, 接收置零后的同步信号, 该置零后的同步信号为发送设备将同 步信号中的每 N个字符中处于指定位置的 N-1个字符置零后发送的信号,该同 步信号的每 N个字符中包含有 1个同步序列字符和 N-1个***字符, 该 N-1 个***字符处于该 N个字符中的该指定位置, N > 2, N为整数;
步骤 704, 将该置零后的同步信号中的非零字符组成的序列获取为同步序 列。
综上所述, 本发明实施例提供的同步信号传输方法, 通过接收发送设备在 生成每 N个字符中包含有 1个同步序列字符和处于指定位置的 N-1个***字符 的同步信号,并将该同步信号中每 N个字符中处于该指定位置的 N-1个字符置 零后发送的置 0后的同步信号, 并将该置 0后的同步信号中的非零字符组成的 序列获取为同步序列,解决了将基带信号中每 N个字符中的 N-1个置为 0时使 得同步信号丧失部分信息, 导致同步序列正交性遭到破坏的问题, 达到在减少 符号间干扰的同时保证同步性能的目的。 请参考图 15,其示出了本发明另一实施例提供的同步信号传输方法的方法 流程图。该方法可以用于在接收设备接收通过一个较小的发送带宽进行发送的 同步信号。 以该接收设备是支持 S-UMTS的接收设备为例。 该同步信号传输方 法可以包括:
步骤 802, 当同步信号为主同步信号时, 将 N个连续时隙中每个时隙的前 M个码片中携带的字符获取为置零后的主同步信号;
步骤 804, 当同步信号为主同步信号时, 将 1个时隙中的前 M*N个码片 中携带的字符获取为置零后的主同步信号;
其中,置零后的同步信号为发送设备将同步信号中的每 N个字符中处于指 定位置的 N-1个字符置零后发送的信号,该同步信号的每 N个字符中包含有 1 个同步序列字符和 N-1个***字符, 该 N-1个***字符处于该 N个字符中的 该指定位置, N > 2。
以支持 S-UMTS 为例, 发送设备生成同步信号时, 可以在传统的 UMTS 的同步信号的基础上进行插值获得,发送设备生成同步信号的具体步骤请参考 图 13对应的实施例的步骤 602中的描述, 此处不再赘述。 当发送设备以 N个时隙为单位发送主同步信号, 以 N个无线帧为单位发 送辅同步信号时, 其具体的发送方法和信道结构请参考图 13对应的实施例和 图 4中的相关表述, 此处不再赘述。
步骤 806, 当同步信号为辅同步信号时, 将 N个连续无线帧内的每个时隙 中的前 M个码片中携带的字符获取为置零后的辅同步信号;
步骤 808, 当同步信号为辅同步信号时, 将 1个无线帧内的每个时隙中的 前 M*N个码片中携带的字符获取为置零后的辅同步信号;
同样的, 以支持 S-UMTS为例, 当发送设备以 1个时隙为单位发送主同步 信号, 以 1个无线帧为单位发送辅同步信号时, 其具体的发送方法和信道结构 请参考图 13对应的实施例和图 5中的相关表述, 此处不再赘述。
步骤 810,将置零后的同步信号中的非零字符组成的序列获取为同步序列。 上述方案提供的方法, 发送设备在生成同步信号时, 对应同步序列中的每 个字符*** N-1个插值, 在发送同步信号时, 将每 N个字符中的 N-1***字 符置 0, 从而使原始基带信号中的同步序列字符在置 0后能够完整的被接收设 备所接收, 从而达到在支持更小的发送带宽且减少符号间干扰的同时, 保证信 号的同步性能。
综上所述, 本发明实施例提供的同步信号传输方法, 通过接收发送设备在 生成每 N个字符中包含有 1个同步序列字符和处于指定位置的 N-1个***字符 的同步信号,并将该同步信号中每 N个字符中处于该指定位置的 N-1个字符置 零后发送的置 0后的同步信号, 并将该置 0后的同步信号中的非零字符组成的 序列获取为同步序列,解决了将基带信号中每 N个字符中的 N-1个置为 0时使 得同步信号丧失部分信息, 导致同步序列正交性遭到破坏的问题, 达到在减少 符号间干扰的同时保证同步性能的目的。 请参考图 16,其示出了本发明一个实施例提供的同步信号传输***的*** 构成图。该***可以用于使码片速率较高的基带信号能够通过一个较小的发送 带宽进行发送。 比如, 该***可以是支持 S-UMTS的***, 该同步信号传输系 统可以包括:
如上述图 1、 图 2、 图 6或图 7任一所示的发送设备 901以及如上述图 8 至图 11任一所示的接收设备 902。
综上所述, 本发明实施例提供的同步信号传输***, 发送设备通过生成每 N个字符中包含有 1个同步序列字符和处于指定位置的 N-1个***字符的同步 信号,并将该同步信号中每 N个字符中处于该指定位置的 N-1个字符置零后发 送给接收设备,接收设备将该置 0后的同步信号中的非零字符组成的序列获取 为同步序列,解决了将基带信号中每 N个字符中的 N-1个置为 0时使得同步信 号丧失部分信息, 导致同步序列正交性遭到破坏的问题, 达到在减少符号间干 扰的同时保证同步性能的目的。 请参考图 17, 其示出了本发明一个实施例提供的发送设备的结构示意图。 该发送设备可以使码片速率较高的基带信号能够通过一个较小的发送带宽进 行发送。 比如, 该发送设备可以是支持 S-UMTS的发送设备。 该发送设备可以 包括:
信号生成模块 1001 , 用于生成同步信号, 该同步信号的每连续 N个字符 中包含有 1个同步序列字符和 N-1个***字符, 该 N-1个***字符处于该 N 个字符中的指定位置, N > 2, N为整数;
发送模块 1002, 用于该同步信号发送给接收设备。
综上所述,本发明实施例提供的发送设备,通过生成每 N个字符中包含有 1个同步序列字符和处于指定位置的 N-1个***字符的同步信号并发送给接收 设备, 在同步信号中的指定位置添加***字符, 提高发送能量, 达到基带信号 在通过带宽较小的滤波器时能够保证发送信道的处理增益的效果。 请参考图 18, 其示出了本发明另一实施例提供的发送设备的结构示意图。 该发送设备可以使码片速率较高的基带信号能够通过一个较小的发送带宽进 行发送。 以发送设备为支持 S-UMTS的发送设备为例, 该发送设备可以包括: 信号生成模块 1101 , 用于生成同步信号, 该同步信号的每连续 N个字符 中包含有 1个同步序列字符和 N-1个***字符, 该 N-1个***字符处于该 N 个字符中的指定位置, N > 2, N为整数;
发送模块 1102, 用于将该同步信号发送给接收设备。
其中, 该 N-1个***字符与该同步序列字符相同; 或者, 该 N-1个***字 符与该同步序列字符相反; 或者, 该 N-1个***字符为 0; 或者, 该 N-1个插 入字符为任意值。
为了使基带信号通过较小的滤波器时能够保证发送信道的处理增益,发送 设备可以在生成同步信号时,对应每个同步序列中的字符*** N-l个***字符, 该***字符可以与对应的同步序列中的字符相同,也可以与对应的同步序列中 的字符相反, 或者, 该***字符可以是任意值。
其中, N是大于等于 2的正整数, 以该发送设备支持 S-UMTS为例, 若需 要使得 3.84Mcps的基带信号支持 2.5MHz的发送带宽, 则 N可以取值为 2; 若 需要使得 3.84Mcps的基带信号支持 1.25MHz的发送带宽,则 N可以取值为 4。
具体比如, 在 UMTS和 S-UMTS中, 同步信号包括主同步信号和辅同步 信号。 且 S-UMTS***中的同步信号可以由 UMTS***中的同步信号进行插 值获得, 具体如下:
在 UMTS中, 对于主同步信号, 其序列生成公式为:
Cpsc = (1 + j) x <a, a, a, -a, -a, a, -a, -a, a, a, a, -a, a, -a, a, a>; 其中 ,
a = <xl, x2, x3, . . . , X16> = <1, 1, 1, 1, 1, 1, -1, -1, 1, -1, 1, -1, 1, -1, -1, 1>。 对于辅同步信号, 定义:
z = <b, b, b, -b, b, b, -b, -b, b, -b, b, -b, -b, -b, -b, -b>;
b = <xl, x2, x3, x4, x5, x6, x7, x8, -x9, -xlO, -xll, -xl2, -xl3, -xl4, -xl5,
-xl6> ; <xl, x2, x3, xl6> = <1, 1, 1, 1, 1, 1, -1, -1, 1, -1, 1, -1, 1, -1, -1, 1>; 其 中, a, b, z表示一个向量; xl , x2, x3, ..., xl6表示向量中的一个元素。
H为 Hadamard矩阵,
Figure imgf000029_0001
hm(n)为 H8的第 n行向量, 其中 n = 0, 1, 2, ..., 255;
则 UMTS中的辅同步信号的序列生成公式为:
Cssc,k = (1 + j) X <hm(0) x z(0), hm(l) x z(l), hm(2) x z(2), hm(255) x z(255)>;
其中, m=16* ( k-1 ) ; k = l, 2, 3,..., 16。 其中, K表示辅同步信号序列的 编号; z(i)表示向量 z的第 i个元素 (i= 0, 1, 2, ..., 255)。
UMTS中的辅同步信号共有 64组,每组辅同步信号包含 15个辅同步信号 序列 Cssc,k, 不同组的辅同步信号在不同时隙中传输时, k的取值由固定的码 资源分配表确定。
在 S-UMTS中, 在生成主同步信号序列 Cpsc_Scal时, 可以首先对 a进行 插值, 比如在 a中每个字符前面或者后面*** N-1个插值, 获得 p, 该插值可 为任意值, 典型地, 该 N-1个插值可与 a序列的参考值相等, 或全部为 0, 或 全部相反。 比如, 以在 a中的每个字符后*** N-1个字符为例,
p=<l , yl(l), yl(2), ...yl(N-l), 1 , y2(l), y2(2), y2(N-l), 1 , y3(l), y3(2), y3(N-l), 1 , y4(l), y4(2), y4(N-l), 1 , y5(l), y5(2), y5(N-l), 1 , y6(l), y6(2), y6(N-l), -1 , y7(l), y7(2), y7(N-l), -1 , y8(l), y8(2), y8(N-l), 1 , y9(l), y9(2), y9(N-l), -1 , ylO(l), yl0(2), ylO(N-l), 1 , yll(l), yll(2), yll(N-l), -1 , yl2(l), yl2(2), yl2(N-l), 1 , yl3(l), yl3(2), yl3(N-l), -1 , yl4(l), yl4(2), yl4(N-l), -1 , yl5(l), yl5(2), ...yl5(N-l), 1 , yl6(l), yl6(2), yl6(N-l)>;
其中, yt(l), yt(2), ...yt(N-l)可为任意值,典型地,可取值为: yt(l)=yt(2)=... =yt(N-l) = xt; 或 yt(l)=yt(2)=... =yt(N-l) = -xt; 或 ytl)=yt(2)=... =yt(N-l) = 0。
则 S-UMTS中的主同步信号序列的生成公式为: Cpsc_Scal = (l + j) x <p, p,
P, -P, -P, P, -P, -P, P, P, P, -P, P, -P, P, P>°
在 S-UMTS中, 在生成辅同步信号序列 Cssc,k_Scal时, 可以对 Cssc,k进 行插值获得, 比如在 Cssc,k中每个字符前面或者后面*** N-1 个插值, 获得
Cssc,k_Scal, 该插值可为任意值, 典型地, 该 N-1个插值可与 Cssc,k序列的参 考值相等, 或全部为 0, 或全部相反。 比如, 以在 Cssc,k中的每个字符后***
N-1个字符为例,
Cssc,k_Scal= Cssc,k = (1 + j) x <hm(0) x z(0), tO(l),tO(2),...tO(N-l), hm(l) x z(l), tl(l),tl(2),...tl(N-l), hm(2) x z(2), t2(l),t2(2),...t2(N-l),..., hm(255) x z(255), t255(l),t255(2),...t255(N-l) >;
其中 tk(l),tk(2),...tk(N-l)可为任意值, 典型地, 可取值为: tk(l)=tk(2)=... =tk(N-l) = hm(k) x z(k); 或 yk(l)=yk(2)=... =yk(N-l) = - hm(k) x z(k); 或 tk(l)=tk(2)=... =tk(N-l) = 0。
该发送模块 1102, 包括:
第一发送单元 1102a, 用于当该同步信号为主同步信号时, 通过 N个连续 时隙中的前 M个码片将该主同步信号发送给该接收设备;
第二发送单元 1102b, 用于当该同步信号为辅同步信号时, 通过 N个连续 无线帧内的每个时隙中的前 M个码片将该辅同步信号发送给该接收设备;
其中, 1个无线帧中包含 K个时隙, 该主同步信号中至少包含有 1组主同 步序列, 该主同步序列包含 M个字符, 该辅同步信号中至少包含有 K组辅同 步序列, 每组该辅同步序列包含 M个字符。
在 UMTS和 S-UMTS***中,每个用于携带同步信号的 10ms无线帧中包 含 15个时隙, 每个时隙传输 2560个码片 (chip )。 请参考图 3所示的 UMTS 中同步信号发送示意图, 其中, 主同步信号和辅同步信号在每个时隙中占用前 256个码片进行传输。 其中, 一组主同步信号包含一个 Cpsc, 共 256字符, 其 在一个时隙内传输完成; 而一组完整的辅同步信号包含的 15个 Cssc,k, 每个 Cssc,k同样有 256字符,一组完整的辅同步信号需要在一个无线帧内传输完成, 每个时隙传输一个 Cssc,k。 UMTS***中的接收设备在接收同步信号时, 以一 个时隙为单位获取主同步信号, 以一个无线帧为单位获取辅同步信号。
以该发送设备支持 S-UMTS , N取值为 2 为例, 请参考如图 4 所示的 S-UMTS中的一种同步信号发送示意图, 其中, S-UMTS沿用 UMTS中的同步 信道, 主同步信号和辅同步信号在每个时隙中占用前 256个码片进行传输。 其 中, 一组主同步信号包含一个 Cpsc_Scal, 共 256*2个字符, 其需要在两个时 隙内传输完成; 而一组完整的辅同步信号包含的 15 个 Cssc,k_Scal, 每个 Cssc,k_Scal有 256*2个字符,一组完整的辅同步信号需要在两个无线帧内传输 完成, 每两个时隙传输一个完整的 Cssc,k_Scal。 S-UMTS***中的接收设备在 接收同步信号时, 以两个时隙为单位获取主同步信号, 以两个无线帧为单位获 取辅同步信号。
需要说明的是, 图 4所示的 S-UMTS中的同步信号发送示意图以 N取值 为 2为例进行说明,当 N取值为其它值时,一组主同步信号包含一个 Cpsc_Scal, 其在 N个时隙内传输完成;而一组完整的辅同步信号包含的 15个 Cssc,k_Scal, 其需要在 N个无线帧内传输完成, 每 N个时隙传输一个完整的 Cssc,k_Scal。
该发送模块 1102, 包括:
第三发送单元 1102c, 用于当该同步信号为主同步信号时, 通过 1个时隙 中的前 M*N个码片将该主同步信号发送给该接收设备;
第四发送单元 1102d, 用于当该同步信号为辅同步信号时, 通过 1个无线 帧内的每个时隙中的前 M*N个码片将该辅同步信号发送给该接收设备;
其中, 1个无线帧中包含 K个时隙, 该主同步信号中至少包含有 1组主同 步序列, 该主同步序列包含 M个字符, 该辅同步信号中至少包含有 K组辅同 步序列, 每组该辅同步序列包含 M个字符。 或者, 在 S-UMTS***中, 也可以对 UMTS***中的同步信道进行修改, 将每个时隙中的前 256*N个码片作为同步信道。 需要说明的是, 此时 N的取 值须小于 10。
以该发送设备支持 S-UMTS , N取值为 2 为例, 请参考如图 5 所示的 S-UMTS中的另一同步信号发送示意图, 其中, S-UMTS修改 UMTS中的同步 信道, 主同步信号和辅同步信号在每个时隙中占用前 256*2个码片进行传输。 其中, 一组主同步信号包含一个 Cpsc_Scal, 共 256*2个字符, 其可以在一个 时隙内传输完成; 而一组完整的辅同步信号包含的 15 个 Cssc,k_Scal, 每个 Cssc,k_Scal有 256*2个字符,一组完整的辅同步信号只需要在一个无线帧内即 可传输完成, 每个时隙传输一个完整的 Cssc,k_Scal。 S-UMTS***中的接收设 备在接收同步信号时, 以一个时隙为单位获取主同步信号, 以一个无线帧为单 位获取辅同步信号。
上述方案提供的方法, 在生成同步信号时, 对应同步序列中的每个字符插 入 N-1个插值, 在基带信号通过带宽较小的滤波器时, 能够保证发送信道的处 理增益。
综上所述,本发明实施例提供的发送设备,通过生成每 N个字符中包含有 1个同步序列字符和处于指定位置的 N-1个***字符的同步信号, 在同步信号 中的指定位置添加***字符, 提高发送能量, 达到基带信号在通过带宽较小的 滤波器时能够保证发送信道的处理增益的效果。 请参考图 19, 其示出了本发明又一实施例提供的发送设备的结构示意图。 该发送设备可以使码片速率较高的基带信号能够通过一个较小的发送带宽进 行发送。 比如, 该发送设备可以是支持 S-UMTS的发送设备。 该发送设备可以 包括: 处理器 009和发射机 010;
该处理器 009, 用于生成同步信号, 该同步信号的每连续 N个字符中包含 有 1个同步序列字符和 N-1个***字符, 该 N-1个***字符处于该 N个字符 中的指定位置, N > 2;
该处理器 009, 还用于控制该发射机 010将同步信号发送给接收设备。 综上所述,本发明实施例提供的发送设备,通过生成每 N个字符中包含有 1个同步序列字符和处于指定位置的 N-1个***字符的同步信号, 在同步信号 中的指定位置添加***字符, 提高发送能量, 达到基带信号在通过带宽较小的 滤波器时能够保证发送信道的处理增益的效果。 请参考图 20, 其示出了本发明再一实施例提供的发送设备的结构示意图。 该发送设备可以使码片速率较高的基带信号能够通过一个较小的发送带宽进 行发送。 比如, 该发送设备可以是支持 S-UMTS的发送设备。 该发送设备可以 包括: 处理器 011和发射机 012;
该处理器 011 , 用于生成同步信号, 该同步信号的每连续 N个字符中包含 有 1个同步序列字符和 N-1个***字符, 该 N-1个***字符处于该 N个字符 中的指定位置, N > 2, N为整数;
该处理器 011 , 还用于控制该发射机 012将同步信号发送给接收设备。 以该发送设备支持 S-UMTS为例, 在 S-UMTS ***中, 该同步信号可以 通过对传统的 UMTS***中的同步信号进行插值获得。 S-UMTS***中的同步 信号具体生成方法请参考图 2对应的实施例中的描述, 此处不再赘述。
该处理器 011 , 用于当该同步信号为主同步信号时, 控制该发射机 012通 过 N个连续时隙中的前 M个码片将该主同步信号发送给该接收设备;
该处理器 011 , 用于当该同步信号为辅同步信号时, 控制该发射机 012通 过 N个连续无线帧内的每个时隙中的前 M个码片将该辅同步信号发送给该接 收设备;
其中, 1个无线帧中包含 K个时隙, 该主同步信号中至少包含有 1组主同 步序列, 该主同步序列包含 M个字符, 该辅同步信号中至少包含有 K组辅同 步序列, 每组该辅同步序列包含 M个字符。
以该发送设备支持 S-UMTS为例, 发送设备以 N个时隙为单位发送主同 步信号,以 N个无线帧为单位发送辅同步信号的发送过程请参考图 2对应的实 施例和图 4中的相关表述, 此处不再赘述。
该处理器 011 , 用于当该同步信号为主同步信号时, 控制该发射机 012通 过 1个时隙中的前 M*N个码片将该主同步信号发送给该接收设备;
该处理器 011 , 用于当该同步信号为辅同步信号时, 控制该发射机 012通 过 1个无线帧内的每个时隙中的前 M*N个码片将该辅同步信号发送给该接收 设备;
其中, 1个无线帧中包含 K个时隙, 该主同步信号中至少包含有 1组主同 步序列, 该主同步序列包含 M个字符, 该辅同步信号中至少包含有 K组辅同 步序列, 每组该辅同步序列包含 M个字符。
以该发送设备支持 S-UMTS为例,发送设备以 1个时隙为单位发送主同步 信号, 以 1个无线帧为单位发送辅同步信号的发送过程请参考图 2对应的实施 例和图 5中的相关表述, 此处不再赘述。
其中, 该 N-1个***字符与该同步序列字符相同;
或者, 该 N-1个***字符与该同步序列字符相反;
或者, 该 N-1个***字符为任意值。
综上所述,本发明实施例提供的发送设备,通过生成每 N个字符中包含有 1个同步序列字符和处于指定位置的 N-1个***字符的同步信号, 在同步信号 中的指定位置添加***字符, 提高发送能量, 达到基带信号在通过带宽较小的 滤波器时能够保证发送信道的处理增益的效果。 请参考图 21 ,其示出了本发明一个实施例提供的同步信号传输方法的方法 流程图。该方法可以用于在发送设备中使码片速率较高的基带信号能够通过一 个较小的发送带宽进行发送。 比如, 该发送设备可以是支持 S-UMTS的发送设 备。 该同步信号传输方法可以包括:
步骤 1202, 生成同步信号, 该同步信号的每连续 N个字符中包含有 1个 同步序列字符和 N-1个***字符, 该 N-1个***字符处于该 N个字符中的指 定位置, N > 2, N为整数;
步骤 1204, 将该同步信号发送给接收设备。
综上所述,本发明实施例提供的同步信号传输方法,通过生成每 N个字符 中包含有 1个同步序列字符和处于指定位置的 N-1个***字符的同步信号,在 同步信号中的指定位置添加***字符, 提高发送能量, 达到基带信号在通过带 宽较小的滤波器时能够保证发送信道的处理增益的效果。 请参考图 22,其示出了本发明另一实施例提供的同步信号传输方法的方法 流程图。该方法可以用于在发送设备中使码片速率较高的基带信号能够通过一 个较小的发送带宽进行发送。 比如, 以发送设备是支持 S-UMTS的发送设备为 例, 该同步信号传输方法可以包括:
步骤 1302, 生成同步信号, 该同步信号的每连续 N个字符中包含有 1个 同步序列字符和 N-1个***字符, 该 N-1个***字符处于该 N个字符中的指 定位置, N > 2, N为整数;
其中, 该 N-1个***字符与该同步序列字符相同; 或者, 该 N-1个***字 符与该同步序列字符相反; 或者, 该 N-1个***字符为任意值。 生成同步信号 的具体方法请参考图 18对应的实施例中的描述, 此处不再赘述。
步骤 1304, 当该同步信号为主同步信号时, 通过 N个连续时隙中每个时 隙的前 M个码片将该主同步信号发送给该接收设备;
其中, 该主同步信号中至少包含有 1组主同步序列, 该主同步序列包含 M 个字符;
步骤 1306, 当该同步信号为辅同步信号时, 通过 N个连续无线帧内的每 个时隙中的前 M个码片将该辅同步信号发送给该接收设备;
其中, 该辅同步信号中至少包含有 K组辅同步序列,每组该辅同步序列包 含 M个字符;
以该发送设备支持 S-UMTS为例, 发送设备以 N个时隙为单位发送主同 步信号, 以 N个无线帧为单位发送辅同步信号的发送过程请参考图 18对应的 实施例和图 4中的相关表述, 此处不再赘述。
步骤 1308, 当该同步信号为主同步信号时, 通过 1个时隙中的前 M*N个 码片将该主同步信号发送给该接收设备;
其中, 该主同步信号中至少包含有 1组主同步序列, 该主同步序列包含 M 个字符;
步骤 1310, 当该同步信号为辅同步信号时,通过 1个无线帧内的每个时隙 中的前 M*N个码片将该辅同步信号发送给该接收设备。
其中, 该辅同步信号中至少包含有 K组辅同步序列,每组该辅同步序列包 含 M个字符。
以该发送设备支持 S-UMTS为例,发送设备以 1个时隙为单位发送主同步 信号, 以 1个无线帧为单位发送辅同步信号的发送过程请参考图 18对应的实 施例和图 5中的相关表述, 此处不再赘述。
其中, 该 N-1个***字符与该同步序列字符相同; 或者, 该 N-1个***字 符与该同步序列字符相反; 或者, 该 N-1个***字符为任意值。
上述方案提供的方法, 在生成同步信号时, 对应同步序列中的每个字符插 入 N-1个插值, 在基带信号通过带宽较小的滤波器时, 能够保证发送信道的处 理增益。 综上所述,本发明实施例提供的同步信号传输方法,通过生成每 N个字符 中包含有 1个同步序列字符和处于指定位置的 N-1个***字符的同步信号,在 同步信号中的指定位置添加***字符, 提高发送能量, 达到基带信号在通过带 宽较小的滤波器时能够保证发送信道的处理增益的效果。 本领域普通技术人员可以理解实现上述实施例的全部或部分步骤可以通 过硬件来完成, 也可以通过程序来指令相关的硬件完成, 所述的程序可以存储 于一种计算机可读存储介质中, 上述提到的存储介质可以是只读存储器, 磁盘 或光盘等。 以上所述仅为本发明的较佳实施例, 并不用以限制本发明, 凡在本发明的 精神和原则之内, 所作的任何修改、 等同替换、 改进等, 均应包含在本发明的 保护范围之内。

Claims

权 利 要 求 书
1、 一种发送设备, 其特征在于, 所述发送设备包括:
信号生成模块, 用于生成同步信号, 所述同步信号的每连续 N个字符中包 含有 1个同步序列字符和 N-1个***字符, 所述 N-1个***字符处于所述 N个 字符中的指定位置, N > 2, N为整数;
置零模块,用于将所述同步信号中的每 N个字符中处于所述指定位置的 N-1 个字符置零;
发送模块, 用于将置零后的同步信号发送给接收设备。
2、 根据权利要求 1所述的发送设备, 其特征在于, 所述发送模块, 包括: 第一发送单元, 用于当所述同步信号为主同步信号时, 通过 N个连续时隙 中每个时隙的前 M个码片将置零后的所述主同步信号发送给所述接收设备; 其中, 所述主同步信号中至少包含有 1 组主同步序列, 所述主同步序列包 含 M个字符。
3、 根据权利要求 1所述的发送设备, 其特征在于, 所述发送模块, 包括: 第二发送单元, 用于当所述同步信号为辅同步信号时, 通过 N个连续无线 帧内的每个时隙中的前 M个码片将置零后的所述辅同步信号发送给所述接收设 备;
其中, 1个无线帧中包含 K个时隙, 所述辅同步信号中至少包含有 K组辅 同步序列, 每组所述辅同步序列包含 M个字符。
4、 根据权利要求 1所述的发送设备, 其特征在于, 所述发送模块, 包括: 第三发送单元, 用于当所述同步信号为主同步信号时, 通过 1 个时隙中的 前 M*N个码片将置零后的所述主同步信号发送给所述接收设备;
其中, 所述主同步信号中至少包含有 1 组主同步序列, 所述主同步序列包 含 M个字符。
5、 根据权利要求 1所述的发送设备, 其特征在于, 所述发送模块, 包括: 第四发送单元, 用于当所述同步信号为辅同步信号时, 通过 1 个无线帧内 的每个时隙中的前 M*N 个码片将置零后的所述辅同步信号发送给所述接收设 备;
其中, 1个无线帧中包含 K个时隙, 所述辅同步信号中至少包含有 K组辅 同步序列, 每组所述辅同步序列包含 M个字符。
6、 一种接收设备, 其特征在于, 所述接收设备包括:
接收模块, 用于接收置零后的同步信号, 所述置零后的同步信号为发送设 备将同步信号中的每 N个字符中处于指定位置的 N-1个字符置零后发送的信号, 所述同步信号的每 N个字符中包含有 1个同步序列字符和 N-1个***字符, 所 述 N-1个***字符处于所述 N个字符中的所述指定位置, N > 2, N为整数; 获取模块, 用于将所述置零后的同步信号中的非零字符组成的序列获取为 同步序列。
7、 根据权利要求 6所述的接收设备, 其特征在于,
所述接收模块, 用于当所述同步信号为主同步信号时, 将 N个连续时隙中 每个时隙的前 M个码片中携带的字符获取为置零后的所述主同步信号。
8、 根据权利要求 6所述的接收设备, 其特征在于,
所述接收模块, 用于当所述同步信号为辅同步信号时, 将 N个连续无线帧 内的每个时隙中的前 M个码片中携带的字符获取为置零后的所述辅同步信号。
9、 根据权利要求 6所述的接收设备, 其特征在于,
所述接收模块, 用于当所述同步信号为主同步信号时, 将 1 个时隙中的前 M*N个码片中携带的字符获取为置零后的所述主同步信号。
10、 根据权利要求 6所述的接收设备, 其特征在于,
所述接收模块, 用于当所述同步信号为辅同步信号时, 将 1 个无线帧内的 每个时隙中的前 M*N个码片中携带的字符获取为置零后的所述辅同步信号。
11、 一种同步信号传输方法, 其特征在于, 所述方法包括:
生成同步信号, 所述同步信号的每连续 N个字符中包含有 1个同步序列字 符和 N-1个***字符, 所述 N-1个***字符处于所述 N个字符中的指定位置, N > 2, N为整数;
将所述同步信号中的每 N个字符中处于所述指定位置的 N-1个字符置零; 将置零后的同步信号发送给接收设备。
12、 根据权利要求 11所述的方法, 其特征在于, 所述将置零后的同步信号 发送给接收设备, 包括:
当所述同步信号为主同步信号时,通过 N个连续时隙中每个时隙的前 M个 码片将置零后的所述主同步信号发送给所述接收设备;
其中, 所述主同步信号中至少包含有 1 组主同步序列, 所述主同步序列包 含 M个字符。
13、 根据权利要求 11所述的方法, 其特征在于, 1个无线帧中包含 K个时 隙, 所述将置零后的同步信号发送给接收设备, 包括:
当所述同步信号为辅同步信号时, 通过 N个连续无线帧内的每个时隙中的 前 M个码片将置零后的所述辅同步信号发送给所述接收设备;
其中, 所述辅同步信号中至少包含有 K组辅同步序列, 每组所述辅同步序 列包含 M个字符。
14、 根据权利要求 11所述的方法, 其特征在于, 所述将所述置零后的同步 信号发送给接收设备, 包括:
当所述同步信号为主同步信号时,通过 1个时隙中的前 M*N个码片将置零 后的所述主同步信号发送给所述接收设备;
其中, 所述主同步信号中至少包含有 1 组主同步序列, 所述主同步序列包 含 M个字符。
15、 根据权利要求 11所述的方法, 其特征在于, 1个无线帧中包含 K个时 隙, 所述将置零后的同步信号发送给接收设备, 包括:
当所述同步信号为辅同步信号时, 通过 1 个无线帧内的每个时隙中的前 M*N个码片将置零后的所述辅同步信号发送给所述接收设备;
其中, 所述辅同步信号中至少包含有 K组辅同步序列, 每组所述辅同步序 列包含 M个字符。
16、 根据权利要求 11所述的方法, 其特征在于,
所述 N-1个***字符与所述同步序列字符相同;
或者, 所述 N-1个***字符与所述同步序列字符相反;
或者, 所述 N-1个***字符为 0;
或者, 所述 N-1个***字符为任意值。
17、 一种同步信号传输方法, 其特征在于, 所述方法包括:
接收置零后的同步信号, 所述置零后的同步信号为发送设备将同步信号中 的每 N个字符中处于指定位置的 N-1个字符置零后发送的信号, 所述同步信号 的每 N个字符中包含有 1个同步序列字符和 N-1个***字符, 所述 N-1个*** 字符处于所述 N个字符中的所述指定位置, N > 2, N为整数;
将所述置零后的同步信号中的非零字符组成的序列获取为同步序列。
18、 根据权利要求 17所述的方法, 其特征在于, 所述接收置零后的同步信 号, 包括:
当所述同步信号为主同步信号时,将 N个连续时隙中每个时隙的前 M个码 片中携带的字符获取为置零后的所述主同步信号。
19、 根据权利要求 17所述的方法, 其特征在于, 所述接收置零后的同步信 号, 包括:
当所述同步信号为辅同步信号时, 将 N个连续无线帧内的每个时隙中的前 M个码片中携带的字符获取为置零后的所述辅同步信号。
20、 根据权利要求 17所述的方法, 其特征在于, 所述接收置零后的同步信 号, 包括:
当所述同步信号为辅同步信号时, 将 1个无线帧内的每个时隙中的前 M*N 个码片中携带的字符获取为置零后的所述辅同步信号。
21、 根据权利要求 17所述的方法, 其特征在于, 所述接收置零后的同步信 号, 包括:
当所述同步信号为辅同步信号时, 将 1个无线帧内的每个时隙中的前 M*N 个码片中携带的字符获取为置零后的所述辅同步信号。
22、 一种同步信号传输***, 其特征在于, 所述***包括:
如权利要求 1至 5任一所述的发送设备和如权利要求 6至 10任一所述的接 收设备。
PCT/CN2014/072902 2014-03-05 2014-03-05 发送设备、接收设备、同步信号传输方法及*** WO2015131346A1 (zh)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101222274A (zh) * 2008-01-25 2008-07-16 中兴通讯股份有限公司 时分双工***中同步信号的发送方法和装置
US20090080407A1 (en) * 2007-09-21 2009-03-26 Texas Instruments Incorporated Secondary synchronization signal mapping
CN101997806A (zh) * 2009-08-28 2011-03-30 清华大学 用于数字传输的物理层帧同步序列的生成方法及***
CN102938754A (zh) * 2012-11-27 2013-02-20 东南大学 超蜂窝移动通信终端直通技术同步序列构造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090080407A1 (en) * 2007-09-21 2009-03-26 Texas Instruments Incorporated Secondary synchronization signal mapping
CN101222274A (zh) * 2008-01-25 2008-07-16 中兴通讯股份有限公司 时分双工***中同步信号的发送方法和装置
CN101997806A (zh) * 2009-08-28 2011-03-30 清华大学 用于数字传输的物理层帧同步序列的生成方法及***
CN102938754A (zh) * 2012-11-27 2013-02-20 东南大学 超蜂窝移动通信终端直通技术同步序列构造方法

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